1 /****************************************************************************** 2 3 Copyright (c) 2001-2020, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 34 #include "ixgbe.h" 35 36 inline u16 37 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg) 38 { 39 return pci_read_config(((struct ixgbe_softc *)hw->back)->dev, reg, 2); 40 } 41 42 inline void 43 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value) 44 { 45 pci_write_config(((struct ixgbe_softc *)hw->back)->dev, reg, value, 2); 46 } 47 48 inline u32 49 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg) 50 { 51 return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 52 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, reg); 53 } 54 55 inline void 56 ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val) 57 { 58 bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 59 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 60 reg, val); 61 } 62 63 inline u32 64 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset) 65 { 66 return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 67 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 68 reg + (offset << 2)); 69 } 70 71 inline void 72 ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val) 73 { 74 bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 75 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 76 reg + (offset << 2), val); 77 } 78 79 uint64_t 80 ixgbe_link_speed_to_baudrate(ixgbe_link_speed speed) 81 { 82 uint64_t baudrate; 83 84 switch (speed) { 85 case IXGBE_LINK_SPEED_10GB_FULL: 86 baudrate = IF_Gbps(10); 87 break; 88 case IXGBE_LINK_SPEED_5GB_FULL: 89 baudrate = IF_Gbps(5); 90 break; 91 case IXGBE_LINK_SPEED_2_5GB_FULL: 92 baudrate = IF_Mbps(2500); 93 break; 94 case IXGBE_LINK_SPEED_1GB_FULL: 95 baudrate = IF_Gbps(1); 96 break; 97 case IXGBE_LINK_SPEED_100_FULL: 98 baudrate = IF_Mbps(100); 99 break; 100 case IXGBE_LINK_SPEED_10_FULL: 101 baudrate = IF_Mbps(10); 102 break; 103 case IXGBE_LINK_SPEED_UNKNOWN: 104 default: 105 baudrate = 0; 106 break; 107 } 108 109 return baudrate; 110 } 111