xref: /freebsd/sys/dev/ixgbe/ixgbe_osdep.c (revision bf6f0db8a762966b08430692c92ae34e667948db)

/******************************************************************************

  Copyright (c) 2001-2020, Intel Corporation
  All rights reserved.

  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:

   1. Redistributions of source code must retain the above copyright notice,
      this list of conditions and the following disclaimer.

   2. Redistributions in binary form must reproduce the above copyright
      notice, this list of conditions and the following disclaimer in the
      documentation and/or other materials provided with the distribution.

   3. Neither the name of the Intel Corporation nor the names of its
      contributors may be used to endorse or promote products derived from
      this software without specific prior written permission.

  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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******************************************************************************/

#include "ixgbe.h"

inline device_t
ixgbe_dev_from_hw(struct ixgbe_hw *hw)
{
	return ((struct ixgbe_softc *)hw->back)->dev;
}

inline u16
ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg)
{
	return pci_read_config(((struct ixgbe_softc *)hw->back)->dev, reg, 2);
}

inline void
ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value)
{
	pci_write_config(((struct ixgbe_softc *)hw->back)->dev, reg, value, 2);
}

inline u32
ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
{
	return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,
	    ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, reg);
}

inline void
ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)
{
	bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,
	    ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle,
	    reg, val);
}

inline u32
ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset)
{
	return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,
	    ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle,
	    reg + (offset << 2));
}

inline void
ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)
{
	bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,
	    ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle,
	    reg + (offset << 2), val);
}

uint64_t
ixgbe_link_speed_to_baudrate(ixgbe_link_speed speed)
{
	uint64_t baudrate;

	switch (speed) {
	case IXGBE_LINK_SPEED_10GB_FULL:
		baudrate = IF_Gbps(10);
		break;
	case IXGBE_LINK_SPEED_5GB_FULL:
		baudrate = IF_Gbps(5);
		break;
	case IXGBE_LINK_SPEED_2_5GB_FULL:
		baudrate = IF_Mbps(2500);
		break;
	case IXGBE_LINK_SPEED_1GB_FULL:
		baudrate = IF_Gbps(1);
		break;
	case IXGBE_LINK_SPEED_100_FULL:
		baudrate = IF_Mbps(100);
		break;
	case IXGBE_LINK_SPEED_10_FULL:
		baudrate = IF_Mbps(10);
		break;
	case IXGBE_LINK_SPEED_UNKNOWN:
	default:
		baudrate = 0;
		break;
	}

	return baudrate;
}