xref: /freebsd/sys/dev/ixgbe/ixgbe_e610.h (revision dea5f973d0c8d29a79b433283d0a2de8f4615957)
1*dea5f973SBhosale, Yogeshnull /******************************************************************************
2*dea5f973SBhosale, Yogeshnull   SPDX-License-Identifier: BSD-3-Clause
3*dea5f973SBhosale, Yogeshnull 
4*dea5f973SBhosale, Yogeshnull   Copyright (c) 2025, Intel Corporation
5*dea5f973SBhosale, Yogeshnull   All rights reserved.
6*dea5f973SBhosale, Yogeshnull 
7*dea5f973SBhosale, Yogeshnull   Redistribution and use in source and binary forms, with or without
8*dea5f973SBhosale, Yogeshnull   modification, are permitted provided that the following conditions are met:
9*dea5f973SBhosale, Yogeshnull 
10*dea5f973SBhosale, Yogeshnull    1. Redistributions of source code must retain the above copyright notice,
11*dea5f973SBhosale, Yogeshnull       this list of conditions and the following disclaimer.
12*dea5f973SBhosale, Yogeshnull 
13*dea5f973SBhosale, Yogeshnull    2. Redistributions in binary form must reproduce the above copyright
14*dea5f973SBhosale, Yogeshnull       notice, this list of conditions and the following disclaimer in the
15*dea5f973SBhosale, Yogeshnull       documentation and/or other materials provided with the distribution.
16*dea5f973SBhosale, Yogeshnull 
17*dea5f973SBhosale, Yogeshnull    3. Neither the name of the Intel Corporation nor the names of its
18*dea5f973SBhosale, Yogeshnull       contributors may be used to endorse or promote products derived from
19*dea5f973SBhosale, Yogeshnull       this software without specific prior written permission.
20*dea5f973SBhosale, Yogeshnull 
21*dea5f973SBhosale, Yogeshnull   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22*dea5f973SBhosale, Yogeshnull   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23*dea5f973SBhosale, Yogeshnull   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24*dea5f973SBhosale, Yogeshnull   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25*dea5f973SBhosale, Yogeshnull   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26*dea5f973SBhosale, Yogeshnull   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27*dea5f973SBhosale, Yogeshnull   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28*dea5f973SBhosale, Yogeshnull   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29*dea5f973SBhosale, Yogeshnull   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30*dea5f973SBhosale, Yogeshnull   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31*dea5f973SBhosale, Yogeshnull   POSSIBILITY OF SUCH DAMAGE.
32*dea5f973SBhosale, Yogeshnull 
33*dea5f973SBhosale, Yogeshnull ******************************************************************************/
34*dea5f973SBhosale, Yogeshnull 
35*dea5f973SBhosale, Yogeshnull #ifndef _IXGBE_E610_H_
36*dea5f973SBhosale, Yogeshnull #define _IXGBE_E610_H_
37*dea5f973SBhosale, Yogeshnull 
38*dea5f973SBhosale, Yogeshnull #include "ixgbe_type.h"
39*dea5f973SBhosale, Yogeshnull 
40*dea5f973SBhosale, Yogeshnull void ixgbe_init_aci(struct ixgbe_hw *hw);
41*dea5f973SBhosale, Yogeshnull void ixgbe_shutdown_aci(struct ixgbe_hw *hw);
42*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc,
43*dea5f973SBhosale, Yogeshnull 		       void *buf, u16 buf_size);
44*dea5f973SBhosale, Yogeshnull bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw);
45*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e,
46*dea5f973SBhosale, Yogeshnull 			bool *pending);
47*dea5f973SBhosale, Yogeshnull 
48*dea5f973SBhosale, Yogeshnull void ixgbe_fill_dflt_direct_cmd_desc(struct ixgbe_aci_desc *desc, u16 opcode);
49*dea5f973SBhosale, Yogeshnull 
50*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw);
51*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv);
52*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_set_pf_context(struct ixgbe_hw *hw, u8 pf_id);
53*dea5f973SBhosale, Yogeshnull 
54*dea5f973SBhosale, Yogeshnull s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res,
55*dea5f973SBhosale, Yogeshnull 		      enum ixgbe_aci_res_access_type access, u32 timeout);
56*dea5f973SBhosale, Yogeshnull void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res);
57*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size,
58*dea5f973SBhosale, Yogeshnull 			u32 *cap_count, enum ixgbe_aci_opc opc);
59*dea5f973SBhosale, Yogeshnull s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw,
60*dea5f973SBhosale, Yogeshnull 			    struct ixgbe_hw_dev_caps *dev_caps);
61*dea5f973SBhosale, Yogeshnull s32 ixgbe_discover_func_caps(struct ixgbe_hw* hw,
62*dea5f973SBhosale, Yogeshnull 			     struct ixgbe_hw_func_caps* func_caps);
63*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_caps(struct ixgbe_hw *hw);
64*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw);
65*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode,
66*dea5f973SBhosale, Yogeshnull 			   struct ixgbe_aci_cmd_get_phy_caps_data *pcaps);
67*dea5f973SBhosale, Yogeshnull bool ixgbe_phy_caps_equals_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps,
68*dea5f973SBhosale, Yogeshnull 			       struct ixgbe_aci_cmd_set_phy_cfg_data *cfg);
69*dea5f973SBhosale, Yogeshnull void ixgbe_copy_phy_caps_to_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps,
70*dea5f973SBhosale, Yogeshnull 				struct ixgbe_aci_cmd_set_phy_cfg_data *cfg);
71*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw,
72*dea5f973SBhosale, Yogeshnull 			  struct ixgbe_aci_cmd_set_phy_cfg_data *cfg);
73*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link);
74*dea5f973SBhosale, Yogeshnull s32 ixgbe_update_link_info(struct ixgbe_hw *hw);
75*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up);
76*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse,
77*dea5f973SBhosale, Yogeshnull 			    struct ixgbe_link_status *link);
78*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask);
79*dea5f973SBhosale, Yogeshnull s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask);
80*dea5f973SBhosale, Yogeshnull 
81*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw,
82*dea5f973SBhosale, Yogeshnull 			       struct ixgbe_aci_cmd_get_link_topo *cmd,
83*dea5f973SBhosale, Yogeshnull 			       u8 *node_part_number, u16 *node_handle);
84*dea5f973SBhosale, Yogeshnull s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx,
85*dea5f973SBhosale, Yogeshnull 			    u8 node_part_number, u16 *node_handle);
86*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw,
87*dea5f973SBhosale, Yogeshnull 		       struct ixgbe_aci_cmd_link_topo_addr topo_addr,
88*dea5f973SBhosale, Yogeshnull 		       u16 bus_addr, __le16 addr, u8 params, u8 *data);
89*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw,
90*dea5f973SBhosale, Yogeshnull 			struct ixgbe_aci_cmd_link_topo_addr topo_addr,
91*dea5f973SBhosale, Yogeshnull 			u16 bus_addr, __le16 addr, u8 params, u8 *data);
92*dea5f973SBhosale, Yogeshnull 
93*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode);
94*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
95*dea5f973SBhosale, Yogeshnull 		       bool value);
96*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
97*dea5f973SBhosale, Yogeshnull 		       bool *value);
98*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr,
99*dea5f973SBhosale, Yogeshnull 			 u16 mem_addr, u8 page, u8 page_bank_ctrl, u8 *data,
100*dea5f973SBhosale, Yogeshnull 			 u8 length, bool write);
101*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw,
102*dea5f973SBhosale, Yogeshnull 			struct ixgbe_aci_cmd_link_topo_params *topo_params);
103*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw,
104*dea5f973SBhosale, Yogeshnull 			struct ixgbe_aci_cmd_link_topo_params *topo_params,
105*dea5f973SBhosale, Yogeshnull 			u32 start_address, u8 *data, u8 data_size);
106*dea5f973SBhosale, Yogeshnull 
107*dea5f973SBhosale, Yogeshnull s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw,
108*dea5f973SBhosale, Yogeshnull 		      enum ixgbe_aci_res_access_type access);
109*dea5f973SBhosale, Yogeshnull void ixgbe_release_nvm(struct ixgbe_hw *hw);
110*dea5f973SBhosale, Yogeshnull 
111*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,
112*dea5f973SBhosale, Yogeshnull 		       u16 length, void *data, bool last_command,
113*dea5f973SBhosale, Yogeshnull 		       bool read_shadow_ram);
114*dea5f973SBhosale, Yogeshnull 
115*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid);
116*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid,
117*dea5f973SBhosale, Yogeshnull 			 u32 offset, u16 length, void *data,
118*dea5f973SBhosale, Yogeshnull 			 bool last_command, u8 command_flags);
119*dea5f973SBhosale, Yogeshnull 
120*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_read_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags,
121*dea5f973SBhosale, Yogeshnull 			   u16 field_id, void *data, u16 buf_size,
122*dea5f973SBhosale, Yogeshnull 			   u16 *elem_count);
123*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_write_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags,
124*dea5f973SBhosale, Yogeshnull 			    void *data, u16 buf_size, u16 elem_count);
125*dea5f973SBhosale, Yogeshnull 
126*dea5f973SBhosale, Yogeshnull s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw);
127*dea5f973SBhosale, Yogeshnull s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw);
128*dea5f973SBhosale, Yogeshnull 
129*dea5f973SBhosale, Yogeshnull s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags,
130*dea5f973SBhosale, Yogeshnull 			     u8 *response_flags);
131*dea5f973SBhosale, Yogeshnull 
132*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs);
133*dea5f973SBhosale, Yogeshnull s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs);
134*dea5f973SBhosale, Yogeshnull 
135*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);
136*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);
137*dea5f973SBhosale, Yogeshnull 
138*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw, struct ixgbe_netlist_info *netlist);
139*dea5f973SBhosale, Yogeshnull s32 ixgbe_init_nvm(struct ixgbe_hw *hw);
140*dea5f973SBhosale, Yogeshnull 
141*dea5f973SBhosale, Yogeshnull s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw);
142*dea5f973SBhosale, Yogeshnull s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values);
143*dea5f973SBhosale, Yogeshnull 
144*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_sr_word_aci(struct ixgbe_hw  *hw, u16 offset, u16 *data);
145*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, u16 *data);
146*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_flat_nvm(struct ixgbe_hw  *hw, u32 offset, u32 *length,
147*dea5f973SBhosale, Yogeshnull 			u8 *data, bool read_shadow_ram);
148*dea5f973SBhosale, Yogeshnull 
149*dea5f973SBhosale, Yogeshnull s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data);
150*dea5f973SBhosale, Yogeshnull s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words, const u16 *data);
151*dea5f973SBhosale, Yogeshnull 
152*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0,
153*dea5f973SBhosale, Yogeshnull 			      u32 reg_val0, u32 reg_addr1, u32 reg_val1);
154*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0,
155*dea5f973SBhosale, Yogeshnull 			     u32 *reg_val0, u32 reg_addr1, u32 *reg_val1);
156*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode,
157*dea5f973SBhosale, Yogeshnull 				   bool *reset_needed);
158*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw);
159*dea5f973SBhosale, Yogeshnull 
160*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id,
161*dea5f973SBhosale, Yogeshnull 				u16 table_id, u32 start, void *buf,
162*dea5f973SBhosale, Yogeshnull 				u16 buf_size, u16 *ret_buf_size,
163*dea5f973SBhosale, Yogeshnull 				u16 *ret_next_cluster, u16 *ret_next_table,
164*dea5f973SBhosale, Yogeshnull 				u32 *ret_next_index);
165*dea5f973SBhosale, Yogeshnull 
166*dea5f973SBhosale, Yogeshnull s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw,
167*dea5f973SBhosale, Yogeshnull 				struct ixgbe_nvm_access_cmd *cmd,
168*dea5f973SBhosale, Yogeshnull 				struct ixgbe_nvm_access_data *data);
169*dea5f973SBhosale, Yogeshnull 
170*dea5f973SBhosale, Yogeshnull s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source);
171*dea5f973SBhosale, Yogeshnull 
172*dea5f973SBhosale, Yogeshnull /* E610 operations */
173*dea5f973SBhosale, Yogeshnull s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw);
174*dea5f973SBhosale, Yogeshnull s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw);
175*dea5f973SBhosale, Yogeshnull s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw);
176*dea5f973SBhosale, Yogeshnull enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw);
177*dea5f973SBhosale, Yogeshnull u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw);
178*dea5f973SBhosale, Yogeshnull s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed,
179*dea5f973SBhosale, Yogeshnull 			  bool autoneg_wait);
180*dea5f973SBhosale, Yogeshnull s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
181*dea5f973SBhosale, Yogeshnull 			  bool *link_up, bool link_up_wait_to_complete);
182*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw,
183*dea5f973SBhosale, Yogeshnull 				     ixgbe_link_speed *speed,
184*dea5f973SBhosale, Yogeshnull 				     bool *autoneg);
185*dea5f973SBhosale, Yogeshnull s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw,
186*dea5f973SBhosale, Yogeshnull 		     struct ixgbe_aci_cmd_set_phy_cfg_data *cfg,
187*dea5f973SBhosale, Yogeshnull 		     enum ixgbe_fc_mode req_mode);
188*dea5f973SBhosale, Yogeshnull s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw);
189*dea5f973SBhosale, Yogeshnull void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw);
190*dea5f973SBhosale, Yogeshnull s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
191*dea5f973SBhosale, Yogeshnull 			      u8 sub, u16 len, const char *driver_ver);
192*dea5f973SBhosale, Yogeshnull void ixgbe_disable_rx_E610(struct ixgbe_hw *hw);
193*dea5f973SBhosale, Yogeshnull s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee);
194*dea5f973SBhosale, Yogeshnull bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw);
195*dea5f973SBhosale, Yogeshnull bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw);
196*dea5f973SBhosale, Yogeshnull bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw);
197*dea5f973SBhosale, Yogeshnull s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw);
198*dea5f973SBhosale, Yogeshnull s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw);
199*dea5f973SBhosale, Yogeshnull s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw);
200*dea5f973SBhosale, Yogeshnull s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw);
201*dea5f973SBhosale, Yogeshnull s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw,
202*dea5f973SBhosale, Yogeshnull 					u16 *firmware_version);
203*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset,
204*dea5f973SBhosale, Yogeshnull 				u8 *sff8472_data);
205*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset,
206*dea5f973SBhosale, Yogeshnull 			       u8 *eeprom_data);
207*dea5f973SBhosale, Yogeshnull s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset,
208*dea5f973SBhosale, Yogeshnull 				u8 eeprom_data);
209*dea5f973SBhosale, Yogeshnull s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw);
210*dea5f973SBhosale, Yogeshnull s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on);
211*dea5f973SBhosale, Yogeshnull s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw);
212*dea5f973SBhosale, Yogeshnull s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw);
213*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data);
214*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset,
215*dea5f973SBhosale, Yogeshnull 				  u16 words, u16 *data);
216*dea5f973SBhosale, Yogeshnull s32 ixgbe_write_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 data);
217*dea5f973SBhosale, Yogeshnull s32 ixgbe_write_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset,
218*dea5f973SBhosale, Yogeshnull 				   u16 words, u16 *data);
219*dea5f973SBhosale, Yogeshnull s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw);
220*dea5f973SBhosale, Yogeshnull s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw);
221*dea5f973SBhosale, Yogeshnull s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val);
222*dea5f973SBhosale, Yogeshnull s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
223*dea5f973SBhosale, Yogeshnull 
224*dea5f973SBhosale, Yogeshnull #endif /* _IXGBE_E610_H_ */
225