xref: /freebsd/sys/dev/ixgbe/ixgbe_api.h (revision 1670a1c2a47d10ecccd001970b859caf93cd3b6e)
1 /******************************************************************************
2 
3   Copyright (c) 2001-2010, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
8 
9    1. Redistributions of source code must retain the above copyright notice,
10       this list of conditions and the following disclaimer.
11 
12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
16    3. Neither the name of the Intel Corporation nor the names of its
17       contributors may be used to endorse or promote products derived from
18       this software without specific prior written permission.
19 
20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30   POSSIBILITY OF SUCH DAMAGE.
31 
32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _IXGBE_API_H_
36 #define _IXGBE_API_H_
37 
38 #include "ixgbe_type.h"
39 
40 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
41 
42 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
43 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
44 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
45 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
46 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
47 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
48 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
49 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
50 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
51 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
52 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
53 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
54 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
55 
56 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
57 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
58 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
59                        u16 *phy_data);
60 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
61                         u16 phy_data);
62 
63 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
64 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
65                          ixgbe_link_speed *speed,
66                          bool *link_up);
67 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
68                                ixgbe_link_speed speed,
69                                bool autoneg,
70                                bool autoneg_wait_to_complete);
71 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
72                            bool autoneg, bool autoneg_wait_to_complete);
73 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
74                      bool *link_up, bool link_up_wait_to_complete);
75 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
76                             bool *autoneg);
77 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
78 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
79 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
80 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
81 
82 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
83 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
84 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
85 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
86 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
87 
88 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
89 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
90                   u32 enable_addr);
91 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
92 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
93 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
94 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
95 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
96 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
97                               u32 addr_count, ixgbe_mc_addr_itr func);
98 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
99                               u32 mc_addr_count, ixgbe_mc_addr_itr func);
100 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
101 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
102 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
103 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
104 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
105                    u32 vind, bool vlan_on);
106 
107 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num);
108 
109 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
110 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
111                                    u16 *firmware_version);
112 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
113 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
114 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
115 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
116 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
117 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
118 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
119 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc);
120 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc);
121 s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
122                                           struct ixgbe_atr_input *input,
123                                           u8 queue);
124 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
125                                         struct ixgbe_atr_input *input,
126                                         struct ixgbe_atr_input_masks *masks,
127                                         u16 soft_id,
128                                         u8 queue);
129 u16 ixgbe_atr_compute_hash_82599(struct ixgbe_atr_input *input, u32 key);
130 s32 ixgbe_atr_set_vlan_id_82599(struct ixgbe_atr_input *input, u16 vlan_id);
131 s32 ixgbe_atr_set_src_ipv4_82599(struct ixgbe_atr_input *input, u32 src_addr);
132 s32 ixgbe_atr_set_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 dst_addr);
133 s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input, u32 src_addr_1,
134                                  u32 src_addr_2, u32 src_addr_3,
135                                  u32 src_addr_4);
136 s32 ixgbe_atr_set_dst_ipv6_82599(struct ixgbe_atr_input *input, u32 dst_addr_1,
137                                  u32 dst_addr_2, u32 dst_addr_3,
138                                  u32 dst_addr_4);
139 s32 ixgbe_atr_set_src_port_82599(struct ixgbe_atr_input *input, u16 src_port);
140 s32 ixgbe_atr_set_dst_port_82599(struct ixgbe_atr_input *input, u16 dst_port);
141 s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, u16 flex_byte);
142 s32 ixgbe_atr_set_vm_pool_82599(struct ixgbe_atr_input *input, u8 vm_pool);
143 s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, u8 l4type);
144 s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input, u16 *vlan_id);
145 s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input, u32 *src_addr);
146 s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 *dst_addr);
147 s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input, u32 *src_addr_1,
148                                  u32 *src_addr_2, u32 *src_addr_3,
149                                  u32 *src_addr_4);
150 s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input, u32 *dst_addr_1,
151                                  u32 *dst_addr_2, u32 *dst_addr_3,
152                                  u32 *dst_addr_4);
153 s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input, u16 *src_port);
154 s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input, u16 *dst_port);
155 s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input,
156                                   u16 *flex_byte);
157 s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input, u8 *vm_pool);
158 s32 ixgbe_atr_get_l4type_82599(struct ixgbe_atr_input *input, u8 *l4type);
159 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
160                         u8 *data);
161 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
162                          u8 data);
163 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
164 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
165 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
166 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
167 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
168 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
169 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
170                          u16 *wwpn_prefix);
171 
172 
173 #endif /* _IXGBE_API_H_ */
174