xref: /freebsd/sys/dev/ixgbe/ixgbe_api.c (revision ddd5b8e9b4d8957fce018c520657cdfa4ecffad3)
1 /******************************************************************************
2 
3   Copyright (c) 2001-2013, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
8 
9    1. Redistributions of source code must retain the above copyright notice,
10       this list of conditions and the following disclaimer.
11 
12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
16    3. Neither the name of the Intel Corporation nor the names of its
17       contributors may be used to endorse or promote products derived from
18       this software without specific prior written permission.
19 
20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30   POSSIBILITY OF SUCH DAMAGE.
31 
32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
37 
38 /**
39  *  ixgbe_init_shared_code - Initialize the shared code
40  *  @hw: pointer to hardware structure
41  *
42  *  This will assign function pointers and assign the MAC type and PHY code.
43  *  Does not touch the hardware. This function must be called prior to any
44  *  other function in the shared code. The ixgbe_hw structure should be
45  *  memset to 0 prior to calling this function.  The following fields in
46  *  hw structure should be filled in prior to calling this function:
47  *  hw_addr, back, device_id, vendor_id, subsystem_device_id,
48  *  subsystem_vendor_id, and revision_id
49  **/
50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
51 {
52 	s32 status;
53 
54 	DEBUGFUNC("ixgbe_init_shared_code");
55 
56 	/*
57 	 * Set the mac type
58 	 */
59 	ixgbe_set_mac_type(hw);
60 
61 	switch (hw->mac.type) {
62 	case ixgbe_mac_82598EB:
63 		status = ixgbe_init_ops_82598(hw);
64 		break;
65 	case ixgbe_mac_82599EB:
66 		status = ixgbe_init_ops_82599(hw);
67 		break;
68 	case ixgbe_mac_82599_vf:
69 	case ixgbe_mac_X540_vf:
70 		status = ixgbe_init_ops_vf(hw);
71 		break;
72 	case ixgbe_mac_X540:
73 		status = ixgbe_init_ops_X540(hw);
74 		break;
75 	default:
76 		status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
77 		break;
78 	}
79 
80 	return status;
81 }
82 
83 /**
84  *  ixgbe_set_mac_type - Sets MAC type
85  *  @hw: pointer to the HW structure
86  *
87  *  This function sets the mac type of the adapter based on the
88  *  vendor ID and device ID stored in the hw structure.
89  **/
90 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
91 {
92 	s32 ret_val = IXGBE_SUCCESS;
93 
94 	DEBUGFUNC("ixgbe_set_mac_type\n");
95 
96 	switch (hw->device_id) {
97 	case IXGBE_DEV_ID_82598:
98 	case IXGBE_DEV_ID_82598_BX:
99 	case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
100 	case IXGBE_DEV_ID_82598AF_DUAL_PORT:
101 	case IXGBE_DEV_ID_82598AT:
102 	case IXGBE_DEV_ID_82598AT2:
103 	case IXGBE_DEV_ID_82598EB_CX4:
104 	case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
105 	case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
106 	case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
107 	case IXGBE_DEV_ID_82598EB_XF_LR:
108 	case IXGBE_DEV_ID_82598EB_SFP_LOM:
109 		hw->mac.type = ixgbe_mac_82598EB;
110 		break;
111 	case IXGBE_DEV_ID_82599_KX4:
112 	case IXGBE_DEV_ID_82599_KX4_MEZZ:
113 	case IXGBE_DEV_ID_82599_XAUI_LOM:
114 	case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
115 	case IXGBE_DEV_ID_82599_KR:
116 	case IXGBE_DEV_ID_82599_SFP:
117 	case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
118 	case IXGBE_DEV_ID_82599_SFP_FCOE:
119 	case IXGBE_DEV_ID_82599_SFP_EM:
120 	case IXGBE_DEV_ID_82599_SFP_SF2:
121 	case IXGBE_DEV_ID_82599_SFP_SF_QP:
122 	case IXGBE_DEV_ID_82599EN_SFP:
123 	case IXGBE_DEV_ID_82599_CX4:
124 	case IXGBE_DEV_ID_82599_BYPASS:
125 	case IXGBE_DEV_ID_82599_T3_LOM:
126 		hw->mac.type = ixgbe_mac_82599EB;
127 		break;
128 	case IXGBE_DEV_ID_82599_VF:
129 	case IXGBE_DEV_ID_82599_VF_HV:
130 		hw->mac.type = ixgbe_mac_82599_vf;
131 		break;
132 	case IXGBE_DEV_ID_X540_VF:
133 	case IXGBE_DEV_ID_X540_VF_HV:
134 		hw->mac.type = ixgbe_mac_X540_vf;
135 		break;
136 	case IXGBE_DEV_ID_X540T:
137 	case IXGBE_DEV_ID_X540_BYPASS:
138 		hw->mac.type = ixgbe_mac_X540;
139 		break;
140 	default:
141 		ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
142 		break;
143 	}
144 
145 	DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
146 		  hw->mac.type, ret_val);
147 	return ret_val;
148 }
149 
150 /**
151  *  ixgbe_init_hw - Initialize the hardware
152  *  @hw: pointer to hardware structure
153  *
154  *  Initialize the hardware by resetting and then starting the hardware
155  **/
156 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
157 {
158 	return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
159 			       IXGBE_NOT_IMPLEMENTED);
160 }
161 
162 /**
163  *  ixgbe_reset_hw - Performs a hardware reset
164  *  @hw: pointer to hardware structure
165  *
166  *  Resets the hardware by resetting the transmit and receive units, masks and
167  *  clears all interrupts, performs a PHY reset, and performs a MAC reset
168  **/
169 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
170 {
171 	return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
172 			       IXGBE_NOT_IMPLEMENTED);
173 }
174 
175 /**
176  *  ixgbe_start_hw - Prepares hardware for Rx/Tx
177  *  @hw: pointer to hardware structure
178  *
179  *  Starts the hardware by filling the bus info structure and media type,
180  *  clears all on chip counters, initializes receive address registers,
181  *  multicast table, VLAN filter table, calls routine to setup link and
182  *  flow control settings, and leaves transmit and receive units disabled
183  *  and uninitialized.
184  **/
185 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
186 {
187 	return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
188 			       IXGBE_NOT_IMPLEMENTED);
189 }
190 
191 /**
192  *  ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
193  *  which is disabled by default in ixgbe_start_hw();
194  *
195  *  @hw: pointer to hardware structure
196  *
197  *   Enable relaxed ordering;
198  **/
199 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
200 {
201 	if (hw->mac.ops.enable_relaxed_ordering)
202 		hw->mac.ops.enable_relaxed_ordering(hw);
203 }
204 
205 /**
206  *  ixgbe_clear_hw_cntrs - Clear hardware counters
207  *  @hw: pointer to hardware structure
208  *
209  *  Clears all hardware statistics counters by reading them from the hardware
210  *  Statistics counters are clear on read.
211  **/
212 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
213 {
214 	return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
215 			       IXGBE_NOT_IMPLEMENTED);
216 }
217 
218 /**
219  *  ixgbe_get_media_type - Get media type
220  *  @hw: pointer to hardware structure
221  *
222  *  Returns the media type (fiber, copper, backplane)
223  **/
224 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
225 {
226 	return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
227 			       ixgbe_media_type_unknown);
228 }
229 
230 /**
231  *  ixgbe_get_mac_addr - Get MAC address
232  *  @hw: pointer to hardware structure
233  *  @mac_addr: Adapter MAC address
234  *
235  *  Reads the adapter's MAC address from the first Receive Address Register
236  *  (RAR0) A reset of the adapter must have been performed prior to calling
237  *  this function in order for the MAC address to have been loaded from the
238  *  EEPROM into RAR0
239  **/
240 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
241 {
242 	return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
243 			       (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
244 }
245 
246 /**
247  *  ixgbe_get_san_mac_addr - Get SAN MAC address
248  *  @hw: pointer to hardware structure
249  *  @san_mac_addr: SAN MAC address
250  *
251  *  Reads the SAN MAC address from the EEPROM, if it's available.  This is
252  *  per-port, so set_lan_id() must be called before reading the addresses.
253  **/
254 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
255 {
256 	return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
257 			       (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
258 }
259 
260 /**
261  *  ixgbe_set_san_mac_addr - Write a SAN MAC address
262  *  @hw: pointer to hardware structure
263  *  @san_mac_addr: SAN MAC address
264  *
265  *  Writes A SAN MAC address to the EEPROM.
266  **/
267 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
268 {
269 	return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
270 			       (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
271 }
272 
273 /**
274  *  ixgbe_get_device_caps - Get additional device capabilities
275  *  @hw: pointer to hardware structure
276  *  @device_caps: the EEPROM word for device capabilities
277  *
278  *  Reads the extra device capabilities from the EEPROM
279  **/
280 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
281 {
282 	return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
283 			       (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
284 }
285 
286 /**
287  *  ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
288  *  @hw: pointer to hardware structure
289  *  @wwnn_prefix: the alternative WWNN prefix
290  *  @wwpn_prefix: the alternative WWPN prefix
291  *
292  *  This function will read the EEPROM from the alternative SAN MAC address
293  *  block to check the support for the alternative WWNN/WWPN prefix support.
294  **/
295 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
296 			 u16 *wwpn_prefix)
297 {
298 	return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
299 			       (hw, wwnn_prefix, wwpn_prefix),
300 			       IXGBE_NOT_IMPLEMENTED);
301 }
302 
303 /**
304  *  ixgbe_get_fcoe_boot_status -  Get FCOE boot status from EEPROM
305  *  @hw: pointer to hardware structure
306  *  @bs: the fcoe boot status
307  *
308  *  This function will read the FCOE boot status from the iSCSI FCOE block
309  **/
310 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
311 {
312 	return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
313 			       (hw, bs),
314 			       IXGBE_NOT_IMPLEMENTED);
315 }
316 
317 /**
318  *  ixgbe_get_bus_info - Set PCI bus info
319  *  @hw: pointer to hardware structure
320  *
321  *  Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
322  **/
323 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
324 {
325 	return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
326 			       IXGBE_NOT_IMPLEMENTED);
327 }
328 
329 /**
330  *  ixgbe_get_num_of_tx_queues - Get Tx queues
331  *  @hw: pointer to hardware structure
332  *
333  *  Returns the number of transmit queues for the given adapter.
334  **/
335 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
336 {
337 	return hw->mac.max_tx_queues;
338 }
339 
340 /**
341  *  ixgbe_get_num_of_rx_queues - Get Rx queues
342  *  @hw: pointer to hardware structure
343  *
344  *  Returns the number of receive queues for the given adapter.
345  **/
346 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
347 {
348 	return hw->mac.max_rx_queues;
349 }
350 
351 /**
352  *  ixgbe_stop_adapter - Disable Rx/Tx units
353  *  @hw: pointer to hardware structure
354  *
355  *  Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
356  *  disables transmit and receive units. The adapter_stopped flag is used by
357  *  the shared code and drivers to determine if the adapter is in a stopped
358  *  state and should not touch the hardware.
359  **/
360 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
361 {
362 	return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
363 			       IXGBE_NOT_IMPLEMENTED);
364 }
365 
366 /**
367  *  ixgbe_read_pba_string - Reads part number string from EEPROM
368  *  @hw: pointer to hardware structure
369  *  @pba_num: stores the part number string from the EEPROM
370  *  @pba_num_size: part number string buffer length
371  *
372  *  Reads the part number string from the EEPROM.
373  **/
374 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
375 {
376 	return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
377 }
378 
379 /**
380  *  ixgbe_read_pba_num - Reads part number from EEPROM
381  *  @hw: pointer to hardware structure
382  *  @pba_num: stores the part number from the EEPROM
383  *
384  *  Reads the part number from the EEPROM.
385  **/
386 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
387 {
388 	return ixgbe_read_pba_num_generic(hw, pba_num);
389 }
390 
391 /**
392  *  ixgbe_identify_phy - Get PHY type
393  *  @hw: pointer to hardware structure
394  *
395  *  Determines the physical layer module found on the current adapter.
396  **/
397 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
398 {
399 	s32 status = IXGBE_SUCCESS;
400 
401 	if (hw->phy.type == ixgbe_phy_unknown) {
402 		status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
403 					 IXGBE_NOT_IMPLEMENTED);
404 	}
405 
406 	return status;
407 }
408 
409 /**
410  *  ixgbe_reset_phy - Perform a PHY reset
411  *  @hw: pointer to hardware structure
412  **/
413 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
414 {
415 	s32 status = IXGBE_SUCCESS;
416 
417 	if (hw->phy.type == ixgbe_phy_unknown) {
418 		if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
419 			status = IXGBE_ERR_PHY;
420 	}
421 
422 	if (status == IXGBE_SUCCESS) {
423 		status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
424 					 IXGBE_NOT_IMPLEMENTED);
425 	}
426 	return status;
427 }
428 
429 /**
430  *  ixgbe_get_phy_firmware_version -
431  *  @hw: pointer to hardware structure
432  *  @firmware_version: pointer to firmware version
433  **/
434 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
435 {
436 	s32 status = IXGBE_SUCCESS;
437 
438 	status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
439 				 (hw, firmware_version),
440 				 IXGBE_NOT_IMPLEMENTED);
441 	return status;
442 }
443 
444 /**
445  *  ixgbe_read_phy_reg - Read PHY register
446  *  @hw: pointer to hardware structure
447  *  @reg_addr: 32 bit address of PHY register to read
448  *  @phy_data: Pointer to read data from PHY register
449  *
450  *  Reads a value from a specified PHY register
451  **/
452 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
453 		       u16 *phy_data)
454 {
455 	if (hw->phy.id == 0)
456 		ixgbe_identify_phy(hw);
457 
458 	return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
459 			       device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
460 }
461 
462 /**
463  *  ixgbe_write_phy_reg - Write PHY register
464  *  @hw: pointer to hardware structure
465  *  @reg_addr: 32 bit PHY register to write
466  *  @phy_data: Data to write to the PHY register
467  *
468  *  Writes a value to specified PHY register
469  **/
470 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
471 			u16 phy_data)
472 {
473 	if (hw->phy.id == 0)
474 		ixgbe_identify_phy(hw);
475 
476 	return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
477 			       device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
478 }
479 
480 /**
481  *  ixgbe_setup_phy_link - Restart PHY autoneg
482  *  @hw: pointer to hardware structure
483  *
484  *  Restart autonegotiation and PHY and waits for completion.
485  **/
486 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
487 {
488 	return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
489 			       IXGBE_NOT_IMPLEMENTED);
490 }
491 
492 /**
493  *  ixgbe_check_phy_link - Determine link and speed status
494  *  @hw: pointer to hardware structure
495  *
496  *  Reads a PHY register to determine if link is up and the current speed for
497  *  the PHY.
498  **/
499 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
500 			 bool *link_up)
501 {
502 	return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
503 			       link_up), IXGBE_NOT_IMPLEMENTED);
504 }
505 
506 /**
507  *  ixgbe_setup_phy_link_speed - Set auto advertise
508  *  @hw: pointer to hardware structure
509  *  @speed: new link speed
510  *
511  *  Sets the auto advertised capabilities
512  **/
513 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
514 			       bool autoneg_wait_to_complete)
515 {
516 	return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
517 			       autoneg_wait_to_complete),
518 			       IXGBE_NOT_IMPLEMENTED);
519 }
520 
521 /**
522  *  ixgbe_check_link - Get link and speed status
523  *  @hw: pointer to hardware structure
524  *
525  *  Reads the links register to determine if link is up and the current speed
526  **/
527 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
528 		     bool *link_up, bool link_up_wait_to_complete)
529 {
530 	return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
531 			       link_up, link_up_wait_to_complete),
532 			       IXGBE_NOT_IMPLEMENTED);
533 }
534 
535 /**
536  *  ixgbe_disable_tx_laser - Disable Tx laser
537  *  @hw: pointer to hardware structure
538  *
539  *  If the driver needs to disable the laser on SFI optics.
540  **/
541 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
542 {
543 	if (hw->mac.ops.disable_tx_laser)
544 		hw->mac.ops.disable_tx_laser(hw);
545 }
546 
547 /**
548  *  ixgbe_enable_tx_laser - Enable Tx laser
549  *  @hw: pointer to hardware structure
550  *
551  *  If the driver needs to enable the laser on SFI optics.
552  **/
553 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
554 {
555 	if (hw->mac.ops.enable_tx_laser)
556 		hw->mac.ops.enable_tx_laser(hw);
557 }
558 
559 /**
560  *  ixgbe_flap_tx_laser - flap Tx laser to start autotry process
561  *  @hw: pointer to hardware structure
562  *
563  *  When the driver changes the link speeds that it can support then
564  *  flap the tx laser to alert the link partner to start autotry
565  *  process on its end.
566  **/
567 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
568 {
569 	if (hw->mac.ops.flap_tx_laser)
570 		hw->mac.ops.flap_tx_laser(hw);
571 }
572 
573 /**
574  *  ixgbe_setup_link - Set link speed
575  *  @hw: pointer to hardware structure
576  *  @speed: new link speed
577  *
578  *  Configures link settings.  Restarts the link.
579  *  Performs autonegotiation if needed.
580  **/
581 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
582 		     bool autoneg_wait_to_complete)
583 {
584 	return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
585 			       autoneg_wait_to_complete),
586 			       IXGBE_NOT_IMPLEMENTED);
587 }
588 
589 /**
590  *  ixgbe_get_link_capabilities - Returns link capabilities
591  *  @hw: pointer to hardware structure
592  *
593  *  Determines the link capabilities of the current configuration.
594  **/
595 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
596 				bool *autoneg)
597 {
598 	return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
599 			       speed, autoneg), IXGBE_NOT_IMPLEMENTED);
600 }
601 
602 /**
603  *  ixgbe_led_on - Turn on LEDs
604  *  @hw: pointer to hardware structure
605  *  @index: led number to turn on
606  *
607  *  Turns on the software controllable LEDs.
608  **/
609 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
610 {
611 	return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
612 			       IXGBE_NOT_IMPLEMENTED);
613 }
614 
615 /**
616  *  ixgbe_led_off - Turn off LEDs
617  *  @hw: pointer to hardware structure
618  *  @index: led number to turn off
619  *
620  *  Turns off the software controllable LEDs.
621  **/
622 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
623 {
624 	return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
625 			       IXGBE_NOT_IMPLEMENTED);
626 }
627 
628 /**
629  *  ixgbe_blink_led_start - Blink LEDs
630  *  @hw: pointer to hardware structure
631  *  @index: led number to blink
632  *
633  *  Blink LED based on index.
634  **/
635 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
636 {
637 	return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
638 			       IXGBE_NOT_IMPLEMENTED);
639 }
640 
641 /**
642  *  ixgbe_blink_led_stop - Stop blinking LEDs
643  *  @hw: pointer to hardware structure
644  *
645  *  Stop blinking LED based on index.
646  **/
647 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
648 {
649 	return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
650 			       IXGBE_NOT_IMPLEMENTED);
651 }
652 
653 /**
654  *  ixgbe_init_eeprom_params - Initialize EEPROM parameters
655  *  @hw: pointer to hardware structure
656  *
657  *  Initializes the EEPROM parameters ixgbe_eeprom_info within the
658  *  ixgbe_hw struct in order to set up EEPROM access.
659  **/
660 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
661 {
662 	return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
663 			       IXGBE_NOT_IMPLEMENTED);
664 }
665 
666 
667 /**
668  *  ixgbe_write_eeprom - Write word to EEPROM
669  *  @hw: pointer to hardware structure
670  *  @offset: offset within the EEPROM to be written to
671  *  @data: 16 bit word to be written to the EEPROM
672  *
673  *  Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
674  *  called after this function, the EEPROM will most likely contain an
675  *  invalid checksum.
676  **/
677 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
678 {
679 	return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
680 			       IXGBE_NOT_IMPLEMENTED);
681 }
682 
683 /**
684  *  ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
685  *  @hw: pointer to hardware structure
686  *  @offset: offset within the EEPROM to be written to
687  *  @data: 16 bit word(s) to be written to the EEPROM
688  *  @words: number of words
689  *
690  *  Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
691  *  called after this function, the EEPROM will most likely contain an
692  *  invalid checksum.
693  **/
694 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
695 			      u16 *data)
696 {
697 	return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
698 			       (hw, offset, words, data),
699 			       IXGBE_NOT_IMPLEMENTED);
700 }
701 
702 /**
703  *  ixgbe_read_eeprom - Read word from EEPROM
704  *  @hw: pointer to hardware structure
705  *  @offset: offset within the EEPROM to be read
706  *  @data: read 16 bit value from EEPROM
707  *
708  *  Reads 16 bit value from EEPROM
709  **/
710 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
711 {
712 	return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
713 			       IXGBE_NOT_IMPLEMENTED);
714 }
715 
716 /**
717  *  ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
718  *  @hw: pointer to hardware structure
719  *  @offset: offset within the EEPROM to be read
720  *  @data: read 16 bit word(s) from EEPROM
721  *  @words: number of words
722  *
723  *  Reads 16 bit word(s) from EEPROM
724  **/
725 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
726 			     u16 words, u16 *data)
727 {
728 	return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
729 			       (hw, offset, words, data),
730 			       IXGBE_NOT_IMPLEMENTED);
731 }
732 
733 /**
734  *  ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
735  *  @hw: pointer to hardware structure
736  *  @checksum_val: calculated checksum
737  *
738  *  Performs checksum calculation and validates the EEPROM checksum
739  **/
740 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
741 {
742 	return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
743 			       (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
744 }
745 
746 /**
747  *  ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
748  *  @hw: pointer to hardware structure
749  **/
750 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
751 {
752 	return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
753 			       IXGBE_NOT_IMPLEMENTED);
754 }
755 
756 /**
757  *  ixgbe_insert_mac_addr - Find a RAR for this mac address
758  *  @hw: pointer to hardware structure
759  *  @addr: Address to put into receive address register
760  *  @vmdq: VMDq pool to assign
761  *
762  *  Puts an ethernet address into a receive address register, or
763  *  finds the rar that it is aleady in; adds to the pool list
764  **/
765 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
766 {
767 	return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
768 			       (hw, addr, vmdq),
769 			       IXGBE_NOT_IMPLEMENTED);
770 }
771 
772 /**
773  *  ixgbe_set_rar - Set Rx address register
774  *  @hw: pointer to hardware structure
775  *  @index: Receive address register to write
776  *  @addr: Address to put into receive address register
777  *  @vmdq: VMDq "set"
778  *  @enable_addr: set flag that address is active
779  *
780  *  Puts an ethernet address into a receive address register.
781  **/
782 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
783 		  u32 enable_addr)
784 {
785 	return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
786 			       enable_addr), IXGBE_NOT_IMPLEMENTED);
787 }
788 
789 /**
790  *  ixgbe_clear_rar - Clear Rx address register
791  *  @hw: pointer to hardware structure
792  *  @index: Receive address register to write
793  *
794  *  Puts an ethernet address into a receive address register.
795  **/
796 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
797 {
798 	return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
799 			       IXGBE_NOT_IMPLEMENTED);
800 }
801 
802 /**
803  *  ixgbe_set_vmdq - Associate a VMDq index with a receive address
804  *  @hw: pointer to hardware structure
805  *  @rar: receive address register index to associate with VMDq index
806  *  @vmdq: VMDq set or pool index
807  **/
808 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
809 {
810 	return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
811 			       IXGBE_NOT_IMPLEMENTED);
812 
813 }
814 
815 /**
816  *  ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
817  *  @hw: pointer to hardware structure
818  *  @vmdq: VMDq default pool index
819  **/
820 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
821 {
822 	return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
823 			       (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
824 }
825 
826 /**
827  *  ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
828  *  @hw: pointer to hardware structure
829  *  @rar: receive address register index to disassociate with VMDq index
830  *  @vmdq: VMDq set or pool index
831  **/
832 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
833 {
834 	return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
835 			       IXGBE_NOT_IMPLEMENTED);
836 }
837 
838 /**
839  *  ixgbe_init_rx_addrs - Initializes receive address filters.
840  *  @hw: pointer to hardware structure
841  *
842  *  Places the MAC address in receive address register 0 and clears the rest
843  *  of the receive address registers. Clears the multicast table. Assumes
844  *  the receiver is in reset when the routine is called.
845  **/
846 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
847 {
848 	return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
849 			       IXGBE_NOT_IMPLEMENTED);
850 }
851 
852 /**
853  *  ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
854  *  @hw: pointer to hardware structure
855  **/
856 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
857 {
858 	return hw->mac.num_rar_entries;
859 }
860 
861 /**
862  *  ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
863  *  @hw: pointer to hardware structure
864  *  @addr_list: the list of new multicast addresses
865  *  @addr_count: number of addresses
866  *  @func: iterator function to walk the multicast address list
867  *
868  *  The given list replaces any existing list. Clears the secondary addrs from
869  *  receive address registers. Uses unused receive address registers for the
870  *  first secondary addresses, and falls back to promiscuous mode as needed.
871  **/
872 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
873 			      u32 addr_count, ixgbe_mc_addr_itr func)
874 {
875 	return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
876 			       addr_list, addr_count, func),
877 			       IXGBE_NOT_IMPLEMENTED);
878 }
879 
880 /**
881  *  ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
882  *  @hw: pointer to hardware structure
883  *  @mc_addr_list: the list of new multicast addresses
884  *  @mc_addr_count: number of addresses
885  *  @func: iterator function to walk the multicast address list
886  *
887  *  The given list replaces any existing list. Clears the MC addrs from receive
888  *  address registers and the multicast table. Uses unused receive address
889  *  registers for the first multicast addresses, and hashes the rest into the
890  *  multicast table.
891  **/
892 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
893 			      u32 mc_addr_count, ixgbe_mc_addr_itr func,
894 			      bool clear)
895 {
896 	return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
897 			       mc_addr_list, mc_addr_count, func, clear),
898 			       IXGBE_NOT_IMPLEMENTED);
899 }
900 
901 /**
902  *  ixgbe_enable_mc - Enable multicast address in RAR
903  *  @hw: pointer to hardware structure
904  *
905  *  Enables multicast address in RAR and the use of the multicast hash table.
906  **/
907 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
908 {
909 	return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
910 			       IXGBE_NOT_IMPLEMENTED);
911 }
912 
913 /**
914  *  ixgbe_disable_mc - Disable multicast address in RAR
915  *  @hw: pointer to hardware structure
916  *
917  *  Disables multicast address in RAR and the use of the multicast hash table.
918  **/
919 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
920 {
921 	return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
922 			       IXGBE_NOT_IMPLEMENTED);
923 }
924 
925 /**
926  *  ixgbe_clear_vfta - Clear VLAN filter table
927  *  @hw: pointer to hardware structure
928  *
929  *  Clears the VLAN filer table, and the VMDq index associated with the filter
930  **/
931 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
932 {
933 	return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
934 			       IXGBE_NOT_IMPLEMENTED);
935 }
936 
937 /**
938  *  ixgbe_set_vfta - Set VLAN filter table
939  *  @hw: pointer to hardware structure
940  *  @vlan: VLAN id to write to VLAN filter
941  *  @vind: VMDq output index that maps queue to VLAN id in VFTA
942  *  @vlan_on: boolean flag to turn on/off VLAN in VFTA
943  *
944  *  Turn on/off specified VLAN in the VLAN filter table.
945  **/
946 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
947 {
948 	return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
949 			       vlan_on), IXGBE_NOT_IMPLEMENTED);
950 }
951 
952 /**
953  *  ixgbe_set_vlvf - Set VLAN Pool Filter
954  *  @hw: pointer to hardware structure
955  *  @vlan: VLAN id to write to VLAN filter
956  *  @vind: VMDq output index that maps queue to VLAN id in VFVFB
957  *  @vlan_on: boolean flag to turn on/off VLAN in VFVF
958  *  @vfta_changed: pointer to boolean flag which indicates whether VFTA
959  *                 should be changed
960  *
961  *  Turn on/off specified bit in VLVF table.
962  **/
963 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
964 		    bool *vfta_changed)
965 {
966 	return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
967 			       vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
968 }
969 
970 /**
971  *  ixgbe_fc_enable - Enable flow control
972  *  @hw: pointer to hardware structure
973  *
974  *  Configures the flow control settings based on SW configuration.
975  **/
976 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
977 {
978 	return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
979 			       IXGBE_NOT_IMPLEMENTED);
980 }
981 
982 /**
983  * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
984  * @hw: pointer to hardware structure
985  * @maj: driver major number to be sent to firmware
986  * @min: driver minor number to be sent to firmware
987  * @build: driver build number to be sent to firmware
988  * @ver: driver version number to be sent to firmware
989  **/
990 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
991 			 u8 ver)
992 {
993 	return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
994 			       build, ver), IXGBE_NOT_IMPLEMENTED);
995 }
996 
997 
998 /**
999  *  ixgbe_read_analog_reg8 - Reads 8 bit analog register
1000  *  @hw: pointer to hardware structure
1001  *  @reg: analog register to read
1002  *  @val: read value
1003  *
1004  *  Performs write operation to analog register specified.
1005  **/
1006 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1007 {
1008 	return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1009 			       val), IXGBE_NOT_IMPLEMENTED);
1010 }
1011 
1012 /**
1013  *  ixgbe_write_analog_reg8 - Writes 8 bit analog register
1014  *  @hw: pointer to hardware structure
1015  *  @reg: analog register to write
1016  *  @val: value to write
1017  *
1018  *  Performs write operation to Atlas analog register specified.
1019  **/
1020 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1021 {
1022 	return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1023 			       val), IXGBE_NOT_IMPLEMENTED);
1024 }
1025 
1026 /**
1027  *  ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1028  *  @hw: pointer to hardware structure
1029  *
1030  *  Initializes the Unicast Table Arrays to zero on device load.  This
1031  *  is part of the Rx init addr execution path.
1032  **/
1033 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1034 {
1035 	return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1036 			       IXGBE_NOT_IMPLEMENTED);
1037 }
1038 
1039 /**
1040  *  ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1041  *  @hw: pointer to hardware structure
1042  *  @byte_offset: byte offset to read
1043  *  @data: value read
1044  *
1045  *  Performs byte read operation to SFP module's EEPROM over I2C interface.
1046  **/
1047 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1048 			u8 *data)
1049 {
1050 	return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1051 			       dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1052 }
1053 
1054 /**
1055  *  ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1056  *  @hw: pointer to hardware structure
1057  *  @byte_offset: byte offset to write
1058  *  @data: value to write
1059  *
1060  *  Performs byte write operation to SFP module's EEPROM over I2C interface
1061  *  at a specified device address.
1062  **/
1063 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1064 			 u8 data)
1065 {
1066 	return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1067 			       dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1068 }
1069 
1070 /**
1071  *  ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1072  *  @hw: pointer to hardware structure
1073  *  @byte_offset: EEPROM byte offset to write
1074  *  @eeprom_data: value to write
1075  *
1076  *  Performs byte write operation to SFP module's EEPROM over I2C interface.
1077  **/
1078 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1079 			   u8 byte_offset, u8 eeprom_data)
1080 {
1081 	return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1082 			       (hw, byte_offset, eeprom_data),
1083 			       IXGBE_NOT_IMPLEMENTED);
1084 }
1085 
1086 /**
1087  *  ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1088  *  @hw: pointer to hardware structure
1089  *  @byte_offset: EEPROM byte offset to read
1090  *  @eeprom_data: value read
1091  *
1092  *  Performs byte read operation to SFP module's EEPROM over I2C interface.
1093  **/
1094 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1095 {
1096 	return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1097 			      (hw, byte_offset, eeprom_data),
1098 			      IXGBE_NOT_IMPLEMENTED);
1099 }
1100 
1101 /**
1102  *  ixgbe_get_supported_physical_layer - Returns physical layer type
1103  *  @hw: pointer to hardware structure
1104  *
1105  *  Determines physical layer capabilities of the current configuration.
1106  **/
1107 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1108 {
1109 	return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1110 			       (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1111 }
1112 
1113 /**
1114  *  ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1115  *  @hw: pointer to hardware structure
1116  *  @regval: bitfield to write to the Rx DMA register
1117  *
1118  *  Enables the Rx DMA unit of the device.
1119  **/
1120 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1121 {
1122 	return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1123 			       (hw, regval), IXGBE_NOT_IMPLEMENTED);
1124 }
1125 
1126 /**
1127  *  ixgbe_disable_sec_rx_path - Stops the receive data path
1128  *  @hw: pointer to hardware structure
1129  *
1130  *  Stops the receive data path.
1131  **/
1132 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1133 {
1134 	return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1135 				(hw), IXGBE_NOT_IMPLEMENTED);
1136 }
1137 
1138 /**
1139  *  ixgbe_enable_sec_rx_path - Enables the receive data path
1140  *  @hw: pointer to hardware structure
1141  *
1142  *  Enables the receive data path.
1143  **/
1144 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1145 {
1146 	return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1147 				(hw), IXGBE_NOT_IMPLEMENTED);
1148 }
1149 
1150 /**
1151  *  ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1152  *  @hw: pointer to hardware structure
1153  *  @mask: Mask to specify which semaphore to acquire
1154  *
1155  *  Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1156  *  function (CSR, PHY0, PHY1, EEPROM, Flash)
1157  **/
1158 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1159 {
1160 	return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1161 			       (hw, mask), IXGBE_NOT_IMPLEMENTED);
1162 }
1163 
1164 /**
1165  *  ixgbe_release_swfw_semaphore - Release SWFW semaphore
1166  *  @hw: pointer to hardware structure
1167  *  @mask: Mask to specify which semaphore to release
1168  *
1169  *  Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1170  *  function (CSR, PHY0, PHY1, EEPROM, Flash)
1171  **/
1172 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1173 {
1174 	if (hw->mac.ops.release_swfw_sync)
1175 		hw->mac.ops.release_swfw_sync(hw, mask);
1176 }
1177 
1178