1 /****************************************************************************** 2 3 Copyright (c) 2001-2008, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #include "ixgbe_api.h" 36 #include "ixgbe_common.h" 37 38 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 39 40 /** 41 * ixgbe_init_shared_code - Initialize the shared code 42 * @hw: pointer to hardware structure 43 * 44 * This will assign function pointers and assign the MAC type and PHY code. 45 * Does not touch the hardware. This function must be called prior to any 46 * other function in the shared code. The ixgbe_hw structure should be 47 * memset to 0 prior to calling this function. The following fields in 48 * hw structure should be filled in prior to calling this function: 49 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 50 * subsystem_vendor_id, and revision_id 51 **/ 52 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 53 { 54 s32 status; 55 56 /* 57 * Set the mac type 58 */ 59 ixgbe_set_mac_type(hw); 60 61 switch (hw->mac.type) { 62 case ixgbe_mac_82598EB: 63 status = ixgbe_init_ops_82598(hw); 64 break; 65 default: 66 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 67 break; 68 } 69 70 return status; 71 } 72 73 /** 74 * ixgbe_set_mac_type - Sets MAC type 75 * @hw: pointer to the HW structure 76 * 77 * This function sets the mac type of the adapter based on the 78 * vendor ID and device ID stored in the hw structure. 79 **/ 80 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 81 { 82 s32 ret_val = IXGBE_SUCCESS; 83 84 DEBUGFUNC("ixgbe_set_mac_type\n"); 85 86 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 87 switch (hw->device_id) { 88 case IXGBE_DEV_ID_82598: 89 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 90 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 91 case IXGBE_DEV_ID_82598AT: 92 case IXGBE_DEV_ID_82598EB_CX4: 93 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 94 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 95 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 96 case IXGBE_DEV_ID_82598EB_XF_LR: 97 case IXGBE_DEV_ID_82598EB_SFP_LOM: 98 hw->mac.type = ixgbe_mac_82598EB; 99 break; 100 default: 101 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 102 break; 103 } 104 } else { 105 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 106 } 107 108 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 109 hw->mac.type, ret_val); 110 return ret_val; 111 } 112 113 /** 114 * ixgbe_init_hw - Initialize the hardware 115 * @hw: pointer to hardware structure 116 * 117 * Initialize the hardware by resetting and then starting the hardware 118 **/ 119 s32 ixgbe_init_hw(struct ixgbe_hw *hw) 120 { 121 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 122 IXGBE_NOT_IMPLEMENTED); 123 } 124 125 /** 126 * ixgbe_reset_hw - Performs a hardware reset 127 * @hw: pointer to hardware structure 128 * 129 * Resets the hardware by resetting the transmit and receive units, masks and 130 * clears all interrupts, performs a PHY reset, and performs a MAC reset 131 **/ 132 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 133 { 134 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 135 IXGBE_NOT_IMPLEMENTED); 136 } 137 138 /** 139 * ixgbe_start_hw - Prepares hardware for Rx/Tx 140 * @hw: pointer to hardware structure 141 * 142 * Starts the hardware by filling the bus info structure and media type, 143 * clears all on chip counters, initializes receive address registers, 144 * multicast table, VLAN filter table, calls routine to setup link and 145 * flow control settings, and leaves transmit and receive units disabled 146 * and uninitialized. 147 **/ 148 s32 ixgbe_start_hw(struct ixgbe_hw *hw) 149 { 150 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 151 IXGBE_NOT_IMPLEMENTED); 152 } 153 154 /** 155 * ixgbe_clear_hw_cntrs - Clear hardware counters 156 * @hw: pointer to hardware structure 157 * 158 * Clears all hardware statistics counters by reading them from the hardware 159 * Statistics counters are clear on read. 160 **/ 161 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 162 { 163 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 164 IXGBE_NOT_IMPLEMENTED); 165 } 166 167 /** 168 * ixgbe_get_media_type - Get media type 169 * @hw: pointer to hardware structure 170 * 171 * Returns the media type (fiber, copper, backplane) 172 **/ 173 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 174 { 175 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 176 ixgbe_media_type_unknown); 177 } 178 179 /** 180 * ixgbe_get_mac_addr - Get MAC address 181 * @hw: pointer to hardware structure 182 * @mac_addr: Adapter MAC address 183 * 184 * Reads the adapter's MAC address from the first Receive Address Register 185 * (RAR0) A reset of the adapter must have been performed prior to calling 186 * this function in order for the MAC address to have been loaded from the 187 * EEPROM into RAR0 188 **/ 189 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 190 { 191 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 192 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 193 } 194 195 /** 196 * ixgbe_get_bus_info - Set PCI bus info 197 * @hw: pointer to hardware structure 198 * 199 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 200 **/ 201 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 202 { 203 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 204 IXGBE_NOT_IMPLEMENTED); 205 } 206 207 /** 208 * ixgbe_get_num_of_tx_queues - Get Tx queues 209 * @hw: pointer to hardware structure 210 * 211 * Returns the number of transmit queues for the given adapter. 212 **/ 213 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 214 { 215 return hw->mac.max_tx_queues; 216 } 217 218 /** 219 * ixgbe_get_num_of_rx_queues - Get Rx queues 220 * @hw: pointer to hardware structure 221 * 222 * Returns the number of receive queues for the given adapter. 223 **/ 224 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 225 { 226 return hw->mac.max_rx_queues; 227 } 228 229 /** 230 * ixgbe_stop_adapter - Disable Rx/Tx units 231 * @hw: pointer to hardware structure 232 * 233 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 234 * disables transmit and receive units. The adapter_stopped flag is used by 235 * the shared code and drivers to determine if the adapter is in a stopped 236 * state and should not touch the hardware. 237 **/ 238 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 239 { 240 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 241 IXGBE_NOT_IMPLEMENTED); 242 } 243 244 /** 245 * ixgbe_read_pba_num - Reads part number from EEPROM 246 * @hw: pointer to hardware structure 247 * @pba_num: stores the part number from the EEPROM 248 * 249 * Reads the part number from the EEPROM. 250 **/ 251 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 252 { 253 return ixgbe_read_pba_num_generic(hw, pba_num); 254 } 255 256 /** 257 * ixgbe_identify_phy - Get PHY type 258 * @hw: pointer to hardware structure 259 * 260 * Determines the physical layer module found on the current adapter. 261 **/ 262 s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 263 { 264 s32 status = IXGBE_SUCCESS; 265 266 if (hw->phy.type == ixgbe_phy_unknown) { 267 status = ixgbe_call_func(hw, 268 hw->phy.ops.identify, 269 (hw), 270 IXGBE_NOT_IMPLEMENTED); 271 } 272 273 return status; 274 } 275 276 /** 277 * ixgbe_reset_phy - Perform a PHY reset 278 * @hw: pointer to hardware structure 279 **/ 280 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 281 { 282 s32 status = IXGBE_SUCCESS; 283 284 if (hw->phy.type == ixgbe_phy_unknown) { 285 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 286 status = IXGBE_ERR_PHY; 287 } 288 289 if (status == IXGBE_SUCCESS) { 290 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 291 IXGBE_NOT_IMPLEMENTED); 292 } 293 return status; 294 } 295 296 /** 297 * ixgbe_get_phy_firmware_version - 298 * @hw: pointer to hardware structure 299 * @firmware_version: pointer to firmware version 300 **/ 301 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 302 { 303 s32 status = IXGBE_SUCCESS; 304 305 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 306 (hw, firmware_version), 307 IXGBE_NOT_IMPLEMENTED); 308 return status; 309 } 310 311 /** 312 * ixgbe_read_phy_reg - Read PHY register 313 * @hw: pointer to hardware structure 314 * @reg_addr: 32 bit address of PHY register to read 315 * @phy_data: Pointer to read data from PHY register 316 * 317 * Reads a value from a specified PHY register 318 **/ 319 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 320 u16 *phy_data) 321 { 322 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 323 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 324 } 325 326 /** 327 * ixgbe_write_phy_reg - Write PHY register 328 * @hw: pointer to hardware structure 329 * @reg_addr: 32 bit PHY register to write 330 * @phy_data: Data to write to the PHY register 331 * 332 * Writes a value to specified PHY register 333 **/ 334 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 335 u16 phy_data) 336 { 337 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 338 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 339 } 340 341 /** 342 * ixgbe_setup_phy_link - Restart PHY autoneg 343 * @hw: pointer to hardware structure 344 * 345 * Restart autonegotiation and PHY and waits for completion. 346 **/ 347 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 348 { 349 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 350 IXGBE_NOT_IMPLEMENTED); 351 } 352 353 /** 354 * ixgbe_check_phy_link - Determine link and speed status 355 * @hw: pointer to hardware structure 356 * 357 * Reads a PHY register to determine if link is up and the current speed for 358 * the PHY. 359 **/ 360 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 361 bool *link_up) 362 { 363 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 364 link_up), IXGBE_NOT_IMPLEMENTED); 365 } 366 367 /** 368 * ixgbe_setup_phy_link_speed - Set auto advertise 369 * @hw: pointer to hardware structure 370 * @speed: new link speed 371 * @autoneg: TRUE if autonegotiation enabled 372 * 373 * Sets the auto advertised capabilities 374 **/ 375 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 376 bool autoneg, 377 bool autoneg_wait_to_complete) 378 { 379 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 380 autoneg, autoneg_wait_to_complete), 381 IXGBE_NOT_IMPLEMENTED); 382 } 383 384 /** 385 * ixgbe_setup_link - Configure link settings 386 * @hw: pointer to hardware structure 387 * 388 * Configures link settings based on values in the ixgbe_hw struct. 389 * Restarts the link. Performs autonegotiation if needed. 390 **/ 391 s32 ixgbe_setup_link(struct ixgbe_hw *hw) 392 { 393 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw), 394 IXGBE_NOT_IMPLEMENTED); 395 } 396 397 /** 398 * ixgbe_check_link - Get link and speed status 399 * @hw: pointer to hardware structure 400 * 401 * Reads the links register to determine if link is up and the current speed 402 **/ 403 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 404 bool *link_up, bool link_up_wait_to_complete) 405 { 406 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 407 link_up, link_up_wait_to_complete), 408 IXGBE_NOT_IMPLEMENTED); 409 } 410 411 /** 412 * ixgbe_setup_link_speed - Set link speed 413 * @hw: pointer to hardware structure 414 * @speed: new link speed 415 * @autoneg: TRUE if autonegotiation enabled 416 * 417 * Set the link speed and restarts the link. 418 **/ 419 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 420 bool autoneg, 421 bool autoneg_wait_to_complete) 422 { 423 return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed, 424 autoneg, autoneg_wait_to_complete), 425 IXGBE_NOT_IMPLEMENTED); 426 } 427 428 /** 429 * ixgbe_get_link_capabilities - Returns link capabilities 430 * @hw: pointer to hardware structure 431 * 432 * Determines the link capabilities of the current configuration. 433 **/ 434 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 435 bool *autoneg) 436 { 437 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 438 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 439 } 440 441 /** 442 * ixgbe_led_on - Turn on LEDs 443 * @hw: pointer to hardware structure 444 * @index: led number to turn on 445 * 446 * Turns on the software controllable LEDs. 447 **/ 448 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 449 { 450 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 451 IXGBE_NOT_IMPLEMENTED); 452 } 453 454 /** 455 * ixgbe_led_off - Turn off LEDs 456 * @hw: pointer to hardware structure 457 * @index: led number to turn off 458 * 459 * Turns off the software controllable LEDs. 460 **/ 461 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 462 { 463 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 464 IXGBE_NOT_IMPLEMENTED); 465 } 466 467 /** 468 * ixgbe_blink_led_start - Blink LEDs 469 * @hw: pointer to hardware structure 470 * @index: led number to blink 471 * 472 * Blink LED based on index. 473 **/ 474 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 475 { 476 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 477 IXGBE_NOT_IMPLEMENTED); 478 } 479 480 /** 481 * ixgbe_blink_led_stop - Stop blinking LEDs 482 * @hw: pointer to hardware structure 483 * 484 * Stop blinking LED based on index. 485 **/ 486 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 487 { 488 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 489 IXGBE_NOT_IMPLEMENTED); 490 } 491 492 /** 493 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 494 * @hw: pointer to hardware structure 495 * 496 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 497 * ixgbe_hw struct in order to set up EEPROM access. 498 **/ 499 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 500 { 501 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 502 IXGBE_NOT_IMPLEMENTED); 503 } 504 505 506 /** 507 * ixgbe_write_eeprom - Write word to EEPROM 508 * @hw: pointer to hardware structure 509 * @offset: offset within the EEPROM to be written to 510 * @data: 16 bit word to be written to the EEPROM 511 * 512 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 513 * called after this function, the EEPROM will most likely contain an 514 * invalid checksum. 515 **/ 516 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 517 { 518 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 519 IXGBE_NOT_IMPLEMENTED); 520 } 521 522 /** 523 * ixgbe_read_eeprom - Read word from EEPROM 524 * @hw: pointer to hardware structure 525 * @offset: offset within the EEPROM to be read 526 * @data: read 16 bit value from EEPROM 527 * 528 * Reads 16 bit value from EEPROM 529 **/ 530 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 531 { 532 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 533 IXGBE_NOT_IMPLEMENTED); 534 } 535 536 /** 537 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 538 * @hw: pointer to hardware structure 539 * @checksum_val: calculated checksum 540 * 541 * Performs checksum calculation and validates the EEPROM checksum 542 **/ 543 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 544 { 545 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 546 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 547 } 548 549 /** 550 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 551 * @hw: pointer to hardware structure 552 **/ 553 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 554 { 555 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 556 IXGBE_NOT_IMPLEMENTED); 557 } 558 559 /** 560 * ixgbe_set_rar - Set Rx address register 561 * @hw: pointer to hardware structure 562 * @index: Receive address register to write 563 * @addr: Address to put into receive address register 564 * @vmdq: VMDq "set" 565 * @enable_addr: set flag that address is active 566 * 567 * Puts an ethernet address into a receive address register. 568 **/ 569 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 570 u32 enable_addr) 571 { 572 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 573 enable_addr), IXGBE_NOT_IMPLEMENTED); 574 } 575 576 /** 577 * ixgbe_clear_rar - Clear Rx address register 578 * @hw: pointer to hardware structure 579 * @index: Receive address register to write 580 * 581 * Puts an ethernet address into a receive address register. 582 **/ 583 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 584 { 585 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 586 IXGBE_NOT_IMPLEMENTED); 587 } 588 589 /** 590 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 591 * @hw: pointer to hardware structure 592 * @rar: receive address register index to associate with VMDq index 593 * @vmdq: VMDq set or pool index 594 **/ 595 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 596 { 597 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 598 IXGBE_NOT_IMPLEMENTED); 599 } 600 601 /** 602 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 603 * @hw: pointer to hardware structure 604 * @rar: receive address register index to disassociate with VMDq index 605 * @vmdq: VMDq set or pool index 606 **/ 607 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 608 { 609 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 610 IXGBE_NOT_IMPLEMENTED); 611 } 612 613 /** 614 * ixgbe_init_rx_addrs - Initializes receive address filters. 615 * @hw: pointer to hardware structure 616 * 617 * Places the MAC address in receive address register 0 and clears the rest 618 * of the receive address registers. Clears the multicast table. Assumes 619 * the receiver is in reset when the routine is called. 620 **/ 621 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 622 { 623 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 624 IXGBE_NOT_IMPLEMENTED); 625 } 626 627 /** 628 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 629 * @hw: pointer to hardware structure 630 **/ 631 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 632 { 633 return hw->mac.num_rar_entries; 634 } 635 636 /** 637 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 638 * @hw: pointer to hardware structure 639 * @addr_list: the list of new multicast addresses 640 * @addr_count: number of addresses 641 * @func: iterator function to walk the multicast address list 642 * 643 * The given list replaces any existing list. Clears the secondary addrs from 644 * receive address registers. Uses unused receive address registers for the 645 * first secondary addresses, and falls back to promiscuous mode as needed. 646 **/ 647 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 648 u32 addr_count, ixgbe_mc_addr_itr func) 649 { 650 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 651 addr_list, addr_count, func), 652 IXGBE_NOT_IMPLEMENTED); 653 } 654 655 /** 656 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 657 * @hw: pointer to hardware structure 658 * @mc_addr_list: the list of new multicast addresses 659 * @mc_addr_count: number of addresses 660 * @func: iterator function to walk the multicast address list 661 * 662 * The given list replaces any existing list. Clears the MC addrs from receive 663 * address registers and the multicast table. Uses unused receive address 664 * registers for the first multicast addresses, and hashes the rest into the 665 * multicast table. 666 **/ 667 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 668 u32 mc_addr_count, ixgbe_mc_addr_itr func) 669 { 670 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 671 mc_addr_list, mc_addr_count, func), 672 IXGBE_NOT_IMPLEMENTED); 673 } 674 675 /** 676 * ixgbe_enable_mc - Enable multicast address in RAR 677 * @hw: pointer to hardware structure 678 * 679 * Enables multicast address in RAR and the use of the multicast hash table. 680 **/ 681 s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 682 { 683 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 684 IXGBE_NOT_IMPLEMENTED); 685 } 686 687 /** 688 * ixgbe_disable_mc - Disable multicast address in RAR 689 * @hw: pointer to hardware structure 690 * 691 * Disables multicast address in RAR and the use of the multicast hash table. 692 **/ 693 s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 694 { 695 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 696 IXGBE_NOT_IMPLEMENTED); 697 } 698 699 /** 700 * ixgbe_clear_vfta - Clear VLAN filter table 701 * @hw: pointer to hardware structure 702 * 703 * Clears the VLAN filer table, and the VMDq index associated with the filter 704 **/ 705 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 706 { 707 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 708 IXGBE_NOT_IMPLEMENTED); 709 } 710 711 /** 712 * ixgbe_set_vfta - Set VLAN filter table 713 * @hw: pointer to hardware structure 714 * @vlan: VLAN id to write to VLAN filter 715 * @vind: VMDq output index that maps queue to VLAN id in VFTA 716 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 717 * 718 * Turn on/off specified VLAN in the VLAN filter table. 719 **/ 720 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 721 { 722 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 723 vlan_on), IXGBE_NOT_IMPLEMENTED); 724 } 725 726 /** 727 * ixgbe_setup_fc - Set flow control 728 * @hw: pointer to hardware structure 729 * @packetbuf_num: packet buffer number (0-7) 730 * 731 * Configures the flow control settings based on SW configuration. 732 **/ 733 s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num) 734 { 735 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw, packetbuf_num), 736 IXGBE_NOT_IMPLEMENTED); 737 } 738 739 /** 740 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 741 * @hw: pointer to hardware structure 742 * @reg: analog register to read 743 * @val: read value 744 * 745 * Performs write operation to analog register specified. 746 **/ 747 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 748 { 749 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 750 val), IXGBE_NOT_IMPLEMENTED); 751 } 752 753 /** 754 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 755 * @hw: pointer to hardware structure 756 * @reg: analog register to write 757 * @val: value to write 758 * 759 * Performs write operation to Atlas analog register specified. 760 **/ 761 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 762 { 763 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 764 val), IXGBE_NOT_IMPLEMENTED); 765 } 766 767 /** 768 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 769 * @hw: pointer to hardware structure 770 * 771 * Initializes the Unicast Table Arrays to zero on device load. This 772 * is part of the Rx init addr execution path. 773 **/ 774 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 775 { 776 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 777 IXGBE_NOT_IMPLEMENTED); 778 } 779 780 /** 781 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 782 * @hw: pointer to hardware structure 783 * @byte_offset: EEPROM byte offset to read 784 * @eeprom_data: value read 785 * 786 * Performs byte read operation to SFP module's EEPROM over I2C interface. 787 **/ 788 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 789 { 790 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 791 (hw, byte_offset, eeprom_data), 792 IXGBE_NOT_IMPLEMENTED); 793 } 794 795 /** 796 * ixgbe_get_supported_physical_layer - Returns physical layer type 797 * @hw: pointer to hardware structure 798 * 799 * Determines physical layer capabilities of the current configuration. 800 **/ 801 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 802 { 803 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 804 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 805 } 806