1 /****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef _IXGBE_H_ 37 #define _IXGBE_H_ 38 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #ifndef IXGBE_LEGACY_TX 43 #include <sys/buf_ring.h> 44 #endif 45 #include <sys/mbuf.h> 46 #include <sys/protosw.h> 47 #include <sys/socket.h> 48 #include <sys/malloc.h> 49 #include <sys/kernel.h> 50 #include <sys/module.h> 51 #include <sys/sockio.h> 52 #include <sys/eventhandler.h> 53 54 #include <net/if.h> 55 #include <net/if_var.h> 56 #include <net/if_arp.h> 57 #include <net/bpf.h> 58 #include <net/ethernet.h> 59 #include <net/if_dl.h> 60 #include <net/if_media.h> 61 62 #include <net/bpf.h> 63 #include <net/if_types.h> 64 #include <net/if_vlan_var.h> 65 66 #include <netinet/in_systm.h> 67 #include <netinet/in.h> 68 #include <netinet/if_ether.h> 69 #include <netinet/ip.h> 70 #include <netinet/ip6.h> 71 #include <netinet/tcp.h> 72 #include <netinet/tcp_lro.h> 73 #include <netinet/udp.h> 74 75 #include <machine/in_cksum.h> 76 77 #include <sys/bus.h> 78 #include <machine/bus.h> 79 #include <sys/rman.h> 80 #include <machine/resource.h> 81 #include <vm/vm.h> 82 #include <vm/pmap.h> 83 #include <machine/clock.h> 84 #include <dev/pci/pcivar.h> 85 #include <dev/pci/pcireg.h> 86 #include <sys/proc.h> 87 #include <sys/sysctl.h> 88 #include <sys/endian.h> 89 #include <sys/taskqueue.h> 90 #include <sys/pcpu.h> 91 #include <sys/smp.h> 92 #include <machine/smp.h> 93 #include <sys/sbuf.h> 94 95 #include "ixgbe_api.h" 96 #include "ixgbe_common.h" 97 #include "ixgbe_phy.h" 98 #include "ixgbe_vf.h" 99 100 /* Tunables */ 101 102 /* 103 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 104 * number of transmit descriptors allocated by the driver. Increasing this 105 * value allows the driver to queue more transmits. Each descriptor is 16 106 * bytes. Performance tests have show the 2K value to be optimal for top 107 * performance. 108 */ 109 #define DEFAULT_TXD 1024 110 #define PERFORM_TXD 2048 111 #define MAX_TXD 4096 112 #define MIN_TXD 64 113 114 /* 115 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 116 * number of receive descriptors allocated for each RX queue. Increasing this 117 * value allows the driver to buffer more incoming packets. Each descriptor 118 * is 16 bytes. A receive buffer is also allocated for each descriptor. 119 * 120 * Note: with 8 rings and a dual port card, it is possible to bump up 121 * against the system mbuf pool limit, you can tune nmbclusters 122 * to adjust for this. 123 */ 124 #define DEFAULT_RXD 1024 125 #define PERFORM_RXD 2048 126 #define MAX_RXD 4096 127 #define MIN_RXD 64 128 129 /* Alignment for rings */ 130 #define DBA_ALIGN 128 131 132 /* 133 * This parameter controls the maximum no of times the driver will loop in 134 * the isr. Minimum Value = 1 135 */ 136 #define MAX_LOOP 10 137 138 /* 139 * This is the max watchdog interval, ie. the time that can 140 * pass between any two TX clean operations, such only happening 141 * when the TX hardware is functioning. 142 */ 143 #define IXGBE_WATCHDOG (10 * hz) 144 145 /* 146 * This parameters control when the driver calls the routine to reclaim 147 * transmit descriptors. 148 */ 149 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 150 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 151 152 /* These defines are used in MTU calculations */ 153 #define IXGBE_MAX_FRAME_SIZE 9728 154 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN + \ 155 ETHER_VLAN_ENCAP_LEN) 156 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR) 157 158 /* Flow control constants */ 159 #define IXGBE_FC_PAUSE 0xFFFF 160 #define IXGBE_FC_HI 0x20000 161 #define IXGBE_FC_LO 0x10000 162 163 /* 164 * Used for optimizing small rx mbufs. Effort is made to keep the copy 165 * small and aligned for the CPU L1 cache. 166 * 167 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 168 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 169 * wasted. Getting 64 byte alignment, which _should_ be ideal for 170 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 171 * in observed efficiency of the optimization, 97.9% -> 81.8%. 172 */ 173 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 174 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 175 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 176 177 /* Keep older OS drivers building... */ 178 #if !defined(SYSCTL_ADD_UQUAD) 179 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 180 #endif 181 182 /* Defines for printing debug information */ 183 #define DEBUG_INIT 0 184 #define DEBUG_IOCTL 0 185 #define DEBUG_HW 0 186 187 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 188 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 189 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 190 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 191 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 192 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 193 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 194 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 195 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 196 197 #define MAX_NUM_MULTICAST_ADDRESSES 128 198 #define IXGBE_82598_SCATTER 100 199 #define IXGBE_82599_SCATTER 32 200 #define MSIX_82598_BAR 3 201 #define MSIX_82599_BAR 4 202 #define IXGBE_TSO_SIZE 262140 203 #define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 204 #define IXGBE_RX_HDR 128 205 #define IXGBE_VFTA_SIZE 128 206 #define IXGBE_BR_SIZE 4096 207 #define IXGBE_QUEUE_MIN_FREE 32 208 #define IXGBE_MAX_TX_BUSY 10 209 #define IXGBE_QUEUE_HUNG 0x80000000 210 211 #define IXV_EITR_DEFAULT 128 212 213 /* Offload bits in mbuf flag */ 214 #if __FreeBSD_version >= 800000 215 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 216 #else 217 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 218 #endif 219 220 /* Backward compatibility items for very old versions */ 221 #ifndef pci_find_cap 222 #define pci_find_cap pci_find_extcap 223 #endif 224 225 #ifndef DEVMETHOD_END 226 #define DEVMETHOD_END { NULL, NULL } 227 #endif 228 229 /* 230 * Interrupt Moderation parameters 231 */ 232 #define IXGBE_LOW_LATENCY 128 233 #define IXGBE_AVE_LATENCY 400 234 #define IXGBE_BULK_LATENCY 1200 235 #define IXGBE_LINK_ITR 2000 236 237 /* MAC type macros */ 238 #define IXGBE_IS_X550VF(_adapter) \ 239 ((_adapter->hw.mac.type == ixgbe_mac_X550_vf) || \ 240 (_adapter->hw.mac.type == ixgbe_mac_X550EM_x_vf)) 241 242 #define IXGBE_IS_VF(_adapter) \ 243 (IXGBE_IS_X550VF(_adapter) || \ 244 (_adapter->hw.mac.type == ixgbe_mac_X540_vf) || \ 245 (_adapter->hw.mac.type == ixgbe_mac_82599_vf)) 246 247 248 /* 249 ***************************************************************************** 250 * vendor_info_array 251 * 252 * This array contains the list of Subvendor/Subdevice IDs on which the driver 253 * should load. 254 * 255 ***************************************************************************** 256 */ 257 typedef struct _ixgbe_vendor_info_t { 258 unsigned int vendor_id; 259 unsigned int device_id; 260 unsigned int subvendor_id; 261 unsigned int subdevice_id; 262 unsigned int index; 263 } ixgbe_vendor_info_t; 264 265 struct ixgbe_tx_buf { 266 union ixgbe_adv_tx_desc *eop; 267 struct mbuf *m_head; 268 bus_dmamap_t map; 269 }; 270 271 struct ixgbe_rx_buf { 272 struct mbuf *buf; 273 struct mbuf *fmp; 274 bus_dmamap_t pmap; 275 u_int flags; 276 #define IXGBE_RX_COPY 0x01 277 uint64_t addr; 278 }; 279 280 /* 281 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 282 */ 283 struct ixgbe_dma_alloc { 284 bus_addr_t dma_paddr; 285 caddr_t dma_vaddr; 286 bus_dma_tag_t dma_tag; 287 bus_dmamap_t dma_map; 288 bus_dma_segment_t dma_seg; 289 bus_size_t dma_size; 290 int dma_nseg; 291 }; 292 293 /* 294 ** Driver queue struct: this is the interrupt container 295 ** for the associated tx and rx ring. 296 */ 297 struct ix_queue { 298 struct adapter *adapter; 299 u32 msix; /* This queue's MSIX vector */ 300 u32 eims; /* This queue's EIMS bit */ 301 u32 eitr_setting; 302 u32 me; 303 struct resource *res; 304 void *tag; 305 int busy; 306 struct tx_ring *txr; 307 struct rx_ring *rxr; 308 struct task que_task; 309 struct taskqueue *tq; 310 u64 irqs; 311 }; 312 313 /* 314 * The transmit ring, one per queue 315 */ 316 struct tx_ring { 317 struct adapter *adapter; 318 struct mtx tx_mtx; 319 u32 me; 320 u32 tail; 321 int busy; 322 union ixgbe_adv_tx_desc *tx_base; 323 struct ixgbe_tx_buf *tx_buffers; 324 struct ixgbe_dma_alloc txdma; 325 volatile u16 tx_avail; 326 u16 next_avail_desc; 327 u16 next_to_clean; 328 u16 process_limit; 329 u16 num_desc; 330 u32 txd_cmd; 331 bus_dma_tag_t txtag; 332 char mtx_name[16]; 333 #ifndef IXGBE_LEGACY_TX 334 struct buf_ring *br; 335 struct task txq_task; 336 #endif 337 #ifdef IXGBE_FDIR 338 u16 atr_sample; 339 u16 atr_count; 340 #endif 341 u32 bytes; /* used for AIM */ 342 u32 packets; 343 /* Soft Stats */ 344 unsigned long tso_tx; 345 unsigned long no_tx_map_avail; 346 unsigned long no_tx_dma_setup; 347 u64 no_desc_avail; 348 u64 total_packets; 349 }; 350 351 352 /* 353 * The Receive ring, one per rx queue 354 */ 355 struct rx_ring { 356 struct adapter *adapter; 357 struct mtx rx_mtx; 358 u32 me; 359 u32 tail; 360 union ixgbe_adv_rx_desc *rx_base; 361 struct ixgbe_dma_alloc rxdma; 362 struct lro_ctrl lro; 363 bool lro_enabled; 364 bool hw_rsc; 365 bool vtag_strip; 366 u16 next_to_refresh; 367 u16 next_to_check; 368 u16 num_desc; 369 u16 mbuf_sz; 370 u16 process_limit; 371 char mtx_name[16]; 372 struct ixgbe_rx_buf *rx_buffers; 373 bus_dma_tag_t ptag; 374 375 u32 bytes; /* Used for AIM calc */ 376 u32 packets; 377 378 /* Soft stats */ 379 u64 rx_irq; 380 u64 rx_copies; 381 u64 rx_packets; 382 u64 rx_bytes; 383 u64 rx_discarded; 384 u64 rsc_num; 385 #ifdef IXGBE_FDIR 386 u64 flm; 387 #endif 388 }; 389 390 /* Our adapter structure */ 391 struct adapter { 392 struct ifnet *ifp; 393 struct ixgbe_hw hw; 394 395 struct ixgbe_osdep osdep; 396 struct device *dev; 397 398 struct resource *pci_mem; 399 struct resource *msix_mem; 400 401 /* 402 * Interrupt resources: this set is 403 * either used for legacy, or for Link 404 * when doing MSIX 405 */ 406 void *tag; 407 struct resource *res; 408 409 struct ifmedia media; 410 struct callout timer; 411 int msix; 412 int if_flags; 413 414 struct mtx core_mtx; 415 416 eventhandler_tag vlan_attach; 417 eventhandler_tag vlan_detach; 418 419 u16 num_vlans; 420 u16 num_queues; 421 422 /* 423 ** Shadow VFTA table, this is needed because 424 ** the real vlan filter table gets cleared during 425 ** a soft reset and the driver needs to be able 426 ** to repopulate it. 427 */ 428 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 429 430 /* Info about the interface */ 431 u32 optics; 432 u32 fc; /* local flow ctrl setting */ 433 int advertise; /* link speeds */ 434 bool link_active; 435 u16 max_frame_size; 436 u16 num_segs; 437 u32 link_speed; 438 bool link_up; 439 u32 vector; 440 u16 dmac; 441 bool eee_support; 442 bool eee_enabled; 443 444 /* Power management-related */ 445 bool wol_support; 446 u32 wufc; 447 448 /* Mbuf cluster size */ 449 u32 rx_mbuf_sz; 450 451 /* Support for pluggable optics */ 452 bool sfp_probe; 453 struct task link_task; /* Link tasklet */ 454 struct task mod_task; /* SFP tasklet */ 455 struct task msf_task; /* Multispeed Fiber */ 456 #ifdef IXGBE_FDIR 457 int fdir_reinit; 458 struct task fdir_task; 459 #endif 460 struct task phy_task; /* PHY intr tasklet */ 461 struct taskqueue *tq; 462 463 /* 464 ** Queues: 465 ** This is the irq holder, it has 466 ** and RX/TX pair or rings associated 467 ** with it. 468 */ 469 struct ix_queue *queues; 470 471 /* 472 * Transmit rings: 473 * Allocated at run time, an array of rings. 474 */ 475 struct tx_ring *tx_rings; 476 u32 num_tx_desc; 477 478 /* 479 * Receive rings: 480 * Allocated at run time, an array of rings. 481 */ 482 struct rx_ring *rx_rings; 483 u64 active_queues; 484 u32 num_rx_desc; 485 486 /* Multicast array memory */ 487 u8 *mta; 488 489 490 /* Misc stats maintained by the driver */ 491 unsigned long dropped_pkts; 492 unsigned long mbuf_defrag_failed; 493 unsigned long mbuf_header_failed; 494 unsigned long mbuf_packet_failed; 495 unsigned long watchdog_events; 496 unsigned long link_irq; 497 union { 498 struct ixgbe_hw_stats pf; 499 struct ixgbevf_hw_stats vf; 500 } stats; 501 #if __FreeBSD_version >= 1100036 502 /* counter(9) stats */ 503 u64 ipackets; 504 u64 ierrors; 505 u64 opackets; 506 u64 oerrors; 507 u64 ibytes; 508 u64 obytes; 509 u64 imcasts; 510 u64 omcasts; 511 u64 iqdrops; 512 u64 noproto; 513 #endif 514 }; 515 516 517 /* Precision Time Sync (IEEE 1588) defines */ 518 #define ETHERTYPE_IEEE1588 0x88F7 519 #define PICOSECS_PER_TICK 20833 520 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 521 #define IXGBE_ADVTXD_TSTAMP 0x00080000 522 523 524 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 525 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 526 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 527 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 528 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 529 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 530 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 531 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 532 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 533 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 534 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 535 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 536 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 537 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 538 539 /* For backward compatibility */ 540 #if !defined(PCIER_LINK_STA) 541 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA 542 #endif 543 544 /* Stats macros */ 545 #if __FreeBSD_version >= 1100036 546 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 547 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 548 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 549 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 550 #define IXGBE_SET_COLLISIONS(sc, count) 551 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 552 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 553 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 554 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 555 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 556 #else 557 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count) 558 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count) 559 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count) 560 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count) 561 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count) 562 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count) 563 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count) 564 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count) 565 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count) 566 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count) 567 #endif 568 569 /* External PHY register addresses */ 570 #define IXGBE_PHY_CURRENT_TEMP 0xC820 571 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830 572 573 /* Sysctl help messages; displayed with sysctl -d */ 574 #define IXGBE_SYSCTL_DESC_ADV_SPEED \ 575 "\nControl advertised link speed using these flags:\n" \ 576 "\t0x1 - advertise 100M\n" \ 577 "\t0x2 - advertise 1G\n" \ 578 "\t0x4 - advertise 10G\n\n" \ 579 "\t100M is only supported on certain 10GBaseT adapters.\n" 580 581 #define IXGBE_SYSCTL_DESC_SET_FC \ 582 "\nSet flow control mode using these values:\n" \ 583 "\t0 - off\n" \ 584 "\t1 - rx pause\n" \ 585 "\t2 - tx pause\n" \ 586 "\t3 - tx and rx pause" 587 588 static inline bool 589 ixgbe_is_sfp(struct ixgbe_hw *hw) 590 { 591 switch (hw->phy.type) { 592 case ixgbe_phy_sfp_avago: 593 case ixgbe_phy_sfp_ftl: 594 case ixgbe_phy_sfp_intel: 595 case ixgbe_phy_sfp_unknown: 596 case ixgbe_phy_sfp_passive_tyco: 597 case ixgbe_phy_sfp_passive_unknown: 598 case ixgbe_phy_qsfp_passive_unknown: 599 case ixgbe_phy_qsfp_active_unknown: 600 case ixgbe_phy_qsfp_intel: 601 case ixgbe_phy_qsfp_unknown: 602 return TRUE; 603 default: 604 return FALSE; 605 } 606 } 607 608 /* Workaround to make 8.0 buildable */ 609 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 610 static __inline int 611 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 612 { 613 #ifdef ALTQ 614 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 615 return (1); 616 #endif 617 return (!buf_ring_empty(br)); 618 } 619 #endif 620 621 /* 622 ** Find the number of unrefreshed RX descriptors 623 */ 624 static inline u16 625 ixgbe_rx_unrefreshed(struct rx_ring *rxr) 626 { 627 if (rxr->next_to_check > rxr->next_to_refresh) 628 return (rxr->next_to_check - rxr->next_to_refresh - 1); 629 else 630 return ((rxr->num_desc + rxr->next_to_check) - 631 rxr->next_to_refresh - 1); 632 } 633 634 /* 635 ** This checks for a zero mac addr, something that will be likely 636 ** unless the Admin on the Host has created one. 637 */ 638 static inline bool 639 ixv_check_ether_addr(u8 *addr) 640 { 641 bool status = TRUE; 642 643 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 644 addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 645 status = FALSE; 646 return (status); 647 } 648 649 /* Shared Prototypes */ 650 651 #ifdef IXGBE_LEGACY_TX 652 void ixgbe_start(struct ifnet *); 653 void ixgbe_start_locked(struct tx_ring *, struct ifnet *); 654 #else /* ! IXGBE_LEGACY_TX */ 655 int ixgbe_mq_start(struct ifnet *, struct mbuf *); 656 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *); 657 void ixgbe_qflush(struct ifnet *); 658 void ixgbe_deferred_mq_start(void *, int); 659 #endif /* IXGBE_LEGACY_TX */ 660 661 int ixgbe_allocate_queues(struct adapter *); 662 int ixgbe_allocate_transmit_buffers(struct tx_ring *); 663 int ixgbe_setup_transmit_structures(struct adapter *); 664 void ixgbe_free_transmit_structures(struct adapter *); 665 int ixgbe_allocate_receive_buffers(struct rx_ring *); 666 int ixgbe_setup_receive_structures(struct adapter *); 667 void ixgbe_free_receive_structures(struct adapter *); 668 void ixgbe_txeof(struct tx_ring *); 669 bool ixgbe_rxeof(struct ix_queue *); 670 671 int ixgbe_dma_malloc(struct adapter *, 672 bus_size_t, struct ixgbe_dma_alloc *, int); 673 void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *); 674 #endif /* _IXGBE_H_ */ 675