1 /***************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2017, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 *****************************************************************************/ 34 35 #ifndef _IXGBE_H_ 36 #define _IXGBE_H_ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/buf_ring.h> 41 #include <sys/mbuf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/module.h> 47 #include <sys/sockio.h> 48 #include <sys/eventhandler.h> 49 #include <sys/priv.h> 50 51 #include <net/if.h> 52 #include <net/if_var.h> 53 #include <net/if_arp.h> 54 #include <net/bpf.h> 55 #include <net/ethernet.h> 56 #include <net/if_dl.h> 57 #include <net/if_media.h> 58 59 #include <net/if_types.h> 60 #include <net/if_vlan_var.h> 61 #include <net/iflib.h> 62 63 #include <netinet/in_systm.h> 64 #include <netinet/in.h> 65 #include <netinet/if_ether.h> 66 67 #include <sys/bus.h> 68 #include <machine/bus.h> 69 #include <sys/rman.h> 70 #include <machine/resource.h> 71 #include <vm/vm.h> 72 #include <vm/pmap.h> 73 #include <machine/clock.h> 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <sys/proc.h> 77 #include <sys/sysctl.h> 78 #include <sys/endian.h> 79 #include <sys/gtaskqueue.h> 80 #include <sys/pcpu.h> 81 #include <sys/smp.h> 82 #include <machine/smp.h> 83 #include <sys/sbuf.h> 84 85 #include "ixgbe_api.h" 86 #include "ixgbe_common.h" 87 #include "ixgbe_phy.h" 88 #include "ixgbe_vf.h" 89 #include "ixgbe_features.h" 90 #include "ixgbe_e610.h" 91 92 /* Tunables */ 93 94 /* 95 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 96 * number of transmit descriptors allocated by the driver. Increasing this 97 * value allows the driver to queue more transmits. Each descriptor is 16 98 * bytes. Performance tests have show the 2K value to be optimal for top 99 * performance. 100 */ 101 #define DEFAULT_TXD 2048 102 #define PERFORM_TXD 2048 103 #define MAX_TXD 4096 104 #define MIN_TXD 64 105 106 /* 107 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 108 * number of receive descriptors allocated for each RX queue. Increasing this 109 * value allows the driver to buffer more incoming packets. Each descriptor 110 * is 16 bytes. A receive buffer is also allocated for each descriptor. 111 * 112 * Note: with 8 rings and a dual port card, it is possible to bump up 113 * against the system mbuf pool limit, you can tune nmbclusters 114 * to adjust for this. 115 */ 116 #define DEFAULT_RXD 2048 117 #define PERFORM_RXD 2048 118 #define MAX_RXD 4096 119 #define MIN_RXD 64 120 121 /* Alignment for rings */ 122 #define DBA_ALIGN 128 123 124 /* 125 * iflib uses the RS bit to select the descriptors whose status it polls. 126 * Keep WTHRESH zero so the hardware honors RS, and retain the driver's 127 * established descriptor-prefetch settings. 128 */ 129 #define IXGBE_TXDCTL_THRESH_MASK 0x007f7f7f 130 #define IXGBE_TXDCTL_THRESH_DEFAULT ((32 << 0) | (1 << 8)) 131 132 /* 133 * This is the max watchdog interval, ie. the time that can 134 * pass between any two TX clean operations, such only happening 135 * when the TX hardware is functioning. 136 */ 137 #define IXGBE_WATCHDOG (10 * hz) 138 139 /* 140 * This parameters control when the driver calls the routine to reclaim 141 * transmit descriptors. 142 */ 143 #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8) 144 #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32) 145 146 /* These defines are used in MTU calculations */ 147 #define IXGBE_MAX_FRAME_SIZE 9728 148 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN) 149 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \ 150 ETHER_VLAN_ENCAP_LEN) 151 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR) 152 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN) 153 154 /* Flow control constants */ 155 #define IXGBE_FC_PAUSE 0xFFFF 156 #define IXGBE_FC_HI 0x20000 157 #define IXGBE_FC_LO 0x10000 158 159 /* 160 * Used for optimizing small rx mbufs. Effort is made to keep the copy 161 * small and aligned for the CPU L1 cache. 162 * 163 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 164 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 165 * wasted. Getting 64 byte alignment, which _should_ be ideal for 166 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 167 * in observed efficiency of the optimization, 97.9% -> 81.8%. 168 */ 169 #define IXGBE_MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr)) 170 171 #define IXGBE_RX_COPY_HDR_PADDED ((((IXGBE_MPKTHSIZE - 1) / 32) + 1) * 32) 172 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 173 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - IXGBE_MPKTHSIZE) 174 175 /* Defines for printing debug information */ 176 #define DEBUG_INIT 0 177 #define DEBUG_IOCTL 0 178 #define DEBUG_HW 0 179 180 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 181 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 182 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 183 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 184 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 185 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 186 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 187 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 188 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 189 190 #define MAX_NUM_MULTICAST_ADDRESSES 128 191 #define IXGBE_82598_SCATTER 100 192 #define IXGBE_82599_SCATTER 32 193 #define IXGBE_TSO_SIZE 262140 194 #define IXGBE_RX_HDR 128 195 #define IXGBE_VFTA_SIZE 128 196 #define IXGBE_BR_SIZE 4096 197 #define IXGBE_QUEUE_MIN_FREE 32 198 #define IXGBE_MAX_TX_BUSY 10 199 #define IXGBE_QUEUE_HUNG 0x80000000 200 201 #define IXGBE_EITR_DEFAULT 128 202 203 /* Supported offload bits in mbuf flag */ 204 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \ 205 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \ 206 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP) 207 208 /* All BASE-T Physical layers */ 209 #define IXGBE_PHYSICAL_LAYERS_BASE_T_ALL \ 210 (IXGBE_PHYSICAL_LAYER_10GBASE_T |\ 211 IXGBE_PHYSICAL_LAYER_5000BASE_T |\ 212 IXGBE_PHYSICAL_LAYER_2500BASE_T |\ 213 IXGBE_PHYSICAL_LAYER_1000BASE_T |\ 214 IXGBE_PHYSICAL_LAYER_100BASE_TX |\ 215 IXGBE_PHYSICAL_LAYER_10BASE_T) 216 217 #define IXGBE_CAPS (IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_TSO | \ 218 IFCAP_LRO | IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO | \ 219 IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU | IFCAP_VLAN_MTU | \ 220 IFCAP_VLAN_HWFILTER | IFCAP_WOL) 221 222 #ifndef DEVMETHOD_END 223 #define DEVMETHOD_END { NULL, NULL } 224 #endif 225 226 /* 227 * Interrupt Moderation parameters 228 */ 229 #define IXGBE_LOW_LATENCY 128 230 #define IXGBE_AVE_LATENCY 400 231 #define IXGBE_BULK_LATENCY 1200 232 233 /* Using 1FF (the max value), the interval is ~1.05ms */ 234 #define IXGBE_LINK_ITR_QUANTA 0x1FF 235 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \ 236 IXGBE_EITR_ITR_INT_MASK) 237 238 239 /************************************************************************ 240 * vendor_info_array 241 * 242 * Contains the list of Subvendor/Subdevice IDs on 243 * which the driver should load. 244 ************************************************************************/ 245 typedef struct _ixgbe_vendor_info_t { 246 unsigned int vendor_id; 247 unsigned int device_id; 248 unsigned int subvendor_id; 249 unsigned int subdevice_id; 250 unsigned int index; 251 } ixgbe_vendor_info_t; 252 253 struct ixgbe_bp_data { 254 u32 low; 255 u32 high; 256 u32 log; 257 }; 258 259 260 /* 261 */ 262 struct ixgbe_dma_alloc { 263 bus_addr_t dma_paddr; 264 caddr_t dma_vaddr; 265 bus_dma_tag_t dma_tag; 266 bus_dmamap_t dma_map; 267 bus_dma_segment_t dma_seg; 268 bus_size_t dma_size; 269 int dma_nseg; 270 }; 271 272 struct ixgbe_mc_addr { 273 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 274 u32 vmdq; 275 }; 276 277 /* 278 * The transmit ring, one per queue 279 */ 280 struct tx_ring { 281 struct ixgbe_softc *sc; 282 union ixgbe_adv_tx_desc *tx_base; 283 uint64_t tx_paddr; 284 u32 tail; 285 qidx_t *tx_rsq; 286 qidx_t tx_rs_cidx; 287 qidx_t tx_rs_pidx; 288 qidx_t tx_cidx_processed; 289 uint8_t me; 290 291 /* Flow Director */ 292 u16 atr_sample; 293 u16 atr_count; 294 295 u32 bytes; /* used for AIM */ 296 u32 packets; 297 /* Soft Stats */ 298 u64 tso_tx; 299 u64 total_packets; 300 }; 301 302 303 /* 304 * The Receive ring, one per rx queue 305 */ 306 struct rx_ring { 307 struct ix_rx_queue *que; 308 struct ixgbe_softc *sc; 309 u32 me; 310 u32 tail; 311 union ixgbe_adv_rx_desc *rx_base; 312 bool hw_rsc; 313 bool vtag_strip; 314 uint64_t rx_paddr; 315 bus_dma_tag_t ptag; 316 317 u32 bytes; /* Used for AIM calc */ 318 u32 packets; 319 320 /* Soft stats */ 321 u64 rx_irq; 322 u64 rx_copies; 323 u64 rx_packets; 324 u64 rx_bytes; 325 u64 rx_discarded; 326 u64 rsc_num; 327 328 /* Flow Director */ 329 u64 flm; 330 }; 331 332 /* 333 * Driver queue struct: this is the interrupt container 334 * for the associated tx and rx ring. 335 */ 336 struct ix_rx_queue { 337 struct ixgbe_softc *sc; 338 u32 msix; /* This queue's MSIX vector */ 339 u32 eitr_setting; 340 struct resource *res; 341 void *tag; 342 int busy; 343 struct rx_ring rxr; 344 struct if_irq que_irq; 345 u64 irqs; 346 }; 347 348 struct ix_tx_queue { 349 struct ixgbe_softc *sc; 350 u32 msix; /* This queue's MSIX vector */ 351 struct tx_ring txr; 352 }; 353 354 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ 355 356 struct ixgbe_vf_mac_filter { 357 uint16_t rar_index; 358 uint16_t pool; 359 bool active; 360 uint8_t mac[ETHER_ADDR_LEN]; 361 }; 362 363 struct ixgbe_vf { 364 u_int pool; 365 u_int rar_index; 366 u_int maximum_frame_size; 367 uint32_t flags; 368 struct timeval last_mdd_log; 369 struct timeval last_dma_abort_log; 370 uint8_t ether_addr[ETHER_ADDR_LEN]; 371 uint16_t mc_hash[IXGBE_MAX_VF_MC]; 372 uint32_t vlans[IXGBE_VFTA_SIZE]; 373 uint16_t num_mc_hashes; 374 uint16_t num_mac_filters; 375 uint16_t num_vlans; 376 uint16_t default_vlan; 377 uint16_t api_ver; 378 uint16_t pci_saved_command; 379 uint32_t recovery_tx_head[IXGBE_VF_MAX_TX_QUEUES]; 380 uint8_t xcast_mode; 381 uint8_t primary_abort_count; 382 uint8_t recovery_tx_pending; 383 sbintime_t mbx_cleanup_deadline; 384 }; 385 386 /* Our softc structure */ 387 struct ixgbe_softc { 388 struct ixgbe_hw hw; 389 struct ixgbe_osdep osdep; 390 if_ctx_t ctx; 391 if_softc_ctx_t shared; 392 #define num_tx_queues shared->isc_ntxqsets 393 #define num_rx_queues shared->isc_nrxqsets 394 #define max_frame_size shared->isc_max_frame_size 395 #define intr_type shared->isc_intr 396 397 device_t dev; 398 struct ifnet *ifp; 399 400 struct resource *pci_mem; 401 402 /* 403 * Interrupt resources: this set is 404 * either used for legacy, or for Link 405 * when doing MSI-X 406 */ 407 struct if_irq irq; 408 void *tag; 409 struct resource *res; 410 411 struct ifmedia *media; 412 int if_flags; 413 int msix; 414 415 u16 num_vlans; 416 417 /* 418 * Shadow VFTA table, this is needed because 419 * the real vlan filter table gets cleared during 420 * a soft reset and the driver needs to be able 421 * to repopulate it. 422 */ 423 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 424 u32 vf_vfta_retry[IXGBE_VFTA_SIZE]; 425 sbintime_t vf_vlan_retry_deadline; 426 struct callout vf_mbx_retry; 427 struct timeval vf_mbx_last_log; 428 u32 vf_mbx_ready; 429 u32 vf_mbx_retry_pending; 430 u32 vf_vlan_retry_tick; 431 u16 vf_vlan_retry_cursor; 432 u8 vf_mbx_retry_stage; 433 bool vf_mbx_retry_initialized; 434 bool vf_mcast_overflow_warned; 435 436 /* Info about the interface */ 437 int advertise; /* link speeds */ 438 int enable_aim; /* adaptive interrupt moderation */ 439 bool link_active; 440 u16 num_segs; 441 u32 link_speed; 442 bool link_up; 443 bool link_enabled; 444 bool led_active; 445 u32 vector; 446 u16 dmac; 447 u32 phy_layer; 448 u32 ledctl_default; 449 450 /* Power management-related */ 451 bool wol_support; 452 u32 wufc; 453 454 /* Mbuf cluster size */ 455 u32 rx_mbuf_sz; 456 457 /* Support for pluggable optics */ 458 bool sfp_probe; 459 460 /* Flow Director */ 461 int fdir_reinit; 462 u_int ecc_reset_pending; 463 464 u32 task_requests; 465 466 /* 467 * Queues: 468 * This is the irq holder, it has 469 * and RX/TX pair or rings associated 470 * with it. 471 */ 472 struct ix_tx_queue *tx_queues; 473 struct ix_rx_queue *rx_queues; 474 475 /* Multicast array memory */ 476 struct ixgbe_mc_addr *mta; 477 478 /* SR-IOV */ 479 int iov_mode; 480 int num_vfs; 481 int pool; 482 struct ixgbe_vf *vfs; 483 struct ixgbe_vf_mac_filter *vf_mac_filters; 484 int num_vf_mac_filters; 485 bool iov_mta_valid; 486 bool iov_vfta_valid; 487 bool iov_vlan_promisc; 488 bool iov_mbx_cleanup_pending; 489 bool iov_pf_mdd_reset_pending; 490 struct timeval iov_last_mdd_log; 491 struct task iov_recovery_task; 492 sbintime_t iov_recovery_time; 493 bool iov_recovery_stop; 494 uint8_t iov_recovery_cursor; 495 uint64_t iov_dma_abort_events; 496 uint64_t iov_dma_abort_flr_failures; 497 uint64_t iov_dma_abort_quarantines; 498 uint64_t iov_quarantined_vfs; 499 500 /* Bypass */ 501 struct ixgbe_bp_data bypass; 502 503 /* Firmware error check */ 504 int recovery_mode; 505 bool overtemp_shutdown_pending; 506 struct callout fw_mode_timer; 507 508 /* Misc stats maintained by the driver */ 509 unsigned long dropped_pkts; 510 unsigned long mbuf_header_failed; 511 unsigned long mbuf_packet_failed; 512 unsigned long link_irq; 513 union { 514 struct ixgbe_hw_stats pf; 515 struct ixgbevf_hw_stats vf; 516 } stats; 517 518 /* counter(9) stats */ 519 u64 ipackets; 520 u64 ierrors; 521 u64 opackets; 522 u64 oerrors; 523 u64 ibytes; 524 u64 obytes; 525 u64 imcasts; 526 u64 omcasts; 527 u64 iqdrops; 528 u64 noproto; 529 530 /* Feature capable/enabled flags. See ixgbe_features.h */ 531 u32 feat_cap; 532 u32 feat_en; 533 u16 lse_mask; 534 535 struct sysctl_oid *debug_sysctls; 536 u32 debug_dump_cluster_mask; 537 bool do_debug_dump; 538 }; 539 540 struct ixgbe_debug_dump_cmd { 541 u32 offset; /* offset to read/write from table, in bytes */ 542 u8 cluster_id; /* also used to get next cluster id */ 543 u16 table_id; 544 u16 data_size; /* size of data field, in bytes */ 545 u16 reserved1; 546 u32 reserved2; 547 u8 data[]; 548 }; 549 550 /* Precision Time Sync (IEEE 1588) defines */ 551 #define ETHERTYPE_IEEE1588 0x88F7 552 #define PICOSECS_PER_TICK 20833 553 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 554 #define IXGBE_ADVTXD_TSTAMP 0x00080000 555 556 /* Stats macros */ 557 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 558 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 559 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 560 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 561 #define IXGBE_SET_COLLISIONS(sc, count) 562 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 563 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 564 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 565 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 566 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 567 568 /* External PHY register addresses */ 569 #define IXGBE_PHY_CURRENT_TEMP 0xC820 570 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830 571 572 /** 573 * The ioctl command number used by NVM update for accessing the driver for 574 * NVM access commands. 575 */ 576 #define IXGBE_NVM_ACCESS \ 577 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5) 578 579 /* 580 * The ioctl command number used by a userspace tool for accessing the driver 581 * for getting debug dump data from the firmware. 582 */ 583 #define IXGBE_DEBUG_DUMP \ 584 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6) 585 586 /* Debug Dump related definitions */ 587 #define IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID 0xFFFFFF 588 #define IXGBE_ACI_DBG_DUMP_CLUSTER_ID_BASE 50 589 #define IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX 1 590 591 #define IXGBE_DBG_DUMP_VALID_CLUSTERS_MASK 0x3 592 #define IXGBE_DBG_DUMP_BASE_SIZE (2 * 1024 * 1024) 593 594 #define IXGBE_SYSCTL_DESC_DEBUG_DUMP_SET_CLUSTER \ 595 "\nSelect clusters to dump with \"dump\" sysctl" \ 596 "\nFlags:" \ 597 "\n\t 0x1 - Link" \ 598 "\n\t 0x2 - Full CSR Space, excluding RCW registers" \ 599 "\n\t" \ 600 "\nUse \"sysctl -x\" to view flags properly." 601 602 #define IXGBE_SYSCTL_DESC_DUMP_DEBUG_DUMP \ 603 "\nWrite 1 to output a FW debug dump containing the clusters " \ 604 "specified by the \"clusters\" sysctl" \ 605 "\nThe \"-b\" flag must be used in order to dump this data " \ 606 "as binary data because" \ 607 "\nthis data is opaque and not a string." 608 609 /* Sysctl help messages; displayed with sysctl -d */ 610 #define IXGBE_SYSCTL_DESC_ADV_SPEED \ 611 "\nControl advertised link speed using these flags:\n" \ 612 "\t0x1 - advertise 100M\n" \ 613 "\t0x2 - advertise 1G\n" \ 614 "\t0x4 - advertise 10G\n" \ 615 "\t0x8 - advertise 10M\n\n" \ 616 "\t0x10 - advertise 2.5G\n" \ 617 "\t0x20 - advertise 5G\n\n" \ 618 "\t100M and 10M are only supported on certain adapters.\n" 619 620 #define IXGBE_SYSCTL_DESC_SET_FC \ 621 "\nSet flow control mode using these values:\n" \ 622 "\t0 - off\n" \ 623 "\t1 - rx pause\n" \ 624 "\t2 - tx pause\n" \ 625 "\t3 - tx and rx pause" 626 627 #define IXGBE_SYSCTL_DESC_RX_ERRS \ 628 "\nSum of the following RX errors counters:\n" \ 629 " * CRC errors,\n" \ 630 " * illegal byte error count,\n" \ 631 " * missed packet count,\n" \ 632 " * length error count,\n" \ 633 " * undersized packets count,\n" \ 634 " * fragmented packets count,\n" \ 635 " * oversized packets count,\n" \ 636 " * jabber count." 637 638 /* 639 * This checks for a zero mac addr, something that will be likely 640 * unless the Admin on the Host has created one. 641 */ 642 static inline bool 643 ixv_check_ether_addr(u8 *addr) 644 { 645 bool status = true; 646 647 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 648 addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 649 status = false; 650 651 return (status); 652 } 653 654 uint64_t ixgbe_link_speed_to_baudrate(ixgbe_link_speed speed); 655 656 /* Shared Prototypes */ 657 658 int ixgbe_allocate_queues(struct ixgbe_softc *); 659 int ixgbe_setup_transmit_structures(struct ixgbe_softc *); 660 void ixgbe_free_transmit_structures(struct ixgbe_softc *); 661 int ixgbe_setup_receive_structures(struct ixgbe_softc *); 662 void ixgbe_free_receive_structures(struct ixgbe_softc *); 663 int ixgbe_get_regs(SYSCTL_HANDLER_ARGS); 664 void ixgbe_setup_vlan_hw_support(if_ctx_t); 665 666 void ixgbe_add_fw_logging_tunables(struct ixgbe_softc *sc, 667 struct sysctl_oid *parent); 668 669 #define IXGBE_STR_BUF_LEN 32 670 671 #include "ixgbe_bypass.h" 672 #include "ixgbe_fdir.h" 673 #include "ixgbe_rss.h" 674 675 #endif /* _IXGBE_H_ */ 676