xref: /freebsd/sys/dev/ixgbe/ixgbe.h (revision 8d20be1e22095c27faf8fe8b2f0d089739cc742e)
1 /******************************************************************************
2 
3   Copyright (c) 2001-2013, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
8 
9    1. Redistributions of source code must retain the above copyright notice,
10       this list of conditions and the following disclaimer.
11 
12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
16    3. Neither the name of the Intel Corporation nor the names of its
17       contributors may be used to endorse or promote products derived from
18       this software without specific prior written permission.
19 
20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30   POSSIBILITY OF SUCH DAMAGE.
31 
32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 
36 #ifndef _IXGBE_H_
37 #define _IXGBE_H_
38 
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #ifndef IXGBE_LEGACY_TX
43 #include <sys/buf_ring.h>
44 #endif
45 #include <sys/mbuf.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/sockio.h>
52 #include <sys/eventhandler.h>
53 
54 #include <net/if.h>
55 #include <net/if_var.h>
56 #include <net/if_arp.h>
57 #include <net/bpf.h>
58 #include <net/ethernet.h>
59 #include <net/if_dl.h>
60 #include <net/if_media.h>
61 
62 #include <net/bpf.h>
63 #include <net/if_types.h>
64 #include <net/if_vlan_var.h>
65 
66 #include <netinet/in_systm.h>
67 #include <netinet/in.h>
68 #include <netinet/if_ether.h>
69 #include <netinet/ip.h>
70 #include <netinet/ip6.h>
71 #include <netinet/tcp.h>
72 #include <netinet/tcp_lro.h>
73 #include <netinet/udp.h>
74 
75 #include <machine/in_cksum.h>
76 
77 #include <sys/bus.h>
78 #include <machine/bus.h>
79 #include <sys/rman.h>
80 #include <machine/resource.h>
81 #include <vm/vm.h>
82 #include <vm/pmap.h>
83 #include <machine/clock.h>
84 #include <dev/pci/pcivar.h>
85 #include <dev/pci/pcireg.h>
86 #include <sys/proc.h>
87 #include <sys/sysctl.h>
88 #include <sys/endian.h>
89 #include <sys/taskqueue.h>
90 #include <sys/pcpu.h>
91 #include <sys/smp.h>
92 #include <machine/smp.h>
93 
94 #include "ixgbe_api.h"
95 
96 /* Tunables */
97 
98 /*
99  * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
100  * number of transmit descriptors allocated by the driver. Increasing this
101  * value allows the driver to queue more transmits. Each descriptor is 16
102  * bytes. Performance tests have show the 2K value to be optimal for top
103  * performance.
104  */
105 #define DEFAULT_TXD	1024
106 #define PERFORM_TXD	2048
107 #define MAX_TXD		4096
108 #define MIN_TXD		64
109 
110 /*
111  * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
112  * number of receive descriptors allocated for each RX queue. Increasing this
113  * value allows the driver to buffer more incoming packets. Each descriptor
114  * is 16 bytes.  A receive buffer is also allocated for each descriptor.
115  *
116  * Note: with 8 rings and a dual port card, it is possible to bump up
117  *	against the system mbuf pool limit, you can tune nmbclusters
118  *	to adjust for this.
119  */
120 #define DEFAULT_RXD	1024
121 #define PERFORM_RXD	2048
122 #define MAX_RXD		4096
123 #define MIN_RXD		64
124 
125 /* Alignment for rings */
126 #define DBA_ALIGN	128
127 
128 /*
129  * This parameter controls the maximum no of times the driver will loop in
130  * the isr. Minimum Value = 1
131  */
132 #define MAX_LOOP	10
133 
134 /*
135  * This is the max watchdog interval, ie. the time that can
136  * pass between any two TX clean operations, such only happening
137  * when the TX hardware is functioning.
138  */
139 #define IXGBE_WATCHDOG                   (10 * hz)
140 
141 /*
142  * This parameters control when the driver calls the routine to reclaim
143  * transmit descriptors.
144  */
145 #define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
146 #define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
147 
148 #define IXGBE_MAX_FRAME_SIZE	0x3F00
149 
150 /* Flow control constants */
151 #define IXGBE_FC_PAUSE		0xFFFF
152 #define IXGBE_FC_HI		0x20000
153 #define IXGBE_FC_LO		0x10000
154 
155 /*
156  * Used for optimizing small rx mbufs.  Effort is made to keep the copy
157  * small and aligned for the CPU L1 cache.
158  *
159  * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
160  * 32 byte alignment needed for the fast bcopy results in 8 bytes being
161  * wasted.  Getting 64 byte alignment, which _should_ be ideal for
162  * modern Intel CPUs, results in 40 bytes wasted and a significant drop
163  * in observed efficiency of the optimization, 97.9% -> 81.8%.
164  */
165 #define IXGBE_RX_COPY_LEN	160
166 #define IXGBE_RX_COPY_ALIGN	(MHLEN - IXGBE_RX_COPY_LEN)
167 
168 /* Keep older OS drivers building... */
169 #if !defined(SYSCTL_ADD_UQUAD)
170 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
171 #endif
172 
173 /* Defines for printing debug information */
174 #define DEBUG_INIT  0
175 #define DEBUG_IOCTL 0
176 #define DEBUG_HW    0
177 
178 #define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
179 #define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
180 #define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
181 #define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
182 #define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
183 #define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
184 #define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
185 #define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
186 #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
187 
188 #define MAX_NUM_MULTICAST_ADDRESSES     128
189 #define IXGBE_82598_SCATTER		100
190 #define IXGBE_82599_SCATTER		32
191 #define MSIX_82598_BAR			3
192 #define MSIX_82599_BAR			4
193 #define IXGBE_TSO_SIZE			262140
194 #define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
195 #define IXGBE_RX_HDR			128
196 #define IXGBE_VFTA_SIZE			128
197 #define IXGBE_BR_SIZE			4096
198 #define IXGBE_QUEUE_MIN_FREE		32
199 
200 /* IOCTL define to gather SFP+ Diagnostic data */
201 #define SIOCGI2C	SIOCGIFGENERIC
202 
203 /* Offload bits in mbuf flag */
204 #if __FreeBSD_version >= 800000
205 #define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
206 #else
207 #define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP)
208 #endif
209 
210 /*
211  * Interrupt Moderation parameters
212  */
213 #define IXGBE_LOW_LATENCY	128
214 #define IXGBE_AVE_LATENCY	400
215 #define IXGBE_BULK_LATENCY	1200
216 #define IXGBE_LINK_ITR		2000
217 
218 
219 /*
220  *****************************************************************************
221  * vendor_info_array
222  *
223  * This array contains the list of Subvendor/Subdevice IDs on which the driver
224  * should load.
225  *
226  *****************************************************************************
227  */
228 typedef struct _ixgbe_vendor_info_t {
229 	unsigned int    vendor_id;
230 	unsigned int    device_id;
231 	unsigned int    subvendor_id;
232 	unsigned int    subdevice_id;
233 	unsigned int    index;
234 } ixgbe_vendor_info_t;
235 
236 
237 /* This is used to get SFP+ module data */
238 struct ixgbe_i2c_req {
239         u8 dev_addr;
240         u8 offset;
241         u8 len;
242         u8 data[8];
243 };
244 
245 struct ixgbe_tx_buf {
246 	union ixgbe_adv_tx_desc	*eop;
247 	struct mbuf	*m_head;
248 	bus_dmamap_t	map;
249 };
250 
251 struct ixgbe_rx_buf {
252 	struct mbuf	*buf;
253 	struct mbuf	*fmp;
254 	bus_dmamap_t	pmap;
255 	u_int		flags;
256 #define IXGBE_RX_COPY	0x01
257 	uint64_t	addr;
258 };
259 
260 /*
261  * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
262  */
263 struct ixgbe_dma_alloc {
264 	bus_addr_t		dma_paddr;
265 	caddr_t			dma_vaddr;
266 	bus_dma_tag_t		dma_tag;
267 	bus_dmamap_t		dma_map;
268 	bus_dma_segment_t	dma_seg;
269 	bus_size_t		dma_size;
270 	int			dma_nseg;
271 };
272 
273 /*
274 ** Driver queue struct: this is the interrupt container
275 **  for the associated tx and rx ring.
276 */
277 struct ix_queue {
278 	struct adapter		*adapter;
279 	u32			msix;           /* This queue's MSIX vector */
280 	u32			eims;           /* This queue's EIMS bit */
281 	u32			eitr_setting;
282 	struct resource		*res;
283 	void			*tag;
284 	struct tx_ring		*txr;
285 	struct rx_ring		*rxr;
286 	struct task		que_task;
287 	struct taskqueue	*tq;
288 	u64			irqs;
289 };
290 
291 /*
292  * The transmit ring, one per queue
293  */
294 struct tx_ring {
295         struct adapter		*adapter;
296 	struct mtx		tx_mtx;
297 	u32			me;
298 	int			watchdog_time;
299 	union ixgbe_adv_tx_desc	*tx_base;
300 	struct ixgbe_tx_buf	*tx_buffers;
301 	struct ixgbe_dma_alloc	txdma;
302 	volatile u16		tx_avail;
303 	u16			next_avail_desc;
304 	u16			next_to_clean;
305 	u16			process_limit;
306 	u16			num_desc;
307 	enum {
308 	    IXGBE_QUEUE_IDLE,
309 	    IXGBE_QUEUE_WORKING,
310 	    IXGBE_QUEUE_HUNG,
311 	}			queue_status;
312 	u32			txd_cmd;
313 	bus_dma_tag_t		txtag;
314 	char			mtx_name[16];
315 #ifndef IXGBE_LEGACY_TX
316 	struct buf_ring		*br;
317 	struct task		txq_task;
318 #endif
319 #ifdef IXGBE_FDIR
320 	u16			atr_sample;
321 	u16			atr_count;
322 #endif
323 	u32			bytes;  /* used for AIM */
324 	u32			packets;
325 	/* Soft Stats */
326 	unsigned long   	tso_tx;
327 	unsigned long   	no_tx_map_avail;
328 	unsigned long   	no_tx_dma_setup;
329 	u64			no_desc_avail;
330 	u64			total_packets;
331 };
332 
333 
334 /*
335  * The Receive ring, one per rx queue
336  */
337 struct rx_ring {
338         struct adapter		*adapter;
339 	struct mtx		rx_mtx;
340 	u32			me;
341 	union ixgbe_adv_rx_desc	*rx_base;
342 	struct ixgbe_dma_alloc	rxdma;
343 	struct lro_ctrl		lro;
344 	bool			lro_enabled;
345 	bool			hw_rsc;
346 	bool			discard;
347 	bool			vtag_strip;
348         u16			next_to_refresh;
349         u16 			next_to_check;
350 	u16			num_desc;
351 	u16			mbuf_sz;
352 	u16			process_limit;
353 	char			mtx_name[16];
354 	struct ixgbe_rx_buf	*rx_buffers;
355 	bus_dma_tag_t		ptag;
356 
357 	u32			bytes; /* Used for AIM calc */
358 	u32			packets;
359 
360 	/* Soft stats */
361 	u64			rx_irq;
362 	u64			rx_copies;
363 	u64			rx_packets;
364 	u64 			rx_bytes;
365 	u64 			rx_discarded;
366 	u64 			rsc_num;
367 #ifdef IXGBE_FDIR
368 	u64			flm;
369 #endif
370 };
371 
372 /* Our adapter structure */
373 struct adapter {
374 	struct ifnet		*ifp;
375 	struct ixgbe_hw		hw;
376 
377 	struct ixgbe_osdep	osdep;
378 	struct device		*dev;
379 
380 	struct resource		*pci_mem;
381 	struct resource		*msix_mem;
382 
383 	/*
384 	 * Interrupt resources: this set is
385 	 * either used for legacy, or for Link
386 	 * when doing MSIX
387 	 */
388 	void			*tag;
389 	struct resource 	*res;
390 
391 	struct ifmedia		media;
392 	struct callout		timer;
393 	int			msix;
394 	int			if_flags;
395 
396 	struct mtx		core_mtx;
397 
398 	eventhandler_tag 	vlan_attach;
399 	eventhandler_tag 	vlan_detach;
400 
401 	u16			num_vlans;
402 	u16			num_queues;
403 
404 	/*
405 	** Shadow VFTA table, this is needed because
406 	** the real vlan filter table gets cleared during
407 	** a soft reset and the driver needs to be able
408 	** to repopulate it.
409 	*/
410 	u32			shadow_vfta[IXGBE_VFTA_SIZE];
411 
412 	/* Info about the interface */
413 	u32			optics;
414 	u32			fc; /* local flow ctrl setting */
415 	int			advertise;  /* link speeds */
416 	bool			link_active;
417 	u16			max_frame_size;
418 	u16			num_segs;
419 	u32			link_speed;
420 	bool			link_up;
421 	u32 			linkvec;
422 
423 	/* Mbuf cluster size */
424 	u32			rx_mbuf_sz;
425 
426 	/* Support for pluggable optics */
427 	bool			sfp_probe;
428 	struct task     	link_task;  /* Link tasklet */
429 	struct task     	mod_task;   /* SFP tasklet */
430 	struct task     	msf_task;   /* Multispeed Fiber */
431 #ifdef IXGBE_FDIR
432 	int			fdir_reinit;
433 	struct task     	fdir_task;
434 #endif
435 	struct taskqueue	*tq;
436 
437 	/*
438 	** Queues:
439 	**   This is the irq holder, it has
440 	**   and RX/TX pair or rings associated
441 	**   with it.
442 	*/
443 	struct ix_queue		*queues;
444 
445 	/*
446 	 * Transmit rings:
447 	 *	Allocated at run time, an array of rings.
448 	 */
449 	struct tx_ring		*tx_rings;
450 	u32			num_tx_desc;
451 
452 	/*
453 	 * Receive rings:
454 	 *	Allocated at run time, an array of rings.
455 	 */
456 	struct rx_ring		*rx_rings;
457 	u64			que_mask;
458 	u32			num_rx_desc;
459 
460 	/* Multicast array memory */
461 	u8			*mta;
462 
463 
464 	/* Misc stats maintained by the driver */
465 	unsigned long   	dropped_pkts;
466 	unsigned long   	mbuf_defrag_failed;
467 	unsigned long   	mbuf_header_failed;
468 	unsigned long   	mbuf_packet_failed;
469 	unsigned long   	watchdog_events;
470 	unsigned long		link_irq;
471 
472 	struct ixgbe_hw_stats 	stats;
473 };
474 
475 
476 /* Precision Time Sync (IEEE 1588) defines */
477 #define ETHERTYPE_IEEE1588      0x88F7
478 #define PICOSECS_PER_TICK       20833
479 #define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
480 #define IXGBE_ADVTXD_TSTAMP	0x00080000
481 
482 
483 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
484         mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
485 #define IXGBE_CORE_LOCK_DESTROY(_sc)      mtx_destroy(&(_sc)->core_mtx)
486 #define IXGBE_TX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->tx_mtx)
487 #define IXGBE_RX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->rx_mtx)
488 #define IXGBE_CORE_LOCK(_sc)              mtx_lock(&(_sc)->core_mtx)
489 #define IXGBE_TX_LOCK(_sc)                mtx_lock(&(_sc)->tx_mtx)
490 #define IXGBE_TX_TRYLOCK(_sc)             mtx_trylock(&(_sc)->tx_mtx)
491 #define IXGBE_RX_LOCK(_sc)                mtx_lock(&(_sc)->rx_mtx)
492 #define IXGBE_CORE_UNLOCK(_sc)            mtx_unlock(&(_sc)->core_mtx)
493 #define IXGBE_TX_UNLOCK(_sc)              mtx_unlock(&(_sc)->tx_mtx)
494 #define IXGBE_RX_UNLOCK(_sc)              mtx_unlock(&(_sc)->rx_mtx)
495 #define IXGBE_CORE_LOCK_ASSERT(_sc)       mtx_assert(&(_sc)->core_mtx, MA_OWNED)
496 #define IXGBE_TX_LOCK_ASSERT(_sc)         mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
497 
498 /* For backward compatibility */
499 #if !defined(PCIER_LINK_STA)
500 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
501 #endif
502 
503 static inline bool
504 ixgbe_is_sfp(struct ixgbe_hw *hw)
505 {
506 	switch (hw->phy.type) {
507 	case ixgbe_phy_sfp_avago:
508 	case ixgbe_phy_sfp_ftl:
509 	case ixgbe_phy_sfp_intel:
510 	case ixgbe_phy_sfp_unknown:
511 	case ixgbe_phy_sfp_passive_tyco:
512 	case ixgbe_phy_sfp_passive_unknown:
513 		return TRUE;
514 	default:
515 		return FALSE;
516 	}
517 }
518 
519 /* Workaround to make 8.0 buildable */
520 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
521 static __inline int
522 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
523 {
524 #ifdef ALTQ
525         if (ALTQ_IS_ENABLED(&ifp->if_snd))
526                 return (1);
527 #endif
528         return (!buf_ring_empty(br));
529 }
530 #endif
531 
532 /*
533 ** Find the number of unrefreshed RX descriptors
534 */
535 static inline u16
536 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
537 {
538 	if (rxr->next_to_check > rxr->next_to_refresh)
539 		return (rxr->next_to_check - rxr->next_to_refresh - 1);
540 	else
541 		return ((rxr->num_desc + rxr->next_to_check) -
542 		    rxr->next_to_refresh - 1);
543 }
544 
545 #endif /* _IXGBE_H_ */
546