1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2017, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 /*$FreeBSD$*/ 35 36 37 #ifndef _IXGBE_H_ 38 #define _IXGBE_H_ 39 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/buf_ring.h> 44 #include <sys/mbuf.h> 45 #include <sys/protosw.h> 46 #include <sys/socket.h> 47 #include <sys/malloc.h> 48 #include <sys/kernel.h> 49 #include <sys/module.h> 50 #include <sys/sockio.h> 51 #include <sys/eventhandler.h> 52 53 #include <net/if.h> 54 #include <net/if_var.h> 55 #include <net/if_arp.h> 56 #include <net/bpf.h> 57 #include <net/ethernet.h> 58 #include <net/if_dl.h> 59 #include <net/if_media.h> 60 61 #include <net/bpf.h> 62 #include <net/if_types.h> 63 #include <net/if_vlan_var.h> 64 65 #include <netinet/in_systm.h> 66 #include <netinet/in.h> 67 #include <netinet/if_ether.h> 68 #include <netinet/ip.h> 69 #include <netinet/ip6.h> 70 #include <netinet/tcp.h> 71 #include <netinet/tcp_lro.h> 72 #include <netinet/udp.h> 73 74 #include <machine/in_cksum.h> 75 76 #include <sys/bus.h> 77 #include <machine/bus.h> 78 #include <sys/rman.h> 79 #include <machine/resource.h> 80 #include <vm/vm.h> 81 #include <vm/pmap.h> 82 #include <machine/clock.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/pcireg.h> 85 #include <sys/proc.h> 86 #include <sys/sysctl.h> 87 #include <sys/endian.h> 88 #include <sys/taskqueue.h> 89 #include <sys/pcpu.h> 90 #include <sys/smp.h> 91 #include <machine/smp.h> 92 #include <sys/sbuf.h> 93 94 #include "ixgbe_api.h" 95 #include "ixgbe_common.h" 96 #include "ixgbe_phy.h" 97 #include "ixgbe_vf.h" 98 #include "ixgbe_features.h" 99 100 /* Tunables */ 101 102 /* 103 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 104 * number of transmit descriptors allocated by the driver. Increasing this 105 * value allows the driver to queue more transmits. Each descriptor is 16 106 * bytes. Performance tests have show the 2K value to be optimal for top 107 * performance. 108 */ 109 #define DEFAULT_TXD 1024 110 #define PERFORM_TXD 2048 111 #define MAX_TXD 4096 112 #define MIN_TXD 64 113 114 /* 115 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 116 * number of receive descriptors allocated for each RX queue. Increasing this 117 * value allows the driver to buffer more incoming packets. Each descriptor 118 * is 16 bytes. A receive buffer is also allocated for each descriptor. 119 * 120 * Note: with 8 rings and a dual port card, it is possible to bump up 121 * against the system mbuf pool limit, you can tune nmbclusters 122 * to adjust for this. 123 */ 124 #define DEFAULT_RXD 1024 125 #define PERFORM_RXD 2048 126 #define MAX_RXD 4096 127 #define MIN_RXD 64 128 129 /* Alignment for rings */ 130 #define DBA_ALIGN 128 131 132 /* 133 * This is the max watchdog interval, ie. the time that can 134 * pass between any two TX clean operations, such only happening 135 * when the TX hardware is functioning. 136 */ 137 #define IXGBE_WATCHDOG (10 * hz) 138 139 /* 140 * This parameters control when the driver calls the routine to reclaim 141 * transmit descriptors. 142 */ 143 #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8) 144 #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32) 145 146 /* These defines are used in MTU calculations */ 147 #define IXGBE_MAX_FRAME_SIZE 9728 148 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN) 149 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \ 150 ETHER_VLAN_ENCAP_LEN) 151 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR) 152 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN) 153 154 /* Flow control constants */ 155 #define IXGBE_FC_PAUSE 0xFFFF 156 #define IXGBE_FC_HI 0x20000 157 #define IXGBE_FC_LO 0x10000 158 159 /* 160 * Used for optimizing small rx mbufs. Effort is made to keep the copy 161 * small and aligned for the CPU L1 cache. 162 * 163 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 164 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 165 * wasted. Getting 64 byte alignment, which _should_ be ideal for 166 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 167 * in observed efficiency of the optimization, 97.9% -> 81.8%. 168 */ 169 #if __FreeBSD_version < 1002000 170 #define MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr)) 171 #endif 172 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 173 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 174 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 175 176 /* Keep older OS drivers building... */ 177 #if !defined(SYSCTL_ADD_UQUAD) 178 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 179 #endif 180 181 /* Defines for printing debug information */ 182 #define DEBUG_INIT 0 183 #define DEBUG_IOCTL 0 184 #define DEBUG_HW 0 185 186 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 187 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 188 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 189 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 190 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 191 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 192 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 193 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 194 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 195 196 #define MAX_NUM_MULTICAST_ADDRESSES 128 197 #define IXGBE_82598_SCATTER 100 198 #define IXGBE_82599_SCATTER 32 199 #define MSIX_82598_BAR 3 200 #define MSIX_82599_BAR 4 201 #define IXGBE_TSO_SIZE 262140 202 #define IXGBE_RX_HDR 128 203 #define IXGBE_VFTA_SIZE 128 204 #define IXGBE_BR_SIZE 4096 205 #define IXGBE_QUEUE_MIN_FREE 32 206 #define IXGBE_MAX_TX_BUSY 10 207 #define IXGBE_QUEUE_HUNG 0x80000000 208 209 #define IXGBE_EITR_DEFAULT 128 210 211 /* Supported offload bits in mbuf flag */ 212 #if __FreeBSD_version >= 1000000 213 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \ 214 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \ 215 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP) 216 #elif __FreeBSD_version >= 800000 217 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 218 #else 219 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 220 #endif 221 222 /* Backward compatibility items for very old versions */ 223 #ifndef pci_find_cap 224 #define pci_find_cap pci_find_extcap 225 #endif 226 227 #ifndef DEVMETHOD_END 228 #define DEVMETHOD_END { NULL, NULL } 229 #endif 230 231 /* 232 * Interrupt Moderation parameters 233 */ 234 #define IXGBE_LOW_LATENCY 128 235 #define IXGBE_AVE_LATENCY 400 236 #define IXGBE_BULK_LATENCY 1200 237 238 /* Using 1FF (the max value), the interval is ~1.05ms */ 239 #define IXGBE_LINK_ITR_QUANTA 0x1FF 240 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \ 241 IXGBE_EITR_ITR_INT_MASK) 242 243 244 245 /************************************************************************ 246 * vendor_info_array 247 * 248 * Contains the list of Subvendor/Subdevice IDs on 249 * which the driver should load. 250 ************************************************************************/ 251 typedef struct _ixgbe_vendor_info_t { 252 unsigned int vendor_id; 253 unsigned int device_id; 254 unsigned int subvendor_id; 255 unsigned int subdevice_id; 256 unsigned int index; 257 } ixgbe_vendor_info_t; 258 259 struct ixgbe_bp_data { 260 u32 low; 261 u32 high; 262 u32 log; 263 }; 264 265 struct ixgbe_tx_buf { 266 union ixgbe_adv_tx_desc *eop; 267 struct mbuf *m_head; 268 bus_dmamap_t map; 269 }; 270 271 struct ixgbe_rx_buf { 272 struct mbuf *buf; 273 struct mbuf *fmp; 274 bus_dmamap_t pmap; 275 u_int flags; 276 #define IXGBE_RX_COPY 0x01 277 uint64_t addr; 278 }; 279 280 /* 281 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free 282 */ 283 struct ixgbe_dma_alloc { 284 bus_addr_t dma_paddr; 285 caddr_t dma_vaddr; 286 bus_dma_tag_t dma_tag; 287 bus_dmamap_t dma_map; 288 bus_dma_segment_t dma_seg; 289 bus_size_t dma_size; 290 int dma_nseg; 291 }; 292 293 struct ixgbe_mc_addr { 294 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 295 u32 vmdq; 296 }; 297 298 /* 299 * Driver queue struct: this is the interrupt container 300 * for the associated tx and rx ring. 301 */ 302 struct ix_queue { 303 struct adapter *adapter; 304 u32 msix; /* This queue's MSI-X vector */ 305 u32 eims; /* This queue's EIMS bit */ 306 u32 eitr_setting; 307 u32 me; 308 struct resource *res; 309 void *tag; 310 int busy; 311 struct tx_ring *txr; 312 struct rx_ring *rxr; 313 struct task que_task; 314 struct taskqueue *tq; 315 u64 irqs; 316 }; 317 318 /* 319 * The transmit ring, one per queue 320 */ 321 struct tx_ring { 322 struct adapter *adapter; 323 struct mtx tx_mtx; 324 u32 me; 325 u32 tail; 326 int busy; 327 union ixgbe_adv_tx_desc *tx_base; 328 struct ixgbe_tx_buf *tx_buffers; 329 struct ixgbe_dma_alloc txdma; 330 volatile u16 tx_avail; 331 u16 next_avail_desc; 332 u16 next_to_clean; 333 u16 num_desc; 334 u32 txd_cmd; 335 bus_dma_tag_t txtag; 336 char mtx_name[16]; 337 struct buf_ring *br; 338 struct task txq_task; 339 340 /* Flow Director */ 341 u16 atr_sample; 342 u16 atr_count; 343 344 u32 bytes; /* used for AIM */ 345 u32 packets; 346 /* Soft Stats */ 347 u64 tso_tx; 348 u64 no_tx_map_avail; 349 u64 no_tx_dma_setup; 350 u64 no_desc_avail; 351 u64 total_packets; 352 }; 353 354 355 /* 356 * The Receive ring, one per rx queue 357 */ 358 struct rx_ring { 359 struct adapter *adapter; 360 struct mtx rx_mtx; 361 u32 me; 362 u32 tail; 363 union ixgbe_adv_rx_desc *rx_base; 364 struct ixgbe_dma_alloc rxdma; 365 struct lro_ctrl lro; 366 bool lro_enabled; 367 bool hw_rsc; 368 bool vtag_strip; 369 u16 next_to_refresh; 370 u16 next_to_check; 371 u16 num_desc; 372 u16 mbuf_sz; 373 char mtx_name[16]; 374 struct ixgbe_rx_buf *rx_buffers; 375 bus_dma_tag_t ptag; 376 377 u32 bytes; /* Used for AIM calc */ 378 u32 packets; 379 380 /* Soft stats */ 381 u64 rx_irq; 382 u64 rx_copies; 383 u64 rx_packets; 384 u64 rx_bytes; 385 u64 rx_discarded; 386 u64 rsc_num; 387 388 /* Flow Director */ 389 u64 flm; 390 }; 391 392 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ 393 394 struct ixgbe_vf { 395 u_int pool; 396 u_int rar_index; 397 u_int max_frame_size; 398 uint32_t flags; 399 uint8_t ether_addr[ETHER_ADDR_LEN]; 400 uint16_t mc_hash[IXGBE_MAX_VF_MC]; 401 uint16_t num_mc_hashes; 402 uint16_t default_vlan; 403 uint16_t vlan_tag; 404 uint16_t api_ver; 405 }; 406 407 /* Our adapter structure */ 408 struct adapter { 409 struct ixgbe_hw hw; 410 struct ixgbe_osdep osdep; 411 412 device_t dev; 413 struct ifnet *ifp; 414 415 struct resource *pci_mem; 416 struct resource *msix_mem; 417 418 /* 419 * Interrupt resources: this set is 420 * either used for legacy, or for Link 421 * when doing MSI-X 422 */ 423 void *tag; 424 struct resource *res; 425 426 struct ifmedia media; 427 struct callout timer; 428 int link_rid; 429 int if_flags; 430 431 struct mtx core_mtx; 432 433 eventhandler_tag vlan_attach; 434 eventhandler_tag vlan_detach; 435 436 u16 num_vlans; 437 u16 num_queues; 438 439 /* 440 * Shadow VFTA table, this is needed because 441 * the real vlan filter table gets cleared during 442 * a soft reset and the driver needs to be able 443 * to repopulate it. 444 */ 445 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 446 447 /* Info about the interface */ 448 int advertise; /* link speeds */ 449 int enable_aim; /* adaptive interrupt moderation */ 450 bool link_active; 451 u16 max_frame_size; 452 u16 num_segs; 453 u32 link_speed; 454 bool link_up; 455 u32 vector; 456 u16 dmac; 457 u32 phy_layer; 458 459 /* Power management-related */ 460 bool wol_support; 461 u32 wufc; 462 463 /* Mbuf cluster size */ 464 u32 rx_mbuf_sz; 465 466 /* Support for pluggable optics */ 467 bool sfp_probe; 468 struct task link_task; /* Link tasklet */ 469 struct task mod_task; /* SFP tasklet */ 470 struct task msf_task; /* Multispeed Fiber */ 471 struct task mbx_task; /* VF -> PF mailbox interrupt */ 472 473 /* Flow Director */ 474 int fdir_reinit; 475 struct task fdir_task; 476 477 struct task phy_task; /* PHY intr tasklet */ 478 struct taskqueue *tq; 479 480 /* 481 * Queues: 482 * This is the irq holder, it has 483 * and RX/TX pair or rings associated 484 * with it. 485 */ 486 struct ix_queue *queues; 487 488 /* 489 * Transmit rings 490 * Allocated at run time, an array of rings 491 */ 492 struct tx_ring *tx_rings; 493 u32 num_tx_desc; 494 u32 tx_process_limit; 495 496 /* 497 * Receive rings 498 * Allocated at run time, an array of rings 499 */ 500 struct rx_ring *rx_rings; 501 u64 active_queues; 502 u32 num_rx_desc; 503 u32 rx_process_limit; 504 505 /* Multicast array memory */ 506 struct ixgbe_mc_addr *mta; 507 508 /* SR-IOV */ 509 int iov_mode; 510 int num_vfs; 511 int pool; 512 struct ixgbe_vf *vfs; 513 514 /* Bypass */ 515 struct ixgbe_bp_data bypass; 516 517 /* Netmap */ 518 void (*init_locked)(struct adapter *); 519 void (*stop_locked)(void *); 520 521 /* Misc stats maintained by the driver */ 522 unsigned long dropped_pkts; 523 unsigned long mbuf_defrag_failed; 524 unsigned long mbuf_header_failed; 525 unsigned long mbuf_packet_failed; 526 unsigned long watchdog_events; 527 unsigned long link_irq; 528 union { 529 struct ixgbe_hw_stats pf; 530 struct ixgbevf_hw_stats vf; 531 } stats; 532 #if __FreeBSD_version >= 1100036 533 /* counter(9) stats */ 534 u64 ipackets; 535 u64 ierrors; 536 u64 opackets; 537 u64 oerrors; 538 u64 ibytes; 539 u64 obytes; 540 u64 imcasts; 541 u64 omcasts; 542 u64 iqdrops; 543 u64 noproto; 544 #endif 545 /* Feature capable/enabled flags. See ixgbe_features.h */ 546 u32 feat_cap; 547 u32 feat_en; 548 }; 549 550 551 /* Precision Time Sync (IEEE 1588) defines */ 552 #define ETHERTYPE_IEEE1588 0x88F7 553 #define PICOSECS_PER_TICK 20833 554 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 555 #define IXGBE_ADVTXD_TSTAMP 0x00080000 556 557 558 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 559 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 560 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 561 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 562 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 563 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 564 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 565 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 566 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 567 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 568 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 569 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 570 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 571 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 572 573 /* For backward compatibility */ 574 #if !defined(PCIER_LINK_STA) 575 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA 576 #endif 577 578 /* Stats macros */ 579 #if __FreeBSD_version >= 1100036 580 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 581 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 582 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 583 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 584 #define IXGBE_SET_COLLISIONS(sc, count) 585 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 586 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 587 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 588 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 589 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 590 #else 591 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count) 592 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count) 593 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count) 594 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count) 595 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count) 596 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count) 597 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count) 598 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count) 599 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count) 600 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count) 601 #endif 602 603 /* External PHY register addresses */ 604 #define IXGBE_PHY_CURRENT_TEMP 0xC820 605 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830 606 607 /* Sysctl help messages; displayed with sysctl -d */ 608 #define IXGBE_SYSCTL_DESC_ADV_SPEED \ 609 "\nControl advertised link speed using these flags:\n" \ 610 "\t0x1 - advertise 100M\n" \ 611 "\t0x2 - advertise 1G\n" \ 612 "\t0x4 - advertise 10G\n" \ 613 "\t0x8 - advertise 10M\n\n" \ 614 "\t100M and 10M are only supported on certain adapters.\n" 615 616 #define IXGBE_SYSCTL_DESC_SET_FC \ 617 "\nSet flow control mode using these values:\n" \ 618 "\t0 - off\n" \ 619 "\t1 - rx pause\n" \ 620 "\t2 - tx pause\n" \ 621 "\t3 - tx and rx pause" 622 623 /* Workaround to make 8.0 buildable */ 624 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 625 static __inline int 626 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 627 { 628 #ifdef ALTQ 629 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 630 return (1); 631 #endif 632 return (!buf_ring_empty(br)); 633 } 634 #endif 635 636 /* 637 * Find the number of unrefreshed RX descriptors 638 */ 639 static inline u16 640 ixgbe_rx_unrefreshed(struct rx_ring *rxr) 641 { 642 if (rxr->next_to_check > rxr->next_to_refresh) 643 return (rxr->next_to_check - rxr->next_to_refresh - 1); 644 else 645 return ((rxr->num_desc + rxr->next_to_check) - 646 rxr->next_to_refresh - 1); 647 } 648 649 static inline int 650 ixgbe_legacy_ring_empty(struct ifnet *ifp, struct buf_ring *dummy) 651 { 652 UNREFERENCED_1PARAMETER(dummy); 653 654 return IFQ_DRV_IS_EMPTY(&ifp->if_snd); 655 } 656 657 /* 658 * This checks for a zero mac addr, something that will be likely 659 * unless the Admin on the Host has created one. 660 */ 661 static inline bool 662 ixv_check_ether_addr(u8 *addr) 663 { 664 bool status = TRUE; 665 666 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 667 addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 668 status = FALSE; 669 670 return (status); 671 } 672 673 /* Shared Prototypes */ 674 void ixgbe_legacy_start(struct ifnet *); 675 int ixgbe_legacy_start_locked(struct ifnet *, struct tx_ring *); 676 int ixgbe_mq_start(struct ifnet *, struct mbuf *); 677 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *); 678 void ixgbe_qflush(struct ifnet *); 679 void ixgbe_deferred_mq_start(void *, int); 680 681 int ixgbe_allocate_queues(struct adapter *); 682 int ixgbe_setup_transmit_structures(struct adapter *); 683 void ixgbe_free_transmit_structures(struct adapter *); 684 int ixgbe_setup_receive_structures(struct adapter *); 685 void ixgbe_free_receive_structures(struct adapter *); 686 void ixgbe_txeof(struct tx_ring *); 687 bool ixgbe_rxeof(struct ix_queue *); 688 689 #include "ixgbe_bypass.h" 690 #include "ixgbe_sriov.h" 691 #include "ixgbe_fdir.h" 692 #include "ixgbe_rss.h" 693 #include "ixgbe_netmap.h" 694 695 #endif /* _IXGBE_H_ */ 696