xref: /freebsd/sys/dev/ixgbe/ixgbe.h (revision 7ef62cebc2f965b0f640263e179276928885e33d)
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4   Copyright (c) 2001-2017, Intel Corporation
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33 ******************************************************************************/
34 /*$FreeBSD$*/
35 
36 #ifndef _IXGBE_H_
37 #define _IXGBE_H_
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/buf_ring.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/module.h>
48 #include <sys/sockio.h>
49 #include <sys/eventhandler.h>
50 
51 #include <net/if.h>
52 #include <net/if_var.h>
53 #include <net/if_arp.h>
54 #include <net/bpf.h>
55 #include <net/ethernet.h>
56 #include <net/if_dl.h>
57 #include <net/if_media.h>
58 
59 #include <net/if_types.h>
60 #include <net/if_vlan_var.h>
61 #include <net/iflib.h>
62 
63 #include <netinet/in_systm.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
66 
67 #include <sys/bus.h>
68 #include <machine/bus.h>
69 #include <sys/rman.h>
70 #include <machine/resource.h>
71 #include <vm/vm.h>
72 #include <vm/pmap.h>
73 #include <machine/clock.h>
74 #include <dev/pci/pcivar.h>
75 #include <dev/pci/pcireg.h>
76 #include <sys/proc.h>
77 #include <sys/sysctl.h>
78 #include <sys/endian.h>
79 #include <sys/gtaskqueue.h>
80 #include <sys/pcpu.h>
81 #include <sys/smp.h>
82 #include <machine/smp.h>
83 #include <sys/sbuf.h>
84 
85 #include "ixgbe_api.h"
86 #include "ixgbe_common.h"
87 #include "ixgbe_phy.h"
88 #include "ixgbe_vf.h"
89 #include "ixgbe_features.h"
90 
91 /* Tunables */
92 
93 /*
94  * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
95  * number of transmit descriptors allocated by the driver. Increasing this
96  * value allows the driver to queue more transmits. Each descriptor is 16
97  * bytes. Performance tests have show the 2K value to be optimal for top
98  * performance.
99  */
100 #define DEFAULT_TXD		2048
101 #define PERFORM_TXD		2048
102 #define MAX_TXD			4096
103 #define MIN_TXD			64
104 
105 /*
106  * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
107  * number of receive descriptors allocated for each RX queue. Increasing this
108  * value allows the driver to buffer more incoming packets. Each descriptor
109  * is 16 bytes.  A receive buffer is also allocated for each descriptor.
110  *
111  * Note: with 8 rings and a dual port card, it is possible to bump up
112  *       against the system mbuf pool limit, you can tune nmbclusters
113  *       to adjust for this.
114  */
115 #define DEFAULT_RXD		2048
116 #define PERFORM_RXD		2048
117 #define MAX_RXD			4096
118 #define MIN_RXD			64
119 
120 /* Alignment for rings */
121 #define DBA_ALIGN		128
122 
123 /*
124  * This is the max watchdog interval, ie. the time that can
125  * pass between any two TX clean operations, such only happening
126  * when the TX hardware is functioning.
127  */
128 #define IXGBE_WATCHDOG	(10 * hz)
129 
130 /*
131  * This parameters control when the driver calls the routine to reclaim
132  * transmit descriptors.
133  */
134 #define IXGBE_TX_CLEANUP_THRESHOLD(_a)	((_a)->num_tx_desc / 8)
135 #define IXGBE_TX_OP_THRESHOLD(_a)	((_a)->num_tx_desc / 32)
136 
137 /* These defines are used in MTU calculations */
138 #define IXGBE_MAX_FRAME_SIZE	9728
139 #define IXGBE_MTU_HDR		(ETHER_HDR_LEN + ETHER_CRC_LEN)
140 #define IXGBE_MTU_HDR_VLAN	(ETHER_HDR_LEN + ETHER_CRC_LEN + \
141 							    ETHER_VLAN_ENCAP_LEN)
142 #define IXGBE_MAX_MTU		(IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
143 #define IXGBE_MAX_MTU_VLAN	(IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN)
144 
145 /* Flow control constants */
146 #define IXGBE_FC_PAUSE		0xFFFF
147 #define IXGBE_FC_HI		0x20000
148 #define IXGBE_FC_LO		0x10000
149 
150 /*
151  * Used for optimizing small rx mbufs.  Effort is made to keep the copy
152  * small and aligned for the CPU L1 cache.
153  *
154  * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
155  * 32 byte alignment needed for the fast bcopy results in 8 bytes being
156  * wasted.  Getting 64 byte alignment, which _should_ be ideal for
157  * modern Intel CPUs, results in 40 bytes wasted and a significant drop
158  * in observed efficiency of the optimization, 97.9% -> 81.8%.
159  */
160 #define IXGBE_MPKTHSIZE		(sizeof(struct m_hdr) + sizeof(struct pkthdr))
161 
162 #define IXGBE_RX_COPY_HDR_PADDED	((((IXGBE_MPKTHSIZE - 1) / 32) + 1) * 32)
163 #define IXGBE_RX_COPY_LEN		(MSIZE - IXGBE_RX_COPY_HDR_PADDED)
164 #define IXGBE_RX_COPY_ALIGN		(IXGBE_RX_COPY_HDR_PADDED - IXGBE_MPKTHSIZE)
165 
166 /* Defines for printing debug information */
167 #define DEBUG_INIT		0
168 #define DEBUG_IOCTL		0
169 #define DEBUG_HW		0
170 
171 #define INIT_DEBUGOUT(S)		if (DEBUG_INIT)  printf(S "\n")
172 #define INIT_DEBUGOUT1(S, A)		if (DEBUG_INIT)  printf(S "\n", A)
173 #define INIT_DEBUGOUT2(S, A, B)		if (DEBUG_INIT)  printf(S "\n", A, B)
174 #define IOCTL_DEBUGOUT(S)		if (DEBUG_IOCTL) printf(S "\n")
175 #define IOCTL_DEBUGOUT1(S, A)		if (DEBUG_IOCTL) printf(S "\n", A)
176 #define IOCTL_DEBUGOUT2(S, A, B)	if (DEBUG_IOCTL) printf(S "\n", A, B)
177 #define HW_DEBUGOUT(S)			if (DEBUG_HW) printf(S "\n")
178 #define HW_DEBUGOUT1(S, A)		if (DEBUG_HW) printf(S "\n", A)
179 #define HW_DEBUGOUT2(S, A, B)		if (DEBUG_HW) printf(S "\n", A, B)
180 
181 #define MAX_NUM_MULTICAST_ADDRESSES	128
182 #define IXGBE_82598_SCATTER		100
183 #define IXGBE_82599_SCATTER		32
184 #define IXGBE_TSO_SIZE			262140
185 #define IXGBE_RX_HDR			128
186 #define IXGBE_VFTA_SIZE			128
187 #define IXGBE_BR_SIZE			4096
188 #define IXGBE_QUEUE_MIN_FREE		32
189 #define IXGBE_MAX_TX_BUSY		10
190 #define IXGBE_QUEUE_HUNG		0x80000000
191 
192 #define IXGBE_EITR_DEFAULT		128
193 
194 /* Supported offload bits in mbuf flag */
195 #define CSUM_OFFLOAD	(CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
196 			    CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
197 			    CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
198 
199 #define IXGBE_CAPS (IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_TSO | \
200 		    IFCAP_LRO | IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO | \
201 		    IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU | IFCAP_VLAN_MTU | \
202 		    IFCAP_VLAN_HWFILTER | IFCAP_WOL)
203 
204 #ifndef DEVMETHOD_END
205 #define DEVMETHOD_END	{ NULL, NULL }
206 #endif
207 
208 /*
209  * Interrupt Moderation parameters
210  */
211 #define IXGBE_LOW_LATENCY		128
212 #define IXGBE_AVE_LATENCY		400
213 #define IXGBE_BULK_LATENCY		1200
214 
215 /* Using 1FF (the max value), the interval is ~1.05ms */
216 #define IXGBE_LINK_ITR_QUANTA	0x1FF
217 #define IXGBE_LINK_ITR		((IXGBE_LINK_ITR_QUANTA << 3) & \
218 				    IXGBE_EITR_ITR_INT_MASK)
219 
220 
221 /************************************************************************
222  * vendor_info_array
223  *
224  *   Contains the list of Subvendor/Subdevice IDs on
225  *   which the driver should load.
226  ************************************************************************/
227 typedef struct _ixgbe_vendor_info_t {
228 	unsigned int		vendor_id;
229 	unsigned int		device_id;
230 	unsigned int		subvendor_id;
231 	unsigned int		subdevice_id;
232 	unsigned int		index;
233 } ixgbe_vendor_info_t;
234 
235 struct ixgbe_bp_data {
236 	u32		low;
237 	u32		high;
238 	u32		log;
239 };
240 
241 
242 /*
243  */
244 struct ixgbe_dma_alloc {
245 	bus_addr_t		dma_paddr;
246 	caddr_t			dma_vaddr;
247 	bus_dma_tag_t		dma_tag;
248 	bus_dmamap_t		dma_map;
249 	bus_dma_segment_t 	dma_seg;
250 	bus_size_t		dma_size;
251 	int			dma_nseg;
252 };
253 
254 struct ixgbe_mc_addr {
255 	u8		addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
256 	u32		vmdq;
257 };
258 
259 /*
260  * The transmit ring, one per queue
261  */
262 struct tx_ring {
263 	struct ixgbe_softc	*sc;
264 	union ixgbe_adv_tx_desc *tx_base;
265 	uint64_t		tx_paddr;
266 	u32			tail;
267 	qidx_t			*tx_rsq;
268 	qidx_t			tx_rs_cidx;
269 	qidx_t			tx_rs_pidx;
270 	qidx_t			tx_cidx_processed;
271 	uint8_t			me;
272 
273 	/* Flow Director */
274 	u16			atr_sample;
275 	u16			atr_count;
276 
277 	u32			bytes;	/* used for AIM */
278 	u32			packets;
279 	/* Soft Stats */
280 	u64			tso_tx;
281 	u64			total_packets;
282 };
283 
284 
285 /*
286  * The Receive ring, one per rx queue
287  */
288 struct rx_ring {
289 	struct ix_rx_queue	*que;
290 	struct ixgbe_softc	*sc;
291 	u32			me;
292 	u32			tail;
293 	union ixgbe_adv_rx_desc *rx_base;
294 	bool			hw_rsc;
295 	bool			vtag_strip;
296 	uint64_t		rx_paddr;
297 	bus_dma_tag_t		ptag;
298 
299 	u32			bytes;	/* Used for AIM calc */
300 	u32			packets;
301 
302 	/* Soft stats */
303 	u64			rx_irq;
304 	u64			rx_copies;
305 	u64			rx_packets;
306 	u64			rx_bytes;
307 	u64			rx_discarded;
308 	u64			rsc_num;
309 
310 	/* Flow Director */
311 	u64			flm;
312 };
313 
314 /*
315  * Driver queue struct: this is the interrupt container
316  *  for the associated tx and rx ring.
317  */
318 struct ix_rx_queue {
319 	struct ixgbe_softc	*sc;
320 	u32			msix;	/* This queue's MSIX vector */
321 	u32			eitr_setting;
322 	struct resource		*res;
323 	void			*tag;
324 	int			busy;
325 	struct rx_ring		rxr;
326 	struct if_irq		que_irq;
327 	u64			irqs;
328 };
329 
330 struct ix_tx_queue {
331 	struct ixgbe_softc	*sc;
332 	u32			msix;	/* This queue's MSIX vector */
333 	struct tx_ring		txr;
334 };
335 
336 #define IXGBE_MAX_VF_MC	30	/* Max number of multicast entries */
337 
338 struct ixgbe_vf {
339 	u_int		pool;
340 	u_int		rar_index;
341 	u_int		maximum_frame_size;
342 	uint32_t	flags;
343 	uint8_t		ether_addr[ETHER_ADDR_LEN];
344 	uint16_t	mc_hash[IXGBE_MAX_VF_MC];
345 	uint16_t	num_mc_hashes;
346 	uint16_t	default_vlan;
347 	uint16_t	vlan_tag;
348 	uint16_t	api_ver;
349 };
350 
351 /* Our softc structure */
352 struct ixgbe_softc {
353 	struct ixgbe_hw		hw;
354 	struct ixgbe_osdep	osdep;
355 	if_ctx_t		ctx;
356 	if_softc_ctx_t		shared;
357 #define num_tx_queues		shared->isc_ntxqsets
358 #define num_rx_queues		shared->isc_nrxqsets
359 #define max_frame_size		shared->isc_max_frame_size
360 #define intr_type		shared->isc_intr
361 
362 	device_t		dev;
363 	struct ifnet		*ifp;
364 
365 	struct resource		*pci_mem;
366 
367 	/*
368 	 * Interrupt resources: this set is
369 	 * either used for legacy, or for Link
370 	 * when doing MSI-X
371 	 */
372 	struct if_irq		irq;
373 	void			*tag;
374 	struct resource		*res;
375 
376 	struct ifmedia		*media;
377 	int			if_flags;
378 	int			msix;
379 
380 	u16			num_vlans;
381 
382 	/*
383 	 * Shadow VFTA table, this is needed because
384 	 * the real vlan filter table gets cleared during
385 	 * a soft reset and the driver needs to be able
386 	 * to repopulate it.
387 	 */
388 	u32			shadow_vfta[IXGBE_VFTA_SIZE];
389 
390 	/* Info about the interface */
391 	int			advertise;	/* link speeds */
392 	int			enable_aim;	/* adaptive interrupt moderation */
393 	bool			link_active;
394 	u16			num_segs;
395 	u32			link_speed;
396 	bool			link_up;
397 	bool			link_enabled;
398 	u32			vector;
399 	u16			dmac;
400 	u32			phy_layer;
401 
402 	/* Power management-related */
403 	bool			wol_support;
404 	u32			wufc;
405 
406 	/* Mbuf cluster size */
407 	u32			rx_mbuf_sz;
408 
409 	/* Support for pluggable optics */
410 	bool			sfp_probe;
411 
412 	/* Flow Director */
413 	int			fdir_reinit;
414 
415 	u32			task_requests;
416 
417 	/*
418 	 * Queues:
419 	 *   This is the irq holder, it has
420 	 *   and RX/TX pair or rings associated
421 	 *   with it.
422 	 */
423 	struct ix_tx_queue	*tx_queues;
424 	struct ix_rx_queue	*rx_queues;
425 
426 	/* Multicast array memory */
427 	struct ixgbe_mc_addr	*mta;
428 
429 	/* SR-IOV */
430 	int			iov_mode;
431 	int			num_vfs;
432 	int			pool;
433 	struct ixgbe_vf		*vfs;
434 
435 	/* Bypass */
436 	struct ixgbe_bp_data	bypass;
437 
438 	/* Misc stats maintained by the driver */
439 	unsigned long		dropped_pkts;
440 	unsigned long		mbuf_header_failed;
441 	unsigned long		mbuf_packet_failed;
442 	unsigned long		watchdog_events;
443 	unsigned long		link_irq;
444 	union {
445 		struct ixgbe_hw_stats pf;
446 		struct ixgbevf_hw_stats vf;
447 	} stats;
448 
449 	/* counter(9) stats */
450 	u64			ipackets;
451 	u64			ierrors;
452 	u64			opackets;
453 	u64			oerrors;
454 	u64			ibytes;
455 	u64			obytes;
456 	u64			imcasts;
457 	u64			omcasts;
458 	u64			iqdrops;
459 	u64			noproto;
460 
461 	/* Feature capable/enabled flags.  See ixgbe_features.h */
462 	u32			feat_cap;
463 	u32			feat_en;
464 };
465 
466 /* Precision Time Sync (IEEE 1588) defines */
467 #define ETHERTYPE_IEEE1588		0x88F7
468 #define PICOSECS_PER_TICK		20833
469 #define TSYNC_UDP_PORT			319 /* UDP port for the protocol */
470 #define IXGBE_ADVTXD_TSTAMP		0x00080000
471 
472 /* Stats macros */
473 #define IXGBE_SET_IPACKETS(sc, count)	(sc)->ipackets = (count)
474 #define IXGBE_SET_IERRORS(sc, count)	(sc)->ierrors = (count)
475 #define IXGBE_SET_OPACKETS(sc, count)	(sc)->opackets = (count)
476 #define IXGBE_SET_OERRORS(sc, count)	(sc)->oerrors = (count)
477 #define IXGBE_SET_COLLISIONS(sc, count)
478 #define IXGBE_SET_IBYTES(sc, count)	(sc)->ibytes = (count)
479 #define IXGBE_SET_OBYTES(sc, count)	(sc)->obytes = (count)
480 #define IXGBE_SET_IMCASTS(sc, count)	(sc)->imcasts = (count)
481 #define IXGBE_SET_OMCASTS(sc, count)	(sc)->omcasts = (count)
482 #define IXGBE_SET_IQDROPS(sc, count)	(sc)->iqdrops = (count)
483 
484 /* External PHY register addresses */
485 #define IXGBE_PHY_CURRENT_TEMP		0xC820
486 #define IXGBE_PHY_OVERTEMP_STATUS	0xC830
487 
488 /* Sysctl help messages; displayed with sysctl -d */
489 #define IXGBE_SYSCTL_DESC_ADV_SPEED	\
490     "\nControl advertised link speed using these flags:\n" \
491     "\t0x1 - advertise 100M\n" \
492     "\t0x2 - advertise 1G\n" \
493     "\t0x4 - advertise 10G\n" \
494     "\t0x8 - advertise 10M\n\n" \
495     "\t0x10  - advertise 2.5G\n" \
496     "\t0x20  - advertise 5G\n\n" \
497     "\t100M and 10M are only supported on certain adapters.\n"
498 
499 #define IXGBE_SYSCTL_DESC_SET_FC	\
500     "\nSet flow control mode using these values:\n" \
501     "\t0 - off\n" \
502     "\t1 - rx pause\n" \
503     "\t2 - tx pause\n" \
504     "\t3 - tx and rx pause"
505 
506 #define IXGBE_SYSCTL_DESC_RX_ERRS	\
507     "\nSum of the following RX errors counters:\n" \
508     " * CRC errors,\n" \
509     " * illegal byte error count,\n" \
510     " * missed packet count,\n" \
511     " * length error count,\n" \
512     " * undersized packets count,\n" \
513     " * fragmented packets count,\n" \
514     " * oversized packets count,\n" \
515     " * jabber count."
516 
517 /*
518  * This checks for a zero mac addr, something that will be likely
519  * unless the Admin on the Host has created one.
520  */
521 static inline bool
522 ixv_check_ether_addr(u8 *addr)
523 {
524 	bool status = true;
525 
526 	if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
527 	    addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
528 		status = false;
529 
530 	return (status);
531 }
532 
533 uint64_t ixgbe_link_speed_to_baudrate(ixgbe_link_speed speed);
534 
535 /* Shared Prototypes */
536 
537 int  ixgbe_allocate_queues(struct ixgbe_softc *);
538 int  ixgbe_setup_transmit_structures(struct ixgbe_softc *);
539 void ixgbe_free_transmit_structures(struct ixgbe_softc *);
540 int  ixgbe_setup_receive_structures(struct ixgbe_softc *);
541 void ixgbe_free_receive_structures(struct ixgbe_softc *);
542 int  ixgbe_get_regs(SYSCTL_HANDLER_ARGS);
543 
544 #include "ixgbe_bypass.h"
545 #include "ixgbe_fdir.h"
546 #include "ixgbe_rss.h"
547 
548 #endif /* _IXGBE_H_ */
549