1 /****************************************************************************** 2 3 Copyright (c) 2001-2012, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef _IXGBE_H_ 37 #define _IXGBE_H_ 38 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #if __FreeBSD_version >= 800000 43 #include <sys/buf_ring.h> 44 #endif 45 #include <sys/mbuf.h> 46 #include <sys/protosw.h> 47 #include <sys/socket.h> 48 #include <sys/malloc.h> 49 #include <sys/kernel.h> 50 #include <sys/module.h> 51 #include <sys/sockio.h> 52 53 #include <net/if.h> 54 #include <net/if_arp.h> 55 #include <net/bpf.h> 56 #include <net/ethernet.h> 57 #include <net/if_dl.h> 58 #include <net/if_media.h> 59 60 #include <net/bpf.h> 61 #include <net/if_types.h> 62 #include <net/if_vlan_var.h> 63 64 #include <netinet/in_systm.h> 65 #include <netinet/in.h> 66 #include <netinet/if_ether.h> 67 #include <netinet/ip.h> 68 #include <netinet/ip6.h> 69 #include <netinet/tcp.h> 70 #include <netinet/tcp_lro.h> 71 #include <netinet/udp.h> 72 73 #include <machine/in_cksum.h> 74 75 #include <sys/bus.h> 76 #include <machine/bus.h> 77 #include <sys/rman.h> 78 #include <machine/resource.h> 79 #include <vm/vm.h> 80 #include <vm/pmap.h> 81 #include <machine/clock.h> 82 #include <dev/pci/pcivar.h> 83 #include <dev/pci/pcireg.h> 84 #include <sys/proc.h> 85 #include <sys/sysctl.h> 86 #include <sys/endian.h> 87 #include <sys/taskqueue.h> 88 #include <sys/pcpu.h> 89 #include <sys/smp.h> 90 #include <machine/smp.h> 91 92 #ifdef IXGBE_IEEE1588 93 #include <sys/ieee1588.h> 94 #endif 95 96 #include "ixgbe_api.h" 97 98 /* Tunables */ 99 100 /* 101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 102 * number of transmit descriptors allocated by the driver. Increasing this 103 * value allows the driver to queue more transmits. Each descriptor is 16 104 * bytes. Performance tests have show the 2K value to be optimal for top 105 * performance. 106 */ 107 #define DEFAULT_TXD 1024 108 #define PERFORM_TXD 2048 109 #define MAX_TXD 4096 110 #define MIN_TXD 64 111 112 /* 113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 114 * number of receive descriptors allocated for each RX queue. Increasing this 115 * value allows the driver to buffer more incoming packets. Each descriptor 116 * is 16 bytes. A receive buffer is also allocated for each descriptor. 117 * 118 * Note: with 8 rings and a dual port card, it is possible to bump up 119 * against the system mbuf pool limit, you can tune nmbclusters 120 * to adjust for this. 121 */ 122 #define DEFAULT_RXD 1024 123 #define PERFORM_RXD 2048 124 #define MAX_RXD 4096 125 #define MIN_RXD 64 126 127 /* Alignment for rings */ 128 #define DBA_ALIGN 128 129 130 /* 131 * This parameter controls the maximum no of times the driver will loop in 132 * the isr. Minimum Value = 1 133 */ 134 #define MAX_LOOP 10 135 136 /* 137 * This is the max watchdog interval, ie. the time that can 138 * pass between any two TX clean operations, such only happening 139 * when the TX hardware is functioning. 140 */ 141 #define IXGBE_WATCHDOG (10 * hz) 142 143 /* 144 * This parameters control when the driver calls the routine to reclaim 145 * transmit descriptors. 146 */ 147 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 148 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 149 150 #define IXGBE_MAX_FRAME_SIZE 0x3F00 151 152 /* Flow control constants */ 153 #define IXGBE_FC_PAUSE 0xFFFF 154 #define IXGBE_FC_HI 0x20000 155 #define IXGBE_FC_LO 0x10000 156 157 /* Keep older OS drivers building... */ 158 #if !defined(SYSCTL_ADD_UQUAD) 159 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 160 #endif 161 162 /* Defines for printing debug information */ 163 #define DEBUG_INIT 0 164 #define DEBUG_IOCTL 0 165 #define DEBUG_HW 0 166 167 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 168 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 169 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 170 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 171 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 172 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 173 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 174 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 175 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 176 177 #define MAX_NUM_MULTICAST_ADDRESSES 128 178 #define IXGBE_82598_SCATTER 100 179 #define IXGBE_82599_SCATTER 32 180 #define MSIX_82598_BAR 3 181 #define MSIX_82599_BAR 4 182 #define IXGBE_TSO_SIZE 262140 183 #define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 184 #define IXGBE_RX_HDR 128 185 #define IXGBE_VFTA_SIZE 128 186 #define IXGBE_BR_SIZE 4096 187 #define IXGBE_QUEUE_MIN_FREE 32 188 #define IXGBE_QUEUE_IDLE 1 189 #define IXGBE_QUEUE_WORKING 2 190 #define IXGBE_QUEUE_HUNG 4 191 #define IXGBE_QUEUE_DEPLETED 8 192 193 /* Offload bits in mbuf flag */ 194 #if __FreeBSD_version >= 800000 195 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 196 #else 197 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 198 #endif 199 200 /* For 6.X code compatibility */ 201 #if !defined(ETHER_BPF_MTAP) 202 #define ETHER_BPF_MTAP BPF_MTAP 203 #endif 204 205 #if __FreeBSD_version < 700000 206 #define CSUM_TSO 0 207 #define IFCAP_TSO4 0 208 #endif 209 210 /* 211 * Interrupt Moderation parameters 212 */ 213 #define IXGBE_LOW_LATENCY 128 214 #define IXGBE_AVE_LATENCY 400 215 #define IXGBE_BULK_LATENCY 1200 216 #define IXGBE_LINK_ITR 2000 217 218 /* 219 ***************************************************************************** 220 * vendor_info_array 221 * 222 * This array contains the list of Subvendor/Subdevice IDs on which the driver 223 * should load. 224 * 225 ***************************************************************************** 226 */ 227 typedef struct _ixgbe_vendor_info_t { 228 unsigned int vendor_id; 229 unsigned int device_id; 230 unsigned int subvendor_id; 231 unsigned int subdevice_id; 232 unsigned int index; 233 } ixgbe_vendor_info_t; 234 235 236 struct ixgbe_tx_buf { 237 u32 eop_index; 238 struct mbuf *m_head; 239 bus_dmamap_t map; 240 }; 241 242 struct ixgbe_rx_buf { 243 struct mbuf *m_head; 244 struct mbuf *m_pack; 245 struct mbuf *fmp; 246 bus_dmamap_t hmap; 247 bus_dmamap_t pmap; 248 }; 249 250 /* 251 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 252 */ 253 struct ixgbe_dma_alloc { 254 bus_addr_t dma_paddr; 255 caddr_t dma_vaddr; 256 bus_dma_tag_t dma_tag; 257 bus_dmamap_t dma_map; 258 bus_dma_segment_t dma_seg; 259 bus_size_t dma_size; 260 int dma_nseg; 261 }; 262 263 /* 264 ** Driver queue struct: this is the interrupt container 265 ** for the associated tx and rx ring. 266 */ 267 struct ix_queue { 268 struct adapter *adapter; 269 u32 msix; /* This queue's MSIX vector */ 270 u32 eims; /* This queue's EIMS bit */ 271 u32 eitr_setting; 272 struct resource *res; 273 void *tag; 274 struct tx_ring *txr; 275 struct rx_ring *rxr; 276 struct task que_task; 277 struct taskqueue *tq; 278 u64 irqs; 279 }; 280 281 /* 282 * The transmit ring, one per queue 283 */ 284 struct tx_ring { 285 struct adapter *adapter; 286 struct mtx tx_mtx; 287 u32 me; 288 int queue_status; 289 int watchdog_time; 290 union ixgbe_adv_tx_desc *tx_base; 291 struct ixgbe_dma_alloc txdma; 292 u32 next_avail_desc; 293 u32 next_to_clean; 294 struct ixgbe_tx_buf *tx_buffers; 295 volatile u16 tx_avail; 296 u32 txd_cmd; 297 bus_dma_tag_t txtag; 298 char mtx_name[16]; 299 #if __FreeBSD_version >= 800000 300 struct buf_ring *br; 301 #endif 302 #ifdef IXGBE_FDIR 303 u16 atr_sample; 304 u16 atr_count; 305 #endif 306 u32 bytes; /* used for AIM */ 307 u32 packets; 308 /* Soft Stats */ 309 u64 no_desc_avail; 310 u64 total_packets; 311 }; 312 313 314 /* 315 * The Receive ring, one per rx queue 316 */ 317 struct rx_ring { 318 struct adapter *adapter; 319 struct mtx rx_mtx; 320 u32 me; 321 union ixgbe_adv_rx_desc *rx_base; 322 struct ixgbe_dma_alloc rxdma; 323 struct lro_ctrl lro; 324 bool lro_enabled; 325 bool hdr_split; 326 bool hw_rsc; 327 bool discard; 328 bool vtag_strip; 329 u32 next_to_refresh; 330 u32 next_to_check; 331 char mtx_name[16]; 332 struct ixgbe_rx_buf *rx_buffers; 333 bus_dma_tag_t htag; 334 bus_dma_tag_t ptag; 335 336 u32 bytes; /* Used for AIM calc */ 337 u32 packets; 338 339 /* Soft stats */ 340 u64 rx_irq; 341 u64 rx_split_packets; 342 u64 rx_packets; 343 u64 rx_bytes; 344 u64 rx_discarded; 345 u64 rsc_num; 346 #ifdef IXGBE_FDIR 347 u64 flm; 348 #endif 349 }; 350 351 /* Our adapter structure */ 352 struct adapter { 353 struct ifnet *ifp; 354 struct ixgbe_hw hw; 355 356 struct ixgbe_osdep osdep; 357 struct device *dev; 358 359 struct resource *pci_mem; 360 struct resource *msix_mem; 361 362 /* 363 * Interrupt resources: this set is 364 * either used for legacy, or for Link 365 * when doing MSIX 366 */ 367 void *tag; 368 struct resource *res; 369 370 struct ifmedia media; 371 struct callout timer; 372 int msix; 373 int if_flags; 374 375 struct mtx core_mtx; 376 377 eventhandler_tag vlan_attach; 378 eventhandler_tag vlan_detach; 379 380 u16 num_vlans; 381 u16 num_queues; 382 383 /* 384 ** Shadow VFTA table, this is needed because 385 ** the real vlan filter table gets cleared during 386 ** a soft reset and the driver needs to be able 387 ** to repopulate it. 388 */ 389 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 390 391 /* Info about the interface */ 392 u32 optics; 393 u32 fc; /* local flow ctrl setting */ 394 int advertise; /* link speeds */ 395 bool link_active; 396 u16 max_frame_size; 397 u16 num_segs; 398 u32 link_speed; 399 bool link_up; 400 u32 linkvec; 401 402 /* Mbuf cluster size */ 403 u32 rx_mbuf_sz; 404 405 /* Support for pluggable optics */ 406 bool sfp_probe; 407 struct task link_task; /* Link tasklet */ 408 struct task mod_task; /* SFP tasklet */ 409 struct task msf_task; /* Multispeed Fiber */ 410 #ifdef IXGBE_FDIR 411 int fdir_reinit; 412 struct task fdir_task; 413 #endif 414 struct taskqueue *tq; 415 416 /* 417 ** Queues: 418 ** This is the irq holder, it has 419 ** and RX/TX pair or rings associated 420 ** with it. 421 */ 422 struct ix_queue *queues; 423 424 /* 425 * Transmit rings: 426 * Allocated at run time, an array of rings. 427 */ 428 struct tx_ring *tx_rings; 429 int num_tx_desc; 430 431 /* 432 * Receive rings: 433 * Allocated at run time, an array of rings. 434 */ 435 struct rx_ring *rx_rings; 436 int num_rx_desc; 437 u64 que_mask; 438 u32 rx_process_limit; 439 440 /* Multicast array memory */ 441 u8 *mta; 442 443 /* Misc stats maintained by the driver */ 444 unsigned long dropped_pkts; 445 unsigned long mbuf_defrag_failed; 446 unsigned long mbuf_header_failed; 447 unsigned long mbuf_packet_failed; 448 unsigned long no_tx_map_avail; 449 unsigned long no_tx_dma_setup; 450 unsigned long watchdog_events; 451 unsigned long tso_tx; 452 unsigned long link_irq; 453 454 struct ixgbe_hw_stats stats; 455 }; 456 457 /* Precision Time Sync (IEEE 1588) defines */ 458 #define ETHERTYPE_IEEE1588 0x88F7 459 #define PICOSECS_PER_TICK 20833 460 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 461 #define IXGBE_ADVTXD_TSTAMP 0x00080000 462 463 464 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 465 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 466 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 467 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 468 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 469 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 470 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 471 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 472 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 473 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 474 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 475 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 476 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 477 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 478 479 480 static inline bool 481 ixgbe_is_sfp(struct ixgbe_hw *hw) 482 { 483 switch (hw->phy.type) { 484 case ixgbe_phy_sfp_avago: 485 case ixgbe_phy_sfp_ftl: 486 case ixgbe_phy_sfp_intel: 487 case ixgbe_phy_sfp_unknown: 488 case ixgbe_phy_sfp_passive_tyco: 489 case ixgbe_phy_sfp_passive_unknown: 490 return TRUE; 491 default: 492 return FALSE; 493 } 494 } 495 496 /* Workaround to make 8.0 buildable */ 497 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 498 static __inline int 499 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 500 { 501 #ifdef ALTQ 502 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 503 return (1); 504 #endif 505 return (!buf_ring_empty(br)); 506 } 507 #endif 508 509 /* 510 ** Find the number of unrefreshed RX descriptors 511 */ 512 static inline u16 513 ixgbe_rx_unrefreshed(struct rx_ring *rxr) 514 { 515 struct adapter *adapter = rxr->adapter; 516 517 if (rxr->next_to_check > rxr->next_to_refresh) 518 return (rxr->next_to_check - rxr->next_to_refresh - 1); 519 else 520 return ((adapter->num_rx_desc + rxr->next_to_check) - 521 rxr->next_to_refresh - 1); 522 } 523 524 #endif /* _IXGBE_H_ */ 525