xref: /freebsd/sys/dev/ixgbe/ixgbe.h (revision 4ce386ff25d77954b8cfa11534f632172e848244)
1 /******************************************************************************
2 
3   Copyright (c) 2001-2013, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
8 
9    1. Redistributions of source code must retain the above copyright notice,
10       this list of conditions and the following disclaimer.
11 
12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
16    3. Neither the name of the Intel Corporation nor the names of its
17       contributors may be used to endorse or promote products derived from
18       this software without specific prior written permission.
19 
20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30   POSSIBILITY OF SUCH DAMAGE.
31 
32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 
36 #ifndef _IXGBE_H_
37 #define _IXGBE_H_
38 
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #ifndef IXGBE_LEGACY_TX
43 #include <sys/buf_ring.h>
44 #endif
45 #include <sys/mbuf.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/sockio.h>
52 #include <sys/eventhandler.h>
53 
54 #include <net/if.h>
55 #include <net/if_var.h>
56 #include <net/if_arp.h>
57 #include <net/bpf.h>
58 #include <net/ethernet.h>
59 #include <net/if_dl.h>
60 #include <net/if_media.h>
61 
62 #include <net/bpf.h>
63 #include <net/if_types.h>
64 #include <net/if_vlan_var.h>
65 
66 #include <netinet/in_systm.h>
67 #include <netinet/in.h>
68 #include <netinet/if_ether.h>
69 #include <netinet/ip.h>
70 #include <netinet/ip6.h>
71 #include <netinet/tcp.h>
72 #include <netinet/tcp_lro.h>
73 #include <netinet/udp.h>
74 
75 #include <machine/in_cksum.h>
76 
77 #include <sys/bus.h>
78 #include <machine/bus.h>
79 #include <sys/rman.h>
80 #include <machine/resource.h>
81 #include <vm/vm.h>
82 #include <vm/pmap.h>
83 #include <machine/clock.h>
84 #include <dev/pci/pcivar.h>
85 #include <dev/pci/pcireg.h>
86 #include <sys/proc.h>
87 #include <sys/sysctl.h>
88 #include <sys/endian.h>
89 #include <sys/taskqueue.h>
90 #include <sys/pcpu.h>
91 #include <sys/smp.h>
92 #include <machine/smp.h>
93 
94 #include "ixgbe_api.h"
95 
96 /* Tunables */
97 
98 /*
99  * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
100  * number of transmit descriptors allocated by the driver. Increasing this
101  * value allows the driver to queue more transmits. Each descriptor is 16
102  * bytes. Performance tests have show the 2K value to be optimal for top
103  * performance.
104  */
105 #define DEFAULT_TXD	1024
106 #define PERFORM_TXD	2048
107 #define MAX_TXD		4096
108 #define MIN_TXD		64
109 
110 /*
111  * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
112  * number of receive descriptors allocated for each RX queue. Increasing this
113  * value allows the driver to buffer more incoming packets. Each descriptor
114  * is 16 bytes.  A receive buffer is also allocated for each descriptor.
115  *
116  * Note: with 8 rings and a dual port card, it is possible to bump up
117  *	against the system mbuf pool limit, you can tune nmbclusters
118  *	to adjust for this.
119  */
120 #define DEFAULT_RXD	1024
121 #define PERFORM_RXD	2048
122 #define MAX_RXD		4096
123 #define MIN_RXD		64
124 
125 /* Alignment for rings */
126 #define DBA_ALIGN	128
127 
128 /*
129  * This parameter controls the maximum no of times the driver will loop in
130  * the isr. Minimum Value = 1
131  */
132 #define MAX_LOOP	10
133 
134 /*
135  * This is the max watchdog interval, ie. the time that can
136  * pass between any two TX clean operations, such only happening
137  * when the TX hardware is functioning.
138  */
139 #define IXGBE_WATCHDOG                   (10 * hz)
140 
141 /*
142  * This parameters control when the driver calls the routine to reclaim
143  * transmit descriptors.
144  */
145 #define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
146 #define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
147 
148 #define IXGBE_MAX_FRAME_SIZE	0x3F00
149 
150 /* Flow control constants */
151 #define IXGBE_FC_PAUSE		0xFFFF
152 #define IXGBE_FC_HI		0x20000
153 #define IXGBE_FC_LO		0x10000
154 
155 /*
156  * Used for optimizing small rx mbufs.  Effort is made to keep the copy
157  * small and aligned for the CPU L1 cache.
158  *
159  * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
160  * 32 byte alignment needed for the fast bcopy results in 8 bytes being
161  * wasted.  Getting 64 byte alignment, which _should_ be ideal for
162  * modern Intel CPUs, results in 40 bytes wasted and a significant drop
163  * in observed efficiency of the optimization, 97.9% -> 81.8%.
164  */
165 #define IXGBE_RX_COPY_HDR_PADDED	((((MPKTHSIZE - 1) / 32) + 1) * 32)
166 #define IXGBE_RX_COPY_LEN		(MSIZE - IXGBE_RX_COPY_HDR_PADDED)
167 #define IXGBE_RX_COPY_ALIGN		(IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
168 
169 /* Keep older OS drivers building... */
170 #if !defined(SYSCTL_ADD_UQUAD)
171 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
172 #endif
173 
174 /* Defines for printing debug information */
175 #define DEBUG_INIT  0
176 #define DEBUG_IOCTL 0
177 #define DEBUG_HW    0
178 
179 #define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
180 #define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
181 #define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
182 #define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
183 #define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
184 #define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
185 #define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
186 #define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
187 #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
188 
189 #define MAX_NUM_MULTICAST_ADDRESSES     128
190 #define IXGBE_82598_SCATTER		100
191 #define IXGBE_82599_SCATTER		32
192 #define MSIX_82598_BAR			3
193 #define MSIX_82599_BAR			4
194 #define IXGBE_TSO_SIZE			262140
195 #define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
196 #define IXGBE_RX_HDR			128
197 #define IXGBE_VFTA_SIZE			128
198 #define IXGBE_BR_SIZE			4096
199 #define IXGBE_QUEUE_MIN_FREE		32
200 
201 /* Offload bits in mbuf flag */
202 #if __FreeBSD_version >= 800000
203 #define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
204 #else
205 #define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP)
206 #endif
207 
208 /*
209  * Interrupt Moderation parameters
210  */
211 #define IXGBE_LOW_LATENCY	128
212 #define IXGBE_AVE_LATENCY	400
213 #define IXGBE_BULK_LATENCY	1200
214 #define IXGBE_LINK_ITR		2000
215 
216 
217 /*
218  *****************************************************************************
219  * vendor_info_array
220  *
221  * This array contains the list of Subvendor/Subdevice IDs on which the driver
222  * should load.
223  *
224  *****************************************************************************
225  */
226 typedef struct _ixgbe_vendor_info_t {
227 	unsigned int    vendor_id;
228 	unsigned int    device_id;
229 	unsigned int    subvendor_id;
230 	unsigned int    subdevice_id;
231 	unsigned int    index;
232 } ixgbe_vendor_info_t;
233 
234 struct ixgbe_tx_buf {
235 	union ixgbe_adv_tx_desc	*eop;
236 	struct mbuf	*m_head;
237 	bus_dmamap_t	map;
238 };
239 
240 struct ixgbe_rx_buf {
241 	struct mbuf	*buf;
242 	struct mbuf	*fmp;
243 	bus_dmamap_t	pmap;
244 	u_int		flags;
245 #define IXGBE_RX_COPY	0x01
246 	uint64_t	addr;
247 };
248 
249 /*
250  * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
251  */
252 struct ixgbe_dma_alloc {
253 	bus_addr_t		dma_paddr;
254 	caddr_t			dma_vaddr;
255 	bus_dma_tag_t		dma_tag;
256 	bus_dmamap_t		dma_map;
257 	bus_dma_segment_t	dma_seg;
258 	bus_size_t		dma_size;
259 	int			dma_nseg;
260 };
261 
262 /*
263 ** Driver queue struct: this is the interrupt container
264 **  for the associated tx and rx ring.
265 */
266 struct ix_queue {
267 	struct adapter		*adapter;
268 	u32			msix;           /* This queue's MSIX vector */
269 	u32			eims;           /* This queue's EIMS bit */
270 	u32			eitr_setting;
271 	struct resource		*res;
272 	void			*tag;
273 	struct tx_ring		*txr;
274 	struct rx_ring		*rxr;
275 	struct task		que_task;
276 	struct taskqueue	*tq;
277 	u64			irqs;
278 };
279 
280 /*
281  * The transmit ring, one per queue
282  */
283 struct tx_ring {
284         struct adapter		*adapter;
285 	struct mtx		tx_mtx;
286 	u32			me;
287 	int			watchdog_time;
288 	union ixgbe_adv_tx_desc	*tx_base;
289 	struct ixgbe_tx_buf	*tx_buffers;
290 	struct ixgbe_dma_alloc	txdma;
291 	volatile u16		tx_avail;
292 	u16			next_avail_desc;
293 	u16			next_to_clean;
294 	u16			process_limit;
295 	u16			num_desc;
296 	enum {
297 	    IXGBE_QUEUE_IDLE,
298 	    IXGBE_QUEUE_WORKING,
299 	    IXGBE_QUEUE_HUNG,
300 	}			queue_status;
301 	u32			txd_cmd;
302 	bus_dma_tag_t		txtag;
303 	char			mtx_name[16];
304 #ifndef IXGBE_LEGACY_TX
305 	struct buf_ring		*br;
306 	struct task		txq_task;
307 #endif
308 #ifdef IXGBE_FDIR
309 	u16			atr_sample;
310 	u16			atr_count;
311 #endif
312 	u32			bytes;  /* used for AIM */
313 	u32			packets;
314 	/* Soft Stats */
315 	unsigned long   	tso_tx;
316 	unsigned long   	no_tx_map_avail;
317 	unsigned long   	no_tx_dma_setup;
318 	u64			no_desc_avail;
319 	u64			total_packets;
320 };
321 
322 
323 /*
324  * The Receive ring, one per rx queue
325  */
326 struct rx_ring {
327         struct adapter		*adapter;
328 	struct mtx		rx_mtx;
329 	u32			me;
330 	union ixgbe_adv_rx_desc	*rx_base;
331 	struct ixgbe_dma_alloc	rxdma;
332 	struct lro_ctrl		lro;
333 	bool			lro_enabled;
334 	bool			hw_rsc;
335 	bool			vtag_strip;
336         u16			next_to_refresh;
337         u16 			next_to_check;
338 	u16			num_desc;
339 	u16			mbuf_sz;
340 	u16			process_limit;
341 	char			mtx_name[16];
342 	struct ixgbe_rx_buf	*rx_buffers;
343 	bus_dma_tag_t		ptag;
344 
345 	u32			bytes; /* Used for AIM calc */
346 	u32			packets;
347 
348 	/* Soft stats */
349 	u64			rx_irq;
350 	u64			rx_copies;
351 	u64			rx_packets;
352 	u64 			rx_bytes;
353 	u64 			rx_discarded;
354 	u64 			rsc_num;
355 #ifdef IXGBE_FDIR
356 	u64			flm;
357 #endif
358 };
359 
360 /* Our adapter structure */
361 struct adapter {
362 	struct ifnet		*ifp;
363 	struct ixgbe_hw		hw;
364 
365 	struct ixgbe_osdep	osdep;
366 	struct device		*dev;
367 
368 	struct resource		*pci_mem;
369 	struct resource		*msix_mem;
370 
371 	/*
372 	 * Interrupt resources: this set is
373 	 * either used for legacy, or for Link
374 	 * when doing MSIX
375 	 */
376 	void			*tag;
377 	struct resource 	*res;
378 
379 	struct ifmedia		media;
380 	struct callout		timer;
381 	int			msix;
382 	int			if_flags;
383 
384 	struct mtx		core_mtx;
385 
386 	eventhandler_tag 	vlan_attach;
387 	eventhandler_tag 	vlan_detach;
388 
389 	u16			num_vlans;
390 	u16			num_queues;
391 
392 	/*
393 	** Shadow VFTA table, this is needed because
394 	** the real vlan filter table gets cleared during
395 	** a soft reset and the driver needs to be able
396 	** to repopulate it.
397 	*/
398 	u32			shadow_vfta[IXGBE_VFTA_SIZE];
399 
400 	/* Info about the interface */
401 	u32			optics;
402 	u32			fc; /* local flow ctrl setting */
403 	int			advertise;  /* link speeds */
404 	bool			link_active;
405 	u16			max_frame_size;
406 	u16			num_segs;
407 	u32			link_speed;
408 	bool			link_up;
409 	u32 			linkvec;
410 
411 	/* Mbuf cluster size */
412 	u32			rx_mbuf_sz;
413 
414 	/* Support for pluggable optics */
415 	bool			sfp_probe;
416 	struct task     	link_task;  /* Link tasklet */
417 	struct task     	mod_task;   /* SFP tasklet */
418 	struct task     	msf_task;   /* Multispeed Fiber */
419 #ifdef IXGBE_FDIR
420 	int			fdir_reinit;
421 	struct task     	fdir_task;
422 #endif
423 	struct taskqueue	*tq;
424 
425 	/*
426 	** Queues:
427 	**   This is the irq holder, it has
428 	**   and RX/TX pair or rings associated
429 	**   with it.
430 	*/
431 	struct ix_queue		*queues;
432 
433 	/*
434 	 * Transmit rings:
435 	 *	Allocated at run time, an array of rings.
436 	 */
437 	struct tx_ring		*tx_rings;
438 	u32			num_tx_desc;
439 
440 	/*
441 	 * Receive rings:
442 	 *	Allocated at run time, an array of rings.
443 	 */
444 	struct rx_ring		*rx_rings;
445 	u64			que_mask;
446 	u32			num_rx_desc;
447 
448 	/* Multicast array memory */
449 	u8			*mta;
450 
451 
452 	/* Misc stats maintained by the driver */
453 	unsigned long   	dropped_pkts;
454 	unsigned long   	mbuf_defrag_failed;
455 	unsigned long   	mbuf_header_failed;
456 	unsigned long   	mbuf_packet_failed;
457 	unsigned long   	watchdog_events;
458 	unsigned long		link_irq;
459 
460 	struct ixgbe_hw_stats 	stats;
461 };
462 
463 
464 /* Precision Time Sync (IEEE 1588) defines */
465 #define ETHERTYPE_IEEE1588      0x88F7
466 #define PICOSECS_PER_TICK       20833
467 #define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
468 #define IXGBE_ADVTXD_TSTAMP	0x00080000
469 
470 
471 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
472         mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
473 #define IXGBE_CORE_LOCK_DESTROY(_sc)      mtx_destroy(&(_sc)->core_mtx)
474 #define IXGBE_TX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->tx_mtx)
475 #define IXGBE_RX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->rx_mtx)
476 #define IXGBE_CORE_LOCK(_sc)              mtx_lock(&(_sc)->core_mtx)
477 #define IXGBE_TX_LOCK(_sc)                mtx_lock(&(_sc)->tx_mtx)
478 #define IXGBE_TX_TRYLOCK(_sc)             mtx_trylock(&(_sc)->tx_mtx)
479 #define IXGBE_RX_LOCK(_sc)                mtx_lock(&(_sc)->rx_mtx)
480 #define IXGBE_CORE_UNLOCK(_sc)            mtx_unlock(&(_sc)->core_mtx)
481 #define IXGBE_TX_UNLOCK(_sc)              mtx_unlock(&(_sc)->tx_mtx)
482 #define IXGBE_RX_UNLOCK(_sc)              mtx_unlock(&(_sc)->rx_mtx)
483 #define IXGBE_CORE_LOCK_ASSERT(_sc)       mtx_assert(&(_sc)->core_mtx, MA_OWNED)
484 #define IXGBE_TX_LOCK_ASSERT(_sc)         mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
485 
486 /* For backward compatibility */
487 #if !defined(PCIER_LINK_STA)
488 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
489 #endif
490 
491 static inline bool
492 ixgbe_is_sfp(struct ixgbe_hw *hw)
493 {
494 	switch (hw->phy.type) {
495 	case ixgbe_phy_sfp_avago:
496 	case ixgbe_phy_sfp_ftl:
497 	case ixgbe_phy_sfp_intel:
498 	case ixgbe_phy_sfp_unknown:
499 	case ixgbe_phy_sfp_passive_tyco:
500 	case ixgbe_phy_sfp_passive_unknown:
501 		return TRUE;
502 	default:
503 		return FALSE;
504 	}
505 }
506 
507 /* Workaround to make 8.0 buildable */
508 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
509 static __inline int
510 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
511 {
512 #ifdef ALTQ
513         if (ALTQ_IS_ENABLED(&ifp->if_snd))
514                 return (1);
515 #endif
516         return (!buf_ring_empty(br));
517 }
518 #endif
519 
520 /*
521 ** Find the number of unrefreshed RX descriptors
522 */
523 static inline u16
524 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
525 {
526 	if (rxr->next_to_check > rxr->next_to_refresh)
527 		return (rxr->next_to_check - rxr->next_to_refresh - 1);
528 	else
529 		return ((rxr->num_desc + rxr->next_to_check) -
530 		    rxr->next_to_refresh - 1);
531 }
532 
533 #endif /* _IXGBE_H_ */
534