1 /****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef _IXGBE_H_ 37 #define _IXGBE_H_ 38 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #ifndef IXGBE_LEGACY_TX 43 #include <sys/buf_ring.h> 44 #endif 45 #include <sys/mbuf.h> 46 #include <sys/protosw.h> 47 #include <sys/socket.h> 48 #include <sys/malloc.h> 49 #include <sys/kernel.h> 50 #include <sys/module.h> 51 #include <sys/sockio.h> 52 #include <sys/eventhandler.h> 53 54 #include <net/if.h> 55 #include <net/if_var.h> 56 #include <net/if_arp.h> 57 #include <net/bpf.h> 58 #include <net/ethernet.h> 59 #include <net/if_dl.h> 60 #include <net/if_media.h> 61 62 #include <net/bpf.h> 63 #include <net/if_types.h> 64 #include <net/if_vlan_var.h> 65 66 #include <netinet/in_systm.h> 67 #include <netinet/in.h> 68 #include <netinet/if_ether.h> 69 #include <netinet/ip.h> 70 #include <netinet/ip6.h> 71 #include <netinet/tcp.h> 72 #include <netinet/tcp_lro.h> 73 #include <netinet/udp.h> 74 75 #include <machine/in_cksum.h> 76 77 #include <sys/bus.h> 78 #include <machine/bus.h> 79 #include <sys/rman.h> 80 #include <machine/resource.h> 81 #include <vm/vm.h> 82 #include <vm/pmap.h> 83 #include <machine/clock.h> 84 #include <dev/pci/pcivar.h> 85 #include <dev/pci/pcireg.h> 86 #include <sys/proc.h> 87 #include <sys/sysctl.h> 88 #include <sys/endian.h> 89 #include <sys/taskqueue.h> 90 #include <sys/pcpu.h> 91 #include <sys/smp.h> 92 #include <machine/smp.h> 93 94 #include "ixgbe_api.h" 95 #include "ixgbe_vf.h" 96 97 /* Tunables */ 98 99 /* 100 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 101 * number of transmit descriptors allocated by the driver. Increasing this 102 * value allows the driver to queue more transmits. Each descriptor is 16 103 * bytes. Performance tests have show the 2K value to be optimal for top 104 * performance. 105 */ 106 #define DEFAULT_TXD 1024 107 #define PERFORM_TXD 2048 108 #define MAX_TXD 4096 109 #define MIN_TXD 64 110 111 /* 112 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 113 * number of receive descriptors allocated for each RX queue. Increasing this 114 * value allows the driver to buffer more incoming packets. Each descriptor 115 * is 16 bytes. A receive buffer is also allocated for each descriptor. 116 * 117 * Note: with 8 rings and a dual port card, it is possible to bump up 118 * against the system mbuf pool limit, you can tune nmbclusters 119 * to adjust for this. 120 */ 121 #define DEFAULT_RXD 1024 122 #define PERFORM_RXD 2048 123 #define MAX_RXD 4096 124 #define MIN_RXD 64 125 126 /* Alignment for rings */ 127 #define DBA_ALIGN 128 128 129 /* 130 * This parameter controls the maximum no of times the driver will loop in 131 * the isr. Minimum Value = 1 132 */ 133 #define MAX_LOOP 10 134 135 /* 136 * This is the max watchdog interval, ie. the time that can 137 * pass between any two TX clean operations, such only happening 138 * when the TX hardware is functioning. 139 */ 140 #define IXGBE_WATCHDOG (10 * hz) 141 142 /* 143 * This parameters control when the driver calls the routine to reclaim 144 * transmit descriptors. 145 */ 146 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 147 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 148 149 #define IXGBE_MAX_FRAME_SIZE 0x3F00 150 151 /* Flow control constants */ 152 #define IXGBE_FC_PAUSE 0xFFFF 153 #define IXGBE_FC_HI 0x20000 154 #define IXGBE_FC_LO 0x10000 155 156 /* 157 * Used for optimizing small rx mbufs. Effort is made to keep the copy 158 * small and aligned for the CPU L1 cache. 159 * 160 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 161 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 162 * wasted. Getting 64 byte alignment, which _should_ be ideal for 163 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 164 * in observed efficiency of the optimization, 97.9% -> 81.8%. 165 */ 166 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 167 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 168 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 169 170 /* Keep older OS drivers building... */ 171 #if !defined(SYSCTL_ADD_UQUAD) 172 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 173 #endif 174 175 /* Defines for printing debug information */ 176 #define DEBUG_INIT 0 177 #define DEBUG_IOCTL 0 178 #define DEBUG_HW 0 179 180 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 181 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 182 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 183 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 184 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 185 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 186 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 187 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 188 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 189 190 #define MAX_NUM_MULTICAST_ADDRESSES 128 191 #define IXGBE_82598_SCATTER 100 192 #define IXGBE_82599_SCATTER 32 193 #define MSIX_82598_BAR 3 194 #define MSIX_82599_BAR 4 195 #define IXGBE_TSO_SIZE 262140 196 #define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 197 #define IXGBE_RX_HDR 128 198 #define IXGBE_VFTA_SIZE 128 199 #define IXGBE_BR_SIZE 4096 200 #define IXGBE_QUEUE_MIN_FREE 32 201 #define IXGBE_MAX_TX_BUSY 10 202 #define IXGBE_QUEUE_HUNG 0x80000000 203 204 #define IXV_EITR_DEFAULT 128 205 206 /* Offload bits in mbuf flag */ 207 #if __FreeBSD_version >= 800000 208 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 209 #else 210 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 211 #endif 212 213 /* Backward compatibility items for very old versions */ 214 #ifndef pci_find_cap 215 #define pci_find_cap pci_find_extcap 216 #endif 217 218 #ifndef DEVMETHOD_END 219 #define DEVMETHOD_END { NULL, NULL } 220 #endif 221 222 /* 223 * Interrupt Moderation parameters 224 */ 225 #define IXGBE_LOW_LATENCY 128 226 #define IXGBE_AVE_LATENCY 400 227 #define IXGBE_BULK_LATENCY 1200 228 #define IXGBE_LINK_ITR 2000 229 230 /* 231 ***************************************************************************** 232 * vendor_info_array 233 * 234 * This array contains the list of Subvendor/Subdevice IDs on which the driver 235 * should load. 236 * 237 ***************************************************************************** 238 */ 239 typedef struct _ixgbe_vendor_info_t { 240 unsigned int vendor_id; 241 unsigned int device_id; 242 unsigned int subvendor_id; 243 unsigned int subdevice_id; 244 unsigned int index; 245 } ixgbe_vendor_info_t; 246 247 struct ixgbe_tx_buf { 248 union ixgbe_adv_tx_desc *eop; 249 struct mbuf *m_head; 250 bus_dmamap_t map; 251 }; 252 253 struct ixgbe_rx_buf { 254 struct mbuf *buf; 255 struct mbuf *fmp; 256 bus_dmamap_t pmap; 257 u_int flags; 258 #define IXGBE_RX_COPY 0x01 259 uint64_t addr; 260 }; 261 262 /* 263 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 264 */ 265 struct ixgbe_dma_alloc { 266 bus_addr_t dma_paddr; 267 caddr_t dma_vaddr; 268 bus_dma_tag_t dma_tag; 269 bus_dmamap_t dma_map; 270 bus_dma_segment_t dma_seg; 271 bus_size_t dma_size; 272 int dma_nseg; 273 }; 274 275 /* 276 ** Driver queue struct: this is the interrupt container 277 ** for the associated tx and rx ring. 278 */ 279 struct ix_queue { 280 struct adapter *adapter; 281 u32 msix; /* This queue's MSIX vector */ 282 u32 eims; /* This queue's EIMS bit */ 283 u32 eitr_setting; 284 u32 me; 285 struct resource *res; 286 void *tag; 287 int busy; 288 struct tx_ring *txr; 289 struct rx_ring *rxr; 290 struct task que_task; 291 struct taskqueue *tq; 292 u64 irqs; 293 }; 294 295 /* 296 * The transmit ring, one per queue 297 */ 298 struct tx_ring { 299 struct adapter *adapter; 300 struct mtx tx_mtx; 301 u32 me; 302 u32 tail; 303 int busy; 304 union ixgbe_adv_tx_desc *tx_base; 305 struct ixgbe_tx_buf *tx_buffers; 306 struct ixgbe_dma_alloc txdma; 307 volatile u16 tx_avail; 308 u16 next_avail_desc; 309 u16 next_to_clean; 310 u16 process_limit; 311 u16 num_desc; 312 u32 txd_cmd; 313 bus_dma_tag_t txtag; 314 char mtx_name[16]; 315 #ifndef IXGBE_LEGACY_TX 316 struct buf_ring *br; 317 struct task txq_task; 318 #endif 319 #ifdef IXGBE_FDIR 320 u16 atr_sample; 321 u16 atr_count; 322 #endif 323 u32 bytes; /* used for AIM */ 324 u32 packets; 325 /* Soft Stats */ 326 u64 tx_bytes; 327 unsigned long tso_tx; 328 unsigned long no_tx_dma_setup; 329 u64 no_desc_avail; 330 u64 total_packets; 331 }; 332 333 334 /* 335 * The Receive ring, one per rx queue 336 */ 337 struct rx_ring { 338 struct adapter *adapter; 339 struct mtx rx_mtx; 340 u32 me; 341 u32 tail; 342 union ixgbe_adv_rx_desc *rx_base; 343 struct ixgbe_dma_alloc rxdma; 344 struct lro_ctrl lro; 345 bool lro_enabled; 346 bool hw_rsc; 347 bool vtag_strip; 348 u16 next_to_refresh; 349 u16 next_to_check; 350 u16 num_desc; 351 u16 mbuf_sz; 352 u16 process_limit; 353 char mtx_name[16]; 354 struct ixgbe_rx_buf *rx_buffers; 355 bus_dma_tag_t ptag; 356 357 u32 bytes; /* Used for AIM calc */ 358 u32 packets; 359 360 /* Soft stats */ 361 u64 rx_irq; 362 u64 rx_copies; 363 u64 rx_packets; 364 u64 rx_bytes; 365 u64 rx_discarded; 366 u64 rsc_num; 367 #ifdef IXGBE_FDIR 368 u64 flm; 369 #endif 370 }; 371 372 /* Our adapter structure */ 373 struct adapter { 374 struct ifnet *ifp; 375 struct ixgbe_hw hw; 376 377 struct ixgbe_osdep osdep; 378 struct device *dev; 379 380 struct resource *pci_mem; 381 struct resource *msix_mem; 382 383 /* 384 * Interrupt resources: this set is 385 * either used for legacy, or for Link 386 * when doing MSIX 387 */ 388 void *tag; 389 struct resource *res; 390 391 struct ifmedia media; 392 struct callout timer; 393 int msix; 394 int if_flags; 395 396 struct mtx core_mtx; 397 398 eventhandler_tag vlan_attach; 399 eventhandler_tag vlan_detach; 400 401 u16 num_vlans; 402 u16 num_queues; 403 404 /* 405 ** Shadow VFTA table, this is needed because 406 ** the real vlan filter table gets cleared during 407 ** a soft reset and the driver needs to be able 408 ** to repopulate it. 409 */ 410 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 411 412 /* Info about the interface */ 413 u32 optics; 414 u32 fc; /* local flow ctrl setting */ 415 int advertise; /* link speeds */ 416 bool link_active; 417 u16 max_frame_size; 418 u16 num_segs; 419 u32 link_speed; 420 bool link_up; 421 u32 vector; 422 423 /* Mbuf cluster size */ 424 u32 rx_mbuf_sz; 425 426 /* Support for pluggable optics */ 427 bool sfp_probe; 428 struct task link_task; /* Link tasklet */ 429 struct task mod_task; /* SFP tasklet */ 430 struct task msf_task; /* Multispeed Fiber */ 431 #ifdef IXGBE_FDIR 432 int fdir_reinit; 433 struct task fdir_task; 434 #endif 435 struct taskqueue *tq; 436 437 /* 438 ** Queues: 439 ** This is the irq holder, it has 440 ** and RX/TX pair or rings associated 441 ** with it. 442 */ 443 struct ix_queue *queues; 444 445 /* 446 * Transmit rings: 447 * Allocated at run time, an array of rings. 448 */ 449 struct tx_ring *tx_rings; 450 u32 num_tx_desc; 451 452 /* 453 * Receive rings: 454 * Allocated at run time, an array of rings. 455 */ 456 struct rx_ring *rx_rings; 457 u64 active_queues; 458 u32 num_rx_desc; 459 460 /* Multicast array memory */ 461 u8 *mta; 462 463 464 /* Misc stats maintained by the driver */ 465 unsigned long dropped_pkts; 466 unsigned long mbuf_defrag_failed; 467 unsigned long mbuf_header_failed; 468 unsigned long mbuf_packet_failed; 469 unsigned long watchdog_events; 470 unsigned long vector_irq; 471 union { 472 struct ixgbe_hw_stats pf; 473 struct ixgbevf_hw_stats vf; 474 } stats; 475 #if __FreeBSD_version >= 1100036 476 /* counter(9) stats */ 477 u64 ipackets; 478 u64 ierrors; 479 u64 opackets; 480 u64 oerrors; 481 u64 ibytes; 482 u64 obytes; 483 u64 imcasts; 484 u64 omcasts; 485 u64 iqdrops; 486 u64 noproto; 487 #endif 488 }; 489 490 491 /* Precision Time Sync (IEEE 1588) defines */ 492 #define ETHERTYPE_IEEE1588 0x88F7 493 #define PICOSECS_PER_TICK 20833 494 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 495 #define IXGBE_ADVTXD_TSTAMP 0x00080000 496 497 498 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 499 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 500 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 501 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 502 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 503 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 504 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 505 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 506 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 507 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 508 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 509 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 510 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 511 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 512 513 /* For backward compatibility */ 514 #if !defined(PCIER_LINK_STA) 515 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA 516 #endif 517 518 /* Stats macros */ 519 #if __FreeBSD_version >= 1100036 520 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 521 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 522 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 523 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 524 #define IXGBE_SET_COLLISIONS(sc, count) 525 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 526 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 527 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 528 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 529 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 530 #else 531 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count) 532 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count) 533 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count) 534 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count) 535 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count) 536 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count) 537 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count) 538 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count) 539 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count) 540 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count) 541 #endif 542 543 /* Sysctl help messages; displayed with sysctl -d */ 544 #define IXGBE_SYSCTL_DESC_ADV_SPEED \ 545 "\nControl advertised link speed using these flags:\n" \ 546 "\t0x1 - advertise 100M\n" \ 547 "\t0x2 - advertise 1G\n" \ 548 "\t0x4 - advertise 10G" 549 550 #define IXGBE_SYSCTL_DESC_SET_FC \ 551 "\nSet flow control mode using these values:\n" \ 552 "\t0 - off\n" \ 553 "\t1 - rx pause\n" \ 554 "\t2 - tx pause\n" \ 555 "\t3 - tx and rx pause" 556 557 static inline bool 558 ixgbe_is_sfp(struct ixgbe_hw *hw) 559 { 560 switch (hw->phy.type) { 561 case ixgbe_phy_sfp_avago: 562 case ixgbe_phy_sfp_ftl: 563 case ixgbe_phy_sfp_intel: 564 case ixgbe_phy_sfp_unknown: 565 case ixgbe_phy_sfp_passive_tyco: 566 case ixgbe_phy_sfp_passive_unknown: 567 case ixgbe_phy_qsfp_passive_unknown: 568 case ixgbe_phy_qsfp_active_unknown: 569 case ixgbe_phy_qsfp_intel: 570 case ixgbe_phy_qsfp_unknown: 571 return TRUE; 572 default: 573 return FALSE; 574 } 575 } 576 577 /* Workaround to make 8.0 buildable */ 578 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 579 static __inline int 580 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 581 { 582 #ifdef ALTQ 583 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 584 return (1); 585 #endif 586 return (!buf_ring_empty(br)); 587 } 588 #endif 589 590 /* 591 ** Find the number of unrefreshed RX descriptors 592 */ 593 static inline u16 594 ixgbe_rx_unrefreshed(struct rx_ring *rxr) 595 { 596 if (rxr->next_to_check > rxr->next_to_refresh) 597 return (rxr->next_to_check - rxr->next_to_refresh - 1); 598 else 599 return ((rxr->num_desc + rxr->next_to_check) - 600 rxr->next_to_refresh - 1); 601 } 602 603 /* 604 ** This checks for a zero mac addr, something that will be likely 605 ** unless the Admin on the Host has created one. 606 */ 607 static inline bool 608 ixv_check_ether_addr(u8 *addr) 609 { 610 bool status = TRUE; 611 612 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 613 addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 614 status = FALSE; 615 return (status); 616 } 617 618 /* Shared Prototypes */ 619 620 #ifdef IXGBE_LEGACY_TX 621 void ixgbe_start(struct ifnet *); 622 void ixgbe_start_locked(struct tx_ring *, struct ifnet *); 623 #else /* ! IXGBE_LEGACY_TX */ 624 int ixgbe_mq_start(struct ifnet *, struct mbuf *); 625 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *); 626 void ixgbe_qflush(struct ifnet *); 627 void ixgbe_deferred_mq_start(void *, int); 628 #endif /* IXGBE_LEGACY_TX */ 629 630 int ixgbe_allocate_queues(struct adapter *); 631 int ixgbe_allocate_transmit_buffers(struct tx_ring *); 632 int ixgbe_setup_transmit_structures(struct adapter *); 633 void ixgbe_free_transmit_structures(struct adapter *); 634 int ixgbe_allocate_receive_buffers(struct rx_ring *); 635 int ixgbe_setup_receive_structures(struct adapter *); 636 void ixgbe_free_receive_structures(struct adapter *); 637 void ixgbe_txeof(struct tx_ring *); 638 bool ixgbe_rxeof(struct ix_queue *); 639 640 int ixgbe_dma_malloc(struct adapter *, 641 bus_size_t, struct ixgbe_dma_alloc *, int); 642 void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *); 643 #endif /* _IXGBE_H_ */ 644