19ca4041bSJack F Vogel /****************************************************************************** 27282444bSPedro F. Giffuni SPDX-License-Identifier: BSD-3-Clause 313705f88SJack F Vogel 48eb6488eSEric Joyner Copyright (c) 2001-2017, Intel Corporation 513705f88SJack F Vogel All rights reserved. 613705f88SJack F Vogel 713705f88SJack F Vogel Redistribution and use in source and binary forms, with or without 813705f88SJack F Vogel modification, are permitted provided that the following conditions are met: 913705f88SJack F Vogel 1013705f88SJack F Vogel 1. Redistributions of source code must retain the above copyright notice, 1113705f88SJack F Vogel this list of conditions and the following disclaimer. 1213705f88SJack F Vogel 1313705f88SJack F Vogel 2. Redistributions in binary form must reproduce the above copyright 1413705f88SJack F Vogel notice, this list of conditions and the following disclaimer in the 1513705f88SJack F Vogel documentation and/or other materials provided with the distribution. 1613705f88SJack F Vogel 1713705f88SJack F Vogel 3. Neither the name of the Intel Corporation nor the names of its 1813705f88SJack F Vogel contributors may be used to endorse or promote products derived from 1913705f88SJack F Vogel this software without specific prior written permission. 2013705f88SJack F Vogel 2113705f88SJack F Vogel THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 2213705f88SJack F Vogel AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2313705f88SJack F Vogel IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2413705f88SJack F Vogel ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 2513705f88SJack F Vogel LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2613705f88SJack F Vogel CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2713705f88SJack F Vogel SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2813705f88SJack F Vogel INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2913705f88SJack F Vogel CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3013705f88SJack F Vogel ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3113705f88SJack F Vogel POSSIBILITY OF SUCH DAMAGE. 3213705f88SJack F Vogel 339ca4041bSJack F Vogel ******************************************************************************/ 3413705f88SJack F Vogel /*$FreeBSD$*/ 3513705f88SJack F Vogel 361b6e0dbaSJack F Vogel 3713705f88SJack F Vogel #ifndef _IXGBE_H_ 3813705f88SJack F Vogel #define _IXGBE_H_ 3913705f88SJack F Vogel 4013705f88SJack F Vogel 4113705f88SJack F Vogel #include <sys/param.h> 4213705f88SJack F Vogel #include <sys/systm.h> 43d8602bb9SJack F Vogel #include <sys/buf_ring.h> 4413705f88SJack F Vogel #include <sys/mbuf.h> 4513705f88SJack F Vogel #include <sys/protosw.h> 4613705f88SJack F Vogel #include <sys/socket.h> 4713705f88SJack F Vogel #include <sys/malloc.h> 4813705f88SJack F Vogel #include <sys/kernel.h> 4913705f88SJack F Vogel #include <sys/module.h> 5013705f88SJack F Vogel #include <sys/sockio.h> 5176039bc8SGleb Smirnoff #include <sys/eventhandler.h> 5213705f88SJack F Vogel 5313705f88SJack F Vogel #include <net/if.h> 5476039bc8SGleb Smirnoff #include <net/if_var.h> 5513705f88SJack F Vogel #include <net/if_arp.h> 5613705f88SJack F Vogel #include <net/bpf.h> 5713705f88SJack F Vogel #include <net/ethernet.h> 5813705f88SJack F Vogel #include <net/if_dl.h> 5913705f88SJack F Vogel #include <net/if_media.h> 6013705f88SJack F Vogel 6113705f88SJack F Vogel #include <net/if_types.h> 6213705f88SJack F Vogel #include <net/if_vlan_var.h> 63c19c7afeSEric Joyner #include <net/iflib.h> 6413705f88SJack F Vogel 6513705f88SJack F Vogel #include <netinet/in_systm.h> 6613705f88SJack F Vogel #include <netinet/in.h> 6713705f88SJack F Vogel #include <netinet/if_ether.h> 6813705f88SJack F Vogel 6913705f88SJack F Vogel #include <sys/bus.h> 7013705f88SJack F Vogel #include <machine/bus.h> 7113705f88SJack F Vogel #include <sys/rman.h> 7213705f88SJack F Vogel #include <machine/resource.h> 7313705f88SJack F Vogel #include <vm/vm.h> 7413705f88SJack F Vogel #include <vm/pmap.h> 7513705f88SJack F Vogel #include <machine/clock.h> 7613705f88SJack F Vogel #include <dev/pci/pcivar.h> 7713705f88SJack F Vogel #include <dev/pci/pcireg.h> 7813705f88SJack F Vogel #include <sys/proc.h> 7913705f88SJack F Vogel #include <sys/sysctl.h> 8013705f88SJack F Vogel #include <sys/endian.h> 81c19c7afeSEric Joyner #include <sys/gtaskqueue.h> 829ca4041bSJack F Vogel #include <sys/pcpu.h> 83d8602bb9SJack F Vogel #include <sys/smp.h> 84d8602bb9SJack F Vogel #include <machine/smp.h> 856f37f232SEric Joyner #include <sys/sbuf.h> 8613705f88SJack F Vogel 8713705f88SJack F Vogel #include "ixgbe_api.h" 886f37f232SEric Joyner #include "ixgbe_common.h" 896f37f232SEric Joyner #include "ixgbe_phy.h" 90758cc3dcSJack F Vogel #include "ixgbe_vf.h" 918eb6488eSEric Joyner #include "ixgbe_features.h" 9248056c88SJack F Vogel 9313705f88SJack F Vogel /* Tunables */ 9413705f88SJack F Vogel 9513705f88SJack F Vogel /* 963ec35e52SJack F Vogel * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 9713705f88SJack F Vogel * number of transmit descriptors allocated by the driver. Increasing this 9813705f88SJack F Vogel * value allows the driver to queue more transmits. Each descriptor is 16 993ec35e52SJack F Vogel * bytes. Performance tests have show the 2K value to be optimal for top 1003ec35e52SJack F Vogel * performance. 10113705f88SJack F Vogel */ 102c19c7afeSEric Joyner #define DEFAULT_TXD 2048 1033ec35e52SJack F Vogel #define PERFORM_TXD 2048 10413705f88SJack F Vogel #define MAX_TXD 4096 10513705f88SJack F Vogel #define MIN_TXD 64 10613705f88SJack F Vogel 10713705f88SJack F Vogel /* 1083ec35e52SJack F Vogel * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 1093ec35e52SJack F Vogel * number of receive descriptors allocated for each RX queue. Increasing this 11013705f88SJack F Vogel * value allows the driver to buffer more incoming packets. Each descriptor 1113ec35e52SJack F Vogel * is 16 bytes. A receive buffer is also allocated for each descriptor. 11213705f88SJack F Vogel * 1133ec35e52SJack F Vogel * Note: with 8 rings and a dual port card, it is possible to bump up 1143ec35e52SJack F Vogel * against the system mbuf pool limit, you can tune nmbclusters 1153ec35e52SJack F Vogel * to adjust for this. 11613705f88SJack F Vogel */ 117c19c7afeSEric Joyner #define DEFAULT_RXD 2048 1183ec35e52SJack F Vogel #define PERFORM_RXD 2048 11913705f88SJack F Vogel #define MAX_RXD 4096 12013705f88SJack F Vogel #define MIN_RXD 64 12113705f88SJack F Vogel 1223ec35e52SJack F Vogel /* Alignment for rings */ 1233ec35e52SJack F Vogel #define DBA_ALIGN 128 1243ec35e52SJack F Vogel 12513705f88SJack F Vogel /* 1262969bf0eSJack F Vogel * This is the max watchdog interval, ie. the time that can 1272969bf0eSJack F Vogel * pass between any two TX clean operations, such only happening 1282969bf0eSJack F Vogel * when the TX hardware is functioning. 12913705f88SJack F Vogel */ 1302969bf0eSJack F Vogel #define IXGBE_WATCHDOG (10 * hz) 13113705f88SJack F Vogel 13213705f88SJack F Vogel /* 13313705f88SJack F Vogel * This parameters control when the driver calls the routine to reclaim 13413705f88SJack F Vogel * transmit descriptors. 13513705f88SJack F Vogel */ 1368eb6488eSEric Joyner #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8) 1378eb6488eSEric Joyner #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32) 13813705f88SJack F Vogel 1396f37f232SEric Joyner /* These defines are used in MTU calculations */ 1406f37f232SEric Joyner #define IXGBE_MAX_FRAME_SIZE 9728 141a9ca1c79SSean Bruno #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN) 142a9ca1c79SSean Bruno #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \ 1436f37f232SEric Joyner ETHER_VLAN_ENCAP_LEN) 1446f37f232SEric Joyner #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR) 145a9ca1c79SSean Bruno #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN) 14613705f88SJack F Vogel 1473ec35e52SJack F Vogel /* Flow control constants */ 1482969bf0eSJack F Vogel #define IXGBE_FC_PAUSE 0xFFFF 1493ec35e52SJack F Vogel #define IXGBE_FC_HI 0x20000 1503ec35e52SJack F Vogel #define IXGBE_FC_LO 0x10000 15113705f88SJack F Vogel 152cfc0969aSScott Long /* 153cfc0969aSScott Long * Used for optimizing small rx mbufs. Effort is made to keep the copy 154cfc0969aSScott Long * small and aligned for the CPU L1 cache. 155cfc0969aSScott Long * 156cfc0969aSScott Long * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 157cfc0969aSScott Long * 32 byte alignment needed for the fast bcopy results in 8 bytes being 158cfc0969aSScott Long * wasted. Getting 64 byte alignment, which _should_ be ideal for 159cfc0969aSScott Long * modern Intel CPUs, results in 40 bytes wasted and a significant drop 160cfc0969aSScott Long * in observed efficiency of the optimization, 97.9% -> 81.8%. 161cfc0969aSScott Long */ 162a9ca1c79SSean Bruno #if __FreeBSD_version < 1002000 163a9ca1c79SSean Bruno #define MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr)) 164a9ca1c79SSean Bruno #endif 16574c1c91cSEnji Cooper #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 16674c1c91cSEnji Cooper #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 16774c1c91cSEnji Cooper #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 168cfc0969aSScott Long 1690e6fa41fSJack F Vogel /* Keep older OS drivers building... */ 1700e6fa41fSJack F Vogel #if !defined(SYSCTL_ADD_UQUAD) 1710e6fa41fSJack F Vogel #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 1720e6fa41fSJack F Vogel #endif 1730e6fa41fSJack F Vogel 17413705f88SJack F Vogel /* Defines for printing debug information */ 17513705f88SJack F Vogel #define DEBUG_INIT 0 17613705f88SJack F Vogel #define DEBUG_IOCTL 0 17713705f88SJack F Vogel #define DEBUG_HW 0 17813705f88SJack F Vogel 17913705f88SJack F Vogel #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 18013705f88SJack F Vogel #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 18113705f88SJack F Vogel #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 18213705f88SJack F Vogel #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 18313705f88SJack F Vogel #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 18413705f88SJack F Vogel #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 18513705f88SJack F Vogel #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 18613705f88SJack F Vogel #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 18713705f88SJack F Vogel #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 18813705f88SJack F Vogel 18913705f88SJack F Vogel #define MAX_NUM_MULTICAST_ADDRESSES 128 1900ac6dfecSJack F Vogel #define IXGBE_82598_SCATTER 100 1910ac6dfecSJack F Vogel #define IXGBE_82599_SCATTER 32 19239fc714aSBjoern A. Zeeb #define IXGBE_TSO_SIZE 262140 193c0014855SJack F Vogel #define IXGBE_RX_HDR 128 194d8602bb9SJack F Vogel #define IXGBE_VFTA_SIZE 128 195d8602bb9SJack F Vogel #define IXGBE_BR_SIZE 4096 19685d0a26eSJack F Vogel #define IXGBE_QUEUE_MIN_FREE 32 197758cc3dcSJack F Vogel #define IXGBE_MAX_TX_BUSY 10 198758cc3dcSJack F Vogel #define IXGBE_QUEUE_HUNG 0x80000000 199758cc3dcSJack F Vogel 2008eb6488eSEric Joyner #define IXGBE_EITR_DEFAULT 128 2019de5aff5SJack F Vogel 202a9ca1c79SSean Bruno /* Supported offload bits in mbuf flag */ 203a9ca1c79SSean Bruno #if __FreeBSD_version >= 1000000 204a9ca1c79SSean Bruno #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \ 205a9ca1c79SSean Bruno CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \ 206a9ca1c79SSean Bruno CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP) 207a9ca1c79SSean Bruno #elif __FreeBSD_version >= 800000 2089de5aff5SJack F Vogel #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 2099de5aff5SJack F Vogel #else 2109de5aff5SJack F Vogel #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 2119de5aff5SJack F Vogel #endif 21213705f88SJack F Vogel 213c19c7afeSEric Joyner #define IXGBE_CAPS (IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_TSO | \ 214c19c7afeSEric Joyner IFCAP_LRO | IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO | \ 215c19c7afeSEric Joyner IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU | IFCAP_VLAN_MTU | \ 2167f87c040SMarius Strobl IFCAP_VLAN_HWFILTER | IFCAP_WOL) 217c19c7afeSEric Joyner 218758cc3dcSJack F Vogel /* Backward compatibility items for very old versions */ 219758cc3dcSJack F Vogel #ifndef pci_find_cap 220758cc3dcSJack F Vogel #define pci_find_cap pci_find_extcap 221758cc3dcSJack F Vogel #endif 222758cc3dcSJack F Vogel 223758cc3dcSJack F Vogel #ifndef DEVMETHOD_END 224758cc3dcSJack F Vogel #define DEVMETHOD_END { NULL, NULL } 225758cc3dcSJack F Vogel #endif 226758cc3dcSJack F Vogel 22713705f88SJack F Vogel /* 22813705f88SJack F Vogel * Interrupt Moderation parameters 22913705f88SJack F Vogel */ 2301b6e0dbaSJack F Vogel #define IXGBE_LOW_LATENCY 128 2311b6e0dbaSJack F Vogel #define IXGBE_AVE_LATENCY 400 2321b6e0dbaSJack F Vogel #define IXGBE_BULK_LATENCY 1200 233a9ca1c79SSean Bruno 234a9ca1c79SSean Bruno /* Using 1FF (the max value), the interval is ~1.05ms */ 235a9ca1c79SSean Bruno #define IXGBE_LINK_ITR_QUANTA 0x1FF 236a9ca1c79SSean Bruno #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \ 237a9ca1c79SSean Bruno IXGBE_EITR_ITR_INT_MASK) 2381b6e0dbaSJack F Vogel 23948056c88SJack F Vogel 2408eb6488eSEric Joyner /************************************************************************ 24113705f88SJack F Vogel * vendor_info_array 24213705f88SJack F Vogel * 2438eb6488eSEric Joyner * Contains the list of Subvendor/Subdevice IDs on 2448eb6488eSEric Joyner * which the driver should load. 2458eb6488eSEric Joyner ************************************************************************/ 24613705f88SJack F Vogel typedef struct _ixgbe_vendor_info_t { 24713705f88SJack F Vogel unsigned int vendor_id; 24813705f88SJack F Vogel unsigned int device_id; 24913705f88SJack F Vogel unsigned int subvendor_id; 25013705f88SJack F Vogel unsigned int subdevice_id; 25113705f88SJack F Vogel unsigned int index; 25213705f88SJack F Vogel } ixgbe_vendor_info_t; 25313705f88SJack F Vogel 2548eb6488eSEric Joyner struct ixgbe_bp_data { 2558eb6488eSEric Joyner u32 low; 2568eb6488eSEric Joyner u32 high; 2578eb6488eSEric Joyner u32 log; 2588eb6488eSEric Joyner }; 25948056c88SJack F Vogel 26013705f88SJack F Vogel 26113705f88SJack F Vogel /* 26213705f88SJack F Vogel */ 26313705f88SJack F Vogel struct ixgbe_dma_alloc { 26413705f88SJack F Vogel bus_addr_t dma_paddr; 26513705f88SJack F Vogel caddr_t dma_vaddr; 26613705f88SJack F Vogel bus_dma_tag_t dma_tag; 26713705f88SJack F Vogel bus_dmamap_t dma_map; 26813705f88SJack F Vogel bus_dma_segment_t dma_seg; 26913705f88SJack F Vogel bus_size_t dma_size; 27013705f88SJack F Vogel int dma_nseg; 27113705f88SJack F Vogel }; 27213705f88SJack F Vogel 27348056c88SJack F Vogel struct ixgbe_mc_addr { 27448056c88SJack F Vogel u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 27548056c88SJack F Vogel u32 vmdq; 27648056c88SJack F Vogel }; 27748056c88SJack F Vogel 27813705f88SJack F Vogel /* 279c0014855SJack F Vogel * The transmit ring, one per queue 28013705f88SJack F Vogel */ 28113705f88SJack F Vogel struct tx_ring { 28213705f88SJack F Vogel struct adapter *adapter; 28347dd71a8SJack F Vogel union ixgbe_adv_tx_desc *tx_base; 284c19c7afeSEric Joyner uint64_t tx_paddr; 285c19c7afeSEric Joyner u32 tail; 286c19c7afeSEric Joyner qidx_t *tx_rsq; 287c19c7afeSEric Joyner qidx_t tx_rs_cidx; 288c19c7afeSEric Joyner qidx_t tx_rs_pidx; 289c19c7afeSEric Joyner qidx_t tx_cidx_processed; 290c19c7afeSEric Joyner uint8_t me; 2918eb6488eSEric Joyner 2928eb6488eSEric Joyner /* Flow Director */ 2932969bf0eSJack F Vogel u16 atr_sample; 2942969bf0eSJack F Vogel u16 atr_count; 2958eb6488eSEric Joyner 296c0014855SJack F Vogel u32 bytes; /* used for AIM */ 297c0014855SJack F Vogel u32 packets; 2989ca4041bSJack F Vogel /* Soft Stats */ 2998eb6488eSEric Joyner u64 tso_tx; 3001b6e0dbaSJack F Vogel u64 total_packets; 30113705f88SJack F Vogel }; 30213705f88SJack F Vogel 30313705f88SJack F Vogel 30413705f88SJack F Vogel /* 30513705f88SJack F Vogel * The Receive ring, one per rx queue 30613705f88SJack F Vogel */ 30713705f88SJack F Vogel struct rx_ring { 308c19c7afeSEric Joyner struct ix_rx_queue *que; 30913705f88SJack F Vogel struct adapter *adapter; 31013705f88SJack F Vogel u32 me; 311758cc3dcSJack F Vogel u32 tail; 31213705f88SJack F Vogel union ixgbe_adv_rx_desc *rx_base; 3132969bf0eSJack F Vogel bool hw_rsc; 31485d0a26eSJack F Vogel bool vtag_strip; 315c19c7afeSEric Joyner uint64_t rx_paddr; 31660372f6fSLuigi Rizzo bus_dma_tag_t ptag; 3171b6e0dbaSJack F Vogel 3181b6e0dbaSJack F Vogel u32 bytes; /* Used for AIM calc */ 319c0014855SJack F Vogel u32 packets; 320d8602bb9SJack F Vogel 32113705f88SJack F Vogel /* Soft stats */ 3229ca4041bSJack F Vogel u64 rx_irq; 323cfc0969aSScott Long u64 rx_copies; 3241b6e0dbaSJack F Vogel u64 rx_packets; 3251b6e0dbaSJack F Vogel u64 rx_bytes; 326c0014855SJack F Vogel u64 rx_discarded; 3272969bf0eSJack F Vogel u64 rsc_num; 32813705f88SJack F Vogel 3298eb6488eSEric Joyner /* Flow Director */ 3308eb6488eSEric Joyner u64 flm; 3318eb6488eSEric Joyner }; 33248056c88SJack F Vogel 333c19c7afeSEric Joyner /* 334c19c7afeSEric Joyner * Driver queue struct: this is the interrupt container 335c19c7afeSEric Joyner * for the associated tx and rx ring. 336c19c7afeSEric Joyner */ 337c19c7afeSEric Joyner struct ix_rx_queue { 338c19c7afeSEric Joyner struct adapter *adapter; 339c19c7afeSEric Joyner u32 msix; /* This queue's MSIX vector */ 340c19c7afeSEric Joyner u32 eitr_setting; 341c19c7afeSEric Joyner struct resource *res; 342c19c7afeSEric Joyner void *tag; 343c19c7afeSEric Joyner int busy; 344c19c7afeSEric Joyner struct rx_ring rxr; 345c19c7afeSEric Joyner struct if_irq que_irq; 346c19c7afeSEric Joyner u64 irqs; 347c19c7afeSEric Joyner }; 348c19c7afeSEric Joyner 349c19c7afeSEric Joyner struct ix_tx_queue { 350c19c7afeSEric Joyner struct adapter *adapter; 351c19c7afeSEric Joyner u32 msix; /* This queue's MSIX vector */ 352c19c7afeSEric Joyner struct tx_ring txr; 353c19c7afeSEric Joyner }; 354c19c7afeSEric Joyner 35548056c88SJack F Vogel #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ 35648056c88SJack F Vogel 35748056c88SJack F Vogel struct ixgbe_vf { 35848056c88SJack F Vogel u_int pool; 35948056c88SJack F Vogel u_int rar_index; 360c19c7afeSEric Joyner u_int maximum_frame_size; 36148056c88SJack F Vogel uint32_t flags; 36248056c88SJack F Vogel uint8_t ether_addr[ETHER_ADDR_LEN]; 36348056c88SJack F Vogel uint16_t mc_hash[IXGBE_MAX_VF_MC]; 36448056c88SJack F Vogel uint16_t num_mc_hashes; 36548056c88SJack F Vogel uint16_t default_vlan; 36648056c88SJack F Vogel uint16_t vlan_tag; 36748056c88SJack F Vogel uint16_t api_ver; 36848056c88SJack F Vogel }; 36948056c88SJack F Vogel 37013705f88SJack F Vogel /* Our adapter structure */ 37113705f88SJack F Vogel struct adapter { 37213705f88SJack F Vogel struct ixgbe_hw hw; 37313705f88SJack F Vogel struct ixgbe_osdep osdep; 374c19c7afeSEric Joyner if_ctx_t ctx; 375c19c7afeSEric Joyner if_softc_ctx_t shared; 376c19c7afeSEric Joyner #define num_tx_queues shared->isc_ntxqsets 377c19c7afeSEric Joyner #define num_rx_queues shared->isc_nrxqsets 378c19c7afeSEric Joyner #define max_frame_size shared->isc_max_frame_size 379c19c7afeSEric Joyner #define intr_type shared->isc_intr 380a9ca1c79SSean Bruno 381bd937497SJean-Sébastien Pédron device_t dev; 382a9ca1c79SSean Bruno struct ifnet *ifp; 3839ca4041bSJack F Vogel 3849ca4041bSJack F Vogel struct resource *pci_mem; 38513705f88SJack F Vogel 38613705f88SJack F Vogel /* 387d8602bb9SJack F Vogel * Interrupt resources: this set is 388d8602bb9SJack F Vogel * either used for legacy, or for Link 3898eb6488eSEric Joyner * when doing MSI-X 39013705f88SJack F Vogel */ 391c19c7afeSEric Joyner struct if_irq irq; 392d8602bb9SJack F Vogel void *tag; 393d8602bb9SJack F Vogel struct resource *res; 39413705f88SJack F Vogel 395c19c7afeSEric Joyner struct ifmedia *media; 39613705f88SJack F Vogel int if_flags; 397c19c7afeSEric Joyner int msix; 398d8602bb9SJack F Vogel 3992969bf0eSJack F Vogel u16 num_vlans; 400d8602bb9SJack F Vogel 4011a4e3449SJack F Vogel /* 4028eb6488eSEric Joyner * Shadow VFTA table, this is needed because 4038eb6488eSEric Joyner * the real vlan filter table gets cleared during 4048eb6488eSEric Joyner * a soft reset and the driver needs to be able 4058eb6488eSEric Joyner * to repopulate it. 4061a4e3449SJack F Vogel */ 4071a4e3449SJack F Vogel u32 shadow_vfta[IXGBE_VFTA_SIZE]; 4081a4e3449SJack F Vogel 4091a4e3449SJack F Vogel /* Info about the interface */ 41017d2646bSJack F Vogel int advertise; /* link speeds */ 411*64881da4SSai Rajesh Tallamraju int enable_aim; /* adaptive interrupt moderation */ 4129ca4041bSJack F Vogel bool link_active; 413182b3808SJack F Vogel u16 num_segs; 4149ca4041bSJack F Vogel u32 link_speed; 4150ac6dfecSJack F Vogel bool link_up; 416758cc3dcSJack F Vogel u32 vector; 4176f37f232SEric Joyner u16 dmac; 41848056c88SJack F Vogel u32 phy_layer; 4196f37f232SEric Joyner 4206f37f232SEric Joyner /* Power management-related */ 4216f37f232SEric Joyner bool wol_support; 4226f37f232SEric Joyner u32 wufc; 42313705f88SJack F Vogel 4241b6e0dbaSJack F Vogel /* Mbuf cluster size */ 4251b6e0dbaSJack F Vogel u32 rx_mbuf_sz; 4261b6e0dbaSJack F Vogel 4270ac6dfecSJack F Vogel /* Support for pluggable optics */ 4281b6e0dbaSJack F Vogel bool sfp_probe; 4298eb6488eSEric Joyner 4308eb6488eSEric Joyner /* Flow Director */ 4312969bf0eSJack F Vogel int fdir_reinit; 4328eb6488eSEric Joyner 433b2c1e8e6SEric Joyner u32 task_requests; 43413705f88SJack F Vogel 43513705f88SJack F Vogel /* 4368eb6488eSEric Joyner * Queues: 4378eb6488eSEric Joyner * This is the irq holder, it has 4388eb6488eSEric Joyner * and RX/TX pair or rings associated 4398eb6488eSEric Joyner * with it. 440c0014855SJack F Vogel */ 441c19c7afeSEric Joyner struct ix_tx_queue *tx_queues; 442c19c7afeSEric Joyner struct ix_rx_queue *rx_queues; 44313705f88SJack F Vogel 44438104eccSJack F Vogel /* Multicast array memory */ 44548056c88SJack F Vogel struct ixgbe_mc_addr *mta; 4468eb6488eSEric Joyner 4478eb6488eSEric Joyner /* SR-IOV */ 4488eb6488eSEric Joyner int iov_mode; 44948056c88SJack F Vogel int num_vfs; 45048056c88SJack F Vogel int pool; 45148056c88SJack F Vogel struct ixgbe_vf *vfs; 4528eb6488eSEric Joyner 4538eb6488eSEric Joyner /* Bypass */ 4548eb6488eSEric Joyner struct ixgbe_bp_data bypass; 4558eb6488eSEric Joyner 45613705f88SJack F Vogel /* Misc stats maintained by the driver */ 45713705f88SJack F Vogel unsigned long dropped_pkts; 4581b6e0dbaSJack F Vogel unsigned long mbuf_header_failed; 4591b6e0dbaSJack F Vogel unsigned long mbuf_packet_failed; 46013705f88SJack F Vogel unsigned long watchdog_events; 4616f37f232SEric Joyner unsigned long link_irq; 462758cc3dcSJack F Vogel union { 463758cc3dcSJack F Vogel struct ixgbe_hw_stats pf; 464758cc3dcSJack F Vogel struct ixgbevf_hw_stats vf; 465758cc3dcSJack F Vogel } stats; 466758cc3dcSJack F Vogel #if __FreeBSD_version >= 1100036 467758cc3dcSJack F Vogel /* counter(9) stats */ 468758cc3dcSJack F Vogel u64 ipackets; 469758cc3dcSJack F Vogel u64 ierrors; 470758cc3dcSJack F Vogel u64 opackets; 471758cc3dcSJack F Vogel u64 oerrors; 472758cc3dcSJack F Vogel u64 ibytes; 473758cc3dcSJack F Vogel u64 obytes; 474758cc3dcSJack F Vogel u64 imcasts; 475758cc3dcSJack F Vogel u64 omcasts; 476758cc3dcSJack F Vogel u64 iqdrops; 477758cc3dcSJack F Vogel u64 noproto; 478758cc3dcSJack F Vogel #endif 4798eb6488eSEric Joyner /* Feature capable/enabled flags. See ixgbe_features.h */ 4808eb6488eSEric Joyner u32 feat_cap; 4818eb6488eSEric Joyner u32 feat_en; 48213705f88SJack F Vogel }; 48313705f88SJack F Vogel 4840ac6dfecSJack F Vogel /* Precision Time Sync (IEEE 1588) defines */ 4850ac6dfecSJack F Vogel #define ETHERTYPE_IEEE1588 0x88F7 4860ac6dfecSJack F Vogel #define PICOSECS_PER_TICK 20833 4870ac6dfecSJack F Vogel #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 4880ac6dfecSJack F Vogel #define IXGBE_ADVTXD_TSTAMP 0x00080000 4890ac6dfecSJack F Vogel 490fd75b91dSJack F Vogel /* For backward compatibility */ 491fd75b91dSJack F Vogel #if !defined(PCIER_LINK_STA) 492fd75b91dSJack F Vogel #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA 493fd75b91dSJack F Vogel #endif 4949ca4041bSJack F Vogel 495758cc3dcSJack F Vogel /* Stats macros */ 496758cc3dcSJack F Vogel #if __FreeBSD_version >= 1100036 497758cc3dcSJack F Vogel #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 498758cc3dcSJack F Vogel #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 499758cc3dcSJack F Vogel #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 500758cc3dcSJack F Vogel #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 501758cc3dcSJack F Vogel #define IXGBE_SET_COLLISIONS(sc, count) 502758cc3dcSJack F Vogel #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 503758cc3dcSJack F Vogel #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 504758cc3dcSJack F Vogel #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 505758cc3dcSJack F Vogel #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 506758cc3dcSJack F Vogel #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 507758cc3dcSJack F Vogel #else 508758cc3dcSJack F Vogel #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count) 509758cc3dcSJack F Vogel #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count) 510758cc3dcSJack F Vogel #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count) 511758cc3dcSJack F Vogel #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count) 512758cc3dcSJack F Vogel #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count) 513758cc3dcSJack F Vogel #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count) 514758cc3dcSJack F Vogel #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count) 515758cc3dcSJack F Vogel #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count) 516758cc3dcSJack F Vogel #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count) 517758cc3dcSJack F Vogel #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count) 518758cc3dcSJack F Vogel #endif 519758cc3dcSJack F Vogel 5206f37f232SEric Joyner /* External PHY register addresses */ 5216f37f232SEric Joyner #define IXGBE_PHY_CURRENT_TEMP 0xC820 5226f37f232SEric Joyner #define IXGBE_PHY_OVERTEMP_STATUS 0xC830 5236f37f232SEric Joyner 524758cc3dcSJack F Vogel /* Sysctl help messages; displayed with sysctl -d */ 525758cc3dcSJack F Vogel #define IXGBE_SYSCTL_DESC_ADV_SPEED \ 526758cc3dcSJack F Vogel "\nControl advertised link speed using these flags:\n" \ 527758cc3dcSJack F Vogel "\t0x1 - advertise 100M\n" \ 528758cc3dcSJack F Vogel "\t0x2 - advertise 1G\n" \ 5298eb6488eSEric Joyner "\t0x4 - advertise 10G\n" \ 5308eb6488eSEric Joyner "\t0x8 - advertise 10M\n\n" \ 5318eb6488eSEric Joyner "\t100M and 10M are only supported on certain adapters.\n" 532758cc3dcSJack F Vogel 533758cc3dcSJack F Vogel #define IXGBE_SYSCTL_DESC_SET_FC \ 534758cc3dcSJack F Vogel "\nSet flow control mode using these values:\n" \ 535758cc3dcSJack F Vogel "\t0 - off\n" \ 536758cc3dcSJack F Vogel "\t1 - rx pause\n" \ 537758cc3dcSJack F Vogel "\t2 - tx pause\n" \ 538758cc3dcSJack F Vogel "\t3 - tx and rx pause" 539758cc3dcSJack F Vogel 540afb1aa4eSPiotr Pietruszewski #define IXGBE_SYSCTL_DESC_RX_ERRS \ 541afb1aa4eSPiotr Pietruszewski "\nSum of the following RX errors counters:\n" \ 542afb1aa4eSPiotr Pietruszewski " * CRC errors,\n" \ 543afb1aa4eSPiotr Pietruszewski " * illegal byte error count,\n" \ 544afb1aa4eSPiotr Pietruszewski " * checksum error count,\n" \ 545afb1aa4eSPiotr Pietruszewski " * missed packet count,\n" \ 546afb1aa4eSPiotr Pietruszewski " * length error count,\n" \ 547afb1aa4eSPiotr Pietruszewski " * undersized packets count,\n" \ 548afb1aa4eSPiotr Pietruszewski " * fragmented packets count,\n" \ 549afb1aa4eSPiotr Pietruszewski " * oversized packets count,\n" \ 550afb1aa4eSPiotr Pietruszewski " * jabber count." 551afb1aa4eSPiotr Pietruszewski 5522d8f84cbSJack F Vogel /* Workaround to make 8.0 buildable */ 5534655a392SJack F Vogel #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 5542d8f84cbSJack F Vogel static __inline int 5552d8f84cbSJack F Vogel drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 5562d8f84cbSJack F Vogel { 5572d8f84cbSJack F Vogel #ifdef ALTQ 5582d8f84cbSJack F Vogel if (ALTQ_IS_ENABLED(&ifp->if_snd)) 5592d8f84cbSJack F Vogel return (1); 5602d8f84cbSJack F Vogel #endif 5612d8f84cbSJack F Vogel return (!buf_ring_empty(br)); 5622d8f84cbSJack F Vogel } 5632d8f84cbSJack F Vogel #endif 5642d8f84cbSJack F Vogel 565e2314c6cSJack F Vogel /* 5668eb6488eSEric Joyner * This checks for a zero mac addr, something that will be likely 5678eb6488eSEric Joyner * unless the Admin on the Host has created one. 568758cc3dcSJack F Vogel */ 569758cc3dcSJack F Vogel static inline bool 570758cc3dcSJack F Vogel ixv_check_ether_addr(u8 *addr) 571758cc3dcSJack F Vogel { 572758cc3dcSJack F Vogel bool status = TRUE; 573758cc3dcSJack F Vogel 574758cc3dcSJack F Vogel if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 575758cc3dcSJack F Vogel addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 576758cc3dcSJack F Vogel status = FALSE; 5778eb6488eSEric Joyner 578758cc3dcSJack F Vogel return (status); 579758cc3dcSJack F Vogel } 580758cc3dcSJack F Vogel 581758cc3dcSJack F Vogel /* Shared Prototypes */ 582758cc3dcSJack F Vogel 583758cc3dcSJack F Vogel int ixgbe_allocate_queues(struct adapter *); 584758cc3dcSJack F Vogel int ixgbe_setup_transmit_structures(struct adapter *); 585758cc3dcSJack F Vogel void ixgbe_free_transmit_structures(struct adapter *); 586758cc3dcSJack F Vogel int ixgbe_setup_receive_structures(struct adapter *); 587758cc3dcSJack F Vogel void ixgbe_free_receive_structures(struct adapter *); 588c19c7afeSEric Joyner int ixgbe_get_regs(SYSCTL_HANDLER_ARGS); 589758cc3dcSJack F Vogel 5908eb6488eSEric Joyner #include "ixgbe_bypass.h" 5918eb6488eSEric Joyner #include "ixgbe_fdir.h" 5928eb6488eSEric Joyner #include "ixgbe_rss.h" 59348056c88SJack F Vogel 59413705f88SJack F Vogel #endif /* _IXGBE_H_ */ 595