1 /****************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 34 #include "opt_inet.h" 35 #include "opt_inet6.h" 36 #include "opt_rss.h" 37 38 #include "ixgbe.h" 39 #include "ixgbe_sriov.h" 40 #include "ifdi_if.h" 41 42 #include <net/netmap.h> 43 #include <dev/netmap/netmap_kern.h> 44 45 /************************************************************************ 46 * Driver version 47 ************************************************************************/ 48 static const char ixgbe_driver_version[] = "4.0.1-k"; 49 50 /************************************************************************ 51 * PCI Device ID Table 52 * 53 * Used by probe to select devices to load on 54 * Last field stores an index into ixgbe_strings 55 * Last entry must be all 0s 56 * 57 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 58 ************************************************************************/ 59 static const pci_vendor_info_t ixgbe_vendor_info_array[] = 60 { 61 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, "Intel(R) 82598EB AF (Dual Fiber)"), 62 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, "Intel(R) 82598EB AF (Fiber)"), 63 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, "Intel(R) 82598EB AT (CX4)"), 64 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, "Intel(R) 82598EB AT"), 65 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, "Intel(R) 82598EB AT2"), 66 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, "Intel(R) 82598"), 67 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, "Intel(R) 82598EB AF DA (Dual Fiber)"), 68 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, "Intel(R) 82598EB AT (Dual CX4)"), 69 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, "Intel(R) 82598EB AF (Dual Fiber LR)"), 70 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, "Intel(R) 82598EB AF (Dual Fiber SR)"), 71 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, "Intel(R) 82598EB LOM"), 72 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, "Intel(R) X520 82599 (KX4)"), 73 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, "Intel(R) X520 82599 (KX4 Mezzanine)"), 74 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, "Intel(R) X520 82599ES (SFI/SFP+)"), 75 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, "Intel(R) X520 82599 (XAUI/BX4)"), 76 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, "Intel(R) X520 82599 (Dual CX4)"), 77 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, "Intel(R) X520-T 82599 LOM"), 78 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, "Intel(R) X520 82599 LS"), 79 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, "Intel(R) X520 82599 (Combined Backplane)"), 80 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, "Intel(R) X520 82599 (Backplane w/FCoE)"), 81 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, "Intel(R) X520 82599 (Dual SFP+)"), 82 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, "Intel(R) X520 82599 (Dual SFP+ w/FCoE)"), 83 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, "Intel(R) X520-1 82599EN (SFP+)"), 84 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, "Intel(R) X520-4 82599 (Quad SFP+)"), 85 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, "Intel(R) X520-Q1 82599 (QSFP+)"), 86 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, "Intel(R) X540-AT2"), 87 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"), 88 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"), 89 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"), 90 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, "Intel(R) X552 (KR Backplane)"), 91 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, "Intel(R) X552 (KX4 Backplane)"), 92 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, "Intel(R) X552/X557-AT (10GBASE-T)"), 93 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, "Intel(R) X552 (1000BASE-T)"), 94 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, "Intel(R) X552 (SFP+)"), 95 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, "Intel(R) X553 (KR Backplane)"), 96 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, "Intel(R) X553 L (KR Backplane)"), 97 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, "Intel(R) X553 (SFP+)"), 98 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, "Intel(R) X553 N (SFP+)"), 99 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, "Intel(R) X553 (1GbE SGMII)"), 100 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, "Intel(R) X553 L (1GbE SGMII)"), 101 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, "Intel(R) X553/X557-AT (10GBASE-T)"), 102 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, "Intel(R) X553 (1GbE)"), 103 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, "Intel(R) X553 L (1GbE)"), 104 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, "Intel(R) X540-T2 (Bypass)"), 105 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, "Intel(R) X520 82599 (Bypass)"), 106 /* required last entry */ 107 PVID_END 108 }; 109 110 static void *ixgbe_register(device_t); 111 static int ixgbe_if_attach_pre(if_ctx_t); 112 static int ixgbe_if_attach_post(if_ctx_t); 113 static int ixgbe_if_detach(if_ctx_t); 114 static int ixgbe_if_shutdown(if_ctx_t); 115 static int ixgbe_if_suspend(if_ctx_t); 116 static int ixgbe_if_resume(if_ctx_t); 117 118 static void ixgbe_if_stop(if_ctx_t); 119 void ixgbe_if_enable_intr(if_ctx_t); 120 static void ixgbe_if_disable_intr(if_ctx_t); 121 static void ixgbe_link_intr_enable(if_ctx_t); 122 static int ixgbe_if_rx_queue_intr_enable(if_ctx_t, uint16_t); 123 static void ixgbe_if_media_status(if_ctx_t, struct ifmediareq *); 124 static int ixgbe_if_media_change(if_ctx_t); 125 static int ixgbe_if_msix_intr_assign(if_ctx_t, int); 126 static int ixgbe_if_mtu_set(if_ctx_t, uint32_t); 127 static void ixgbe_if_crcstrip_set(if_ctx_t, int, int); 128 static void ixgbe_if_multi_set(if_ctx_t); 129 static int ixgbe_if_promisc_set(if_ctx_t, int); 130 static int ixgbe_if_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, int); 131 static int ixgbe_if_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, int); 132 static void ixgbe_if_queues_free(if_ctx_t); 133 static void ixgbe_if_timer(if_ctx_t, uint16_t); 134 static void ixgbe_if_update_admin_status(if_ctx_t); 135 static void ixgbe_if_vlan_register(if_ctx_t, u16); 136 static void ixgbe_if_vlan_unregister(if_ctx_t, u16); 137 static int ixgbe_if_i2c_req(if_ctx_t, struct ifi2creq *); 138 static bool ixgbe_if_needs_restart(if_ctx_t, enum iflib_restart_event); 139 int ixgbe_intr(void *); 140 141 /************************************************************************ 142 * Function prototypes 143 ************************************************************************/ 144 static uint64_t ixgbe_if_get_counter(if_ctx_t, ift_counter); 145 146 static void ixgbe_enable_queue(struct ixgbe_softc *, u32); 147 static void ixgbe_disable_queue(struct ixgbe_softc *, u32); 148 static void ixgbe_add_device_sysctls(if_ctx_t); 149 static int ixgbe_allocate_pci_resources(if_ctx_t); 150 static int ixgbe_setup_low_power_mode(if_ctx_t); 151 152 static void ixgbe_config_dmac(struct ixgbe_softc *); 153 static void ixgbe_configure_ivars(struct ixgbe_softc *); 154 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 155 static u8 *ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 156 static bool ixgbe_sfp_probe(if_ctx_t); 157 158 static void ixgbe_free_pci_resources(if_ctx_t); 159 160 static int ixgbe_msix_link(void *); 161 static int ixgbe_msix_que(void *); 162 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 163 static void ixgbe_initialize_receive_units(if_ctx_t); 164 static void ixgbe_initialize_transmit_units(if_ctx_t); 165 166 static int ixgbe_setup_interface(if_ctx_t); 167 static void ixgbe_init_device_features(struct ixgbe_softc *); 168 static void ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 169 static void ixgbe_sbuf_fw_version(struct ixgbe_hw *, struct sbuf *); 170 static void ixgbe_print_fw_version(if_ctx_t); 171 static void ixgbe_add_media_types(if_ctx_t); 172 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 173 static void ixgbe_config_link(if_ctx_t); 174 static void ixgbe_get_slot_info(struct ixgbe_softc *); 175 static void ixgbe_check_wol_support(struct ixgbe_softc *); 176 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 177 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 178 179 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 180 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 181 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 182 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 183 static void ixgbe_setup_vlan_hw_support(if_ctx_t); 184 static void ixgbe_config_gpie(struct ixgbe_softc *); 185 static void ixgbe_config_delay_values(struct ixgbe_softc *); 186 187 /* Sysctl handlers */ 188 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS); 189 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS); 190 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS); 191 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 192 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 193 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 194 static int ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS); 195 #ifdef IXGBE_DEBUG 196 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 197 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 198 #endif 199 static int ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS); 200 static int ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS); 201 static int ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS); 202 static int ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS); 203 static int ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS); 204 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 205 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 206 207 /* Deferred interrupt tasklets */ 208 static void ixgbe_handle_msf(void *); 209 static void ixgbe_handle_mod(void *); 210 static void ixgbe_handle_phy(void *); 211 212 /************************************************************************ 213 * FreeBSD Device Interface Entry Points 214 ************************************************************************/ 215 static device_method_t ix_methods[] = { 216 /* Device interface */ 217 DEVMETHOD(device_register, ixgbe_register), 218 DEVMETHOD(device_probe, iflib_device_probe), 219 DEVMETHOD(device_attach, iflib_device_attach), 220 DEVMETHOD(device_detach, iflib_device_detach), 221 DEVMETHOD(device_shutdown, iflib_device_shutdown), 222 DEVMETHOD(device_suspend, iflib_device_suspend), 223 DEVMETHOD(device_resume, iflib_device_resume), 224 #ifdef PCI_IOV 225 DEVMETHOD(pci_iov_init, iflib_device_iov_init), 226 DEVMETHOD(pci_iov_uninit, iflib_device_iov_uninit), 227 DEVMETHOD(pci_iov_add_vf, iflib_device_iov_add_vf), 228 #endif /* PCI_IOV */ 229 DEVMETHOD_END 230 }; 231 232 static driver_t ix_driver = { 233 "ix", ix_methods, sizeof(struct ixgbe_softc), 234 }; 235 236 DRIVER_MODULE(ix, pci, ix_driver, 0, 0); 237 IFLIB_PNP_INFO(pci, ix_driver, ixgbe_vendor_info_array); 238 MODULE_DEPEND(ix, pci, 1, 1, 1); 239 MODULE_DEPEND(ix, ether, 1, 1, 1); 240 MODULE_DEPEND(ix, iflib, 1, 1, 1); 241 242 static device_method_t ixgbe_if_methods[] = { 243 DEVMETHOD(ifdi_attach_pre, ixgbe_if_attach_pre), 244 DEVMETHOD(ifdi_attach_post, ixgbe_if_attach_post), 245 DEVMETHOD(ifdi_detach, ixgbe_if_detach), 246 DEVMETHOD(ifdi_shutdown, ixgbe_if_shutdown), 247 DEVMETHOD(ifdi_suspend, ixgbe_if_suspend), 248 DEVMETHOD(ifdi_resume, ixgbe_if_resume), 249 DEVMETHOD(ifdi_init, ixgbe_if_init), 250 DEVMETHOD(ifdi_stop, ixgbe_if_stop), 251 DEVMETHOD(ifdi_msix_intr_assign, ixgbe_if_msix_intr_assign), 252 DEVMETHOD(ifdi_intr_enable, ixgbe_if_enable_intr), 253 DEVMETHOD(ifdi_intr_disable, ixgbe_if_disable_intr), 254 DEVMETHOD(ifdi_link_intr_enable, ixgbe_link_intr_enable), 255 DEVMETHOD(ifdi_tx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 256 DEVMETHOD(ifdi_rx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 257 DEVMETHOD(ifdi_tx_queues_alloc, ixgbe_if_tx_queues_alloc), 258 DEVMETHOD(ifdi_rx_queues_alloc, ixgbe_if_rx_queues_alloc), 259 DEVMETHOD(ifdi_queues_free, ixgbe_if_queues_free), 260 DEVMETHOD(ifdi_update_admin_status, ixgbe_if_update_admin_status), 261 DEVMETHOD(ifdi_multi_set, ixgbe_if_multi_set), 262 DEVMETHOD(ifdi_mtu_set, ixgbe_if_mtu_set), 263 DEVMETHOD(ifdi_crcstrip_set, ixgbe_if_crcstrip_set), 264 DEVMETHOD(ifdi_media_status, ixgbe_if_media_status), 265 DEVMETHOD(ifdi_media_change, ixgbe_if_media_change), 266 DEVMETHOD(ifdi_promisc_set, ixgbe_if_promisc_set), 267 DEVMETHOD(ifdi_timer, ixgbe_if_timer), 268 DEVMETHOD(ifdi_vlan_register, ixgbe_if_vlan_register), 269 DEVMETHOD(ifdi_vlan_unregister, ixgbe_if_vlan_unregister), 270 DEVMETHOD(ifdi_get_counter, ixgbe_if_get_counter), 271 DEVMETHOD(ifdi_i2c_req, ixgbe_if_i2c_req), 272 DEVMETHOD(ifdi_needs_restart, ixgbe_if_needs_restart), 273 #ifdef PCI_IOV 274 DEVMETHOD(ifdi_iov_init, ixgbe_if_iov_init), 275 DEVMETHOD(ifdi_iov_uninit, ixgbe_if_iov_uninit), 276 DEVMETHOD(ifdi_iov_vf_add, ixgbe_if_iov_vf_add), 277 #endif /* PCI_IOV */ 278 DEVMETHOD_END 279 }; 280 281 /* 282 * TUNEABLE PARAMETERS: 283 */ 284 285 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 286 "IXGBE driver parameters"); 287 static driver_t ixgbe_if_driver = { 288 "ixgbe_if", ixgbe_if_methods, sizeof(struct ixgbe_softc) 289 }; 290 291 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 292 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 293 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 294 295 /* Flow control setting, default to full */ 296 static int ixgbe_flow_control = ixgbe_fc_full; 297 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 298 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 299 300 /* Advertise Speed, default to 0 (auto) */ 301 static int ixgbe_advertise_speed = 0; 302 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN, 303 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters"); 304 305 /* 306 * Smart speed setting, default to on 307 * this only works as a compile option 308 * right now as its during attach, set 309 * this to 'ixgbe_smart_speed_off' to 310 * disable. 311 */ 312 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 313 314 /* 315 * MSI-X should be the default for best performance, 316 * but this allows it to be forced off for testing. 317 */ 318 static int ixgbe_enable_msix = 1; 319 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 320 "Enable MSI-X interrupts"); 321 322 /* 323 * Defining this on will allow the use 324 * of unsupported SFP+ modules, note that 325 * doing so you are on your own :) 326 */ 327 static int allow_unsupported_sfp = false; 328 SYSCTL_INT(_hw_ix, OID_AUTO, unsupported_sfp, CTLFLAG_RDTUN, 329 &allow_unsupported_sfp, 0, 330 "Allow unsupported SFP modules...use at your own risk"); 331 332 /* 333 * Not sure if Flow Director is fully baked, 334 * so we'll default to turning it off. 335 */ 336 static int ixgbe_enable_fdir = 0; 337 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0, 338 "Enable Flow Director"); 339 340 /* Receive-Side Scaling */ 341 static int ixgbe_enable_rss = 1; 342 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0, 343 "Enable Receive-Side Scaling (RSS)"); 344 345 /* 346 * AIM: Adaptive Interrupt Moderation 347 * which means that the interrupt rate 348 * is varied over time based on the 349 * traffic for that interrupt vector 350 */ 351 static int ixgbe_enable_aim = false; 352 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 0, 353 "Enable adaptive interrupt moderation"); 354 355 #if 0 356 /* Keep running tab on them for sanity check */ 357 static int ixgbe_total_ports; 358 #endif 359 360 MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 361 362 /* 363 * For Flow Director: this is the number of TX packets we sample 364 * for the filter pool, this means every 20th packet will be probed. 365 * 366 * This feature can be disabled by setting this to 0. 367 */ 368 static int atr_sample_rate = 20; 369 370 extern struct if_txrx ixgbe_txrx; 371 372 static struct if_shared_ctx ixgbe_sctx_init = { 373 .isc_magic = IFLIB_MAGIC, 374 .isc_q_align = PAGE_SIZE,/* max(DBA_ALIGN, PAGE_SIZE) */ 375 .isc_tx_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 376 .isc_tx_maxsegsize = PAGE_SIZE, 377 .isc_tso_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 378 .isc_tso_maxsegsize = PAGE_SIZE, 379 .isc_rx_maxsize = PAGE_SIZE*4, 380 .isc_rx_nsegments = 1, 381 .isc_rx_maxsegsize = PAGE_SIZE*4, 382 .isc_nfl = 1, 383 .isc_ntxqs = 1, 384 .isc_nrxqs = 1, 385 386 .isc_admin_intrcnt = 1, 387 .isc_vendor_info = ixgbe_vendor_info_array, 388 .isc_driver_version = ixgbe_driver_version, 389 .isc_driver = &ixgbe_if_driver, 390 .isc_flags = IFLIB_TSO_INIT_IP, 391 392 .isc_nrxd_min = {MIN_RXD}, 393 .isc_ntxd_min = {MIN_TXD}, 394 .isc_nrxd_max = {MAX_RXD}, 395 .isc_ntxd_max = {MAX_TXD}, 396 .isc_nrxd_default = {DEFAULT_RXD}, 397 .isc_ntxd_default = {DEFAULT_TXD}, 398 }; 399 400 /************************************************************************ 401 * ixgbe_if_tx_queues_alloc 402 ************************************************************************/ 403 static int 404 ixgbe_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 405 int ntxqs, int ntxqsets) 406 { 407 struct ixgbe_softc *sc = iflib_get_softc(ctx); 408 if_softc_ctx_t scctx = sc->shared; 409 struct ix_tx_queue *que; 410 int i, j, error; 411 412 MPASS(sc->num_tx_queues > 0); 413 MPASS(sc->num_tx_queues == ntxqsets); 414 MPASS(ntxqs == 1); 415 416 /* Allocate queue structure memory */ 417 sc->tx_queues = 418 (struct ix_tx_queue *)malloc(sizeof(struct ix_tx_queue) * ntxqsets, 419 M_IXGBE, M_NOWAIT | M_ZERO); 420 if (!sc->tx_queues) { 421 device_printf(iflib_get_dev(ctx), 422 "Unable to allocate TX ring memory\n"); 423 return (ENOMEM); 424 } 425 426 for (i = 0, que = sc->tx_queues; i < ntxqsets; i++, que++) { 427 struct tx_ring *txr = &que->txr; 428 429 /* In case SR-IOV is enabled, align the index properly */ 430 txr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, 431 i); 432 433 txr->sc = que->sc = sc; 434 435 /* Allocate report status array */ 436 txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) * scctx->isc_ntxd[0], M_IXGBE, M_NOWAIT | M_ZERO); 437 if (txr->tx_rsq == NULL) { 438 error = ENOMEM; 439 goto fail; 440 } 441 for (j = 0; j < scctx->isc_ntxd[0]; j++) 442 txr->tx_rsq[j] = QIDX_INVALID; 443 /* get the virtual and physical address of the hardware queues */ 444 txr->tail = IXGBE_TDT(txr->me); 445 txr->tx_base = (union ixgbe_adv_tx_desc *)vaddrs[i]; 446 txr->tx_paddr = paddrs[i]; 447 448 txr->bytes = 0; 449 txr->total_packets = 0; 450 451 /* Set the rate at which we sample packets */ 452 if (sc->feat_en & IXGBE_FEATURE_FDIR) 453 txr->atr_sample = atr_sample_rate; 454 455 } 456 457 device_printf(iflib_get_dev(ctx), "allocated for %d queues\n", 458 sc->num_tx_queues); 459 460 return (0); 461 462 fail: 463 ixgbe_if_queues_free(ctx); 464 465 return (error); 466 } /* ixgbe_if_tx_queues_alloc */ 467 468 /************************************************************************ 469 * ixgbe_if_rx_queues_alloc 470 ************************************************************************/ 471 static int 472 ixgbe_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 473 int nrxqs, int nrxqsets) 474 { 475 struct ixgbe_softc *sc = iflib_get_softc(ctx); 476 struct ix_rx_queue *que; 477 int i; 478 479 MPASS(sc->num_rx_queues > 0); 480 MPASS(sc->num_rx_queues == nrxqsets); 481 MPASS(nrxqs == 1); 482 483 /* Allocate queue structure memory */ 484 sc->rx_queues = 485 (struct ix_rx_queue *)malloc(sizeof(struct ix_rx_queue)*nrxqsets, 486 M_IXGBE, M_NOWAIT | M_ZERO); 487 if (!sc->rx_queues) { 488 device_printf(iflib_get_dev(ctx), 489 "Unable to allocate TX ring memory\n"); 490 return (ENOMEM); 491 } 492 493 for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) { 494 struct rx_ring *rxr = &que->rxr; 495 496 /* In case SR-IOV is enabled, align the index properly */ 497 rxr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, 498 i); 499 500 rxr->sc = que->sc = sc; 501 502 /* get the virtual and physical address of the hw queues */ 503 rxr->tail = IXGBE_RDT(rxr->me); 504 rxr->rx_base = (union ixgbe_adv_rx_desc *)vaddrs[i]; 505 rxr->rx_paddr = paddrs[i]; 506 rxr->bytes = 0; 507 rxr->que = que; 508 } 509 510 device_printf(iflib_get_dev(ctx), "allocated for %d rx queues\n", 511 sc->num_rx_queues); 512 513 return (0); 514 } /* ixgbe_if_rx_queues_alloc */ 515 516 /************************************************************************ 517 * ixgbe_if_queues_free 518 ************************************************************************/ 519 static void 520 ixgbe_if_queues_free(if_ctx_t ctx) 521 { 522 struct ixgbe_softc *sc = iflib_get_softc(ctx); 523 struct ix_tx_queue *tx_que = sc->tx_queues; 524 struct ix_rx_queue *rx_que = sc->rx_queues; 525 int i; 526 527 if (tx_que != NULL) { 528 for (i = 0; i < sc->num_tx_queues; i++, tx_que++) { 529 struct tx_ring *txr = &tx_que->txr; 530 if (txr->tx_rsq == NULL) 531 break; 532 533 free(txr->tx_rsq, M_IXGBE); 534 txr->tx_rsq = NULL; 535 } 536 537 free(sc->tx_queues, M_IXGBE); 538 sc->tx_queues = NULL; 539 } 540 if (rx_que != NULL) { 541 free(sc->rx_queues, M_IXGBE); 542 sc->rx_queues = NULL; 543 } 544 } /* ixgbe_if_queues_free */ 545 546 /************************************************************************ 547 * ixgbe_initialize_rss_mapping 548 ************************************************************************/ 549 static void 550 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 551 { 552 struct ixgbe_hw *hw = &sc->hw; 553 u32 reta = 0, mrqc, rss_key[10]; 554 int queue_id, table_size, index_mult; 555 int i, j; 556 u32 rss_hash_config; 557 558 if (sc->feat_en & IXGBE_FEATURE_RSS) { 559 /* Fetch the configured RSS key */ 560 rss_getkey((uint8_t *)&rss_key); 561 } else { 562 /* set up random bits */ 563 arc4rand(&rss_key, sizeof(rss_key), 0); 564 } 565 566 /* Set multiplier for RETA setup and table size based on MAC */ 567 index_mult = 0x1; 568 table_size = 128; 569 switch (sc->hw.mac.type) { 570 case ixgbe_mac_82598EB: 571 index_mult = 0x11; 572 break; 573 case ixgbe_mac_X550: 574 case ixgbe_mac_X550EM_x: 575 case ixgbe_mac_X550EM_a: 576 table_size = 512; 577 break; 578 default: 579 break; 580 } 581 582 /* Set up the redirection table */ 583 for (i = 0, j = 0; i < table_size; i++, j++) { 584 if (j == sc->num_rx_queues) 585 j = 0; 586 587 if (sc->feat_en & IXGBE_FEATURE_RSS) { 588 /* 589 * Fetch the RSS bucket id for the given indirection 590 * entry. Cap it at the number of configured buckets 591 * (which is num_rx_queues.) 592 */ 593 queue_id = rss_get_indirection_to_bucket(i); 594 queue_id = queue_id % sc->num_rx_queues; 595 } else 596 queue_id = (j * index_mult); 597 598 /* 599 * The low 8 bits are for hash value (n+0); 600 * The next 8 bits are for hash value (n+1), etc. 601 */ 602 reta = reta >> 8; 603 reta = reta | (((uint32_t)queue_id) << 24); 604 if ((i & 3) == 3) { 605 if (i < 128) 606 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 607 else 608 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 609 reta); 610 reta = 0; 611 } 612 } 613 614 /* Now fill our hash function seeds */ 615 for (i = 0; i < 10; i++) 616 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 617 618 /* Perform hash on these packet types */ 619 if (sc->feat_en & IXGBE_FEATURE_RSS) 620 rss_hash_config = rss_gethashconfig(); 621 else { 622 /* 623 * Disable UDP - IP fragments aren't currently being handled 624 * and so we end up with a mix of 2-tuple and 4-tuple 625 * traffic. 626 */ 627 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 628 | RSS_HASHTYPE_RSS_TCP_IPV4 629 | RSS_HASHTYPE_RSS_IPV6 630 | RSS_HASHTYPE_RSS_TCP_IPV6 631 | RSS_HASHTYPE_RSS_IPV6_EX 632 | RSS_HASHTYPE_RSS_TCP_IPV6_EX; 633 } 634 635 mrqc = IXGBE_MRQC_RSSEN; 636 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 637 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 638 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 639 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 640 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 641 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 642 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 643 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 644 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 645 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 646 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 647 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 648 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 649 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 650 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 651 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 652 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 653 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 654 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 655 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 656 } /* ixgbe_initialize_rss_mapping */ 657 658 /************************************************************************ 659 * ixgbe_initialize_receive_units - Setup receive registers and features. 660 ************************************************************************/ 661 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 662 663 static void 664 ixgbe_initialize_receive_units(if_ctx_t ctx) 665 { 666 struct ixgbe_softc *sc = iflib_get_softc(ctx); 667 if_softc_ctx_t scctx = sc->shared; 668 struct ixgbe_hw *hw = &sc->hw; 669 if_t ifp = iflib_get_ifp(ctx); 670 struct ix_rx_queue *que; 671 int i, j; 672 u32 bufsz, fctrl, srrctl, rxcsum; 673 u32 hlreg; 674 675 /* 676 * Make sure receives are disabled while 677 * setting up the descriptor ring 678 */ 679 ixgbe_disable_rx(hw); 680 681 /* Enable broadcasts */ 682 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 683 fctrl |= IXGBE_FCTRL_BAM; 684 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 685 fctrl |= IXGBE_FCTRL_DPF; 686 fctrl |= IXGBE_FCTRL_PMCF; 687 } 688 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 689 690 /* Set for Jumbo Frames? */ 691 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 692 if (if_getmtu(ifp) > ETHERMTU) 693 hlreg |= IXGBE_HLREG0_JUMBOEN; 694 else 695 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 696 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 697 698 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 699 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 700 701 /* Setup the Base and Length of the Rx Descriptor Ring */ 702 for (i = 0, que = sc->rx_queues; i < sc->num_rx_queues; i++, que++) { 703 struct rx_ring *rxr = &que->rxr; 704 u64 rdba = rxr->rx_paddr; 705 706 j = rxr->me; 707 708 /* Setup the Base and Length of the Rx Descriptor Ring */ 709 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 710 (rdba & 0x00000000ffffffffULL)); 711 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 712 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 713 scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc)); 714 715 /* Set up the SRRCTL register */ 716 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 717 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 718 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 719 srrctl |= bufsz; 720 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 721 722 /* 723 * Set DROP_EN iff we have no flow control and >1 queue. 724 * Note that srrctl was cleared shortly before during reset, 725 * so we do not need to clear the bit, but do it just in case 726 * this code is moved elsewhere. 727 */ 728 if (sc->num_rx_queues > 1 && 729 sc->hw.fc.requested_mode == ixgbe_fc_none) { 730 srrctl |= IXGBE_SRRCTL_DROP_EN; 731 } else { 732 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 733 } 734 735 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 736 737 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 738 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 739 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 740 741 /* Set the driver rx tail address */ 742 rxr->tail = IXGBE_RDT(rxr->me); 743 } 744 745 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 746 u32 psrtype = IXGBE_PSRTYPE_TCPHDR 747 | IXGBE_PSRTYPE_UDPHDR 748 | IXGBE_PSRTYPE_IPV4HDR 749 | IXGBE_PSRTYPE_IPV6HDR; 750 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 751 } 752 753 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 754 755 ixgbe_initialize_rss_mapping(sc); 756 757 if (sc->feat_en & IXGBE_FEATURE_RSS) { 758 /* RSS and RX IPP Checksum are mutually exclusive */ 759 rxcsum |= IXGBE_RXCSUM_PCSD; 760 } 761 762 if (if_getcapenable(ifp) & IFCAP_RXCSUM) 763 rxcsum |= IXGBE_RXCSUM_PCSD; 764 765 /* This is useful for calculating UDP/IP fragment checksums */ 766 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 767 rxcsum |= IXGBE_RXCSUM_IPPCSE; 768 769 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 770 771 } /* ixgbe_initialize_receive_units */ 772 773 /************************************************************************ 774 * ixgbe_initialize_transmit_units - Enable transmit units. 775 ************************************************************************/ 776 static void 777 ixgbe_initialize_transmit_units(if_ctx_t ctx) 778 { 779 struct ixgbe_softc *sc = iflib_get_softc(ctx); 780 struct ixgbe_hw *hw = &sc->hw; 781 if_softc_ctx_t scctx = sc->shared; 782 struct ix_tx_queue *que; 783 int i; 784 785 /* Setup the Base and Length of the Tx Descriptor Ring */ 786 for (i = 0, que = sc->tx_queues; i < sc->num_tx_queues; 787 i++, que++) { 788 struct tx_ring *txr = &que->txr; 789 u64 tdba = txr->tx_paddr; 790 u32 txctrl = 0; 791 int j = txr->me; 792 793 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 794 (tdba & 0x00000000ffffffffULL)); 795 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 796 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 797 scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc)); 798 799 /* Setup the HW Tx Head and Tail descriptor pointers */ 800 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 801 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 802 803 /* Cache the tail address */ 804 txr->tail = IXGBE_TDT(txr->me); 805 806 txr->tx_rs_cidx = txr->tx_rs_pidx; 807 txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1; 808 for (int k = 0; k < scctx->isc_ntxd[0]; k++) 809 txr->tx_rsq[k] = QIDX_INVALID; 810 811 /* Disable Head Writeback */ 812 /* 813 * Note: for X550 series devices, these registers are actually 814 * prefixed with TPH_ isntead of DCA_, but the addresses and 815 * fields remain the same. 816 */ 817 switch (hw->mac.type) { 818 case ixgbe_mac_82598EB: 819 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 820 break; 821 default: 822 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 823 break; 824 } 825 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 826 switch (hw->mac.type) { 827 case ixgbe_mac_82598EB: 828 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 829 break; 830 default: 831 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 832 break; 833 } 834 835 } 836 837 if (hw->mac.type != ixgbe_mac_82598EB) { 838 u32 dmatxctl, rttdcs; 839 840 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 841 dmatxctl |= IXGBE_DMATXCTL_TE; 842 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 843 /* Disable arbiter to set MTQC */ 844 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 845 rttdcs |= IXGBE_RTTDCS_ARBDIS; 846 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 847 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 848 ixgbe_get_mtqc(sc->iov_mode)); 849 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 850 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 851 } 852 853 } /* ixgbe_initialize_transmit_units */ 854 855 /************************************************************************ 856 * ixgbe_register 857 ************************************************************************/ 858 static void * 859 ixgbe_register(device_t dev) 860 { 861 return (&ixgbe_sctx_init); 862 } /* ixgbe_register */ 863 864 /************************************************************************ 865 * ixgbe_if_attach_pre - Device initialization routine, part 1 866 * 867 * Called when the driver is being loaded. 868 * Identifies the type of hardware, initializes the hardware, 869 * and initializes iflib structures. 870 * 871 * return 0 on success, positive on failure 872 ************************************************************************/ 873 static int 874 ixgbe_if_attach_pre(if_ctx_t ctx) 875 { 876 struct ixgbe_softc *sc; 877 device_t dev; 878 if_softc_ctx_t scctx; 879 struct ixgbe_hw *hw; 880 int error = 0; 881 u32 ctrl_ext; 882 size_t i; 883 884 INIT_DEBUGOUT("ixgbe_attach: begin"); 885 886 /* Allocate, clear, and link in our adapter structure */ 887 dev = iflib_get_dev(ctx); 888 sc = iflib_get_softc(ctx); 889 sc->hw.back = sc; 890 sc->ctx = ctx; 891 sc->dev = dev; 892 scctx = sc->shared = iflib_get_softc_ctx(ctx); 893 sc->media = iflib_get_media(ctx); 894 hw = &sc->hw; 895 896 /* Determine hardware revision */ 897 hw->vendor_id = pci_get_vendor(dev); 898 hw->device_id = pci_get_device(dev); 899 hw->revision_id = pci_get_revid(dev); 900 hw->subsystem_vendor_id = pci_get_subvendor(dev); 901 hw->subsystem_device_id = pci_get_subdevice(dev); 902 903 /* Do base PCI setup - map BAR0 */ 904 if (ixgbe_allocate_pci_resources(ctx)) { 905 device_printf(dev, "Allocation of PCI resources failed\n"); 906 return (ENXIO); 907 } 908 909 /* let hardware know driver is loaded */ 910 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 911 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 912 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 913 914 /* 915 * Initialize the shared code 916 */ 917 if (ixgbe_init_shared_code(hw) != 0) { 918 device_printf(dev, "Unable to initialize the shared code\n"); 919 error = ENXIO; 920 goto err_pci; 921 } 922 923 if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) { 924 device_printf(dev, "Firmware recovery mode detected. Limiting " 925 "functionality.\nRefer to the Intel(R) Ethernet Adapters " 926 "and Devices User Guide for details on firmware recovery " 927 "mode."); 928 error = ENOSYS; 929 goto err_pci; 930 } 931 932 /* 82598 Does not support SR-IOV, initialize everything else */ 933 if (hw->mac.type >= ixgbe_mac_82599_vf) { 934 for (i = 0; i < sc->num_vfs; i++) 935 hw->mbx.ops[i].init_params(hw); 936 } 937 938 hw->allow_unsupported_sfp = allow_unsupported_sfp; 939 940 if (hw->mac.type != ixgbe_mac_82598EB) 941 hw->phy.smart_speed = ixgbe_smart_speed; 942 943 ixgbe_init_device_features(sc); 944 945 /* Enable WoL (if supported) */ 946 ixgbe_check_wol_support(sc); 947 948 /* Verify adapter fan is still functional (if applicable) */ 949 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 950 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 951 ixgbe_check_fan_failure(sc, esdp, false); 952 } 953 954 /* Ensure SW/FW semaphore is free */ 955 ixgbe_init_swfw_semaphore(hw); 956 957 /* Set an initial default flow control value */ 958 hw->fc.requested_mode = ixgbe_flow_control; 959 960 hw->phy.reset_if_overtemp = true; 961 error = ixgbe_reset_hw(hw); 962 hw->phy.reset_if_overtemp = false; 963 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 964 /* 965 * No optics in this port, set up 966 * so the timer routine will probe 967 * for later insertion. 968 */ 969 sc->sfp_probe = true; 970 error = 0; 971 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 972 device_printf(dev, "Unsupported SFP+ module detected!\n"); 973 error = EIO; 974 goto err_pci; 975 } else if (error) { 976 device_printf(dev, "Hardware initialization failed\n"); 977 error = EIO; 978 goto err_pci; 979 } 980 981 /* Make sure we have a good EEPROM before we read from it */ 982 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 983 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 984 error = EIO; 985 goto err_pci; 986 } 987 988 error = ixgbe_start_hw(hw); 989 switch (error) { 990 case IXGBE_ERR_EEPROM_VERSION: 991 device_printf(dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues associated with your hardware.\nIf you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 992 break; 993 case IXGBE_ERR_SFP_NOT_SUPPORTED: 994 device_printf(dev, "Unsupported SFP+ Module\n"); 995 error = EIO; 996 goto err_pci; 997 case IXGBE_ERR_SFP_NOT_PRESENT: 998 device_printf(dev, "No SFP+ Module found\n"); 999 /* falls thru */ 1000 default: 1001 break; 1002 } 1003 1004 /* Most of the iflib initialization... */ 1005 1006 iflib_set_mac(ctx, hw->mac.addr); 1007 switch (sc->hw.mac.type) { 1008 case ixgbe_mac_X550: 1009 case ixgbe_mac_X550EM_x: 1010 case ixgbe_mac_X550EM_a: 1011 scctx->isc_rss_table_size = 512; 1012 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 64; 1013 break; 1014 default: 1015 scctx->isc_rss_table_size = 128; 1016 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 16; 1017 } 1018 1019 /* Allow legacy interrupts */ 1020 ixgbe_txrx.ift_legacy_intr = ixgbe_intr; 1021 1022 scctx->isc_txqsizes[0] = 1023 roundup2(scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc) + 1024 sizeof(u32), DBA_ALIGN), 1025 scctx->isc_rxqsizes[0] = 1026 roundup2(scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc), 1027 DBA_ALIGN); 1028 1029 /* XXX */ 1030 scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO | 1031 CSUM_IP6_TCP | CSUM_IP6_UDP | CSUM_IP6_TSO; 1032 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 1033 scctx->isc_tx_nsegments = IXGBE_82598_SCATTER; 1034 } else { 1035 scctx->isc_tx_csum_flags |= CSUM_SCTP |CSUM_IP6_SCTP; 1036 scctx->isc_tx_nsegments = IXGBE_82599_SCATTER; 1037 } 1038 1039 scctx->isc_msix_bar = pci_msix_table_bar(dev); 1040 1041 scctx->isc_tx_tso_segments_max = scctx->isc_tx_nsegments; 1042 scctx->isc_tx_tso_size_max = IXGBE_TSO_SIZE; 1043 scctx->isc_tx_tso_segsize_max = PAGE_SIZE; 1044 1045 scctx->isc_txrx = &ixgbe_txrx; 1046 1047 scctx->isc_capabilities = scctx->isc_capenable = IXGBE_CAPS; 1048 1049 return (0); 1050 1051 err_pci: 1052 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1053 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1054 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1055 ixgbe_free_pci_resources(ctx); 1056 1057 return (error); 1058 } /* ixgbe_if_attach_pre */ 1059 1060 /********************************************************************* 1061 * ixgbe_if_attach_post - Device initialization routine, part 2 1062 * 1063 * Called during driver load, but after interrupts and 1064 * resources have been allocated and configured. 1065 * Sets up some data structures not relevant to iflib. 1066 * 1067 * return 0 on success, positive on failure 1068 *********************************************************************/ 1069 static int 1070 ixgbe_if_attach_post(if_ctx_t ctx) 1071 { 1072 device_t dev; 1073 struct ixgbe_softc *sc; 1074 struct ixgbe_hw *hw; 1075 int error = 0; 1076 1077 dev = iflib_get_dev(ctx); 1078 sc = iflib_get_softc(ctx); 1079 hw = &sc->hw; 1080 1081 1082 if (sc->intr_type == IFLIB_INTR_LEGACY && 1083 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) == 0) { 1084 device_printf(dev, "Device does not support legacy interrupts"); 1085 error = ENXIO; 1086 goto err; 1087 } 1088 1089 /* Allocate multicast array memory. */ 1090 sc->mta = malloc(sizeof(*sc->mta) * 1091 MAX_NUM_MULTICAST_ADDRESSES, M_IXGBE, M_NOWAIT); 1092 if (sc->mta == NULL) { 1093 device_printf(dev, "Can not allocate multicast setup array\n"); 1094 error = ENOMEM; 1095 goto err; 1096 } 1097 1098 /* hw.ix defaults init */ 1099 ixgbe_set_advertise(sc, ixgbe_advertise_speed); 1100 1101 /* Enable the optics for 82599 SFP+ fiber */ 1102 ixgbe_enable_tx_laser(hw); 1103 1104 /* Enable power to the phy. */ 1105 ixgbe_set_phy_power(hw, true); 1106 1107 ixgbe_initialize_iov(sc); 1108 1109 error = ixgbe_setup_interface(ctx); 1110 if (error) { 1111 device_printf(dev, "Interface setup failed: %d\n", error); 1112 goto err; 1113 } 1114 1115 ixgbe_if_update_admin_status(ctx); 1116 1117 /* Initialize statistics */ 1118 ixgbe_update_stats_counters(sc); 1119 ixgbe_add_hw_stats(sc); 1120 1121 /* Check PCIE slot type/speed/width */ 1122 ixgbe_get_slot_info(sc); 1123 1124 /* 1125 * Do time init and sysctl init here, but 1126 * only on the first port of a bypass sc. 1127 */ 1128 ixgbe_bypass_init(sc); 1129 1130 /* Display NVM and Option ROM versions */ 1131 ixgbe_print_fw_version(ctx); 1132 1133 /* Set an initial dmac value */ 1134 sc->dmac = 0; 1135 /* Set initial advertised speeds (if applicable) */ 1136 sc->advertise = ixgbe_get_default_advertise(sc); 1137 1138 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1139 ixgbe_define_iov_schemas(dev, &error); 1140 1141 /* Add sysctls */ 1142 ixgbe_add_device_sysctls(ctx); 1143 1144 return (0); 1145 err: 1146 return (error); 1147 } /* ixgbe_if_attach_post */ 1148 1149 /************************************************************************ 1150 * ixgbe_check_wol_support 1151 * 1152 * Checks whether the adapter's ports are capable of 1153 * Wake On LAN by reading the adapter's NVM. 1154 * 1155 * Sets each port's hw->wol_enabled value depending 1156 * on the value read here. 1157 ************************************************************************/ 1158 static void 1159 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1160 { 1161 struct ixgbe_hw *hw = &sc->hw; 1162 u16 dev_caps = 0; 1163 1164 /* Find out WoL support for port */ 1165 sc->wol_support = hw->wol_enabled = 0; 1166 ixgbe_get_device_caps(hw, &dev_caps); 1167 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1168 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1169 hw->bus.func == 0)) 1170 sc->wol_support = hw->wol_enabled = 1; 1171 1172 /* Save initial wake up filter configuration */ 1173 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1174 1175 return; 1176 } /* ixgbe_check_wol_support */ 1177 1178 /************************************************************************ 1179 * ixgbe_setup_interface 1180 * 1181 * Setup networking device structure and register an interface. 1182 ************************************************************************/ 1183 static int 1184 ixgbe_setup_interface(if_ctx_t ctx) 1185 { 1186 if_t ifp = iflib_get_ifp(ctx); 1187 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1188 1189 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1190 1191 if_setbaudrate(ifp, IF_Gbps(10)); 1192 1193 sc->max_frame_size = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN; 1194 1195 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1196 1197 ixgbe_add_media_types(ctx); 1198 1199 /* Autoselect media by default */ 1200 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 1201 1202 return (0); 1203 } /* ixgbe_setup_interface */ 1204 1205 /************************************************************************ 1206 * ixgbe_if_get_counter 1207 ************************************************************************/ 1208 static uint64_t 1209 ixgbe_if_get_counter(if_ctx_t ctx, ift_counter cnt) 1210 { 1211 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1212 if_t ifp = iflib_get_ifp(ctx); 1213 1214 switch (cnt) { 1215 case IFCOUNTER_IPACKETS: 1216 return (sc->ipackets); 1217 case IFCOUNTER_OPACKETS: 1218 return (sc->opackets); 1219 case IFCOUNTER_IBYTES: 1220 return (sc->ibytes); 1221 case IFCOUNTER_OBYTES: 1222 return (sc->obytes); 1223 case IFCOUNTER_IMCASTS: 1224 return (sc->imcasts); 1225 case IFCOUNTER_OMCASTS: 1226 return (sc->omcasts); 1227 case IFCOUNTER_COLLISIONS: 1228 return (0); 1229 case IFCOUNTER_IQDROPS: 1230 return (sc->iqdrops); 1231 case IFCOUNTER_OQDROPS: 1232 return (0); 1233 case IFCOUNTER_IERRORS: 1234 return (sc->ierrors); 1235 default: 1236 return (if_get_counter_default(ifp, cnt)); 1237 } 1238 } /* ixgbe_if_get_counter */ 1239 1240 /************************************************************************ 1241 * ixgbe_if_i2c_req 1242 ************************************************************************/ 1243 static int 1244 ixgbe_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req) 1245 { 1246 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1247 struct ixgbe_hw *hw = &sc->hw; 1248 int i; 1249 1250 1251 if (hw->phy.ops.read_i2c_byte == NULL) 1252 return (ENXIO); 1253 for (i = 0; i < req->len; i++) 1254 hw->phy.ops.read_i2c_byte(hw, req->offset + i, 1255 req->dev_addr, &req->data[i]); 1256 return (0); 1257 } /* ixgbe_if_i2c_req */ 1258 1259 /* ixgbe_if_needs_restart - Tell iflib when the driver needs to be reinitialized 1260 * @ctx: iflib context 1261 * @event: event code to check 1262 * 1263 * Defaults to returning false for unknown events. 1264 * 1265 * @returns true if iflib needs to reinit the interface 1266 */ 1267 static bool 1268 ixgbe_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event) 1269 { 1270 switch (event) { 1271 case IFLIB_RESTART_VLAN_CONFIG: 1272 default: 1273 return (false); 1274 } 1275 } 1276 1277 /************************************************************************ 1278 * ixgbe_add_media_types 1279 ************************************************************************/ 1280 static void 1281 ixgbe_add_media_types(if_ctx_t ctx) 1282 { 1283 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1284 struct ixgbe_hw *hw = &sc->hw; 1285 device_t dev = iflib_get_dev(ctx); 1286 u64 layer; 1287 1288 layer = sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 1289 1290 /* Media types with matching FreeBSD media defines */ 1291 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1292 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_T, 0, NULL); 1293 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1294 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1295 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1296 ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL); 1297 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1298 ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL); 1299 1300 if (hw->mac.type == ixgbe_mac_X550) { 1301 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1302 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1303 } 1304 1305 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1306 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1307 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_TWINAX, 0, 1308 NULL); 1309 1310 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1311 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 1312 if (hw->phy.multispeed_fiber) 1313 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_LX, 0, 1314 NULL); 1315 } 1316 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1317 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1318 if (hw->phy.multispeed_fiber) 1319 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, 1320 NULL); 1321 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1322 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 1323 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1324 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1325 1326 #ifdef IFM_ETH_XTYPE 1327 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1328 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 1329 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1330 ifmedia_add( sc->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 1331 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1332 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1333 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1334 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_KX, 0, NULL); 1335 #else 1336 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 1337 device_printf(dev, "Media supported: 10GbaseKR\n"); 1338 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 1339 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1340 } 1341 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 1342 device_printf(dev, "Media supported: 10GbaseKX4\n"); 1343 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 1344 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1345 } 1346 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 1347 device_printf(dev, "Media supported: 1000baseKX\n"); 1348 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 1349 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 1350 } 1351 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) { 1352 device_printf(dev, "Media supported: 2500baseKX\n"); 1353 device_printf(dev, "2500baseKX mapped to 2500baseSX\n"); 1354 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_SX, 0, NULL); 1355 } 1356 #endif 1357 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 1358 device_printf(dev, "Media supported: 1000baseBX\n"); 1359 1360 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 1361 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1362 0, NULL); 1363 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1364 } 1365 1366 ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1367 } /* ixgbe_add_media_types */ 1368 1369 /************************************************************************ 1370 * ixgbe_is_sfp 1371 ************************************************************************/ 1372 static inline bool 1373 ixgbe_is_sfp(struct ixgbe_hw *hw) 1374 { 1375 switch (hw->mac.type) { 1376 case ixgbe_mac_82598EB: 1377 if (hw->phy.type == ixgbe_phy_nl) 1378 return (true); 1379 return (false); 1380 case ixgbe_mac_82599EB: 1381 switch (hw->mac.ops.get_media_type(hw)) { 1382 case ixgbe_media_type_fiber: 1383 case ixgbe_media_type_fiber_qsfp: 1384 return (true); 1385 default: 1386 return (false); 1387 } 1388 case ixgbe_mac_X550EM_x: 1389 case ixgbe_mac_X550EM_a: 1390 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) 1391 return (true); 1392 return (false); 1393 default: 1394 return (false); 1395 } 1396 } /* ixgbe_is_sfp */ 1397 1398 /************************************************************************ 1399 * ixgbe_config_link 1400 ************************************************************************/ 1401 static void 1402 ixgbe_config_link(if_ctx_t ctx) 1403 { 1404 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1405 struct ixgbe_hw *hw = &sc->hw; 1406 u32 autoneg, err = 0; 1407 bool sfp, negotiate; 1408 1409 sfp = ixgbe_is_sfp(hw); 1410 1411 if (sfp) { 1412 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 1413 iflib_admin_intr_deferred(ctx); 1414 } else { 1415 if (hw->mac.ops.check_link) 1416 err = ixgbe_check_link(hw, &sc->link_speed, 1417 &sc->link_up, false); 1418 if (err) 1419 return; 1420 autoneg = hw->phy.autoneg_advertised; 1421 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 1422 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1423 &negotiate); 1424 if (err) 1425 return; 1426 1427 if (hw->mac.type == ixgbe_mac_X550 && 1428 hw->phy.autoneg_advertised == 0) { 1429 /* 1430 * 2.5G and 5G autonegotiation speeds on X550 1431 * are disabled by default due to reported 1432 * interoperability issues with some switches. 1433 * 1434 * The second condition checks if any operations 1435 * involving setting autonegotiation speeds have 1436 * been performed prior to this ixgbe_config_link() 1437 * call. 1438 * 1439 * If hw->phy.autoneg_advertised does not 1440 * equal 0, this means that the user might have 1441 * set autonegotiation speeds via the sysctl 1442 * before bringing the interface up. In this 1443 * case, we should not disable 2.5G and 5G 1444 * since that speeds might be selected by the 1445 * user. 1446 * 1447 * Otherwise (i.e. if hw->phy.autoneg_advertised 1448 * is set to 0), it is the first time we set 1449 * autonegotiation preferences and the default 1450 * set of speeds should exclude 2.5G and 5G. 1451 */ 1452 autoneg &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 1453 IXGBE_LINK_SPEED_5GB_FULL); 1454 } 1455 1456 if (hw->mac.ops.setup_link) 1457 err = hw->mac.ops.setup_link(hw, autoneg, 1458 sc->link_up); 1459 } 1460 } /* ixgbe_config_link */ 1461 1462 /************************************************************************ 1463 * ixgbe_update_stats_counters - Update board statistics counters. 1464 ************************************************************************/ 1465 static void 1466 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1467 { 1468 struct ixgbe_hw *hw = &sc->hw; 1469 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1470 u32 missed_rx = 0, bprc, lxon, lxoff, total; 1471 u32 lxoffrxc; 1472 u64 total_missed_rx = 0; 1473 1474 stats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 1475 stats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 1476 stats->errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 1477 stats->mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 1478 stats->mpc[0] += IXGBE_READ_REG(hw, IXGBE_MPC(0)); 1479 1480 for (int i = 0; i < 16; i++) { 1481 stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 1482 stats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 1483 stats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 1484 } 1485 stats->mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 1486 stats->mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 1487 stats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 1488 1489 /* Hardware workaround, gprc counts missed packets */ 1490 stats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 1491 stats->gprc -= missed_rx; 1492 1493 if (hw->mac.type != ixgbe_mac_82598EB) { 1494 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 1495 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 1496 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1497 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 1498 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 1499 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 1500 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 1501 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 1502 stats->lxoffrxc += lxoffrxc; 1503 } else { 1504 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 1505 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 1506 stats->lxoffrxc += lxoffrxc; 1507 /* 82598 only has a counter in the high register */ 1508 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 1509 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 1510 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 1511 } 1512 1513 /* 1514 * For watchdog management we need to know if we have been paused 1515 * during the last interval, so capture that here. 1516 */ 1517 if (lxoffrxc) 1518 sc->shared->isc_pause_frames = 1; 1519 1520 /* 1521 * Workaround: mprc hardware is incorrectly counting 1522 * broadcasts, so for now we subtract those. 1523 */ 1524 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 1525 stats->bprc += bprc; 1526 stats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 1527 if (hw->mac.type == ixgbe_mac_82598EB) 1528 stats->mprc -= bprc; 1529 1530 stats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 1531 stats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 1532 stats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 1533 stats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 1534 stats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 1535 stats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 1536 1537 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 1538 stats->lxontxc += lxon; 1539 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 1540 stats->lxofftxc += lxoff; 1541 total = lxon + lxoff; 1542 1543 stats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 1544 stats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 1545 stats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 1546 stats->gptc -= total; 1547 stats->mptc -= total; 1548 stats->ptc64 -= total; 1549 stats->gotc -= total * ETHER_MIN_LEN; 1550 1551 stats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 1552 stats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 1553 stats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); 1554 stats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 1555 stats->mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 1556 stats->mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 1557 stats->mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 1558 stats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 1559 stats->tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 1560 stats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 1561 stats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 1562 stats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 1563 stats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 1564 stats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 1565 stats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 1566 stats->xec += IXGBE_READ_REG(hw, IXGBE_XEC); 1567 stats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 1568 stats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 1569 /* Only read FCOE on 82599 */ 1570 if (hw->mac.type != ixgbe_mac_82598EB) { 1571 stats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 1572 stats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 1573 stats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 1574 stats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 1575 stats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 1576 } 1577 1578 /* Fill out the OS statistics structure */ 1579 IXGBE_SET_IPACKETS(sc, stats->gprc); 1580 IXGBE_SET_OPACKETS(sc, stats->gptc); 1581 IXGBE_SET_IBYTES(sc, stats->gorc); 1582 IXGBE_SET_OBYTES(sc, stats->gotc); 1583 IXGBE_SET_IMCASTS(sc, stats->mprc); 1584 IXGBE_SET_OMCASTS(sc, stats->mptc); 1585 IXGBE_SET_COLLISIONS(sc, 0); 1586 IXGBE_SET_IQDROPS(sc, total_missed_rx); 1587 1588 /* 1589 * Aggregate following types of errors as RX errors: 1590 * - CRC error count, 1591 * - illegal byte error count, 1592 * - missed packets count, 1593 * - length error count, 1594 * - undersized packets count, 1595 * - fragmented packets count, 1596 * - oversized packets count, 1597 * - jabber count. 1598 */ 1599 IXGBE_SET_IERRORS(sc, stats->crcerrs + stats->illerrc + 1600 stats->mpc[0] + stats->rlec + stats->ruc + stats->rfc + stats->roc + 1601 stats->rjc); 1602 } /* ixgbe_update_stats_counters */ 1603 1604 /************************************************************************ 1605 * ixgbe_add_hw_stats 1606 * 1607 * Add sysctl variables, one per statistic, to the system. 1608 ************************************************************************/ 1609 static void 1610 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 1611 { 1612 device_t dev = iflib_get_dev(sc->ctx); 1613 struct ix_rx_queue *rx_que; 1614 struct ix_tx_queue *tx_que; 1615 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 1616 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 1617 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1618 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1619 struct sysctl_oid *stat_node, *queue_node; 1620 struct sysctl_oid_list *stat_list, *queue_list; 1621 int i; 1622 1623 #define QUEUE_NAME_LEN 32 1624 char namebuf[QUEUE_NAME_LEN]; 1625 1626 /* Driver Statistics */ 1627 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 1628 CTLFLAG_RD, &sc->dropped_pkts, "Driver dropped packets"); 1629 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events", 1630 CTLFLAG_RD, &sc->watchdog_events, "Watchdog timeouts"); 1631 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 1632 CTLFLAG_RD, &sc->link_irq, "Link MSI-X IRQ Handled"); 1633 1634 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; i++, tx_que++) { 1635 struct tx_ring *txr = &tx_que->txr; 1636 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 1637 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 1638 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 1639 queue_list = SYSCTL_CHILDREN(queue_node); 1640 1641 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 1642 CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, txr, 0, 1643 ixgbe_sysctl_tdh_handler, "IU", "Transmit Descriptor Head"); 1644 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 1645 CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, txr, 0, 1646 ixgbe_sysctl_tdt_handler, "IU", "Transmit Descriptor Tail"); 1647 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx", 1648 CTLFLAG_RD, &txr->tso_tx, "TSO"); 1649 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 1650 CTLFLAG_RD, &txr->total_packets, 1651 "Queue Packets Transmitted"); 1652 } 1653 1654 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; i++, rx_que++) { 1655 struct rx_ring *rxr = &rx_que->rxr; 1656 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 1657 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 1658 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 1659 queue_list = SYSCTL_CHILDREN(queue_node); 1660 1661 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 1662 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 1663 &sc->rx_queues[i], 0, 1664 ixgbe_sysctl_interrupt_rate_handler, "IU", 1665 "Interrupt Rate"); 1666 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 1667 CTLFLAG_RD, &(sc->rx_queues[i].irqs), 1668 "irqs on this queue"); 1669 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 1670 CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, rxr, 0, 1671 ixgbe_sysctl_rdh_handler, "IU", "Receive Descriptor Head"); 1672 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 1673 CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, rxr, 0, 1674 ixgbe_sysctl_rdt_handler, "IU", "Receive Descriptor Tail"); 1675 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 1676 CTLFLAG_RD, &rxr->rx_packets, "Queue Packets Received"); 1677 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 1678 CTLFLAG_RD, &rxr->rx_bytes, "Queue Bytes Received"); 1679 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 1680 CTLFLAG_RD, &rxr->rx_copies, "Copied RX Frames"); 1681 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_discarded", 1682 CTLFLAG_RD, &rxr->rx_discarded, "Discarded RX packets"); 1683 } 1684 1685 /* MAC stats get their own sub node */ 1686 1687 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 1688 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "MAC Statistics"); 1689 stat_list = SYSCTL_CHILDREN(stat_node); 1690 1691 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_errs", 1692 CTLFLAG_RD, &sc->ierrors, IXGBE_SYSCTL_DESC_RX_ERRS); 1693 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 1694 CTLFLAG_RD, &stats->crcerrs, "CRC Errors"); 1695 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 1696 CTLFLAG_RD, &stats->illerrc, "Illegal Byte Errors"); 1697 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 1698 CTLFLAG_RD, &stats->errbc, "Byte Errors"); 1699 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 1700 CTLFLAG_RD, &stats->mspdc, "MAC Short Packets Discarded"); 1701 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 1702 CTLFLAG_RD, &stats->mlfc, "MAC Local Faults"); 1703 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 1704 CTLFLAG_RD, &stats->mrfc, "MAC Remote Faults"); 1705 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 1706 CTLFLAG_RD, &stats->rlec, "Receive Length Errors"); 1707 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_missed_packets", 1708 CTLFLAG_RD, &stats->mpc[0], "RX Missed Packet Count"); 1709 1710 /* Flow Control stats */ 1711 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 1712 CTLFLAG_RD, &stats->lxontxc, "Link XON Transmitted"); 1713 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 1714 CTLFLAG_RD, &stats->lxonrxc, "Link XON Received"); 1715 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 1716 CTLFLAG_RD, &stats->lxofftxc, "Link XOFF Transmitted"); 1717 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 1718 CTLFLAG_RD, &stats->lxoffrxc, "Link XOFF Received"); 1719 1720 /* Packet Reception Stats */ 1721 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 1722 CTLFLAG_RD, &stats->tor, "Total Octets Received"); 1723 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 1724 CTLFLAG_RD, &stats->gorc, "Good Octets Received"); 1725 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 1726 CTLFLAG_RD, &stats->tpr, "Total Packets Received"); 1727 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 1728 CTLFLAG_RD, &stats->gprc, "Good Packets Received"); 1729 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 1730 CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); 1731 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 1732 CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); 1733 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 1734 CTLFLAG_RD, &stats->prc64, "64 byte frames received "); 1735 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 1736 CTLFLAG_RD, &stats->prc127, "65-127 byte frames received"); 1737 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 1738 CTLFLAG_RD, &stats->prc255, "128-255 byte frames received"); 1739 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 1740 CTLFLAG_RD, &stats->prc511, "256-511 byte frames received"); 1741 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 1742 CTLFLAG_RD, &stats->prc1023, "512-1023 byte frames received"); 1743 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 1744 CTLFLAG_RD, &stats->prc1522, "1023-1522 byte frames received"); 1745 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 1746 CTLFLAG_RD, &stats->ruc, "Receive Undersized"); 1747 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 1748 CTLFLAG_RD, &stats->rfc, "Fragmented Packets Received "); 1749 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 1750 CTLFLAG_RD, &stats->roc, "Oversized Packets Received"); 1751 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 1752 CTLFLAG_RD, &stats->rjc, "Received Jabber"); 1753 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 1754 CTLFLAG_RD, &stats->mngprc, "Management Packets Received"); 1755 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 1756 CTLFLAG_RD, &stats->mngptc, "Management Packets Dropped"); 1757 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 1758 CTLFLAG_RD, &stats->xec, "Checksum Errors"); 1759 1760 /* Packet Transmission Stats */ 1761 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 1762 CTLFLAG_RD, &stats->gotc, "Good Octets Transmitted"); 1763 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 1764 CTLFLAG_RD, &stats->tpt, "Total Packets Transmitted"); 1765 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 1766 CTLFLAG_RD, &stats->gptc, "Good Packets Transmitted"); 1767 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 1768 CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); 1769 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 1770 CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); 1771 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 1772 CTLFLAG_RD, &stats->mngptc, "Management Packets Transmitted"); 1773 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 1774 CTLFLAG_RD, &stats->ptc64, "64 byte frames transmitted "); 1775 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 1776 CTLFLAG_RD, &stats->ptc127, "65-127 byte frames transmitted"); 1777 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 1778 CTLFLAG_RD, &stats->ptc255, "128-255 byte frames transmitted"); 1779 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 1780 CTLFLAG_RD, &stats->ptc511, "256-511 byte frames transmitted"); 1781 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 1782 CTLFLAG_RD, &stats->ptc1023, "512-1023 byte frames transmitted"); 1783 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 1784 CTLFLAG_RD, &stats->ptc1522, "1024-1522 byte frames transmitted"); 1785 } /* ixgbe_add_hw_stats */ 1786 1787 /************************************************************************ 1788 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 1789 * 1790 * Retrieves the TDH value from the hardware 1791 ************************************************************************/ 1792 static int 1793 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 1794 { 1795 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 1796 int error; 1797 unsigned int val; 1798 1799 if (!txr) 1800 return (0); 1801 1802 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me)); 1803 error = sysctl_handle_int(oidp, &val, 0, req); 1804 if (error || !req->newptr) 1805 return error; 1806 1807 return (0); 1808 } /* ixgbe_sysctl_tdh_handler */ 1809 1810 /************************************************************************ 1811 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 1812 * 1813 * Retrieves the TDT value from the hardware 1814 ************************************************************************/ 1815 static int 1816 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 1817 { 1818 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 1819 int error; 1820 unsigned int val; 1821 1822 if (!txr) 1823 return (0); 1824 1825 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me)); 1826 error = sysctl_handle_int(oidp, &val, 0, req); 1827 if (error || !req->newptr) 1828 return error; 1829 1830 return (0); 1831 } /* ixgbe_sysctl_tdt_handler */ 1832 1833 /************************************************************************ 1834 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 1835 * 1836 * Retrieves the RDH value from the hardware 1837 ************************************************************************/ 1838 static int 1839 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 1840 { 1841 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 1842 int error; 1843 unsigned int val; 1844 1845 if (!rxr) 1846 return (0); 1847 1848 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me)); 1849 error = sysctl_handle_int(oidp, &val, 0, req); 1850 if (error || !req->newptr) 1851 return error; 1852 1853 return (0); 1854 } /* ixgbe_sysctl_rdh_handler */ 1855 1856 /************************************************************************ 1857 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 1858 * 1859 * Retrieves the RDT value from the hardware 1860 ************************************************************************/ 1861 static int 1862 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 1863 { 1864 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 1865 int error; 1866 unsigned int val; 1867 1868 if (!rxr) 1869 return (0); 1870 1871 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me)); 1872 error = sysctl_handle_int(oidp, &val, 0, req); 1873 if (error || !req->newptr) 1874 return error; 1875 1876 return (0); 1877 } /* ixgbe_sysctl_rdt_handler */ 1878 1879 /************************************************************************ 1880 * ixgbe_if_vlan_register 1881 * 1882 * Run via vlan config EVENT, it enables us to use the 1883 * HW Filter table since we can get the vlan id. This 1884 * just creates the entry in the soft version of the 1885 * VFTA, init will repopulate the real table. 1886 ************************************************************************/ 1887 static void 1888 ixgbe_if_vlan_register(if_ctx_t ctx, u16 vtag) 1889 { 1890 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1891 u16 index, bit; 1892 1893 index = (vtag >> 5) & 0x7F; 1894 bit = vtag & 0x1F; 1895 sc->shadow_vfta[index] |= (1 << bit); 1896 ++sc->num_vlans; 1897 ixgbe_setup_vlan_hw_support(ctx); 1898 } /* ixgbe_if_vlan_register */ 1899 1900 /************************************************************************ 1901 * ixgbe_if_vlan_unregister 1902 * 1903 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 1904 ************************************************************************/ 1905 static void 1906 ixgbe_if_vlan_unregister(if_ctx_t ctx, u16 vtag) 1907 { 1908 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1909 u16 index, bit; 1910 1911 index = (vtag >> 5) & 0x7F; 1912 bit = vtag & 0x1F; 1913 sc->shadow_vfta[index] &= ~(1 << bit); 1914 --sc->num_vlans; 1915 /* Re-init to load the changes */ 1916 ixgbe_setup_vlan_hw_support(ctx); 1917 } /* ixgbe_if_vlan_unregister */ 1918 1919 /************************************************************************ 1920 * ixgbe_setup_vlan_hw_support 1921 ************************************************************************/ 1922 static void 1923 ixgbe_setup_vlan_hw_support(if_ctx_t ctx) 1924 { 1925 if_t ifp = iflib_get_ifp(ctx); 1926 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1927 struct ixgbe_hw *hw = &sc->hw; 1928 struct rx_ring *rxr; 1929 int i; 1930 u32 ctrl; 1931 1932 1933 /* 1934 * We get here thru init_locked, meaning 1935 * a soft reset, this has already cleared 1936 * the VFTA and other state, so if there 1937 * have been no vlan's registered do nothing. 1938 */ 1939 if (sc->num_vlans == 0 || (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) == 0) { 1940 /* Clear the vlan hw flag */ 1941 for (i = 0; i < sc->num_rx_queues; i++) { 1942 rxr = &sc->rx_queues[i].rxr; 1943 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 1944 if (hw->mac.type != ixgbe_mac_82598EB) { 1945 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 1946 ctrl &= ~IXGBE_RXDCTL_VME; 1947 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 1948 } 1949 rxr->vtag_strip = false; 1950 } 1951 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 1952 /* Enable the Filter Table if enabled */ 1953 ctrl |= IXGBE_VLNCTRL_CFIEN; 1954 ctrl &= ~IXGBE_VLNCTRL_VFE; 1955 if (hw->mac.type == ixgbe_mac_82598EB) 1956 ctrl &= ~IXGBE_VLNCTRL_VME; 1957 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 1958 return; 1959 } 1960 1961 /* Setup the queues for vlans */ 1962 if (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) { 1963 for (i = 0; i < sc->num_rx_queues; i++) { 1964 rxr = &sc->rx_queues[i].rxr; 1965 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 1966 if (hw->mac.type != ixgbe_mac_82598EB) { 1967 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 1968 ctrl |= IXGBE_RXDCTL_VME; 1969 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 1970 } 1971 rxr->vtag_strip = true; 1972 } 1973 } 1974 1975 if ((if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0) 1976 return; 1977 /* 1978 * A soft reset zero's out the VFTA, so 1979 * we need to repopulate it now. 1980 */ 1981 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 1982 if (sc->shadow_vfta[i] != 0) 1983 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 1984 sc->shadow_vfta[i]); 1985 1986 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 1987 /* Enable the Filter Table if enabled */ 1988 if (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) { 1989 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 1990 ctrl |= IXGBE_VLNCTRL_VFE; 1991 } 1992 if (hw->mac.type == ixgbe_mac_82598EB) 1993 ctrl |= IXGBE_VLNCTRL_VME; 1994 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 1995 } /* ixgbe_setup_vlan_hw_support */ 1996 1997 /************************************************************************ 1998 * ixgbe_get_slot_info 1999 * 2000 * Get the width and transaction speed of 2001 * the slot this adapter is plugged into. 2002 ************************************************************************/ 2003 static void 2004 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2005 { 2006 device_t dev = iflib_get_dev(sc->ctx); 2007 struct ixgbe_hw *hw = &sc->hw; 2008 int bus_info_valid = true; 2009 u32 offset; 2010 u16 link; 2011 2012 /* Some devices are behind an internal bridge */ 2013 switch (hw->device_id) { 2014 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2015 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2016 goto get_parent_info; 2017 default: 2018 break; 2019 } 2020 2021 ixgbe_get_bus_info(hw); 2022 2023 /* 2024 * Some devices don't use PCI-E, but there is no need 2025 * to display "Unknown" for bus speed and width. 2026 */ 2027 switch (hw->mac.type) { 2028 case ixgbe_mac_X550EM_x: 2029 case ixgbe_mac_X550EM_a: 2030 return; 2031 default: 2032 goto display; 2033 } 2034 2035 get_parent_info: 2036 /* 2037 * For the Quad port adapter we need to parse back 2038 * up the PCI tree to find the speed of the expansion 2039 * slot into which this adapter is plugged. A bit more work. 2040 */ 2041 dev = device_get_parent(device_get_parent(dev)); 2042 #ifdef IXGBE_DEBUG 2043 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2044 pci_get_slot(dev), pci_get_function(dev)); 2045 #endif 2046 dev = device_get_parent(device_get_parent(dev)); 2047 #ifdef IXGBE_DEBUG 2048 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2049 pci_get_slot(dev), pci_get_function(dev)); 2050 #endif 2051 /* Now get the PCI Express Capabilities offset */ 2052 if (pci_find_cap(dev, PCIY_EXPRESS, &offset)) { 2053 /* 2054 * Hmm...can't get PCI-Express capabilities. 2055 * Falling back to default method. 2056 */ 2057 bus_info_valid = false; 2058 ixgbe_get_bus_info(hw); 2059 goto display; 2060 } 2061 /* ...and read the Link Status Register */ 2062 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 2063 ixgbe_set_pci_config_data_generic(hw, link); 2064 2065 display: 2066 device_printf(dev, "PCI Express Bus: Speed %s %s\n", 2067 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2068 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2069 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2070 "Unknown"), 2071 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" : 2072 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" : 2073 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" : 2074 "Unknown")); 2075 2076 if (bus_info_valid) { 2077 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2078 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2079 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2080 device_printf(dev, "PCI-Express bandwidth available for this card\n is not sufficient for optimal performance.\n"); 2081 device_printf(dev, "For optimal performance a x8 PCIE, or x4 PCIE Gen2 slot is required.\n"); 2082 } 2083 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2084 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2085 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2086 device_printf(dev, "PCI-Express bandwidth available for this card\n is not sufficient for optimal performance.\n"); 2087 device_printf(dev, "For optimal performance a x8 PCIE Gen3 slot is required.\n"); 2088 } 2089 } else 2090 device_printf(dev, "Unable to determine slot speed/width. The speed/width reported are that of the internal switch.\n"); 2091 2092 return; 2093 } /* ixgbe_get_slot_info */ 2094 2095 /************************************************************************ 2096 * ixgbe_if_msix_intr_assign 2097 * 2098 * Setup MSI-X Interrupt resources and handlers 2099 ************************************************************************/ 2100 static int 2101 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix) 2102 { 2103 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2104 struct ix_rx_queue *rx_que = sc->rx_queues; 2105 struct ix_tx_queue *tx_que; 2106 int error, rid, vector = 0; 2107 char buf[16]; 2108 2109 /* Admin Que is vector 0*/ 2110 rid = vector + 1; 2111 for (int i = 0; i < sc->num_rx_queues; i++, vector++, rx_que++) { 2112 rid = vector + 1; 2113 2114 snprintf(buf, sizeof(buf), "rxq%d", i); 2115 error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid, 2116 IFLIB_INTR_RXTX, ixgbe_msix_que, rx_que, rx_que->rxr.me, buf); 2117 2118 if (error) { 2119 device_printf(iflib_get_dev(ctx), 2120 "Failed to allocate que int %d err: %d", i, error); 2121 sc->num_rx_queues = i + 1; 2122 goto fail; 2123 } 2124 2125 rx_que->msix = vector; 2126 } 2127 for (int i = 0; i < sc->num_tx_queues; i++) { 2128 snprintf(buf, sizeof(buf), "txq%d", i); 2129 tx_que = &sc->tx_queues[i]; 2130 tx_que->msix = i % sc->num_rx_queues; 2131 iflib_softirq_alloc_generic(ctx, 2132 &sc->rx_queues[tx_que->msix].que_irq, 2133 IFLIB_INTR_TX, tx_que, tx_que->txr.me, buf); 2134 } 2135 rid = vector + 1; 2136 error = iflib_irq_alloc_generic(ctx, &sc->irq, rid, 2137 IFLIB_INTR_ADMIN, ixgbe_msix_link, sc, 0, "aq"); 2138 if (error) { 2139 device_printf(iflib_get_dev(ctx), 2140 "Failed to register admin handler"); 2141 return (error); 2142 } 2143 2144 sc->vector = vector; 2145 2146 return (0); 2147 fail: 2148 iflib_irq_free(ctx, &sc->irq); 2149 rx_que = sc->rx_queues; 2150 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) 2151 iflib_irq_free(ctx, &rx_que->que_irq); 2152 2153 return (error); 2154 } /* ixgbe_if_msix_intr_assign */ 2155 2156 static inline void 2157 ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que) 2158 { 2159 uint32_t newitr = 0; 2160 struct rx_ring *rxr = &que->rxr; 2161 2162 /* 2163 * Do Adaptive Interrupt Moderation: 2164 * - Write out last calculated setting 2165 * - Calculate based on average size over 2166 * the last interval. 2167 */ 2168 if (que->eitr_setting) { 2169 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix), 2170 que->eitr_setting); 2171 } 2172 2173 que->eitr_setting = 0; 2174 /* Idle, do nothing */ 2175 if (rxr->bytes == 0) { 2176 return; 2177 } 2178 2179 if ((rxr->bytes) && (rxr->packets)) { 2180 newitr = (rxr->bytes / rxr->packets); 2181 } 2182 2183 newitr += 24; /* account for hardware frame, crc */ 2184 /* set an upper boundary */ 2185 newitr = min(newitr, 3000); 2186 2187 /* Be nice to the mid range */ 2188 if ((newitr > 300) && (newitr < 1200)) { 2189 newitr = (newitr / 3); 2190 } else { 2191 newitr = (newitr / 2); 2192 } 2193 2194 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 2195 newitr |= newitr << 16; 2196 } else { 2197 newitr |= IXGBE_EITR_CNT_WDIS; 2198 } 2199 2200 /* save for next interrupt */ 2201 que->eitr_setting = newitr; 2202 2203 /* Reset state */ 2204 rxr->bytes = 0; 2205 rxr->packets = 0; 2206 2207 return; 2208 } 2209 2210 /********************************************************************* 2211 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2212 **********************************************************************/ 2213 static int 2214 ixgbe_msix_que(void *arg) 2215 { 2216 struct ix_rx_queue *que = arg; 2217 struct ixgbe_softc *sc = que->sc; 2218 if_t ifp = iflib_get_ifp(que->sc->ctx); 2219 2220 /* Protect against spurious interrupts */ 2221 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) 2222 return (FILTER_HANDLED); 2223 2224 ixgbe_disable_queue(sc, que->msix); 2225 ++que->irqs; 2226 2227 /* Check for AIM */ 2228 if (sc->enable_aim) { 2229 ixgbe_perform_aim(sc, que); 2230 } 2231 2232 return (FILTER_SCHEDULE_THREAD); 2233 } /* ixgbe_msix_que */ 2234 2235 /************************************************************************ 2236 * ixgbe_media_status - Media Ioctl callback 2237 * 2238 * Called whenever the user queries the status of 2239 * the interface using ifconfig. 2240 ************************************************************************/ 2241 static void 2242 ixgbe_if_media_status(if_ctx_t ctx, struct ifmediareq * ifmr) 2243 { 2244 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2245 struct ixgbe_hw *hw = &sc->hw; 2246 int layer; 2247 2248 INIT_DEBUGOUT("ixgbe_if_media_status: begin"); 2249 2250 ifmr->ifm_status = IFM_AVALID; 2251 ifmr->ifm_active = IFM_ETHER; 2252 2253 if (!sc->link_active) 2254 return; 2255 2256 ifmr->ifm_status |= IFM_ACTIVE; 2257 layer = sc->phy_layer; 2258 2259 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 2260 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 2261 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX || 2262 layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 2263 switch (sc->link_speed) { 2264 case IXGBE_LINK_SPEED_10GB_FULL: 2265 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2266 break; 2267 case IXGBE_LINK_SPEED_1GB_FULL: 2268 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2269 break; 2270 case IXGBE_LINK_SPEED_100_FULL: 2271 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2272 break; 2273 case IXGBE_LINK_SPEED_10_FULL: 2274 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2275 break; 2276 } 2277 if (hw->mac.type == ixgbe_mac_X550) 2278 switch (sc->link_speed) { 2279 case IXGBE_LINK_SPEED_5GB_FULL: 2280 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2281 break; 2282 case IXGBE_LINK_SPEED_2_5GB_FULL: 2283 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2284 break; 2285 } 2286 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2287 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2288 switch (sc->link_speed) { 2289 case IXGBE_LINK_SPEED_10GB_FULL: 2290 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2291 break; 2292 } 2293 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2294 switch (sc->link_speed) { 2295 case IXGBE_LINK_SPEED_10GB_FULL: 2296 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2297 break; 2298 case IXGBE_LINK_SPEED_1GB_FULL: 2299 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2300 break; 2301 } 2302 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2303 switch (sc->link_speed) { 2304 case IXGBE_LINK_SPEED_10GB_FULL: 2305 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2306 break; 2307 case IXGBE_LINK_SPEED_1GB_FULL: 2308 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2309 break; 2310 } 2311 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2312 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2313 switch (sc->link_speed) { 2314 case IXGBE_LINK_SPEED_10GB_FULL: 2315 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2316 break; 2317 case IXGBE_LINK_SPEED_1GB_FULL: 2318 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 2319 break; 2320 } 2321 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2322 switch (sc->link_speed) { 2323 case IXGBE_LINK_SPEED_10GB_FULL: 2324 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2325 break; 2326 } 2327 /* 2328 * XXX: These need to use the proper media types once 2329 * they're added. 2330 */ 2331 #ifndef IFM_ETH_XTYPE 2332 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2333 switch (sc->link_speed) { 2334 case IXGBE_LINK_SPEED_10GB_FULL: 2335 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2336 break; 2337 case IXGBE_LINK_SPEED_2_5GB_FULL: 2338 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2339 break; 2340 case IXGBE_LINK_SPEED_1GB_FULL: 2341 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2342 break; 2343 } 2344 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2345 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2346 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2347 switch (sc->link_speed) { 2348 case IXGBE_LINK_SPEED_10GB_FULL: 2349 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2350 break; 2351 case IXGBE_LINK_SPEED_2_5GB_FULL: 2352 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2353 break; 2354 case IXGBE_LINK_SPEED_1GB_FULL: 2355 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2356 break; 2357 } 2358 #else 2359 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2360 switch (sc->link_speed) { 2361 case IXGBE_LINK_SPEED_10GB_FULL: 2362 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 2363 break; 2364 case IXGBE_LINK_SPEED_2_5GB_FULL: 2365 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2366 break; 2367 case IXGBE_LINK_SPEED_1GB_FULL: 2368 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2369 break; 2370 } 2371 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2372 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2373 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2374 switch (sc->link_speed) { 2375 case IXGBE_LINK_SPEED_10GB_FULL: 2376 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 2377 break; 2378 case IXGBE_LINK_SPEED_2_5GB_FULL: 2379 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2380 break; 2381 case IXGBE_LINK_SPEED_1GB_FULL: 2382 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2383 break; 2384 } 2385 #endif 2386 2387 /* If nothing is recognized... */ 2388 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 2389 ifmr->ifm_active |= IFM_UNKNOWN; 2390 2391 /* Display current flow control setting used on link */ 2392 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 2393 hw->fc.current_mode == ixgbe_fc_full) 2394 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 2395 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 2396 hw->fc.current_mode == ixgbe_fc_full) 2397 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 2398 } /* ixgbe_media_status */ 2399 2400 /************************************************************************ 2401 * ixgbe_media_change - Media Ioctl callback 2402 * 2403 * Called when the user changes speed/duplex using 2404 * media/mediopt option with ifconfig. 2405 ************************************************************************/ 2406 static int 2407 ixgbe_if_media_change(if_ctx_t ctx) 2408 { 2409 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2410 struct ifmedia *ifm = iflib_get_media(ctx); 2411 struct ixgbe_hw *hw = &sc->hw; 2412 ixgbe_link_speed speed = 0; 2413 2414 INIT_DEBUGOUT("ixgbe_if_media_change: begin"); 2415 2416 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 2417 return (EINVAL); 2418 2419 if (hw->phy.media_type == ixgbe_media_type_backplane) 2420 return (EPERM); 2421 2422 /* 2423 * We don't actually need to check against the supported 2424 * media types of the adapter; ifmedia will take care of 2425 * that for us. 2426 */ 2427 switch (IFM_SUBTYPE(ifm->ifm_media)) { 2428 case IFM_AUTO: 2429 case IFM_10G_T: 2430 speed |= IXGBE_LINK_SPEED_100_FULL; 2431 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2432 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2433 break; 2434 case IFM_10G_LRM: 2435 case IFM_10G_LR: 2436 #ifndef IFM_ETH_XTYPE 2437 case IFM_10G_SR: /* KR, too */ 2438 case IFM_10G_CX4: /* KX4 */ 2439 #else 2440 case IFM_10G_KR: 2441 case IFM_10G_KX4: 2442 #endif 2443 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2444 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2445 break; 2446 #ifndef IFM_ETH_XTYPE 2447 case IFM_1000_CX: /* KX */ 2448 #else 2449 case IFM_1000_KX: 2450 #endif 2451 case IFM_1000_LX: 2452 case IFM_1000_SX: 2453 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2454 break; 2455 case IFM_1000_T: 2456 speed |= IXGBE_LINK_SPEED_100_FULL; 2457 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2458 break; 2459 case IFM_10G_TWINAX: 2460 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2461 break; 2462 case IFM_5000_T: 2463 speed |= IXGBE_LINK_SPEED_5GB_FULL; 2464 break; 2465 case IFM_2500_T: 2466 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 2467 break; 2468 case IFM_100_TX: 2469 speed |= IXGBE_LINK_SPEED_100_FULL; 2470 break; 2471 case IFM_10_T: 2472 speed |= IXGBE_LINK_SPEED_10_FULL; 2473 break; 2474 default: 2475 goto invalid; 2476 } 2477 2478 hw->mac.autotry_restart = true; 2479 hw->mac.ops.setup_link(hw, speed, true); 2480 sc->advertise = 2481 ((speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 2482 ((speed & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 2483 ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 2484 ((speed & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 2485 ((speed & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 2486 ((speed & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 2487 2488 return (0); 2489 2490 invalid: 2491 device_printf(iflib_get_dev(ctx), "Invalid media type!\n"); 2492 2493 return (EINVAL); 2494 } /* ixgbe_if_media_change */ 2495 2496 /************************************************************************ 2497 * ixgbe_set_promisc 2498 ************************************************************************/ 2499 static int 2500 ixgbe_if_promisc_set(if_ctx_t ctx, int flags) 2501 { 2502 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2503 if_t ifp = iflib_get_ifp(ctx); 2504 u32 rctl; 2505 int mcnt = 0; 2506 2507 rctl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 2508 rctl &= (~IXGBE_FCTRL_UPE); 2509 if (if_getflags(ifp) & IFF_ALLMULTI) 2510 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 2511 else { 2512 mcnt = min(if_llmaddr_count(ifp), MAX_NUM_MULTICAST_ADDRESSES); 2513 } 2514 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 2515 rctl &= (~IXGBE_FCTRL_MPE); 2516 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2517 2518 if (if_getflags(ifp) & IFF_PROMISC) { 2519 rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2520 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2521 } else if (if_getflags(ifp) & IFF_ALLMULTI) { 2522 rctl |= IXGBE_FCTRL_MPE; 2523 rctl &= ~IXGBE_FCTRL_UPE; 2524 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2525 } 2526 return (0); 2527 } /* ixgbe_if_promisc_set */ 2528 2529 /************************************************************************ 2530 * ixgbe_msix_link - Link status change ISR (MSI/MSI-X) 2531 ************************************************************************/ 2532 static int 2533 ixgbe_msix_link(void *arg) 2534 { 2535 struct ixgbe_softc *sc = arg; 2536 struct ixgbe_hw *hw = &sc->hw; 2537 u32 eicr, eicr_mask; 2538 s32 retval; 2539 2540 ++sc->link_irq; 2541 2542 /* Pause other interrupts */ 2543 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 2544 2545 /* First get the cause */ 2546 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 2547 /* Be sure the queue bits are not cleared */ 2548 eicr &= ~IXGBE_EICR_RTX_QUEUE; 2549 /* Clear interrupt with write */ 2550 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 2551 2552 /* Link status change */ 2553 if (eicr & IXGBE_EICR_LSC) { 2554 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 2555 sc->task_requests |= IXGBE_REQUEST_TASK_LSC; 2556 } 2557 2558 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 2559 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 2560 (eicr & IXGBE_EICR_FLOW_DIR)) { 2561 /* This is probably overkill :) */ 2562 if (!atomic_cmpset_int(&sc->fdir_reinit, 0, 1)) 2563 return (FILTER_HANDLED); 2564 /* Disable the interrupt */ 2565 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR); 2566 sc->task_requests |= IXGBE_REQUEST_TASK_FDIR; 2567 } else 2568 if (eicr & IXGBE_EICR_ECC) { 2569 device_printf(iflib_get_dev(sc->ctx), 2570 "Received ECC Err, initiating reset\n"); 2571 hw->mac.flags |= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; 2572 ixgbe_reset_hw(hw); 2573 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 2574 } 2575 2576 /* Check for over temp condition */ 2577 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 2578 switch (sc->hw.mac.type) { 2579 case ixgbe_mac_X550EM_a: 2580 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 2581 break; 2582 IXGBE_WRITE_REG(hw, IXGBE_EIMC, 2583 IXGBE_EICR_GPI_SDP0_X550EM_a); 2584 IXGBE_WRITE_REG(hw, IXGBE_EICR, 2585 IXGBE_EICR_GPI_SDP0_X550EM_a); 2586 retval = hw->phy.ops.check_overtemp(hw); 2587 if (retval != IXGBE_ERR_OVERTEMP) 2588 break; 2589 device_printf(iflib_get_dev(sc->ctx), 2590 "\nCRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n"); 2591 device_printf(iflib_get_dev(sc->ctx), 2592 "System shutdown required!\n"); 2593 break; 2594 default: 2595 if (!(eicr & IXGBE_EICR_TS)) 2596 break; 2597 retval = hw->phy.ops.check_overtemp(hw); 2598 if (retval != IXGBE_ERR_OVERTEMP) 2599 break; 2600 device_printf(iflib_get_dev(sc->ctx), 2601 "\nCRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n"); 2602 device_printf(iflib_get_dev(sc->ctx), 2603 "System shutdown required!\n"); 2604 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS); 2605 break; 2606 } 2607 } 2608 2609 /* Check for VF message */ 2610 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 2611 (eicr & IXGBE_EICR_MAILBOX)) 2612 sc->task_requests |= IXGBE_REQUEST_TASK_MBX; 2613 } 2614 2615 if (ixgbe_is_sfp(hw)) { 2616 /* Pluggable optics-related interrupt */ 2617 if (hw->mac.type >= ixgbe_mac_X540) 2618 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 2619 else 2620 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 2621 2622 if (eicr & eicr_mask) { 2623 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 2624 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 2625 } 2626 2627 if ((hw->mac.type == ixgbe_mac_82599EB) && 2628 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 2629 IXGBE_WRITE_REG(hw, IXGBE_EICR, 2630 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 2631 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 2632 } 2633 } 2634 2635 /* Check for fan failure */ 2636 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 2637 ixgbe_check_fan_failure(sc, eicr, true); 2638 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 2639 } 2640 2641 /* External PHY interrupt */ 2642 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 2643 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 2644 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 2645 sc->task_requests |= IXGBE_REQUEST_TASK_PHY; 2646 } 2647 2648 return (sc->task_requests != 0) ? FILTER_SCHEDULE_THREAD : FILTER_HANDLED; 2649 } /* ixgbe_msix_link */ 2650 2651 /************************************************************************ 2652 * ixgbe_sysctl_interrupt_rate_handler 2653 ************************************************************************/ 2654 static int 2655 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 2656 { 2657 struct ix_rx_queue *que = ((struct ix_rx_queue *)oidp->oid_arg1); 2658 int error; 2659 unsigned int reg, usec, rate; 2660 2661 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix)); 2662 usec = ((reg & 0x0FF8) >> 3); 2663 if (usec > 0) 2664 rate = 500000 / usec; 2665 else 2666 rate = 0; 2667 error = sysctl_handle_int(oidp, &rate, 0, req); 2668 if (error || !req->newptr) 2669 return error; 2670 reg &= ~0xfff; /* default, no limitation */ 2671 ixgbe_max_interrupt_rate = 0; 2672 if (rate > 0 && rate < 500000) { 2673 if (rate < 1000) 2674 rate = 1000; 2675 ixgbe_max_interrupt_rate = rate; 2676 reg |= ((4000000/rate) & 0xff8); 2677 } 2678 IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg); 2679 2680 return (0); 2681 } /* ixgbe_sysctl_interrupt_rate_handler */ 2682 2683 /************************************************************************ 2684 * ixgbe_add_device_sysctls 2685 ************************************************************************/ 2686 static void 2687 ixgbe_add_device_sysctls(if_ctx_t ctx) 2688 { 2689 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2690 device_t dev = iflib_get_dev(ctx); 2691 struct ixgbe_hw *hw = &sc->hw; 2692 struct sysctl_oid_list *child; 2693 struct sysctl_ctx_list *ctx_list; 2694 2695 ctx_list = device_get_sysctl_ctx(dev); 2696 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 2697 2698 /* Sysctls for all devices */ 2699 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc", 2700 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 2701 sc, 0, ixgbe_sysctl_flowcntl, "I", 2702 IXGBE_SYSCTL_DESC_SET_FC); 2703 2704 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "advertise_speed", 2705 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 2706 sc, 0, ixgbe_sysctl_advertise, "I", 2707 IXGBE_SYSCTL_DESC_ADV_SPEED); 2708 2709 sc->enable_aim = ixgbe_enable_aim; 2710 SYSCTL_ADD_INT(ctx_list, child, OID_AUTO, "enable_aim", CTLFLAG_RW, 2711 &sc->enable_aim, 0, "Interrupt Moderation"); 2712 2713 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version", 2714 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 2715 ixgbe_sysctl_print_fw_version, "A", "Prints FW/NVM Versions"); 2716 2717 #ifdef IXGBE_DEBUG 2718 /* testing sysctls (for all devices) */ 2719 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "power_state", 2720 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 2721 sc, 0, ixgbe_sysctl_power_state, 2722 "I", "PCI Power State"); 2723 2724 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "print_rss_config", 2725 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 2726 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 2727 #endif 2728 /* for X550 series devices */ 2729 if (hw->mac.type >= ixgbe_mac_X550) 2730 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "dmac", 2731 CTLTYPE_U16 | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 2732 sc, 0, ixgbe_sysctl_dmac, 2733 "I", "DMA Coalesce"); 2734 2735 /* for WoL-capable devices */ 2736 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 2737 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wol_enable", 2738 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 2739 ixgbe_sysctl_wol_enable, "I", "Enable/Disable Wake on LAN"); 2740 2741 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wufc", 2742 CTLTYPE_U32 | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 2743 sc, 0, ixgbe_sysctl_wufc, 2744 "I", "Enable/Disable Wake Up Filters"); 2745 } 2746 2747 /* for X552/X557-AT devices */ 2748 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 2749 struct sysctl_oid *phy_node; 2750 struct sysctl_oid_list *phy_list; 2751 2752 phy_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "phy", 2753 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "External PHY sysctls"); 2754 phy_list = SYSCTL_CHILDREN(phy_node); 2755 2756 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, "temp", 2757 CTLTYPE_U16 | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 2758 sc, 0, ixgbe_sysctl_phy_temp, 2759 "I", "Current External PHY Temperature (Celsius)"); 2760 2761 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, 2762 "overtemp_occurred", 2763 CTLTYPE_U16 | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 2764 ixgbe_sysctl_phy_overtemp_occurred, "I", 2765 "External PHY High Temperature Event Occurred"); 2766 } 2767 2768 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 2769 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_state", 2770 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 2771 ixgbe_sysctl_eee_state, "I", "EEE Power Save State"); 2772 } 2773 } /* ixgbe_add_device_sysctls */ 2774 2775 /************************************************************************ 2776 * ixgbe_allocate_pci_resources 2777 ************************************************************************/ 2778 static int 2779 ixgbe_allocate_pci_resources(if_ctx_t ctx) 2780 { 2781 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2782 device_t dev = iflib_get_dev(ctx); 2783 int rid; 2784 2785 rid = PCIR_BAR(0); 2786 sc->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 2787 RF_ACTIVE); 2788 2789 if (!(sc->pci_mem)) { 2790 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2791 return (ENXIO); 2792 } 2793 2794 /* Save bus_space values for READ/WRITE_REG macros */ 2795 sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->pci_mem); 2796 sc->osdep.mem_bus_space_handle = 2797 rman_get_bushandle(sc->pci_mem); 2798 /* Set hw values for shared code */ 2799 sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle; 2800 2801 return (0); 2802 } /* ixgbe_allocate_pci_resources */ 2803 2804 /************************************************************************ 2805 * ixgbe_detach - Device removal routine 2806 * 2807 * Called when the driver is being removed. 2808 * Stops the adapter and deallocates all the resources 2809 * that were allocated for driver operation. 2810 * 2811 * return 0 on success, positive on failure 2812 ************************************************************************/ 2813 static int 2814 ixgbe_if_detach(if_ctx_t ctx) 2815 { 2816 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2817 device_t dev = iflib_get_dev(ctx); 2818 u32 ctrl_ext; 2819 2820 INIT_DEBUGOUT("ixgbe_detach: begin"); 2821 2822 if (ixgbe_pci_iov_detach(dev) != 0) { 2823 device_printf(dev, "SR-IOV in use; detach first.\n"); 2824 return (EBUSY); 2825 } 2826 2827 ixgbe_setup_low_power_mode(ctx); 2828 2829 /* let hardware know driver is unloading */ 2830 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 2831 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 2832 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 2833 2834 ixgbe_free_pci_resources(ctx); 2835 free(sc->mta, M_IXGBE); 2836 2837 return (0); 2838 } /* ixgbe_if_detach */ 2839 2840 /************************************************************************ 2841 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 2842 * 2843 * Prepare the adapter/port for LPLU and/or WoL 2844 ************************************************************************/ 2845 static int 2846 ixgbe_setup_low_power_mode(if_ctx_t ctx) 2847 { 2848 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2849 struct ixgbe_hw *hw = &sc->hw; 2850 device_t dev = iflib_get_dev(ctx); 2851 s32 error = 0; 2852 2853 if (!hw->wol_enabled) 2854 ixgbe_set_phy_power(hw, false); 2855 2856 /* Limit power management flow to X550EM baseT */ 2857 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 2858 hw->phy.ops.enter_lplu) { 2859 /* Turn off support for APM wakeup. (Using ACPI instead) */ 2860 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 2861 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 2862 2863 /* 2864 * Clear Wake Up Status register to prevent any previous wakeup 2865 * events from waking us up immediately after we suspend. 2866 */ 2867 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 2868 2869 /* 2870 * Program the Wakeup Filter Control register with user filter 2871 * settings 2872 */ 2873 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 2874 2875 /* Enable wakeups and power management in Wakeup Control */ 2876 IXGBE_WRITE_REG(hw, IXGBE_WUC, 2877 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 2878 2879 /* X550EM baseT adapters need a special LPLU flow */ 2880 hw->phy.reset_disable = true; 2881 ixgbe_if_stop(ctx); 2882 error = hw->phy.ops.enter_lplu(hw); 2883 if (error) 2884 device_printf(dev, "Error entering LPLU: %d\n", error); 2885 hw->phy.reset_disable = false; 2886 } else { 2887 /* Just stop for other adapters */ 2888 ixgbe_if_stop(ctx); 2889 } 2890 2891 return error; 2892 } /* ixgbe_setup_low_power_mode */ 2893 2894 /************************************************************************ 2895 * ixgbe_shutdown - Shutdown entry point 2896 ************************************************************************/ 2897 static int 2898 ixgbe_if_shutdown(if_ctx_t ctx) 2899 { 2900 int error = 0; 2901 2902 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 2903 2904 error = ixgbe_setup_low_power_mode(ctx); 2905 2906 return (error); 2907 } /* ixgbe_if_shutdown */ 2908 2909 /************************************************************************ 2910 * ixgbe_suspend 2911 * 2912 * From D0 to D3 2913 ************************************************************************/ 2914 static int 2915 ixgbe_if_suspend(if_ctx_t ctx) 2916 { 2917 int error = 0; 2918 2919 INIT_DEBUGOUT("ixgbe_suspend: begin"); 2920 2921 error = ixgbe_setup_low_power_mode(ctx); 2922 2923 return (error); 2924 } /* ixgbe_if_suspend */ 2925 2926 /************************************************************************ 2927 * ixgbe_resume 2928 * 2929 * From D3 to D0 2930 ************************************************************************/ 2931 static int 2932 ixgbe_if_resume(if_ctx_t ctx) 2933 { 2934 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2935 device_t dev = iflib_get_dev(ctx); 2936 if_t ifp = iflib_get_ifp(ctx); 2937 struct ixgbe_hw *hw = &sc->hw; 2938 u32 wus; 2939 2940 INIT_DEBUGOUT("ixgbe_resume: begin"); 2941 2942 /* Read & clear WUS register */ 2943 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 2944 if (wus) 2945 device_printf(dev, "Woken up by (WUS): %#010x\n", 2946 IXGBE_READ_REG(hw, IXGBE_WUS)); 2947 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 2948 /* And clear WUFC until next low-power transition */ 2949 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 2950 2951 /* 2952 * Required after D3->D0 transition; 2953 * will re-advertise all previous advertised speeds 2954 */ 2955 if (if_getflags(ifp) & IFF_UP) 2956 ixgbe_if_init(ctx); 2957 2958 return (0); 2959 } /* ixgbe_if_resume */ 2960 2961 /************************************************************************ 2962 * ixgbe_if_mtu_set - Ioctl mtu entry point 2963 * 2964 * Return 0 on success, EINVAL on failure 2965 ************************************************************************/ 2966 static int 2967 ixgbe_if_mtu_set(if_ctx_t ctx, uint32_t mtu) 2968 { 2969 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2970 int error = 0; 2971 2972 IOCTL_DEBUGOUT("ioctl: SIOCIFMTU (Set Interface MTU)"); 2973 2974 if (mtu > IXGBE_MAX_MTU) { 2975 error = EINVAL; 2976 } else { 2977 sc->max_frame_size = mtu + IXGBE_MTU_HDR; 2978 } 2979 2980 return error; 2981 } /* ixgbe_if_mtu_set */ 2982 2983 /************************************************************************ 2984 * ixgbe_if_crcstrip_set 2985 ************************************************************************/ 2986 static void 2987 ixgbe_if_crcstrip_set(if_ctx_t ctx, int onoff, int crcstrip) 2988 { 2989 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2990 struct ixgbe_hw *hw = &sc->hw; 2991 /* crc stripping is set in two places: 2992 * IXGBE_HLREG0 (modified on init_locked and hw reset) 2993 * IXGBE_RDRXCTL (set by the original driver in 2994 * ixgbe_setup_hw_rsc() called in init_locked. 2995 * We disable the setting when netmap is compiled in). 2996 * We update the values here, but also in ixgbe.c because 2997 * init_locked sometimes is called outside our control. 2998 */ 2999 uint32_t hl, rxc; 3000 3001 hl = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3002 rxc = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 3003 #ifdef NETMAP 3004 if (netmap_verbose) 3005 D("%s read HLREG 0x%x rxc 0x%x", 3006 onoff ? "enter" : "exit", hl, rxc); 3007 #endif 3008 /* hw requirements ... */ 3009 rxc &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; 3010 rxc |= IXGBE_RDRXCTL_RSCACKC; 3011 if (onoff && !crcstrip) { 3012 /* keep the crc. Fast rx */ 3013 hl &= ~IXGBE_HLREG0_RXCRCSTRP; 3014 rxc &= ~IXGBE_RDRXCTL_CRCSTRIP; 3015 } else { 3016 /* reset default mode */ 3017 hl |= IXGBE_HLREG0_RXCRCSTRP; 3018 rxc |= IXGBE_RDRXCTL_CRCSTRIP; 3019 } 3020 #ifdef NETMAP 3021 if (netmap_verbose) 3022 D("%s write HLREG 0x%x rxc 0x%x", 3023 onoff ? "enter" : "exit", hl, rxc); 3024 #endif 3025 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl); 3026 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc); 3027 } /* ixgbe_if_crcstrip_set */ 3028 3029 /********************************************************************* 3030 * ixgbe_if_init - Init entry point 3031 * 3032 * Used in two ways: It is used by the stack as an init 3033 * entry point in network interface structure. It is also 3034 * used by the driver as a hw/sw initialization routine to 3035 * get to a consistent state. 3036 * 3037 * Return 0 on success, positive on failure 3038 **********************************************************************/ 3039 void 3040 ixgbe_if_init(if_ctx_t ctx) 3041 { 3042 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3043 if_t ifp = iflib_get_ifp(ctx); 3044 device_t dev = iflib_get_dev(ctx); 3045 struct ixgbe_hw *hw = &sc->hw; 3046 struct ix_rx_queue *rx_que; 3047 struct ix_tx_queue *tx_que; 3048 u32 txdctl, mhadd; 3049 u32 rxdctl, rxctrl; 3050 u32 ctrl_ext; 3051 3052 int i, j, err; 3053 3054 INIT_DEBUGOUT("ixgbe_if_init: begin"); 3055 3056 /* Queue indices may change with IOV mode */ 3057 ixgbe_align_all_queue_indices(sc); 3058 3059 /* reprogram the RAR[0] in case user changed it. */ 3060 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 3061 3062 /* Get the latest mac address, User can use a LAA */ 3063 bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 3064 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 3065 hw->addr_ctrl.rar_used_count = 1; 3066 3067 ixgbe_init_hw(hw); 3068 3069 ixgbe_initialize_iov(sc); 3070 3071 ixgbe_initialize_transmit_units(ctx); 3072 3073 /* Setup Multicast table */ 3074 ixgbe_if_multi_set(ctx); 3075 3076 /* Determine the correct mbuf pool, based on frame size */ 3077 sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); 3078 3079 /* Configure RX settings */ 3080 ixgbe_initialize_receive_units(ctx); 3081 3082 /* 3083 * Initialize variable holding task enqueue requests 3084 * from MSI-X interrupts 3085 */ 3086 sc->task_requests = 0; 3087 3088 /* Enable SDP & MSI-X interrupts based on adapter */ 3089 ixgbe_config_gpie(sc); 3090 3091 /* Set MTU size */ 3092 if (if_getmtu(ifp) > ETHERMTU) { 3093 /* aka IXGBE_MAXFRS on 82599 and newer */ 3094 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 3095 mhadd &= ~IXGBE_MHADD_MFS_MASK; 3096 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 3097 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 3098 } 3099 3100 /* Now enable all the queues */ 3101 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; i++, tx_que++) { 3102 struct tx_ring *txr = &tx_que->txr; 3103 3104 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 3105 txdctl |= IXGBE_TXDCTL_ENABLE; 3106 /* Set WTHRESH to 8, burst writeback */ 3107 txdctl |= (8 << 16); 3108 /* 3109 * When the internal queue falls below PTHRESH (32), 3110 * start prefetching as long as there are at least 3111 * HTHRESH (1) buffers ready. The values are taken 3112 * from the Intel linux driver 3.8.21. 3113 * Prefetching enables tx line rate even with 1 queue. 3114 */ 3115 txdctl |= (32 << 0) | (1 << 8); 3116 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 3117 } 3118 3119 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; i++, rx_que++) { 3120 struct rx_ring *rxr = &rx_que->rxr; 3121 3122 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 3123 if (hw->mac.type == ixgbe_mac_82598EB) { 3124 /* 3125 * PTHRESH = 21 3126 * HTHRESH = 4 3127 * WTHRESH = 8 3128 */ 3129 rxdctl &= ~0x3FFFFF; 3130 rxdctl |= 0x080420; 3131 } 3132 rxdctl |= IXGBE_RXDCTL_ENABLE; 3133 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 3134 for (j = 0; j < 10; j++) { 3135 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 3136 IXGBE_RXDCTL_ENABLE) 3137 break; 3138 else 3139 msec_delay(1); 3140 } 3141 wmb(); 3142 } 3143 3144 /* Enable Receive engine */ 3145 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 3146 if (hw->mac.type == ixgbe_mac_82598EB) 3147 rxctrl |= IXGBE_RXCTRL_DMBYPS; 3148 rxctrl |= IXGBE_RXCTRL_RXEN; 3149 ixgbe_enable_rx_dma(hw, rxctrl); 3150 3151 /* Set up MSI/MSI-X routing */ 3152 if (ixgbe_enable_msix) { 3153 ixgbe_configure_ivars(sc); 3154 /* Set up auto-mask */ 3155 if (hw->mac.type == ixgbe_mac_82598EB) 3156 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 3157 else { 3158 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 3159 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 3160 } 3161 } else { /* Simple settings for Legacy/MSI */ 3162 ixgbe_set_ivar(sc, 0, 0, 0); 3163 ixgbe_set_ivar(sc, 0, 0, 1); 3164 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 3165 } 3166 3167 ixgbe_init_fdir(sc); 3168 3169 /* 3170 * Check on any SFP devices that 3171 * need to be kick-started 3172 */ 3173 if (hw->phy.type == ixgbe_phy_none) { 3174 err = hw->phy.ops.identify(hw); 3175 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3176 device_printf(dev, 3177 "Unsupported SFP+ module type was detected.\n"); 3178 return; 3179 } 3180 } 3181 3182 /* Set moderation on the Link interrupt */ 3183 IXGBE_WRITE_REG(hw, IXGBE_EITR(sc->vector), IXGBE_LINK_ITR); 3184 3185 /* Enable power to the phy. */ 3186 ixgbe_set_phy_power(hw, true); 3187 3188 /* Config/Enable Link */ 3189 ixgbe_config_link(ctx); 3190 3191 /* Hardware Packet Buffer & Flow Control setup */ 3192 ixgbe_config_delay_values(sc); 3193 3194 /* Initialize the FC settings */ 3195 ixgbe_start_hw(hw); 3196 3197 /* Set up VLAN support and filter */ 3198 ixgbe_setup_vlan_hw_support(ctx); 3199 3200 /* Setup DMA Coalescing */ 3201 ixgbe_config_dmac(sc); 3202 3203 /* And now turn on interrupts */ 3204 ixgbe_if_enable_intr(ctx); 3205 3206 /* Enable the use of the MBX by the VF's */ 3207 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 3208 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 3209 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 3210 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 3211 } 3212 3213 } /* ixgbe_init_locked */ 3214 3215 /************************************************************************ 3216 * ixgbe_set_ivar 3217 * 3218 * Setup the correct IVAR register for a particular MSI-X interrupt 3219 * (yes this is all very magic and confusing :) 3220 * - entry is the register array entry 3221 * - vector is the MSI-X vector for this queue 3222 * - type is RX/TX/MISC 3223 ************************************************************************/ 3224 static void 3225 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 3226 { 3227 struct ixgbe_hw *hw = &sc->hw; 3228 u32 ivar, index; 3229 3230 vector |= IXGBE_IVAR_ALLOC_VAL; 3231 3232 switch (hw->mac.type) { 3233 case ixgbe_mac_82598EB: 3234 if (type == -1) 3235 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 3236 else 3237 entry += (type * 64); 3238 index = (entry >> 2) & 0x1F; 3239 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 3240 ivar &= ~(0xFF << (8 * (entry & 0x3))); 3241 ivar |= (vector << (8 * (entry & 0x3))); 3242 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 3243 break; 3244 case ixgbe_mac_82599EB: 3245 case ixgbe_mac_X540: 3246 case ixgbe_mac_X550: 3247 case ixgbe_mac_X550EM_x: 3248 case ixgbe_mac_X550EM_a: 3249 if (type == -1) { /* MISC IVAR */ 3250 index = (entry & 1) * 8; 3251 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 3252 ivar &= ~(0xFF << index); 3253 ivar |= (vector << index); 3254 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 3255 } else { /* RX/TX IVARS */ 3256 index = (16 * (entry & 1)) + (8 * type); 3257 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 3258 ivar &= ~(0xFF << index); 3259 ivar |= (vector << index); 3260 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 3261 } 3262 default: 3263 break; 3264 } 3265 } /* ixgbe_set_ivar */ 3266 3267 /************************************************************************ 3268 * ixgbe_configure_ivars 3269 ************************************************************************/ 3270 static void 3271 ixgbe_configure_ivars(struct ixgbe_softc *sc) 3272 { 3273 struct ix_rx_queue *rx_que = sc->rx_queues; 3274 struct ix_tx_queue *tx_que = sc->tx_queues; 3275 u32 newitr; 3276 3277 if (ixgbe_max_interrupt_rate > 0) 3278 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 3279 else { 3280 /* 3281 * Disable DMA coalescing if interrupt moderation is 3282 * disabled. 3283 */ 3284 sc->dmac = 0; 3285 newitr = 0; 3286 } 3287 3288 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) { 3289 struct rx_ring *rxr = &rx_que->rxr; 3290 3291 /* First the RX queue entry */ 3292 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0); 3293 3294 /* Set an Initial EITR value */ 3295 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr); 3296 } 3297 for (int i = 0; i < sc->num_tx_queues; i++, tx_que++) { 3298 struct tx_ring *txr = &tx_que->txr; 3299 3300 /* ... and the TX */ 3301 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1); 3302 } 3303 /* For the Link interrupt */ 3304 ixgbe_set_ivar(sc, 1, sc->vector, -1); 3305 } /* ixgbe_configure_ivars */ 3306 3307 /************************************************************************ 3308 * ixgbe_config_gpie 3309 ************************************************************************/ 3310 static void 3311 ixgbe_config_gpie(struct ixgbe_softc *sc) 3312 { 3313 struct ixgbe_hw *hw = &sc->hw; 3314 u32 gpie; 3315 3316 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 3317 3318 if (sc->intr_type == IFLIB_INTR_MSIX) { 3319 /* Enable Enhanced MSI-X mode */ 3320 gpie |= IXGBE_GPIE_MSIX_MODE 3321 | IXGBE_GPIE_EIAME 3322 | IXGBE_GPIE_PBA_SUPPORT 3323 | IXGBE_GPIE_OCD; 3324 } 3325 3326 /* Fan Failure Interrupt */ 3327 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3328 gpie |= IXGBE_SDP1_GPIEN; 3329 3330 /* Thermal Sensor Interrupt */ 3331 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 3332 gpie |= IXGBE_SDP0_GPIEN_X540; 3333 3334 /* Link detection */ 3335 switch (hw->mac.type) { 3336 case ixgbe_mac_82599EB: 3337 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 3338 break; 3339 case ixgbe_mac_X550EM_x: 3340 case ixgbe_mac_X550EM_a: 3341 gpie |= IXGBE_SDP0_GPIEN_X540; 3342 break; 3343 default: 3344 break; 3345 } 3346 3347 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 3348 3349 } /* ixgbe_config_gpie */ 3350 3351 /************************************************************************ 3352 * ixgbe_config_delay_values 3353 * 3354 * Requires sc->max_frame_size to be set. 3355 ************************************************************************/ 3356 static void 3357 ixgbe_config_delay_values(struct ixgbe_softc *sc) 3358 { 3359 struct ixgbe_hw *hw = &sc->hw; 3360 u32 rxpb, frame, size, tmp; 3361 3362 frame = sc->max_frame_size; 3363 3364 /* Calculate High Water */ 3365 switch (hw->mac.type) { 3366 case ixgbe_mac_X540: 3367 case ixgbe_mac_X550: 3368 case ixgbe_mac_X550EM_x: 3369 case ixgbe_mac_X550EM_a: 3370 tmp = IXGBE_DV_X540(frame, frame); 3371 break; 3372 default: 3373 tmp = IXGBE_DV(frame, frame); 3374 break; 3375 } 3376 size = IXGBE_BT2KB(tmp); 3377 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 3378 hw->fc.high_water[0] = rxpb - size; 3379 3380 /* Now calculate Low Water */ 3381 switch (hw->mac.type) { 3382 case ixgbe_mac_X540: 3383 case ixgbe_mac_X550: 3384 case ixgbe_mac_X550EM_x: 3385 case ixgbe_mac_X550EM_a: 3386 tmp = IXGBE_LOW_DV_X540(frame); 3387 break; 3388 default: 3389 tmp = IXGBE_LOW_DV(frame); 3390 break; 3391 } 3392 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 3393 3394 hw->fc.pause_time = IXGBE_FC_PAUSE; 3395 hw->fc.send_xon = true; 3396 } /* ixgbe_config_delay_values */ 3397 3398 /************************************************************************ 3399 * ixgbe_set_multi - Multicast Update 3400 * 3401 * Called whenever multicast address list is updated. 3402 ************************************************************************/ 3403 static u_int 3404 ixgbe_mc_filter_apply(void *arg, struct sockaddr_dl *sdl, u_int idx) 3405 { 3406 struct ixgbe_softc *sc = arg; 3407 struct ixgbe_mc_addr *mta = sc->mta; 3408 3409 if (idx == MAX_NUM_MULTICAST_ADDRESSES) 3410 return (0); 3411 bcopy(LLADDR(sdl), mta[idx].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 3412 mta[idx].vmdq = sc->pool; 3413 3414 return (1); 3415 } /* ixgbe_mc_filter_apply */ 3416 3417 static void 3418 ixgbe_if_multi_set(if_ctx_t ctx) 3419 { 3420 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3421 struct ixgbe_mc_addr *mta; 3422 if_t ifp = iflib_get_ifp(ctx); 3423 u8 *update_ptr; 3424 u32 fctrl; 3425 u_int mcnt; 3426 3427 IOCTL_DEBUGOUT("ixgbe_if_multi_set: begin"); 3428 3429 mta = sc->mta; 3430 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 3431 3432 mcnt = if_foreach_llmaddr(iflib_get_ifp(ctx), ixgbe_mc_filter_apply, sc); 3433 3434 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 3435 update_ptr = (u8 *)mta; 3436 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 3437 ixgbe_mc_array_itr, true); 3438 } 3439 3440 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 3441 3442 if (if_getflags(ifp) & IFF_PROMISC) 3443 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 3444 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 3445 if_getflags(ifp) & IFF_ALLMULTI) { 3446 fctrl |= IXGBE_FCTRL_MPE; 3447 fctrl &= ~IXGBE_FCTRL_UPE; 3448 } else 3449 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 3450 3451 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 3452 } /* ixgbe_if_multi_set */ 3453 3454 /************************************************************************ 3455 * ixgbe_mc_array_itr 3456 * 3457 * An iterator function needed by the multicast shared code. 3458 * It feeds the shared code routine the addresses in the 3459 * array of ixgbe_set_multi() one by one. 3460 ************************************************************************/ 3461 static u8 * 3462 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 3463 { 3464 struct ixgbe_mc_addr *mta; 3465 3466 mta = (struct ixgbe_mc_addr *)*update_ptr; 3467 *vmdq = mta->vmdq; 3468 3469 *update_ptr = (u8*)(mta + 1); 3470 3471 return (mta->addr); 3472 } /* ixgbe_mc_array_itr */ 3473 3474 /************************************************************************ 3475 * ixgbe_local_timer - Timer routine 3476 * 3477 * Checks for link status, updates statistics, 3478 * and runs the watchdog check. 3479 ************************************************************************/ 3480 static void 3481 ixgbe_if_timer(if_ctx_t ctx, uint16_t qid) 3482 { 3483 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3484 3485 if (qid != 0) 3486 return; 3487 3488 /* Check for pluggable optics */ 3489 if (sc->sfp_probe) 3490 if (!ixgbe_sfp_probe(ctx)) 3491 return; /* Nothing to do */ 3492 3493 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 0); 3494 3495 /* Fire off the adminq task */ 3496 iflib_admin_intr_deferred(ctx); 3497 3498 } /* ixgbe_if_timer */ 3499 3500 /************************************************************************ 3501 * ixgbe_sfp_probe 3502 * 3503 * Determine if a port had optics inserted. 3504 ************************************************************************/ 3505 static bool 3506 ixgbe_sfp_probe(if_ctx_t ctx) 3507 { 3508 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3509 struct ixgbe_hw *hw = &sc->hw; 3510 device_t dev = iflib_get_dev(ctx); 3511 bool result = false; 3512 3513 if ((hw->phy.type == ixgbe_phy_nl) && 3514 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 3515 s32 ret = hw->phy.ops.identify_sfp(hw); 3516 if (ret) 3517 goto out; 3518 ret = hw->phy.ops.reset(hw); 3519 sc->sfp_probe = false; 3520 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3521 device_printf(dev, "Unsupported SFP+ module detected!"); 3522 device_printf(dev, 3523 "Reload driver with supported module.\n"); 3524 goto out; 3525 } else 3526 device_printf(dev, "SFP+ module detected!\n"); 3527 /* We now have supported optics */ 3528 result = true; 3529 } 3530 out: 3531 3532 return (result); 3533 } /* ixgbe_sfp_probe */ 3534 3535 /************************************************************************ 3536 * ixgbe_handle_mod - Tasklet for SFP module interrupts 3537 ************************************************************************/ 3538 static void 3539 ixgbe_handle_mod(void *context) 3540 { 3541 if_ctx_t ctx = context; 3542 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3543 struct ixgbe_hw *hw = &sc->hw; 3544 device_t dev = iflib_get_dev(ctx); 3545 u32 err, cage_full = 0; 3546 3547 if (sc->hw.need_crosstalk_fix) { 3548 switch (hw->mac.type) { 3549 case ixgbe_mac_82599EB: 3550 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 3551 IXGBE_ESDP_SDP2; 3552 break; 3553 case ixgbe_mac_X550EM_x: 3554 case ixgbe_mac_X550EM_a: 3555 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 3556 IXGBE_ESDP_SDP0; 3557 break; 3558 default: 3559 break; 3560 } 3561 3562 if (!cage_full) 3563 goto handle_mod_out; 3564 } 3565 3566 err = hw->phy.ops.identify_sfp(hw); 3567 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3568 device_printf(dev, 3569 "Unsupported SFP+ module type was detected.\n"); 3570 goto handle_mod_out; 3571 } 3572 3573 if (hw->mac.type == ixgbe_mac_82598EB) 3574 err = hw->phy.ops.reset(hw); 3575 else 3576 err = hw->mac.ops.setup_sfp(hw); 3577 3578 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3579 device_printf(dev, 3580 "Setup failure - unsupported SFP+ module type.\n"); 3581 goto handle_mod_out; 3582 } 3583 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 3584 return; 3585 3586 handle_mod_out: 3587 sc->task_requests &= ~(IXGBE_REQUEST_TASK_MSF); 3588 } /* ixgbe_handle_mod */ 3589 3590 3591 /************************************************************************ 3592 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 3593 ************************************************************************/ 3594 static void 3595 ixgbe_handle_msf(void *context) 3596 { 3597 if_ctx_t ctx = context; 3598 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3599 struct ixgbe_hw *hw = &sc->hw; 3600 u32 autoneg; 3601 bool negotiate; 3602 3603 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 3604 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 3605 3606 autoneg = hw->phy.autoneg_advertised; 3607 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 3608 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 3609 if (hw->mac.ops.setup_link) 3610 hw->mac.ops.setup_link(hw, autoneg, true); 3611 3612 /* Adjust media types shown in ifconfig */ 3613 ifmedia_removeall(sc->media); 3614 ixgbe_add_media_types(sc->ctx); 3615 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 3616 } /* ixgbe_handle_msf */ 3617 3618 /************************************************************************ 3619 * ixgbe_handle_phy - Tasklet for external PHY interrupts 3620 ************************************************************************/ 3621 static void 3622 ixgbe_handle_phy(void *context) 3623 { 3624 if_ctx_t ctx = context; 3625 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3626 struct ixgbe_hw *hw = &sc->hw; 3627 int error; 3628 3629 error = hw->phy.ops.handle_lasi(hw); 3630 if (error == IXGBE_ERR_OVERTEMP) 3631 device_printf(sc->dev, "CRITICAL: EXTERNAL PHY OVER TEMP!! PHY will downshift to lower power state!\n"); 3632 else if (error) 3633 device_printf(sc->dev, 3634 "Error handling LASI interrupt: %d\n", error); 3635 } /* ixgbe_handle_phy */ 3636 3637 /************************************************************************ 3638 * ixgbe_if_stop - Stop the hardware 3639 * 3640 * Disables all traffic on the adapter by issuing a 3641 * global reset on the MAC and deallocates TX/RX buffers. 3642 ************************************************************************/ 3643 static void 3644 ixgbe_if_stop(if_ctx_t ctx) 3645 { 3646 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3647 struct ixgbe_hw *hw = &sc->hw; 3648 3649 INIT_DEBUGOUT("ixgbe_if_stop: begin\n"); 3650 3651 ixgbe_reset_hw(hw); 3652 hw->adapter_stopped = false; 3653 ixgbe_stop_adapter(hw); 3654 if (hw->mac.type == ixgbe_mac_82599EB) 3655 ixgbe_stop_mac_link_on_d3_82599(hw); 3656 /* Turn off the laser - noop with no optics */ 3657 ixgbe_disable_tx_laser(hw); 3658 3659 /* Update the stack */ 3660 sc->link_up = false; 3661 ixgbe_if_update_admin_status(ctx); 3662 3663 /* reprogram the RAR[0] in case user changed it. */ 3664 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 3665 3666 return; 3667 } /* ixgbe_if_stop */ 3668 3669 /************************************************************************ 3670 * ixgbe_update_link_status - Update OS on link state 3671 * 3672 * Note: Only updates the OS on the cached link state. 3673 * The real check of the hardware only happens with 3674 * a link interrupt. 3675 ************************************************************************/ 3676 static void 3677 ixgbe_if_update_admin_status(if_ctx_t ctx) 3678 { 3679 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3680 device_t dev = iflib_get_dev(ctx); 3681 3682 if (sc->link_up) { 3683 if (sc->link_active == false) { 3684 if (bootverbose) 3685 device_printf(dev, "Link is up %d Gbps %s \n", 3686 ((sc->link_speed == 128) ? 10 : 1), 3687 "Full Duplex"); 3688 sc->link_active = true; 3689 /* Update any Flow Control changes */ 3690 ixgbe_fc_enable(&sc->hw); 3691 /* Update DMA coalescing config */ 3692 ixgbe_config_dmac(sc); 3693 iflib_link_state_change(ctx, LINK_STATE_UP, 3694 ixgbe_link_speed_to_baudrate(sc->link_speed)); 3695 3696 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 3697 ixgbe_ping_all_vfs(sc); 3698 } 3699 } else { /* Link down */ 3700 if (sc->link_active == true) { 3701 if (bootverbose) 3702 device_printf(dev, "Link is Down\n"); 3703 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); 3704 sc->link_active = false; 3705 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 3706 ixgbe_ping_all_vfs(sc); 3707 } 3708 } 3709 3710 /* Handle task requests from msix_link() */ 3711 if (sc->task_requests & IXGBE_REQUEST_TASK_MOD) 3712 ixgbe_handle_mod(ctx); 3713 if (sc->task_requests & IXGBE_REQUEST_TASK_MSF) 3714 ixgbe_handle_msf(ctx); 3715 if (sc->task_requests & IXGBE_REQUEST_TASK_MBX) 3716 ixgbe_handle_mbx(ctx); 3717 if (sc->task_requests & IXGBE_REQUEST_TASK_FDIR) 3718 ixgbe_reinit_fdir(ctx); 3719 if (sc->task_requests & IXGBE_REQUEST_TASK_PHY) 3720 ixgbe_handle_phy(ctx); 3721 sc->task_requests = 0; 3722 3723 ixgbe_update_stats_counters(sc); 3724 } /* ixgbe_if_update_admin_status */ 3725 3726 /************************************************************************ 3727 * ixgbe_config_dmac - Configure DMA Coalescing 3728 ************************************************************************/ 3729 static void 3730 ixgbe_config_dmac(struct ixgbe_softc *sc) 3731 { 3732 struct ixgbe_hw *hw = &sc->hw; 3733 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 3734 3735 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 3736 return; 3737 3738 if (dcfg->watchdog_timer ^ sc->dmac || 3739 dcfg->link_speed ^ sc->link_speed) { 3740 dcfg->watchdog_timer = sc->dmac; 3741 dcfg->fcoe_en = false; 3742 dcfg->link_speed = sc->link_speed; 3743 dcfg->num_tcs = 1; 3744 3745 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 3746 dcfg->watchdog_timer, dcfg->link_speed); 3747 3748 hw->mac.ops.dmac_config(hw); 3749 } 3750 } /* ixgbe_config_dmac */ 3751 3752 /************************************************************************ 3753 * ixgbe_if_enable_intr 3754 ************************************************************************/ 3755 void 3756 ixgbe_if_enable_intr(if_ctx_t ctx) 3757 { 3758 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3759 struct ixgbe_hw *hw = &sc->hw; 3760 struct ix_rx_queue *que = sc->rx_queues; 3761 u32 mask, fwsm; 3762 3763 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 3764 3765 switch (sc->hw.mac.type) { 3766 case ixgbe_mac_82599EB: 3767 mask |= IXGBE_EIMS_ECC; 3768 /* Temperature sensor on some scs */ 3769 mask |= IXGBE_EIMS_GPI_SDP0; 3770 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 3771 mask |= IXGBE_EIMS_GPI_SDP1; 3772 mask |= IXGBE_EIMS_GPI_SDP2; 3773 break; 3774 case ixgbe_mac_X540: 3775 /* Detect if Thermal Sensor is enabled */ 3776 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 3777 if (fwsm & IXGBE_FWSM_TS_ENABLED) 3778 mask |= IXGBE_EIMS_TS; 3779 mask |= IXGBE_EIMS_ECC; 3780 break; 3781 case ixgbe_mac_X550: 3782 /* MAC thermal sensor is automatically enabled */ 3783 mask |= IXGBE_EIMS_TS; 3784 mask |= IXGBE_EIMS_ECC; 3785 break; 3786 case ixgbe_mac_X550EM_x: 3787 case ixgbe_mac_X550EM_a: 3788 /* Some devices use SDP0 for important information */ 3789 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 3790 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 3791 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 3792 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 3793 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 3794 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 3795 mask |= IXGBE_EICR_GPI_SDP0_X540; 3796 mask |= IXGBE_EIMS_ECC; 3797 break; 3798 default: 3799 break; 3800 } 3801 3802 /* Enable Fan Failure detection */ 3803 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3804 mask |= IXGBE_EIMS_GPI_SDP1; 3805 /* Enable SR-IOV */ 3806 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 3807 mask |= IXGBE_EIMS_MAILBOX; 3808 /* Enable Flow Director */ 3809 if (sc->feat_en & IXGBE_FEATURE_FDIR) 3810 mask |= IXGBE_EIMS_FLOW_DIR; 3811 3812 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3813 3814 /* With MSI-X we use auto clear */ 3815 if (sc->intr_type == IFLIB_INTR_MSIX) { 3816 mask = IXGBE_EIMS_ENABLE_MASK; 3817 /* Don't autoclear Link */ 3818 mask &= ~IXGBE_EIMS_OTHER; 3819 mask &= ~IXGBE_EIMS_LSC; 3820 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 3821 mask &= ~IXGBE_EIMS_MAILBOX; 3822 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 3823 } 3824 3825 /* 3826 * Now enable all queues, this is done separately to 3827 * allow for handling the extended (beyond 32) MSI-X 3828 * vectors that can be used by 82599 3829 */ 3830 for (int i = 0; i < sc->num_rx_queues; i++, que++) 3831 ixgbe_enable_queue(sc, que->msix); 3832 3833 IXGBE_WRITE_FLUSH(hw); 3834 3835 } /* ixgbe_if_enable_intr */ 3836 3837 /************************************************************************ 3838 * ixgbe_disable_intr 3839 ************************************************************************/ 3840 static void 3841 ixgbe_if_disable_intr(if_ctx_t ctx) 3842 { 3843 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3844 3845 if (sc->intr_type == IFLIB_INTR_MSIX) 3846 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 3847 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 3848 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~0); 3849 } else { 3850 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, 0xFFFF0000); 3851 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(0), ~0); 3852 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(1), ~0); 3853 } 3854 IXGBE_WRITE_FLUSH(&sc->hw); 3855 3856 } /* ixgbe_if_disable_intr */ 3857 3858 /************************************************************************ 3859 * ixgbe_link_intr_enable 3860 ************************************************************************/ 3861 static void 3862 ixgbe_link_intr_enable(if_ctx_t ctx) 3863 { 3864 struct ixgbe_hw *hw = &((struct ixgbe_softc *)iflib_get_softc(ctx))->hw; 3865 3866 /* Re-enable other interrupts */ 3867 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC); 3868 } /* ixgbe_link_intr_enable */ 3869 3870 /************************************************************************ 3871 * ixgbe_if_rx_queue_intr_enable 3872 ************************************************************************/ 3873 static int 3874 ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) 3875 { 3876 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3877 struct ix_rx_queue *que = &sc->rx_queues[rxqid]; 3878 3879 ixgbe_enable_queue(sc, que->msix); 3880 3881 return (0); 3882 } /* ixgbe_if_rx_queue_intr_enable */ 3883 3884 /************************************************************************ 3885 * ixgbe_enable_queue 3886 ************************************************************************/ 3887 static void 3888 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 3889 { 3890 struct ixgbe_hw *hw = &sc->hw; 3891 u64 queue = 1ULL << vector; 3892 u32 mask; 3893 3894 if (hw->mac.type == ixgbe_mac_82598EB) { 3895 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 3896 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3897 } else { 3898 mask = (queue & 0xFFFFFFFF); 3899 if (mask) 3900 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 3901 mask = (queue >> 32); 3902 if (mask) 3903 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 3904 } 3905 } /* ixgbe_enable_queue */ 3906 3907 /************************************************************************ 3908 * ixgbe_disable_queue 3909 ************************************************************************/ 3910 static void 3911 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 3912 { 3913 struct ixgbe_hw *hw = &sc->hw; 3914 u64 queue = 1ULL << vector; 3915 u32 mask; 3916 3917 if (hw->mac.type == ixgbe_mac_82598EB) { 3918 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 3919 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 3920 } else { 3921 mask = (queue & 0xFFFFFFFF); 3922 if (mask) 3923 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 3924 mask = (queue >> 32); 3925 if (mask) 3926 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 3927 } 3928 } /* ixgbe_disable_queue */ 3929 3930 /************************************************************************ 3931 * ixgbe_intr - Legacy Interrupt Service Routine 3932 ************************************************************************/ 3933 int 3934 ixgbe_intr(void *arg) 3935 { 3936 struct ixgbe_softc *sc = arg; 3937 struct ix_rx_queue *que = sc->rx_queues; 3938 struct ixgbe_hw *hw = &sc->hw; 3939 if_ctx_t ctx = sc->ctx; 3940 u32 eicr, eicr_mask; 3941 3942 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 3943 3944 ++que->irqs; 3945 if (eicr == 0) { 3946 ixgbe_if_enable_intr(ctx); 3947 return (FILTER_HANDLED); 3948 } 3949 3950 /* Check for fan failure */ 3951 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 3952 (eicr & IXGBE_EICR_GPI_SDP1)) { 3953 device_printf(sc->dev, 3954 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 3955 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3956 } 3957 3958 /* Link status change */ 3959 if (eicr & IXGBE_EICR_LSC) { 3960 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 3961 iflib_admin_intr_deferred(ctx); 3962 } 3963 3964 if (ixgbe_is_sfp(hw)) { 3965 /* Pluggable optics-related interrupt */ 3966 if (hw->mac.type >= ixgbe_mac_X540) 3967 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3968 else 3969 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3970 3971 if (eicr & eicr_mask) { 3972 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 3973 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 3974 } 3975 3976 if ((hw->mac.type == ixgbe_mac_82599EB) && 3977 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3978 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3979 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3980 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 3981 } 3982 } 3983 3984 /* External PHY interrupt */ 3985 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3986 (eicr & IXGBE_EICR_GPI_SDP0_X540)) 3987 sc->task_requests |= IXGBE_REQUEST_TASK_PHY; 3988 3989 return (FILTER_SCHEDULE_THREAD); 3990 } /* ixgbe_intr */ 3991 3992 /************************************************************************ 3993 * ixgbe_free_pci_resources 3994 ************************************************************************/ 3995 static void 3996 ixgbe_free_pci_resources(if_ctx_t ctx) 3997 { 3998 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3999 struct ix_rx_queue *que = sc->rx_queues; 4000 device_t dev = iflib_get_dev(ctx); 4001 4002 /* Release all MSI-X queue resources */ 4003 if (sc->intr_type == IFLIB_INTR_MSIX) 4004 iflib_irq_free(ctx, &sc->irq); 4005 4006 if (que != NULL) { 4007 for (int i = 0; i < sc->num_rx_queues; i++, que++) { 4008 iflib_irq_free(ctx, &que->que_irq); 4009 } 4010 } 4011 4012 if (sc->pci_mem != NULL) 4013 bus_release_resource(dev, SYS_RES_MEMORY, 4014 rman_get_rid(sc->pci_mem), sc->pci_mem); 4015 } /* ixgbe_free_pci_resources */ 4016 4017 /************************************************************************ 4018 * ixgbe_sysctl_flowcntl 4019 * 4020 * SYSCTL wrapper around setting Flow Control 4021 ************************************************************************/ 4022 static int 4023 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS) 4024 { 4025 struct ixgbe_softc *sc; 4026 int error, fc; 4027 4028 sc = (struct ixgbe_softc *)arg1; 4029 fc = sc->hw.fc.current_mode; 4030 4031 error = sysctl_handle_int(oidp, &fc, 0, req); 4032 if ((error) || (req->newptr == NULL)) 4033 return (error); 4034 4035 /* Don't bother if it's not changed */ 4036 if (fc == sc->hw.fc.current_mode) 4037 return (0); 4038 4039 return ixgbe_set_flowcntl(sc, fc); 4040 } /* ixgbe_sysctl_flowcntl */ 4041 4042 /************************************************************************ 4043 * ixgbe_set_flowcntl - Set flow control 4044 * 4045 * Flow control values: 4046 * 0 - off 4047 * 1 - rx pause 4048 * 2 - tx pause 4049 * 3 - full 4050 ************************************************************************/ 4051 static int 4052 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 4053 { 4054 switch (fc) { 4055 case ixgbe_fc_rx_pause: 4056 case ixgbe_fc_tx_pause: 4057 case ixgbe_fc_full: 4058 sc->hw.fc.requested_mode = fc; 4059 if (sc->num_rx_queues > 1) 4060 ixgbe_disable_rx_drop(sc); 4061 break; 4062 case ixgbe_fc_none: 4063 sc->hw.fc.requested_mode = ixgbe_fc_none; 4064 if (sc->num_rx_queues > 1) 4065 ixgbe_enable_rx_drop(sc); 4066 break; 4067 default: 4068 return (EINVAL); 4069 } 4070 4071 /* Don't autoneg if forcing a value */ 4072 sc->hw.fc.disable_fc_autoneg = true; 4073 ixgbe_fc_enable(&sc->hw); 4074 4075 return (0); 4076 } /* ixgbe_set_flowcntl */ 4077 4078 /************************************************************************ 4079 * ixgbe_enable_rx_drop 4080 * 4081 * Enable the hardware to drop packets when the buffer is 4082 * full. This is useful with multiqueue, so that no single 4083 * queue being full stalls the entire RX engine. We only 4084 * enable this when Multiqueue is enabled AND Flow Control 4085 * is disabled. 4086 ************************************************************************/ 4087 static void 4088 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 4089 { 4090 struct ixgbe_hw *hw = &sc->hw; 4091 struct rx_ring *rxr; 4092 u32 srrctl; 4093 4094 for (int i = 0; i < sc->num_rx_queues; i++) { 4095 rxr = &sc->rx_queues[i].rxr; 4096 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 4097 srrctl |= IXGBE_SRRCTL_DROP_EN; 4098 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 4099 } 4100 4101 /* enable drop for each vf */ 4102 for (int i = 0; i < sc->num_vfs; i++) { 4103 IXGBE_WRITE_REG(hw, IXGBE_QDE, 4104 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 4105 IXGBE_QDE_ENABLE)); 4106 } 4107 } /* ixgbe_enable_rx_drop */ 4108 4109 /************************************************************************ 4110 * ixgbe_disable_rx_drop 4111 ************************************************************************/ 4112 static void 4113 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 4114 { 4115 struct ixgbe_hw *hw = &sc->hw; 4116 struct rx_ring *rxr; 4117 u32 srrctl; 4118 4119 for (int i = 0; i < sc->num_rx_queues; i++) { 4120 rxr = &sc->rx_queues[i].rxr; 4121 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 4122 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 4123 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 4124 } 4125 4126 /* disable drop for each vf */ 4127 for (int i = 0; i < sc->num_vfs; i++) { 4128 IXGBE_WRITE_REG(hw, IXGBE_QDE, 4129 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 4130 } 4131 } /* ixgbe_disable_rx_drop */ 4132 4133 /************************************************************************ 4134 * ixgbe_sysctl_advertise 4135 * 4136 * SYSCTL wrapper around setting advertised speed 4137 ************************************************************************/ 4138 static int 4139 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS) 4140 { 4141 struct ixgbe_softc *sc; 4142 int error, advertise; 4143 4144 sc = (struct ixgbe_softc *)arg1; 4145 advertise = sc->advertise; 4146 4147 error = sysctl_handle_int(oidp, &advertise, 0, req); 4148 if ((error) || (req->newptr == NULL)) 4149 return (error); 4150 4151 return ixgbe_set_advertise(sc, advertise); 4152 } /* ixgbe_sysctl_advertise */ 4153 4154 /************************************************************************ 4155 * ixgbe_set_advertise - Control advertised link speed 4156 * 4157 * Flags: 4158 * 0x1 - advertise 100 Mb 4159 * 0x2 - advertise 1G 4160 * 0x4 - advertise 10G 4161 * 0x8 - advertise 10 Mb (yes, Mb) 4162 * 0x10 - advertise 2.5G (disabled by default) 4163 * 0x20 - advertise 5G (disabled by default) 4164 * 4165 ************************************************************************/ 4166 static int 4167 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 4168 { 4169 device_t dev = iflib_get_dev(sc->ctx); 4170 struct ixgbe_hw *hw; 4171 ixgbe_link_speed speed = 0; 4172 ixgbe_link_speed link_caps = 0; 4173 s32 err = IXGBE_NOT_IMPLEMENTED; 4174 bool negotiate = false; 4175 4176 /* Checks to validate new value */ 4177 if (sc->advertise == advertise) /* no change */ 4178 return (0); 4179 4180 hw = &sc->hw; 4181 4182 /* No speed changes for backplane media */ 4183 if (hw->phy.media_type == ixgbe_media_type_backplane) 4184 return (ENODEV); 4185 4186 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 4187 (hw->phy.multispeed_fiber))) { 4188 device_printf(dev, "Advertised speed can only be set on copper or multispeed fiber media types.\n"); 4189 return (EINVAL); 4190 } 4191 4192 if (advertise < 0x1 || advertise > 0x3F) { 4193 device_printf(dev, "Invalid advertised speed; valid modes are 0x1 through 0x3F\n"); 4194 return (EINVAL); 4195 } 4196 4197 if (hw->mac.ops.get_link_capabilities) { 4198 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 4199 &negotiate); 4200 if (err != IXGBE_SUCCESS) { 4201 device_printf(dev, "Unable to determine supported advertise speeds\n"); 4202 return (ENODEV); 4203 } 4204 } 4205 4206 /* Set new value and report new advertised mode */ 4207 if (advertise & 0x1) { 4208 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 4209 device_printf(dev, "Interface does not support 100Mb advertised speed\n"); 4210 return (EINVAL); 4211 } 4212 speed |= IXGBE_LINK_SPEED_100_FULL; 4213 } 4214 if (advertise & 0x2) { 4215 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 4216 device_printf(dev, "Interface does not support 1Gb advertised speed\n"); 4217 return (EINVAL); 4218 } 4219 speed |= IXGBE_LINK_SPEED_1GB_FULL; 4220 } 4221 if (advertise & 0x4) { 4222 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 4223 device_printf(dev, "Interface does not support 10Gb advertised speed\n"); 4224 return (EINVAL); 4225 } 4226 speed |= IXGBE_LINK_SPEED_10GB_FULL; 4227 } 4228 if (advertise & 0x8) { 4229 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 4230 device_printf(dev, "Interface does not support 10Mb advertised speed\n"); 4231 return (EINVAL); 4232 } 4233 speed |= IXGBE_LINK_SPEED_10_FULL; 4234 } 4235 if (advertise & 0x10) { 4236 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 4237 device_printf(dev, "Interface does not support 2.5G advertised speed\n"); 4238 return (EINVAL); 4239 } 4240 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 4241 } 4242 if (advertise & 0x20) { 4243 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 4244 device_printf(dev, "Interface does not support 5G advertised speed\n"); 4245 return (EINVAL); 4246 } 4247 speed |= IXGBE_LINK_SPEED_5GB_FULL; 4248 } 4249 4250 hw->mac.autotry_restart = true; 4251 hw->mac.ops.setup_link(hw, speed, true); 4252 sc->advertise = advertise; 4253 4254 return (0); 4255 } /* ixgbe_set_advertise */ 4256 4257 /************************************************************************ 4258 * ixgbe_get_default_advertise - Get default advertised speed settings 4259 * 4260 * Formatted for sysctl usage. 4261 * Flags: 4262 * 0x1 - advertise 100 Mb 4263 * 0x2 - advertise 1G 4264 * 0x4 - advertise 10G 4265 * 0x8 - advertise 10 Mb (yes, Mb) 4266 * 0x10 - advertise 2.5G (disabled by default) 4267 * 0x20 - advertise 5G (disabled by default) 4268 ************************************************************************/ 4269 static int 4270 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 4271 { 4272 struct ixgbe_hw *hw = &sc->hw; 4273 int speed; 4274 ixgbe_link_speed link_caps = 0; 4275 s32 err; 4276 bool negotiate = false; 4277 4278 /* 4279 * Advertised speed means nothing unless it's copper or 4280 * multi-speed fiber 4281 */ 4282 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 4283 !(hw->phy.multispeed_fiber)) 4284 return (0); 4285 4286 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 4287 if (err != IXGBE_SUCCESS) 4288 return (0); 4289 4290 if (hw->mac.type == ixgbe_mac_X550) { 4291 /* 4292 * 2.5G and 5G autonegotiation speeds on X550 4293 * are disabled by default due to reported 4294 * interoperability issues with some switches. 4295 */ 4296 link_caps &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 4297 IXGBE_LINK_SPEED_5GB_FULL); 4298 } 4299 4300 speed = 4301 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 4302 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 4303 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 4304 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 4305 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 4306 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 4307 4308 return speed; 4309 } /* ixgbe_get_default_advertise */ 4310 4311 /************************************************************************ 4312 * ixgbe_sysctl_dmac - Manage DMA Coalescing 4313 * 4314 * Control values: 4315 * 0/1 - off / on (use default value of 1000) 4316 * 4317 * Legal timer values are: 4318 * 50,100,250,500,1000,2000,5000,10000 4319 * 4320 * Turning off interrupt moderation will also turn this off. 4321 ************************************************************************/ 4322 static int 4323 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 4324 { 4325 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4326 if_t ifp = iflib_get_ifp(sc->ctx); 4327 int error; 4328 u16 newval; 4329 4330 newval = sc->dmac; 4331 error = sysctl_handle_16(oidp, &newval, 0, req); 4332 if ((error) || (req->newptr == NULL)) 4333 return (error); 4334 4335 switch (newval) { 4336 case 0: 4337 /* Disabled */ 4338 sc->dmac = 0; 4339 break; 4340 case 1: 4341 /* Enable and use default */ 4342 sc->dmac = 1000; 4343 break; 4344 case 50: 4345 case 100: 4346 case 250: 4347 case 500: 4348 case 1000: 4349 case 2000: 4350 case 5000: 4351 case 10000: 4352 /* Legal values - allow */ 4353 sc->dmac = newval; 4354 break; 4355 default: 4356 /* Do nothing, illegal value */ 4357 return (EINVAL); 4358 } 4359 4360 /* Re-initialize hardware if it's already running */ 4361 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 4362 if_init(ifp, ifp); 4363 4364 return (0); 4365 } /* ixgbe_sysctl_dmac */ 4366 4367 #ifdef IXGBE_DEBUG 4368 /************************************************************************ 4369 * ixgbe_sysctl_power_state 4370 * 4371 * Sysctl to test power states 4372 * Values: 4373 * 0 - set device to D0 4374 * 3 - set device to D3 4375 * (none) - get current device power state 4376 ************************************************************************/ 4377 static int 4378 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 4379 { 4380 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4381 device_t dev = sc->dev; 4382 int curr_ps, new_ps, error = 0; 4383 4384 curr_ps = new_ps = pci_get_powerstate(dev); 4385 4386 error = sysctl_handle_int(oidp, &new_ps, 0, req); 4387 if ((error) || (req->newptr == NULL)) 4388 return (error); 4389 4390 if (new_ps == curr_ps) 4391 return (0); 4392 4393 if (new_ps == 3 && curr_ps == 0) 4394 error = DEVICE_SUSPEND(dev); 4395 else if (new_ps == 0 && curr_ps == 3) 4396 error = DEVICE_RESUME(dev); 4397 else 4398 return (EINVAL); 4399 4400 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 4401 4402 return (error); 4403 } /* ixgbe_sysctl_power_state */ 4404 #endif 4405 4406 /************************************************************************ 4407 * ixgbe_sysctl_wol_enable 4408 * 4409 * Sysctl to enable/disable the WoL capability, 4410 * if supported by the adapter. 4411 * 4412 * Values: 4413 * 0 - disabled 4414 * 1 - enabled 4415 ************************************************************************/ 4416 static int 4417 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 4418 { 4419 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4420 struct ixgbe_hw *hw = &sc->hw; 4421 int new_wol_enabled; 4422 int error = 0; 4423 4424 new_wol_enabled = hw->wol_enabled; 4425 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 4426 if ((error) || (req->newptr == NULL)) 4427 return (error); 4428 new_wol_enabled = !!(new_wol_enabled); 4429 if (new_wol_enabled == hw->wol_enabled) 4430 return (0); 4431 4432 if (new_wol_enabled > 0 && !sc->wol_support) 4433 return (ENODEV); 4434 else 4435 hw->wol_enabled = new_wol_enabled; 4436 4437 return (0); 4438 } /* ixgbe_sysctl_wol_enable */ 4439 4440 /************************************************************************ 4441 * ixgbe_sysctl_wufc - Wake Up Filter Control 4442 * 4443 * Sysctl to enable/disable the types of packets that the 4444 * adapter will wake up on upon receipt. 4445 * Flags: 4446 * 0x1 - Link Status Change 4447 * 0x2 - Magic Packet 4448 * 0x4 - Direct Exact 4449 * 0x8 - Directed Multicast 4450 * 0x10 - Broadcast 4451 * 0x20 - ARP/IPv4 Request Packet 4452 * 0x40 - Direct IPv4 Packet 4453 * 0x80 - Direct IPv6 Packet 4454 * 4455 * Settings not listed above will cause the sysctl to return an error. 4456 ************************************************************************/ 4457 static int 4458 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 4459 { 4460 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4461 int error = 0; 4462 u32 new_wufc; 4463 4464 new_wufc = sc->wufc; 4465 4466 error = sysctl_handle_32(oidp, &new_wufc, 0, req); 4467 if ((error) || (req->newptr == NULL)) 4468 return (error); 4469 if (new_wufc == sc->wufc) 4470 return (0); 4471 4472 if (new_wufc & 0xffffff00) 4473 return (EINVAL); 4474 4475 new_wufc &= 0xff; 4476 new_wufc |= (0xffffff & sc->wufc); 4477 sc->wufc = new_wufc; 4478 4479 return (0); 4480 } /* ixgbe_sysctl_wufc */ 4481 4482 #ifdef IXGBE_DEBUG 4483 /************************************************************************ 4484 * ixgbe_sysctl_print_rss_config 4485 ************************************************************************/ 4486 static int 4487 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 4488 { 4489 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4490 struct ixgbe_hw *hw = &sc->hw; 4491 device_t dev = sc->dev; 4492 struct sbuf *buf; 4493 int error = 0, reta_size; 4494 u32 reg; 4495 4496 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 4497 if (!buf) { 4498 device_printf(dev, "Could not allocate sbuf for output.\n"); 4499 return (ENOMEM); 4500 } 4501 4502 // TODO: use sbufs to make a string to print out 4503 /* Set multiplier for RETA setup and table size based on MAC */ 4504 switch (sc->hw.mac.type) { 4505 case ixgbe_mac_X550: 4506 case ixgbe_mac_X550EM_x: 4507 case ixgbe_mac_X550EM_a: 4508 reta_size = 128; 4509 break; 4510 default: 4511 reta_size = 32; 4512 break; 4513 } 4514 4515 /* Print out the redirection table */ 4516 sbuf_cat(buf, "\n"); 4517 for (int i = 0; i < reta_size; i++) { 4518 if (i < 32) { 4519 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 4520 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 4521 } else { 4522 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 4523 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 4524 } 4525 } 4526 4527 // TODO: print more config 4528 4529 error = sbuf_finish(buf); 4530 if (error) 4531 device_printf(dev, "Error finishing sbuf: %d\n", error); 4532 4533 sbuf_delete(buf); 4534 4535 return (0); 4536 } /* ixgbe_sysctl_print_rss_config */ 4537 #endif /* IXGBE_DEBUG */ 4538 4539 /************************************************************************ 4540 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 4541 * 4542 * For X552/X557-AT devices using an external PHY 4543 ************************************************************************/ 4544 static int 4545 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 4546 { 4547 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4548 struct ixgbe_hw *hw = &sc->hw; 4549 u16 reg; 4550 4551 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4552 device_printf(iflib_get_dev(sc->ctx), 4553 "Device has no supported external thermal sensor.\n"); 4554 return (ENODEV); 4555 } 4556 4557 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 4558 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 4559 device_printf(iflib_get_dev(sc->ctx), 4560 "Error reading from PHY's current temperature register\n"); 4561 return (EAGAIN); 4562 } 4563 4564 /* Shift temp for output */ 4565 reg = reg >> 8; 4566 4567 return (sysctl_handle_16(oidp, NULL, reg, req)); 4568 } /* ixgbe_sysctl_phy_temp */ 4569 4570 /************************************************************************ 4571 * ixgbe_sysctl_phy_overtemp_occurred 4572 * 4573 * Reports (directly from the PHY) whether the current PHY 4574 * temperature is over the overtemp threshold. 4575 ************************************************************************/ 4576 static int 4577 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 4578 { 4579 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4580 struct ixgbe_hw *hw = &sc->hw; 4581 u16 reg; 4582 4583 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4584 device_printf(iflib_get_dev(sc->ctx), 4585 "Device has no supported external thermal sensor.\n"); 4586 return (ENODEV); 4587 } 4588 4589 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 4590 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 4591 device_printf(iflib_get_dev(sc->ctx), 4592 "Error reading from PHY's temperature status register\n"); 4593 return (EAGAIN); 4594 } 4595 4596 /* Get occurrence bit */ 4597 reg = !!(reg & 0x4000); 4598 4599 return (sysctl_handle_16(oidp, 0, reg, req)); 4600 } /* ixgbe_sysctl_phy_overtemp_occurred */ 4601 4602 /************************************************************************ 4603 * ixgbe_sysctl_eee_state 4604 * 4605 * Sysctl to set EEE power saving feature 4606 * Values: 4607 * 0 - disable EEE 4608 * 1 - enable EEE 4609 * (none) - get current device EEE state 4610 ************************************************************************/ 4611 static int 4612 ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS) 4613 { 4614 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4615 device_t dev = sc->dev; 4616 if_t ifp = iflib_get_ifp(sc->ctx); 4617 int curr_eee, new_eee, error = 0; 4618 s32 retval; 4619 4620 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 4621 4622 error = sysctl_handle_int(oidp, &new_eee, 0, req); 4623 if ((error) || (req->newptr == NULL)) 4624 return (error); 4625 4626 /* Nothing to do */ 4627 if (new_eee == curr_eee) 4628 return (0); 4629 4630 /* Not supported */ 4631 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 4632 return (EINVAL); 4633 4634 /* Bounds checking */ 4635 if ((new_eee < 0) || (new_eee > 1)) 4636 return (EINVAL); 4637 4638 retval = ixgbe_setup_eee(&sc->hw, new_eee); 4639 if (retval) { 4640 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 4641 return (EINVAL); 4642 } 4643 4644 /* Restart auto-neg */ 4645 if_init(ifp, ifp); 4646 4647 device_printf(dev, "New EEE state: %d\n", new_eee); 4648 4649 /* Cache new value */ 4650 if (new_eee) 4651 sc->feat_en |= IXGBE_FEATURE_EEE; 4652 else 4653 sc->feat_en &= ~IXGBE_FEATURE_EEE; 4654 4655 return (error); 4656 } /* ixgbe_sysctl_eee_state */ 4657 4658 /************************************************************************ 4659 * ixgbe_init_device_features 4660 ************************************************************************/ 4661 static void 4662 ixgbe_init_device_features(struct ixgbe_softc *sc) 4663 { 4664 sc->feat_cap = IXGBE_FEATURE_NETMAP 4665 | IXGBE_FEATURE_RSS 4666 | IXGBE_FEATURE_MSI 4667 | IXGBE_FEATURE_MSIX 4668 | IXGBE_FEATURE_LEGACY_IRQ; 4669 4670 /* Set capabilities first... */ 4671 switch (sc->hw.mac.type) { 4672 case ixgbe_mac_82598EB: 4673 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 4674 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 4675 break; 4676 case ixgbe_mac_X540: 4677 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 4678 sc->feat_cap |= IXGBE_FEATURE_FDIR; 4679 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 4680 (sc->hw.bus.func == 0)) 4681 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 4682 break; 4683 case ixgbe_mac_X550: 4684 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 4685 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 4686 sc->feat_cap |= IXGBE_FEATURE_FDIR; 4687 break; 4688 case ixgbe_mac_X550EM_x: 4689 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 4690 sc->feat_cap |= IXGBE_FEATURE_FDIR; 4691 break; 4692 case ixgbe_mac_X550EM_a: 4693 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 4694 sc->feat_cap |= IXGBE_FEATURE_FDIR; 4695 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 4696 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 4697 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 4698 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 4699 sc->feat_cap |= IXGBE_FEATURE_EEE; 4700 } 4701 break; 4702 case ixgbe_mac_82599EB: 4703 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 4704 sc->feat_cap |= IXGBE_FEATURE_FDIR; 4705 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 4706 (sc->hw.bus.func == 0)) 4707 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 4708 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 4709 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 4710 break; 4711 default: 4712 break; 4713 } 4714 4715 /* Enabled by default... */ 4716 /* Fan failure detection */ 4717 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 4718 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 4719 /* Netmap */ 4720 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 4721 sc->feat_en |= IXGBE_FEATURE_NETMAP; 4722 /* EEE */ 4723 if (sc->feat_cap & IXGBE_FEATURE_EEE) 4724 sc->feat_en |= IXGBE_FEATURE_EEE; 4725 /* Thermal Sensor */ 4726 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 4727 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 4728 4729 /* Enabled via global sysctl... */ 4730 /* Flow Director */ 4731 if (ixgbe_enable_fdir) { 4732 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 4733 sc->feat_en |= IXGBE_FEATURE_FDIR; 4734 else 4735 device_printf(sc->dev, "Device does not support Flow Director. Leaving disabled."); 4736 } 4737 /* 4738 * Message Signal Interrupts - Extended (MSI-X) 4739 * Normal MSI is only enabled if MSI-X calls fail. 4740 */ 4741 if (!ixgbe_enable_msix) 4742 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 4743 /* Receive-Side Scaling (RSS) */ 4744 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 4745 sc->feat_en |= IXGBE_FEATURE_RSS; 4746 4747 /* Disable features with unmet dependencies... */ 4748 /* No MSI-X */ 4749 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 4750 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 4751 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 4752 sc->feat_en &= ~IXGBE_FEATURE_RSS; 4753 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 4754 } 4755 } /* ixgbe_init_device_features */ 4756 4757 /************************************************************************ 4758 * ixgbe_check_fan_failure 4759 ************************************************************************/ 4760 static void 4761 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 4762 { 4763 u32 mask; 4764 4765 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 4766 IXGBE_ESDP_SDP1; 4767 4768 if (reg & mask) 4769 device_printf(sc->dev, "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 4770 } /* ixgbe_check_fan_failure */ 4771 4772 /************************************************************************ 4773 * ixgbe_sbuf_fw_version 4774 ************************************************************************/ 4775 static void 4776 ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf) 4777 { 4778 struct ixgbe_nvm_version nvm_ver = {0}; 4779 uint16_t phyfw = 0; 4780 int status; 4781 const char *space = ""; 4782 4783 ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */ 4784 ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */ 4785 ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack identifies a build in Intel's SCM */ 4786 status = ixgbe_get_phy_firmware_version(hw, &phyfw); 4787 4788 if (nvm_ver.oem_valid) { 4789 sbuf_printf(buf, "NVM OEM V%d.%d R%d", nvm_ver.oem_major, 4790 nvm_ver.oem_minor, nvm_ver.oem_release); 4791 space = " "; 4792 } 4793 4794 if (nvm_ver.or_valid) { 4795 sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d", 4796 space, nvm_ver.or_major, nvm_ver.or_build, nvm_ver.or_patch); 4797 space = " "; 4798 } 4799 4800 if (nvm_ver.etk_id != ((NVM_VER_INVALID << NVM_ETK_SHIFT) | 4801 NVM_VER_INVALID)) { 4802 sbuf_printf(buf, "%seTrack 0x%08x", space, nvm_ver.etk_id); 4803 space = " "; 4804 } 4805 4806 if (phyfw != 0 && status == IXGBE_SUCCESS) 4807 sbuf_printf(buf, "%sPHY FW V%d", space, phyfw); 4808 } /* ixgbe_sbuf_fw_version */ 4809 4810 /************************************************************************ 4811 * ixgbe_print_fw_version 4812 ************************************************************************/ 4813 static void 4814 ixgbe_print_fw_version(if_ctx_t ctx) 4815 { 4816 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4817 struct ixgbe_hw *hw = &sc->hw; 4818 device_t dev = sc->dev; 4819 struct sbuf *buf; 4820 int error = 0; 4821 4822 buf = sbuf_new_auto(); 4823 if (!buf) { 4824 device_printf(dev, "Could not allocate sbuf for output.\n"); 4825 return; 4826 } 4827 4828 ixgbe_sbuf_fw_version(hw, buf); 4829 4830 error = sbuf_finish(buf); 4831 if (error) 4832 device_printf(dev, "Error finishing sbuf: %d\n", error); 4833 else if (sbuf_len(buf)) 4834 device_printf(dev, "%s\n", sbuf_data(buf)); 4835 4836 sbuf_delete(buf); 4837 } /* ixgbe_print_fw_version */ 4838 4839 /************************************************************************ 4840 * ixgbe_sysctl_print_fw_version 4841 ************************************************************************/ 4842 static int 4843 ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS) 4844 { 4845 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 4846 struct ixgbe_hw *hw = &sc->hw; 4847 device_t dev = sc->dev; 4848 struct sbuf *buf; 4849 int error = 0; 4850 4851 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 4852 if (!buf) { 4853 device_printf(dev, "Could not allocate sbuf for output.\n"); 4854 return (ENOMEM); 4855 } 4856 4857 ixgbe_sbuf_fw_version(hw, buf); 4858 4859 error = sbuf_finish(buf); 4860 if (error) 4861 device_printf(dev, "Error finishing sbuf: %d\n", error); 4862 4863 sbuf_delete(buf); 4864 4865 return (0); 4866 } /* ixgbe_sysctl_print_fw_version */ 4867