1 /***************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *****************************************************************************/ 33 34 #include "opt_inet.h" 35 #include "opt_inet6.h" 36 #include "opt_rss.h" 37 38 #include "ixgbe.h" 39 #include "mdio_if.h" 40 #include "ixgbe_sriov.h" 41 #include "ifdi_if.h" 42 #include "if_ix_mdio_hw.h" 43 #include "if_ix_mdio.h" 44 45 #include <net/netmap.h> 46 #include <dev/mdio/mdio.h> 47 #include <dev/netmap/netmap_kern.h> 48 49 /************************************************************************ 50 * Driver version 51 ************************************************************************/ 52 static const char ixgbe_driver_version[] = "5.0.1-k"; 53 54 /* Bound one admin-task invocation while still coalescing new requests. */ 55 #define IXGBE_ADMIN_TASK_BUDGET 8 56 57 /************************************************************************ 58 * PCI Device ID Table 59 * 60 * Used by probe to select devices to load on 61 * Last field stores an index into ixgbe_strings 62 * Last entry must be all 0s 63 * 64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 65 ************************************************************************/ 66 static const pci_vendor_info_t ixgbe_vendor_info_array[] = 67 { 68 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 69 "Intel(R) 82598EB AF (Dual Fiber)"), 70 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 71 "Intel(R) 82598EB AF (Fiber)"), 72 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 73 "Intel(R) 82598EB AT (CX4)"), 74 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 75 "Intel(R) 82598EB AT"), 76 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 77 "Intel(R) 82598EB AT2"), 78 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, "Intel(R) 82598"), 79 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 80 "Intel(R) 82598EB AF DA (Dual Fiber)"), 81 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 82 "Intel(R) 82598EB AT (Dual CX4)"), 83 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 84 "Intel(R) 82598EB AF (Dual Fiber LR)"), 85 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 86 "Intel(R) 82598EB AF (Dual Fiber SR)"), 87 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 88 "Intel(R) 82598EB LOM"), 89 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 90 "Intel(R) 82598EB BX Backplane"), 91 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 92 "Intel(R) X520 82599 (KX4)"), 93 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 94 "Intel(R) X520 82599 (KX4 Mezzanine)"), 95 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 96 "Intel(R) X520 82599ES (SFI/SFP+)"), 97 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 98 "Intel(R) X520 82599ES (KR Backplane)"), 99 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 100 "Intel(R) X520-P2 82599 (SFP+)"), 101 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 102 "Intel(R) X520 82599 (XAUI/BX4)"), 103 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 104 "Intel(R) X520 82599 (Dual CX4)"), 105 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 106 "Intel(R) X520-T 82599 LOM"), 107 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 108 "Intel(R) X520 82599 LS"), 109 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 110 "Intel(R) X520 82599 (Combined Backplane)"), 111 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 112 "Intel(R) X520 82599 (Backplane w/FCoE)"), 113 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 114 "Intel(R) X520 82599 (Dual SFP+)"), 115 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 116 "Intel(R) X520 82599 (Dual SFP+ w/FCoE)"), 117 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 118 "Intel(R) X520-1 82599EN (SFP+)"), 119 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 120 "Intel(R) X520-4 82599 (Quad SFP+)"), 121 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 122 "Intel(R) X520-Q1 82599 (QSFP+)"), 123 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 124 "Intel(R) X540-AT2"), 125 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"), 126 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"), 127 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"), 128 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 129 "Intel(R) X552 (KR Backplane)"), 130 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 131 "Intel(R) X552 (KX4 Backplane)"), 132 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 133 "Intel(R) X552/X557-AT (10GBASE-T)"), 134 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 135 "Intel(R) X552 (1000BASE-T)"), 136 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 137 "Intel(R) X552 (SFP+)"), 138 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 139 "Intel(R) X552 (XFI Backplane)"), 140 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 141 "Intel(R) X553 (KR Backplane)"), 142 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 143 "Intel(R) X553 L (KR Backplane)"), 144 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 145 "Intel(R) X553 (SFP+)"), 146 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 147 "Intel(R) X553 N (SFP+)"), 148 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 149 "Intel(R) X553 (QSFP+)"), 150 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 151 "Intel(R) X553 N (QSFP+)"), 152 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 153 "Intel(R) X553 (1GbE SGMII)"), 154 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 155 "Intel(R) X553 L (1GbE SGMII)"), 156 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 157 "Intel(R) X553/X557-AT (10GBASE-T)"), 158 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 159 "Intel(R) X553 (1GbE)"), 160 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 161 "Intel(R) X553 L (1GbE)"), 162 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 163 "Intel(R) X540-T2 (Bypass)"), 164 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 165 "Intel(R) X520 82599 (Bypass)"), 166 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_BACKPLANE, 167 "Intel(R) E610 (Backplane)"), 168 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SFP, 169 "Intel(R) E610 (SFP)"), 170 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_2_5G_T, 171 "Intel(R) E610 (2.5 GbE)"), 172 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_10G_T, 173 "Intel(R) E610 (10 GbE)"), 174 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SGMII, 175 "Intel(R) E610 (SGMII)"), 176 /* required last entry */ 177 PVID_END 178 }; 179 180 static void *ixgbe_register(device_t); 181 static int ixgbe_if_attach_pre(if_ctx_t); 182 static int ixgbe_if_attach_post(if_ctx_t); 183 static int ixgbe_if_detach(if_ctx_t); 184 static int ixgbe_if_power_prepare(if_ctx_t, enum iflib_power_event); 185 static int ixgbe_if_shutdown(if_ctx_t); 186 static int ixgbe_if_suspend(if_ctx_t); 187 static int ixgbe_if_resume(if_ctx_t); 188 #ifdef PCI_IOV 189 static int ixgbe_device_iov_init(device_t, uint16_t, const nvlist_t *); 190 #endif 191 192 static void ixgbe_if_stop(if_ctx_t); 193 void ixgbe_if_enable_intr(if_ctx_t); 194 static void ixgbe_if_disable_intr(if_ctx_t); 195 static void ixgbe_link_intr_enable(if_ctx_t); 196 static int ixgbe_if_rx_queue_intr_enable(if_ctx_t, uint16_t); 197 static void ixgbe_if_media_status(if_ctx_t, struct ifmediareq *); 198 static int ixgbe_if_media_change(if_ctx_t); 199 static int ixgbe_if_msix_intr_assign(if_ctx_t, int); 200 static int ixgbe_if_mtu_set(if_ctx_t, uint32_t); 201 static void ixgbe_if_crcstrip_set(if_ctx_t, int, int); 202 static void ixgbe_if_multi_set(if_ctx_t); 203 static int ixgbe_if_promisc_set(if_ctx_t, int); 204 static int ixgbe_if_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 205 int); 206 static int ixgbe_if_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 207 int); 208 static void ixgbe_if_queues_free(if_ctx_t); 209 static void ixgbe_if_timer(if_ctx_t, uint16_t); 210 static const char *ixgbe_link_speed_to_str(u32 link_speed); 211 static void ixgbe_if_update_admin_status(if_ctx_t); 212 static void ixgbe_if_vlan_register(if_ctx_t, u16); 213 static void ixgbe_if_vlan_unregister(if_ctx_t, u16); 214 static int ixgbe_if_i2c_req(if_ctx_t, struct ifi2creq *); 215 static bool ixgbe_if_needs_restart(if_ctx_t, enum iflib_restart_event); 216 static void ixgbe_if_led_func(if_ctx_t, int); 217 static void ixgbe_led_restore(struct ixgbe_softc *); 218 int ixgbe_intr(void *); 219 220 static int ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data); 221 222 /************************************************************************ 223 * Function prototypes 224 ************************************************************************/ 225 static uint64_t ixgbe_if_get_counter(if_ctx_t, ift_counter); 226 227 static void ixgbe_enable_queue(struct ixgbe_softc *, u32); 228 static void ixgbe_disable_queue(struct ixgbe_softc *, u32); 229 static void ixgbe_add_device_sysctls(if_ctx_t); 230 static int ixgbe_allocate_pci_resources(if_ctx_t); 231 static int ixgbe_setup_low_power_mode(if_ctx_t); 232 233 static void ixgbe_config_dmac(struct ixgbe_softc *); 234 static void ixgbe_configure_ivars(struct ixgbe_softc *); 235 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 236 static u8 *ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 237 static bool ixgbe_sfp_probe(if_ctx_t); 238 239 static void ixgbe_free_pci_resources(if_ctx_t); 240 241 static int ixgbe_msix_link(void *); 242 static int ixgbe_msix_que(void *); 243 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 244 static void ixgbe_initialize_receive_units(if_ctx_t); 245 static void ixgbe_initialize_transmit_units(if_ctx_t); 246 247 static int ixgbe_setup_interface(if_ctx_t); 248 static void ixgbe_init_device_features(struct ixgbe_softc *); 249 static void ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 250 static void ixgbe_sbuf_fw_version(struct ixgbe_hw *, struct sbuf *); 251 static void ixgbe_print_fw_version(if_ctx_t); 252 static void ixgbe_add_media_types(if_ctx_t); 253 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 254 static void ixgbe_config_link(if_ctx_t); 255 static void ixgbe_get_slot_info(struct ixgbe_softc *); 256 static void ixgbe_fw_mode_timer(void *); 257 static void ixgbe_fw_mode_timer_pause(struct ixgbe_softc *); 258 static void ixgbe_fw_mode_timer_resume(struct ixgbe_softc *); 259 static void ixgbe_configure_wakeup(if_ctx_t); 260 static void ixgbe_configure_wakeup_mta(if_ctx_t); 261 static void ixgbe_prepare_wakeup(if_ctx_t, bool); 262 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 263 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 264 265 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 266 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 267 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 268 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 269 static void ixgbe_config_gpie(struct ixgbe_softc *); 270 static void ixgbe_config_delay_values(struct ixgbe_softc *); 271 272 static void ixgbe_add_debug_sysctls(struct ixgbe_softc *sc); 273 static void ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc); 274 static int ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 275 static u8 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, 276 struct sbuf *sbuf, u8 cluster_id); 277 static int ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 278 279 /* Sysctl handlers */ 280 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS); 281 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS); 282 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS); 283 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 284 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 285 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 286 static int ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS); 287 #ifdef IXGBE_DEBUG 288 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 289 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 290 #endif 291 static int ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS); 292 static int ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS); 293 static int ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS); 294 static int ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS); 295 static int ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS); 296 static int ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS); 297 298 static int ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS); 299 static int ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS); 300 301 /* Deferred interrupt tasklets */ 302 static void ixgbe_handle_msf(void *); 303 static bool ixgbe_handle_mod(void *); 304 static void ixgbe_handle_phy(void *); 305 static u32 ixgbe_handle_fw_event(void *); 306 307 static int ixgbe_enable_lse(struct ixgbe_softc *sc); 308 static int ixgbe_disable_lse(struct ixgbe_softc *sc); 309 310 /************************************************************************ 311 * FreeBSD Device Interface Entry Points 312 ************************************************************************/ 313 static device_method_t ix_methods[] = { 314 /* Device interface */ 315 DEVMETHOD(device_register, ixgbe_register), 316 DEVMETHOD(device_probe, iflib_device_probe), 317 DEVMETHOD(device_attach, iflib_device_attach), 318 DEVMETHOD(device_detach, iflib_device_detach), 319 DEVMETHOD(device_shutdown, iflib_device_shutdown), 320 DEVMETHOD(device_suspend, iflib_device_suspend), 321 DEVMETHOD(device_resume, iflib_device_resume), 322 #ifdef PCI_IOV 323 DEVMETHOD(pci_iov_init, ixgbe_device_iov_init), 324 DEVMETHOD(pci_iov_uninit, iflib_device_iov_uninit_restart), 325 DEVMETHOD(pci_iov_add_vf, iflib_device_iov_add_vf), 326 #endif /* PCI_IOV */ 327 DEVMETHOD(bus_add_child, device_add_child_ordered), 328 DEVMETHOD(mdio_readreg, ixgbe_mdio_readreg_c22), 329 DEVMETHOD(mdio_writereg, ixgbe_mdio_writereg_c22), 330 331 DEVMETHOD_END 332 }; 333 334 static driver_t ix_driver = { 335 "ix", ix_methods, sizeof(struct ixgbe_softc), 336 }; 337 338 DRIVER_MODULE(mdio, ix, mdio_driver, 0, 0); /* needs to happen before ix */ 339 DRIVER_MODULE_ORDERED(ix, pci, ix_driver, NULL, NULL, SI_ORDER_ANY); /* needs to be last */ 340 IFLIB_PNP_INFO(pci, ix_driver, ixgbe_vendor_info_array); 341 MODULE_DEPEND(ix, pci, 1, 1, 1); 342 MODULE_DEPEND(ix, ether, 1, 1, 1); 343 MODULE_DEPEND(ix, iflib, 1, 1, 1); 344 MODULE_DEPEND(ix, mdio, 1, 1, 1); 345 346 #ifdef PCI_IOV 347 static int 348 ixgbe_device_iov_init(device_t dev, uint16_t num_vfs, 349 const nvlist_t *params) 350 { 351 struct ixgbe_softc *sc; 352 if_ctx_t ctx; 353 int error; 354 355 ctx = device_get_softc(dev); 356 sc = iflib_get_softc(ctx); 357 error = ixgbe_iov_validate(sc, num_vfs); 358 if (error != 0) 359 return (error); 360 return (iflib_device_iov_init_restart(dev, num_vfs, params)); 361 } 362 #endif 363 364 static device_method_t ixgbe_if_methods[] = { 365 DEVMETHOD(ifdi_attach_pre, ixgbe_if_attach_pre), 366 DEVMETHOD(ifdi_attach_post, ixgbe_if_attach_post), 367 DEVMETHOD(ifdi_detach, ixgbe_if_detach), 368 DEVMETHOD(ifdi_power_prepare, ixgbe_if_power_prepare), 369 DEVMETHOD(ifdi_shutdown, ixgbe_if_shutdown), 370 DEVMETHOD(ifdi_suspend, ixgbe_if_suspend), 371 DEVMETHOD(ifdi_resume, ixgbe_if_resume), 372 DEVMETHOD(ifdi_init, ixgbe_if_init), 373 DEVMETHOD(ifdi_stop, ixgbe_if_stop), 374 DEVMETHOD(ifdi_msix_intr_assign, ixgbe_if_msix_intr_assign), 375 DEVMETHOD(ifdi_intr_enable, ixgbe_if_enable_intr), 376 DEVMETHOD(ifdi_intr_disable, ixgbe_if_disable_intr), 377 DEVMETHOD(ifdi_link_intr_enable, ixgbe_link_intr_enable), 378 DEVMETHOD(ifdi_tx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 379 DEVMETHOD(ifdi_rx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 380 DEVMETHOD(ifdi_tx_queues_alloc, ixgbe_if_tx_queues_alloc), 381 DEVMETHOD(ifdi_rx_queues_alloc, ixgbe_if_rx_queues_alloc), 382 DEVMETHOD(ifdi_queues_free, ixgbe_if_queues_free), 383 DEVMETHOD(ifdi_update_admin_status, ixgbe_if_update_admin_status), 384 DEVMETHOD(ifdi_multi_set, ixgbe_if_multi_set), 385 DEVMETHOD(ifdi_mtu_set, ixgbe_if_mtu_set), 386 DEVMETHOD(ifdi_crcstrip_set, ixgbe_if_crcstrip_set), 387 DEVMETHOD(ifdi_media_status, ixgbe_if_media_status), 388 DEVMETHOD(ifdi_media_change, ixgbe_if_media_change), 389 DEVMETHOD(ifdi_promisc_set, ixgbe_if_promisc_set), 390 DEVMETHOD(ifdi_timer, ixgbe_if_timer), 391 DEVMETHOD(ifdi_vlan_register, ixgbe_if_vlan_register), 392 DEVMETHOD(ifdi_vlan_unregister, ixgbe_if_vlan_unregister), 393 DEVMETHOD(ifdi_get_counter, ixgbe_if_get_counter), 394 DEVMETHOD(ifdi_i2c_req, ixgbe_if_i2c_req), 395 DEVMETHOD(ifdi_needs_restart, ixgbe_if_needs_restart), 396 DEVMETHOD(ifdi_priv_ioctl, ixgbe_if_priv_ioctl), 397 DEVMETHOD(ifdi_led_func, ixgbe_if_led_func), 398 #ifdef PCI_IOV 399 DEVMETHOD(ifdi_iov_init, ixgbe_if_iov_init), 400 DEVMETHOD(ifdi_iov_uninit, ixgbe_if_iov_uninit), 401 DEVMETHOD(ifdi_iov_vf_add, ixgbe_if_iov_vf_add), 402 DEVMETHOD(ifdi_vf_status, ixgbe_if_vf_status), 403 #endif /* PCI_IOV */ 404 DEVMETHOD_END 405 }; 406 407 /* 408 * TUNEABLE PARAMETERS: 409 */ 410 411 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 412 "IXGBE driver parameters"); 413 static driver_t ixgbe_if_driver = { 414 "ixgbe_if", ixgbe_if_methods, sizeof(struct ixgbe_softc) 415 }; 416 417 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 418 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 419 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 420 421 /* Flow control setting, default to full */ 422 static int ixgbe_flow_control = ixgbe_fc_full; 423 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 424 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 425 426 /* Advertise Speed, default to 0 (auto) */ 427 static int ixgbe_advertise_speed = 0; 428 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN, 429 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters"); 430 431 /* 432 * Smart speed setting, default to on 433 * this only works as a compile option 434 * right now as its during attach, set 435 * this to 'ixgbe_smart_speed_off' to 436 * disable. 437 */ 438 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 439 440 /* 441 * MSI-X should be the default for best performance, 442 * but this allows it to be forced off for testing. 443 */ 444 static int ixgbe_enable_msix = 1; 445 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 446 0, 447 "Enable MSI-X interrupts"); 448 449 /* 450 * Defining this on will allow the use 451 * of unsupported SFP+ modules, note that 452 * doing so you are on your own :) 453 */ 454 static int allow_unsupported_sfp = false; 455 SYSCTL_INT(_hw_ix, OID_AUTO, unsupported_sfp, CTLFLAG_RDTUN, 456 &allow_unsupported_sfp, 0, 457 "Allow unsupported SFP modules...use at your own risk"); 458 459 /* 460 * Not sure if Flow Director is fully baked, 461 * so we'll default to turning it off. 462 */ 463 static int ixgbe_enable_fdir = 0; 464 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 465 0, 466 "Enable Flow Director"); 467 468 /* Receive-Side Scaling */ 469 static int ixgbe_enable_rss = 1; 470 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 471 0, 472 "Enable Receive-Side Scaling (RSS)"); 473 474 /* 475 * AIM: Adaptive Interrupt Moderation 476 * which means that the interrupt rate 477 * is varied over time based on the 478 * traffic for that interrupt vector 479 */ 480 static int ixgbe_enable_aim = false; 481 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 482 0, 483 "Enable adaptive interrupt moderation"); 484 485 #if 0 486 /* Keep running tab on them for sanity check */ 487 static int ixgbe_total_ports; 488 #endif 489 490 MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 491 492 /* 493 * For Flow Director: this is the number of TX packets we sample 494 * for the filter pool, this means every 20th packet will be probed. 495 * 496 * This feature can be disabled by setting this to 0. 497 */ 498 static int atr_sample_rate = 20; 499 500 extern struct if_txrx ixgbe_txrx; 501 502 static struct if_shared_ctx ixgbe_sctx_init = { 503 .isc_magic = IFLIB_MAGIC, 504 .isc_q_align = PAGE_SIZE,/* max(DBA_ALIGN, PAGE_SIZE) */ 505 .isc_tx_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 506 .isc_tx_maxsegsize = PAGE_SIZE, 507 .isc_tso_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 508 .isc_tso_maxsegsize = PAGE_SIZE, 509 .isc_rx_maxsize = PAGE_SIZE*4, 510 .isc_rx_nsegments = 1, 511 .isc_rx_maxsegsize = PAGE_SIZE*4, 512 .isc_nfl = 1, 513 .isc_ntxqs = 1, 514 .isc_nrxqs = 1, 515 516 .isc_admin_intrcnt = 1, 517 .isc_vendor_info = ixgbe_vendor_info_array, 518 .isc_driver_version = ixgbe_driver_version, 519 .isc_driver = &ixgbe_if_driver, 520 .isc_flags = IFLIB_TSO_INIT_IP, 521 522 .isc_nrxd_min = {MIN_RXD}, 523 .isc_ntxd_min = {MIN_TXD}, 524 .isc_nrxd_max = {MAX_RXD}, 525 .isc_ntxd_max = {MAX_TXD}, 526 .isc_nrxd_default = {DEFAULT_RXD}, 527 .isc_ntxd_default = {DEFAULT_TXD}, 528 }; 529 530 /************************************************************************ 531 * ixgbe_if_tx_queues_alloc 532 ************************************************************************/ 533 static int 534 ixgbe_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 535 int ntxqs, int ntxqsets) 536 { 537 struct ixgbe_softc *sc = iflib_get_softc(ctx); 538 if_softc_ctx_t scctx = sc->shared; 539 struct ix_tx_queue *que; 540 int i, j, error; 541 542 MPASS(sc->num_tx_queues > 0); 543 MPASS(sc->num_tx_queues == ntxqsets); 544 MPASS(ntxqs == 1); 545 546 /* Allocate queue structure memory */ 547 sc->tx_queues = 548 (struct ix_tx_queue *)malloc(sizeof(struct ix_tx_queue) * 549 ntxqsets, M_IXGBE, M_NOWAIT | M_ZERO); 550 if (!sc->tx_queues) { 551 device_printf(iflib_get_dev(ctx), 552 "Unable to allocate TX ring memory\n"); 553 return (ENOMEM); 554 } 555 556 for (i = 0, que = sc->tx_queues; i < ntxqsets; i++, que++) { 557 struct tx_ring *txr = &que->txr; 558 559 /* In case SR-IOV is enabled, align the index properly */ 560 txr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 561 562 txr->sc = que->sc = sc; 563 564 /* Allocate report status array */ 565 txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) * 566 scctx->isc_ntxd[0], M_IXGBE, M_NOWAIT | M_ZERO); 567 if (txr->tx_rsq == NULL) { 568 error = ENOMEM; 569 goto fail; 570 } 571 for (j = 0; j < scctx->isc_ntxd[0]; j++) 572 txr->tx_rsq[j] = QIDX_INVALID; 573 /* get virtual and physical address of the hardware queues */ 574 txr->tail = IXGBE_TDT(txr->me); 575 txr->tx_base = (union ixgbe_adv_tx_desc *)vaddrs[i]; 576 txr->tx_paddr = paddrs[i]; 577 578 txr->bytes = 0; 579 txr->total_packets = 0; 580 581 /* Set the rate at which we sample packets */ 582 if (sc->feat_en & IXGBE_FEATURE_FDIR) 583 txr->atr_sample = atr_sample_rate; 584 585 } 586 587 device_printf(iflib_get_dev(ctx), "allocated for %d queues\n", 588 sc->num_tx_queues); 589 590 return (0); 591 592 fail: 593 ixgbe_if_queues_free(ctx); 594 595 return (error); 596 } /* ixgbe_if_tx_queues_alloc */ 597 598 /************************************************************************ 599 * ixgbe_if_rx_queues_alloc 600 ************************************************************************/ 601 static int 602 ixgbe_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 603 int nrxqs, int nrxqsets) 604 { 605 struct ixgbe_softc *sc = iflib_get_softc(ctx); 606 struct ix_rx_queue *que; 607 int i; 608 609 MPASS(sc->num_rx_queues > 0); 610 MPASS(sc->num_rx_queues == nrxqsets); 611 MPASS(nrxqs == 1); 612 613 /* Allocate queue structure memory */ 614 sc->rx_queues = 615 (struct ix_rx_queue *)malloc(sizeof(struct ix_rx_queue)*nrxqsets, 616 M_IXGBE, M_NOWAIT | M_ZERO); 617 if (!sc->rx_queues) { 618 device_printf(iflib_get_dev(ctx), 619 "Unable to allocate TX ring memory\n"); 620 return (ENOMEM); 621 } 622 623 for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) { 624 struct rx_ring *rxr = &que->rxr; 625 626 /* In case SR-IOV is enabled, align the index properly */ 627 rxr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 628 629 rxr->sc = que->sc = sc; 630 631 /* get the virtual and physical address of the hw queues */ 632 rxr->tail = IXGBE_RDT(rxr->me); 633 rxr->rx_base = (union ixgbe_adv_rx_desc *)vaddrs[i]; 634 rxr->rx_paddr = paddrs[i]; 635 rxr->bytes = 0; 636 rxr->que = que; 637 } 638 639 device_printf(iflib_get_dev(ctx), "allocated for %d rx queues\n", 640 sc->num_rx_queues); 641 642 return (0); 643 } /* ixgbe_if_rx_queues_alloc */ 644 645 /************************************************************************ 646 * ixgbe_if_queues_free 647 ************************************************************************/ 648 static void 649 ixgbe_if_queues_free(if_ctx_t ctx) 650 { 651 struct ixgbe_softc *sc = iflib_get_softc(ctx); 652 struct ix_tx_queue *tx_que = sc->tx_queues; 653 struct ix_rx_queue *rx_que = sc->rx_queues; 654 int i; 655 656 if (tx_que != NULL) { 657 for (i = 0; i < sc->num_tx_queues; i++, tx_que++) { 658 struct tx_ring *txr = &tx_que->txr; 659 if (txr->tx_rsq == NULL) 660 break; 661 662 free(txr->tx_rsq, M_IXGBE); 663 txr->tx_rsq = NULL; 664 } 665 666 free(sc->tx_queues, M_IXGBE); 667 sc->tx_queues = NULL; 668 } 669 if (rx_que != NULL) { 670 free(sc->rx_queues, M_IXGBE); 671 sc->rx_queues = NULL; 672 } 673 } /* ixgbe_if_queues_free */ 674 675 /************************************************************************ 676 * ixgbe_initialize_rss_mapping 677 ************************************************************************/ 678 static void 679 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 680 { 681 struct ixgbe_hw *hw = &sc->hw; 682 bool per_pool_rss; 683 u32 reta = 0, mrqc, rss_fields, rss_key[10]; 684 int i, index_mult, j, queue_id, reta_queues, table_size; 685 u32 rss_hash_config; 686 #ifdef PCI_IOV 687 u32 pfmrqc; 688 #endif 689 690 if (sc->feat_en & IXGBE_FEATURE_RSS) { 691 /* Fetch the configured RSS key */ 692 rss_getkey((uint8_t *)&rss_key); 693 } else { 694 /* set up random bits */ 695 arc4rand(&rss_key, sizeof(rss_key), 0); 696 } 697 698 /* Set multiplier for RETA setup and table size based on MAC */ 699 index_mult = 0x1; 700 per_pool_rss = false; 701 table_size = 128; 702 switch (sc->hw.mac.type) { 703 case ixgbe_mac_82598EB: 704 index_mult = 0x11; 705 break; 706 case ixgbe_mac_X550: 707 case ixgbe_mac_X550EM_x: 708 case ixgbe_mac_X550EM_a: 709 case ixgbe_mac_E610: 710 table_size = 512; 711 #ifdef PCI_IOV 712 if (sc->iov_mode != IXGBE_NO_VM) { 713 per_pool_rss = true; 714 table_size = 64; 715 } 716 #endif 717 break; 718 default: 719 break; 720 } 721 722 /* 723 * The global RETA is shared by the PF and VFs on 82599 and X540. 724 * X550-family devices instead use per-pool tables in multiple-RSS 725 * mode; initialize only the PF pool here because each VF owns and 726 * programs its own key and redirection table. 727 * On the shared tables, program all four queue indices while SR-IOV 728 * is active so a VF can use its full queue grant even when the PF uses 729 * fewer queues. PSRTYPE.RQPL limits the subset selected in each pool. 730 */ 731 reta_queues = sc->num_rx_queues; 732 #ifdef PCI_IOV 733 if (sc->iov_mode != IXGBE_NO_VM && !per_pool_rss) 734 reta_queues = MAX(reta_queues, 4); 735 #endif 736 737 /* Set up the redirection table */ 738 for (i = 0, j = 0; i < table_size; i++, j++) { 739 if (j == reta_queues) 740 j = 0; 741 742 if (sc->feat_en & IXGBE_FEATURE_RSS) { 743 /* 744 * Fetch the RSS bucket id for the given indirection 745 * entry. Cap it at the number of queue indices that must 746 * be represented in the shared table. 747 */ 748 queue_id = rss_get_indirection_to_bucket(i); 749 queue_id = queue_id % reta_queues; 750 } else 751 queue_id = (j * index_mult); 752 753 /* 754 * The low 8 bits are for hash value (n+0); 755 * The next 8 bits are for hash value (n+1), etc. 756 */ 757 reta = reta >> 8; 758 reta = reta | (((uint32_t)queue_id) << 24); 759 if ((i & 3) == 3) { 760 if (per_pool_rss) { 761 #ifdef PCI_IOV 762 IXGBE_WRITE_REG(hw, 763 IXGBE_PFVFRETA(i >> 2, sc->pool), reta); 764 #endif 765 } else if (i < 128) 766 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 767 else 768 IXGBE_WRITE_REG(hw, 769 IXGBE_ERETA((i >> 2) - 32), reta); 770 reta = 0; 771 } 772 } 773 774 /* Now fill our hash function seeds */ 775 for (i = 0; i < 10; i++) { 776 if (per_pool_rss) { 777 #ifdef PCI_IOV 778 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, sc->pool), 779 rss_key[i]); 780 #endif 781 } else 782 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 783 } 784 785 /* Perform hash on these packet types */ 786 if (sc->feat_en & IXGBE_FEATURE_RSS) 787 rss_hash_config = rss_gethashconfig(); 788 else { 789 /* 790 * Disable UDP - IP fragments aren't currently being handled 791 * and so we end up with a mix of 2-tuple and 4-tuple 792 * traffic. 793 */ 794 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 | 795 RSS_HASHTYPE_RSS_TCP_IPV4 | 796 RSS_HASHTYPE_RSS_IPV6 | 797 RSS_HASHTYPE_RSS_TCP_IPV6 | 798 RSS_HASHTYPE_RSS_IPV6_EX | 799 RSS_HASHTYPE_RSS_TCP_IPV6_EX; 800 } 801 802 mrqc = ixgbe_get_mrqc(sc->iov_mode); 803 rss_fields = 0; 804 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 805 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV4; 806 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 807 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 808 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 809 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6; 810 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 811 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 812 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 813 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 814 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 815 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 816 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 817 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 818 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 819 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 820 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 821 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 822 if (hw->mac.type == ixgbe_mac_E610) { 823 /* E610 folds IPv6 extension headers into the base selectors. */ 824 if (rss_fields & IXGBE_MRQC_RSS_FIELD_IPV6_EX) 825 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6; 826 if (rss_fields & IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP) 827 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 828 if (rss_fields & IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP) 829 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 830 rss_fields &= ~(IXGBE_MRQC_RSS_FIELD_IPV6_EX | 831 IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP | 832 IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP); 833 } 834 835 if (per_pool_rss) { 836 #ifdef PCI_IOV 837 mrqc |= IXGBE_MRQC_MULTIPLE_RSS; 838 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 839 840 pfmrqc = IXGBE_MRQC_RSSEN | rss_fields; 841 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(sc->pool), pfmrqc); 842 #endif 843 } else { 844 mrqc |= rss_fields; 845 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 846 } 847 } /* ixgbe_initialize_rss_mapping */ 848 849 /************************************************************************ 850 * ixgbe_initialize_receive_units - Setup receive registers and features. 851 ************************************************************************/ 852 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 853 854 static void 855 ixgbe_initialize_receive_units(if_ctx_t ctx) 856 { 857 struct ixgbe_softc *sc = iflib_get_softc(ctx); 858 if_softc_ctx_t scctx = sc->shared; 859 struct ixgbe_hw *hw = &sc->hw; 860 if_t ifp = iflib_get_ifp(ctx); 861 struct ix_rx_queue *que; 862 int i, j; 863 u32 bufsz, fctrl, srrctl, rxcsum; 864 u32 hlreg; 865 866 /* 867 * Make sure receives are disabled while 868 * setting up the descriptor ring 869 */ 870 ixgbe_disable_rx(hw); 871 872 /* Enable broadcasts */ 873 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 874 fctrl |= IXGBE_FCTRL_BAM; 875 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 876 fctrl |= IXGBE_FCTRL_DPF; 877 fctrl |= IXGBE_FCTRL_PMCF; 878 } 879 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 880 881 /* Set for Jumbo Frames? */ 882 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 883 if (if_getmtu(ifp) > ETHERMTU) 884 hlreg |= IXGBE_HLREG0_JUMBOEN; 885 else 886 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 887 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 888 889 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 890 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 891 892 /* Setup the Base and Length of the Rx Descriptor Ring */ 893 for (i = 0, que = sc->rx_queues; i < sc->num_rx_queues; i++, que++) { 894 struct rx_ring *rxr = &que->rxr; 895 u64 rdba = rxr->rx_paddr; 896 897 j = rxr->me; 898 899 /* Setup the Base and Length of the Rx Descriptor Ring */ 900 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 901 (rdba & 0x00000000ffffffffULL)); 902 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 903 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 904 scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc)); 905 906 /* Set up the SRRCTL register */ 907 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 908 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 909 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 910 srrctl |= bufsz; 911 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 912 913 /* 914 * Set DROP_EN iff we have no flow control and >1 queue. 915 * Note that srrctl was cleared shortly before during reset, 916 * so we do not need to clear the bit, but do it just in case 917 * this code is moved elsewhere. 918 */ 919 if (sc->num_rx_queues > 1 && 920 sc->hw.fc.requested_mode == ixgbe_fc_none) { 921 srrctl |= IXGBE_SRRCTL_DROP_EN; 922 } else { 923 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 924 } 925 926 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 927 928 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 929 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 930 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 931 932 /* Set the driver rx tail address */ 933 rxr->tail = IXGBE_RDT(rxr->me); 934 } 935 936 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 937 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 938 IXGBE_PSRTYPE_UDPHDR | 939 IXGBE_PSRTYPE_IPV4HDR | 940 IXGBE_PSRTYPE_IPV6HDR; 941 942 /* 943 * In VMDq+RSS mode PSRTYPE is per pool, and RQPL controls 944 * how many receive queues RSS may select within that pool. 945 * The PF occupies the last pool rather than pool zero. 946 */ 947 #ifdef PCI_IOV 948 if (sc->iov_mode != IXGBE_NO_VM) { 949 if (sc->num_rx_queues > 3) 950 psrtype |= 2u << IXGBE_PSRTYPE_RQPL_SHIFT; 951 else if (sc->num_rx_queues > 1) 952 psrtype |= 1u << IXGBE_PSRTYPE_RQPL_SHIFT; 953 } 954 #endif 955 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(sc->pool), psrtype); 956 } 957 958 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 959 960 ixgbe_initialize_rss_mapping(sc); 961 962 if (sc->feat_en & IXGBE_FEATURE_RSS) { 963 /* RSS and RX IPP Checksum are mutually exclusive */ 964 rxcsum |= IXGBE_RXCSUM_PCSD; 965 } 966 967 if (if_getcapenable(ifp) & IFCAP_RXCSUM) 968 rxcsum |= IXGBE_RXCSUM_PCSD; 969 970 /* This is useful for calculating UDP/IP fragment checksums */ 971 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 972 rxcsum |= IXGBE_RXCSUM_IPPCSE; 973 974 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 975 976 } /* ixgbe_initialize_receive_units */ 977 978 /************************************************************************ 979 * ixgbe_initialize_transmit_units - Enable transmit units. 980 ************************************************************************/ 981 static void 982 ixgbe_initialize_transmit_units(if_ctx_t ctx) 983 { 984 struct ixgbe_softc *sc = iflib_get_softc(ctx); 985 struct ixgbe_hw *hw = &sc->hw; 986 if_softc_ctx_t scctx = sc->shared; 987 struct ix_tx_queue *que; 988 int i; 989 990 /* Setup the Base and Length of the Tx Descriptor Ring */ 991 for (i = 0, que = sc->tx_queues; i < sc->num_tx_queues; 992 i++, que++) { 993 struct tx_ring *txr = &que->txr; 994 u64 tdba = txr->tx_paddr; 995 u32 txctrl = 0; 996 int j = txr->me; 997 998 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 999 (tdba & 0x00000000ffffffffULL)); 1000 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 1001 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 1002 scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc)); 1003 1004 /* Setup the HW Tx Head and Tail descriptor pointers */ 1005 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 1006 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 1007 1008 /* Cache the tail address */ 1009 txr->tail = IXGBE_TDT(txr->me); 1010 1011 txr->tx_rs_cidx = txr->tx_rs_pidx; 1012 txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1; 1013 for (int k = 0; k < scctx->isc_ntxd[0]; k++) 1014 txr->tx_rsq[k] = QIDX_INVALID; 1015 1016 /* Disable Head Writeback */ 1017 /* 1018 * Note: for X550 series devices, these registers are actually 1019 * prefixed with TPH_ isntead of DCA_, but the addresses and 1020 * fields remain the same. 1021 */ 1022 switch (hw->mac.type) { 1023 case ixgbe_mac_82598EB: 1024 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 1025 break; 1026 default: 1027 txctrl = 1028 IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 1029 break; 1030 } 1031 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 1032 switch (hw->mac.type) { 1033 case ixgbe_mac_82598EB: 1034 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 1035 break; 1036 default: 1037 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), 1038 txctrl); 1039 break; 1040 } 1041 1042 } 1043 1044 if (hw->mac.type != ixgbe_mac_82598EB) { 1045 u32 dmatxctl, rttdcs; 1046 1047 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 1048 dmatxctl |= IXGBE_DMATXCTL_TE; 1049 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 1050 /* Disable arbiter to set MTQC */ 1051 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 1052 rttdcs |= IXGBE_RTTDCS_ARBDIS; 1053 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 1054 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 1055 ixgbe_get_mtqc(sc->iov_mode)); 1056 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 1057 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 1058 } 1059 1060 } /* ixgbe_initialize_transmit_units */ 1061 1062 static int 1063 ixgbe_check_fw_api_version(struct ixgbe_softc *sc) 1064 { 1065 struct ixgbe_hw *hw = &sc->hw; 1066 if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) { 1067 device_printf(sc->dev, 1068 "The driver for the device stopped because the NVM " 1069 "image is newer than expected. You must install the " 1070 "most recent version of the network driver.\n"); 1071 return (EOPNOTSUPP); 1072 } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR && 1073 hw->api_min_ver > (IXGBE_FW_API_VER_MINOR + 2)) { 1074 device_printf(sc->dev, 1075 "The driver for the device detected a newer version of " 1076 "the NVM image than expected. Please install the most " 1077 "recent version of the network driver.\n"); 1078 } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR || 1079 hw->api_min_ver < IXGBE_FW_API_VER_MINOR - 2) { 1080 device_printf(sc->dev, 1081 "The driver for the device detected an older version " 1082 "of the NVM image than expected. " 1083 "Please update the NVM image.\n"); 1084 } 1085 return (0); 1086 } 1087 1088 /************************************************************************ 1089 * ixgbe_register 1090 ************************************************************************/ 1091 static void * 1092 ixgbe_register(device_t dev) 1093 { 1094 return (&ixgbe_sctx_init); 1095 } /* ixgbe_register */ 1096 1097 /************************************************************************ 1098 * ixgbe_if_attach_pre - Device initialization routine, part 1 1099 * 1100 * Called when the driver is being loaded. 1101 * Identifies the type of hardware, initializes the hardware, 1102 * and initializes iflib structures. 1103 * 1104 * return 0 on success, positive on failure 1105 ************************************************************************/ 1106 static int 1107 ixgbe_if_attach_pre(if_ctx_t ctx) 1108 { 1109 struct ixgbe_softc *sc; 1110 device_t dev; 1111 if_softc_ctx_t scctx; 1112 struct ixgbe_hw *hw; 1113 int error = 0; 1114 u32 ctrl_ext; 1115 size_t i; 1116 1117 INIT_DEBUGOUT("ixgbe_attach: begin"); 1118 1119 /* Allocate, clear, and link in our adapter structure */ 1120 dev = iflib_get_dev(ctx); 1121 sc = iflib_get_softc(ctx); 1122 sc->hw.back = sc; 1123 sc->ctx = ctx; 1124 sc->dev = dev; 1125 scctx = sc->shared = iflib_get_softc_ctx(ctx); 1126 sc->media = iflib_get_media(ctx); 1127 hw = &sc->hw; 1128 1129 /* Determine hardware revision */ 1130 hw->vendor_id = pci_get_vendor(dev); 1131 hw->device_id = pci_get_device(dev); 1132 hw->revision_id = pci_get_revid(dev); 1133 hw->subsystem_vendor_id = pci_get_subvendor(dev); 1134 hw->subsystem_device_id = pci_get_subdevice(dev); 1135 1136 /* Do base PCI setup - map BAR0 */ 1137 if (ixgbe_allocate_pci_resources(ctx)) { 1138 device_printf(dev, "Allocation of PCI resources failed\n"); 1139 return (ENXIO); 1140 } 1141 1142 /* let hardware know driver is loaded */ 1143 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1144 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 1145 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 1146 1147 /* 1148 * Initialize the shared code 1149 */ 1150 if (ixgbe_init_shared_code(hw) != 0) { 1151 device_printf(dev, "Unable to initialize the shared code\n"); 1152 error = ENXIO; 1153 goto err_pci; 1154 } 1155 1156 if (hw->mac.type == ixgbe_mac_E610) 1157 ixgbe_init_aci(hw); 1158 1159 sc->do_debug_dump = false; 1160 1161 if (hw->mac.ops.fw_recovery_mode && 1162 hw->mac.ops.fw_recovery_mode(hw)) { 1163 device_printf(dev, 1164 "Firmware recovery mode detected. Limiting " 1165 "functionality.\nRefer to the Intel(R) Ethernet Adapters " 1166 "and Devices User Guide for details on firmware recovery " 1167 "mode."); 1168 error = ENOSYS; 1169 goto err_pci; 1170 } 1171 1172 /* 82598 Does not support SR-IOV, initialize everything else */ 1173 if (hw->mac.type >= ixgbe_mac_82599_vf) { 1174 for (i = 0; i < sc->num_vfs; i++) 1175 hw->mbx.ops[i].init_params(hw); 1176 } 1177 1178 hw->allow_unsupported_sfp = allow_unsupported_sfp; 1179 1180 if (hw->mac.type != ixgbe_mac_82598EB) 1181 hw->phy.smart_speed = ixgbe_smart_speed; 1182 1183 ixgbe_init_device_features(sc); 1184 1185 /* Verify adapter fan is still functional (if applicable) */ 1186 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 1187 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 1188 ixgbe_check_fan_failure(sc, esdp, false); 1189 } 1190 1191 /* Ensure SW/FW semaphore is free */ 1192 ixgbe_init_swfw_semaphore(hw); 1193 1194 /* Enable EEE power saving */ 1195 if (sc->feat_en & IXGBE_FEATURE_EEE) 1196 hw->mac.ops.setup_eee(hw, true); 1197 1198 /* Set an initial default flow control value */ 1199 hw->fc.requested_mode = ixgbe_flow_control; 1200 1201 hw->phy.reset_if_overtemp = true; 1202 error = ixgbe_reset_hw(hw); 1203 hw->phy.reset_if_overtemp = false; 1204 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 1205 /* 1206 * No optics in this port, set up 1207 * so the timer routine will probe 1208 * for later insertion. 1209 */ 1210 sc->sfp_probe = true; 1211 error = 0; 1212 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1213 device_printf(dev, "Unsupported SFP+ module detected!\n"); 1214 error = EIO; 1215 goto err_pci; 1216 } else if (error) { 1217 device_printf(dev, "Hardware initialization failed\n"); 1218 error = EIO; 1219 goto err_pci; 1220 } 1221 1222 /* Make sure we have a good EEPROM before we read from it */ 1223 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1224 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 1225 error = EIO; 1226 goto err_pci; 1227 } 1228 1229 error = ixgbe_start_hw(hw); 1230 switch (error) { 1231 case IXGBE_ERR_EEPROM_VERSION: 1232 device_printf(dev, 1233 "This device is a pre-production adapter/LOM. Please be" 1234 " aware there may be issues associated with your" 1235 " hardware.\nIf you are experiencing problems please" 1236 " contact your Intel or hardware representative who" 1237 " provided you with this hardware.\n"); 1238 break; 1239 case IXGBE_ERR_SFP_NOT_SUPPORTED: 1240 device_printf(dev, "Unsupported SFP+ Module\n"); 1241 error = EIO; 1242 goto err_pci; 1243 case IXGBE_ERR_SFP_NOT_PRESENT: 1244 device_printf(dev, "No SFP+ Module found\n"); 1245 /* falls thru */ 1246 default: 1247 break; 1248 } 1249 1250 /* Check the FW API version and enable FW logging support for E610 */ 1251 if (hw->mac.type == ixgbe_mac_E610) { 1252 if (ixgbe_check_fw_api_version(sc)) { 1253 error = EIO; 1254 goto err_pci; 1255 } 1256 ixgbe_fwlog_set_support_ena(hw); 1257 } 1258 1259 /* Most of the iflib initialization... */ 1260 1261 iflib_set_mac(ctx, hw->mac.addr); 1262 switch (sc->hw.mac.type) { 1263 case ixgbe_mac_X550: 1264 case ixgbe_mac_X550EM_x: 1265 case ixgbe_mac_X550EM_a: 1266 scctx->isc_rss_table_size = 512; 1267 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 64; 1268 break; 1269 default: 1270 scctx->isc_rss_table_size = 128; 1271 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 16; 1272 } 1273 1274 /* Allow legacy interrupts */ 1275 ixgbe_txrx.ift_legacy_intr = ixgbe_intr; 1276 1277 scctx->isc_txqsizes[0] = 1278 roundup2(scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc) + 1279 sizeof(u32), DBA_ALIGN), 1280 scctx->isc_rxqsizes[0] = 1281 roundup2(scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc), 1282 DBA_ALIGN); 1283 1284 /* XXX */ 1285 scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO | 1286 CSUM_IP6_TCP | CSUM_IP6_UDP | CSUM_IP6_TSO; 1287 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 1288 scctx->isc_tx_nsegments = IXGBE_82598_SCATTER; 1289 } else { 1290 scctx->isc_tx_csum_flags |= CSUM_SCTP |CSUM_IP6_SCTP; 1291 scctx->isc_tx_nsegments = IXGBE_82599_SCATTER; 1292 } 1293 1294 scctx->isc_msix_bar = pci_msix_table_bar(dev); 1295 1296 scctx->isc_tx_tso_segments_max = scctx->isc_tx_nsegments; 1297 scctx->isc_tx_tso_size_max = IXGBE_TSO_SIZE; 1298 scctx->isc_tx_tso_segsize_max = PAGE_SIZE; 1299 1300 scctx->isc_txrx = &ixgbe_txrx; 1301 1302 scctx->isc_capabilities = scctx->isc_capenable = IXGBE_CAPS; 1303 ixgbe_configure_wakeup(ctx); 1304 1305 return (0); 1306 1307 err_pci: 1308 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1309 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1310 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1311 ixgbe_free_pci_resources(ctx); 1312 1313 if (hw->mac.type == ixgbe_mac_E610) 1314 ixgbe_shutdown_aci(hw); 1315 1316 return (error); 1317 } /* ixgbe_if_attach_pre */ 1318 1319 /********************************************************************* 1320 * ixgbe_if_attach_post - Device initialization routine, part 2 1321 * 1322 * Called during driver load, but after interrupts and 1323 * resources have been allocated and configured. 1324 * Sets up some data structures not relevant to iflib. 1325 * 1326 * return 0 on success, positive on failure 1327 *********************************************************************/ 1328 static int 1329 ixgbe_if_attach_post(if_ctx_t ctx) 1330 { 1331 device_t dev; 1332 struct ixgbe_softc *sc; 1333 struct ixgbe_hw *hw; 1334 int error = 0; 1335 1336 dev = iflib_get_dev(ctx); 1337 sc = iflib_get_softc(ctx); 1338 hw = &sc->hw; 1339 ixgbe_init_iov_recovery(sc); 1340 1341 if (sc->intr_type == IFLIB_INTR_LEGACY && 1342 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) == 0) { 1343 device_printf(dev, "Device does not support legacy interrupts"); 1344 error = ENXIO; 1345 goto err; 1346 } 1347 1348 /* Allocate multicast array memory. */ 1349 sc->mta = malloc(sizeof(*sc->mta) * MAX_NUM_MULTICAST_ADDRESSES, 1350 M_IXGBE, M_NOWAIT); 1351 if (sc->mta == NULL) { 1352 device_printf(dev, 1353 "Can not allocate multicast setup array\n"); 1354 error = ENOMEM; 1355 goto err; 1356 } 1357 1358 /* hw.ix defaults init */ 1359 ixgbe_set_advertise(sc, ixgbe_advertise_speed); 1360 1361 /* Enable the optics for 82599 SFP+ fiber */ 1362 ixgbe_enable_tx_laser(hw); 1363 1364 /* Enable power to the phy. */ 1365 ixgbe_set_phy_power(hw, true); 1366 1367 ixgbe_initialize_iov(sc); 1368 1369 error = ixgbe_setup_interface(ctx); 1370 if (error) { 1371 device_printf(dev, "Interface setup failed: %d\n", error); 1372 goto err; 1373 } 1374 1375 ixgbe_if_update_admin_status(ctx); 1376 1377 /* Initialize statistics */ 1378 ixgbe_update_stats_counters(sc); 1379 ixgbe_add_hw_stats(sc); 1380 1381 /* Check PCIE slot type/speed/width */ 1382 ixgbe_get_slot_info(sc); 1383 1384 /* 1385 * Do time init and sysctl init here, but 1386 * only on the first port of a bypass sc. 1387 */ 1388 ixgbe_bypass_init(sc); 1389 1390 /* Display NVM and Option ROM versions */ 1391 ixgbe_print_fw_version(ctx); 1392 1393 /* Set an initial dmac value */ 1394 sc->dmac = 0; 1395 /* Set initial advertised speeds (if applicable) */ 1396 sc->advertise = ixgbe_get_default_advertise(sc); 1397 1398 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1399 ixgbe_define_iov_schemas(sc, &error); 1400 1401 /* Add sysctls */ 1402 ixgbe_add_device_sysctls(ctx); 1403 1404 /* Add MDIO bus if required / supported */ 1405 ixgbe_mdio_attach(sc); 1406 1407 /* Init recovery mode timer and state variable */ 1408 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1409 sc->recovery_mode = 0; 1410 1411 /* Set up the timer callout */ 1412 callout_init(&sc->fw_mode_timer, true); 1413 sc->fw_mode_timer_initialized = true; 1414 1415 /* Start the task */ 1416 callout_reset(&sc->fw_mode_timer, hz, ixgbe_fw_mode_timer, sc); 1417 } 1418 1419 return (0); 1420 err: 1421 return (error); 1422 } /* ixgbe_if_attach_post */ 1423 1424 /************************************************************************ 1425 * ixgbe_configure_wakeup 1426 * 1427 * Advertise the wake modes supported by this board and port. The NVM 1428 * APME setting selects the initial magic-packet policy. 1429 ************************************************************************/ 1430 static void 1431 ixgbe_configure_wakeup(if_ctx_t ctx) 1432 { 1433 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1434 if_softc_ctx_t scctx = iflib_get_softc_ctx(ctx); 1435 struct ixgbe_hw *hw = &sc->hw; 1436 device_t dev = iflib_get_dev(ctx); 1437 u16 dev_caps = 0; 1438 u16 subdevice_id; 1439 u16 wol_cap; 1440 bool apme, supported; 1441 1442 supported = false; 1443 subdevice_id = hw->subsystem_device_id; 1444 if (hw->mac.ops.set_lan_id != NULL) 1445 hw->mac.ops.set_lan_id(hw); 1446 1447 /* X540 and newer advertise per-port WoL support in the NVM. */ 1448 if (hw->mac.type >= ixgbe_mac_X540) { 1449 if (ixgbe_get_device_caps(hw, &dev_caps) == IXGBE_SUCCESS) { 1450 wol_cap = dev_caps & IXGBE_DEVICE_CAPS_WOL_MASK; 1451 if (wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1 || 1452 (wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0 && 1453 hw->bus.func == 0)) 1454 supported = true; 1455 } 1456 } else if (hw->mac.type == ixgbe_mac_82599EB) { 1457 /* 82599 WoL support is board and, in some cases, port specific. */ 1458 switch (hw->device_id) { 1459 case IXGBE_DEV_ID_82599_SFP: 1460 switch (subdevice_id) { 1461 case IXGBE_SUBDEV_ID_82599_560FLR: 1462 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6: 1463 case IXGBE_SUBDEV_ID_82599_SFP_WOL0: 1464 case IXGBE_SUBDEV_ID_82599_SFP_2OCP: 1465 supported = hw->bus.func == 0; 1466 break; 1467 case IXGBE_SUBDEV_ID_82599_SP_560FLR: 1468 case IXGBE_SUBDEV_ID_82599_SFP: 1469 case IXGBE_SUBDEV_ID_82599_RNDC: 1470 case IXGBE_SUBDEV_ID_82599_ECNA_DP: 1471 case IXGBE_SUBDEV_ID_82599_SFP_1OCP: 1472 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1: 1473 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2: 1474 supported = true; 1475 break; 1476 default: 1477 break; 1478 } 1479 break; 1480 case IXGBE_DEV_ID_82599EN_SFP: 1481 supported = 1482 subdevice_id == IXGBE_SUBDEV_ID_82599EN_SFP_OCP1; 1483 break; 1484 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 1485 supported = 1486 subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ; 1487 break; 1488 case IXGBE_DEV_ID_82599_KX4: 1489 supported = true; 1490 break; 1491 default: 1492 break; 1493 } 1494 } 1495 if (!pci_has_pme(dev, PCI_POWERSTATE_D3_HOT)) 1496 supported = false; 1497 apme = supported && 1498 (IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & IXGBE_GRC_APME) != 0; 1499 1500 scctx->isc_capabilities &= ~IFCAP_WOL; 1501 scctx->isc_capenable &= ~IFCAP_WOL; 1502 if (supported) { 1503 scctx->isc_capabilities |= IFCAP_WOL; 1504 if (apme) 1505 scctx->isc_capenable |= IFCAP_WOL_MAGIC; 1506 } 1507 1508 /* hw->wol_enabled describes the policy active in hardware, not support. */ 1509 hw->wol_enabled = false; 1510 sc->wol_filters = 0; 1511 } /* ixgbe_configure_wakeup */ 1512 1513 /************************************************************************ 1514 * ixgbe_setup_interface 1515 * 1516 * Setup networking device structure and register an interface. 1517 ************************************************************************/ 1518 static int 1519 ixgbe_setup_interface(if_ctx_t ctx) 1520 { 1521 if_t ifp = iflib_get_ifp(ctx); 1522 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1523 1524 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1525 1526 if_setbaudrate(ifp, IF_Gbps(10)); 1527 1528 sc->max_frame_size = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN; 1529 1530 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1531 1532 ixgbe_add_media_types(ctx); 1533 1534 /* Autoselect media by default */ 1535 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 1536 1537 return (0); 1538 } /* ixgbe_setup_interface */ 1539 1540 /************************************************************************ 1541 * ixgbe_if_get_counter 1542 ************************************************************************/ 1543 static uint64_t 1544 ixgbe_if_get_counter(if_ctx_t ctx, ift_counter cnt) 1545 { 1546 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1547 if_t ifp = iflib_get_ifp(ctx); 1548 1549 switch (cnt) { 1550 case IFCOUNTER_IPACKETS: 1551 return (sc->ipackets); 1552 case IFCOUNTER_OPACKETS: 1553 return (sc->opackets); 1554 case IFCOUNTER_IBYTES: 1555 return (sc->ibytes); 1556 case IFCOUNTER_OBYTES: 1557 return (sc->obytes); 1558 case IFCOUNTER_IMCASTS: 1559 return (sc->imcasts); 1560 case IFCOUNTER_OMCASTS: 1561 return (sc->omcasts); 1562 case IFCOUNTER_COLLISIONS: 1563 return (0); 1564 case IFCOUNTER_IQDROPS: 1565 return (sc->iqdrops); 1566 case IFCOUNTER_IERRORS: 1567 return (sc->ierrors); 1568 default: 1569 return (if_get_counter_default(ifp, cnt)); 1570 } 1571 } /* ixgbe_if_get_counter */ 1572 1573 /************************************************************************ 1574 * ixgbe_if_i2c_req 1575 ************************************************************************/ 1576 static int 1577 ixgbe_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req) 1578 { 1579 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1580 struct ixgbe_hw *hw = &sc->hw; 1581 int i; 1582 1583 if (hw->phy.ops.read_i2c_byte == NULL) 1584 return (ENXIO); 1585 for (i = 0; i < req->len; i++) 1586 hw->phy.ops.read_i2c_byte(hw, req->offset + i, 1587 req->dev_addr, &req->data[i]); 1588 return (0); 1589 } /* ixgbe_if_i2c_req */ 1590 1591 /* ixgbe_if_needs_restart - Tell iflib when the driver needs to be 1592 * reinitialized 1593 * @ctx: iflib context 1594 * @event: event code to check 1595 * 1596 * Defaults to returning false for unknown events. 1597 * 1598 * @returns true if iflib needs to reinit the interface 1599 */ 1600 static bool 1601 ixgbe_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event) 1602 { 1603 switch (event) { 1604 case IFLIB_RESTART_VLAN_CONFIG: 1605 default: 1606 return (false); 1607 } 1608 } 1609 1610 /************************************************************************ 1611 * ixgbe_if_priv_ioctl - Ioctl handler for driver 1612 * 1613 * Handler for custom driver specific ioctls 1614 * 1615 * return 0 on success, positive on failure 1616 ************************************************************************/ 1617 static int 1618 ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data) 1619 { 1620 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1621 struct ifdrv *ifd; 1622 device_t dev = sc->dev; 1623 1624 /* Make sure the command type is valid */ 1625 switch (command) { 1626 case SIOCSDRVSPEC: 1627 case SIOCGDRVSPEC: 1628 /* Accepted commands */ 1629 break; 1630 case SIOCGPRIVATE_0: 1631 /* 1632 * Although we do not support this ioctl command, it's expected 1633 * that iflib will forward it to the IFDI_PRIV_IOCTL handler. 1634 * Do not print a message in this case. 1635 */ 1636 return (ENOTSUP); 1637 default: 1638 /* 1639 * If we get a different command for this function, it's 1640 * definitely unexpected, so log a message indicating what 1641 * command we got for debugging purposes. 1642 */ 1643 device_printf(dev, 1644 "%s: unexpected ioctl command %08lx\n", 1645 __func__, command); 1646 return (EINVAL); 1647 } 1648 1649 ifd = (struct ifdrv *)data; 1650 1651 switch (ifd->ifd_cmd) { 1652 case IXGBE_NVM_ACCESS: 1653 IOCTL_DEBUGOUT("ioctl: NVM ACCESS"); 1654 return (ixgbe_nvm_access_ioctl(sc, ifd)); 1655 case IXGBE_DEBUG_DUMP: 1656 IOCTL_DEBUGOUT("ioctl: DEBUG DUMP"); 1657 return (ixgbe_debug_dump_ioctl(sc, ifd)); 1658 default: 1659 IOCTL_DEBUGOUT1( 1660 "ioctl: UNKNOWN SIOC(S|G)DRVSPEC (0x%X) command\n", 1661 (int)ifd->ifd_cmd); 1662 return (EINVAL); 1663 } 1664 1665 return (0); 1666 } 1667 1668 /************************************************************************ 1669 * ixgbe_nvm_access_ioctl 1670 * 1671 * Handles an NVM access ioctl request 1672 ************************************************************************/ 1673 static int 1674 ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1675 { 1676 struct ixgbe_nvm_access_data *data; 1677 struct ixgbe_nvm_access_cmd *cmd; 1678 struct ixgbe_hw *hw = &sc->hw; 1679 size_t ifd_len = ifd->ifd_len; 1680 size_t malloc_len; 1681 device_t dev = sc->dev; 1682 s32 status; 1683 u8 *nvm_buffer; 1684 int error = 0; 1685 1686 /* 1687 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1688 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1689 * without verifying privileges. To prevent non-privileged threads from 1690 * accessing this interface, perform a privilege check at this point. 1691 */ 1692 error = priv_check(curthread, PRIV_DRIVER); 1693 if (error) 1694 return (error); 1695 1696 if (ifd_len < sizeof(*cmd)) { 1697 device_printf(dev, 1698 "%s: ifdrv length is too small. Got %zu, " 1699 "but expected %zu\n", 1700 __func__, ifd_len, sizeof(*cmd)); 1701 return (EINVAL); 1702 } 1703 1704 if (ifd->ifd_data == NULL) { 1705 device_printf(dev, "%s: No ifd data buffer.\n", 1706 __func__); 1707 return (EINVAL); 1708 } 1709 1710 malloc_len = max(ifd_len, sizeof(*data) + sizeof(*cmd)); 1711 1712 nvm_buffer = (u8 *)malloc(malloc_len, M_IXGBE, M_ZERO | M_NOWAIT); 1713 if (!nvm_buffer) 1714 return (ENOMEM); 1715 1716 /* Copy the NVM access command and data in from user space */ 1717 error = copyin(ifd->ifd_data, nvm_buffer, ifd_len); 1718 if (error) { 1719 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1720 __func__, error); 1721 goto cleanup_free_nvm_buffer; 1722 } 1723 1724 /* 1725 * The NVM command structure is immediately followed by data which 1726 * varies in size based on the command. 1727 */ 1728 cmd = (struct ixgbe_nvm_access_cmd *)nvm_buffer; 1729 data = (struct ixgbe_nvm_access_data *) 1730 (nvm_buffer + sizeof(struct ixgbe_nvm_access_cmd)); 1731 1732 /* Handle the NVM access request */ 1733 status = ixgbe_handle_nvm_access(hw, cmd, data); 1734 if (status) { 1735 device_printf(dev, "%s: NVM access request failed, error %d\n", 1736 __func__, status); 1737 } 1738 1739 /* Copy the possibly modified contents of the handled request out */ 1740 error = copyout(nvm_buffer, ifd->ifd_data, ifd_len); 1741 if (error) { 1742 device_printf(dev, "%s: Copying response back to " 1743 "user space failed, error %d\n", 1744 __func__, error); 1745 goto cleanup_free_nvm_buffer; 1746 } 1747 1748 /* Convert private status to an error code for proper ioctl response */ 1749 switch (status) { 1750 case IXGBE_SUCCESS: 1751 error = 0; 1752 break; 1753 case IXGBE_ERR_OUT_OF_RANGE: 1754 error = ENOTTY; 1755 break; 1756 case IXGBE_ERR_PARAM: 1757 default: 1758 error = EINVAL; 1759 break; 1760 } 1761 1762 cleanup_free_nvm_buffer: 1763 free(nvm_buffer, M_IXGBE); 1764 return (error); 1765 } 1766 1767 /************************************************************************ 1768 * ixgbe_debug_dump_ioctl 1769 * 1770 * Makes debug dump of internal FW/HW data. 1771 ************************************************************************/ 1772 static int 1773 ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1774 { 1775 struct ixgbe_debug_dump_cmd *dd_cmd; 1776 struct ixgbe_hw *hw = &sc->hw; 1777 size_t ifd_len = ifd->ifd_len; 1778 device_t dev = sc->dev; 1779 s32 error = 0; 1780 1781 if (!(sc->feat_en & IXGBE_FEATURE_DBG_DUMP)) 1782 return (ENODEV); 1783 1784 /* Data returned from ACI command */ 1785 u16 ret_buf_size = 0; 1786 u16 ret_next_cluster = 0; 1787 u16 ret_next_table = 0; 1788 u32 ret_next_index = 0; 1789 1790 /* 1791 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1792 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1793 * without verifying privileges. To prevent non-privileged threads from 1794 * accessing this interface, perform a privilege check at this point. 1795 */ 1796 error = priv_check(curthread, PRIV_DRIVER); 1797 if (error) 1798 return (error); 1799 1800 if (ifd_len < sizeof(*dd_cmd)) { 1801 device_printf(dev, 1802 "%s: ifdrv length is too small. Got %zu, " 1803 "but expected %zu\n", 1804 __func__, ifd_len, sizeof(*dd_cmd)); 1805 return (EINVAL); 1806 } 1807 1808 if (ifd->ifd_data == NULL) { 1809 device_printf(dev, "%s: No ifd data buffer.\n", 1810 __func__); 1811 return (EINVAL); 1812 } 1813 1814 dd_cmd = (struct ixgbe_debug_dump_cmd *)malloc(ifd_len, M_IXGBE, 1815 M_NOWAIT | M_ZERO); 1816 if (!dd_cmd) { 1817 error = -ENOMEM; 1818 goto out; 1819 } 1820 /* copy data from userspace */ 1821 error = copyin(ifd->ifd_data, dd_cmd, ifd_len); 1822 if (error) { 1823 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1824 __func__, error); 1825 goto out; 1826 } 1827 1828 /* ACI command requires buf_size arg to be grater than 0 */ 1829 if (dd_cmd->data_size == 0) { 1830 device_printf(dev, "%s: data_size must be greater than 0\n", 1831 __func__); 1832 error = EINVAL; 1833 goto out; 1834 } 1835 1836 /* Zero the data buffer memory space */ 1837 memset(dd_cmd->data, 0, ifd_len - sizeof(*dd_cmd)); 1838 1839 error = ixgbe_aci_get_internal_data(hw, dd_cmd->cluster_id, 1840 dd_cmd->table_id, dd_cmd->offset, dd_cmd->data, dd_cmd->data_size, 1841 &ret_buf_size, &ret_next_cluster, &ret_next_table, &ret_next_index); 1842 if (error) { 1843 device_printf(dev, 1844 "%s: Failed to get internal FW/HW data, error: %d\n", 1845 __func__, error); 1846 goto out; 1847 } 1848 1849 dd_cmd->cluster_id = ret_next_cluster; 1850 dd_cmd->table_id = ret_next_table; 1851 dd_cmd->offset = ret_next_index; 1852 dd_cmd->data_size = ret_buf_size; 1853 1854 error = copyout(dd_cmd, ifd->ifd_data, ifd->ifd_len); 1855 if (error) { 1856 device_printf(dev, 1857 "%s: Failed to copy data out, error: %d\n", 1858 __func__, error); 1859 } 1860 1861 out: 1862 free(dd_cmd, M_IXGBE); 1863 1864 return (error); 1865 } 1866 1867 /************************************************************************ 1868 * ixgbe_add_media_types 1869 ************************************************************************/ 1870 static void 1871 ixgbe_add_media_types(if_ctx_t ctx) 1872 { 1873 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1874 struct ixgbe_hw *hw = &sc->hw; 1875 device_t dev = iflib_get_dev(ctx); 1876 u64 layer; 1877 1878 layer = sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 1879 1880 /* Media types with matching FreeBSD media defines */ 1881 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1882 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_T, 0, NULL); 1883 if (layer & IXGBE_PHYSICAL_LAYER_5000BASE_T) 1884 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1885 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1886 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1887 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1888 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1889 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1890 ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL); 1891 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1892 ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL); 1893 1894 if (hw->mac.type == ixgbe_mac_X550) { 1895 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1896 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1897 } 1898 1899 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1900 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) { 1901 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_TWINAX, 0, 1902 NULL); 1903 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1904 } 1905 1906 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1907 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 1908 if (hw->phy.multispeed_fiber) 1909 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_LX, 0, 1910 NULL); 1911 } 1912 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_BX) { 1913 device_printf(dev, "Media supported: 10Gbase-BX\n"); 1914 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_BX, 0, NULL); 1915 } 1916 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1917 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1918 if (hw->phy.multispeed_fiber) 1919 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, 1920 NULL); 1921 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1922 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 1923 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1924 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1925 1926 #ifdef IFM_ETH_XTYPE 1927 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1928 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 1929 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1930 ifmedia_add( sc->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 1931 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1932 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1933 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1934 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_KX, 0, NULL); 1935 #else 1936 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 1937 device_printf(dev, "Media supported: 10GbaseKR\n"); 1938 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 1939 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1940 } 1941 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 1942 device_printf(dev, "Media supported: 10GbaseKX4\n"); 1943 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 1944 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1945 } 1946 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 1947 device_printf(dev, "Media supported: 1000baseKX\n"); 1948 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 1949 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 1950 } 1951 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) { 1952 device_printf(dev, "Media supported: 2500baseKX\n"); 1953 device_printf(dev, "2500baseKX mapped to 2500baseSX\n"); 1954 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_SX, 0, NULL); 1955 } 1956 #endif 1957 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) { 1958 device_printf(dev, "Media supported: 1000baseBX\n"); 1959 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_BX, 0, NULL); 1960 } 1961 1962 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 1963 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1964 0, NULL); 1965 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1966 } 1967 1968 ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1969 } /* ixgbe_add_media_types */ 1970 1971 /************************************************************************ 1972 * ixgbe_is_sfp 1973 ************************************************************************/ 1974 static inline bool 1975 ixgbe_is_sfp(struct ixgbe_hw *hw) 1976 { 1977 switch (hw->mac.type) { 1978 case ixgbe_mac_82598EB: 1979 if (hw->phy.type == ixgbe_phy_nl) 1980 return (true); 1981 return (false); 1982 case ixgbe_mac_82599EB: 1983 switch (hw->mac.ops.get_media_type(hw)) { 1984 case ixgbe_media_type_fiber: 1985 case ixgbe_media_type_fiber_qsfp: 1986 return (true); 1987 default: 1988 return (false); 1989 } 1990 case ixgbe_mac_X550EM_x: 1991 case ixgbe_mac_X550EM_a: 1992 case ixgbe_mac_E610: 1993 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) 1994 return (true); 1995 return (false); 1996 default: 1997 return (false); 1998 } 1999 } /* ixgbe_is_sfp */ 2000 2001 /************************************************************************ 2002 * ixgbe_config_link 2003 ************************************************************************/ 2004 static void 2005 ixgbe_config_link(if_ctx_t ctx) 2006 { 2007 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2008 struct ixgbe_hw *hw = &sc->hw; 2009 u32 autoneg, err = 0; 2010 bool sfp, negotiate; 2011 2012 sfp = ixgbe_is_sfp(hw); 2013 2014 if (sfp) { 2015 /* ixgbe_if_stop() disables it on every 82599 SFP port. */ 2016 ixgbe_enable_tx_laser(hw); 2017 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MOD); 2018 iflib_admin_intr_deferred(ctx); 2019 } else { 2020 if (hw->mac.ops.check_link) 2021 err = ixgbe_check_link(hw, &sc->link_speed, 2022 &sc->link_up, false); 2023 if (err) 2024 return; 2025 autoneg = hw->phy.autoneg_advertised; 2026 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 2027 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 2028 &negotiate); 2029 if (err) 2030 return; 2031 2032 if (hw->mac.type == ixgbe_mac_X550 && 2033 hw->phy.autoneg_advertised == 0) { 2034 /* 2035 * 2.5G and 5G autonegotiation speeds on X550 2036 * are disabled by default due to reported 2037 * interoperability issues with some switches. 2038 * 2039 * The second condition checks if any operations 2040 * involving setting autonegotiation speeds have 2041 * been performed prior to this ixgbe_config_link() 2042 * call. 2043 * 2044 * If hw->phy.autoneg_advertised does not 2045 * equal 0, this means that the user might have 2046 * set autonegotiation speeds via the sysctl 2047 * before bringing the interface up. In this 2048 * case, we should not disable 2.5G and 5G 2049 * since that speeds might be selected by the 2050 * user. 2051 * 2052 * Otherwise (i.e. if hw->phy.autoneg_advertised 2053 * is set to 0), it is the first time we set 2054 * autonegotiation preferences and the default 2055 * set of speeds should exclude 2.5G and 5G. 2056 */ 2057 autoneg &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 2058 IXGBE_LINK_SPEED_5GB_FULL); 2059 } 2060 2061 if (hw->mac.type == ixgbe_mac_E610) { 2062 hw->phy.ops.init(hw); 2063 err = ixgbe_enable_lse(sc); 2064 if (err) 2065 device_printf(sc->dev, 2066 "Failed to enable Link Status Event, " 2067 "error: %d", err); 2068 } 2069 2070 if (hw->mac.ops.setup_link) 2071 err = hw->mac.ops.setup_link(hw, autoneg, 2072 sc->link_up); 2073 } 2074 } /* ixgbe_config_link */ 2075 2076 /************************************************************************ 2077 * ixgbe_update_stats_counters - Update board statistics counters. 2078 ************************************************************************/ 2079 static void 2080 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 2081 { 2082 struct ixgbe_hw *hw = &sc->hw; 2083 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2084 u32 missed_rx = 0, mpc, bprc, lxon, lxoff; 2085 u32 lxoffrxc; 2086 u64 total_missed_rx = 0, total; 2087 2088 stats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 2089 stats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 2090 stats->errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 2091 stats->mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 2092 for (int i = 0; i < nitems(stats->mpc); i++) { 2093 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 2094 missed_rx += mpc; 2095 stats->mpc[i] += mpc; 2096 total_missed_rx += stats->mpc[i]; 2097 } 2098 stats->mpctotal = total_missed_rx; 2099 2100 for (int i = 0; i < 16; i++) { 2101 stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 2102 stats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 2103 stats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 2104 } 2105 stats->mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 2106 stats->mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 2107 stats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 2108 2109 /* Hardware workaround, gprc counts missed packets */ 2110 stats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 2111 stats->gprc -= missed_rx; 2112 2113 if (hw->mac.type != ixgbe_mac_82598EB) { 2114 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 2115 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 2116 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 2117 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 2118 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 2119 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 2120 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 2121 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 2122 stats->lxoffrxc += lxoffrxc; 2123 } else { 2124 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 2125 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 2126 stats->lxoffrxc += lxoffrxc; 2127 /* 82598 only has a counter in the high register */ 2128 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 2129 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 2130 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 2131 } 2132 2133 /* 2134 * For watchdog management we need to know if we have been paused 2135 * during the last interval, so capture that here. 2136 */ 2137 if (lxoffrxc) 2138 sc->shared->isc_pause_frames = 1; 2139 2140 /* 2141 * Workaround: mprc hardware is incorrectly counting 2142 * broadcasts, so for now we subtract those. 2143 */ 2144 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 2145 stats->bprc += bprc; 2146 stats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 2147 if (hw->mac.type == ixgbe_mac_82598EB) 2148 stats->mprc -= bprc; 2149 2150 stats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 2151 stats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 2152 stats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 2153 stats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 2154 stats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 2155 stats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 2156 2157 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 2158 stats->lxontxc += lxon; 2159 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 2160 stats->lxofftxc += lxoff; 2161 total = (u64)lxon + lxoff; 2162 2163 stats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 2164 stats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 2165 stats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 2166 stats->gptc -= total; 2167 stats->mptc -= total; 2168 stats->ptc64 -= total; 2169 stats->gotc -= total * ETHER_MIN_LEN; 2170 2171 stats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 2172 stats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 2173 stats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); 2174 stats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 2175 stats->mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 2176 stats->mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 2177 stats->mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 2178 stats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 2179 stats->tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 2180 stats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 2181 stats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 2182 stats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 2183 stats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 2184 stats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 2185 stats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 2186 stats->xec += IXGBE_READ_REG(hw, IXGBE_XEC); 2187 stats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 2188 stats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 2189 /* Only read FCOE on 82599 */ 2190 if (hw->mac.type != ixgbe_mac_82598EB) { 2191 stats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 2192 stats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 2193 stats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 2194 stats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 2195 stats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 2196 } 2197 2198 /* TLPIC and RLPIC are clear-on-read. */ 2199 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 2200 stats->tlpic += IXGBE_READ_REG(hw, IXGBE_TLPIC); 2201 stats->rlpic += IXGBE_READ_REG(hw, IXGBE_RLPIC); 2202 } 2203 2204 /* Fill out the OS statistics structure */ 2205 IXGBE_SET_IPACKETS(sc, stats->gprc); 2206 IXGBE_SET_OPACKETS(sc, stats->gptc); 2207 IXGBE_SET_IBYTES(sc, stats->gorc); 2208 IXGBE_SET_OBYTES(sc, stats->gotc); 2209 IXGBE_SET_IMCASTS(sc, stats->mprc); 2210 IXGBE_SET_OMCASTS(sc, stats->mptc); 2211 IXGBE_SET_COLLISIONS(sc, 0); 2212 IXGBE_SET_IQDROPS(sc, total_missed_rx); 2213 2214 /* 2215 * Aggregate following types of errors as RX errors: 2216 * - CRC error count, 2217 * - illegal byte error count, 2218 * - missed packets count, 2219 * - length error count, 2220 * - undersized packets count, 2221 * - fragmented packets count, 2222 * - oversized packets count, 2223 * - jabber count. 2224 */ 2225 IXGBE_SET_IERRORS(sc, stats->crcerrs + stats->illerrc + 2226 stats->mpctotal + stats->rlec + stats->ruc + stats->rfc + 2227 stats->roc + stats->rjc); 2228 } /* ixgbe_update_stats_counters */ 2229 2230 /************************************************************************ 2231 * ixgbe_add_hw_stats 2232 * 2233 * Add sysctl variables, one per statistic, to the system. 2234 ************************************************************************/ 2235 static void 2236 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 2237 { 2238 device_t dev = iflib_get_dev(sc->ctx); 2239 struct ix_rx_queue *rx_que; 2240 struct ix_tx_queue *tx_que; 2241 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 2242 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 2243 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 2244 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2245 struct sysctl_oid *stat_node, *queue_node; 2246 struct sysctl_oid_list *stat_list, *queue_list; 2247 int i; 2248 2249 #define QUEUE_NAME_LEN 32 2250 char namebuf[QUEUE_NAME_LEN]; 2251 2252 /* Driver Statistics */ 2253 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 2254 CTLFLAG_RD, &sc->dropped_pkts, "Driver dropped packets"); 2255 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 2256 CTLFLAG_RD, &sc->link_irq, "Link MSI-X IRQ Handled"); 2257 2258 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 2259 i++, tx_que++) { 2260 struct tx_ring *txr = &tx_que->txr; 2261 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2262 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2263 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2264 queue_list = SYSCTL_CHILDREN(queue_node); 2265 2266 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 2267 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2268 ixgbe_sysctl_tdh_handler, "IU", 2269 "Transmit Descriptor Head"); 2270 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 2271 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2272 ixgbe_sysctl_tdt_handler, "IU", 2273 "Transmit Descriptor Tail"); 2274 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx", 2275 CTLFLAG_RD, &txr->tso_tx, "TSO"); 2276 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 2277 CTLFLAG_RD, &txr->total_packets, 2278 "Queue Packets Transmitted"); 2279 } 2280 2281 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 2282 i++, rx_que++) { 2283 struct rx_ring *rxr = &rx_que->rxr; 2284 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2285 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2286 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2287 queue_list = SYSCTL_CHILDREN(queue_node); 2288 2289 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 2290 CTLTYPE_UINT | CTLFLAG_RW, 2291 &sc->rx_queues[i], 0, 2292 ixgbe_sysctl_interrupt_rate_handler, "IU", 2293 "Interrupt Rate"); 2294 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 2295 CTLFLAG_RD, &(sc->rx_queues[i].irqs), 2296 "irqs on this queue"); 2297 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 2298 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2299 ixgbe_sysctl_rdh_handler, "IU", 2300 "Receive Descriptor Head"); 2301 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 2302 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2303 ixgbe_sysctl_rdt_handler, "IU", 2304 "Receive Descriptor Tail"); 2305 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 2306 CTLFLAG_RD, &rxr->rx_packets, "Queue Packets Received"); 2307 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 2308 CTLFLAG_RD, &rxr->rx_bytes, "Queue Bytes Received"); 2309 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 2310 CTLFLAG_RD, &rxr->rx_copies, "Copied RX Frames"); 2311 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_discarded", 2312 CTLFLAG_RD, &rxr->rx_discarded, "Discarded RX packets"); 2313 } 2314 2315 /* MAC stats get their own sub node */ 2316 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 2317 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "MAC Statistics"); 2318 stat_list = SYSCTL_CHILDREN(stat_node); 2319 2320 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_errs", 2321 CTLFLAG_RD, &sc->ierrors, IXGBE_SYSCTL_DESC_RX_ERRS); 2322 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 2323 CTLFLAG_RD, &stats->crcerrs, "CRC Errors"); 2324 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 2325 CTLFLAG_RD, &stats->illerrc, "Illegal Byte Errors"); 2326 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 2327 CTLFLAG_RD, &stats->errbc, "Byte Errors"); 2328 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 2329 CTLFLAG_RD, &stats->mspdc, "MAC Short Packets Discarded"); 2330 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 2331 CTLFLAG_RD, &stats->mlfc, "MAC Local Faults"); 2332 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 2333 CTLFLAG_RD, &stats->mrfc, "MAC Remote Faults"); 2334 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 2335 CTLFLAG_RD, &stats->rlec, "Receive Length Errors"); 2336 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_missed_packets", 2337 CTLFLAG_RD, &stats->mpctotal, "RX Missed Packet Count"); 2338 2339 /* Flow Control stats */ 2340 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 2341 CTLFLAG_RD, &stats->lxontxc, "Link XON Transmitted"); 2342 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 2343 CTLFLAG_RD, &stats->lxonrxc, "Link XON Received"); 2344 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 2345 CTLFLAG_RD, &stats->lxofftxc, "Link XOFF Transmitted"); 2346 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 2347 CTLFLAG_RD, &stats->lxoffrxc, "Link XOFF Received"); 2348 2349 /* Packet Reception Stats */ 2350 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 2351 CTLFLAG_RD, &stats->tor, "Total Octets Received"); 2352 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 2353 CTLFLAG_RD, &stats->gorc, "Good Octets Received"); 2354 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 2355 CTLFLAG_RD, &stats->tpr, "Total Packets Received"); 2356 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 2357 CTLFLAG_RD, &stats->gprc, "Good Packets Received"); 2358 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 2359 CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); 2360 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 2361 CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); 2362 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 2363 CTLFLAG_RD, &stats->prc64, "64 byte frames received "); 2364 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 2365 CTLFLAG_RD, &stats->prc127, "65-127 byte frames received"); 2366 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 2367 CTLFLAG_RD, &stats->prc255, "128-255 byte frames received"); 2368 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 2369 CTLFLAG_RD, &stats->prc511, "256-511 byte frames received"); 2370 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 2371 CTLFLAG_RD, &stats->prc1023, "512-1023 byte frames received"); 2372 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 2373 CTLFLAG_RD, &stats->prc1522, "1023-1522 byte frames received"); 2374 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 2375 CTLFLAG_RD, &stats->ruc, "Receive Undersized"); 2376 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 2377 CTLFLAG_RD, &stats->rfc, "Fragmented Packets Received "); 2378 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 2379 CTLFLAG_RD, &stats->roc, "Oversized Packets Received"); 2380 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 2381 CTLFLAG_RD, &stats->rjc, "Received Jabber"); 2382 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 2383 CTLFLAG_RD, &stats->mngprc, "Management Packets Received"); 2384 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 2385 CTLFLAG_RD, &stats->mngpdc, "Management Packets Dropped"); 2386 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 2387 CTLFLAG_RD, &stats->xec, "Checksum Errors"); 2388 2389 /* Packet Transmission Stats */ 2390 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 2391 CTLFLAG_RD, &stats->gotc, "Good Octets Transmitted"); 2392 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 2393 CTLFLAG_RD, &stats->tpt, "Total Packets Transmitted"); 2394 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 2395 CTLFLAG_RD, &stats->gptc, "Good Packets Transmitted"); 2396 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 2397 CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); 2398 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 2399 CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); 2400 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 2401 CTLFLAG_RD, &stats->mngptc, "Management Packets Transmitted"); 2402 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 2403 CTLFLAG_RD, &stats->ptc64, "64 byte frames transmitted "); 2404 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 2405 CTLFLAG_RD, &stats->ptc127, "65-127 byte frames transmitted"); 2406 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 2407 CTLFLAG_RD, &stats->ptc255, "128-255 byte frames transmitted"); 2408 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 2409 CTLFLAG_RD, &stats->ptc511, "256-511 byte frames transmitted"); 2410 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 2411 CTLFLAG_RD, &stats->ptc1023, "512-1023 byte frames transmitted"); 2412 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 2413 CTLFLAG_RD, &stats->ptc1522, "1024-1522 byte frames transmitted"); 2414 } /* ixgbe_add_hw_stats */ 2415 2416 /************************************************************************ 2417 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2418 * 2419 * Retrieves the TDH value from the hardware 2420 ************************************************************************/ 2421 static int 2422 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 2423 { 2424 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2425 int error; 2426 unsigned int val; 2427 2428 if (!txr) 2429 return (0); 2430 2431 2432 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2433 return (EPERM); 2434 2435 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me)); 2436 error = sysctl_handle_int(oidp, &val, 0, req); 2437 if (error || !req->newptr) 2438 return error; 2439 2440 return (0); 2441 } /* ixgbe_sysctl_tdh_handler */ 2442 2443 /************************************************************************ 2444 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2445 * 2446 * Retrieves the TDT value from the hardware 2447 ************************************************************************/ 2448 static int 2449 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 2450 { 2451 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2452 int error; 2453 unsigned int val; 2454 2455 if (!txr) 2456 return (0); 2457 2458 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2459 return (EPERM); 2460 2461 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me)); 2462 error = sysctl_handle_int(oidp, &val, 0, req); 2463 if (error || !req->newptr) 2464 return error; 2465 2466 return (0); 2467 } /* ixgbe_sysctl_tdt_handler */ 2468 2469 /************************************************************************ 2470 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2471 * 2472 * Retrieves the RDH value from the hardware 2473 ************************************************************************/ 2474 static int 2475 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 2476 { 2477 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2478 int error; 2479 unsigned int val; 2480 2481 if (!rxr) 2482 return (0); 2483 2484 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2485 return (EPERM); 2486 2487 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me)); 2488 error = sysctl_handle_int(oidp, &val, 0, req); 2489 if (error || !req->newptr) 2490 return error; 2491 2492 return (0); 2493 } /* ixgbe_sysctl_rdh_handler */ 2494 2495 /************************************************************************ 2496 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2497 * 2498 * Retrieves the RDT value from the hardware 2499 ************************************************************************/ 2500 static int 2501 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 2502 { 2503 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2504 int error; 2505 unsigned int val; 2506 2507 if (!rxr) 2508 return (0); 2509 2510 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2511 return (EPERM); 2512 2513 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me)); 2514 error = sysctl_handle_int(oidp, &val, 0, req); 2515 if (error || !req->newptr) 2516 return error; 2517 2518 return (0); 2519 } /* ixgbe_sysctl_rdt_handler */ 2520 2521 /************************************************************************ 2522 * ixgbe_if_vlan_register 2523 * 2524 * Run via vlan config EVENT, it enables us to use the 2525 * HW Filter table since we can get the vlan id. This 2526 * just creates the entry in the soft version of the 2527 * VFTA, init will repopulate the real table. 2528 ************************************************************************/ 2529 static void 2530 ixgbe_if_vlan_register(if_ctx_t ctx, u16 vtag) 2531 { 2532 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2533 bool present; 2534 u16 index; 2535 u32 mask; 2536 2537 index = (vtag >> 5) & 0x7F; 2538 mask = 1U << (vtag & 0x1F); 2539 present = (sc->shadow_vfta[index] & mask) != 0; 2540 sc->shadow_vfta[index] |= mask; 2541 if (!present) 2542 ++sc->num_vlans; 2543 #ifdef PCI_IOV 2544 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 && 2545 sc->iov_vfta_valid && !sc->iov_vlan_promisc) 2546 (void)ixgbe_set_vfta(&sc->hw, vtag, sc->pool, true, true); 2547 #endif 2548 ixgbe_setup_vlan_hw_support(ctx); 2549 } /* ixgbe_if_vlan_register */ 2550 2551 /************************************************************************ 2552 * ixgbe_if_vlan_unregister 2553 * 2554 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2555 ************************************************************************/ 2556 static void 2557 ixgbe_if_vlan_unregister(if_ctx_t ctx, u16 vtag) 2558 { 2559 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2560 bool present; 2561 u16 index; 2562 u32 mask; 2563 2564 index = (vtag >> 5) & 0x7F; 2565 mask = 1U << (vtag & 0x1F); 2566 present = (sc->shadow_vfta[index] & mask) != 0; 2567 sc->shadow_vfta[index] &= ~mask; 2568 if (present) 2569 --sc->num_vlans; 2570 #ifdef PCI_IOV 2571 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 && 2572 sc->iov_vfta_valid && !sc->iov_vlan_promisc) 2573 (void)ixgbe_set_vfta(&sc->hw, vtag, sc->pool, false, true); 2574 #endif 2575 ixgbe_setup_vlan_hw_support(ctx); 2576 } /* ixgbe_if_vlan_unregister */ 2577 2578 #ifdef PCI_IOV 2579 static bool 2580 ixgbe_iov_pf_owns_vlan(const struct ixgbe_softc *sc, u16 vlan) 2581 { 2582 2583 return ((sc->shadow_vfta[vlan >> 5] & 2584 (1U << (vlan & 0x1f))) != 0); 2585 } 2586 2587 /* 2588 * start_hw clears both VFTA and VLVF. Reconstruct the shared tables from 2589 * PF and VF desired state after every reset or filtering-mode transition. 2590 * Allocate VF entries first so PF-only VLANs cannot exhaust VLVF. 2591 */ 2592 static void 2593 ixgbe_iov_vlan_rebuild(struct ixgbe_softc *sc, bool promisc) 2594 { 2595 struct ixgbe_hw *hw; 2596 struct ixgbe_vf *vf; 2597 u32 vfta[IXGBE_VFTA_SIZE]; 2598 u32 bits, vlan, vlvf; 2599 int bit, failures, i, word; 2600 2601 hw = &sc->hw; 2602 bcopy(sc->shadow_vfta, vfta, sizeof(vfta)); 2603 (void)ixgbe_clear_vfta(hw); 2604 failures = 0; 2605 for (i = 0; i < sc->num_vfs; i++) { 2606 vf = &sc->vfs[i]; 2607 if ((vf->flags & IXGBE_VF_ACTIVE) == 0) 2608 continue; 2609 if (vf->default_vlan == 0 && 2610 ixgbe_set_vfta(hw, 0, vf->pool, true, false) != 2611 IXGBE_SUCCESS) 2612 failures++; 2613 for (word = 0; word < IXGBE_VFTA_SIZE; word++) { 2614 bits = vf->vlans[word]; 2615 while (bits != 0) { 2616 bit = ffs(bits) - 1; 2617 vlan = word * 32 + bit; 2618 if (ixgbe_set_vfta(hw, vlan, vf->pool, true, 2619 false) == IXGBE_SUCCESS) 2620 vfta[word] |= 1U << bit; 2621 else 2622 failures++; 2623 bits &= ~(1U << bit); 2624 } 2625 } 2626 } 2627 if (ixgbe_set_vfta(hw, 0, sc->pool, true, false) != IXGBE_SUCCESS) 2628 failures++; 2629 2630 /* Add the PF to shared entries, or every entry in promiscuous mode. */ 2631 for (i = 1; i < IXGBE_VLVF_ENTRIES; i++) { 2632 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); 2633 if ((vlvf & IXGBE_VLVF_VIEN) == 0) 2634 continue; 2635 vlan = vlvf & IXGBE_VLVF_VLANID_MASK; 2636 if (promisc || ixgbe_iov_pf_owns_vlan(sc, vlan)) 2637 (void)ixgbe_set_vfta(hw, vlan, sc->pool, true, true); 2638 vfta[vlan >> 5] |= 1U << (vlan & 0x1f); 2639 } 2640 if (promisc) 2641 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2642 vfta[i] = UINT32_MAX; 2643 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2644 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), vfta[i]); 2645 if (failures != 0) 2646 device_printf(sc->dev, 2647 "VLAN pool restore failed for %d memberships\n", failures); 2648 } 2649 2650 static void 2651 ixgbe_iov_vlan_sync(struct ixgbe_softc *sc, bool promisc) 2652 { 2653 2654 if (sc->iov_vfta_valid && sc->iov_vlan_promisc == promisc) 2655 return; 2656 ixgbe_iov_vlan_rebuild(sc, promisc); 2657 sc->iov_vlan_promisc = promisc; 2658 sc->iov_vfta_valid = true; 2659 } 2660 #endif 2661 2662 /************************************************************************ 2663 * ixgbe_setup_vlan_hw_support 2664 ************************************************************************/ 2665 void 2666 ixgbe_setup_vlan_hw_support(if_ctx_t ctx) 2667 { 2668 if_t ifp = iflib_get_ifp(ctx); 2669 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2670 struct ixgbe_hw *hw = &sc->hw; 2671 struct rx_ring *rxr; 2672 bool strip; 2673 int i; 2674 u32 ctrl; 2675 2676 strip = sc->num_vlans != 0 && 2677 (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) != 0; 2678 for (i = 0; i < sc->num_rx_queues; i++) { 2679 rxr = &sc->rx_queues[i].rxr; 2680 /* On 82599 and newer VLAN stripping is per receive queue. */ 2681 if (hw->mac.type != ixgbe_mac_82598EB) { 2682 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2683 if (strip) 2684 ctrl |= IXGBE_RXDCTL_VME; 2685 else 2686 ctrl &= ~IXGBE_RXDCTL_VME; 2687 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2688 } 2689 rxr->vtag_strip = strip; 2690 } 2691 2692 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2693 if (hw->mac.type == ixgbe_mac_82598EB) { 2694 if (strip) 2695 ctrl |= IXGBE_VLNCTRL_VME; 2696 else 2697 ctrl &= ~IXGBE_VLNCTRL_VME; 2698 } 2699 2700 /* Always admit priority-tagged frames. */ 2701 sc->shadow_vfta[0] |= 1U; 2702 2703 #ifdef PCI_IOV 2704 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0) { 2705 /* 2706 * VFE must remain enabled to enforce per-pool VLAN ownership. 2707 */ 2708 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 2709 ctrl |= IXGBE_VLNCTRL_VFE; 2710 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2711 ixgbe_iov_vlan_sync(sc, 2712 (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0); 2713 return; 2714 } 2715 #endif 2716 2717 if (!strip || 2718 (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0) { 2719 ctrl |= IXGBE_VLNCTRL_CFIEN; 2720 ctrl &= ~IXGBE_VLNCTRL_VFE; 2721 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2722 return; 2723 } 2724 2725 /* A soft reset clears VFTA, so restore the PF's desired bitmap. */ 2726 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2727 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2728 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 2729 ctrl |= IXGBE_VLNCTRL_VFE; 2730 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2731 } /* ixgbe_setup_vlan_hw_support */ 2732 2733 /************************************************************************ 2734 * ixgbe_get_slot_info 2735 * 2736 * Get the width and transaction speed of 2737 * the slot this adapter is plugged into. 2738 ************************************************************************/ 2739 static void 2740 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2741 { 2742 device_t dev = iflib_get_dev(sc->ctx); 2743 struct ixgbe_hw *hw = &sc->hw; 2744 int bus_info_valid = true; 2745 u32 offset; 2746 u16 link; 2747 2748 /* Some devices are behind an internal bridge */ 2749 switch (hw->device_id) { 2750 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2751 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2752 goto get_parent_info; 2753 default: 2754 break; 2755 } 2756 2757 ixgbe_get_bus_info(hw); 2758 2759 /* 2760 * Some devices don't use PCI-E, but there is no need 2761 * to display "Unknown" for bus speed and width. 2762 */ 2763 switch (hw->mac.type) { 2764 case ixgbe_mac_X550EM_x: 2765 case ixgbe_mac_X550EM_a: 2766 return; 2767 default: 2768 goto display; 2769 } 2770 2771 get_parent_info: 2772 /* 2773 * For the Quad port adapter we need to parse back 2774 * up the PCI tree to find the speed of the expansion 2775 * slot into which this adapter is plugged. A bit more work. 2776 */ 2777 dev = device_get_parent(device_get_parent(dev)); 2778 #ifdef IXGBE_DEBUG 2779 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2780 pci_get_slot(dev), pci_get_function(dev)); 2781 #endif 2782 dev = device_get_parent(device_get_parent(dev)); 2783 #ifdef IXGBE_DEBUG 2784 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2785 pci_get_slot(dev), pci_get_function(dev)); 2786 #endif 2787 /* Now get the PCI Express Capabilities offset */ 2788 if (pci_find_cap(dev, PCIY_EXPRESS, &offset)) { 2789 /* 2790 * Hmm...can't get PCI-Express capabilities. 2791 * Falling back to default method. 2792 */ 2793 bus_info_valid = false; 2794 ixgbe_get_bus_info(hw); 2795 goto display; 2796 } 2797 /* ...and read the Link Status Register */ 2798 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 2799 ixgbe_set_pci_config_data_generic(hw, link); 2800 2801 display: 2802 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2803 ((hw->bus.speed == ixgbe_bus_speed_16000) ? "16.0GT/s" : 2804 (hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2805 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2806 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2807 "Unknown"), 2808 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2809 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2810 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2811 "Unknown")); 2812 2813 if (bus_info_valid) { 2814 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2815 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2816 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2817 device_printf(dev, 2818 "PCI-Express bandwidth available for this card" 2819 " is not sufficient for optimal performance.\n"); 2820 device_printf(dev, 2821 "For optimal performance a x8 PCIE, or x4 PCIE" 2822 " Gen2 slot is required.\n"); 2823 } 2824 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2825 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2826 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2827 device_printf(dev, 2828 "PCI-Express bandwidth available for this card" 2829 " is not sufficient for optimal performance.\n"); 2830 device_printf(dev, 2831 "For optimal performance a x8 PCIE Gen3 slot is" 2832 " required.\n"); 2833 } 2834 } else 2835 device_printf(dev, 2836 "Unable to determine slot speed/width. The speed/width" 2837 " reported are that of the internal switch.\n"); 2838 2839 return; 2840 } /* ixgbe_get_slot_info */ 2841 2842 /************************************************************************ 2843 * ixgbe_if_msix_intr_assign 2844 * 2845 * Setup MSI-X Interrupt resources and handlers 2846 ************************************************************************/ 2847 static int 2848 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix) 2849 { 2850 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2851 struct ix_rx_queue *rx_que = sc->rx_queues; 2852 struct ix_tx_queue *tx_que; 2853 int error, rid, vector = 0; 2854 char buf[16]; 2855 2856 /* Admin Que is vector 0*/ 2857 rid = vector + 1; 2858 for (int i = 0; i < sc->num_rx_queues; i++, vector++, rx_que++) { 2859 rid = vector + 1; 2860 2861 snprintf(buf, sizeof(buf), "rxq%d", i); 2862 error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid, 2863 IFLIB_INTR_RXTX, ixgbe_msix_que, rx_que, rx_que->rxr.me, 2864 buf); 2865 2866 if (error) { 2867 device_printf(iflib_get_dev(ctx), 2868 "Failed to allocate que int %d err: %d", 2869 i,error); 2870 sc->num_rx_queues = i + 1; 2871 goto fail; 2872 } 2873 2874 rx_que->msix = vector; 2875 } 2876 for (int i = 0; i < sc->num_tx_queues; i++) { 2877 snprintf(buf, sizeof(buf), "txq%d", i); 2878 tx_que = &sc->tx_queues[i]; 2879 tx_que->msix = i % sc->num_rx_queues; 2880 iflib_softirq_alloc_generic(ctx, 2881 &sc->rx_queues[tx_que->msix].que_irq, 2882 IFLIB_INTR_TX, tx_que, tx_que->txr.me, buf); 2883 } 2884 rid = vector + 1; 2885 error = iflib_irq_alloc_generic(ctx, &sc->irq, rid, 2886 IFLIB_INTR_ADMIN, ixgbe_msix_link, sc, 0, "aq"); 2887 if (error) { 2888 device_printf(iflib_get_dev(ctx), 2889 "Failed to register admin handler"); 2890 return (error); 2891 } 2892 2893 sc->vector = vector; 2894 2895 return (0); 2896 fail: 2897 iflib_irq_free(ctx, &sc->irq); 2898 rx_que = sc->rx_queues; 2899 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) 2900 iflib_irq_free(ctx, &rx_que->que_irq); 2901 2902 return (error); 2903 } /* ixgbe_if_msix_intr_assign */ 2904 2905 static inline void 2906 ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que) 2907 { 2908 uint32_t newitr = 0; 2909 struct rx_ring *rxr = &que->rxr; 2910 /* FIXME struct tx_ring *txr = ... ->txr; */ 2911 2912 /* 2913 * Do Adaptive Interrupt Moderation: 2914 * - Write out last calculated setting 2915 * - Calculate based on average size over 2916 * the last interval. 2917 */ 2918 if (que->eitr_setting) { 2919 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix), 2920 que->eitr_setting); 2921 } 2922 2923 que->eitr_setting = 0; 2924 /* Idle, do nothing */ 2925 if (rxr->bytes == 0) { 2926 /* FIXME && txr->bytes == 0 */ 2927 return; 2928 } 2929 2930 if ((rxr->bytes) && (rxr->packets)) 2931 newitr = rxr->bytes / rxr->packets; 2932 /* FIXME for transmit accounting 2933 * if ((txr->bytes) && (txr->packets)) 2934 * newitr = txr->bytes/txr->packets; 2935 * if ((rxr->bytes) && (rxr->packets)) 2936 * newitr = max(newitr, (rxr->bytes / rxr->packets)); 2937 */ 2938 2939 newitr += 24; /* account for hardware frame, crc */ 2940 /* set an upper boundary */ 2941 newitr = min(newitr, 3000); 2942 2943 /* Be nice to the mid range */ 2944 if ((newitr > 300) && (newitr < 1200)) { 2945 newitr = (newitr / 3); 2946 } else { 2947 newitr = (newitr / 2); 2948 } 2949 2950 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 2951 newitr |= newitr << 16; 2952 } else { 2953 newitr |= IXGBE_EITR_CNT_WDIS; 2954 } 2955 2956 /* save for next interrupt */ 2957 que->eitr_setting = newitr; 2958 2959 /* Reset state */ 2960 /* FIXME txr->bytes = 0; */ 2961 /* FIXME txr->packets = 0; */ 2962 rxr->bytes = 0; 2963 rxr->packets = 0; 2964 2965 return; 2966 } 2967 2968 /********************************************************************* 2969 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2970 **********************************************************************/ 2971 static int 2972 ixgbe_msix_que(void *arg) 2973 { 2974 struct ix_rx_queue *que = arg; 2975 struct ixgbe_softc *sc = que->sc; 2976 if_t ifp = iflib_get_ifp(que->sc->ctx); 2977 2978 /* Protect against spurious interrupts */ 2979 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) 2980 return (FILTER_HANDLED); 2981 2982 ixgbe_disable_queue(sc, que->msix); 2983 ++que->irqs; 2984 2985 /* Check for AIM */ 2986 if (sc->enable_aim) { 2987 ixgbe_perform_aim(sc, que); 2988 } 2989 2990 return (FILTER_SCHEDULE_THREAD); 2991 } /* ixgbe_msix_que */ 2992 2993 /************************************************************************ 2994 * ixgbe_media_status - Media Ioctl callback 2995 * 2996 * Called whenever the user queries the status of 2997 * the interface using ifconfig. 2998 ************************************************************************/ 2999 static void 3000 ixgbe_if_media_status(if_ctx_t ctx, struct ifmediareq * ifmr) 3001 { 3002 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3003 struct ixgbe_hw *hw = &sc->hw; 3004 int layer; 3005 3006 INIT_DEBUGOUT("ixgbe_if_media_status: begin"); 3007 3008 ifmr->ifm_status = IFM_AVALID; 3009 ifmr->ifm_active = IFM_ETHER; 3010 3011 if (!sc->link_active) 3012 return; 3013 3014 ifmr->ifm_status |= IFM_ACTIVE; 3015 layer = sc->phy_layer; 3016 3017 if (layer & IXGBE_PHYSICAL_LAYERS_BASE_T_ALL) 3018 switch (sc->link_speed) { 3019 case IXGBE_LINK_SPEED_10GB_FULL: 3020 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 3021 break; 3022 case IXGBE_LINK_SPEED_5GB_FULL: 3023 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 3024 break; 3025 case IXGBE_LINK_SPEED_2_5GB_FULL: 3026 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 3027 break; 3028 case IXGBE_LINK_SPEED_1GB_FULL: 3029 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 3030 break; 3031 case IXGBE_LINK_SPEED_100_FULL: 3032 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 3033 break; 3034 case IXGBE_LINK_SPEED_10_FULL: 3035 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 3036 break; 3037 } 3038 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 3039 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 3040 switch (sc->link_speed) { 3041 case IXGBE_LINK_SPEED_10GB_FULL: 3042 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 3043 break; 3044 case IXGBE_LINK_SPEED_1GB_FULL: 3045 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3046 break; 3047 } 3048 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 3049 switch (sc->link_speed) { 3050 case IXGBE_LINK_SPEED_10GB_FULL: 3051 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 3052 break; 3053 case IXGBE_LINK_SPEED_1GB_FULL: 3054 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 3055 break; 3056 } 3057 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_BX && 3058 sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL) 3059 ifmr->ifm_active |= IFM_10G_BX | IFM_FDX; 3060 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 3061 switch (sc->link_speed) { 3062 case IXGBE_LINK_SPEED_10GB_FULL: 3063 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 3064 break; 3065 case IXGBE_LINK_SPEED_1GB_FULL: 3066 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 3067 break; 3068 } 3069 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 3070 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 3071 switch (sc->link_speed) { 3072 case IXGBE_LINK_SPEED_10GB_FULL: 3073 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 3074 break; 3075 case IXGBE_LINK_SPEED_1GB_FULL: 3076 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 3077 break; 3078 } 3079 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 3080 switch (sc->link_speed) { 3081 case IXGBE_LINK_SPEED_10GB_FULL: 3082 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 3083 break; 3084 } 3085 /* 3086 * XXX: These need to use the proper media types once 3087 * they're added. 3088 */ 3089 #ifndef IFM_ETH_XTYPE 3090 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 3091 switch (sc->link_speed) { 3092 case IXGBE_LINK_SPEED_10GB_FULL: 3093 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 3094 break; 3095 case IXGBE_LINK_SPEED_2_5GB_FULL: 3096 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 3097 break; 3098 case IXGBE_LINK_SPEED_1GB_FULL: 3099 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 3100 break; 3101 } 3102 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3103 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3104 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3105 switch (sc->link_speed) { 3106 case IXGBE_LINK_SPEED_10GB_FULL: 3107 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 3108 break; 3109 case IXGBE_LINK_SPEED_2_5GB_FULL: 3110 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 3111 break; 3112 case IXGBE_LINK_SPEED_1GB_FULL: 3113 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 3114 break; 3115 } 3116 #else 3117 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 3118 switch (sc->link_speed) { 3119 case IXGBE_LINK_SPEED_10GB_FULL: 3120 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 3121 break; 3122 case IXGBE_LINK_SPEED_2_5GB_FULL: 3123 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3124 break; 3125 case IXGBE_LINK_SPEED_1GB_FULL: 3126 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3127 break; 3128 } 3129 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3130 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3131 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3132 switch (sc->link_speed) { 3133 case IXGBE_LINK_SPEED_10GB_FULL: 3134 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 3135 break; 3136 case IXGBE_LINK_SPEED_2_5GB_FULL: 3137 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3138 break; 3139 case IXGBE_LINK_SPEED_1GB_FULL: 3140 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3141 break; 3142 } 3143 #endif 3144 3145 /* If nothing is recognized... */ 3146 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3147 ifmr->ifm_active |= IFM_UNKNOWN; 3148 3149 /* Display current flow control setting used on link */ 3150 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3151 hw->fc.current_mode == ixgbe_fc_full) 3152 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3153 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3154 hw->fc.current_mode == ixgbe_fc_full) 3155 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3156 } /* ixgbe_media_status */ 3157 3158 /************************************************************************ 3159 * ixgbe_media_change - Media Ioctl callback 3160 * 3161 * Called when the user changes speed/duplex using 3162 * media/mediopt option with ifconfig. 3163 ************************************************************************/ 3164 static int 3165 ixgbe_if_media_change(if_ctx_t ctx) 3166 { 3167 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3168 struct ifmedia *ifm = iflib_get_media(ctx); 3169 struct ixgbe_hw *hw = &sc->hw; 3170 ixgbe_link_speed speed = 0; 3171 3172 INIT_DEBUGOUT("ixgbe_if_media_change: begin"); 3173 3174 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3175 return (EINVAL); 3176 3177 if (hw->phy.media_type == ixgbe_media_type_backplane) 3178 return (EPERM); 3179 3180 /* 3181 * We don't actually need to check against the supported 3182 * media types of the adapter; ifmedia will take care of 3183 * that for us. 3184 */ 3185 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3186 case IFM_AUTO: 3187 case IFM_10G_T: 3188 speed |= IXGBE_LINK_SPEED_100_FULL; 3189 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3190 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3191 break; 3192 case IFM_10G_BX: 3193 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3194 break; 3195 case IFM_10G_LRM: 3196 case IFM_10G_LR: 3197 #ifndef IFM_ETH_XTYPE 3198 case IFM_10G_SR: /* KR, too */ 3199 case IFM_10G_CX4: /* KX4 */ 3200 #else 3201 case IFM_10G_KR: 3202 case IFM_10G_KX4: 3203 #endif 3204 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3205 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3206 break; 3207 #ifndef IFM_ETH_XTYPE 3208 case IFM_1000_CX: /* KX */ 3209 #else 3210 case IFM_1000_KX: 3211 #endif 3212 case IFM_1000_LX: 3213 case IFM_1000_SX: 3214 case IFM_1000_BX: 3215 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3216 break; 3217 case IFM_1000_T: 3218 speed |= IXGBE_LINK_SPEED_100_FULL; 3219 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3220 break; 3221 case IFM_10G_TWINAX: 3222 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3223 break; 3224 case IFM_5000_T: 3225 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3226 break; 3227 case IFM_2500_T: 3228 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3229 break; 3230 case IFM_100_TX: 3231 speed |= IXGBE_LINK_SPEED_100_FULL; 3232 break; 3233 case IFM_10_T: 3234 speed |= IXGBE_LINK_SPEED_10_FULL; 3235 break; 3236 default: 3237 goto invalid; 3238 } 3239 3240 hw->mac.autotry_restart = true; 3241 hw->mac.ops.setup_link(hw, speed, true); 3242 sc->advertise = 3243 ((speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 3244 ((speed & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 3245 ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 3246 ((speed & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 3247 ((speed & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 3248 ((speed & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 3249 3250 return (0); 3251 3252 invalid: 3253 device_printf(iflib_get_dev(ctx), "Invalid media type!\n"); 3254 3255 return (EINVAL); 3256 } /* ixgbe_if_media_change */ 3257 3258 /************************************************************************ 3259 * ixgbe_set_promisc 3260 ************************************************************************/ 3261 static int 3262 ixgbe_if_promisc_set(if_ctx_t ctx, int flags) 3263 { 3264 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3265 if_t ifp = iflib_get_ifp(ctx); 3266 u32 rctl; 3267 int mcnt = 0; 3268 3269 rctl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 3270 rctl &= (~IXGBE_FCTRL_UPE); 3271 if (if_getflags(ifp) & IFF_ALLMULTI) 3272 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 3273 else { 3274 mcnt = min(if_llmaddr_count(ifp), 3275 MAX_NUM_MULTICAST_ADDRESSES); 3276 } 3277 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 3278 rctl &= (~IXGBE_FCTRL_MPE); 3279 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 3280 3281 if (if_getflags(ifp) & IFF_PROMISC) { 3282 rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 3283 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 3284 } else if (if_getflags(ifp) & IFF_ALLMULTI) { 3285 rctl |= IXGBE_FCTRL_MPE; 3286 rctl &= ~IXGBE_FCTRL_UPE; 3287 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 3288 } 3289 return (0); 3290 } /* ixgbe_if_promisc_set */ 3291 3292 /************************************************************************ 3293 * ixgbe_handle_ecc - Defer recovery from an ECC interrupt 3294 ************************************************************************/ 3295 static bool 3296 ixgbe_handle_ecc(struct ixgbe_softc *sc, u32 eicr) 3297 { 3298 struct ixgbe_hw *hw = &sc->hw; 3299 3300 if ((eicr & IXGBE_EICR_ECC) == 0) 3301 return (false); 3302 3303 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_ECC); 3304 if (!atomic_cmpset_int(&sc->ecc_reset_pending, 0, 1)) 3305 return (false); 3306 3307 device_printf(sc->dev, "Received ECC Err, initiating reset\n"); 3308 return (true); 3309 } 3310 3311 /************************************************************************ 3312 * ixgbe_msix_link - Link status change ISR (MSI/MSI-X) 3313 ************************************************************************/ 3314 static int 3315 ixgbe_msix_link(void *arg) 3316 { 3317 struct ixgbe_softc *sc = arg; 3318 struct ixgbe_hw *hw = &sc->hw; 3319 u32 eicr, eicr_mask; 3320 s32 retval; 3321 3322 ++sc->link_irq; 3323 3324 /* Pause other interrupts */ 3325 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 3326 3327 /* First get the cause */ 3328 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3329 /* Be sure the queue bits are not cleared */ 3330 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3331 /* Clear interrupt with write */ 3332 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3333 3334 /* Link status change */ 3335 if (eicr & IXGBE_EICR_LSC) { 3336 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 3337 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_LSC); 3338 } 3339 3340 if (eicr & IXGBE_EICR_FW_EVENT) { 3341 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FW_EVENT); 3342 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_FWEVENT); 3343 } 3344 3345 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3346 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3347 (eicr & IXGBE_EICR_FLOW_DIR)) { 3348 /* This is probably overkill :) */ 3349 if (atomic_cmpset_int(&sc->fdir_reinit, 0, 1)) { 3350 /* Disable the interrupt */ 3351 IXGBE_WRITE_REG(hw, IXGBE_EIMC, 3352 IXGBE_EICR_FLOW_DIR); 3353 atomic_set_32(&sc->task_requests, 3354 IXGBE_REQUEST_TASK_FDIR); 3355 } 3356 } 3357 if (ixgbe_handle_ecc(sc, eicr)) 3358 atomic_set_32(&sc->task_requests, 3359 IXGBE_REQUEST_TASK_RESET); 3360 3361 /* Check for over temp condition */ 3362 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3363 switch (sc->hw.mac.type) { 3364 case ixgbe_mac_X550EM_a: 3365 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3366 break; 3367 IXGBE_WRITE_REG(hw, IXGBE_EIMC, 3368 IXGBE_EICR_GPI_SDP0_X550EM_a); 3369 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3370 IXGBE_EICR_GPI_SDP0_X550EM_a); 3371 retval = hw->phy.ops.check_overtemp(hw); 3372 if (retval != IXGBE_ERR_OVERTEMP) 3373 break; 3374 device_printf(iflib_get_dev(sc->ctx), 3375 "\nCRITICAL: OVER TEMP!!" 3376 " PHY IS SHUT DOWN!!\n"); 3377 device_printf(iflib_get_dev(sc->ctx), 3378 "System shutdown required!\n"); 3379 break; 3380 default: 3381 if (!(eicr & IXGBE_EICR_TS)) 3382 break; 3383 retval = hw->phy.ops.check_overtemp(hw); 3384 if (retval != IXGBE_ERR_OVERTEMP) 3385 break; 3386 device_printf(iflib_get_dev(sc->ctx), 3387 "\nCRITICAL: OVER TEMP!!" 3388 " PHY IS SHUT DOWN!!\n"); 3389 device_printf(iflib_get_dev(sc->ctx), 3390 "System shutdown required!\n"); 3391 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3392 IXGBE_EICR_TS); 3393 break; 3394 } 3395 } 3396 3397 /* Check for VF message */ 3398 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3399 (eicr & IXGBE_EICR_MAILBOX)) { 3400 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MBX); 3401 } 3402 } 3403 3404 /* 3405 * On E610, the firmware handles PHY configuration, so 3406 * there is no need to perform any SFP-specific tasks. 3407 */ 3408 if (hw->mac.type != ixgbe_mac_E610 && ixgbe_is_sfp(hw)) { 3409 /* Pluggable optics-related interrupt */ 3410 if (hw->mac.type >= ixgbe_mac_X540) 3411 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3412 else 3413 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3414 3415 if (eicr & eicr_mask) { 3416 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 3417 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MOD); 3418 } 3419 3420 if ((hw->mac.type == ixgbe_mac_82599EB) && 3421 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3422 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3423 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3424 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MSF); 3425 } 3426 } 3427 3428 /* Check for fan failure */ 3429 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 3430 ixgbe_check_fan_failure(sc, eicr, true); 3431 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3432 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3433 } 3434 3435 /* External PHY interrupt */ 3436 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3437 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3438 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 3439 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_PHY); 3440 } 3441 3442 return (atomic_load_acq_32(&sc->task_requests) != 0) ? 3443 FILTER_SCHEDULE_THREAD : FILTER_HANDLED; 3444 } /* ixgbe_msix_link */ 3445 3446 /************************************************************************ 3447 * ixgbe_sysctl_interrupt_rate_handler 3448 ************************************************************************/ 3449 static int 3450 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 3451 { 3452 struct ix_rx_queue *que = ((struct ix_rx_queue *)oidp->oid_arg1); 3453 int error; 3454 unsigned int reg, usec, rate; 3455 3456 if (atomic_load_acq_int(&que->sc->recovery_mode)) 3457 return (EPERM); 3458 3459 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix)); 3460 usec = ((reg & 0x0FF8) >> 3); 3461 if (usec > 0) 3462 rate = 500000 / usec; 3463 else 3464 rate = 0; 3465 error = sysctl_handle_int(oidp, &rate, 0, req); 3466 if (error || !req->newptr) 3467 return error; 3468 reg &= ~0xfff; /* default, no limitation */ 3469 ixgbe_max_interrupt_rate = 0; 3470 if (rate > 0 && rate < 500000) { 3471 if (rate < 1000) 3472 rate = 1000; 3473 ixgbe_max_interrupt_rate = rate; 3474 reg |= ((4000000/rate) & 0xff8); 3475 } 3476 IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg); 3477 3478 return (0); 3479 } /* ixgbe_sysctl_interrupt_rate_handler */ 3480 3481 /************************************************************************ 3482 * ixgbe_debug_dump_print_cluster 3483 ************************************************************************/ 3484 static u8 3485 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, struct sbuf *sbuf, 3486 u8 cluster_id) 3487 { 3488 u16 data_buf_size = IXGBE_ACI_MAX_BUFFER_SIZE; 3489 device_t dev = sc->dev; 3490 struct ixgbe_hw *hw = &sc->hw; 3491 const u8 reserved_buf[8] = {}; 3492 int max_aci_calls = 1000; 3493 int error, counter = 0; 3494 u8 *data_buf; 3495 3496 /* Input parameters / loop variables */ 3497 u16 table_id = 0; 3498 u32 offset = 0; 3499 3500 /* Data returned from ACI command */ 3501 u16 ret_buf_size = 0; 3502 u16 ret_next_cluster = 0; 3503 u16 ret_next_table = 0; 3504 u32 ret_next_index = 0; 3505 3506 data_buf = (u8 *)malloc(data_buf_size, M_IXGBE, M_NOWAIT | M_ZERO); 3507 if (!data_buf) 3508 return (0); 3509 3510 DEBUGOUT2("%s: dumping cluster id (relative) %d\n", 3511 __func__, cluster_id); 3512 3513 do { 3514 DEBUGOUT3("table_id 0x%04x offset 0x%08x buf_size %d\n", 3515 table_id, offset, data_buf_size); 3516 3517 error = ixgbe_aci_get_internal_data(hw, cluster_id, table_id, 3518 offset, data_buf, data_buf_size, &ret_buf_size, 3519 &ret_next_cluster, &ret_next_table, &ret_next_index); 3520 if (error) { 3521 device_printf(dev, 3522 "%s: Failed to get internal FW/HW data, error: %d, " 3523 "last aci status: %d\n", 3524 __func__, error, hw->aci.last_status); 3525 break; 3526 } 3527 3528 DEBUGOUT3("ret_table_id 0x%04x ret_offset 0x%08x " 3529 "ret_buf_size %d\n", 3530 ret_next_table, ret_next_index, ret_buf_size); 3531 3532 /* Print cluster id */ 3533 u32 print_cluster_id = (u32)cluster_id; 3534 sbuf_bcat(sbuf, &print_cluster_id, sizeof(print_cluster_id)); 3535 /* Print table id */ 3536 u32 print_table_id = (u32)table_id; 3537 sbuf_bcat(sbuf, &print_table_id, sizeof(print_table_id)); 3538 /* Print table length */ 3539 u32 print_table_length = (u32)ret_buf_size; 3540 sbuf_bcat(sbuf, &print_table_length, 3541 sizeof(print_table_length)); 3542 /* Print current offset */ 3543 u32 print_curr_offset = offset; 3544 sbuf_bcat(sbuf, &print_curr_offset, sizeof(print_curr_offset)); 3545 /* Print reserved bytes */ 3546 sbuf_bcat(sbuf, reserved_buf, sizeof(reserved_buf)); 3547 /* Print data */ 3548 sbuf_bcat(sbuf, data_buf, ret_buf_size); 3549 3550 /* Prepare for the next loop spin */ 3551 memset(data_buf, 0, data_buf_size); 3552 3553 bool last_index = (ret_next_index == 0xffffffff); 3554 bool last_table = ((ret_next_table == 0xff || 3555 ret_next_table == 0xffff) && 3556 last_index); 3557 3558 if (last_table) { 3559 /* End of the cluster */ 3560 DEBUGOUT1("End of the cluster ID %d\n", cluster_id); 3561 break; 3562 } else if (last_index) { 3563 /* End of the table */ 3564 table_id = ret_next_table; 3565 offset = 0; 3566 } else { 3567 /* More data left in the table */ 3568 offset = ret_next_index; 3569 } 3570 } while (++counter < max_aci_calls); 3571 3572 if (counter >= max_aci_calls) 3573 device_printf(dev, "Exceeded nr of ACI calls for cluster %d\n", 3574 cluster_id); 3575 3576 free(data_buf, M_IXGBE); 3577 3578 return (++cluster_id); 3579 } /* ixgbe_print_debug_dump_cluster */ 3580 3581 /************************************************************************ 3582 * ixgbe_sysctl_debug_dump_set_clusters 3583 * 3584 * Sets the cluster to dump from FW when Debug Dump requested. 3585 ************************************************************************/ 3586 static int 3587 ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS) 3588 { 3589 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3590 u32 clusters = sc->debug_dump_cluster_mask; 3591 device_t dev = sc->dev; 3592 int error; 3593 3594 error = sysctl_handle_32(oidp, &clusters, 0, req); 3595 if ((error) || !req->newptr) 3596 return (error); 3597 3598 if (clusters & ~(IXGBE_DBG_DUMP_VALID_CLUSTERS_MASK)) { 3599 device_printf(dev, 3600 "%s: Unrecognized parameter: %u\n", 3601 __func__, clusters); 3602 sc->debug_dump_cluster_mask = 3603 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID; 3604 return (EINVAL); 3605 } 3606 3607 sc->debug_dump_cluster_mask = clusters; 3608 3609 return (0); 3610 } /* ixgbe_sysctl_debug_dump_set_clusters */ 3611 3612 /************************************************************************ 3613 * ixgbe_sysctl_dump_debug_dump 3614 ************************************************************************/ 3615 static int 3616 ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS) 3617 { 3618 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3619 device_t dev = sc->dev; 3620 struct sbuf *sbuf; 3621 int error = 0; 3622 3623 UNREFERENCED_PARAMETER(arg2); 3624 3625 if (!sc->do_debug_dump) { 3626 if (req->oldptr == NULL && req->newptr == NULL) { 3627 error = SYSCTL_OUT(req, 0, 0); 3628 return (error); 3629 } 3630 3631 char input_buf[2] = ""; 3632 error = sysctl_handle_string(oidp, input_buf, 3633 sizeof(input_buf), req); 3634 if ((error) || (req->newptr == NULL)) 3635 return (error); 3636 3637 if (input_buf[0] == '1') { 3638 if (sc->debug_dump_cluster_mask == 3639 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID) { 3640 device_printf(dev, 3641 "Debug Dump failed because an invalid " 3642 "cluster was specified.\n"); 3643 return (EINVAL); 3644 } 3645 3646 sc->do_debug_dump = true; 3647 return (0); 3648 } 3649 3650 return (EINVAL); 3651 } 3652 3653 /* Caller just wants the upper bound for size */ 3654 if (req->oldptr == NULL && req->newptr == NULL) { 3655 size_t est_output_len = IXGBE_DBG_DUMP_BASE_SIZE; 3656 if (sc->debug_dump_cluster_mask & 0x2) 3657 est_output_len += IXGBE_DBG_DUMP_BASE_SIZE; 3658 error = SYSCTL_OUT(req, 0, est_output_len); 3659 return (error); 3660 } 3661 3662 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 3663 sbuf_clear_flags(sbuf, SBUF_INCLUDENUL); 3664 3665 DEBUGOUT("FW Debug Dump running...\n"); 3666 3667 if (sc->debug_dump_cluster_mask) { 3668 for (u8 id = 0; id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX; id++) { 3669 if (sc->debug_dump_cluster_mask & BIT(id)) { 3670 DEBUGOUT1("Dumping cluster ID %u...\n", id); 3671 ixgbe_debug_dump_print_cluster(sc, sbuf, id); 3672 } 3673 } 3674 } else { 3675 u8 next_cluster_id = 0; 3676 do { 3677 DEBUGOUT1("Dumping cluster ID %u...\n", 3678 next_cluster_id); 3679 next_cluster_id = ixgbe_debug_dump_print_cluster(sc, 3680 sbuf, next_cluster_id); 3681 } while (next_cluster_id != 0 && 3682 next_cluster_id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX); 3683 } 3684 3685 sbuf_finish(sbuf); 3686 sbuf_delete(sbuf); 3687 3688 sc->do_debug_dump = false; 3689 3690 return (error); 3691 } /* ixgbe_sysctl_dump_debug_dump */ 3692 3693 /************************************************************************ 3694 * ixgbe_add_debug_dump_sysctls 3695 ************************************************************************/ 3696 static void 3697 ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc) 3698 { 3699 struct sysctl_oid_list *debug_list, *dump_list; 3700 struct sysctl_oid *dump_node; 3701 struct sysctl_ctx_list *ctx; 3702 device_t dev = sc->dev; 3703 3704 ctx = device_get_sysctl_ctx(dev); 3705 debug_list = SYSCTL_CHILDREN(sc->debug_sysctls); 3706 3707 dump_node = SYSCTL_ADD_NODE(ctx, debug_list, OID_AUTO, "dump", 3708 CTLFLAG_RD, NULL, "Internal FW/HW Dump"); 3709 dump_list = SYSCTL_CHILDREN(dump_node); 3710 3711 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "clusters", 3712 CTLTYPE_U32 | CTLFLAG_RW, sc, 0, 3713 ixgbe_sysctl_debug_dump_set_clusters, "SU", 3714 IXGBE_SYSCTL_DESC_DEBUG_DUMP_SET_CLUSTER); 3715 3716 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "dump", 3717 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, 3718 ixgbe_sysctl_dump_debug_dump, "", 3719 IXGBE_SYSCTL_DESC_DUMP_DEBUG_DUMP); 3720 } /* ixgbe_add_debug_dump_sysctls */ 3721 3722 static void 3723 ixgbe_add_debug_sysctls(struct ixgbe_softc *sc) 3724 { 3725 struct sysctl_oid_list *ctx_list; 3726 struct sysctl_ctx_list *ctx; 3727 device_t dev = sc->dev; 3728 3729 ctx = device_get_sysctl_ctx(dev); 3730 ctx_list = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3731 3732 sc->debug_sysctls = SYSCTL_ADD_NODE(ctx, ctx_list, OID_AUTO, "debug", 3733 CTLFLAG_RD, NULL, "Debug Sysctls"); 3734 3735 if (sc->feat_en & IXGBE_FEATURE_DBG_DUMP) 3736 ixgbe_add_debug_dump_sysctls(sc); 3737 3738 if (sc->feat_en & IXGBE_FEATURE_FW_LOGGING) 3739 ixgbe_add_fw_logging_tunables(sc, sc->debug_sysctls); 3740 } /* ixgbe_add_debug_sysctls */ 3741 3742 /************************************************************************ 3743 * ixgbe_add_device_sysctls 3744 ************************************************************************/ 3745 static void 3746 ixgbe_add_device_sysctls(if_ctx_t ctx) 3747 { 3748 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3749 device_t dev = iflib_get_dev(ctx); 3750 struct ixgbe_hw *hw = &sc->hw; 3751 struct sysctl_oid_list *child; 3752 struct sysctl_ctx_list *ctx_list; 3753 3754 ctx_list = device_get_sysctl_ctx(dev); 3755 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3756 3757 /* Sysctls for all devices */ 3758 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc", 3759 CTLTYPE_INT | CTLFLAG_RW, 3760 sc, 0, ixgbe_sysctl_flowcntl, "I", 3761 IXGBE_SYSCTL_DESC_SET_FC); 3762 3763 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "advertise_speed", 3764 CTLTYPE_INT | CTLFLAG_RW, 3765 sc, 0, ixgbe_sysctl_advertise, "I", 3766 IXGBE_SYSCTL_DESC_ADV_SPEED); 3767 if (hw->mac.type == ixgbe_mac_82599EB || 3768 hw->mac.type == ixgbe_mac_X540) { 3769 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3770 "iov_dma_abort_events", CTLFLAG_RD, 3771 &sc->iov_dma_abort_events, 0, 3772 "VF invalid-DMA events"); 3773 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3774 "iov_dma_abort_flr_failures", CTLFLAG_RD, 3775 &sc->iov_dma_abort_flr_failures, 0, 3776 "Failed VF reset attempts after invalid-DMA events"); 3777 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3778 "iov_dma_abort_quarantines", CTLFLAG_RD, 3779 &sc->iov_dma_abort_quarantines, 0, 3780 "VFs quarantined after repeated invalid-DMA events"); 3781 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3782 "iov_quarantined_vfs", CTLFLAG_RD, 3783 &sc->iov_quarantined_vfs, 0, 3784 "Bitmap of quarantined VF pools"); 3785 } 3786 3787 sc->enable_aim = ixgbe_enable_aim; 3788 SYSCTL_ADD_INT(ctx_list, child, OID_AUTO, "enable_aim", CTLFLAG_RW, 3789 &sc->enable_aim, 0, "Interrupt Moderation"); 3790 3791 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version", 3792 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3793 ixgbe_sysctl_print_fw_version, "A", "Prints FW/NVM Versions"); 3794 3795 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3796 "tso_tcp_flags_mask_first_segment", 3797 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3798 sc, 0, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3799 "TSO TCP flags mask for first segment"); 3800 3801 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3802 "tso_tcp_flags_mask_middle_segment", 3803 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3804 sc, 1, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3805 "TSO TCP flags mask for middle segment"); 3806 3807 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3808 "tso_tcp_flags_mask_last_segment", 3809 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3810 sc, 2, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3811 "TSO TCP flags mask for last segment"); 3812 3813 #ifdef IXGBE_DEBUG 3814 /* testing sysctls (for all devices) */ 3815 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "power_state", 3816 CTLTYPE_INT | CTLFLAG_RW, 3817 sc, 0, ixgbe_sysctl_power_state, 3818 "I", "PCI Power State"); 3819 3820 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "print_rss_config", 3821 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3822 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 3823 #endif 3824 /* for X550 series devices */ 3825 if (hw->mac.type >= ixgbe_mac_X550) 3826 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "dmac", 3827 CTLTYPE_U16 | CTLFLAG_RW, 3828 sc, 0, ixgbe_sysctl_dmac, 3829 "I", "DMA Coalesce"); 3830 3831 /* for X552/X557-AT devices */ 3832 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 3833 struct sysctl_oid *phy_node; 3834 struct sysctl_oid_list *phy_list; 3835 3836 phy_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "phy", 3837 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 3838 "External PHY sysctls"); 3839 phy_list = SYSCTL_CHILDREN(phy_node); 3840 3841 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, "temp", 3842 CTLTYPE_U16 | CTLFLAG_RD, 3843 sc, 0, ixgbe_sysctl_phy_temp, 3844 "I", "Current External PHY Temperature (Celsius)"); 3845 3846 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, 3847 "overtemp_occurred", 3848 CTLTYPE_U16 | CTLFLAG_RD, sc, 0, 3849 ixgbe_sysctl_phy_overtemp_occurred, "I", 3850 "External PHY High Temperature Event Occurred"); 3851 } 3852 3853 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3854 struct sysctl_oid *eee_node; 3855 struct sysctl_oid_list *eee_list; 3856 3857 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_state", 3858 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 3859 ixgbe_sysctl_eee_state, "I", "EEE Power Save State"); 3860 3861 eee_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "eee", 3862 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 3863 "Energy Efficient Ethernet statistics"); 3864 eee_list = SYSCTL_CHILDREN(eee_node); 3865 SYSCTL_ADD_UQUAD(ctx_list, eee_list, OID_AUTO, "tx_lpi_count", 3866 CTLFLAG_RD, &sc->stats.pf.tlpic, "TX LPI event count"); 3867 SYSCTL_ADD_UQUAD(ctx_list, eee_list, OID_AUTO, "rx_lpi_count", 3868 CTLFLAG_RD, &sc->stats.pf.rlpic, "RX LPI event count"); 3869 } 3870 3871 ixgbe_add_debug_sysctls(sc); 3872 } /* ixgbe_add_device_sysctls */ 3873 3874 /************************************************************************ 3875 * ixgbe_allocate_pci_resources 3876 ************************************************************************/ 3877 static int 3878 ixgbe_allocate_pci_resources(if_ctx_t ctx) 3879 { 3880 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3881 device_t dev = iflib_get_dev(ctx); 3882 int rid; 3883 3884 rid = PCIR_BAR(0); 3885 sc->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 3886 RF_ACTIVE); 3887 3888 if (!(sc->pci_mem)) { 3889 device_printf(dev, 3890 "Unable to allocate bus resource: memory\n"); 3891 return (ENXIO); 3892 } 3893 3894 /* Save bus_space values for READ/WRITE_REG macros */ 3895 sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->pci_mem); 3896 sc->osdep.mem_bus_space_handle = 3897 rman_get_bushandle(sc->pci_mem); 3898 /* Set hw values for shared code */ 3899 sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle; 3900 3901 return (0); 3902 } /* ixgbe_allocate_pci_resources */ 3903 3904 /************************************************************************ 3905 * ixgbe_detach - Device removal routine 3906 * 3907 * Called when the driver is being removed. 3908 * Stops the adapter and deallocates all the resources 3909 * that were allocated for driver operation. 3910 * 3911 * return 0 on success, positive on failure 3912 ************************************************************************/ 3913 static int 3914 ixgbe_if_detach(if_ctx_t ctx) 3915 { 3916 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3917 u32 ctrl_ext; 3918 3919 INIT_DEBUGOUT("ixgbe_detach: begin"); 3920 3921 sc->iov_recovery_stop = true; 3922 ixgbe_fw_mode_timer_pause(sc); 3923 3924 ixgbe_setup_low_power_mode(ctx); 3925 3926 /* let hardware know driver is unloading */ 3927 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3928 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3929 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3930 3931 if (sc->hw.mac.type == ixgbe_mac_E610) { 3932 ixgbe_disable_lse(sc); 3933 ixgbe_shutdown_aci(&sc->hw); 3934 } 3935 3936 ixgbe_free_pci_resources(ctx); 3937 3938 free(sc->mta, M_IXGBE); 3939 3940 return (0); 3941 } /* ixgbe_if_detach */ 3942 3943 static void 3944 ixgbe_prepare_wakeup(if_ctx_t ctx, bool arm_wake) 3945 { 3946 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3947 struct ixgbe_hw *hw = &sc->hw; 3948 if_t ifp = iflib_get_ifp(ctx); 3949 int enabled; 3950 u32 wufc; 3951 3952 enabled = arm_wake ? 3953 if_getcapenable(ifp) & if_getcapabilities(ifp) & IFCAP_WOL : 0; 3954 wufc = 0; 3955 if ((enabled & IFCAP_WOL_MAGIC) != 0) 3956 wufc |= IXGBE_WUFC_MAG; 3957 if ((enabled & IFCAP_WOL_UCAST) != 0) 3958 wufc |= IXGBE_WUFC_EX; 3959 if ((enabled & IFCAP_WOL_MCAST) != 0) 3960 wufc |= IXGBE_WUFC_MC; 3961 sc->wol_filters = wufc; 3962 hw->wol_enabled = wufc != 0; 3963 3964 /* X550EM 10GBASE-T requires PHY reset suppression during the stop. */ 3965 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3966 hw->phy.ops.enter_lplu != NULL) 3967 hw->phy.reset_disable = true; 3968 } 3969 3970 static u_int 3971 ixgbe_wakeup_mta_apply(void *arg, struct sockaddr_dl *sdl, u_int idx __unused) 3972 { 3973 struct ixgbe_hw *hw = arg; 3974 3975 ixgbe_set_mta(hw, LLADDR(sdl)); 3976 return (1); 3977 } 3978 3979 /* Restore multicast hashes needed by directed and multicast-magic wake. */ 3980 static void 3981 ixgbe_configure_wakeup_mta(if_ctx_t ctx) 3982 { 3983 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3984 struct ixgbe_hw *hw = &sc->hw; 3985 u_int i, mcnt; 3986 3987 bzero(hw->mac.mta_shadow, sizeof(hw->mac.mta_shadow)); 3988 hw->addr_ctrl.mta_in_use = 0; 3989 mcnt = if_foreach_llmaddr(iflib_get_ifp(ctx), 3990 ixgbe_wakeup_mta_apply, hw); 3991 hw->addr_ctrl.num_mc_addrs = mcnt; 3992 for (i = 0; i < hw->mac.mcft_size; i++) 3993 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_MTA(0), i, 3994 hw->mac.mta_shadow[i]); 3995 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, 3996 (hw->addr_ctrl.mta_in_use != 0 ? IXGBE_MCSTCTRL_MFE : 0) | 3997 hw->mac.mc_filter_type); 3998 } 3999 4000 /************************************************************************ 4001 * ixgbe_if_power_prepare - Establish policy required before a terminal stop 4002 * 4003 * Snapshot the requested wake filters before iflib stops the interface. 4004 * X550EM 10GBASE-T must also suppress its PHY reset during that stop. 4005 ************************************************************************/ 4006 static int 4007 ixgbe_if_power_prepare(if_ctx_t ctx, enum iflib_power_event event) 4008 { 4009 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4010 4011 ixgbe_fw_mode_timer_pause(sc); 4012 ixgbe_prepare_wakeup(ctx, event != IFLIB_POWER_DETACH); 4013 return (0); 4014 } 4015 4016 /************************************************************************ 4017 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 4018 * 4019 * Prepare the adapter/port for LPLU and/or WoL after a terminal stop 4020 ************************************************************************/ 4021 static int 4022 ixgbe_setup_low_power_mode(if_ctx_t ctx) 4023 { 4024 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4025 struct ixgbe_hw *hw = &sc->hw; 4026 device_t dev = iflib_get_dev(ctx); 4027 u32 fctrl, grc, wufc; 4028 s32 error = 0; 4029 4030 wufc = sc->wol_filters; 4031 4032 /* Limit power management flow to X550EM baseT */ 4033 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 4034 hw->phy.ops.enter_lplu) { 4035 /* X550EM baseT adapters need a special LPLU flow. */ 4036 error = hw->phy.ops.enter_lplu(hw); 4037 if (error) 4038 device_printf(dev, "Error entering LPLU: %d\n", 4039 error); 4040 hw->phy.reset_disable = false; 4041 error = 0; 4042 } 4043 4044 /* Disable the 82599 link only when actually entering D3. */ 4045 if (hw->mac.type == ixgbe_mac_82599EB) 4046 ixgbe_stop_mac_link_on_d3_82599(hw); 4047 4048 /* 4049 * Make ifconfig's ACPI policy authoritative. All supported families, 4050 * including E610, implement the standard filters in WUFC; leaving the 4051 * NVM-selected APM path enabled would permit an unrequested magic wake. 4052 */ 4053 if (hw->mac.type != ixgbe_mac_82598EB) { 4054 grc = IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)); 4055 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 4056 grc & ~IXGBE_GRC_APME); 4057 } 4058 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4059 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 4060 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4061 pci_clear_pme(dev); 4062 if (wufc != 0) { 4063 bcopy(if_getlladdr(iflib_get_ifp(ctx)), hw->mac.addr, 4064 IXGBE_ETH_LENGTH_OF_ADDRESS); 4065 error = ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 4066 IXGBE_RAH_AV); 4067 if (error != IXGBE_SUCCESS) { 4068 device_printf(dev, 4069 "Could not restore unicast wake address: %d\n", error); 4070 sc->wol_filters = 0; 4071 hw->wol_enabled = false; 4072 goto no_wake; 4073 } 4074 4075 /* 82599 SFP+ ports need the laser for an optical wake packet. */ 4076 ixgbe_enable_tx_laser(hw); 4077 4078 /* Rebuild address filtering erased by the terminal reset. */ 4079 ixgbe_configure_wakeup_mta(ctx); 4080 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 4081 fctrl |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_MPE; 4082 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 4083 4084 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc); 4085 IXGBE_WRITE_REG(hw, IXGBE_WUC, 4086 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 4087 pci_enable_pme(dev); 4088 return (0); 4089 } 4090 4091 no_wake: 4092 ixgbe_set_phy_power(hw, false); 4093 return (error == IXGBE_SUCCESS ? 0 : EIO); 4094 } /* ixgbe_setup_low_power_mode */ 4095 4096 /************************************************************************ 4097 * ixgbe_shutdown - Shutdown entry point 4098 ************************************************************************/ 4099 static int 4100 ixgbe_if_shutdown(if_ctx_t ctx) 4101 { 4102 int error = 0; 4103 4104 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 4105 4106 error = ixgbe_setup_low_power_mode(ctx); 4107 if (error != 0) 4108 device_printf(iflib_get_dev(ctx), 4109 "Wake configuration failed during shutdown: %d\n", error); 4110 return (0); 4111 } /* ixgbe_if_shutdown */ 4112 4113 /************************************************************************ 4114 * ixgbe_suspend 4115 * 4116 * From D0 to D3 4117 ************************************************************************/ 4118 static int 4119 ixgbe_if_suspend(if_ctx_t ctx) 4120 { 4121 int error = 0; 4122 4123 INIT_DEBUGOUT("ixgbe_suspend: begin"); 4124 4125 error = ixgbe_setup_low_power_mode(ctx); 4126 4127 return (error); 4128 } /* ixgbe_if_suspend */ 4129 4130 /************************************************************************ 4131 * ixgbe_resume 4132 * 4133 * From D3 to D0 4134 ************************************************************************/ 4135 static int 4136 ixgbe_if_resume(if_ctx_t ctx) 4137 { 4138 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4139 device_t dev = iflib_get_dev(ctx); 4140 struct ixgbe_hw *hw = &sc->hw; 4141 u32 wus; 4142 4143 INIT_DEBUGOUT("ixgbe_resume: begin"); 4144 4145 /* Read & clear WUS register */ 4146 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 4147 if (wus) 4148 device_printf(dev, "Woken up by (WUS): %#010x\n", 4149 wus); 4150 /* Remove every device wake source before clearing PCI PME. */ 4151 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4152 if (hw->mac.type != ixgbe_mac_82598EB) 4153 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 4154 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & 4155 ~IXGBE_GRC_APME); 4156 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 4157 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4158 pci_clear_pme(dev); 4159 hw->wol_enabled = false; 4160 sc->wol_filters = 0; 4161 ixgbe_fw_mode_timer_resume(sc); 4162 4163 return (0); 4164 } /* ixgbe_if_resume */ 4165 4166 /************************************************************************ 4167 * ixgbe_if_mtu_set - Ioctl mtu entry point 4168 * 4169 * Return 0 on success, EINVAL on failure 4170 ************************************************************************/ 4171 static int 4172 ixgbe_if_mtu_set(if_ctx_t ctx, uint32_t mtu) 4173 { 4174 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4175 int error = 0; 4176 4177 IOCTL_DEBUGOUT("ioctl: SIOCIFMTU (Set Interface MTU)"); 4178 4179 if (mtu > IXGBE_MAX_MTU) { 4180 error = EINVAL; 4181 } else { 4182 sc->max_frame_size = mtu + IXGBE_MTU_HDR; 4183 } 4184 4185 return error; 4186 } /* ixgbe_if_mtu_set */ 4187 4188 /************************************************************************ 4189 * ixgbe_if_crcstrip_set 4190 ************************************************************************/ 4191 static void 4192 ixgbe_if_crcstrip_set(if_ctx_t ctx, int onoff, int crcstrip) 4193 { 4194 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4195 struct ixgbe_hw *hw = &sc->hw; 4196 /* crc stripping is set in two places: 4197 * IXGBE_HLREG0 (modified on init_locked and hw reset) 4198 * IXGBE_RDRXCTL (set by the original driver in 4199 * ixgbe_setup_hw_rsc() called in init_locked. 4200 * We disable the setting when netmap is compiled in). 4201 * We update the values here, but also in ixgbe.c because 4202 * init_locked sometimes is called outside our control. 4203 */ 4204 uint32_t hl, rxc; 4205 4206 hl = IXGBE_READ_REG(hw, IXGBE_HLREG0); 4207 rxc = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 4208 #ifdef NETMAP 4209 if (netmap_verbose) 4210 D("%s read HLREG 0x%x rxc 0x%x", 4211 onoff ? "enter" : "exit", hl, rxc); 4212 #endif 4213 /* hw requirements ... */ 4214 rxc &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; 4215 rxc |= IXGBE_RDRXCTL_RSCACKC; 4216 if (onoff && !crcstrip) { 4217 /* keep the crc. Fast rx */ 4218 hl &= ~IXGBE_HLREG0_RXCRCSTRP; 4219 rxc &= ~IXGBE_RDRXCTL_CRCSTRIP; 4220 } else { 4221 /* reset default mode */ 4222 hl |= IXGBE_HLREG0_RXCRCSTRP; 4223 rxc |= IXGBE_RDRXCTL_CRCSTRIP; 4224 } 4225 #ifdef NETMAP 4226 if (netmap_verbose) 4227 D("%s write HLREG 0x%x rxc 0x%x", 4228 onoff ? "enter" : "exit", hl, rxc); 4229 #endif 4230 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl); 4231 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc); 4232 } /* ixgbe_if_crcstrip_set */ 4233 4234 /********************************************************************* 4235 * ixgbe_if_init - Init entry point 4236 * 4237 * Used in two ways: It is used by the stack as an init 4238 * entry point in network interface structure. It is also 4239 * used by the driver as a hw/sw initialization routine to 4240 * get to a consistent state. 4241 * 4242 * Return 0 on success, positive on failure 4243 **********************************************************************/ 4244 void 4245 ixgbe_if_init(if_ctx_t ctx) 4246 { 4247 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4248 if_t ifp = iflib_get_ifp(ctx); 4249 device_t dev = iflib_get_dev(ctx); 4250 struct ixgbe_hw *hw = &sc->hw; 4251 struct ix_rx_queue *rx_que; 4252 struct ix_tx_queue *tx_que; 4253 u32 txdctl, mhadd; 4254 u32 rxdctl, rxctrl; 4255 u32 ctrl_ext; 4256 4257 int i, j, err; 4258 4259 INIT_DEBUGOUT("ixgbe_if_init: begin"); 4260 if (atomic_load_acq_int(&sc->recovery_mode)) { 4261 iflib_init_failed(ctx); 4262 return; 4263 } 4264 /* Leave an overheated adapter stopped until an operator retries. */ 4265 if (sc->overtemp_shutdown_pending) { 4266 sc->overtemp_shutdown_pending = false; 4267 iflib_init_failed(ctx); 4268 return; 4269 } 4270 4271 /* Preserve the largest frame requested by the PF or an active VF. */ 4272 sc->max_frame_size = if_getmtu(ifp) + IXGBE_MTU_HDR; 4273 ixgbe_recalculate_max_frame(sc); 4274 4275 /* Queue indices may change with IOV mode */ 4276 ixgbe_align_all_queue_indices(sc); 4277 4278 /* reprogram the RAR[0] in case user changed it. */ 4279 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4280 4281 /* Get the latest mac address, User can use a LAA */ 4282 bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4283 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4284 hw->addr_ctrl.rar_used_count = 1; 4285 4286 ixgbe_init_hw(hw); 4287 sc->iov_mta_valid = false; 4288 sc->iov_vfta_valid = false; 4289 4290 ixgbe_initialize_iov(sc); 4291 4292 ixgbe_initialize_transmit_units(ctx); 4293 4294 /* Setup Multicast table */ 4295 ixgbe_if_multi_set(ctx); 4296 4297 /* Determine the correct mbuf pool, based on frame size */ 4298 sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); 4299 4300 /* Configure RX settings */ 4301 ixgbe_initialize_receive_units(ctx); 4302 4303 /* 4304 * Initialize the deferred administrative request mask. 4305 */ 4306 atomic_store_rel_32(&sc->task_requests, 0); 4307 4308 /* Enable SDP & MSI-X interrupts based on adapter */ 4309 ixgbe_config_gpie(sc); 4310 4311 /* Set MTU size */ 4312 if (sc->max_frame_size > ETHER_MAX_LEN) { 4313 /* aka IXGBE_MAXFRS on 82599 and newer */ 4314 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4315 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4316 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4317 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4318 } 4319 4320 /* Now enable all the queues */ 4321 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 4322 i++, tx_que++) { 4323 struct tx_ring *txr = &tx_que->txr; 4324 4325 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4326 txdctl &= ~IXGBE_TXDCTL_THRESH_MASK; 4327 txdctl |= IXGBE_TXDCTL_ENABLE | IXGBE_TXDCTL_THRESH_DEFAULT; 4328 /* 4329 * When the internal queue falls below PTHRESH (32), 4330 * start prefetching as long as there are at least 4331 * HTHRESH (1) buffers ready. Leave WTHRESH at zero 4332 * so that writeback follows iflib's sparse RS bits. 4333 * Prefetching enables tx line rate even with 1 queue. 4334 */ 4335 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4336 } 4337 4338 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 4339 i++, rx_que++) { 4340 struct rx_ring *rxr = &rx_que->rxr; 4341 4342 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4343 if (hw->mac.type == ixgbe_mac_82598EB) { 4344 /* 4345 * PTHRESH = 21 4346 * HTHRESH = 4 4347 * WTHRESH = 8 4348 */ 4349 rxdctl &= ~0x3FFFFF; 4350 rxdctl |= 0x080420; 4351 } 4352 rxdctl |= IXGBE_RXDCTL_ENABLE; 4353 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4354 for (j = 0; j < 10; j++) { 4355 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4356 IXGBE_RXDCTL_ENABLE) 4357 break; 4358 else 4359 msec_delay(1); 4360 } 4361 wmb(); 4362 } 4363 4364 /* Enable Receive engine */ 4365 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4366 if (hw->mac.type == ixgbe_mac_82598EB) 4367 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4368 rxctrl |= IXGBE_RXCTRL_RXEN; 4369 ixgbe_enable_rx_dma(hw, rxctrl); 4370 4371 /* Set up MSI/MSI-X routing */ 4372 if (ixgbe_enable_msix) { 4373 ixgbe_configure_ivars(sc); 4374 /* Set up auto-mask */ 4375 if (hw->mac.type == ixgbe_mac_82598EB) 4376 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4377 else { 4378 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4379 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4380 } 4381 } else { /* Simple settings for Legacy/MSI */ 4382 ixgbe_set_ivar(sc, 0, 0, 0); 4383 ixgbe_set_ivar(sc, 0, 0, 1); 4384 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4385 } 4386 4387 ixgbe_init_fdir(sc); 4388 4389 /* 4390 * Check on any SFP devices that 4391 * need to be kick-started 4392 */ 4393 if (hw->phy.type == ixgbe_phy_none) { 4394 err = hw->phy.ops.identify(hw); 4395 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4396 device_printf(dev, 4397 "Unsupported SFP+ module type was detected.\n"); 4398 return; 4399 } 4400 } 4401 4402 /* Set moderation on the Link interrupt */ 4403 IXGBE_WRITE_REG(hw, IXGBE_EITR(sc->vector), IXGBE_LINK_ITR); 4404 4405 /* Enable power to the phy. */ 4406 ixgbe_set_phy_power(hw, true); 4407 4408 /* Config/Enable Link */ 4409 ixgbe_config_link(ctx); 4410 4411 /* Hardware Packet Buffer & Flow Control setup */ 4412 ixgbe_config_delay_values(sc); 4413 4414 /* Initialize the FC settings */ 4415 ixgbe_start_hw(hw); 4416 4417 /* Set up VLAN support and filter */ 4418 ixgbe_setup_vlan_hw_support(ctx); 4419 4420 /* Setup DMA Coalescing */ 4421 ixgbe_config_dmac(sc); 4422 4423 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4424 ixgbe_enable_mdd(hw); 4425 ixgbe_activate_vfs(sc); 4426 } 4427 4428 /* And now turn on interrupts */ 4429 ixgbe_if_enable_intr(ctx); 4430 4431 /* Enable the use of the MBX by the VF's */ 4432 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4433 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4434 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4435 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4436 } 4437 4438 } /* ixgbe_init_locked */ 4439 4440 /************************************************************************ 4441 * ixgbe_set_ivar 4442 * 4443 * Setup the correct IVAR register for a particular MSI-X interrupt 4444 * (yes this is all very magic and confusing :) 4445 * - entry is the register array entry 4446 * - vector is the MSI-X vector for this queue 4447 * - type is RX/TX/MISC 4448 ************************************************************************/ 4449 static void 4450 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4451 { 4452 struct ixgbe_hw *hw = &sc->hw; 4453 u32 ivar, index; 4454 4455 vector |= IXGBE_IVAR_ALLOC_VAL; 4456 4457 switch (hw->mac.type) { 4458 case ixgbe_mac_82598EB: 4459 if (type == -1) 4460 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4461 else 4462 entry += (type * 64); 4463 index = (entry >> 2) & 0x1F; 4464 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4465 ivar &= ~(0xFF << (8 * (entry & 0x3))); 4466 ivar |= (vector << (8 * (entry & 0x3))); 4467 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4468 break; 4469 case ixgbe_mac_82599EB: 4470 case ixgbe_mac_X540: 4471 case ixgbe_mac_X550: 4472 case ixgbe_mac_X550EM_x: 4473 case ixgbe_mac_X550EM_a: 4474 case ixgbe_mac_E610: 4475 if (type == -1) { /* MISC IVAR */ 4476 index = (entry & 1) * 8; 4477 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4478 ivar &= ~(0xFF << index); 4479 ivar |= (vector << index); 4480 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4481 } else { /* RX/TX IVARS */ 4482 index = (16 * (entry & 1)) + (8 * type); 4483 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4484 ivar &= ~(0xFF << index); 4485 ivar |= (vector << index); 4486 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4487 } 4488 default: 4489 break; 4490 } 4491 } /* ixgbe_set_ivar */ 4492 4493 /************************************************************************ 4494 * ixgbe_configure_ivars 4495 ************************************************************************/ 4496 static void 4497 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4498 { 4499 struct ix_rx_queue *rx_que = sc->rx_queues; 4500 struct ix_tx_queue *tx_que = sc->tx_queues; 4501 u32 newitr; 4502 4503 if (ixgbe_max_interrupt_rate > 0) 4504 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 4505 else { 4506 /* 4507 * Disable DMA coalescing if interrupt moderation is 4508 * disabled. 4509 */ 4510 sc->dmac = 0; 4511 newitr = 0; 4512 } 4513 4514 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) { 4515 struct rx_ring *rxr = &rx_que->rxr; 4516 4517 /* First the RX queue entry */ 4518 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0); 4519 4520 /* Set an Initial EITR value */ 4521 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr); 4522 } 4523 for (int i = 0; i < sc->num_tx_queues; i++, tx_que++) { 4524 struct tx_ring *txr = &tx_que->txr; 4525 4526 /* ... and the TX */ 4527 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1); 4528 } 4529 /* For the Link interrupt */ 4530 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4531 } /* ixgbe_configure_ivars */ 4532 4533 /************************************************************************ 4534 * ixgbe_config_gpie 4535 ************************************************************************/ 4536 static void 4537 ixgbe_config_gpie(struct ixgbe_softc *sc) 4538 { 4539 struct ixgbe_hw *hw = &sc->hw; 4540 u32 gpie; 4541 4542 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4543 4544 if (sc->intr_type == IFLIB_INTR_MSIX) { 4545 /* Enable Enhanced MSI-X mode */ 4546 gpie |= IXGBE_GPIE_MSIX_MODE | 4547 IXGBE_GPIE_EIAME | 4548 IXGBE_GPIE_PBA_SUPPORT | 4549 IXGBE_GPIE_OCD; 4550 } 4551 4552 /* Fan Failure Interrupt */ 4553 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4554 gpie |= IXGBE_SDP1_GPIEN; 4555 4556 /* Thermal Sensor Interrupt */ 4557 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4558 gpie |= IXGBE_SDP0_GPIEN_X540; 4559 4560 /* Link detection */ 4561 switch (hw->mac.type) { 4562 case ixgbe_mac_82599EB: 4563 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4564 break; 4565 case ixgbe_mac_X550EM_x: 4566 case ixgbe_mac_X550EM_a: 4567 gpie |= IXGBE_SDP0_GPIEN_X540; 4568 break; 4569 default: 4570 break; 4571 } 4572 4573 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4574 4575 } /* ixgbe_config_gpie */ 4576 4577 /************************************************************************ 4578 * ixgbe_config_delay_values 4579 * 4580 * Requires sc->max_frame_size to be set. 4581 ************************************************************************/ 4582 static void 4583 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4584 { 4585 struct ixgbe_hw *hw = &sc->hw; 4586 u32 rxpb, frame, size, tmp; 4587 4588 frame = sc->max_frame_size; 4589 4590 /* Calculate High Water */ 4591 switch (hw->mac.type) { 4592 case ixgbe_mac_X540: 4593 case ixgbe_mac_X550: 4594 case ixgbe_mac_X550EM_x: 4595 case ixgbe_mac_X550EM_a: 4596 tmp = IXGBE_DV_X540(frame, frame); 4597 break; 4598 default: 4599 tmp = IXGBE_DV(frame, frame); 4600 break; 4601 } 4602 size = IXGBE_BT2KB(tmp); 4603 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4604 hw->fc.high_water[0] = rxpb - size; 4605 4606 /* Now calculate Low Water */ 4607 switch (hw->mac.type) { 4608 case ixgbe_mac_X540: 4609 case ixgbe_mac_X550: 4610 case ixgbe_mac_X550EM_x: 4611 case ixgbe_mac_X550EM_a: 4612 tmp = IXGBE_LOW_DV_X540(frame); 4613 break; 4614 default: 4615 tmp = IXGBE_LOW_DV(frame); 4616 break; 4617 } 4618 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4619 4620 hw->fc.pause_time = IXGBE_FC_PAUSE; 4621 hw->fc.send_xon = true; 4622 } /* ixgbe_config_delay_values */ 4623 4624 /************************************************************************ 4625 * ixgbe_set_multi - Multicast Update 4626 * 4627 * Called whenever multicast address list is updated. 4628 ************************************************************************/ 4629 static u_int 4630 ixgbe_mc_filter_apply(void *arg, struct sockaddr_dl *sdl, u_int idx) 4631 { 4632 struct ixgbe_softc *sc = arg; 4633 struct ixgbe_mc_addr *mta = sc->mta; 4634 4635 if (idx == MAX_NUM_MULTICAST_ADDRESSES) 4636 return (0); 4637 bcopy(LLADDR(sdl), mta[idx].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4638 mta[idx].vmdq = sc->pool; 4639 4640 return (1); 4641 } /* ixgbe_mc_filter_apply */ 4642 4643 #ifdef PCI_IOV 4644 /* 4645 * The MTA is shared by the PF and every VF. Rebuild it from all owners 4646 * because an individual bit cannot be cleared safely when hashes collide. 4647 */ 4648 u_int 4649 ixgbe_iov_rebuild_mta(struct ixgbe_softc *sc) 4650 { 4651 struct ixgbe_hw *hw; 4652 struct ixgbe_mc_addr *mta; 4653 struct ixgbe_vf *vf; 4654 u32 old_mta[IXGBE_MAX_MTA]; 4655 u32 hash; 4656 u_int i, mcnt; 4657 int vf_index; 4658 4659 hw = &sc->hw; 4660 mta = sc->mta; 4661 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4662 mcnt = if_foreach_llmaddr(iflib_get_ifp(sc->ctx), 4663 ixgbe_mc_filter_apply, sc); 4664 4665 bcopy(hw->mac.mta_shadow, old_mta, sizeof(old_mta)); 4666 bzero(hw->mac.mta_shadow, sizeof(hw->mac.mta_shadow)); 4667 hw->addr_ctrl.num_mc_addrs = mcnt; 4668 hw->addr_ctrl.mta_in_use = 0; 4669 4670 for (i = 0; i < mcnt; i++) 4671 ixgbe_set_mta(hw, mta[i].addr); 4672 4673 for (vf_index = 0; vf_index < sc->num_vfs; vf_index++) { 4674 vf = &sc->vfs[vf_index]; 4675 if (!(vf->flags & IXGBE_VF_ACTIVE)) 4676 continue; 4677 4678 for (i = 0; i < vf->num_mc_hashes; i++) { 4679 hash = vf->mc_hash[i] & 0xfff; 4680 hw->mac.mta_shadow[(hash >> 5) & 4681 (hw->mac.mcft_size - 1)] |= 4682 1U << (hash & 0x1f); 4683 hw->addr_ctrl.mta_in_use++; 4684 } 4685 } 4686 4687 for (i = 0; i < hw->mac.mcft_size; i++) { 4688 if (sc->iov_mta_valid && 4689 old_mta[i] == hw->mac.mta_shadow[i]) 4690 continue; 4691 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_MTA(0), i, 4692 hw->mac.mta_shadow[i]); 4693 } 4694 sc->iov_mta_valid = true; 4695 4696 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, 4697 (hw->addr_ctrl.mta_in_use != 0 ? IXGBE_MCSTCTRL_MFE : 0) | 4698 hw->mac.mc_filter_type); 4699 4700 return (mcnt); 4701 } 4702 #endif 4703 4704 static void 4705 ixgbe_if_multi_set(if_ctx_t ctx) 4706 { 4707 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4708 struct ixgbe_mc_addr *mta; 4709 if_t ifp = iflib_get_ifp(ctx); 4710 u8 *update_ptr; 4711 u32 fctrl; 4712 u_int mcnt; 4713 4714 IOCTL_DEBUGOUT("ixgbe_if_multi_set: begin"); 4715 4716 #ifdef PCI_IOV 4717 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4718 mcnt = ixgbe_iov_rebuild_mta(sc); 4719 } else 4720 #endif 4721 { 4722 mta = sc->mta; 4723 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4724 4725 mcnt = if_foreach_llmaddr(iflib_get_ifp(ctx), 4726 ixgbe_mc_filter_apply, sc); 4727 4728 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 4729 update_ptr = (u8 *)mta; 4730 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4731 ixgbe_mc_array_itr, true); 4732 } 4733 } 4734 4735 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4736 4737 if (if_getflags(ifp) & IFF_PROMISC) 4738 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4739 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 4740 if_getflags(ifp) & IFF_ALLMULTI) { 4741 fctrl |= IXGBE_FCTRL_MPE; 4742 fctrl &= ~IXGBE_FCTRL_UPE; 4743 } else 4744 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4745 4746 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4747 } /* ixgbe_if_multi_set */ 4748 4749 /************************************************************************ 4750 * ixgbe_mc_array_itr 4751 * 4752 * An iterator function needed by the multicast shared code. 4753 * It feeds the shared code routine the addresses in the 4754 * array of ixgbe_set_multi() one by one. 4755 ************************************************************************/ 4756 static u8 * 4757 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4758 { 4759 struct ixgbe_mc_addr *mta; 4760 4761 mta = (struct ixgbe_mc_addr *)*update_ptr; 4762 *vmdq = mta->vmdq; 4763 4764 *update_ptr = (u8*)(mta + 1); 4765 4766 return (mta->addr); 4767 } /* ixgbe_mc_array_itr */ 4768 4769 /************************************************************************ 4770 * ixgbe_local_timer - Timer routine 4771 * 4772 * Checks for link status, updates statistics, 4773 * and runs the watchdog check. 4774 ************************************************************************/ 4775 static void 4776 ixgbe_if_timer(if_ctx_t ctx, uint16_t qid) 4777 { 4778 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4779 4780 if (qid != 0) 4781 return; 4782 4783 /* Check for pluggable optics */ 4784 if (sc->sfp_probe) 4785 if (!ixgbe_sfp_probe(ctx)) 4786 return; /* Nothing to do */ 4787 4788 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 0); 4789 4790 /* Fire off the adminq task */ 4791 iflib_admin_intr_deferred(ctx); 4792 4793 } /* ixgbe_if_timer */ 4794 4795 /************************************************************************ 4796 * ixgbe_fw_mode_timer - FW mode timer routine 4797 ************************************************************************/ 4798 static void 4799 ixgbe_fw_mode_timer(void *arg) 4800 { 4801 struct ixgbe_softc *sc = arg; 4802 struct ixgbe_hw *hw = &sc->hw; 4803 4804 if (atomic_load_acq_int(&sc->fw_mode_timer_paused) != 0) 4805 return; 4806 4807 if (ixgbe_fw_recovery_mode(hw)) { 4808 if (atomic_cmpset_acq_int(&sc->recovery_mode, 0, 1)) { 4809 /* Firmware error detected, entering recovery mode */ 4810 device_printf(sc->dev, 4811 "Firmware recovery mode detected. Limiting" 4812 " functionality. Refer to the Intel(R) Ethernet" 4813 " Adapters and Devices User Guide for details on" 4814 " firmware recovery mode.\n"); 4815 4816 /* Stop and publish the failure from the iflib taskqueue. */ 4817 iflib_request_reset_if_up(sc->ctx); 4818 iflib_admin_intr_deferred(sc->ctx); 4819 } 4820 } else if (atomic_cmpset_acq_int(&sc->recovery_mode, 1, 0)) { 4821 /* Reinitialize an interface which was up when recovery began. */ 4822 iflib_request_reset_if_up(sc->ctx); 4823 iflib_admin_intr_deferred(sc->ctx); 4824 } 4825 4826 if (atomic_load_acq_int(&sc->fw_mode_timer_paused) == 0) 4827 callout_reset(&sc->fw_mode_timer, hz, 4828 ixgbe_fw_mode_timer, sc); 4829 } /* ixgbe_fw_mode_timer */ 4830 4831 static void 4832 ixgbe_fw_mode_timer_pause(struct ixgbe_softc *sc) 4833 { 4834 4835 if (!sc->fw_mode_timer_initialized || 4836 atomic_swap_int(&sc->fw_mode_timer_paused, 1) != 0) 4837 return; 4838 callout_drain(&sc->fw_mode_timer); 4839 } 4840 4841 static void 4842 ixgbe_fw_mode_timer_resume(struct ixgbe_softc *sc) 4843 { 4844 4845 if (!sc->fw_mode_timer_initialized || 4846 atomic_swap_int(&sc->fw_mode_timer_paused, 0) == 0) 4847 return; 4848 callout_reset(&sc->fw_mode_timer, hz, ixgbe_fw_mode_timer, sc); 4849 } 4850 4851 /************************************************************************ 4852 * ixgbe_sfp_probe 4853 * 4854 * Determine if a port had optics inserted. 4855 ************************************************************************/ 4856 static bool 4857 ixgbe_sfp_probe(if_ctx_t ctx) 4858 { 4859 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4860 struct ixgbe_hw *hw = &sc->hw; 4861 device_t dev = iflib_get_dev(ctx); 4862 bool result = false; 4863 4864 if ((hw->phy.type == ixgbe_phy_nl) && 4865 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 4866 s32 ret = hw->phy.ops.identify_sfp(hw); 4867 if (ret) 4868 goto out; 4869 ret = hw->phy.ops.reset(hw); 4870 sc->sfp_probe = false; 4871 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4872 device_printf(dev, 4873 "Unsupported SFP+ module detected!"); 4874 device_printf(dev, 4875 "Reload driver with supported module.\n"); 4876 goto out; 4877 } else 4878 device_printf(dev, "SFP+ module detected!\n"); 4879 /* We now have supported optics */ 4880 result = true; 4881 } 4882 out: 4883 4884 return (result); 4885 } /* ixgbe_sfp_probe */ 4886 4887 /************************************************************************ 4888 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4889 ************************************************************************/ 4890 static bool 4891 ixgbe_handle_mod(void *context) 4892 { 4893 if_ctx_t ctx = context; 4894 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4895 struct ixgbe_hw *hw = &sc->hw; 4896 device_t dev = iflib_get_dev(ctx); 4897 u32 err, cage_full = 0; 4898 4899 if (sc->hw.need_crosstalk_fix) { 4900 switch (hw->mac.type) { 4901 case ixgbe_mac_82599EB: 4902 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4903 IXGBE_ESDP_SDP2; 4904 break; 4905 case ixgbe_mac_X550EM_x: 4906 case ixgbe_mac_X550EM_a: 4907 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4908 IXGBE_ESDP_SDP0; 4909 break; 4910 default: 4911 break; 4912 } 4913 4914 if (!cage_full) 4915 goto handle_mod_out; 4916 } 4917 4918 err = hw->phy.ops.identify_sfp(hw); 4919 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4920 device_printf(dev, 4921 "Unsupported SFP+ module type was detected.\n"); 4922 goto handle_mod_out; 4923 } 4924 4925 if (hw->mac.type == ixgbe_mac_82598EB) 4926 err = hw->phy.ops.reset(hw); 4927 else 4928 err = hw->mac.ops.setup_sfp(hw); 4929 4930 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4931 device_printf(dev, 4932 "Setup failure - unsupported SFP+ module type.\n"); 4933 goto handle_mod_out; 4934 } 4935 return (true); 4936 4937 handle_mod_out: 4938 return (false); 4939 } /* ixgbe_handle_mod */ 4940 4941 4942 /************************************************************************ 4943 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4944 ************************************************************************/ 4945 static void 4946 ixgbe_handle_msf(void *context) 4947 { 4948 if_ctx_t ctx = context; 4949 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4950 struct ixgbe_hw *hw = &sc->hw; 4951 u32 autoneg; 4952 bool negotiate; 4953 4954 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4955 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4956 4957 autoneg = hw->phy.autoneg_advertised; 4958 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4959 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4960 if (hw->mac.ops.setup_link) 4961 hw->mac.ops.setup_link(hw, autoneg, true); 4962 4963 /* Adjust media types shown in ifconfig */ 4964 ifmedia_removeall(sc->media); 4965 ixgbe_add_media_types(sc->ctx); 4966 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 4967 } /* ixgbe_handle_msf */ 4968 4969 /************************************************************************ 4970 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4971 ************************************************************************/ 4972 static void 4973 ixgbe_handle_phy(void *context) 4974 { 4975 if_ctx_t ctx = context; 4976 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4977 struct ixgbe_hw *hw = &sc->hw; 4978 int error; 4979 4980 error = hw->phy.ops.handle_lasi(hw); 4981 if (error == IXGBE_ERR_OVERTEMP) 4982 device_printf(sc->dev, 4983 "CRITICAL: EXTERNAL PHY OVER TEMP!!" 4984 " PHY will downshift to lower power state!\n"); 4985 else if (error) 4986 device_printf(sc->dev, 4987 "Error handling LASI interrupt: %d\n", error); 4988 } /* ixgbe_handle_phy */ 4989 4990 /************************************************************************ 4991 * ixgbe_enable_lse - enable link status events 4992 * 4993 * Sets mask and enables link status events 4994 ************************************************************************/ 4995 s32 ixgbe_enable_lse(struct ixgbe_softc *sc) 4996 { 4997 s32 error; 4998 4999 u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN | 5000 IXGBE_ACI_LINK_EVENT_MEDIA_NA | 5001 IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL | 5002 IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL)); 5003 5004 error = ixgbe_configure_lse(&sc->hw, TRUE, mask); 5005 if (error) 5006 return (error); 5007 5008 sc->lse_mask = mask; 5009 return (IXGBE_SUCCESS); 5010 } /* ixgbe_enable_lse */ 5011 5012 /************************************************************************ 5013 * ixgbe_disable_lse - disable link status events 5014 ************************************************************************/ 5015 s32 ixgbe_disable_lse(struct ixgbe_softc *sc) 5016 { 5017 s32 error; 5018 5019 error = ixgbe_configure_lse(&sc->hw, false, sc->lse_mask); 5020 if (error) 5021 return (error); 5022 5023 sc->lse_mask = 0; 5024 return (IXGBE_SUCCESS); 5025 } /* ixgbe_disable_lse */ 5026 5027 /************************************************************************ 5028 * ixgbe_handle_fw_event - Tasklet for MSI-X Link Status Event interrupts 5029 ************************************************************************/ 5030 static u32 5031 ixgbe_handle_fw_event(void *context) 5032 { 5033 if_ctx_t ctx = context; 5034 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5035 struct ixgbe_hw *hw = &sc->hw; 5036 struct ixgbe_aci_event event; 5037 bool pending = false; 5038 s32 error; 5039 u32 requests = 0; 5040 5041 event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE; 5042 event.msg_buf = malloc(event.buf_len, M_IXGBE, M_ZERO | M_NOWAIT); 5043 if (!event.msg_buf) { 5044 device_printf(sc->dev, "Can not allocate buffer for " 5045 "event message\n"); 5046 return (0); 5047 } 5048 5049 do { 5050 error = ixgbe_aci_get_event(hw, &event, &pending); 5051 if (error) { 5052 device_printf(sc->dev, "Error getting event from " 5053 "FW:%d\n", error); 5054 break; 5055 } 5056 5057 switch (le16toh(event.desc.opcode)) { 5058 case ixgbe_aci_opc_get_link_status: 5059 requests |= IXGBE_REQUEST_TASK_LSC; 5060 break; 5061 5062 case ixgbe_aci_opc_fw_logs_event: 5063 ixgbe_fwlog_event_dump(&sc->hw, &event.desc, event.msg_buf); 5064 break; 5065 5066 case ixgbe_aci_opc_temp_tca_event: 5067 if (!sc->overtemp_shutdown_pending) { 5068 sc->overtemp_shutdown_pending = true; 5069 requests |= IXGBE_REQUEST_TASK_RESET; 5070 device_printf(sc->dev, 5071 "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n"); 5072 device_printf(sc->dev, 5073 "System shutdown required!\n"); 5074 } 5075 break; 5076 5077 default: 5078 device_printf(sc->dev, 5079 "Unknown FW event captured, opcode=0x%04X\n", 5080 le16toh(event.desc.opcode)); 5081 break; 5082 } 5083 } while (pending); 5084 5085 free(event.msg_buf, M_IXGBE); 5086 return (requests); 5087 } /* ixgbe_handle_fw_event */ 5088 5089 /************************************************************************ 5090 * ixgbe_if_stop - Stop the hardware 5091 * 5092 * Disables all traffic on the adapter by issuing a 5093 * global reset on the MAC and deallocates TX/RX buffers. 5094 ************************************************************************/ 5095 static void 5096 ixgbe_if_stop(if_ctx_t ctx) 5097 { 5098 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5099 struct ixgbe_hw *hw = &sc->hw; 5100 5101 INIT_DEBUGOUT("ixgbe_if_stop: begin\n"); 5102 5103 ixgbe_led_restore(sc); 5104 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 5105 ixgbe_disable_mdd(hw); 5106 ixgbe_quiesce_vfs(sc); 5107 } 5108 ixgbe_reset_hw(hw); 5109 atomic_store_rel_int(&sc->ecc_reset_pending, 0); 5110 hw->adapter_stopped = false; 5111 ixgbe_stop_adapter(hw); 5112 /* Turn off the laser - noop with no optics */ 5113 ixgbe_disable_tx_laser(hw); 5114 5115 /* Update the stack */ 5116 sc->link_up = false; 5117 if (sc->link_active) { 5118 if (bootverbose) 5119 device_printf(sc->dev, "Link is Down\n"); 5120 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); 5121 sc->link_active = false; 5122 } 5123 5124 /* reprogram the RAR[0] in case user changed it. */ 5125 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 5126 5127 return; 5128 } /* ixgbe_if_stop */ 5129 5130 /* 5131 * Identify the physical port while retaining the NVM-selected LED mode. 5132 * E610 exposes identification through firmware rather than LEDCTL. 5133 */ 5134 static void 5135 ixgbe_if_led_func(if_ctx_t ctx, int onoff) 5136 { 5137 struct ixgbe_softc *sc; 5138 struct ixgbe_hw *hw; 5139 5140 sc = iflib_get_softc(ctx); 5141 hw = &sc->hw; 5142 if (!onoff) { 5143 ixgbe_led_restore(sc); 5144 return; 5145 } 5146 if (sc->led_active) 5147 return; 5148 5149 if (hw->mac.type == ixgbe_mac_E610) { 5150 if (ixgbe_aci_set_port_id_led(hw, false) == IXGBE_SUCCESS) 5151 sc->led_active = true; 5152 return; 5153 } 5154 5155 sc->ledctl_default = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 5156 if (ixgbe_led_on(hw, hw->mac.led_link_act) == IXGBE_SUCCESS) 5157 sc->led_active = true; 5158 } 5159 5160 static void 5161 ixgbe_led_restore(struct ixgbe_softc *sc) 5162 { 5163 struct ixgbe_hw *hw; 5164 5165 if (!sc->led_active) 5166 return; 5167 5168 hw = &sc->hw; 5169 if (hw->mac.type == ixgbe_mac_E610) { 5170 (void)ixgbe_aci_set_port_id_led(hw, true); 5171 } else { 5172 /* Clear any PHY manual override before restoring LEDCTL. */ 5173 (void)ixgbe_led_off(hw, hw->mac.led_link_act); 5174 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, sc->ledctl_default); 5175 IXGBE_WRITE_FLUSH(hw); 5176 } 5177 sc->led_active = false; 5178 } 5179 5180 /************************************************************************ 5181 * ixgbe_link_speed_to_str - Convert link speed to string 5182 * 5183 * Helper function to convert link speed constants to human-readable 5184 * string representations in conventional Gbps or Mbps. 5185 ************************************************************************/ 5186 static const char * 5187 ixgbe_link_speed_to_str(u32 link_speed) 5188 { 5189 switch (link_speed) { 5190 case IXGBE_LINK_SPEED_10GB_FULL: 5191 return "10 Gbps"; 5192 case IXGBE_LINK_SPEED_5GB_FULL: 5193 return "5 Gbps"; 5194 case IXGBE_LINK_SPEED_2_5GB_FULL: 5195 return "2.5 Gbps"; 5196 case IXGBE_LINK_SPEED_1GB_FULL: 5197 return "1 Gbps"; 5198 case IXGBE_LINK_SPEED_100_FULL: 5199 return "100 Mbps"; 5200 case IXGBE_LINK_SPEED_10_FULL: 5201 return "10 Mbps"; 5202 default: 5203 return "Unknown"; 5204 } 5205 } /* ixgbe_link_speed_to_str */ 5206 5207 /************************************************************************ 5208 * ixgbe_update_link_status - Update OS on link state 5209 * 5210 * Process deferred administrative requests and update the OS link state. 5211 ************************************************************************/ 5212 static void 5213 ixgbe_if_update_admin_status(if_ctx_t ctx) 5214 { 5215 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5216 device_t dev = iflib_get_dev(ctx); 5217 u32 requests; 5218 u_int pass; 5219 bool check_link = false; 5220 5221 /* 5222 * The interrupt filter and other producers can run concurrently with 5223 * this task. Claim each batch atomically so a request posted while the 5224 * task is running remains pending for this or the next invocation. 5225 * 5226 * MOD and firmware events can produce dependent requests. Fold those 5227 * into the claimed batch so link state is sampled after any link setup. 5228 */ 5229 if ((if_getdrvflags(iflib_get_ifp(ctx)) & IFF_DRV_RUNNING) != 0 && 5230 (sc->iov_mbx_cleanup_pending || ixgbe_mbx_pending(sc))) 5231 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MBX); 5232 for (pass = 0; pass < IXGBE_ADMIN_TASK_BUDGET; pass++) { 5233 requests = atomic_readandclear_32(&sc->task_requests); 5234 if (requests == 0) 5235 break; 5236 if (requests & IXGBE_REQUEST_TASK_FWEVENT) 5237 requests |= ixgbe_handle_fw_event(ctx); 5238 if (requests & IXGBE_REQUEST_TASK_MOD) { 5239 if (ixgbe_handle_mod(ctx)) 5240 requests |= IXGBE_REQUEST_TASK_MSF; 5241 else 5242 requests &= ~IXGBE_REQUEST_TASK_MSF; 5243 } 5244 if (requests & IXGBE_REQUEST_TASK_MSF) 5245 ixgbe_handle_msf(ctx); 5246 /* A reset request can re-enable VF traffic; skip it while stopped. */ 5247 if ((requests & IXGBE_REQUEST_TASK_MBX) != 0 && 5248 (if_getdrvflags(iflib_get_ifp(ctx)) & IFF_DRV_RUNNING) != 0) 5249 ixgbe_handle_mbx(ctx); 5250 if (requests & IXGBE_REQUEST_TASK_FDIR) 5251 ixgbe_reinit_fdir(ctx); 5252 if (requests & IXGBE_REQUEST_TASK_PHY) 5253 ixgbe_handle_phy(ctx); 5254 if (requests & IXGBE_REQUEST_TASK_LSC) 5255 check_link = true; 5256 if (requests & IXGBE_REQUEST_TASK_RESET) { 5257 /* Re-enter the admin task so it observes IFC_DO_RESET. */ 5258 iflib_request_reset(ctx); 5259 iflib_admin_intr_deferred(ctx); 5260 } 5261 } 5262 5263 /* Do not let a continuous producer monopolize the admin taskqueue. */ 5264 if (atomic_load_acq_32(&sc->task_requests) != 0) 5265 iflib_admin_intr_deferred(ctx); 5266 5267 if (check_link) 5268 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 5269 false); 5270 5271 if (sc->link_up) { 5272 if (sc->link_active == false) { 5273 if (bootverbose) 5274 device_printf(dev, 5275 "Link is up %s Full Duplex\n", 5276 ixgbe_link_speed_to_str(sc->link_speed)); 5277 sc->link_active = true; 5278 5279 /* If link speed is <= 1Gbps and EEE is enabled, 5280 * log info. 5281 */ 5282 if (sc->hw.mac.type == ixgbe_mac_E610 && 5283 (sc->feat_en & IXGBE_FEATURE_EEE) && 5284 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 5285 device_printf(sc->dev, 5286 "Energy Efficient Ethernet (EEE) feature " 5287 "is not supported on link speeds equal to " 5288 "or below 1Gbps. EEE is supported on " 5289 "speeds above 1Gbps.\n"); 5290 } 5291 5292 /* Update any Flow Control changes */ 5293 ixgbe_fc_enable(&sc->hw); 5294 /* Update DMA coalescing config */ 5295 ixgbe_config_dmac(sc); 5296 iflib_link_state_change(ctx, LINK_STATE_UP, 5297 ixgbe_link_speed_to_baudrate(sc->link_speed)); 5298 5299 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5300 ixgbe_ping_all_vfs(sc); 5301 } 5302 } else { /* Link down */ 5303 if (sc->link_active == true) { 5304 if (bootverbose) 5305 device_printf(dev, "Link is Down\n"); 5306 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); 5307 sc->link_active = false; 5308 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5309 ixgbe_ping_all_vfs(sc); 5310 } 5311 } 5312 5313 ixgbe_schedule_iov_recovery(sc); 5314 5315 ixgbe_update_stats_counters(sc); 5316 } /* ixgbe_if_update_admin_status */ 5317 5318 /************************************************************************ 5319 * ixgbe_config_dmac - Configure DMA Coalescing 5320 ************************************************************************/ 5321 static void 5322 ixgbe_config_dmac(struct ixgbe_softc *sc) 5323 { 5324 struct ixgbe_hw *hw = &sc->hw; 5325 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5326 5327 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5328 return; 5329 5330 if (dcfg->watchdog_timer ^ sc->dmac || 5331 dcfg->link_speed ^ sc->link_speed) { 5332 dcfg->watchdog_timer = sc->dmac; 5333 dcfg->fcoe_en = false; 5334 dcfg->link_speed = sc->link_speed; 5335 dcfg->num_tcs = 1; 5336 5337 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5338 dcfg->watchdog_timer, dcfg->link_speed); 5339 5340 hw->mac.ops.dmac_config(hw); 5341 } 5342 } /* ixgbe_config_dmac */ 5343 5344 /************************************************************************ 5345 * ixgbe_if_enable_intr 5346 ************************************************************************/ 5347 void 5348 ixgbe_if_enable_intr(if_ctx_t ctx) 5349 { 5350 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5351 struct ixgbe_hw *hw = &sc->hw; 5352 struct ix_rx_queue *que = sc->rx_queues; 5353 u32 mask, fwsm; 5354 5355 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5356 5357 switch (sc->hw.mac.type) { 5358 case ixgbe_mac_82599EB: 5359 mask |= IXGBE_EIMS_ECC; 5360 /* Temperature sensor on some scs */ 5361 mask |= IXGBE_EIMS_GPI_SDP0; 5362 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5363 mask |= IXGBE_EIMS_GPI_SDP1; 5364 mask |= IXGBE_EIMS_GPI_SDP2; 5365 break; 5366 case ixgbe_mac_X540: 5367 /* Detect if Thermal Sensor is enabled */ 5368 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5369 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5370 mask |= IXGBE_EIMS_TS; 5371 mask |= IXGBE_EIMS_ECC; 5372 break; 5373 case ixgbe_mac_X550: 5374 /* MAC thermal sensor is automatically enabled */ 5375 mask |= IXGBE_EIMS_TS; 5376 mask |= IXGBE_EIMS_ECC; 5377 break; 5378 case ixgbe_mac_X550EM_x: 5379 case ixgbe_mac_X550EM_a: 5380 /* Some devices use SDP0 for important information */ 5381 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5382 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5383 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5384 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5385 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5386 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5387 mask |= IXGBE_EICR_GPI_SDP0_X540; 5388 mask |= IXGBE_EIMS_ECC; 5389 break; 5390 case ixgbe_mac_E610: 5391 mask |= IXGBE_EIMS_FW_EVENT; 5392 break; 5393 default: 5394 break; 5395 } 5396 5397 /* Enable Fan Failure detection */ 5398 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5399 mask |= IXGBE_EIMS_GPI_SDP1; 5400 /* Enable SR-IOV */ 5401 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5402 mask |= IXGBE_EIMS_MAILBOX; 5403 /* Enable Flow Director */ 5404 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5405 mask |= IXGBE_EIMS_FLOW_DIR; 5406 if (atomic_load_acq_int(&sc->ecc_reset_pending)) 5407 mask &= ~IXGBE_EIMS_ECC; 5408 5409 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5410 5411 /* With MSI-X we use auto clear */ 5412 if (sc->intr_type == IFLIB_INTR_MSIX) { 5413 mask = IXGBE_EIMS_ENABLE_MASK; 5414 /* Don't autoclear Link */ 5415 mask &= ~IXGBE_EIMS_OTHER; 5416 mask &= ~IXGBE_EIMS_LSC; 5417 mask &= ~IXGBE_EIMS_FW_EVENT; 5418 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 5419 mask &= ~IXGBE_EIMS_MAILBOX; 5420 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 5421 } 5422 5423 /* 5424 * Now enable all queues, this is done separately to 5425 * allow for handling the extended (beyond 32) MSI-X 5426 * vectors that can be used by 82599 5427 */ 5428 for (int i = 0; i < sc->num_rx_queues; i++, que++) 5429 ixgbe_enable_queue(sc, que->msix); 5430 5431 IXGBE_WRITE_FLUSH(hw); 5432 5433 } /* ixgbe_if_enable_intr */ 5434 5435 /************************************************************************ 5436 * ixgbe_if_disable_intr 5437 ************************************************************************/ 5438 static void 5439 ixgbe_if_disable_intr(if_ctx_t ctx) 5440 { 5441 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5442 5443 if (sc->intr_type == IFLIB_INTR_MSIX) 5444 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5445 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 5446 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~0); 5447 } else { 5448 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, 0xFFFF0000); 5449 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(0), ~0); 5450 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(1), ~0); 5451 } 5452 IXGBE_WRITE_FLUSH(&sc->hw); 5453 5454 } /* ixgbe_if_disable_intr */ 5455 5456 /************************************************************************ 5457 * ixgbe_link_intr_enable 5458 ************************************************************************/ 5459 static void 5460 ixgbe_link_intr_enable(if_ctx_t ctx) 5461 { 5462 struct ixgbe_hw *hw = 5463 &((struct ixgbe_softc *)iflib_get_softc(ctx))->hw; 5464 5465 /* Re-enable other interrupts */ 5466 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC); 5467 } /* ixgbe_link_intr_enable */ 5468 5469 /************************************************************************ 5470 * ixgbe_if_rx_queue_intr_enable 5471 ************************************************************************/ 5472 static int 5473 ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) 5474 { 5475 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5476 struct ix_rx_queue *que = &sc->rx_queues[rxqid]; 5477 5478 ixgbe_enable_queue(sc, que->msix); 5479 5480 return (0); 5481 } /* ixgbe_if_rx_queue_intr_enable */ 5482 5483 /************************************************************************ 5484 * ixgbe_enable_queue 5485 ************************************************************************/ 5486 static void 5487 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 5488 { 5489 struct ixgbe_hw *hw = &sc->hw; 5490 u64 queue = 1ULL << vector; 5491 u32 mask; 5492 5493 if (hw->mac.type == ixgbe_mac_82598EB) { 5494 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 5495 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5496 } else { 5497 mask = (queue & 0xFFFFFFFF); 5498 if (mask) 5499 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 5500 mask = (queue >> 32); 5501 if (mask) 5502 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 5503 } 5504 } /* ixgbe_enable_queue */ 5505 5506 /************************************************************************ 5507 * ixgbe_disable_queue 5508 ************************************************************************/ 5509 static void 5510 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 5511 { 5512 struct ixgbe_hw *hw = &sc->hw; 5513 u64 queue = 1ULL << vector; 5514 u32 mask; 5515 5516 if (hw->mac.type == ixgbe_mac_82598EB) { 5517 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 5518 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 5519 } else { 5520 mask = (queue & 0xFFFFFFFF); 5521 if (mask) 5522 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 5523 mask = (queue >> 32); 5524 if (mask) 5525 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 5526 } 5527 } /* ixgbe_disable_queue */ 5528 5529 /************************************************************************ 5530 * ixgbe_intr - Legacy Interrupt Service Routine 5531 ************************************************************************/ 5532 int 5533 ixgbe_intr(void *arg) 5534 { 5535 struct ixgbe_softc *sc = arg; 5536 struct ix_rx_queue *que = sc->rx_queues; 5537 struct ixgbe_hw *hw = &sc->hw; 5538 if_ctx_t ctx = sc->ctx; 5539 u32 eicr, eicr_mask, requests; 5540 5541 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5542 requests = 0; 5543 5544 ++que->irqs; 5545 if (eicr == 0) { 5546 ixgbe_if_enable_intr(ctx); 5547 return (FILTER_HANDLED); 5548 } 5549 5550 /* Check for fan failure */ 5551 if ((sc->feat_en & IXGBE_FEATURE_FAN_FAIL) && 5552 (eicr & IXGBE_EICR_GPI_SDP1)) { 5553 device_printf(sc->dev, 5554 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 5555 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5556 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 5557 } 5558 5559 /* Link status change */ 5560 if (eicr & IXGBE_EICR_LSC) { 5561 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 5562 requests |= IXGBE_REQUEST_TASK_LSC; 5563 } 5564 5565 if (ixgbe_is_sfp(hw)) { 5566 /* Pluggable optics-related interrupt */ 5567 if (hw->mac.type >= ixgbe_mac_X540) 5568 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 5569 else 5570 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 5571 5572 if (eicr & eicr_mask) { 5573 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 5574 requests |= IXGBE_REQUEST_TASK_MOD; 5575 } 5576 5577 if ((hw->mac.type == ixgbe_mac_82599EB) && 5578 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 5579 IXGBE_WRITE_REG(hw, IXGBE_EICR, 5580 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 5581 requests |= IXGBE_REQUEST_TASK_MSF; 5582 } 5583 } 5584 5585 /* External PHY interrupt */ 5586 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 5587 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 5588 requests |= IXGBE_REQUEST_TASK_PHY; 5589 } 5590 if (hw->mac.type != ixgbe_mac_82598EB && 5591 ixgbe_handle_ecc(sc, eicr)) 5592 requests |= IXGBE_REQUEST_TASK_RESET; 5593 if (requests != 0) { 5594 atomic_set_32(&sc->task_requests, requests); 5595 iflib_admin_intr_deferred(ctx); 5596 } 5597 5598 return (FILTER_SCHEDULE_THREAD); 5599 } /* ixgbe_intr */ 5600 5601 /************************************************************************ 5602 * ixgbe_free_pci_resources 5603 ************************************************************************/ 5604 static void 5605 ixgbe_free_pci_resources(if_ctx_t ctx) 5606 { 5607 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5608 struct ix_rx_queue *que = sc->rx_queues; 5609 device_t dev = iflib_get_dev(ctx); 5610 5611 /* Release all MSI-X queue resources */ 5612 if (sc->intr_type == IFLIB_INTR_MSIX) 5613 iflib_irq_free(ctx, &sc->irq); 5614 5615 if (que != NULL) { 5616 for (int i = 0; i < sc->num_rx_queues; i++, que++) { 5617 iflib_irq_free(ctx, &que->que_irq); 5618 } 5619 } 5620 5621 if (sc->pci_mem != NULL) 5622 bus_release_resource(dev, SYS_RES_MEMORY, 5623 rman_get_rid(sc->pci_mem), sc->pci_mem); 5624 } /* ixgbe_free_pci_resources */ 5625 5626 /************************************************************************ 5627 * ixgbe_sysctl_flowcntl 5628 * 5629 * SYSCTL wrapper around setting Flow Control 5630 ************************************************************************/ 5631 static int 5632 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS) 5633 { 5634 struct ixgbe_softc *sc; 5635 struct sx *ctx_lock; 5636 int error, fc; 5637 5638 sc = (struct ixgbe_softc *)arg1; 5639 fc = sc->hw.fc.requested_mode; 5640 5641 error = sysctl_handle_int(oidp, &fc, 0, req); 5642 if ((error) || (req->newptr == NULL)) 5643 return (error); 5644 5645 /* Serialize the live register update with the administrative task. */ 5646 ctx_lock = iflib_ctx_lock_get(sc->ctx); 5647 sx_xlock(ctx_lock); 5648 if (fc == sc->hw.fc.requested_mode) 5649 error = 0; 5650 else 5651 error = ixgbe_set_flowcntl(sc, fc); 5652 sx_xunlock(ctx_lock); 5653 return (error); 5654 } /* ixgbe_sysctl_flowcntl */ 5655 5656 /************************************************************************ 5657 * ixgbe_set_flowcntl - Set flow control 5658 * 5659 * Flow control values: 5660 * 0 - off 5661 * 1 - rx pause 5662 * 2 - tx pause 5663 * 3 - full 5664 ************************************************************************/ 5665 static int 5666 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5667 { 5668 bool enable_drop, mdd_active; 5669 5670 switch (fc) { 5671 case ixgbe_fc_rx_pause: 5672 case ixgbe_fc_tx_pause: 5673 case ixgbe_fc_full: 5674 enable_drop = false; 5675 break; 5676 case ixgbe_fc_none: 5677 enable_drop = true; 5678 break; 5679 default: 5680 return (EINVAL); 5681 } 5682 5683 /* Updating SRRCTL on a live queue is itself an MDD violation. */ 5684 mdd_active = sc->num_rx_queues > 1 && 5685 (sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 && 5686 (if_getdrvflags(iflib_get_ifp(sc->ctx)) & IFF_DRV_RUNNING) != 0; 5687 if (mdd_active) 5688 ixgbe_disable_mdd(&sc->hw); 5689 if (sc->num_rx_queues > 1) { 5690 if (enable_drop) 5691 ixgbe_enable_rx_drop(sc); 5692 else 5693 ixgbe_disable_rx_drop(sc); 5694 } 5695 if (mdd_active) { 5696 ixgbe_enable_mdd(&sc->hw); 5697 /* Service an event whose interrupt edge was lost while masked. */ 5698 if (ixgbe_mbx_pending(sc)) { 5699 atomic_set_32(&sc->task_requests, 5700 IXGBE_REQUEST_TASK_MBX); 5701 iflib_admin_intr_deferred(sc->ctx); 5702 } 5703 } 5704 5705 sc->hw.fc.requested_mode = fc; 5706 5707 /* Don't autoneg if forcing a value */ 5708 sc->hw.fc.disable_fc_autoneg = true; 5709 ixgbe_fc_enable(&sc->hw); 5710 5711 return (0); 5712 } /* ixgbe_set_flowcntl */ 5713 5714 /************************************************************************ 5715 * ixgbe_enable_rx_drop 5716 * 5717 * Enable the hardware to drop packets when the buffer is 5718 * full. This is useful with multiqueue, so that no single 5719 * queue being full stalls the entire RX engine. We only 5720 * enable this when Multiqueue is enabled AND Flow Control 5721 * is disabled. 5722 ************************************************************************/ 5723 static void 5724 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5725 { 5726 struct ixgbe_hw *hw = &sc->hw; 5727 struct rx_ring *rxr; 5728 u32 srrctl; 5729 5730 for (int i = 0; i < sc->num_rx_queues; i++) { 5731 rxr = &sc->rx_queues[i].rxr; 5732 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5733 srrctl |= IXGBE_SRRCTL_DROP_EN; 5734 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5735 } 5736 5737 } /* ixgbe_enable_rx_drop */ 5738 5739 /************************************************************************ 5740 * ixgbe_disable_rx_drop 5741 ************************************************************************/ 5742 static void 5743 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5744 { 5745 struct ixgbe_hw *hw = &sc->hw; 5746 struct rx_ring *rxr; 5747 u32 srrctl; 5748 5749 for (int i = 0; i < sc->num_rx_queues; i++) { 5750 rxr = &sc->rx_queues[i].rxr; 5751 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5752 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5753 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5754 } 5755 5756 } /* ixgbe_disable_rx_drop */ 5757 5758 /************************************************************************ 5759 * ixgbe_sysctl_advertise 5760 * 5761 * SYSCTL wrapper around setting advertised speed 5762 ************************************************************************/ 5763 static int 5764 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS) 5765 { 5766 struct ixgbe_softc *sc; 5767 int error, advertise; 5768 5769 sc = (struct ixgbe_softc *)arg1; 5770 if (atomic_load_acq_int(&sc->recovery_mode)) 5771 return (EPERM); 5772 5773 advertise = sc->advertise; 5774 5775 error = sysctl_handle_int(oidp, &advertise, 0, req); 5776 if ((error) || (req->newptr == NULL)) 5777 return (error); 5778 5779 return ixgbe_set_advertise(sc, advertise); 5780 } /* ixgbe_sysctl_advertise */ 5781 5782 /************************************************************************ 5783 * ixgbe_set_advertise - Control advertised link speed 5784 * 5785 * Flags: 5786 * 0x1 - advertise 100 Mb 5787 * 0x2 - advertise 1G 5788 * 0x4 - advertise 10G 5789 * 0x8 - advertise 10 Mb (yes, Mb) 5790 * 0x10 - advertise 2.5G (disabled by default) 5791 * 0x20 - advertise 5G (disabled by default) 5792 * 5793 ************************************************************************/ 5794 static int 5795 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5796 { 5797 device_t dev = iflib_get_dev(sc->ctx); 5798 struct ixgbe_hw *hw; 5799 ixgbe_link_speed speed = 0; 5800 ixgbe_link_speed link_caps = 0; 5801 s32 err = IXGBE_NOT_IMPLEMENTED; 5802 bool negotiate = false; 5803 5804 /* Checks to validate new value */ 5805 if (sc->advertise == advertise) /* no change */ 5806 return (0); 5807 5808 hw = &sc->hw; 5809 5810 /* No speed changes for backplane media */ 5811 if (hw->phy.media_type == ixgbe_media_type_backplane) 5812 return (ENODEV); 5813 5814 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5815 (hw->phy.multispeed_fiber))) { 5816 device_printf(dev, 5817 "Advertised speed can only be set on copper or multispeed" 5818 " fiber media types.\n"); 5819 return (EINVAL); 5820 } 5821 5822 if (advertise < 0x1 || advertise > 0x3F) { 5823 device_printf(dev, 5824 "Invalid advertised speed; valid modes are 0x1 through" 5825 " 0x3F\n"); 5826 return (EINVAL); 5827 } 5828 5829 if (hw->mac.ops.get_link_capabilities) { 5830 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5831 &negotiate); 5832 if (err != IXGBE_SUCCESS) { 5833 device_printf(dev, 5834 "Unable to determine supported advertise speeds" 5835 "\n"); 5836 return (ENODEV); 5837 } 5838 } 5839 5840 /* Set new value and report new advertised mode */ 5841 if (advertise & 0x1) { 5842 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5843 device_printf(dev, 5844 "Interface does not support 100Mb advertised" 5845 " speed\n"); 5846 return (EINVAL); 5847 } 5848 speed |= IXGBE_LINK_SPEED_100_FULL; 5849 } 5850 if (advertise & 0x2) { 5851 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5852 device_printf(dev, 5853 "Interface does not support 1Gb advertised speed" 5854 "\n"); 5855 return (EINVAL); 5856 } 5857 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5858 } 5859 if (advertise & 0x4) { 5860 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5861 device_printf(dev, 5862 "Interface does not support 10Gb advertised speed" 5863 "\n"); 5864 return (EINVAL); 5865 } 5866 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5867 } 5868 if (advertise & 0x8) { 5869 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5870 device_printf(dev, 5871 "Interface does not support 10Mb advertised speed" 5872 "\n"); 5873 return (EINVAL); 5874 } 5875 speed |= IXGBE_LINK_SPEED_10_FULL; 5876 } 5877 if (advertise & 0x10) { 5878 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5879 device_printf(dev, 5880 "Interface does not support 2.5G advertised speed" 5881 "\n"); 5882 return (EINVAL); 5883 } 5884 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5885 } 5886 if (advertise & 0x20) { 5887 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5888 device_printf(dev, 5889 "Interface does not support 5G advertised speed" 5890 "\n"); 5891 return (EINVAL); 5892 } 5893 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5894 } 5895 5896 hw->mac.autotry_restart = true; 5897 hw->mac.ops.setup_link(hw, speed, true); 5898 sc->advertise = advertise; 5899 5900 return (0); 5901 } /* ixgbe_set_advertise */ 5902 5903 /************************************************************************ 5904 * ixgbe_get_default_advertise - Get default advertised speed settings 5905 * 5906 * Formatted for sysctl usage. 5907 * Flags: 5908 * 0x1 - advertise 100 Mb 5909 * 0x2 - advertise 1G 5910 * 0x4 - advertise 10G 5911 * 0x8 - advertise 10 Mb (yes, Mb) 5912 * 0x10 - advertise 2.5G (disabled by default) 5913 * 0x20 - advertise 5G (disabled by default) 5914 ************************************************************************/ 5915 static int 5916 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5917 { 5918 struct ixgbe_hw *hw = &sc->hw; 5919 int speed; 5920 ixgbe_link_speed link_caps = 0; 5921 s32 err; 5922 bool negotiate = false; 5923 5924 /* 5925 * Advertised speed means nothing unless it's copper or 5926 * multi-speed fiber 5927 */ 5928 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5929 !(hw->phy.multispeed_fiber)) 5930 return (0); 5931 5932 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5933 if (err != IXGBE_SUCCESS) 5934 return (0); 5935 5936 if (hw->mac.type == ixgbe_mac_X550) { 5937 /* 5938 * 2.5G and 5G autonegotiation speeds on X550 5939 * are disabled by default due to reported 5940 * interoperability issues with some switches. 5941 */ 5942 link_caps &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 5943 IXGBE_LINK_SPEED_5GB_FULL); 5944 } 5945 5946 speed = 5947 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5948 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5949 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5950 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5951 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5952 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5953 5954 return speed; 5955 } /* ixgbe_get_default_advertise */ 5956 5957 /************************************************************************ 5958 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5959 * 5960 * Control values: 5961 * 0/1 - off / on (use default value of 1000) 5962 * 5963 * Legal timer values are: 5964 * 50,100,250,500,1000,2000,5000,10000 5965 * 5966 * Turning off interrupt moderation will also turn this off. 5967 ************************************************************************/ 5968 static int 5969 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 5970 { 5971 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5972 if_t ifp = iflib_get_ifp(sc->ctx); 5973 int error; 5974 u16 newval; 5975 5976 newval = sc->dmac; 5977 error = sysctl_handle_16(oidp, &newval, 0, req); 5978 if ((error) || (req->newptr == NULL)) 5979 return (error); 5980 5981 switch (newval) { 5982 case 0: 5983 /* Disabled */ 5984 sc->dmac = 0; 5985 break; 5986 case 1: 5987 /* Enable and use default */ 5988 sc->dmac = 1000; 5989 break; 5990 case 50: 5991 case 100: 5992 case 250: 5993 case 500: 5994 case 1000: 5995 case 2000: 5996 case 5000: 5997 case 10000: 5998 /* Legal values - allow */ 5999 sc->dmac = newval; 6000 break; 6001 default: 6002 /* Do nothing, illegal value */ 6003 return (EINVAL); 6004 } 6005 6006 /* Re-initialize hardware if it's already running */ 6007 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 6008 if_init(ifp, ifp); 6009 6010 return (0); 6011 } /* ixgbe_sysctl_dmac */ 6012 6013 #ifdef IXGBE_DEBUG 6014 /************************************************************************ 6015 * ixgbe_sysctl_power_state 6016 * 6017 * Sysctl to test power states 6018 * Values: 6019 * 0 - set device to D0 6020 * 3 - set device to D3 6021 * (none) - get current device power state 6022 ************************************************************************/ 6023 static int 6024 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 6025 { 6026 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6027 device_t dev = sc->dev; 6028 int curr_ps, new_ps, error = 0; 6029 6030 curr_ps = new_ps = pci_get_powerstate(dev); 6031 6032 error = sysctl_handle_int(oidp, &new_ps, 0, req); 6033 if ((error) || (req->newptr == NULL)) 6034 return (error); 6035 6036 if (new_ps == curr_ps) 6037 return (0); 6038 6039 if (new_ps == 3 && curr_ps == 0) 6040 error = DEVICE_SUSPEND(dev); 6041 else if (new_ps == 0 && curr_ps == 3) 6042 error = DEVICE_RESUME(dev); 6043 else 6044 return (EINVAL); 6045 6046 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 6047 6048 return (error); 6049 } /* ixgbe_sysctl_power_state */ 6050 #endif 6051 6052 #ifdef IXGBE_DEBUG 6053 /************************************************************************ 6054 * ixgbe_sysctl_print_rss_config 6055 ************************************************************************/ 6056 static int 6057 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 6058 { 6059 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6060 struct ixgbe_hw *hw = &sc->hw; 6061 device_t dev = sc->dev; 6062 struct sbuf *buf; 6063 int error = 0, reta_size; 6064 u32 reg; 6065 6066 if (atomic_load_acq_int(&sc->recovery_mode)) 6067 return (EPERM); 6068 6069 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 6070 if (!buf) { 6071 device_printf(dev, "Could not allocate sbuf for output.\n"); 6072 return (ENOMEM); 6073 } 6074 6075 // TODO: use sbufs to make a string to print out 6076 /* Set multiplier for RETA setup and table size based on MAC */ 6077 switch (sc->hw.mac.type) { 6078 case ixgbe_mac_X550: 6079 case ixgbe_mac_X550EM_x: 6080 case ixgbe_mac_X550EM_a: 6081 reta_size = 128; 6082 break; 6083 default: 6084 reta_size = 32; 6085 break; 6086 } 6087 6088 /* Print out the redirection table */ 6089 sbuf_cat(buf, "\n"); 6090 for (int i = 0; i < reta_size; i++) { 6091 if (i < 32) { 6092 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 6093 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 6094 } else { 6095 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 6096 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 6097 } 6098 } 6099 6100 // TODO: print more config 6101 6102 error = sbuf_finish(buf); 6103 if (error) 6104 device_printf(dev, "Error finishing sbuf: %d\n", error); 6105 6106 sbuf_delete(buf); 6107 6108 return (0); 6109 } /* ixgbe_sysctl_print_rss_config */ 6110 #endif /* IXGBE_DEBUG */ 6111 6112 /************************************************************************ 6113 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 6114 * 6115 * For X552/X557-AT devices using an external PHY 6116 ************************************************************************/ 6117 static int 6118 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 6119 { 6120 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6121 struct ixgbe_hw *hw = &sc->hw; 6122 u16 reg; 6123 6124 if (atomic_load_acq_int(&sc->recovery_mode)) 6125 return (EPERM); 6126 6127 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 6128 device_printf(iflib_get_dev(sc->ctx), 6129 "Device has no supported external thermal sensor.\n"); 6130 return (ENODEV); 6131 } 6132 6133 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 6134 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6135 device_printf(iflib_get_dev(sc->ctx), 6136 "Error reading from PHY's current temperature register" 6137 "\n"); 6138 return (EAGAIN); 6139 } 6140 6141 /* Shift temp for output */ 6142 reg = reg >> 8; 6143 6144 return (sysctl_handle_16(oidp, NULL, reg, req)); 6145 } /* ixgbe_sysctl_phy_temp */ 6146 6147 /************************************************************************ 6148 * ixgbe_sysctl_phy_overtemp_occurred 6149 * 6150 * Reports (directly from the PHY) whether the current PHY 6151 * temperature is over the overtemp threshold. 6152 ************************************************************************/ 6153 static int 6154 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 6155 { 6156 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6157 struct ixgbe_hw *hw = &sc->hw; 6158 u16 reg; 6159 6160 if (atomic_load_acq_int(&sc->recovery_mode)) 6161 return (EPERM); 6162 6163 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 6164 device_printf(iflib_get_dev(sc->ctx), 6165 "Device has no supported external thermal sensor.\n"); 6166 return (ENODEV); 6167 } 6168 6169 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6170 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6171 device_printf(iflib_get_dev(sc->ctx), 6172 "Error reading from PHY's temperature status register\n"); 6173 return (EAGAIN); 6174 } 6175 6176 /* Get occurrence bit */ 6177 reg = !!(reg & 0x4000); 6178 6179 return (sysctl_handle_16(oidp, 0, reg, req)); 6180 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6181 6182 /************************************************************************ 6183 * ixgbe_sysctl_eee_state 6184 * 6185 * Sysctl to set EEE power saving feature 6186 * Values: 6187 * 0 - disable EEE 6188 * 1 - enable EEE 6189 * (none) - get current device EEE state 6190 ************************************************************************/ 6191 static int 6192 ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS) 6193 { 6194 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6195 device_t dev = sc->dev; 6196 if_t ifp = iflib_get_ifp(sc->ctx); 6197 int curr_eee, new_eee, error = 0; 6198 s32 retval; 6199 6200 if (atomic_load_acq_int(&sc->recovery_mode)) 6201 return (EPERM); 6202 6203 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6204 6205 error = sysctl_handle_int(oidp, &new_eee, 0, req); 6206 if ((error) || (req->newptr == NULL)) 6207 return (error); 6208 6209 /* Nothing to do */ 6210 if (new_eee == curr_eee) 6211 return (0); 6212 6213 /* Not supported */ 6214 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6215 return (EINVAL); 6216 6217 /* Bounds checking */ 6218 if ((new_eee < 0) || (new_eee > 1)) 6219 return (EINVAL); 6220 6221 /* If link speed is <= 1Gbps and EEE is being enabled, log info */ 6222 if (sc->hw.mac.type == ixgbe_mac_E610 && 6223 new_eee && 6224 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 6225 device_printf(dev, 6226 "Energy Efficient Ethernet (EEE) feature is not " 6227 "supported on link speeds equal to or below 1Gbps. " 6228 "EEE is supported on speeds above 1Gbps.\n"); 6229 return (EINVAL); 6230 } 6231 6232 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6233 if (retval) { 6234 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6235 return (EINVAL); 6236 } 6237 6238 /* Restart auto-neg */ 6239 if_init(ifp, ifp); 6240 6241 device_printf(dev, "New EEE state: %d\n", new_eee); 6242 6243 /* Cache new value */ 6244 if (new_eee) 6245 sc->feat_en |= IXGBE_FEATURE_EEE; 6246 else 6247 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6248 6249 return (error); 6250 } /* ixgbe_sysctl_eee_state */ 6251 6252 static int 6253 ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS) 6254 { 6255 struct ixgbe_softc *sc; 6256 u32 reg, val, shift; 6257 int error, mask; 6258 6259 sc = oidp->oid_arg1; 6260 switch (oidp->oid_arg2) { 6261 case 0: 6262 reg = IXGBE_DTXTCPFLGL; 6263 shift = 0; 6264 break; 6265 case 1: 6266 reg = IXGBE_DTXTCPFLGL; 6267 shift = 16; 6268 break; 6269 case 2: 6270 reg = IXGBE_DTXTCPFLGH; 6271 shift = 0; 6272 break; 6273 default: 6274 return (EINVAL); 6275 break; 6276 } 6277 val = IXGBE_READ_REG(&sc->hw, reg); 6278 mask = (val >> shift) & 0xfff; 6279 error = sysctl_handle_int(oidp, &mask, 0, req); 6280 if (error != 0 || req->newptr == NULL) 6281 return (error); 6282 if (mask < 0 || mask > 0xfff) 6283 return (EINVAL); 6284 val = (val & ~(0xfff << shift)) | (mask << shift); 6285 IXGBE_WRITE_REG(&sc->hw, reg, val); 6286 return (0); 6287 } 6288 6289 /************************************************************************ 6290 * ixgbe_init_device_features 6291 ************************************************************************/ 6292 static void 6293 ixgbe_init_device_features(struct ixgbe_softc *sc) 6294 { 6295 s32 error; 6296 6297 sc->feat_cap = IXGBE_FEATURE_NETMAP | 6298 IXGBE_FEATURE_RSS | 6299 IXGBE_FEATURE_MSI | 6300 IXGBE_FEATURE_MSIX | 6301 IXGBE_FEATURE_LEGACY_IRQ; 6302 6303 /* Set capabilities first... */ 6304 switch (sc->hw.mac.type) { 6305 case ixgbe_mac_82598EB: 6306 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6307 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6308 break; 6309 case ixgbe_mac_X540: 6310 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6311 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6312 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6313 (sc->hw.bus.func == 0)) 6314 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6315 break; 6316 case ixgbe_mac_X550: 6317 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6318 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6319 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6320 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6321 break; 6322 case ixgbe_mac_X550EM_x: 6323 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6324 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6325 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6326 if (sc->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR) 6327 sc->feat_cap |= IXGBE_FEATURE_EEE; 6328 break; 6329 case ixgbe_mac_X550EM_a: 6330 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6331 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6332 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6333 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6334 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6335 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6336 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6337 sc->feat_cap |= IXGBE_FEATURE_EEE; 6338 } 6339 break; 6340 case ixgbe_mac_82599EB: 6341 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6342 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6343 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6344 (sc->hw.bus.func == 0)) 6345 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6346 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6347 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6348 break; 6349 case ixgbe_mac_E610: 6350 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6351 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6352 sc->feat_cap |= IXGBE_FEATURE_DBG_DUMP; 6353 sc->feat_cap |= IXGBE_FEATURE_FW_LOGGING; 6354 error = ixgbe_get_caps(&sc->hw); 6355 if (error == 0 && sc->hw.func_caps.common_cap.eee_support != 0) 6356 sc->feat_cap |= IXGBE_FEATURE_EEE; 6357 break; 6358 default: 6359 break; 6360 } 6361 6362 /* Enabled by default... */ 6363 /* Fan failure detection */ 6364 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6365 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6366 /* Netmap */ 6367 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6368 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6369 /* EEE */ 6370 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6371 sc->feat_en |= IXGBE_FEATURE_EEE; 6372 /* Thermal Sensor */ 6373 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6374 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6375 /* Recovery mode */ 6376 if (sc->feat_cap & IXGBE_FEATURE_RECOVERY_MODE) 6377 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 6378 /* FW Debug Dump */ 6379 if (sc->feat_cap & IXGBE_FEATURE_DBG_DUMP) 6380 sc->feat_en |= IXGBE_FEATURE_DBG_DUMP; 6381 /* FW Logging */ 6382 if (sc->feat_cap & IXGBE_FEATURE_FW_LOGGING) 6383 sc->feat_en |= IXGBE_FEATURE_FW_LOGGING; 6384 6385 /* Enabled via global sysctl... */ 6386 /* Flow Director */ 6387 if (ixgbe_enable_fdir) { 6388 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6389 sc->feat_en |= IXGBE_FEATURE_FDIR; 6390 else 6391 device_printf(sc->dev, 6392 "Device does not support Flow Director." 6393 " Leaving disabled."); 6394 } 6395 /* 6396 * Message Signal Interrupts - Extended (MSI-X) 6397 * Normal MSI is only enabled if MSI-X calls fail. 6398 */ 6399 if (!ixgbe_enable_msix) 6400 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6401 /* Receive-Side Scaling (RSS) */ 6402 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6403 sc->feat_en |= IXGBE_FEATURE_RSS; 6404 6405 /* Disable features with unmet dependencies... */ 6406 /* No MSI-X */ 6407 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6408 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6409 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6410 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6411 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6412 } 6413 } /* ixgbe_init_device_features */ 6414 6415 /************************************************************************ 6416 * ixgbe_check_fan_failure 6417 ************************************************************************/ 6418 static void 6419 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6420 { 6421 u32 mask; 6422 6423 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6424 IXGBE_ESDP_SDP1; 6425 6426 if (reg & mask) 6427 device_printf(sc->dev, 6428 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6429 } /* ixgbe_check_fan_failure */ 6430 6431 /************************************************************************ 6432 * ixgbe_sbuf_fw_version 6433 ************************************************************************/ 6434 static void 6435 ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf) 6436 { 6437 struct ixgbe_nvm_version nvm_ver = {0}; 6438 const char *space = ""; 6439 6440 ixgbe_get_nvm_version(hw, &nvm_ver); /* NVM version */ 6441 ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */ 6442 ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack a build ID in Intel's SCM */ 6443 ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */ 6444 6445 /* FW version */ 6446 if ((nvm_ver.phy_fw_maj == 0x0 && 6447 nvm_ver.phy_fw_min == 0x0 && 6448 nvm_ver.phy_fw_id == 0x0) || 6449 (nvm_ver.phy_fw_maj == 0xF && 6450 nvm_ver.phy_fw_min == 0xFF && 6451 nvm_ver.phy_fw_id == 0xF)) { 6452 /* If major, minor and id numbers are set to 0, 6453 * reading FW version is unsupported. If major number 6454 * is set to 0xF, minor is set to 0xFF and id is set 6455 * to 0xF, this means that number read is invalid. */ 6456 } else 6457 sbuf_printf(buf, "fw %d.%d.%d ", 6458 nvm_ver.phy_fw_maj, nvm_ver.phy_fw_min, 6459 nvm_ver.phy_fw_id); 6460 6461 /* NVM version */ 6462 if ((nvm_ver.nvm_major == 0x0 && 6463 nvm_ver.nvm_minor == 0x0 && 6464 nvm_ver.nvm_id == 0x0) || 6465 (nvm_ver.nvm_major == 0xF && 6466 nvm_ver.nvm_minor == 0xFF && 6467 nvm_ver.nvm_id == 0xF)) { 6468 /* If major, minor and id numbers are set to 0, 6469 * reading NVM version is unsupported. If major number 6470 * is set to 0xF, minor is set to 0xFF and id is set 6471 * to 0xF, this means that number read is invalid. */ 6472 } else 6473 sbuf_printf(buf, "nvm %x.%02x.%x ", 6474 nvm_ver.nvm_major, nvm_ver.nvm_minor, nvm_ver.nvm_id); 6475 6476 if (nvm_ver.oem_valid) { 6477 sbuf_printf(buf, "NVM OEM V%d.%d R%d", nvm_ver.oem_major, 6478 nvm_ver.oem_minor, nvm_ver.oem_release); 6479 space = " "; 6480 } 6481 6482 if (nvm_ver.or_valid) { 6483 sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d", 6484 space, nvm_ver.or_major, nvm_ver.or_build, 6485 nvm_ver.or_patch); 6486 space = " "; 6487 } 6488 6489 if (nvm_ver.etk_id != ((NVM_VER_INVALID << NVM_ETK_SHIFT) | 6490 NVM_VER_INVALID | 0xFFFFFFFF)) { 6491 sbuf_printf(buf, "%seTrack 0x%08x", space, nvm_ver.etk_id); 6492 } 6493 } /* ixgbe_sbuf_fw_version */ 6494 6495 /************************************************************************ 6496 * ixgbe_print_fw_version 6497 ************************************************************************/ 6498 static void 6499 ixgbe_print_fw_version(if_ctx_t ctx) 6500 { 6501 struct ixgbe_softc *sc = iflib_get_softc(ctx); 6502 struct ixgbe_hw *hw = &sc->hw; 6503 device_t dev = sc->dev; 6504 struct sbuf *buf; 6505 int error = 0; 6506 6507 buf = sbuf_new_auto(); 6508 if (!buf) { 6509 device_printf(dev, "Could not allocate sbuf for output.\n"); 6510 return; 6511 } 6512 6513 ixgbe_sbuf_fw_version(hw, buf); 6514 6515 error = sbuf_finish(buf); 6516 if (error) 6517 device_printf(dev, "Error finishing sbuf: %d\n", error); 6518 else if (sbuf_len(buf)) 6519 device_printf(dev, "%s\n", sbuf_data(buf)); 6520 6521 sbuf_delete(buf); 6522 } /* ixgbe_print_fw_version */ 6523 6524 /************************************************************************ 6525 * ixgbe_sysctl_print_fw_version 6526 ************************************************************************/ 6527 static int 6528 ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS) 6529 { 6530 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6531 struct ixgbe_hw *hw = &sc->hw; 6532 device_t dev = sc->dev; 6533 struct sbuf *buf; 6534 int error = 0; 6535 6536 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 6537 if (!buf) { 6538 device_printf(dev, "Could not allocate sbuf for output.\n"); 6539 return (ENOMEM); 6540 } 6541 6542 ixgbe_sbuf_fw_version(hw, buf); 6543 6544 error = sbuf_finish(buf); 6545 if (error) 6546 device_printf(dev, "Error finishing sbuf: %d\n", error); 6547 6548 sbuf_delete(buf); 6549 6550 return (0); 6551 } /* ixgbe_sysctl_print_fw_version */ 6552