1 /***************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *****************************************************************************/ 33 34 #include "opt_inet.h" 35 #include "opt_inet6.h" 36 #include "opt_rss.h" 37 38 #include "ixgbe.h" 39 #include "mdio_if.h" 40 #include "ixgbe_sriov.h" 41 #include "ifdi_if.h" 42 #include "if_ix_mdio_hw.h" 43 #include "if_ix_mdio.h" 44 45 #include <net/netmap.h> 46 #include <dev/mdio/mdio.h> 47 #include <dev/netmap/netmap_kern.h> 48 49 /************************************************************************ 50 * Driver version 51 ************************************************************************/ 52 static const char ixgbe_driver_version[] = "5.0.1-k"; 53 54 /* Bound one admin-task invocation while still coalescing new requests. */ 55 #define IXGBE_ADMIN_TASK_BUDGET 8 56 57 /************************************************************************ 58 * PCI Device ID Table 59 * 60 * Used by probe to select devices to load on 61 * Last field stores an index into ixgbe_strings 62 * Last entry must be all 0s 63 * 64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 65 ************************************************************************/ 66 static const pci_vendor_info_t ixgbe_vendor_info_array[] = 67 { 68 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 69 "Intel(R) 82598EB AF (Dual Fiber)"), 70 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 71 "Intel(R) 82598EB AF (Fiber)"), 72 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 73 "Intel(R) 82598EB AT (CX4)"), 74 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 75 "Intel(R) 82598EB AT"), 76 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 77 "Intel(R) 82598EB AT2"), 78 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, "Intel(R) 82598"), 79 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 80 "Intel(R) 82598EB AF DA (Dual Fiber)"), 81 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 82 "Intel(R) 82598EB AT (Dual CX4)"), 83 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 84 "Intel(R) 82598EB AF (Dual Fiber LR)"), 85 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 86 "Intel(R) 82598EB AF (Dual Fiber SR)"), 87 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 88 "Intel(R) 82598EB LOM"), 89 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 90 "Intel(R) X520 82599 (KX4)"), 91 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 92 "Intel(R) X520 82599 (KX4 Mezzanine)"), 93 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 94 "Intel(R) X520 82599ES (SFI/SFP+)"), 95 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 96 "Intel(R) X520 82599 (XAUI/BX4)"), 97 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 98 "Intel(R) X520 82599 (Dual CX4)"), 99 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 100 "Intel(R) X520-T 82599 LOM"), 101 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 102 "Intel(R) X520 82599 LS"), 103 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 104 "Intel(R) X520 82599 (Combined Backplane)"), 105 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 106 "Intel(R) X520 82599 (Backplane w/FCoE)"), 107 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 108 "Intel(R) X520 82599 (Dual SFP+)"), 109 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 110 "Intel(R) X520 82599 (Dual SFP+ w/FCoE)"), 111 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 112 "Intel(R) X520-1 82599EN (SFP+)"), 113 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 114 "Intel(R) X520-4 82599 (Quad SFP+)"), 115 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 116 "Intel(R) X520-Q1 82599 (QSFP+)"), 117 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 118 "Intel(R) X540-AT2"), 119 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"), 120 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"), 121 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"), 122 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 123 "Intel(R) X552 (KR Backplane)"), 124 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 125 "Intel(R) X552 (KX4 Backplane)"), 126 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 127 "Intel(R) X552/X557-AT (10GBASE-T)"), 128 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 129 "Intel(R) X552 (1000BASE-T)"), 130 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 131 "Intel(R) X552 (SFP+)"), 132 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 133 "Intel(R) X553 (KR Backplane)"), 134 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 135 "Intel(R) X553 L (KR Backplane)"), 136 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 137 "Intel(R) X553 (SFP+)"), 138 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 139 "Intel(R) X553 N (SFP+)"), 140 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 141 "Intel(R) X553 (1GbE SGMII)"), 142 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 143 "Intel(R) X553 L (1GbE SGMII)"), 144 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 145 "Intel(R) X553/X557-AT (10GBASE-T)"), 146 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 147 "Intel(R) X553 (1GbE)"), 148 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 149 "Intel(R) X553 L (1GbE)"), 150 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 151 "Intel(R) X540-T2 (Bypass)"), 152 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 153 "Intel(R) X520 82599 (Bypass)"), 154 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_BACKPLANE, 155 "Intel(R) E610 (Backplane)"), 156 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SFP, 157 "Intel(R) E610 (SFP)"), 158 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_2_5G_T, 159 "Intel(R) E610 (2.5 GbE)"), 160 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_10G_T, 161 "Intel(R) E610 (10 GbE)"), 162 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SGMII, 163 "Intel(R) E610 (SGMII)"), 164 /* required last entry */ 165 PVID_END 166 }; 167 168 static void *ixgbe_register(device_t); 169 static int ixgbe_if_attach_pre(if_ctx_t); 170 static int ixgbe_if_attach_post(if_ctx_t); 171 static int ixgbe_if_detach(if_ctx_t); 172 static int ixgbe_if_shutdown(if_ctx_t); 173 static int ixgbe_if_suspend(if_ctx_t); 174 static int ixgbe_if_resume(if_ctx_t); 175 #ifdef PCI_IOV 176 static int ixgbe_device_iov_init(device_t, uint16_t, const nvlist_t *); 177 #endif 178 179 static void ixgbe_if_stop(if_ctx_t); 180 void ixgbe_if_enable_intr(if_ctx_t); 181 static void ixgbe_if_disable_intr(if_ctx_t); 182 static void ixgbe_link_intr_enable(if_ctx_t); 183 static int ixgbe_if_rx_queue_intr_enable(if_ctx_t, uint16_t); 184 static void ixgbe_if_media_status(if_ctx_t, struct ifmediareq *); 185 static int ixgbe_if_media_change(if_ctx_t); 186 static int ixgbe_if_msix_intr_assign(if_ctx_t, int); 187 static int ixgbe_if_mtu_set(if_ctx_t, uint32_t); 188 static void ixgbe_if_crcstrip_set(if_ctx_t, int, int); 189 static void ixgbe_if_multi_set(if_ctx_t); 190 static int ixgbe_if_promisc_set(if_ctx_t, int); 191 static int ixgbe_if_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 192 int); 193 static int ixgbe_if_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 194 int); 195 static void ixgbe_if_queues_free(if_ctx_t); 196 static void ixgbe_if_timer(if_ctx_t, uint16_t); 197 static const char *ixgbe_link_speed_to_str(u32 link_speed); 198 static void ixgbe_if_update_admin_status(if_ctx_t); 199 static void ixgbe_if_vlan_register(if_ctx_t, u16); 200 static void ixgbe_if_vlan_unregister(if_ctx_t, u16); 201 static int ixgbe_if_i2c_req(if_ctx_t, struct ifi2creq *); 202 static bool ixgbe_if_needs_restart(if_ctx_t, enum iflib_restart_event); 203 static void ixgbe_if_led_func(if_ctx_t, int); 204 static void ixgbe_led_restore(struct ixgbe_softc *); 205 int ixgbe_intr(void *); 206 207 static int ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data); 208 209 /************************************************************************ 210 * Function prototypes 211 ************************************************************************/ 212 static uint64_t ixgbe_if_get_counter(if_ctx_t, ift_counter); 213 214 static void ixgbe_enable_queue(struct ixgbe_softc *, u32); 215 static void ixgbe_disable_queue(struct ixgbe_softc *, u32); 216 static void ixgbe_add_device_sysctls(if_ctx_t); 217 static int ixgbe_allocate_pci_resources(if_ctx_t); 218 static int ixgbe_setup_low_power_mode(if_ctx_t); 219 220 static void ixgbe_config_dmac(struct ixgbe_softc *); 221 static void ixgbe_configure_ivars(struct ixgbe_softc *); 222 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 223 static u8 *ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 224 static bool ixgbe_sfp_probe(if_ctx_t); 225 226 static void ixgbe_free_pci_resources(if_ctx_t); 227 228 static int ixgbe_msix_link(void *); 229 static int ixgbe_msix_que(void *); 230 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 231 static void ixgbe_initialize_receive_units(if_ctx_t); 232 static void ixgbe_initialize_transmit_units(if_ctx_t); 233 234 static int ixgbe_setup_interface(if_ctx_t); 235 static void ixgbe_init_device_features(struct ixgbe_softc *); 236 static void ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 237 static void ixgbe_sbuf_fw_version(struct ixgbe_hw *, struct sbuf *); 238 static void ixgbe_print_fw_version(if_ctx_t); 239 static void ixgbe_add_media_types(if_ctx_t); 240 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 241 static void ixgbe_config_link(if_ctx_t); 242 static void ixgbe_get_slot_info(struct ixgbe_softc *); 243 static void ixgbe_fw_mode_timer(void *); 244 static void ixgbe_check_wol_support(struct ixgbe_softc *); 245 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 246 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 247 248 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 249 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 250 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 251 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 252 static void ixgbe_config_gpie(struct ixgbe_softc *); 253 static void ixgbe_config_delay_values(struct ixgbe_softc *); 254 255 static void ixgbe_add_debug_sysctls(struct ixgbe_softc *sc); 256 static void ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc); 257 static int ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 258 static u8 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, 259 struct sbuf *sbuf, u8 cluster_id); 260 static int ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 261 262 /* Sysctl handlers */ 263 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS); 264 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS); 265 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS); 266 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 267 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 268 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 269 static int ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS); 270 #ifdef IXGBE_DEBUG 271 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 272 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 273 #endif 274 static int ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS); 275 static int ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS); 276 static int ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS); 277 static int ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS); 278 static int ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS); 279 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 280 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 281 static int ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS); 282 283 static int ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS); 284 static int ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS); 285 286 /* Deferred interrupt tasklets */ 287 static void ixgbe_handle_msf(void *); 288 static bool ixgbe_handle_mod(void *); 289 static void ixgbe_handle_phy(void *); 290 static u32 ixgbe_handle_fw_event(void *); 291 292 static int ixgbe_enable_lse(struct ixgbe_softc *sc); 293 static int ixgbe_disable_lse(struct ixgbe_softc *sc); 294 295 /************************************************************************ 296 * FreeBSD Device Interface Entry Points 297 ************************************************************************/ 298 static device_method_t ix_methods[] = { 299 /* Device interface */ 300 DEVMETHOD(device_register, ixgbe_register), 301 DEVMETHOD(device_probe, iflib_device_probe), 302 DEVMETHOD(device_attach, iflib_device_attach), 303 DEVMETHOD(device_detach, iflib_device_detach), 304 DEVMETHOD(device_shutdown, iflib_device_shutdown), 305 DEVMETHOD(device_suspend, iflib_device_suspend), 306 DEVMETHOD(device_resume, iflib_device_resume), 307 #ifdef PCI_IOV 308 DEVMETHOD(pci_iov_init, ixgbe_device_iov_init), 309 DEVMETHOD(pci_iov_uninit, iflib_device_iov_uninit_restart), 310 DEVMETHOD(pci_iov_add_vf, iflib_device_iov_add_vf), 311 #endif /* PCI_IOV */ 312 DEVMETHOD(bus_add_child, device_add_child_ordered), 313 DEVMETHOD(mdio_readreg, ixgbe_mdio_readreg_c22), 314 DEVMETHOD(mdio_writereg, ixgbe_mdio_writereg_c22), 315 316 DEVMETHOD_END 317 }; 318 319 static driver_t ix_driver = { 320 "ix", ix_methods, sizeof(struct ixgbe_softc), 321 }; 322 323 DRIVER_MODULE(mdio, ix, mdio_driver, 0, 0); /* needs to happen before ix */ 324 DRIVER_MODULE_ORDERED(ix, pci, ix_driver, NULL, NULL, SI_ORDER_ANY); /* needs to be last */ 325 IFLIB_PNP_INFO(pci, ix_driver, ixgbe_vendor_info_array); 326 MODULE_DEPEND(ix, pci, 1, 1, 1); 327 MODULE_DEPEND(ix, ether, 1, 1, 1); 328 MODULE_DEPEND(ix, iflib, 1, 1, 1); 329 MODULE_DEPEND(ix, mdio, 1, 1, 1); 330 331 #ifdef PCI_IOV 332 static int 333 ixgbe_device_iov_init(device_t dev, uint16_t num_vfs, 334 const nvlist_t *params) 335 { 336 struct ixgbe_softc *sc; 337 if_ctx_t ctx; 338 int error; 339 340 ctx = device_get_softc(dev); 341 sc = iflib_get_softc(ctx); 342 error = ixgbe_iov_validate(sc, num_vfs); 343 if (error != 0) 344 return (error); 345 return (iflib_device_iov_init_restart(dev, num_vfs, params)); 346 } 347 #endif 348 349 static device_method_t ixgbe_if_methods[] = { 350 DEVMETHOD(ifdi_attach_pre, ixgbe_if_attach_pre), 351 DEVMETHOD(ifdi_attach_post, ixgbe_if_attach_post), 352 DEVMETHOD(ifdi_detach, ixgbe_if_detach), 353 DEVMETHOD(ifdi_shutdown, ixgbe_if_shutdown), 354 DEVMETHOD(ifdi_suspend, ixgbe_if_suspend), 355 DEVMETHOD(ifdi_resume, ixgbe_if_resume), 356 DEVMETHOD(ifdi_init, ixgbe_if_init), 357 DEVMETHOD(ifdi_stop, ixgbe_if_stop), 358 DEVMETHOD(ifdi_msix_intr_assign, ixgbe_if_msix_intr_assign), 359 DEVMETHOD(ifdi_intr_enable, ixgbe_if_enable_intr), 360 DEVMETHOD(ifdi_intr_disable, ixgbe_if_disable_intr), 361 DEVMETHOD(ifdi_link_intr_enable, ixgbe_link_intr_enable), 362 DEVMETHOD(ifdi_tx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 363 DEVMETHOD(ifdi_rx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 364 DEVMETHOD(ifdi_tx_queues_alloc, ixgbe_if_tx_queues_alloc), 365 DEVMETHOD(ifdi_rx_queues_alloc, ixgbe_if_rx_queues_alloc), 366 DEVMETHOD(ifdi_queues_free, ixgbe_if_queues_free), 367 DEVMETHOD(ifdi_update_admin_status, ixgbe_if_update_admin_status), 368 DEVMETHOD(ifdi_multi_set, ixgbe_if_multi_set), 369 DEVMETHOD(ifdi_mtu_set, ixgbe_if_mtu_set), 370 DEVMETHOD(ifdi_crcstrip_set, ixgbe_if_crcstrip_set), 371 DEVMETHOD(ifdi_media_status, ixgbe_if_media_status), 372 DEVMETHOD(ifdi_media_change, ixgbe_if_media_change), 373 DEVMETHOD(ifdi_promisc_set, ixgbe_if_promisc_set), 374 DEVMETHOD(ifdi_timer, ixgbe_if_timer), 375 DEVMETHOD(ifdi_vlan_register, ixgbe_if_vlan_register), 376 DEVMETHOD(ifdi_vlan_unregister, ixgbe_if_vlan_unregister), 377 DEVMETHOD(ifdi_get_counter, ixgbe_if_get_counter), 378 DEVMETHOD(ifdi_i2c_req, ixgbe_if_i2c_req), 379 DEVMETHOD(ifdi_needs_restart, ixgbe_if_needs_restart), 380 DEVMETHOD(ifdi_priv_ioctl, ixgbe_if_priv_ioctl), 381 DEVMETHOD(ifdi_led_func, ixgbe_if_led_func), 382 #ifdef PCI_IOV 383 DEVMETHOD(ifdi_iov_init, ixgbe_if_iov_init), 384 DEVMETHOD(ifdi_iov_uninit, ixgbe_if_iov_uninit), 385 DEVMETHOD(ifdi_iov_vf_add, ixgbe_if_iov_vf_add), 386 #endif /* PCI_IOV */ 387 DEVMETHOD_END 388 }; 389 390 /* 391 * TUNEABLE PARAMETERS: 392 */ 393 394 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 395 "IXGBE driver parameters"); 396 static driver_t ixgbe_if_driver = { 397 "ixgbe_if", ixgbe_if_methods, sizeof(struct ixgbe_softc) 398 }; 399 400 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 401 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 402 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 403 404 /* Flow control setting, default to full */ 405 static int ixgbe_flow_control = ixgbe_fc_full; 406 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 407 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 408 409 /* Advertise Speed, default to 0 (auto) */ 410 static int ixgbe_advertise_speed = 0; 411 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN, 412 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters"); 413 414 /* 415 * Smart speed setting, default to on 416 * this only works as a compile option 417 * right now as its during attach, set 418 * this to 'ixgbe_smart_speed_off' to 419 * disable. 420 */ 421 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 422 423 /* 424 * MSI-X should be the default for best performance, 425 * but this allows it to be forced off for testing. 426 */ 427 static int ixgbe_enable_msix = 1; 428 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 429 0, 430 "Enable MSI-X interrupts"); 431 432 /* 433 * Defining this on will allow the use 434 * of unsupported SFP+ modules, note that 435 * doing so you are on your own :) 436 */ 437 static int allow_unsupported_sfp = false; 438 SYSCTL_INT(_hw_ix, OID_AUTO, unsupported_sfp, CTLFLAG_RDTUN, 439 &allow_unsupported_sfp, 0, 440 "Allow unsupported SFP modules...use at your own risk"); 441 442 /* 443 * Not sure if Flow Director is fully baked, 444 * so we'll default to turning it off. 445 */ 446 static int ixgbe_enable_fdir = 0; 447 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 448 0, 449 "Enable Flow Director"); 450 451 /* Receive-Side Scaling */ 452 static int ixgbe_enable_rss = 1; 453 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 454 0, 455 "Enable Receive-Side Scaling (RSS)"); 456 457 /* 458 * AIM: Adaptive Interrupt Moderation 459 * which means that the interrupt rate 460 * is varied over time based on the 461 * traffic for that interrupt vector 462 */ 463 static int ixgbe_enable_aim = false; 464 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 465 0, 466 "Enable adaptive interrupt moderation"); 467 468 #if 0 469 /* Keep running tab on them for sanity check */ 470 static int ixgbe_total_ports; 471 #endif 472 473 MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 474 475 /* 476 * For Flow Director: this is the number of TX packets we sample 477 * for the filter pool, this means every 20th packet will be probed. 478 * 479 * This feature can be disabled by setting this to 0. 480 */ 481 static int atr_sample_rate = 20; 482 483 extern struct if_txrx ixgbe_txrx; 484 485 static struct if_shared_ctx ixgbe_sctx_init = { 486 .isc_magic = IFLIB_MAGIC, 487 .isc_q_align = PAGE_SIZE,/* max(DBA_ALIGN, PAGE_SIZE) */ 488 .isc_tx_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 489 .isc_tx_maxsegsize = PAGE_SIZE, 490 .isc_tso_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 491 .isc_tso_maxsegsize = PAGE_SIZE, 492 .isc_rx_maxsize = PAGE_SIZE*4, 493 .isc_rx_nsegments = 1, 494 .isc_rx_maxsegsize = PAGE_SIZE*4, 495 .isc_nfl = 1, 496 .isc_ntxqs = 1, 497 .isc_nrxqs = 1, 498 499 .isc_admin_intrcnt = 1, 500 .isc_vendor_info = ixgbe_vendor_info_array, 501 .isc_driver_version = ixgbe_driver_version, 502 .isc_driver = &ixgbe_if_driver, 503 .isc_flags = IFLIB_TSO_INIT_IP, 504 505 .isc_nrxd_min = {MIN_RXD}, 506 .isc_ntxd_min = {MIN_TXD}, 507 .isc_nrxd_max = {MAX_RXD}, 508 .isc_ntxd_max = {MAX_TXD}, 509 .isc_nrxd_default = {DEFAULT_RXD}, 510 .isc_ntxd_default = {DEFAULT_TXD}, 511 }; 512 513 /************************************************************************ 514 * ixgbe_if_tx_queues_alloc 515 ************************************************************************/ 516 static int 517 ixgbe_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 518 int ntxqs, int ntxqsets) 519 { 520 struct ixgbe_softc *sc = iflib_get_softc(ctx); 521 if_softc_ctx_t scctx = sc->shared; 522 struct ix_tx_queue *que; 523 int i, j, error; 524 525 MPASS(sc->num_tx_queues > 0); 526 MPASS(sc->num_tx_queues == ntxqsets); 527 MPASS(ntxqs == 1); 528 529 /* Allocate queue structure memory */ 530 sc->tx_queues = 531 (struct ix_tx_queue *)malloc(sizeof(struct ix_tx_queue) * 532 ntxqsets, M_IXGBE, M_NOWAIT | M_ZERO); 533 if (!sc->tx_queues) { 534 device_printf(iflib_get_dev(ctx), 535 "Unable to allocate TX ring memory\n"); 536 return (ENOMEM); 537 } 538 539 for (i = 0, que = sc->tx_queues; i < ntxqsets; i++, que++) { 540 struct tx_ring *txr = &que->txr; 541 542 /* In case SR-IOV is enabled, align the index properly */ 543 txr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 544 545 txr->sc = que->sc = sc; 546 547 /* Allocate report status array */ 548 txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) * 549 scctx->isc_ntxd[0], M_IXGBE, M_NOWAIT | M_ZERO); 550 if (txr->tx_rsq == NULL) { 551 error = ENOMEM; 552 goto fail; 553 } 554 for (j = 0; j < scctx->isc_ntxd[0]; j++) 555 txr->tx_rsq[j] = QIDX_INVALID; 556 /* get virtual and physical address of the hardware queues */ 557 txr->tail = IXGBE_TDT(txr->me); 558 txr->tx_base = (union ixgbe_adv_tx_desc *)vaddrs[i]; 559 txr->tx_paddr = paddrs[i]; 560 561 txr->bytes = 0; 562 txr->total_packets = 0; 563 564 /* Set the rate at which we sample packets */ 565 if (sc->feat_en & IXGBE_FEATURE_FDIR) 566 txr->atr_sample = atr_sample_rate; 567 568 } 569 570 device_printf(iflib_get_dev(ctx), "allocated for %d queues\n", 571 sc->num_tx_queues); 572 573 return (0); 574 575 fail: 576 ixgbe_if_queues_free(ctx); 577 578 return (error); 579 } /* ixgbe_if_tx_queues_alloc */ 580 581 /************************************************************************ 582 * ixgbe_if_rx_queues_alloc 583 ************************************************************************/ 584 static int 585 ixgbe_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 586 int nrxqs, int nrxqsets) 587 { 588 struct ixgbe_softc *sc = iflib_get_softc(ctx); 589 struct ix_rx_queue *que; 590 int i; 591 592 MPASS(sc->num_rx_queues > 0); 593 MPASS(sc->num_rx_queues == nrxqsets); 594 MPASS(nrxqs == 1); 595 596 /* Allocate queue structure memory */ 597 sc->rx_queues = 598 (struct ix_rx_queue *)malloc(sizeof(struct ix_rx_queue)*nrxqsets, 599 M_IXGBE, M_NOWAIT | M_ZERO); 600 if (!sc->rx_queues) { 601 device_printf(iflib_get_dev(ctx), 602 "Unable to allocate TX ring memory\n"); 603 return (ENOMEM); 604 } 605 606 for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) { 607 struct rx_ring *rxr = &que->rxr; 608 609 /* In case SR-IOV is enabled, align the index properly */ 610 rxr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 611 612 rxr->sc = que->sc = sc; 613 614 /* get the virtual and physical address of the hw queues */ 615 rxr->tail = IXGBE_RDT(rxr->me); 616 rxr->rx_base = (union ixgbe_adv_rx_desc *)vaddrs[i]; 617 rxr->rx_paddr = paddrs[i]; 618 rxr->bytes = 0; 619 rxr->que = que; 620 } 621 622 device_printf(iflib_get_dev(ctx), "allocated for %d rx queues\n", 623 sc->num_rx_queues); 624 625 return (0); 626 } /* ixgbe_if_rx_queues_alloc */ 627 628 /************************************************************************ 629 * ixgbe_if_queues_free 630 ************************************************************************/ 631 static void 632 ixgbe_if_queues_free(if_ctx_t ctx) 633 { 634 struct ixgbe_softc *sc = iflib_get_softc(ctx); 635 struct ix_tx_queue *tx_que = sc->tx_queues; 636 struct ix_rx_queue *rx_que = sc->rx_queues; 637 int i; 638 639 if (tx_que != NULL) { 640 for (i = 0; i < sc->num_tx_queues; i++, tx_que++) { 641 struct tx_ring *txr = &tx_que->txr; 642 if (txr->tx_rsq == NULL) 643 break; 644 645 free(txr->tx_rsq, M_IXGBE); 646 txr->tx_rsq = NULL; 647 } 648 649 free(sc->tx_queues, M_IXGBE); 650 sc->tx_queues = NULL; 651 } 652 if (rx_que != NULL) { 653 free(sc->rx_queues, M_IXGBE); 654 sc->rx_queues = NULL; 655 } 656 } /* ixgbe_if_queues_free */ 657 658 /************************************************************************ 659 * ixgbe_initialize_rss_mapping 660 ************************************************************************/ 661 static void 662 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 663 { 664 struct ixgbe_hw *hw = &sc->hw; 665 u32 reta = 0, mrqc, rss_key[10]; 666 int queue_id, reta_queues, table_size, index_mult; 667 int i, j; 668 u32 rss_hash_config; 669 670 if (sc->feat_en & IXGBE_FEATURE_RSS) { 671 /* Fetch the configured RSS key */ 672 rss_getkey((uint8_t *)&rss_key); 673 } else { 674 /* set up random bits */ 675 arc4rand(&rss_key, sizeof(rss_key), 0); 676 } 677 678 /* Set multiplier for RETA setup and table size based on MAC */ 679 index_mult = 0x1; 680 table_size = 128; 681 switch (sc->hw.mac.type) { 682 case ixgbe_mac_82598EB: 683 index_mult = 0x11; 684 break; 685 case ixgbe_mac_X550: 686 case ixgbe_mac_X550EM_x: 687 case ixgbe_mac_X550EM_a: 688 case ixgbe_mac_E610: 689 table_size = 512; 690 break; 691 default: 692 break; 693 } 694 695 /* 696 * The global RETA is shared by the PF and VFs on 82599 and X540. 697 * Program all four queue indices while SR-IOV is active so a VF can 698 * use its full queue grant even when the PF uses fewer queues. 699 * PSRTYPE.RQPL limits the subset selected within each pool. 700 */ 701 reta_queues = sc->num_rx_queues; 702 #ifdef PCI_IOV 703 if (sc->iov_mode != IXGBE_NO_VM) 704 reta_queues = MAX(reta_queues, 4); 705 #endif 706 707 /* Set up the redirection table */ 708 for (i = 0, j = 0; i < table_size; i++, j++) { 709 if (j == reta_queues) 710 j = 0; 711 712 if (sc->feat_en & IXGBE_FEATURE_RSS) { 713 /* 714 * Fetch the RSS bucket id for the given indirection 715 * entry. Cap it at the number of queue indices that must 716 * be represented in the shared table. 717 */ 718 queue_id = rss_get_indirection_to_bucket(i); 719 queue_id = queue_id % reta_queues; 720 } else 721 queue_id = (j * index_mult); 722 723 /* 724 * The low 8 bits are for hash value (n+0); 725 * The next 8 bits are for hash value (n+1), etc. 726 */ 727 reta = reta >> 8; 728 reta = reta | (((uint32_t)queue_id) << 24); 729 if ((i & 3) == 3) { 730 if (i < 128) 731 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 732 else 733 IXGBE_WRITE_REG(hw, 734 IXGBE_ERETA((i >> 2) - 32), reta); 735 reta = 0; 736 } 737 } 738 739 /* Now fill our hash function seeds */ 740 for (i = 0; i < 10; i++) 741 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 742 743 /* Perform hash on these packet types */ 744 if (sc->feat_en & IXGBE_FEATURE_RSS) 745 rss_hash_config = rss_gethashconfig(); 746 else { 747 /* 748 * Disable UDP - IP fragments aren't currently being handled 749 * and so we end up with a mix of 2-tuple and 4-tuple 750 * traffic. 751 */ 752 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 | 753 RSS_HASHTYPE_RSS_TCP_IPV4 | 754 RSS_HASHTYPE_RSS_IPV6 | 755 RSS_HASHTYPE_RSS_TCP_IPV6 | 756 RSS_HASHTYPE_RSS_IPV6_EX | 757 RSS_HASHTYPE_RSS_TCP_IPV6_EX; 758 } 759 760 mrqc = ixgbe_get_mrqc(sc->iov_mode); 761 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 762 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 763 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 764 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 765 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 766 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 767 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 768 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 769 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 770 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 771 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 772 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 773 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 774 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 775 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 776 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 777 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 778 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 779 780 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 781 } /* ixgbe_initialize_rss_mapping */ 782 783 /************************************************************************ 784 * ixgbe_initialize_receive_units - Setup receive registers and features. 785 ************************************************************************/ 786 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 787 788 static void 789 ixgbe_initialize_receive_units(if_ctx_t ctx) 790 { 791 struct ixgbe_softc *sc = iflib_get_softc(ctx); 792 if_softc_ctx_t scctx = sc->shared; 793 struct ixgbe_hw *hw = &sc->hw; 794 if_t ifp = iflib_get_ifp(ctx); 795 struct ix_rx_queue *que; 796 int i, j; 797 u32 bufsz, fctrl, srrctl, rxcsum; 798 u32 hlreg; 799 800 /* 801 * Make sure receives are disabled while 802 * setting up the descriptor ring 803 */ 804 ixgbe_disable_rx(hw); 805 806 /* Enable broadcasts */ 807 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 808 fctrl |= IXGBE_FCTRL_BAM; 809 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 810 fctrl |= IXGBE_FCTRL_DPF; 811 fctrl |= IXGBE_FCTRL_PMCF; 812 } 813 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 814 815 /* Set for Jumbo Frames? */ 816 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 817 if (if_getmtu(ifp) > ETHERMTU) 818 hlreg |= IXGBE_HLREG0_JUMBOEN; 819 else 820 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 821 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 822 823 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 824 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 825 826 /* Setup the Base and Length of the Rx Descriptor Ring */ 827 for (i = 0, que = sc->rx_queues; i < sc->num_rx_queues; i++, que++) { 828 struct rx_ring *rxr = &que->rxr; 829 u64 rdba = rxr->rx_paddr; 830 831 j = rxr->me; 832 833 /* Setup the Base and Length of the Rx Descriptor Ring */ 834 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 835 (rdba & 0x00000000ffffffffULL)); 836 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 837 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 838 scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc)); 839 840 /* Set up the SRRCTL register */ 841 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 842 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 843 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 844 srrctl |= bufsz; 845 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 846 847 /* 848 * Set DROP_EN iff we have no flow control and >1 queue. 849 * Note that srrctl was cleared shortly before during reset, 850 * so we do not need to clear the bit, but do it just in case 851 * this code is moved elsewhere. 852 */ 853 if (sc->num_rx_queues > 1 && 854 sc->hw.fc.requested_mode == ixgbe_fc_none) { 855 srrctl |= IXGBE_SRRCTL_DROP_EN; 856 } else { 857 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 858 } 859 860 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 861 862 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 863 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 864 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 865 866 /* Set the driver rx tail address */ 867 rxr->tail = IXGBE_RDT(rxr->me); 868 } 869 870 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 871 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 872 IXGBE_PSRTYPE_UDPHDR | 873 IXGBE_PSRTYPE_IPV4HDR | 874 IXGBE_PSRTYPE_IPV6HDR; 875 876 /* 877 * In VMDq+RSS mode PSRTYPE is per pool, and RQPL controls 878 * how many receive queues RSS may select within that pool. 879 * The PF occupies the last pool rather than pool zero. 880 */ 881 #ifdef PCI_IOV 882 if (sc->iov_mode != IXGBE_NO_VM) { 883 if (sc->num_rx_queues > 3) 884 psrtype |= 2u << IXGBE_PSRTYPE_RQPL_SHIFT; 885 else if (sc->num_rx_queues > 1) 886 psrtype |= 1u << IXGBE_PSRTYPE_RQPL_SHIFT; 887 } 888 #endif 889 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(sc->pool), psrtype); 890 } 891 892 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 893 894 ixgbe_initialize_rss_mapping(sc); 895 896 if (sc->feat_en & IXGBE_FEATURE_RSS) { 897 /* RSS and RX IPP Checksum are mutually exclusive */ 898 rxcsum |= IXGBE_RXCSUM_PCSD; 899 } 900 901 if (if_getcapenable(ifp) & IFCAP_RXCSUM) 902 rxcsum |= IXGBE_RXCSUM_PCSD; 903 904 /* This is useful for calculating UDP/IP fragment checksums */ 905 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 906 rxcsum |= IXGBE_RXCSUM_IPPCSE; 907 908 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 909 910 } /* ixgbe_initialize_receive_units */ 911 912 /************************************************************************ 913 * ixgbe_initialize_transmit_units - Enable transmit units. 914 ************************************************************************/ 915 static void 916 ixgbe_initialize_transmit_units(if_ctx_t ctx) 917 { 918 struct ixgbe_softc *sc = iflib_get_softc(ctx); 919 struct ixgbe_hw *hw = &sc->hw; 920 if_softc_ctx_t scctx = sc->shared; 921 struct ix_tx_queue *que; 922 int i; 923 924 /* Setup the Base and Length of the Tx Descriptor Ring */ 925 for (i = 0, que = sc->tx_queues; i < sc->num_tx_queues; 926 i++, que++) { 927 struct tx_ring *txr = &que->txr; 928 u64 tdba = txr->tx_paddr; 929 u32 txctrl = 0; 930 int j = txr->me; 931 932 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 933 (tdba & 0x00000000ffffffffULL)); 934 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 935 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 936 scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc)); 937 938 /* Setup the HW Tx Head and Tail descriptor pointers */ 939 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 940 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 941 942 /* Cache the tail address */ 943 txr->tail = IXGBE_TDT(txr->me); 944 945 txr->tx_rs_cidx = txr->tx_rs_pidx; 946 txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1; 947 for (int k = 0; k < scctx->isc_ntxd[0]; k++) 948 txr->tx_rsq[k] = QIDX_INVALID; 949 950 /* Disable Head Writeback */ 951 /* 952 * Note: for X550 series devices, these registers are actually 953 * prefixed with TPH_ isntead of DCA_, but the addresses and 954 * fields remain the same. 955 */ 956 switch (hw->mac.type) { 957 case ixgbe_mac_82598EB: 958 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 959 break; 960 default: 961 txctrl = 962 IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 963 break; 964 } 965 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 966 switch (hw->mac.type) { 967 case ixgbe_mac_82598EB: 968 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 969 break; 970 default: 971 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), 972 txctrl); 973 break; 974 } 975 976 } 977 978 if (hw->mac.type != ixgbe_mac_82598EB) { 979 u32 dmatxctl, rttdcs; 980 981 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 982 dmatxctl |= IXGBE_DMATXCTL_TE; 983 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 984 /* Disable arbiter to set MTQC */ 985 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 986 rttdcs |= IXGBE_RTTDCS_ARBDIS; 987 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 988 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 989 ixgbe_get_mtqc(sc->iov_mode)); 990 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 991 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 992 } 993 994 } /* ixgbe_initialize_transmit_units */ 995 996 static int 997 ixgbe_check_fw_api_version(struct ixgbe_softc *sc) 998 { 999 struct ixgbe_hw *hw = &sc->hw; 1000 if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) { 1001 device_printf(sc->dev, 1002 "The driver for the device stopped because the NVM " 1003 "image is newer than expected. You must install the " 1004 "most recent version of the network driver.\n"); 1005 return (EOPNOTSUPP); 1006 } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR && 1007 hw->api_min_ver > (IXGBE_FW_API_VER_MINOR + 2)) { 1008 device_printf(sc->dev, 1009 "The driver for the device detected a newer version of " 1010 "the NVM image than expected. Please install the most " 1011 "recent version of the network driver.\n"); 1012 } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR || 1013 hw->api_min_ver < IXGBE_FW_API_VER_MINOR - 2) { 1014 device_printf(sc->dev, 1015 "The driver for the device detected an older version " 1016 "of the NVM image than expected. " 1017 "Please update the NVM image.\n"); 1018 } 1019 return (0); 1020 } 1021 1022 /************************************************************************ 1023 * ixgbe_register 1024 ************************************************************************/ 1025 static void * 1026 ixgbe_register(device_t dev) 1027 { 1028 return (&ixgbe_sctx_init); 1029 } /* ixgbe_register */ 1030 1031 /************************************************************************ 1032 * ixgbe_if_attach_pre - Device initialization routine, part 1 1033 * 1034 * Called when the driver is being loaded. 1035 * Identifies the type of hardware, initializes the hardware, 1036 * and initializes iflib structures. 1037 * 1038 * return 0 on success, positive on failure 1039 ************************************************************************/ 1040 static int 1041 ixgbe_if_attach_pre(if_ctx_t ctx) 1042 { 1043 struct ixgbe_softc *sc; 1044 device_t dev; 1045 if_softc_ctx_t scctx; 1046 struct ixgbe_hw *hw; 1047 int error = 0; 1048 u32 ctrl_ext; 1049 size_t i; 1050 1051 INIT_DEBUGOUT("ixgbe_attach: begin"); 1052 1053 /* Allocate, clear, and link in our adapter structure */ 1054 dev = iflib_get_dev(ctx); 1055 sc = iflib_get_softc(ctx); 1056 sc->hw.back = sc; 1057 sc->ctx = ctx; 1058 sc->dev = dev; 1059 scctx = sc->shared = iflib_get_softc_ctx(ctx); 1060 sc->media = iflib_get_media(ctx); 1061 hw = &sc->hw; 1062 1063 /* Determine hardware revision */ 1064 hw->vendor_id = pci_get_vendor(dev); 1065 hw->device_id = pci_get_device(dev); 1066 hw->revision_id = pci_get_revid(dev); 1067 hw->subsystem_vendor_id = pci_get_subvendor(dev); 1068 hw->subsystem_device_id = pci_get_subdevice(dev); 1069 1070 /* Do base PCI setup - map BAR0 */ 1071 if (ixgbe_allocate_pci_resources(ctx)) { 1072 device_printf(dev, "Allocation of PCI resources failed\n"); 1073 return (ENXIO); 1074 } 1075 1076 /* let hardware know driver is loaded */ 1077 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1078 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 1079 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 1080 1081 /* 1082 * Initialize the shared code 1083 */ 1084 if (ixgbe_init_shared_code(hw) != 0) { 1085 device_printf(dev, "Unable to initialize the shared code\n"); 1086 error = ENXIO; 1087 goto err_pci; 1088 } 1089 1090 if (hw->mac.type == ixgbe_mac_E610) 1091 ixgbe_init_aci(hw); 1092 1093 sc->do_debug_dump = false; 1094 1095 if (hw->mac.ops.fw_recovery_mode && 1096 hw->mac.ops.fw_recovery_mode(hw)) { 1097 device_printf(dev, 1098 "Firmware recovery mode detected. Limiting " 1099 "functionality.\nRefer to the Intel(R) Ethernet Adapters " 1100 "and Devices User Guide for details on firmware recovery " 1101 "mode."); 1102 error = ENOSYS; 1103 goto err_pci; 1104 } 1105 1106 /* 82598 Does not support SR-IOV, initialize everything else */ 1107 if (hw->mac.type >= ixgbe_mac_82599_vf) { 1108 for (i = 0; i < sc->num_vfs; i++) 1109 hw->mbx.ops[i].init_params(hw); 1110 } 1111 1112 hw->allow_unsupported_sfp = allow_unsupported_sfp; 1113 1114 if (hw->mac.type != ixgbe_mac_82598EB) 1115 hw->phy.smart_speed = ixgbe_smart_speed; 1116 1117 ixgbe_init_device_features(sc); 1118 1119 /* Enable WoL (if supported) */ 1120 ixgbe_check_wol_support(sc); 1121 1122 /* Verify adapter fan is still functional (if applicable) */ 1123 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 1124 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 1125 ixgbe_check_fan_failure(sc, esdp, false); 1126 } 1127 1128 /* Ensure SW/FW semaphore is free */ 1129 ixgbe_init_swfw_semaphore(hw); 1130 1131 /* Enable EEE power saving */ 1132 if (sc->feat_en & IXGBE_FEATURE_EEE) 1133 hw->mac.ops.setup_eee(hw, true); 1134 1135 /* Set an initial default flow control value */ 1136 hw->fc.requested_mode = ixgbe_flow_control; 1137 1138 hw->phy.reset_if_overtemp = true; 1139 error = ixgbe_reset_hw(hw); 1140 hw->phy.reset_if_overtemp = false; 1141 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 1142 /* 1143 * No optics in this port, set up 1144 * so the timer routine will probe 1145 * for later insertion. 1146 */ 1147 sc->sfp_probe = true; 1148 error = 0; 1149 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1150 device_printf(dev, "Unsupported SFP+ module detected!\n"); 1151 error = EIO; 1152 goto err_pci; 1153 } else if (error) { 1154 device_printf(dev, "Hardware initialization failed\n"); 1155 error = EIO; 1156 goto err_pci; 1157 } 1158 1159 /* Make sure we have a good EEPROM before we read from it */ 1160 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1161 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 1162 error = EIO; 1163 goto err_pci; 1164 } 1165 1166 error = ixgbe_start_hw(hw); 1167 switch (error) { 1168 case IXGBE_ERR_EEPROM_VERSION: 1169 device_printf(dev, 1170 "This device is a pre-production adapter/LOM. Please be" 1171 " aware there may be issues associated with your" 1172 " hardware.\nIf you are experiencing problems please" 1173 " contact your Intel or hardware representative who" 1174 " provided you with this hardware.\n"); 1175 break; 1176 case IXGBE_ERR_SFP_NOT_SUPPORTED: 1177 device_printf(dev, "Unsupported SFP+ Module\n"); 1178 error = EIO; 1179 goto err_pci; 1180 case IXGBE_ERR_SFP_NOT_PRESENT: 1181 device_printf(dev, "No SFP+ Module found\n"); 1182 /* falls thru */ 1183 default: 1184 break; 1185 } 1186 1187 /* Check the FW API version and enable FW logging support for E610 */ 1188 if (hw->mac.type == ixgbe_mac_E610) { 1189 if (ixgbe_check_fw_api_version(sc)) { 1190 error = EIO; 1191 goto err_pci; 1192 } 1193 ixgbe_fwlog_set_support_ena(hw); 1194 } 1195 1196 /* Most of the iflib initialization... */ 1197 1198 iflib_set_mac(ctx, hw->mac.addr); 1199 switch (sc->hw.mac.type) { 1200 case ixgbe_mac_X550: 1201 case ixgbe_mac_X550EM_x: 1202 case ixgbe_mac_X550EM_a: 1203 scctx->isc_rss_table_size = 512; 1204 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 64; 1205 break; 1206 default: 1207 scctx->isc_rss_table_size = 128; 1208 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 16; 1209 } 1210 1211 /* Allow legacy interrupts */ 1212 ixgbe_txrx.ift_legacy_intr = ixgbe_intr; 1213 1214 scctx->isc_txqsizes[0] = 1215 roundup2(scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc) + 1216 sizeof(u32), DBA_ALIGN), 1217 scctx->isc_rxqsizes[0] = 1218 roundup2(scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc), 1219 DBA_ALIGN); 1220 1221 /* XXX */ 1222 scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO | 1223 CSUM_IP6_TCP | CSUM_IP6_UDP | CSUM_IP6_TSO; 1224 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 1225 scctx->isc_tx_nsegments = IXGBE_82598_SCATTER; 1226 } else { 1227 scctx->isc_tx_csum_flags |= CSUM_SCTP |CSUM_IP6_SCTP; 1228 scctx->isc_tx_nsegments = IXGBE_82599_SCATTER; 1229 } 1230 1231 scctx->isc_msix_bar = pci_msix_table_bar(dev); 1232 1233 scctx->isc_tx_tso_segments_max = scctx->isc_tx_nsegments; 1234 scctx->isc_tx_tso_size_max = IXGBE_TSO_SIZE; 1235 scctx->isc_tx_tso_segsize_max = PAGE_SIZE; 1236 1237 scctx->isc_txrx = &ixgbe_txrx; 1238 1239 scctx->isc_capabilities = scctx->isc_capenable = IXGBE_CAPS; 1240 1241 return (0); 1242 1243 err_pci: 1244 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1245 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1246 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1247 ixgbe_free_pci_resources(ctx); 1248 1249 if (hw->mac.type == ixgbe_mac_E610) 1250 ixgbe_shutdown_aci(hw); 1251 1252 return (error); 1253 } /* ixgbe_if_attach_pre */ 1254 1255 /********************************************************************* 1256 * ixgbe_if_attach_post - Device initialization routine, part 2 1257 * 1258 * Called during driver load, but after interrupts and 1259 * resources have been allocated and configured. 1260 * Sets up some data structures not relevant to iflib. 1261 * 1262 * return 0 on success, positive on failure 1263 *********************************************************************/ 1264 static int 1265 ixgbe_if_attach_post(if_ctx_t ctx) 1266 { 1267 device_t dev; 1268 struct ixgbe_softc *sc; 1269 struct ixgbe_hw *hw; 1270 int error = 0; 1271 1272 dev = iflib_get_dev(ctx); 1273 sc = iflib_get_softc(ctx); 1274 hw = &sc->hw; 1275 ixgbe_init_iov_recovery(sc); 1276 1277 if (sc->intr_type == IFLIB_INTR_LEGACY && 1278 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) == 0) { 1279 device_printf(dev, "Device does not support legacy interrupts"); 1280 error = ENXIO; 1281 goto err; 1282 } 1283 1284 /* Allocate multicast array memory. */ 1285 sc->mta = malloc(sizeof(*sc->mta) * MAX_NUM_MULTICAST_ADDRESSES, 1286 M_IXGBE, M_NOWAIT); 1287 if (sc->mta == NULL) { 1288 device_printf(dev, 1289 "Can not allocate multicast setup array\n"); 1290 error = ENOMEM; 1291 goto err; 1292 } 1293 1294 /* hw.ix defaults init */ 1295 ixgbe_set_advertise(sc, ixgbe_advertise_speed); 1296 1297 /* Enable the optics for 82599 SFP+ fiber */ 1298 ixgbe_enable_tx_laser(hw); 1299 1300 /* Enable power to the phy. */ 1301 ixgbe_set_phy_power(hw, true); 1302 1303 ixgbe_initialize_iov(sc); 1304 1305 error = ixgbe_setup_interface(ctx); 1306 if (error) { 1307 device_printf(dev, "Interface setup failed: %d\n", error); 1308 goto err; 1309 } 1310 1311 ixgbe_if_update_admin_status(ctx); 1312 1313 /* Initialize statistics */ 1314 ixgbe_update_stats_counters(sc); 1315 ixgbe_add_hw_stats(sc); 1316 1317 /* Check PCIE slot type/speed/width */ 1318 ixgbe_get_slot_info(sc); 1319 1320 /* 1321 * Do time init and sysctl init here, but 1322 * only on the first port of a bypass sc. 1323 */ 1324 ixgbe_bypass_init(sc); 1325 1326 /* Display NVM and Option ROM versions */ 1327 ixgbe_print_fw_version(ctx); 1328 1329 /* Set an initial dmac value */ 1330 sc->dmac = 0; 1331 /* Set initial advertised speeds (if applicable) */ 1332 sc->advertise = ixgbe_get_default_advertise(sc); 1333 1334 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1335 ixgbe_define_iov_schemas(dev, &error); 1336 1337 /* Add sysctls */ 1338 ixgbe_add_device_sysctls(ctx); 1339 1340 /* Add MDIO bus if required / supported */ 1341 ixgbe_mdio_attach(sc); 1342 1343 /* Init recovery mode timer and state variable */ 1344 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1345 sc->recovery_mode = 0; 1346 1347 /* Set up the timer callout */ 1348 callout_init(&sc->fw_mode_timer, true); 1349 1350 /* Start the task */ 1351 callout_reset(&sc->fw_mode_timer, hz, ixgbe_fw_mode_timer, sc); 1352 } 1353 1354 return (0); 1355 err: 1356 return (error); 1357 } /* ixgbe_if_attach_post */ 1358 1359 /************************************************************************ 1360 * ixgbe_check_wol_support 1361 * 1362 * Checks whether the adapter's ports are capable of 1363 * Wake On LAN by reading the adapter's NVM. 1364 * 1365 * Sets each port's hw->wol_enabled value depending 1366 * on the value read here. 1367 ************************************************************************/ 1368 static void 1369 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1370 { 1371 struct ixgbe_hw *hw = &sc->hw; 1372 u16 dev_caps = 0; 1373 1374 /* Find out WoL support for port */ 1375 sc->wol_support = hw->wol_enabled = 0; 1376 ixgbe_get_device_caps(hw, &dev_caps); 1377 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1378 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1379 hw->bus.func == 0)) 1380 sc->wol_support = hw->wol_enabled = 1; 1381 1382 /* Save initial wake up filter configuration */ 1383 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1384 1385 return; 1386 } /* ixgbe_check_wol_support */ 1387 1388 /************************************************************************ 1389 * ixgbe_setup_interface 1390 * 1391 * Setup networking device structure and register an interface. 1392 ************************************************************************/ 1393 static int 1394 ixgbe_setup_interface(if_ctx_t ctx) 1395 { 1396 if_t ifp = iflib_get_ifp(ctx); 1397 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1398 1399 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1400 1401 if_setbaudrate(ifp, IF_Gbps(10)); 1402 1403 sc->max_frame_size = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN; 1404 1405 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1406 1407 ixgbe_add_media_types(ctx); 1408 1409 /* Autoselect media by default */ 1410 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 1411 1412 return (0); 1413 } /* ixgbe_setup_interface */ 1414 1415 /************************************************************************ 1416 * ixgbe_if_get_counter 1417 ************************************************************************/ 1418 static uint64_t 1419 ixgbe_if_get_counter(if_ctx_t ctx, ift_counter cnt) 1420 { 1421 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1422 if_t ifp = iflib_get_ifp(ctx); 1423 1424 switch (cnt) { 1425 case IFCOUNTER_IPACKETS: 1426 return (sc->ipackets); 1427 case IFCOUNTER_OPACKETS: 1428 return (sc->opackets); 1429 case IFCOUNTER_IBYTES: 1430 return (sc->ibytes); 1431 case IFCOUNTER_OBYTES: 1432 return (sc->obytes); 1433 case IFCOUNTER_IMCASTS: 1434 return (sc->imcasts); 1435 case IFCOUNTER_OMCASTS: 1436 return (sc->omcasts); 1437 case IFCOUNTER_COLLISIONS: 1438 return (0); 1439 case IFCOUNTER_IQDROPS: 1440 return (sc->iqdrops); 1441 case IFCOUNTER_IERRORS: 1442 return (sc->ierrors); 1443 default: 1444 return (if_get_counter_default(ifp, cnt)); 1445 } 1446 } /* ixgbe_if_get_counter */ 1447 1448 /************************************************************************ 1449 * ixgbe_if_i2c_req 1450 ************************************************************************/ 1451 static int 1452 ixgbe_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req) 1453 { 1454 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1455 struct ixgbe_hw *hw = &sc->hw; 1456 int i; 1457 1458 if (hw->phy.ops.read_i2c_byte == NULL) 1459 return (ENXIO); 1460 for (i = 0; i < req->len; i++) 1461 hw->phy.ops.read_i2c_byte(hw, req->offset + i, 1462 req->dev_addr, &req->data[i]); 1463 return (0); 1464 } /* ixgbe_if_i2c_req */ 1465 1466 /* ixgbe_if_needs_restart - Tell iflib when the driver needs to be 1467 * reinitialized 1468 * @ctx: iflib context 1469 * @event: event code to check 1470 * 1471 * Defaults to returning false for unknown events. 1472 * 1473 * @returns true if iflib needs to reinit the interface 1474 */ 1475 static bool 1476 ixgbe_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event) 1477 { 1478 switch (event) { 1479 case IFLIB_RESTART_VLAN_CONFIG: 1480 default: 1481 return (false); 1482 } 1483 } 1484 1485 /************************************************************************ 1486 * ixgbe_if_priv_ioctl - Ioctl handler for driver 1487 * 1488 * Handler for custom driver specific ioctls 1489 * 1490 * return 0 on success, positive on failure 1491 ************************************************************************/ 1492 static int 1493 ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data) 1494 { 1495 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1496 struct ifdrv *ifd; 1497 device_t dev = sc->dev; 1498 1499 /* Make sure the command type is valid */ 1500 switch (command) { 1501 case SIOCSDRVSPEC: 1502 case SIOCGDRVSPEC: 1503 /* Accepted commands */ 1504 break; 1505 case SIOCGPRIVATE_0: 1506 /* 1507 * Although we do not support this ioctl command, it's expected 1508 * that iflib will forward it to the IFDI_PRIV_IOCTL handler. 1509 * Do not print a message in this case. 1510 */ 1511 return (ENOTSUP); 1512 default: 1513 /* 1514 * If we get a different command for this function, it's 1515 * definitely unexpected, so log a message indicating what 1516 * command we got for debugging purposes. 1517 */ 1518 device_printf(dev, 1519 "%s: unexpected ioctl command %08lx\n", 1520 __func__, command); 1521 return (EINVAL); 1522 } 1523 1524 ifd = (struct ifdrv *)data; 1525 1526 switch (ifd->ifd_cmd) { 1527 case IXGBE_NVM_ACCESS: 1528 IOCTL_DEBUGOUT("ioctl: NVM ACCESS"); 1529 return (ixgbe_nvm_access_ioctl(sc, ifd)); 1530 case IXGBE_DEBUG_DUMP: 1531 IOCTL_DEBUGOUT("ioctl: DEBUG DUMP"); 1532 return (ixgbe_debug_dump_ioctl(sc, ifd)); 1533 default: 1534 IOCTL_DEBUGOUT1( 1535 "ioctl: UNKNOWN SIOC(S|G)DRVSPEC (0x%X) command\n", 1536 (int)ifd->ifd_cmd); 1537 return (EINVAL); 1538 } 1539 1540 return (0); 1541 } 1542 1543 /************************************************************************ 1544 * ixgbe_nvm_access_ioctl 1545 * 1546 * Handles an NVM access ioctl request 1547 ************************************************************************/ 1548 static int 1549 ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1550 { 1551 struct ixgbe_nvm_access_data *data; 1552 struct ixgbe_nvm_access_cmd *cmd; 1553 struct ixgbe_hw *hw = &sc->hw; 1554 size_t ifd_len = ifd->ifd_len; 1555 size_t malloc_len; 1556 device_t dev = sc->dev; 1557 u8 *nvm_buffer; 1558 s32 error = 0; 1559 1560 /* 1561 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1562 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1563 * without verifying privileges. To prevent non-privileged threads from 1564 * accessing this interface, perform a privilege check at this point. 1565 */ 1566 error = priv_check(curthread, PRIV_DRIVER); 1567 if (error) 1568 return (error); 1569 1570 if (ifd_len < sizeof(*cmd)) { 1571 device_printf(dev, 1572 "%s: ifdrv length is too small. Got %zu, " 1573 "but expected %zu\n", 1574 __func__, ifd_len, sizeof(*cmd)); 1575 return (EINVAL); 1576 } 1577 1578 if (ifd->ifd_data == NULL) { 1579 device_printf(dev, "%s: No ifd data buffer.\n", 1580 __func__); 1581 return (EINVAL); 1582 } 1583 1584 malloc_len = max(ifd_len, sizeof(*data) + sizeof(*cmd)); 1585 1586 nvm_buffer = (u8 *)malloc(malloc_len, M_IXGBE, M_ZERO | M_NOWAIT); 1587 if (!nvm_buffer) 1588 return (ENOMEM); 1589 1590 /* Copy the NVM access command and data in from user space */ 1591 error = copyin(ifd->ifd_data, nvm_buffer, ifd_len); 1592 if (error) { 1593 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1594 __func__, error); 1595 goto cleanup_free_nvm_buffer; 1596 } 1597 1598 /* 1599 * The NVM command structure is immediately followed by data which 1600 * varies in size based on the command. 1601 */ 1602 cmd = (struct ixgbe_nvm_access_cmd *)nvm_buffer; 1603 data = (struct ixgbe_nvm_access_data *) 1604 (nvm_buffer + sizeof(struct ixgbe_nvm_access_cmd)); 1605 1606 /* Handle the NVM access request */ 1607 error = ixgbe_handle_nvm_access(hw, cmd, data); 1608 if (error) { 1609 device_printf(dev, "%s: NVM access request failed, error %d\n", 1610 __func__, error); 1611 } 1612 1613 /* Copy the possibly modified contents of the handled request out */ 1614 error = copyout(nvm_buffer, ifd->ifd_data, ifd_len); 1615 if (error) { 1616 device_printf(dev, "%s: Copying response back to " 1617 "user space failed, error %d\n", 1618 __func__, error); 1619 goto cleanup_free_nvm_buffer; 1620 } 1621 1622 cleanup_free_nvm_buffer: 1623 free(nvm_buffer, M_IXGBE); 1624 return (error); 1625 } 1626 1627 /************************************************************************ 1628 * ixgbe_debug_dump_ioctl 1629 * 1630 * Makes debug dump of internal FW/HW data. 1631 ************************************************************************/ 1632 static int 1633 ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1634 { 1635 struct ixgbe_debug_dump_cmd *dd_cmd; 1636 struct ixgbe_hw *hw = &sc->hw; 1637 size_t ifd_len = ifd->ifd_len; 1638 device_t dev = sc->dev; 1639 s32 error = 0; 1640 1641 if (!(sc->feat_en & IXGBE_FEATURE_DBG_DUMP)) 1642 return (ENODEV); 1643 1644 /* Data returned from ACI command */ 1645 u16 ret_buf_size = 0; 1646 u16 ret_next_cluster = 0; 1647 u16 ret_next_table = 0; 1648 u32 ret_next_index = 0; 1649 1650 /* 1651 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1652 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1653 * without verifying privileges. To prevent non-privileged threads from 1654 * accessing this interface, perform a privilege check at this point. 1655 */ 1656 error = priv_check(curthread, PRIV_DRIVER); 1657 if (error) 1658 return (error); 1659 1660 if (ifd_len < sizeof(*dd_cmd)) { 1661 device_printf(dev, 1662 "%s: ifdrv length is too small. Got %zu, " 1663 "but expected %zu\n", 1664 __func__, ifd_len, sizeof(*dd_cmd)); 1665 return (EINVAL); 1666 } 1667 1668 if (ifd->ifd_data == NULL) { 1669 device_printf(dev, "%s: No ifd data buffer.\n", 1670 __func__); 1671 return (EINVAL); 1672 } 1673 1674 dd_cmd = (struct ixgbe_debug_dump_cmd *)malloc(ifd_len, M_IXGBE, 1675 M_NOWAIT | M_ZERO); 1676 if (!dd_cmd) { 1677 error = -ENOMEM; 1678 goto out; 1679 } 1680 /* copy data from userspace */ 1681 error = copyin(ifd->ifd_data, dd_cmd, ifd_len); 1682 if (error) { 1683 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1684 __func__, error); 1685 goto out; 1686 } 1687 1688 /* ACI command requires buf_size arg to be grater than 0 */ 1689 if (dd_cmd->data_size == 0) { 1690 device_printf(dev, "%s: data_size must be greater than 0\n", 1691 __func__); 1692 error = EINVAL; 1693 goto out; 1694 } 1695 1696 /* Zero the data buffer memory space */ 1697 memset(dd_cmd->data, 0, ifd_len - sizeof(*dd_cmd)); 1698 1699 error = ixgbe_aci_get_internal_data(hw, dd_cmd->cluster_id, 1700 dd_cmd->table_id, dd_cmd->offset, dd_cmd->data, dd_cmd->data_size, 1701 &ret_buf_size, &ret_next_cluster, &ret_next_table, &ret_next_index); 1702 if (error) { 1703 device_printf(dev, 1704 "%s: Failed to get internal FW/HW data, error: %d\n", 1705 __func__, error); 1706 goto out; 1707 } 1708 1709 dd_cmd->cluster_id = ret_next_cluster; 1710 dd_cmd->table_id = ret_next_table; 1711 dd_cmd->offset = ret_next_index; 1712 dd_cmd->data_size = ret_buf_size; 1713 1714 error = copyout(dd_cmd, ifd->ifd_data, ifd->ifd_len); 1715 if (error) { 1716 device_printf(dev, 1717 "%s: Failed to copy data out, error: %d\n", 1718 __func__, error); 1719 } 1720 1721 out: 1722 free(dd_cmd, M_IXGBE); 1723 1724 return (error); 1725 } 1726 1727 /************************************************************************ 1728 * ixgbe_add_media_types 1729 ************************************************************************/ 1730 static void 1731 ixgbe_add_media_types(if_ctx_t ctx) 1732 { 1733 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1734 struct ixgbe_hw *hw = &sc->hw; 1735 device_t dev = iflib_get_dev(ctx); 1736 u64 layer; 1737 1738 layer = sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 1739 1740 /* Media types with matching FreeBSD media defines */ 1741 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1742 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_T, 0, NULL); 1743 if (layer & IXGBE_PHYSICAL_LAYER_5000BASE_T) 1744 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1745 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1746 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1747 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1748 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1749 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1750 ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL); 1751 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1752 ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL); 1753 1754 if (hw->mac.type == ixgbe_mac_X550) { 1755 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1756 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1757 } 1758 1759 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1760 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) { 1761 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_TWINAX, 0, 1762 NULL); 1763 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1764 } 1765 1766 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1767 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 1768 if (hw->phy.multispeed_fiber) 1769 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_LX, 0, 1770 NULL); 1771 } 1772 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_BX) { 1773 device_printf(dev, "Media supported: 10Gbase-BX\n"); 1774 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_BX, 0, NULL); 1775 } 1776 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1777 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1778 if (hw->phy.multispeed_fiber) 1779 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, 1780 NULL); 1781 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1782 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 1783 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1784 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1785 1786 #ifdef IFM_ETH_XTYPE 1787 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1788 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 1789 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1790 ifmedia_add( sc->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 1791 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1792 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1793 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1794 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_KX, 0, NULL); 1795 #else 1796 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 1797 device_printf(dev, "Media supported: 10GbaseKR\n"); 1798 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 1799 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1800 } 1801 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 1802 device_printf(dev, "Media supported: 10GbaseKX4\n"); 1803 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 1804 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1805 } 1806 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 1807 device_printf(dev, "Media supported: 1000baseKX\n"); 1808 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 1809 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 1810 } 1811 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) { 1812 device_printf(dev, "Media supported: 2500baseKX\n"); 1813 device_printf(dev, "2500baseKX mapped to 2500baseSX\n"); 1814 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_SX, 0, NULL); 1815 } 1816 #endif 1817 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) { 1818 device_printf(dev, "Media supported: 1000baseBX\n"); 1819 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_BX, 0, NULL); 1820 } 1821 1822 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 1823 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1824 0, NULL); 1825 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1826 } 1827 1828 ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1829 } /* ixgbe_add_media_types */ 1830 1831 /************************************************************************ 1832 * ixgbe_is_sfp 1833 ************************************************************************/ 1834 static inline bool 1835 ixgbe_is_sfp(struct ixgbe_hw *hw) 1836 { 1837 switch (hw->mac.type) { 1838 case ixgbe_mac_82598EB: 1839 if (hw->phy.type == ixgbe_phy_nl) 1840 return (true); 1841 return (false); 1842 case ixgbe_mac_82599EB: 1843 switch (hw->mac.ops.get_media_type(hw)) { 1844 case ixgbe_media_type_fiber: 1845 case ixgbe_media_type_fiber_qsfp: 1846 return (true); 1847 default: 1848 return (false); 1849 } 1850 case ixgbe_mac_X550EM_x: 1851 case ixgbe_mac_X550EM_a: 1852 case ixgbe_mac_E610: 1853 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) 1854 return (true); 1855 return (false); 1856 default: 1857 return (false); 1858 } 1859 } /* ixgbe_is_sfp */ 1860 1861 /************************************************************************ 1862 * ixgbe_config_link 1863 ************************************************************************/ 1864 static void 1865 ixgbe_config_link(if_ctx_t ctx) 1866 { 1867 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1868 struct ixgbe_hw *hw = &sc->hw; 1869 u32 autoneg, err = 0; 1870 bool sfp, negotiate; 1871 1872 sfp = ixgbe_is_sfp(hw); 1873 1874 if (sfp) { 1875 /* ixgbe_if_stop() disables it on every 82599 SFP port. */ 1876 ixgbe_enable_tx_laser(hw); 1877 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MOD); 1878 iflib_admin_intr_deferred(ctx); 1879 } else { 1880 if (hw->mac.ops.check_link) 1881 err = ixgbe_check_link(hw, &sc->link_speed, 1882 &sc->link_up, false); 1883 if (err) 1884 return; 1885 autoneg = hw->phy.autoneg_advertised; 1886 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 1887 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1888 &negotiate); 1889 if (err) 1890 return; 1891 1892 if (hw->mac.type == ixgbe_mac_X550 && 1893 hw->phy.autoneg_advertised == 0) { 1894 /* 1895 * 2.5G and 5G autonegotiation speeds on X550 1896 * are disabled by default due to reported 1897 * interoperability issues with some switches. 1898 * 1899 * The second condition checks if any operations 1900 * involving setting autonegotiation speeds have 1901 * been performed prior to this ixgbe_config_link() 1902 * call. 1903 * 1904 * If hw->phy.autoneg_advertised does not 1905 * equal 0, this means that the user might have 1906 * set autonegotiation speeds via the sysctl 1907 * before bringing the interface up. In this 1908 * case, we should not disable 2.5G and 5G 1909 * since that speeds might be selected by the 1910 * user. 1911 * 1912 * Otherwise (i.e. if hw->phy.autoneg_advertised 1913 * is set to 0), it is the first time we set 1914 * autonegotiation preferences and the default 1915 * set of speeds should exclude 2.5G and 5G. 1916 */ 1917 autoneg &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 1918 IXGBE_LINK_SPEED_5GB_FULL); 1919 } 1920 1921 if (hw->mac.type == ixgbe_mac_E610) { 1922 hw->phy.ops.init(hw); 1923 err = ixgbe_enable_lse(sc); 1924 if (err) 1925 device_printf(sc->dev, 1926 "Failed to enable Link Status Event, " 1927 "error: %d", err); 1928 } 1929 1930 if (hw->mac.ops.setup_link) 1931 err = hw->mac.ops.setup_link(hw, autoneg, 1932 sc->link_up); 1933 } 1934 } /* ixgbe_config_link */ 1935 1936 /************************************************************************ 1937 * ixgbe_update_stats_counters - Update board statistics counters. 1938 ************************************************************************/ 1939 static void 1940 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1941 { 1942 struct ixgbe_hw *hw = &sc->hw; 1943 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1944 u32 missed_rx = 0, mpc, bprc, lxon, lxoff; 1945 u32 lxoffrxc; 1946 u64 total_missed_rx = 0, total; 1947 1948 stats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 1949 stats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 1950 stats->errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 1951 stats->mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 1952 for (int i = 0; i < nitems(stats->mpc); i++) { 1953 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 1954 missed_rx += mpc; 1955 stats->mpc[i] += mpc; 1956 total_missed_rx += stats->mpc[i]; 1957 } 1958 stats->mpctotal = total_missed_rx; 1959 1960 for (int i = 0; i < 16; i++) { 1961 stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 1962 stats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 1963 stats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 1964 } 1965 stats->mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 1966 stats->mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 1967 stats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 1968 1969 /* Hardware workaround, gprc counts missed packets */ 1970 stats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 1971 stats->gprc -= missed_rx; 1972 1973 if (hw->mac.type != ixgbe_mac_82598EB) { 1974 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 1975 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 1976 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1977 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 1978 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 1979 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 1980 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 1981 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 1982 stats->lxoffrxc += lxoffrxc; 1983 } else { 1984 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 1985 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 1986 stats->lxoffrxc += lxoffrxc; 1987 /* 82598 only has a counter in the high register */ 1988 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 1989 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 1990 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 1991 } 1992 1993 /* 1994 * For watchdog management we need to know if we have been paused 1995 * during the last interval, so capture that here. 1996 */ 1997 if (lxoffrxc) 1998 sc->shared->isc_pause_frames = 1; 1999 2000 /* 2001 * Workaround: mprc hardware is incorrectly counting 2002 * broadcasts, so for now we subtract those. 2003 */ 2004 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 2005 stats->bprc += bprc; 2006 stats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 2007 if (hw->mac.type == ixgbe_mac_82598EB) 2008 stats->mprc -= bprc; 2009 2010 stats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 2011 stats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 2012 stats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 2013 stats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 2014 stats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 2015 stats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 2016 2017 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 2018 stats->lxontxc += lxon; 2019 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 2020 stats->lxofftxc += lxoff; 2021 total = (u64)lxon + lxoff; 2022 2023 stats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 2024 stats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 2025 stats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 2026 stats->gptc -= total; 2027 stats->mptc -= total; 2028 stats->ptc64 -= total; 2029 stats->gotc -= total * ETHER_MIN_LEN; 2030 2031 stats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 2032 stats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 2033 stats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); 2034 stats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 2035 stats->mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 2036 stats->mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 2037 stats->mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 2038 stats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 2039 stats->tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 2040 stats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 2041 stats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 2042 stats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 2043 stats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 2044 stats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 2045 stats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 2046 stats->xec += IXGBE_READ_REG(hw, IXGBE_XEC); 2047 stats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 2048 stats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 2049 /* Only read FCOE on 82599 */ 2050 if (hw->mac.type != ixgbe_mac_82598EB) { 2051 stats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 2052 stats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 2053 stats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 2054 stats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 2055 stats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 2056 } 2057 2058 /* TLPIC and RLPIC are clear-on-read. */ 2059 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 2060 stats->tlpic += IXGBE_READ_REG(hw, IXGBE_TLPIC); 2061 stats->rlpic += IXGBE_READ_REG(hw, IXGBE_RLPIC); 2062 } 2063 2064 /* Fill out the OS statistics structure */ 2065 IXGBE_SET_IPACKETS(sc, stats->gprc); 2066 IXGBE_SET_OPACKETS(sc, stats->gptc); 2067 IXGBE_SET_IBYTES(sc, stats->gorc); 2068 IXGBE_SET_OBYTES(sc, stats->gotc); 2069 IXGBE_SET_IMCASTS(sc, stats->mprc); 2070 IXGBE_SET_OMCASTS(sc, stats->mptc); 2071 IXGBE_SET_COLLISIONS(sc, 0); 2072 IXGBE_SET_IQDROPS(sc, total_missed_rx); 2073 2074 /* 2075 * Aggregate following types of errors as RX errors: 2076 * - CRC error count, 2077 * - illegal byte error count, 2078 * - missed packets count, 2079 * - length error count, 2080 * - undersized packets count, 2081 * - fragmented packets count, 2082 * - oversized packets count, 2083 * - jabber count. 2084 */ 2085 IXGBE_SET_IERRORS(sc, stats->crcerrs + stats->illerrc + 2086 stats->mpctotal + stats->rlec + stats->ruc + stats->rfc + 2087 stats->roc + stats->rjc); 2088 } /* ixgbe_update_stats_counters */ 2089 2090 /************************************************************************ 2091 * ixgbe_add_hw_stats 2092 * 2093 * Add sysctl variables, one per statistic, to the system. 2094 ************************************************************************/ 2095 static void 2096 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 2097 { 2098 device_t dev = iflib_get_dev(sc->ctx); 2099 struct ix_rx_queue *rx_que; 2100 struct ix_tx_queue *tx_que; 2101 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 2102 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 2103 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 2104 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2105 struct sysctl_oid *stat_node, *queue_node; 2106 struct sysctl_oid_list *stat_list, *queue_list; 2107 int i; 2108 2109 #define QUEUE_NAME_LEN 32 2110 char namebuf[QUEUE_NAME_LEN]; 2111 2112 /* Driver Statistics */ 2113 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 2114 CTLFLAG_RD, &sc->dropped_pkts, "Driver dropped packets"); 2115 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 2116 CTLFLAG_RD, &sc->link_irq, "Link MSI-X IRQ Handled"); 2117 2118 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 2119 i++, tx_que++) { 2120 struct tx_ring *txr = &tx_que->txr; 2121 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2122 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2123 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2124 queue_list = SYSCTL_CHILDREN(queue_node); 2125 2126 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 2127 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2128 ixgbe_sysctl_tdh_handler, "IU", 2129 "Transmit Descriptor Head"); 2130 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 2131 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2132 ixgbe_sysctl_tdt_handler, "IU", 2133 "Transmit Descriptor Tail"); 2134 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx", 2135 CTLFLAG_RD, &txr->tso_tx, "TSO"); 2136 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 2137 CTLFLAG_RD, &txr->total_packets, 2138 "Queue Packets Transmitted"); 2139 } 2140 2141 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 2142 i++, rx_que++) { 2143 struct rx_ring *rxr = &rx_que->rxr; 2144 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2145 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2146 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2147 queue_list = SYSCTL_CHILDREN(queue_node); 2148 2149 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 2150 CTLTYPE_UINT | CTLFLAG_RW, 2151 &sc->rx_queues[i], 0, 2152 ixgbe_sysctl_interrupt_rate_handler, "IU", 2153 "Interrupt Rate"); 2154 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 2155 CTLFLAG_RD, &(sc->rx_queues[i].irqs), 2156 "irqs on this queue"); 2157 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 2158 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2159 ixgbe_sysctl_rdh_handler, "IU", 2160 "Receive Descriptor Head"); 2161 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 2162 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2163 ixgbe_sysctl_rdt_handler, "IU", 2164 "Receive Descriptor Tail"); 2165 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 2166 CTLFLAG_RD, &rxr->rx_packets, "Queue Packets Received"); 2167 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 2168 CTLFLAG_RD, &rxr->rx_bytes, "Queue Bytes Received"); 2169 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 2170 CTLFLAG_RD, &rxr->rx_copies, "Copied RX Frames"); 2171 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_discarded", 2172 CTLFLAG_RD, &rxr->rx_discarded, "Discarded RX packets"); 2173 } 2174 2175 /* MAC stats get their own sub node */ 2176 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 2177 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "MAC Statistics"); 2178 stat_list = SYSCTL_CHILDREN(stat_node); 2179 2180 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_errs", 2181 CTLFLAG_RD, &sc->ierrors, IXGBE_SYSCTL_DESC_RX_ERRS); 2182 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 2183 CTLFLAG_RD, &stats->crcerrs, "CRC Errors"); 2184 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 2185 CTLFLAG_RD, &stats->illerrc, "Illegal Byte Errors"); 2186 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 2187 CTLFLAG_RD, &stats->errbc, "Byte Errors"); 2188 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 2189 CTLFLAG_RD, &stats->mspdc, "MAC Short Packets Discarded"); 2190 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 2191 CTLFLAG_RD, &stats->mlfc, "MAC Local Faults"); 2192 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 2193 CTLFLAG_RD, &stats->mrfc, "MAC Remote Faults"); 2194 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 2195 CTLFLAG_RD, &stats->rlec, "Receive Length Errors"); 2196 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_missed_packets", 2197 CTLFLAG_RD, &stats->mpctotal, "RX Missed Packet Count"); 2198 2199 /* Flow Control stats */ 2200 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 2201 CTLFLAG_RD, &stats->lxontxc, "Link XON Transmitted"); 2202 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 2203 CTLFLAG_RD, &stats->lxonrxc, "Link XON Received"); 2204 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 2205 CTLFLAG_RD, &stats->lxofftxc, "Link XOFF Transmitted"); 2206 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 2207 CTLFLAG_RD, &stats->lxoffrxc, "Link XOFF Received"); 2208 2209 /* Packet Reception Stats */ 2210 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 2211 CTLFLAG_RD, &stats->tor, "Total Octets Received"); 2212 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 2213 CTLFLAG_RD, &stats->gorc, "Good Octets Received"); 2214 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 2215 CTLFLAG_RD, &stats->tpr, "Total Packets Received"); 2216 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 2217 CTLFLAG_RD, &stats->gprc, "Good Packets Received"); 2218 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 2219 CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); 2220 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 2221 CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); 2222 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 2223 CTLFLAG_RD, &stats->prc64, "64 byte frames received "); 2224 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 2225 CTLFLAG_RD, &stats->prc127, "65-127 byte frames received"); 2226 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 2227 CTLFLAG_RD, &stats->prc255, "128-255 byte frames received"); 2228 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 2229 CTLFLAG_RD, &stats->prc511, "256-511 byte frames received"); 2230 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 2231 CTLFLAG_RD, &stats->prc1023, "512-1023 byte frames received"); 2232 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 2233 CTLFLAG_RD, &stats->prc1522, "1023-1522 byte frames received"); 2234 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 2235 CTLFLAG_RD, &stats->ruc, "Receive Undersized"); 2236 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 2237 CTLFLAG_RD, &stats->rfc, "Fragmented Packets Received "); 2238 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 2239 CTLFLAG_RD, &stats->roc, "Oversized Packets Received"); 2240 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 2241 CTLFLAG_RD, &stats->rjc, "Received Jabber"); 2242 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 2243 CTLFLAG_RD, &stats->mngprc, "Management Packets Received"); 2244 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 2245 CTLFLAG_RD, &stats->mngpdc, "Management Packets Dropped"); 2246 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 2247 CTLFLAG_RD, &stats->xec, "Checksum Errors"); 2248 2249 /* Packet Transmission Stats */ 2250 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 2251 CTLFLAG_RD, &stats->gotc, "Good Octets Transmitted"); 2252 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 2253 CTLFLAG_RD, &stats->tpt, "Total Packets Transmitted"); 2254 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 2255 CTLFLAG_RD, &stats->gptc, "Good Packets Transmitted"); 2256 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 2257 CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); 2258 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 2259 CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); 2260 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 2261 CTLFLAG_RD, &stats->mngptc, "Management Packets Transmitted"); 2262 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 2263 CTLFLAG_RD, &stats->ptc64, "64 byte frames transmitted "); 2264 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 2265 CTLFLAG_RD, &stats->ptc127, "65-127 byte frames transmitted"); 2266 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 2267 CTLFLAG_RD, &stats->ptc255, "128-255 byte frames transmitted"); 2268 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 2269 CTLFLAG_RD, &stats->ptc511, "256-511 byte frames transmitted"); 2270 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 2271 CTLFLAG_RD, &stats->ptc1023, "512-1023 byte frames transmitted"); 2272 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 2273 CTLFLAG_RD, &stats->ptc1522, "1024-1522 byte frames transmitted"); 2274 } /* ixgbe_add_hw_stats */ 2275 2276 /************************************************************************ 2277 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2278 * 2279 * Retrieves the TDH value from the hardware 2280 ************************************************************************/ 2281 static int 2282 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 2283 { 2284 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2285 int error; 2286 unsigned int val; 2287 2288 if (!txr) 2289 return (0); 2290 2291 2292 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2293 return (EPERM); 2294 2295 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me)); 2296 error = sysctl_handle_int(oidp, &val, 0, req); 2297 if (error || !req->newptr) 2298 return error; 2299 2300 return (0); 2301 } /* ixgbe_sysctl_tdh_handler */ 2302 2303 /************************************************************************ 2304 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2305 * 2306 * Retrieves the TDT value from the hardware 2307 ************************************************************************/ 2308 static int 2309 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 2310 { 2311 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2312 int error; 2313 unsigned int val; 2314 2315 if (!txr) 2316 return (0); 2317 2318 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2319 return (EPERM); 2320 2321 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me)); 2322 error = sysctl_handle_int(oidp, &val, 0, req); 2323 if (error || !req->newptr) 2324 return error; 2325 2326 return (0); 2327 } /* ixgbe_sysctl_tdt_handler */ 2328 2329 /************************************************************************ 2330 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2331 * 2332 * Retrieves the RDH value from the hardware 2333 ************************************************************************/ 2334 static int 2335 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 2336 { 2337 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2338 int error; 2339 unsigned int val; 2340 2341 if (!rxr) 2342 return (0); 2343 2344 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2345 return (EPERM); 2346 2347 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me)); 2348 error = sysctl_handle_int(oidp, &val, 0, req); 2349 if (error || !req->newptr) 2350 return error; 2351 2352 return (0); 2353 } /* ixgbe_sysctl_rdh_handler */ 2354 2355 /************************************************************************ 2356 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2357 * 2358 * Retrieves the RDT value from the hardware 2359 ************************************************************************/ 2360 static int 2361 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 2362 { 2363 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2364 int error; 2365 unsigned int val; 2366 2367 if (!rxr) 2368 return (0); 2369 2370 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2371 return (EPERM); 2372 2373 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me)); 2374 error = sysctl_handle_int(oidp, &val, 0, req); 2375 if (error || !req->newptr) 2376 return error; 2377 2378 return (0); 2379 } /* ixgbe_sysctl_rdt_handler */ 2380 2381 /************************************************************************ 2382 * ixgbe_if_vlan_register 2383 * 2384 * Run via vlan config EVENT, it enables us to use the 2385 * HW Filter table since we can get the vlan id. This 2386 * just creates the entry in the soft version of the 2387 * VFTA, init will repopulate the real table. 2388 ************************************************************************/ 2389 static void 2390 ixgbe_if_vlan_register(if_ctx_t ctx, u16 vtag) 2391 { 2392 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2393 bool present; 2394 u16 index; 2395 u32 mask; 2396 2397 index = (vtag >> 5) & 0x7F; 2398 mask = 1U << (vtag & 0x1F); 2399 present = (sc->shadow_vfta[index] & mask) != 0; 2400 sc->shadow_vfta[index] |= mask; 2401 if (!present) 2402 ++sc->num_vlans; 2403 #ifdef PCI_IOV 2404 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 && 2405 sc->iov_vfta_valid && !sc->iov_vlan_promisc) 2406 (void)ixgbe_set_vfta(&sc->hw, vtag, sc->pool, true, true); 2407 #endif 2408 ixgbe_setup_vlan_hw_support(ctx); 2409 } /* ixgbe_if_vlan_register */ 2410 2411 /************************************************************************ 2412 * ixgbe_if_vlan_unregister 2413 * 2414 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2415 ************************************************************************/ 2416 static void 2417 ixgbe_if_vlan_unregister(if_ctx_t ctx, u16 vtag) 2418 { 2419 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2420 bool present; 2421 u16 index; 2422 u32 mask; 2423 2424 index = (vtag >> 5) & 0x7F; 2425 mask = 1U << (vtag & 0x1F); 2426 present = (sc->shadow_vfta[index] & mask) != 0; 2427 sc->shadow_vfta[index] &= ~mask; 2428 if (present) 2429 --sc->num_vlans; 2430 #ifdef PCI_IOV 2431 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 && 2432 sc->iov_vfta_valid && !sc->iov_vlan_promisc) 2433 (void)ixgbe_set_vfta(&sc->hw, vtag, sc->pool, false, true); 2434 #endif 2435 ixgbe_setup_vlan_hw_support(ctx); 2436 } /* ixgbe_if_vlan_unregister */ 2437 2438 #ifdef PCI_IOV 2439 static bool 2440 ixgbe_iov_pf_owns_vlan(const struct ixgbe_softc *sc, u16 vlan) 2441 { 2442 2443 return ((sc->shadow_vfta[vlan >> 5] & 2444 (1U << (vlan & 0x1f))) != 0); 2445 } 2446 2447 /* 2448 * start_hw clears both VFTA and VLVF. Reconstruct the shared tables from 2449 * PF and VF desired state after every reset or filtering-mode transition. 2450 * Allocate VF entries first so PF-only VLANs cannot exhaust VLVF. 2451 */ 2452 static void 2453 ixgbe_iov_vlan_rebuild(struct ixgbe_softc *sc, bool promisc) 2454 { 2455 struct ixgbe_hw *hw; 2456 struct ixgbe_vf *vf; 2457 u32 vfta[IXGBE_VFTA_SIZE]; 2458 u32 bits, vlan, vlvf; 2459 int bit, failures, i, word; 2460 2461 hw = &sc->hw; 2462 bcopy(sc->shadow_vfta, vfta, sizeof(vfta)); 2463 (void)ixgbe_clear_vfta(hw); 2464 failures = 0; 2465 for (i = 0; i < sc->num_vfs; i++) { 2466 vf = &sc->vfs[i]; 2467 if ((vf->flags & IXGBE_VF_ACTIVE) == 0) 2468 continue; 2469 if (vf->default_vlan == 0 && 2470 ixgbe_set_vfta(hw, 0, vf->pool, true, false) != 2471 IXGBE_SUCCESS) 2472 failures++; 2473 for (word = 0; word < IXGBE_VFTA_SIZE; word++) { 2474 bits = vf->vlans[word]; 2475 while (bits != 0) { 2476 bit = ffs(bits) - 1; 2477 vlan = word * 32 + bit; 2478 if (ixgbe_set_vfta(hw, vlan, vf->pool, true, 2479 false) == IXGBE_SUCCESS) 2480 vfta[word] |= 1U << bit; 2481 else 2482 failures++; 2483 bits &= ~(1U << bit); 2484 } 2485 } 2486 } 2487 if (ixgbe_set_vfta(hw, 0, sc->pool, true, false) != IXGBE_SUCCESS) 2488 failures++; 2489 2490 /* Add the PF to shared entries, or every entry in promiscuous mode. */ 2491 for (i = 1; i < IXGBE_VLVF_ENTRIES; i++) { 2492 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); 2493 if ((vlvf & IXGBE_VLVF_VIEN) == 0) 2494 continue; 2495 vlan = vlvf & IXGBE_VLVF_VLANID_MASK; 2496 if (promisc || ixgbe_iov_pf_owns_vlan(sc, vlan)) 2497 (void)ixgbe_set_vfta(hw, vlan, sc->pool, true, true); 2498 vfta[vlan >> 5] |= 1U << (vlan & 0x1f); 2499 } 2500 if (promisc) 2501 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2502 vfta[i] = UINT32_MAX; 2503 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2504 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), vfta[i]); 2505 if (failures != 0) 2506 device_printf(sc->dev, 2507 "VLAN pool restore failed for %d memberships\n", failures); 2508 } 2509 2510 static void 2511 ixgbe_iov_vlan_sync(struct ixgbe_softc *sc, bool promisc) 2512 { 2513 2514 if (sc->iov_vfta_valid && sc->iov_vlan_promisc == promisc) 2515 return; 2516 ixgbe_iov_vlan_rebuild(sc, promisc); 2517 sc->iov_vlan_promisc = promisc; 2518 sc->iov_vfta_valid = true; 2519 } 2520 #endif 2521 2522 /************************************************************************ 2523 * ixgbe_setup_vlan_hw_support 2524 ************************************************************************/ 2525 void 2526 ixgbe_setup_vlan_hw_support(if_ctx_t ctx) 2527 { 2528 if_t ifp = iflib_get_ifp(ctx); 2529 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2530 struct ixgbe_hw *hw = &sc->hw; 2531 struct rx_ring *rxr; 2532 bool strip; 2533 int i; 2534 u32 ctrl; 2535 2536 strip = sc->num_vlans != 0 && 2537 (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) != 0; 2538 for (i = 0; i < sc->num_rx_queues; i++) { 2539 rxr = &sc->rx_queues[i].rxr; 2540 /* On 82599 and newer VLAN stripping is per receive queue. */ 2541 if (hw->mac.type != ixgbe_mac_82598EB) { 2542 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2543 if (strip) 2544 ctrl |= IXGBE_RXDCTL_VME; 2545 else 2546 ctrl &= ~IXGBE_RXDCTL_VME; 2547 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2548 } 2549 rxr->vtag_strip = strip; 2550 } 2551 2552 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2553 if (hw->mac.type == ixgbe_mac_82598EB) { 2554 if (strip) 2555 ctrl |= IXGBE_VLNCTRL_VME; 2556 else 2557 ctrl &= ~IXGBE_VLNCTRL_VME; 2558 } 2559 2560 /* Always admit priority-tagged frames. */ 2561 sc->shadow_vfta[0] |= 1U; 2562 2563 #ifdef PCI_IOV 2564 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0) { 2565 /* 2566 * VFE must remain enabled to enforce per-pool VLAN ownership. 2567 */ 2568 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 2569 ctrl |= IXGBE_VLNCTRL_VFE; 2570 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2571 ixgbe_iov_vlan_sync(sc, 2572 (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0); 2573 return; 2574 } 2575 #endif 2576 2577 if (!strip || 2578 (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0) { 2579 ctrl |= IXGBE_VLNCTRL_CFIEN; 2580 ctrl &= ~IXGBE_VLNCTRL_VFE; 2581 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2582 return; 2583 } 2584 2585 /* A soft reset clears VFTA, so restore the PF's desired bitmap. */ 2586 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2587 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2588 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 2589 ctrl |= IXGBE_VLNCTRL_VFE; 2590 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2591 } /* ixgbe_setup_vlan_hw_support */ 2592 2593 /************************************************************************ 2594 * ixgbe_get_slot_info 2595 * 2596 * Get the width and transaction speed of 2597 * the slot this adapter is plugged into. 2598 ************************************************************************/ 2599 static void 2600 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2601 { 2602 device_t dev = iflib_get_dev(sc->ctx); 2603 struct ixgbe_hw *hw = &sc->hw; 2604 int bus_info_valid = true; 2605 u32 offset; 2606 u16 link; 2607 2608 /* Some devices are behind an internal bridge */ 2609 switch (hw->device_id) { 2610 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2611 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2612 goto get_parent_info; 2613 default: 2614 break; 2615 } 2616 2617 ixgbe_get_bus_info(hw); 2618 2619 /* 2620 * Some devices don't use PCI-E, but there is no need 2621 * to display "Unknown" for bus speed and width. 2622 */ 2623 switch (hw->mac.type) { 2624 case ixgbe_mac_X550EM_x: 2625 case ixgbe_mac_X550EM_a: 2626 return; 2627 default: 2628 goto display; 2629 } 2630 2631 get_parent_info: 2632 /* 2633 * For the Quad port adapter we need to parse back 2634 * up the PCI tree to find the speed of the expansion 2635 * slot into which this adapter is plugged. A bit more work. 2636 */ 2637 dev = device_get_parent(device_get_parent(dev)); 2638 #ifdef IXGBE_DEBUG 2639 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2640 pci_get_slot(dev), pci_get_function(dev)); 2641 #endif 2642 dev = device_get_parent(device_get_parent(dev)); 2643 #ifdef IXGBE_DEBUG 2644 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2645 pci_get_slot(dev), pci_get_function(dev)); 2646 #endif 2647 /* Now get the PCI Express Capabilities offset */ 2648 if (pci_find_cap(dev, PCIY_EXPRESS, &offset)) { 2649 /* 2650 * Hmm...can't get PCI-Express capabilities. 2651 * Falling back to default method. 2652 */ 2653 bus_info_valid = false; 2654 ixgbe_get_bus_info(hw); 2655 goto display; 2656 } 2657 /* ...and read the Link Status Register */ 2658 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 2659 ixgbe_set_pci_config_data_generic(hw, link); 2660 2661 display: 2662 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2663 ((hw->bus.speed == ixgbe_bus_speed_16000) ? "16.0GT/s" : 2664 (hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2665 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2666 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2667 "Unknown"), 2668 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2669 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2670 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2671 "Unknown")); 2672 2673 if (bus_info_valid) { 2674 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2675 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2676 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2677 device_printf(dev, 2678 "PCI-Express bandwidth available for this card" 2679 " is not sufficient for optimal performance.\n"); 2680 device_printf(dev, 2681 "For optimal performance a x8 PCIE, or x4 PCIE" 2682 " Gen2 slot is required.\n"); 2683 } 2684 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2685 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2686 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2687 device_printf(dev, 2688 "PCI-Express bandwidth available for this card" 2689 " is not sufficient for optimal performance.\n"); 2690 device_printf(dev, 2691 "For optimal performance a x8 PCIE Gen3 slot is" 2692 " required.\n"); 2693 } 2694 } else 2695 device_printf(dev, 2696 "Unable to determine slot speed/width. The speed/width" 2697 " reported are that of the internal switch.\n"); 2698 2699 return; 2700 } /* ixgbe_get_slot_info */ 2701 2702 /************************************************************************ 2703 * ixgbe_if_msix_intr_assign 2704 * 2705 * Setup MSI-X Interrupt resources and handlers 2706 ************************************************************************/ 2707 static int 2708 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix) 2709 { 2710 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2711 struct ix_rx_queue *rx_que = sc->rx_queues; 2712 struct ix_tx_queue *tx_que; 2713 int error, rid, vector = 0; 2714 char buf[16]; 2715 2716 /* Admin Que is vector 0*/ 2717 rid = vector + 1; 2718 for (int i = 0; i < sc->num_rx_queues; i++, vector++, rx_que++) { 2719 rid = vector + 1; 2720 2721 snprintf(buf, sizeof(buf), "rxq%d", i); 2722 error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid, 2723 IFLIB_INTR_RXTX, ixgbe_msix_que, rx_que, rx_que->rxr.me, 2724 buf); 2725 2726 if (error) { 2727 device_printf(iflib_get_dev(ctx), 2728 "Failed to allocate que int %d err: %d", 2729 i,error); 2730 sc->num_rx_queues = i + 1; 2731 goto fail; 2732 } 2733 2734 rx_que->msix = vector; 2735 } 2736 for (int i = 0; i < sc->num_tx_queues; i++) { 2737 snprintf(buf, sizeof(buf), "txq%d", i); 2738 tx_que = &sc->tx_queues[i]; 2739 tx_que->msix = i % sc->num_rx_queues; 2740 iflib_softirq_alloc_generic(ctx, 2741 &sc->rx_queues[tx_que->msix].que_irq, 2742 IFLIB_INTR_TX, tx_que, tx_que->txr.me, buf); 2743 } 2744 rid = vector + 1; 2745 error = iflib_irq_alloc_generic(ctx, &sc->irq, rid, 2746 IFLIB_INTR_ADMIN, ixgbe_msix_link, sc, 0, "aq"); 2747 if (error) { 2748 device_printf(iflib_get_dev(ctx), 2749 "Failed to register admin handler"); 2750 return (error); 2751 } 2752 2753 sc->vector = vector; 2754 2755 return (0); 2756 fail: 2757 iflib_irq_free(ctx, &sc->irq); 2758 rx_que = sc->rx_queues; 2759 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) 2760 iflib_irq_free(ctx, &rx_que->que_irq); 2761 2762 return (error); 2763 } /* ixgbe_if_msix_intr_assign */ 2764 2765 static inline void 2766 ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que) 2767 { 2768 uint32_t newitr = 0; 2769 struct rx_ring *rxr = &que->rxr; 2770 /* FIXME struct tx_ring *txr = ... ->txr; */ 2771 2772 /* 2773 * Do Adaptive Interrupt Moderation: 2774 * - Write out last calculated setting 2775 * - Calculate based on average size over 2776 * the last interval. 2777 */ 2778 if (que->eitr_setting) { 2779 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix), 2780 que->eitr_setting); 2781 } 2782 2783 que->eitr_setting = 0; 2784 /* Idle, do nothing */ 2785 if (rxr->bytes == 0) { 2786 /* FIXME && txr->bytes == 0 */ 2787 return; 2788 } 2789 2790 if ((rxr->bytes) && (rxr->packets)) 2791 newitr = rxr->bytes / rxr->packets; 2792 /* FIXME for transmit accounting 2793 * if ((txr->bytes) && (txr->packets)) 2794 * newitr = txr->bytes/txr->packets; 2795 * if ((rxr->bytes) && (rxr->packets)) 2796 * newitr = max(newitr, (rxr->bytes / rxr->packets)); 2797 */ 2798 2799 newitr += 24; /* account for hardware frame, crc */ 2800 /* set an upper boundary */ 2801 newitr = min(newitr, 3000); 2802 2803 /* Be nice to the mid range */ 2804 if ((newitr > 300) && (newitr < 1200)) { 2805 newitr = (newitr / 3); 2806 } else { 2807 newitr = (newitr / 2); 2808 } 2809 2810 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 2811 newitr |= newitr << 16; 2812 } else { 2813 newitr |= IXGBE_EITR_CNT_WDIS; 2814 } 2815 2816 /* save for next interrupt */ 2817 que->eitr_setting = newitr; 2818 2819 /* Reset state */ 2820 /* FIXME txr->bytes = 0; */ 2821 /* FIXME txr->packets = 0; */ 2822 rxr->bytes = 0; 2823 rxr->packets = 0; 2824 2825 return; 2826 } 2827 2828 /********************************************************************* 2829 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2830 **********************************************************************/ 2831 static int 2832 ixgbe_msix_que(void *arg) 2833 { 2834 struct ix_rx_queue *que = arg; 2835 struct ixgbe_softc *sc = que->sc; 2836 if_t ifp = iflib_get_ifp(que->sc->ctx); 2837 2838 /* Protect against spurious interrupts */ 2839 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) 2840 return (FILTER_HANDLED); 2841 2842 ixgbe_disable_queue(sc, que->msix); 2843 ++que->irqs; 2844 2845 /* Check for AIM */ 2846 if (sc->enable_aim) { 2847 ixgbe_perform_aim(sc, que); 2848 } 2849 2850 return (FILTER_SCHEDULE_THREAD); 2851 } /* ixgbe_msix_que */ 2852 2853 /************************************************************************ 2854 * ixgbe_media_status - Media Ioctl callback 2855 * 2856 * Called whenever the user queries the status of 2857 * the interface using ifconfig. 2858 ************************************************************************/ 2859 static void 2860 ixgbe_if_media_status(if_ctx_t ctx, struct ifmediareq * ifmr) 2861 { 2862 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2863 struct ixgbe_hw *hw = &sc->hw; 2864 int layer; 2865 2866 INIT_DEBUGOUT("ixgbe_if_media_status: begin"); 2867 2868 ifmr->ifm_status = IFM_AVALID; 2869 ifmr->ifm_active = IFM_ETHER; 2870 2871 if (!sc->link_active) 2872 return; 2873 2874 ifmr->ifm_status |= IFM_ACTIVE; 2875 layer = sc->phy_layer; 2876 2877 if (layer & IXGBE_PHYSICAL_LAYERS_BASE_T_ALL) 2878 switch (sc->link_speed) { 2879 case IXGBE_LINK_SPEED_10GB_FULL: 2880 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2881 break; 2882 case IXGBE_LINK_SPEED_5GB_FULL: 2883 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2884 break; 2885 case IXGBE_LINK_SPEED_2_5GB_FULL: 2886 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2887 break; 2888 case IXGBE_LINK_SPEED_1GB_FULL: 2889 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2890 break; 2891 case IXGBE_LINK_SPEED_100_FULL: 2892 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2893 break; 2894 case IXGBE_LINK_SPEED_10_FULL: 2895 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2896 break; 2897 } 2898 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2899 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2900 switch (sc->link_speed) { 2901 case IXGBE_LINK_SPEED_10GB_FULL: 2902 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2903 break; 2904 case IXGBE_LINK_SPEED_1GB_FULL: 2905 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2906 break; 2907 } 2908 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2909 switch (sc->link_speed) { 2910 case IXGBE_LINK_SPEED_10GB_FULL: 2911 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2912 break; 2913 case IXGBE_LINK_SPEED_1GB_FULL: 2914 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2915 break; 2916 } 2917 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_BX && 2918 sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL) 2919 ifmr->ifm_active |= IFM_10G_BX | IFM_FDX; 2920 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2921 switch (sc->link_speed) { 2922 case IXGBE_LINK_SPEED_10GB_FULL: 2923 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2924 break; 2925 case IXGBE_LINK_SPEED_1GB_FULL: 2926 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2927 break; 2928 } 2929 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2930 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2931 switch (sc->link_speed) { 2932 case IXGBE_LINK_SPEED_10GB_FULL: 2933 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2934 break; 2935 case IXGBE_LINK_SPEED_1GB_FULL: 2936 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 2937 break; 2938 } 2939 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2940 switch (sc->link_speed) { 2941 case IXGBE_LINK_SPEED_10GB_FULL: 2942 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2943 break; 2944 } 2945 /* 2946 * XXX: These need to use the proper media types once 2947 * they're added. 2948 */ 2949 #ifndef IFM_ETH_XTYPE 2950 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2951 switch (sc->link_speed) { 2952 case IXGBE_LINK_SPEED_10GB_FULL: 2953 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2954 break; 2955 case IXGBE_LINK_SPEED_2_5GB_FULL: 2956 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2957 break; 2958 case IXGBE_LINK_SPEED_1GB_FULL: 2959 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2960 break; 2961 } 2962 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2963 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2964 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2965 switch (sc->link_speed) { 2966 case IXGBE_LINK_SPEED_10GB_FULL: 2967 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2968 break; 2969 case IXGBE_LINK_SPEED_2_5GB_FULL: 2970 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2971 break; 2972 case IXGBE_LINK_SPEED_1GB_FULL: 2973 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2974 break; 2975 } 2976 #else 2977 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2978 switch (sc->link_speed) { 2979 case IXGBE_LINK_SPEED_10GB_FULL: 2980 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 2981 break; 2982 case IXGBE_LINK_SPEED_2_5GB_FULL: 2983 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2984 break; 2985 case IXGBE_LINK_SPEED_1GB_FULL: 2986 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2987 break; 2988 } 2989 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2990 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2991 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2992 switch (sc->link_speed) { 2993 case IXGBE_LINK_SPEED_10GB_FULL: 2994 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 2995 break; 2996 case IXGBE_LINK_SPEED_2_5GB_FULL: 2997 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2998 break; 2999 case IXGBE_LINK_SPEED_1GB_FULL: 3000 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3001 break; 3002 } 3003 #endif 3004 3005 /* If nothing is recognized... */ 3006 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3007 ifmr->ifm_active |= IFM_UNKNOWN; 3008 3009 /* Display current flow control setting used on link */ 3010 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3011 hw->fc.current_mode == ixgbe_fc_full) 3012 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3013 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3014 hw->fc.current_mode == ixgbe_fc_full) 3015 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3016 } /* ixgbe_media_status */ 3017 3018 /************************************************************************ 3019 * ixgbe_media_change - Media Ioctl callback 3020 * 3021 * Called when the user changes speed/duplex using 3022 * media/mediopt option with ifconfig. 3023 ************************************************************************/ 3024 static int 3025 ixgbe_if_media_change(if_ctx_t ctx) 3026 { 3027 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3028 struct ifmedia *ifm = iflib_get_media(ctx); 3029 struct ixgbe_hw *hw = &sc->hw; 3030 ixgbe_link_speed speed = 0; 3031 3032 INIT_DEBUGOUT("ixgbe_if_media_change: begin"); 3033 3034 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3035 return (EINVAL); 3036 3037 if (hw->phy.media_type == ixgbe_media_type_backplane) 3038 return (EPERM); 3039 3040 /* 3041 * We don't actually need to check against the supported 3042 * media types of the adapter; ifmedia will take care of 3043 * that for us. 3044 */ 3045 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3046 case IFM_AUTO: 3047 case IFM_10G_T: 3048 speed |= IXGBE_LINK_SPEED_100_FULL; 3049 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3050 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3051 break; 3052 case IFM_10G_BX: 3053 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3054 break; 3055 case IFM_10G_LRM: 3056 case IFM_10G_LR: 3057 #ifndef IFM_ETH_XTYPE 3058 case IFM_10G_SR: /* KR, too */ 3059 case IFM_10G_CX4: /* KX4 */ 3060 #else 3061 case IFM_10G_KR: 3062 case IFM_10G_KX4: 3063 #endif 3064 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3065 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3066 break; 3067 #ifndef IFM_ETH_XTYPE 3068 case IFM_1000_CX: /* KX */ 3069 #else 3070 case IFM_1000_KX: 3071 #endif 3072 case IFM_1000_LX: 3073 case IFM_1000_SX: 3074 case IFM_1000_BX: 3075 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3076 break; 3077 case IFM_1000_T: 3078 speed |= IXGBE_LINK_SPEED_100_FULL; 3079 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3080 break; 3081 case IFM_10G_TWINAX: 3082 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3083 break; 3084 case IFM_5000_T: 3085 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3086 break; 3087 case IFM_2500_T: 3088 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3089 break; 3090 case IFM_100_TX: 3091 speed |= IXGBE_LINK_SPEED_100_FULL; 3092 break; 3093 case IFM_10_T: 3094 speed |= IXGBE_LINK_SPEED_10_FULL; 3095 break; 3096 default: 3097 goto invalid; 3098 } 3099 3100 hw->mac.autotry_restart = true; 3101 hw->mac.ops.setup_link(hw, speed, true); 3102 sc->advertise = 3103 ((speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 3104 ((speed & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 3105 ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 3106 ((speed & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 3107 ((speed & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 3108 ((speed & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 3109 3110 return (0); 3111 3112 invalid: 3113 device_printf(iflib_get_dev(ctx), "Invalid media type!\n"); 3114 3115 return (EINVAL); 3116 } /* ixgbe_if_media_change */ 3117 3118 /************************************************************************ 3119 * ixgbe_set_promisc 3120 ************************************************************************/ 3121 static int 3122 ixgbe_if_promisc_set(if_ctx_t ctx, int flags) 3123 { 3124 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3125 if_t ifp = iflib_get_ifp(ctx); 3126 u32 rctl; 3127 int mcnt = 0; 3128 3129 rctl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 3130 rctl &= (~IXGBE_FCTRL_UPE); 3131 if (if_getflags(ifp) & IFF_ALLMULTI) 3132 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 3133 else { 3134 mcnt = min(if_llmaddr_count(ifp), 3135 MAX_NUM_MULTICAST_ADDRESSES); 3136 } 3137 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 3138 rctl &= (~IXGBE_FCTRL_MPE); 3139 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 3140 3141 if (if_getflags(ifp) & IFF_PROMISC) { 3142 rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 3143 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 3144 } else if (if_getflags(ifp) & IFF_ALLMULTI) { 3145 rctl |= IXGBE_FCTRL_MPE; 3146 rctl &= ~IXGBE_FCTRL_UPE; 3147 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 3148 } 3149 return (0); 3150 } /* ixgbe_if_promisc_set */ 3151 3152 /************************************************************************ 3153 * ixgbe_handle_ecc - Defer recovery from an ECC interrupt 3154 ************************************************************************/ 3155 static bool 3156 ixgbe_handle_ecc(struct ixgbe_softc *sc, u32 eicr) 3157 { 3158 struct ixgbe_hw *hw = &sc->hw; 3159 3160 if ((eicr & IXGBE_EICR_ECC) == 0) 3161 return (false); 3162 3163 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_ECC); 3164 if (!atomic_cmpset_int(&sc->ecc_reset_pending, 0, 1)) 3165 return (false); 3166 3167 device_printf(sc->dev, "Received ECC Err, initiating reset\n"); 3168 return (true); 3169 } 3170 3171 /************************************************************************ 3172 * ixgbe_msix_link - Link status change ISR (MSI/MSI-X) 3173 ************************************************************************/ 3174 static int 3175 ixgbe_msix_link(void *arg) 3176 { 3177 struct ixgbe_softc *sc = arg; 3178 struct ixgbe_hw *hw = &sc->hw; 3179 u32 eicr, eicr_mask; 3180 s32 retval; 3181 3182 ++sc->link_irq; 3183 3184 /* Pause other interrupts */ 3185 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 3186 3187 /* First get the cause */ 3188 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3189 /* Be sure the queue bits are not cleared */ 3190 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3191 /* Clear interrupt with write */ 3192 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3193 3194 /* Link status change */ 3195 if (eicr & IXGBE_EICR_LSC) { 3196 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 3197 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_LSC); 3198 } 3199 3200 if (eicr & IXGBE_EICR_FW_EVENT) { 3201 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FW_EVENT); 3202 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_FWEVENT); 3203 } 3204 3205 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3206 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3207 (eicr & IXGBE_EICR_FLOW_DIR)) { 3208 /* This is probably overkill :) */ 3209 if (atomic_cmpset_int(&sc->fdir_reinit, 0, 1)) { 3210 /* Disable the interrupt */ 3211 IXGBE_WRITE_REG(hw, IXGBE_EIMC, 3212 IXGBE_EICR_FLOW_DIR); 3213 atomic_set_32(&sc->task_requests, 3214 IXGBE_REQUEST_TASK_FDIR); 3215 } 3216 } 3217 if (ixgbe_handle_ecc(sc, eicr)) 3218 atomic_set_32(&sc->task_requests, 3219 IXGBE_REQUEST_TASK_RESET); 3220 3221 /* Check for over temp condition */ 3222 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3223 switch (sc->hw.mac.type) { 3224 case ixgbe_mac_X550EM_a: 3225 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3226 break; 3227 IXGBE_WRITE_REG(hw, IXGBE_EIMC, 3228 IXGBE_EICR_GPI_SDP0_X550EM_a); 3229 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3230 IXGBE_EICR_GPI_SDP0_X550EM_a); 3231 retval = hw->phy.ops.check_overtemp(hw); 3232 if (retval != IXGBE_ERR_OVERTEMP) 3233 break; 3234 device_printf(iflib_get_dev(sc->ctx), 3235 "\nCRITICAL: OVER TEMP!!" 3236 " PHY IS SHUT DOWN!!\n"); 3237 device_printf(iflib_get_dev(sc->ctx), 3238 "System shutdown required!\n"); 3239 break; 3240 default: 3241 if (!(eicr & IXGBE_EICR_TS)) 3242 break; 3243 retval = hw->phy.ops.check_overtemp(hw); 3244 if (retval != IXGBE_ERR_OVERTEMP) 3245 break; 3246 device_printf(iflib_get_dev(sc->ctx), 3247 "\nCRITICAL: OVER TEMP!!" 3248 " PHY IS SHUT DOWN!!\n"); 3249 device_printf(iflib_get_dev(sc->ctx), 3250 "System shutdown required!\n"); 3251 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3252 IXGBE_EICR_TS); 3253 break; 3254 } 3255 } 3256 3257 /* Check for VF message */ 3258 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3259 (eicr & IXGBE_EICR_MAILBOX)) { 3260 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MBX); 3261 } 3262 } 3263 3264 /* 3265 * On E610, the firmware handles PHY configuration, so 3266 * there is no need to perform any SFP-specific tasks. 3267 */ 3268 if (hw->mac.type != ixgbe_mac_E610 && ixgbe_is_sfp(hw)) { 3269 /* Pluggable optics-related interrupt */ 3270 if (hw->mac.type >= ixgbe_mac_X540) 3271 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3272 else 3273 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3274 3275 if (eicr & eicr_mask) { 3276 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 3277 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MOD); 3278 } 3279 3280 if ((hw->mac.type == ixgbe_mac_82599EB) && 3281 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3282 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3283 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3284 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MSF); 3285 } 3286 } 3287 3288 /* Check for fan failure */ 3289 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 3290 ixgbe_check_fan_failure(sc, eicr, true); 3291 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3292 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3293 } 3294 3295 /* External PHY interrupt */ 3296 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3297 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3298 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 3299 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_PHY); 3300 } 3301 3302 return (atomic_load_acq_32(&sc->task_requests) != 0) ? 3303 FILTER_SCHEDULE_THREAD : FILTER_HANDLED; 3304 } /* ixgbe_msix_link */ 3305 3306 /************************************************************************ 3307 * ixgbe_sysctl_interrupt_rate_handler 3308 ************************************************************************/ 3309 static int 3310 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 3311 { 3312 struct ix_rx_queue *que = ((struct ix_rx_queue *)oidp->oid_arg1); 3313 int error; 3314 unsigned int reg, usec, rate; 3315 3316 if (atomic_load_acq_int(&que->sc->recovery_mode)) 3317 return (EPERM); 3318 3319 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix)); 3320 usec = ((reg & 0x0FF8) >> 3); 3321 if (usec > 0) 3322 rate = 500000 / usec; 3323 else 3324 rate = 0; 3325 error = sysctl_handle_int(oidp, &rate, 0, req); 3326 if (error || !req->newptr) 3327 return error; 3328 reg &= ~0xfff; /* default, no limitation */ 3329 ixgbe_max_interrupt_rate = 0; 3330 if (rate > 0 && rate < 500000) { 3331 if (rate < 1000) 3332 rate = 1000; 3333 ixgbe_max_interrupt_rate = rate; 3334 reg |= ((4000000/rate) & 0xff8); 3335 } 3336 IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg); 3337 3338 return (0); 3339 } /* ixgbe_sysctl_interrupt_rate_handler */ 3340 3341 /************************************************************************ 3342 * ixgbe_debug_dump_print_cluster 3343 ************************************************************************/ 3344 static u8 3345 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, struct sbuf *sbuf, 3346 u8 cluster_id) 3347 { 3348 u16 data_buf_size = IXGBE_ACI_MAX_BUFFER_SIZE; 3349 device_t dev = sc->dev; 3350 struct ixgbe_hw *hw = &sc->hw; 3351 const u8 reserved_buf[8] = {}; 3352 int max_aci_calls = 1000; 3353 int error, counter = 0; 3354 u8 *data_buf; 3355 3356 /* Input parameters / loop variables */ 3357 u16 table_id = 0; 3358 u32 offset = 0; 3359 3360 /* Data returned from ACI command */ 3361 u16 ret_buf_size = 0; 3362 u16 ret_next_cluster = 0; 3363 u16 ret_next_table = 0; 3364 u32 ret_next_index = 0; 3365 3366 data_buf = (u8 *)malloc(data_buf_size, M_IXGBE, M_NOWAIT | M_ZERO); 3367 if (!data_buf) 3368 return (0); 3369 3370 DEBUGOUT2("%s: dumping cluster id (relative) %d\n", 3371 __func__, cluster_id); 3372 3373 do { 3374 DEBUGOUT3("table_id 0x%04x offset 0x%08x buf_size %d\n", 3375 table_id, offset, data_buf_size); 3376 3377 error = ixgbe_aci_get_internal_data(hw, cluster_id, table_id, 3378 offset, data_buf, data_buf_size, &ret_buf_size, 3379 &ret_next_cluster, &ret_next_table, &ret_next_index); 3380 if (error) { 3381 device_printf(dev, 3382 "%s: Failed to get internal FW/HW data, error: %d, " 3383 "last aci status: %d\n", 3384 __func__, error, hw->aci.last_status); 3385 break; 3386 } 3387 3388 DEBUGOUT3("ret_table_id 0x%04x ret_offset 0x%08x " 3389 "ret_buf_size %d\n", 3390 ret_next_table, ret_next_index, ret_buf_size); 3391 3392 /* Print cluster id */ 3393 u32 print_cluster_id = (u32)cluster_id; 3394 sbuf_bcat(sbuf, &print_cluster_id, sizeof(print_cluster_id)); 3395 /* Print table id */ 3396 u32 print_table_id = (u32)table_id; 3397 sbuf_bcat(sbuf, &print_table_id, sizeof(print_table_id)); 3398 /* Print table length */ 3399 u32 print_table_length = (u32)ret_buf_size; 3400 sbuf_bcat(sbuf, &print_table_length, 3401 sizeof(print_table_length)); 3402 /* Print current offset */ 3403 u32 print_curr_offset = offset; 3404 sbuf_bcat(sbuf, &print_curr_offset, sizeof(print_curr_offset)); 3405 /* Print reserved bytes */ 3406 sbuf_bcat(sbuf, reserved_buf, sizeof(reserved_buf)); 3407 /* Print data */ 3408 sbuf_bcat(sbuf, data_buf, ret_buf_size); 3409 3410 /* Prepare for the next loop spin */ 3411 memset(data_buf, 0, data_buf_size); 3412 3413 bool last_index = (ret_next_index == 0xffffffff); 3414 bool last_table = ((ret_next_table == 0xff || 3415 ret_next_table == 0xffff) && 3416 last_index); 3417 3418 if (last_table) { 3419 /* End of the cluster */ 3420 DEBUGOUT1("End of the cluster ID %d\n", cluster_id); 3421 break; 3422 } else if (last_index) { 3423 /* End of the table */ 3424 table_id = ret_next_table; 3425 offset = 0; 3426 } else { 3427 /* More data left in the table */ 3428 offset = ret_next_index; 3429 } 3430 } while (++counter < max_aci_calls); 3431 3432 if (counter >= max_aci_calls) 3433 device_printf(dev, "Exceeded nr of ACI calls for cluster %d\n", 3434 cluster_id); 3435 3436 free(data_buf, M_IXGBE); 3437 3438 return (++cluster_id); 3439 } /* ixgbe_print_debug_dump_cluster */ 3440 3441 /************************************************************************ 3442 * ixgbe_sysctl_debug_dump_set_clusters 3443 * 3444 * Sets the cluster to dump from FW when Debug Dump requested. 3445 ************************************************************************/ 3446 static int 3447 ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS) 3448 { 3449 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3450 u32 clusters = sc->debug_dump_cluster_mask; 3451 device_t dev = sc->dev; 3452 int error; 3453 3454 error = sysctl_handle_32(oidp, &clusters, 0, req); 3455 if ((error) || !req->newptr) 3456 return (error); 3457 3458 if (clusters & ~(IXGBE_DBG_DUMP_VALID_CLUSTERS_MASK)) { 3459 device_printf(dev, 3460 "%s: Unrecognized parameter: %u\n", 3461 __func__, clusters); 3462 sc->debug_dump_cluster_mask = 3463 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID; 3464 return (EINVAL); 3465 } 3466 3467 sc->debug_dump_cluster_mask = clusters; 3468 3469 return (0); 3470 } /* ixgbe_sysctl_debug_dump_set_clusters */ 3471 3472 /************************************************************************ 3473 * ixgbe_sysctl_dump_debug_dump 3474 ************************************************************************/ 3475 static int 3476 ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS) 3477 { 3478 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3479 device_t dev = sc->dev; 3480 struct sbuf *sbuf; 3481 int error = 0; 3482 3483 UNREFERENCED_PARAMETER(arg2); 3484 3485 if (!sc->do_debug_dump) { 3486 if (req->oldptr == NULL && req->newptr == NULL) { 3487 error = SYSCTL_OUT(req, 0, 0); 3488 return (error); 3489 } 3490 3491 char input_buf[2] = ""; 3492 error = sysctl_handle_string(oidp, input_buf, 3493 sizeof(input_buf), req); 3494 if ((error) || (req->newptr == NULL)) 3495 return (error); 3496 3497 if (input_buf[0] == '1') { 3498 if (sc->debug_dump_cluster_mask == 3499 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID) { 3500 device_printf(dev, 3501 "Debug Dump failed because an invalid " 3502 "cluster was specified.\n"); 3503 return (EINVAL); 3504 } 3505 3506 sc->do_debug_dump = true; 3507 return (0); 3508 } 3509 3510 return (EINVAL); 3511 } 3512 3513 /* Caller just wants the upper bound for size */ 3514 if (req->oldptr == NULL && req->newptr == NULL) { 3515 size_t est_output_len = IXGBE_DBG_DUMP_BASE_SIZE; 3516 if (sc->debug_dump_cluster_mask & 0x2) 3517 est_output_len += IXGBE_DBG_DUMP_BASE_SIZE; 3518 error = SYSCTL_OUT(req, 0, est_output_len); 3519 return (error); 3520 } 3521 3522 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 3523 sbuf_clear_flags(sbuf, SBUF_INCLUDENUL); 3524 3525 DEBUGOUT("FW Debug Dump running...\n"); 3526 3527 if (sc->debug_dump_cluster_mask) { 3528 for (u8 id = 0; id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX; id++) { 3529 if (sc->debug_dump_cluster_mask & BIT(id)) { 3530 DEBUGOUT1("Dumping cluster ID %u...\n", id); 3531 ixgbe_debug_dump_print_cluster(sc, sbuf, id); 3532 } 3533 } 3534 } else { 3535 u8 next_cluster_id = 0; 3536 do { 3537 DEBUGOUT1("Dumping cluster ID %u...\n", 3538 next_cluster_id); 3539 next_cluster_id = ixgbe_debug_dump_print_cluster(sc, 3540 sbuf, next_cluster_id); 3541 } while (next_cluster_id != 0 && 3542 next_cluster_id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX); 3543 } 3544 3545 sbuf_finish(sbuf); 3546 sbuf_delete(sbuf); 3547 3548 sc->do_debug_dump = false; 3549 3550 return (error); 3551 } /* ixgbe_sysctl_dump_debug_dump */ 3552 3553 /************************************************************************ 3554 * ixgbe_add_debug_dump_sysctls 3555 ************************************************************************/ 3556 static void 3557 ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc) 3558 { 3559 struct sysctl_oid_list *debug_list, *dump_list; 3560 struct sysctl_oid *dump_node; 3561 struct sysctl_ctx_list *ctx; 3562 device_t dev = sc->dev; 3563 3564 ctx = device_get_sysctl_ctx(dev); 3565 debug_list = SYSCTL_CHILDREN(sc->debug_sysctls); 3566 3567 dump_node = SYSCTL_ADD_NODE(ctx, debug_list, OID_AUTO, "dump", 3568 CTLFLAG_RD, NULL, "Internal FW/HW Dump"); 3569 dump_list = SYSCTL_CHILDREN(dump_node); 3570 3571 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "clusters", 3572 CTLTYPE_U32 | CTLFLAG_RW, sc, 0, 3573 ixgbe_sysctl_debug_dump_set_clusters, "SU", 3574 IXGBE_SYSCTL_DESC_DEBUG_DUMP_SET_CLUSTER); 3575 3576 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "dump", 3577 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, 3578 ixgbe_sysctl_dump_debug_dump, "", 3579 IXGBE_SYSCTL_DESC_DUMP_DEBUG_DUMP); 3580 } /* ixgbe_add_debug_dump_sysctls */ 3581 3582 static void 3583 ixgbe_add_debug_sysctls(struct ixgbe_softc *sc) 3584 { 3585 struct sysctl_oid_list *ctx_list; 3586 struct sysctl_ctx_list *ctx; 3587 device_t dev = sc->dev; 3588 3589 ctx = device_get_sysctl_ctx(dev); 3590 ctx_list = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3591 3592 sc->debug_sysctls = SYSCTL_ADD_NODE(ctx, ctx_list, OID_AUTO, "debug", 3593 CTLFLAG_RD, NULL, "Debug Sysctls"); 3594 3595 if (sc->feat_en & IXGBE_FEATURE_DBG_DUMP) 3596 ixgbe_add_debug_dump_sysctls(sc); 3597 3598 if (sc->feat_en & IXGBE_FEATURE_FW_LOGGING) 3599 ixgbe_add_fw_logging_tunables(sc, sc->debug_sysctls); 3600 } /* ixgbe_add_debug_sysctls */ 3601 3602 /************************************************************************ 3603 * ixgbe_add_device_sysctls 3604 ************************************************************************/ 3605 static void 3606 ixgbe_add_device_sysctls(if_ctx_t ctx) 3607 { 3608 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3609 device_t dev = iflib_get_dev(ctx); 3610 struct ixgbe_hw *hw = &sc->hw; 3611 struct sysctl_oid_list *child; 3612 struct sysctl_ctx_list *ctx_list; 3613 3614 ctx_list = device_get_sysctl_ctx(dev); 3615 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3616 3617 /* Sysctls for all devices */ 3618 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc", 3619 CTLTYPE_INT | CTLFLAG_RW, 3620 sc, 0, ixgbe_sysctl_flowcntl, "I", 3621 IXGBE_SYSCTL_DESC_SET_FC); 3622 3623 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "advertise_speed", 3624 CTLTYPE_INT | CTLFLAG_RW, 3625 sc, 0, ixgbe_sysctl_advertise, "I", 3626 IXGBE_SYSCTL_DESC_ADV_SPEED); 3627 if (hw->mac.type == ixgbe_mac_82599EB || 3628 hw->mac.type == ixgbe_mac_X540) { 3629 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3630 "iov_dma_abort_events", CTLFLAG_RD, 3631 &sc->iov_dma_abort_events, 0, 3632 "VF invalid-DMA events"); 3633 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3634 "iov_dma_abort_flr_failures", CTLFLAG_RD, 3635 &sc->iov_dma_abort_flr_failures, 0, 3636 "Failed VF reset attempts after invalid-DMA events"); 3637 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3638 "iov_dma_abort_quarantines", CTLFLAG_RD, 3639 &sc->iov_dma_abort_quarantines, 0, 3640 "VFs quarantined after repeated invalid-DMA events"); 3641 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO, 3642 "iov_quarantined_vfs", CTLFLAG_RD, 3643 &sc->iov_quarantined_vfs, 0, 3644 "Bitmap of quarantined VF pools"); 3645 } 3646 3647 sc->enable_aim = ixgbe_enable_aim; 3648 SYSCTL_ADD_INT(ctx_list, child, OID_AUTO, "enable_aim", CTLFLAG_RW, 3649 &sc->enable_aim, 0, "Interrupt Moderation"); 3650 3651 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version", 3652 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3653 ixgbe_sysctl_print_fw_version, "A", "Prints FW/NVM Versions"); 3654 3655 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3656 "tso_tcp_flags_mask_first_segment", 3657 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3658 sc, 0, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3659 "TSO TCP flags mask for first segment"); 3660 3661 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3662 "tso_tcp_flags_mask_middle_segment", 3663 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3664 sc, 1, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3665 "TSO TCP flags mask for middle segment"); 3666 3667 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3668 "tso_tcp_flags_mask_last_segment", 3669 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3670 sc, 2, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3671 "TSO TCP flags mask for last segment"); 3672 3673 #ifdef IXGBE_DEBUG 3674 /* testing sysctls (for all devices) */ 3675 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "power_state", 3676 CTLTYPE_INT | CTLFLAG_RW, 3677 sc, 0, ixgbe_sysctl_power_state, 3678 "I", "PCI Power State"); 3679 3680 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "print_rss_config", 3681 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3682 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 3683 #endif 3684 /* for X550 series devices */ 3685 if (hw->mac.type >= ixgbe_mac_X550) 3686 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "dmac", 3687 CTLTYPE_U16 | CTLFLAG_RW, 3688 sc, 0, ixgbe_sysctl_dmac, 3689 "I", "DMA Coalesce"); 3690 3691 /* for WoL-capable devices */ 3692 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 3693 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wol_enable", 3694 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 3695 ixgbe_sysctl_wol_enable, "I", 3696 "Enable/Disable Wake on LAN"); 3697 3698 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wufc", 3699 CTLTYPE_U32 | CTLFLAG_RW, 3700 sc, 0, ixgbe_sysctl_wufc, 3701 "I", "Enable/Disable Wake Up Filters"); 3702 } 3703 3704 /* for X552/X557-AT devices */ 3705 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 3706 struct sysctl_oid *phy_node; 3707 struct sysctl_oid_list *phy_list; 3708 3709 phy_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "phy", 3710 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 3711 "External PHY sysctls"); 3712 phy_list = SYSCTL_CHILDREN(phy_node); 3713 3714 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, "temp", 3715 CTLTYPE_U16 | CTLFLAG_RD, 3716 sc, 0, ixgbe_sysctl_phy_temp, 3717 "I", "Current External PHY Temperature (Celsius)"); 3718 3719 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, 3720 "overtemp_occurred", 3721 CTLTYPE_U16 | CTLFLAG_RD, sc, 0, 3722 ixgbe_sysctl_phy_overtemp_occurred, "I", 3723 "External PHY High Temperature Event Occurred"); 3724 } 3725 3726 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3727 struct sysctl_oid *eee_node; 3728 struct sysctl_oid_list *eee_list; 3729 3730 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_state", 3731 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 3732 ixgbe_sysctl_eee_state, "I", "EEE Power Save State"); 3733 3734 eee_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "eee", 3735 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 3736 "Energy Efficient Ethernet statistics"); 3737 eee_list = SYSCTL_CHILDREN(eee_node); 3738 SYSCTL_ADD_UQUAD(ctx_list, eee_list, OID_AUTO, "tx_lpi_count", 3739 CTLFLAG_RD, &sc->stats.pf.tlpic, "TX LPI event count"); 3740 SYSCTL_ADD_UQUAD(ctx_list, eee_list, OID_AUTO, "rx_lpi_count", 3741 CTLFLAG_RD, &sc->stats.pf.rlpic, "RX LPI event count"); 3742 } 3743 3744 ixgbe_add_debug_sysctls(sc); 3745 } /* ixgbe_add_device_sysctls */ 3746 3747 /************************************************************************ 3748 * ixgbe_allocate_pci_resources 3749 ************************************************************************/ 3750 static int 3751 ixgbe_allocate_pci_resources(if_ctx_t ctx) 3752 { 3753 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3754 device_t dev = iflib_get_dev(ctx); 3755 int rid; 3756 3757 rid = PCIR_BAR(0); 3758 sc->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 3759 RF_ACTIVE); 3760 3761 if (!(sc->pci_mem)) { 3762 device_printf(dev, 3763 "Unable to allocate bus resource: memory\n"); 3764 return (ENXIO); 3765 } 3766 3767 /* Save bus_space values for READ/WRITE_REG macros */ 3768 sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->pci_mem); 3769 sc->osdep.mem_bus_space_handle = 3770 rman_get_bushandle(sc->pci_mem); 3771 /* Set hw values for shared code */ 3772 sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle; 3773 3774 return (0); 3775 } /* ixgbe_allocate_pci_resources */ 3776 3777 /************************************************************************ 3778 * ixgbe_detach - Device removal routine 3779 * 3780 * Called when the driver is being removed. 3781 * Stops the adapter and deallocates all the resources 3782 * that were allocated for driver operation. 3783 * 3784 * return 0 on success, positive on failure 3785 ************************************************************************/ 3786 static int 3787 ixgbe_if_detach(if_ctx_t ctx) 3788 { 3789 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3790 u32 ctrl_ext; 3791 3792 INIT_DEBUGOUT("ixgbe_detach: begin"); 3793 3794 sc->iov_recovery_stop = true; 3795 3796 ixgbe_setup_low_power_mode(ctx); 3797 3798 /* let hardware know driver is unloading */ 3799 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3800 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3801 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3802 3803 callout_drain(&sc->fw_mode_timer); 3804 3805 if (sc->hw.mac.type == ixgbe_mac_E610) { 3806 ixgbe_disable_lse(sc); 3807 ixgbe_shutdown_aci(&sc->hw); 3808 } 3809 3810 ixgbe_free_pci_resources(ctx); 3811 3812 free(sc->mta, M_IXGBE); 3813 3814 return (0); 3815 } /* ixgbe_if_detach */ 3816 3817 /************************************************************************ 3818 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3819 * 3820 * Prepare the adapter/port for LPLU and/or WoL 3821 ************************************************************************/ 3822 static int 3823 ixgbe_setup_low_power_mode(if_ctx_t ctx) 3824 { 3825 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3826 struct ixgbe_hw *hw = &sc->hw; 3827 device_t dev = iflib_get_dev(ctx); 3828 s32 error = 0; 3829 3830 if (!hw->wol_enabled) 3831 ixgbe_set_phy_power(hw, false); 3832 3833 /* Limit power management flow to X550EM baseT */ 3834 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3835 hw->phy.ops.enter_lplu) { 3836 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3837 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3838 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3839 3840 /* 3841 * Clear Wake Up Status register to prevent any previous 3842 * wakeup events from waking us up immediately after we 3843 * suspend. 3844 */ 3845 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3846 3847 /* 3848 * Program the Wakeup Filter Control register with user filter 3849 * settings 3850 */ 3851 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3852 3853 /* Enable wakeups and power management in Wakeup Control */ 3854 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3855 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3856 3857 /* X550EM baseT adapters need a special LPLU flow */ 3858 hw->phy.reset_disable = true; 3859 ixgbe_if_stop(ctx); 3860 error = hw->phy.ops.enter_lplu(hw); 3861 if (error) 3862 device_printf(dev, "Error entering LPLU: %d\n", 3863 error); 3864 hw->phy.reset_disable = false; 3865 } else { 3866 /* Just stop for other adapters */ 3867 ixgbe_if_stop(ctx); 3868 } 3869 3870 /* Disable the 82599 link only when actually entering D3. */ 3871 if (hw->mac.type == ixgbe_mac_82599EB) 3872 ixgbe_stop_mac_link_on_d3_82599(hw); 3873 3874 return error; 3875 } /* ixgbe_setup_low_power_mode */ 3876 3877 /************************************************************************ 3878 * ixgbe_shutdown - Shutdown entry point 3879 ************************************************************************/ 3880 static int 3881 ixgbe_if_shutdown(if_ctx_t ctx) 3882 { 3883 int error = 0; 3884 3885 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3886 3887 error = ixgbe_setup_low_power_mode(ctx); 3888 3889 return (error); 3890 } /* ixgbe_if_shutdown */ 3891 3892 /************************************************************************ 3893 * ixgbe_suspend 3894 * 3895 * From D0 to D3 3896 ************************************************************************/ 3897 static int 3898 ixgbe_if_suspend(if_ctx_t ctx) 3899 { 3900 int error = 0; 3901 3902 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3903 3904 error = ixgbe_setup_low_power_mode(ctx); 3905 3906 return (error); 3907 } /* ixgbe_if_suspend */ 3908 3909 /************************************************************************ 3910 * ixgbe_resume 3911 * 3912 * From D3 to D0 3913 ************************************************************************/ 3914 static int 3915 ixgbe_if_resume(if_ctx_t ctx) 3916 { 3917 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3918 device_t dev = iflib_get_dev(ctx); 3919 if_t ifp = iflib_get_ifp(ctx); 3920 struct ixgbe_hw *hw = &sc->hw; 3921 u32 wus; 3922 3923 INIT_DEBUGOUT("ixgbe_resume: begin"); 3924 3925 /* Read & clear WUS register */ 3926 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 3927 if (wus) 3928 device_printf(dev, "Woken up by (WUS): %#010x\n", 3929 IXGBE_READ_REG(hw, IXGBE_WUS)); 3930 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3931 /* And clear WUFC until next low-power transition */ 3932 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3933 3934 /* 3935 * Required after D3->D0 transition; 3936 * will re-advertise all previous advertised speeds 3937 */ 3938 if (if_getflags(ifp) & IFF_UP) 3939 ixgbe_if_init(ctx); 3940 3941 return (0); 3942 } /* ixgbe_if_resume */ 3943 3944 /************************************************************************ 3945 * ixgbe_if_mtu_set - Ioctl mtu entry point 3946 * 3947 * Return 0 on success, EINVAL on failure 3948 ************************************************************************/ 3949 static int 3950 ixgbe_if_mtu_set(if_ctx_t ctx, uint32_t mtu) 3951 { 3952 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3953 int error = 0; 3954 3955 IOCTL_DEBUGOUT("ioctl: SIOCIFMTU (Set Interface MTU)"); 3956 3957 if (mtu > IXGBE_MAX_MTU) { 3958 error = EINVAL; 3959 } else { 3960 sc->max_frame_size = mtu + IXGBE_MTU_HDR; 3961 } 3962 3963 return error; 3964 } /* ixgbe_if_mtu_set */ 3965 3966 /************************************************************************ 3967 * ixgbe_if_crcstrip_set 3968 ************************************************************************/ 3969 static void 3970 ixgbe_if_crcstrip_set(if_ctx_t ctx, int onoff, int crcstrip) 3971 { 3972 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3973 struct ixgbe_hw *hw = &sc->hw; 3974 /* crc stripping is set in two places: 3975 * IXGBE_HLREG0 (modified on init_locked and hw reset) 3976 * IXGBE_RDRXCTL (set by the original driver in 3977 * ixgbe_setup_hw_rsc() called in init_locked. 3978 * We disable the setting when netmap is compiled in). 3979 * We update the values here, but also in ixgbe.c because 3980 * init_locked sometimes is called outside our control. 3981 */ 3982 uint32_t hl, rxc; 3983 3984 hl = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3985 rxc = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 3986 #ifdef NETMAP 3987 if (netmap_verbose) 3988 D("%s read HLREG 0x%x rxc 0x%x", 3989 onoff ? "enter" : "exit", hl, rxc); 3990 #endif 3991 /* hw requirements ... */ 3992 rxc &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; 3993 rxc |= IXGBE_RDRXCTL_RSCACKC; 3994 if (onoff && !crcstrip) { 3995 /* keep the crc. Fast rx */ 3996 hl &= ~IXGBE_HLREG0_RXCRCSTRP; 3997 rxc &= ~IXGBE_RDRXCTL_CRCSTRIP; 3998 } else { 3999 /* reset default mode */ 4000 hl |= IXGBE_HLREG0_RXCRCSTRP; 4001 rxc |= IXGBE_RDRXCTL_CRCSTRIP; 4002 } 4003 #ifdef NETMAP 4004 if (netmap_verbose) 4005 D("%s write HLREG 0x%x rxc 0x%x", 4006 onoff ? "enter" : "exit", hl, rxc); 4007 #endif 4008 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl); 4009 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc); 4010 } /* ixgbe_if_crcstrip_set */ 4011 4012 /********************************************************************* 4013 * ixgbe_if_init - Init entry point 4014 * 4015 * Used in two ways: It is used by the stack as an init 4016 * entry point in network interface structure. It is also 4017 * used by the driver as a hw/sw initialization routine to 4018 * get to a consistent state. 4019 * 4020 * Return 0 on success, positive on failure 4021 **********************************************************************/ 4022 void 4023 ixgbe_if_init(if_ctx_t ctx) 4024 { 4025 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4026 if_t ifp = iflib_get_ifp(ctx); 4027 device_t dev = iflib_get_dev(ctx); 4028 struct ixgbe_hw *hw = &sc->hw; 4029 struct ix_rx_queue *rx_que; 4030 struct ix_tx_queue *tx_que; 4031 u32 txdctl, mhadd; 4032 u32 rxdctl, rxctrl; 4033 u32 ctrl_ext; 4034 4035 int i, j, err; 4036 4037 INIT_DEBUGOUT("ixgbe_if_init: begin"); 4038 if (atomic_load_acq_int(&sc->recovery_mode)) { 4039 iflib_init_failed(ctx); 4040 return; 4041 } 4042 /* Leave an overheated adapter stopped until an operator retries. */ 4043 if (sc->overtemp_shutdown_pending) { 4044 sc->overtemp_shutdown_pending = false; 4045 iflib_init_failed(ctx); 4046 return; 4047 } 4048 4049 /* Preserve the largest frame requested by the PF or an active VF. */ 4050 sc->max_frame_size = if_getmtu(ifp) + IXGBE_MTU_HDR; 4051 ixgbe_recalculate_max_frame(sc); 4052 4053 /* Queue indices may change with IOV mode */ 4054 ixgbe_align_all_queue_indices(sc); 4055 4056 /* reprogram the RAR[0] in case user changed it. */ 4057 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4058 4059 /* Get the latest mac address, User can use a LAA */ 4060 bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4061 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4062 hw->addr_ctrl.rar_used_count = 1; 4063 4064 ixgbe_init_hw(hw); 4065 sc->iov_mta_valid = false; 4066 sc->iov_vfta_valid = false; 4067 4068 ixgbe_initialize_iov(sc); 4069 4070 ixgbe_initialize_transmit_units(ctx); 4071 4072 /* Setup Multicast table */ 4073 ixgbe_if_multi_set(ctx); 4074 4075 /* Determine the correct mbuf pool, based on frame size */ 4076 sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); 4077 4078 /* Configure RX settings */ 4079 ixgbe_initialize_receive_units(ctx); 4080 4081 /* 4082 * Initialize the deferred administrative request mask. 4083 */ 4084 atomic_store_rel_32(&sc->task_requests, 0); 4085 4086 /* Enable SDP & MSI-X interrupts based on adapter */ 4087 ixgbe_config_gpie(sc); 4088 4089 /* Set MTU size */ 4090 if (sc->max_frame_size > ETHER_MAX_LEN) { 4091 /* aka IXGBE_MAXFRS on 82599 and newer */ 4092 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4093 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4094 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4095 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4096 } 4097 4098 /* Now enable all the queues */ 4099 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 4100 i++, tx_que++) { 4101 struct tx_ring *txr = &tx_que->txr; 4102 4103 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4104 txdctl &= ~IXGBE_TXDCTL_THRESH_MASK; 4105 txdctl |= IXGBE_TXDCTL_ENABLE | IXGBE_TXDCTL_THRESH_DEFAULT; 4106 /* 4107 * When the internal queue falls below PTHRESH (32), 4108 * start prefetching as long as there are at least 4109 * HTHRESH (1) buffers ready. Leave WTHRESH at zero 4110 * so that writeback follows iflib's sparse RS bits. 4111 * Prefetching enables tx line rate even with 1 queue. 4112 */ 4113 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4114 } 4115 4116 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 4117 i++, rx_que++) { 4118 struct rx_ring *rxr = &rx_que->rxr; 4119 4120 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4121 if (hw->mac.type == ixgbe_mac_82598EB) { 4122 /* 4123 * PTHRESH = 21 4124 * HTHRESH = 4 4125 * WTHRESH = 8 4126 */ 4127 rxdctl &= ~0x3FFFFF; 4128 rxdctl |= 0x080420; 4129 } 4130 rxdctl |= IXGBE_RXDCTL_ENABLE; 4131 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4132 for (j = 0; j < 10; j++) { 4133 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4134 IXGBE_RXDCTL_ENABLE) 4135 break; 4136 else 4137 msec_delay(1); 4138 } 4139 wmb(); 4140 } 4141 4142 /* Enable Receive engine */ 4143 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4144 if (hw->mac.type == ixgbe_mac_82598EB) 4145 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4146 rxctrl |= IXGBE_RXCTRL_RXEN; 4147 ixgbe_enable_rx_dma(hw, rxctrl); 4148 4149 /* Set up MSI/MSI-X routing */ 4150 if (ixgbe_enable_msix) { 4151 ixgbe_configure_ivars(sc); 4152 /* Set up auto-mask */ 4153 if (hw->mac.type == ixgbe_mac_82598EB) 4154 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4155 else { 4156 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4157 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4158 } 4159 } else { /* Simple settings for Legacy/MSI */ 4160 ixgbe_set_ivar(sc, 0, 0, 0); 4161 ixgbe_set_ivar(sc, 0, 0, 1); 4162 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4163 } 4164 4165 ixgbe_init_fdir(sc); 4166 4167 /* 4168 * Check on any SFP devices that 4169 * need to be kick-started 4170 */ 4171 if (hw->phy.type == ixgbe_phy_none) { 4172 err = hw->phy.ops.identify(hw); 4173 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4174 device_printf(dev, 4175 "Unsupported SFP+ module type was detected.\n"); 4176 return; 4177 } 4178 } 4179 4180 /* Set moderation on the Link interrupt */ 4181 IXGBE_WRITE_REG(hw, IXGBE_EITR(sc->vector), IXGBE_LINK_ITR); 4182 4183 /* Enable power to the phy. */ 4184 ixgbe_set_phy_power(hw, true); 4185 4186 /* Config/Enable Link */ 4187 ixgbe_config_link(ctx); 4188 4189 /* Hardware Packet Buffer & Flow Control setup */ 4190 ixgbe_config_delay_values(sc); 4191 4192 /* Initialize the FC settings */ 4193 ixgbe_start_hw(hw); 4194 4195 /* Set up VLAN support and filter */ 4196 ixgbe_setup_vlan_hw_support(ctx); 4197 4198 /* Setup DMA Coalescing */ 4199 ixgbe_config_dmac(sc); 4200 4201 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4202 ixgbe_enable_mdd(hw); 4203 ixgbe_activate_vfs(sc); 4204 } 4205 4206 /* And now turn on interrupts */ 4207 ixgbe_if_enable_intr(ctx); 4208 4209 /* Enable the use of the MBX by the VF's */ 4210 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4211 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4212 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4213 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4214 } 4215 4216 } /* ixgbe_init_locked */ 4217 4218 /************************************************************************ 4219 * ixgbe_set_ivar 4220 * 4221 * Setup the correct IVAR register for a particular MSI-X interrupt 4222 * (yes this is all very magic and confusing :) 4223 * - entry is the register array entry 4224 * - vector is the MSI-X vector for this queue 4225 * - type is RX/TX/MISC 4226 ************************************************************************/ 4227 static void 4228 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4229 { 4230 struct ixgbe_hw *hw = &sc->hw; 4231 u32 ivar, index; 4232 4233 vector |= IXGBE_IVAR_ALLOC_VAL; 4234 4235 switch (hw->mac.type) { 4236 case ixgbe_mac_82598EB: 4237 if (type == -1) 4238 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4239 else 4240 entry += (type * 64); 4241 index = (entry >> 2) & 0x1F; 4242 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4243 ivar &= ~(0xFF << (8 * (entry & 0x3))); 4244 ivar |= (vector << (8 * (entry & 0x3))); 4245 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4246 break; 4247 case ixgbe_mac_82599EB: 4248 case ixgbe_mac_X540: 4249 case ixgbe_mac_X550: 4250 case ixgbe_mac_X550EM_x: 4251 case ixgbe_mac_X550EM_a: 4252 case ixgbe_mac_E610: 4253 if (type == -1) { /* MISC IVAR */ 4254 index = (entry & 1) * 8; 4255 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4256 ivar &= ~(0xFF << index); 4257 ivar |= (vector << index); 4258 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4259 } else { /* RX/TX IVARS */ 4260 index = (16 * (entry & 1)) + (8 * type); 4261 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4262 ivar &= ~(0xFF << index); 4263 ivar |= (vector << index); 4264 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4265 } 4266 default: 4267 break; 4268 } 4269 } /* ixgbe_set_ivar */ 4270 4271 /************************************************************************ 4272 * ixgbe_configure_ivars 4273 ************************************************************************/ 4274 static void 4275 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4276 { 4277 struct ix_rx_queue *rx_que = sc->rx_queues; 4278 struct ix_tx_queue *tx_que = sc->tx_queues; 4279 u32 newitr; 4280 4281 if (ixgbe_max_interrupt_rate > 0) 4282 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 4283 else { 4284 /* 4285 * Disable DMA coalescing if interrupt moderation is 4286 * disabled. 4287 */ 4288 sc->dmac = 0; 4289 newitr = 0; 4290 } 4291 4292 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) { 4293 struct rx_ring *rxr = &rx_que->rxr; 4294 4295 /* First the RX queue entry */ 4296 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0); 4297 4298 /* Set an Initial EITR value */ 4299 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr); 4300 } 4301 for (int i = 0; i < sc->num_tx_queues; i++, tx_que++) { 4302 struct tx_ring *txr = &tx_que->txr; 4303 4304 /* ... and the TX */ 4305 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1); 4306 } 4307 /* For the Link interrupt */ 4308 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4309 } /* ixgbe_configure_ivars */ 4310 4311 /************************************************************************ 4312 * ixgbe_config_gpie 4313 ************************************************************************/ 4314 static void 4315 ixgbe_config_gpie(struct ixgbe_softc *sc) 4316 { 4317 struct ixgbe_hw *hw = &sc->hw; 4318 u32 gpie; 4319 4320 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4321 4322 if (sc->intr_type == IFLIB_INTR_MSIX) { 4323 /* Enable Enhanced MSI-X mode */ 4324 gpie |= IXGBE_GPIE_MSIX_MODE | 4325 IXGBE_GPIE_EIAME | 4326 IXGBE_GPIE_PBA_SUPPORT | 4327 IXGBE_GPIE_OCD; 4328 } 4329 4330 /* Fan Failure Interrupt */ 4331 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4332 gpie |= IXGBE_SDP1_GPIEN; 4333 4334 /* Thermal Sensor Interrupt */ 4335 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4336 gpie |= IXGBE_SDP0_GPIEN_X540; 4337 4338 /* Link detection */ 4339 switch (hw->mac.type) { 4340 case ixgbe_mac_82599EB: 4341 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4342 break; 4343 case ixgbe_mac_X550EM_x: 4344 case ixgbe_mac_X550EM_a: 4345 gpie |= IXGBE_SDP0_GPIEN_X540; 4346 break; 4347 default: 4348 break; 4349 } 4350 4351 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4352 4353 } /* ixgbe_config_gpie */ 4354 4355 /************************************************************************ 4356 * ixgbe_config_delay_values 4357 * 4358 * Requires sc->max_frame_size to be set. 4359 ************************************************************************/ 4360 static void 4361 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4362 { 4363 struct ixgbe_hw *hw = &sc->hw; 4364 u32 rxpb, frame, size, tmp; 4365 4366 frame = sc->max_frame_size; 4367 4368 /* Calculate High Water */ 4369 switch (hw->mac.type) { 4370 case ixgbe_mac_X540: 4371 case ixgbe_mac_X550: 4372 case ixgbe_mac_X550EM_x: 4373 case ixgbe_mac_X550EM_a: 4374 tmp = IXGBE_DV_X540(frame, frame); 4375 break; 4376 default: 4377 tmp = IXGBE_DV(frame, frame); 4378 break; 4379 } 4380 size = IXGBE_BT2KB(tmp); 4381 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4382 hw->fc.high_water[0] = rxpb - size; 4383 4384 /* Now calculate Low Water */ 4385 switch (hw->mac.type) { 4386 case ixgbe_mac_X540: 4387 case ixgbe_mac_X550: 4388 case ixgbe_mac_X550EM_x: 4389 case ixgbe_mac_X550EM_a: 4390 tmp = IXGBE_LOW_DV_X540(frame); 4391 break; 4392 default: 4393 tmp = IXGBE_LOW_DV(frame); 4394 break; 4395 } 4396 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4397 4398 hw->fc.pause_time = IXGBE_FC_PAUSE; 4399 hw->fc.send_xon = true; 4400 } /* ixgbe_config_delay_values */ 4401 4402 /************************************************************************ 4403 * ixgbe_set_multi - Multicast Update 4404 * 4405 * Called whenever multicast address list is updated. 4406 ************************************************************************/ 4407 static u_int 4408 ixgbe_mc_filter_apply(void *arg, struct sockaddr_dl *sdl, u_int idx) 4409 { 4410 struct ixgbe_softc *sc = arg; 4411 struct ixgbe_mc_addr *mta = sc->mta; 4412 4413 if (idx == MAX_NUM_MULTICAST_ADDRESSES) 4414 return (0); 4415 bcopy(LLADDR(sdl), mta[idx].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4416 mta[idx].vmdq = sc->pool; 4417 4418 return (1); 4419 } /* ixgbe_mc_filter_apply */ 4420 4421 #ifdef PCI_IOV 4422 /* 4423 * The MTA is shared by the PF and every VF. Rebuild it from all owners 4424 * because an individual bit cannot be cleared safely when hashes collide. 4425 */ 4426 u_int 4427 ixgbe_iov_rebuild_mta(struct ixgbe_softc *sc) 4428 { 4429 struct ixgbe_hw *hw; 4430 struct ixgbe_mc_addr *mta; 4431 struct ixgbe_vf *vf; 4432 u32 old_mta[IXGBE_MAX_MTA]; 4433 u32 hash; 4434 u_int i, mcnt; 4435 int vf_index; 4436 4437 hw = &sc->hw; 4438 mta = sc->mta; 4439 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4440 mcnt = if_foreach_llmaddr(iflib_get_ifp(sc->ctx), 4441 ixgbe_mc_filter_apply, sc); 4442 4443 bcopy(hw->mac.mta_shadow, old_mta, sizeof(old_mta)); 4444 bzero(hw->mac.mta_shadow, sizeof(hw->mac.mta_shadow)); 4445 hw->addr_ctrl.num_mc_addrs = mcnt; 4446 hw->addr_ctrl.mta_in_use = 0; 4447 4448 for (i = 0; i < mcnt; i++) 4449 ixgbe_set_mta(hw, mta[i].addr); 4450 4451 for (vf_index = 0; vf_index < sc->num_vfs; vf_index++) { 4452 vf = &sc->vfs[vf_index]; 4453 if (!(vf->flags & IXGBE_VF_ACTIVE)) 4454 continue; 4455 4456 for (i = 0; i < vf->num_mc_hashes; i++) { 4457 hash = vf->mc_hash[i] & 0xfff; 4458 hw->mac.mta_shadow[(hash >> 5) & 4459 (hw->mac.mcft_size - 1)] |= 4460 1U << (hash & 0x1f); 4461 hw->addr_ctrl.mta_in_use++; 4462 } 4463 } 4464 4465 for (i = 0; i < hw->mac.mcft_size; i++) { 4466 if (sc->iov_mta_valid && 4467 old_mta[i] == hw->mac.mta_shadow[i]) 4468 continue; 4469 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_MTA(0), i, 4470 hw->mac.mta_shadow[i]); 4471 } 4472 sc->iov_mta_valid = true; 4473 4474 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, 4475 (hw->addr_ctrl.mta_in_use != 0 ? IXGBE_MCSTCTRL_MFE : 0) | 4476 hw->mac.mc_filter_type); 4477 4478 return (mcnt); 4479 } 4480 #endif 4481 4482 static void 4483 ixgbe_if_multi_set(if_ctx_t ctx) 4484 { 4485 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4486 struct ixgbe_mc_addr *mta; 4487 if_t ifp = iflib_get_ifp(ctx); 4488 u8 *update_ptr; 4489 u32 fctrl; 4490 u_int mcnt; 4491 4492 IOCTL_DEBUGOUT("ixgbe_if_multi_set: begin"); 4493 4494 #ifdef PCI_IOV 4495 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4496 mcnt = ixgbe_iov_rebuild_mta(sc); 4497 } else 4498 #endif 4499 { 4500 mta = sc->mta; 4501 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4502 4503 mcnt = if_foreach_llmaddr(iflib_get_ifp(ctx), 4504 ixgbe_mc_filter_apply, sc); 4505 4506 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 4507 update_ptr = (u8 *)mta; 4508 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4509 ixgbe_mc_array_itr, true); 4510 } 4511 } 4512 4513 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4514 4515 if (if_getflags(ifp) & IFF_PROMISC) 4516 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4517 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 4518 if_getflags(ifp) & IFF_ALLMULTI) { 4519 fctrl |= IXGBE_FCTRL_MPE; 4520 fctrl &= ~IXGBE_FCTRL_UPE; 4521 } else 4522 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4523 4524 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4525 } /* ixgbe_if_multi_set */ 4526 4527 /************************************************************************ 4528 * ixgbe_mc_array_itr 4529 * 4530 * An iterator function needed by the multicast shared code. 4531 * It feeds the shared code routine the addresses in the 4532 * array of ixgbe_set_multi() one by one. 4533 ************************************************************************/ 4534 static u8 * 4535 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4536 { 4537 struct ixgbe_mc_addr *mta; 4538 4539 mta = (struct ixgbe_mc_addr *)*update_ptr; 4540 *vmdq = mta->vmdq; 4541 4542 *update_ptr = (u8*)(mta + 1); 4543 4544 return (mta->addr); 4545 } /* ixgbe_mc_array_itr */ 4546 4547 /************************************************************************ 4548 * ixgbe_local_timer - Timer routine 4549 * 4550 * Checks for link status, updates statistics, 4551 * and runs the watchdog check. 4552 ************************************************************************/ 4553 static void 4554 ixgbe_if_timer(if_ctx_t ctx, uint16_t qid) 4555 { 4556 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4557 4558 if (qid != 0) 4559 return; 4560 4561 /* Check for pluggable optics */ 4562 if (sc->sfp_probe) 4563 if (!ixgbe_sfp_probe(ctx)) 4564 return; /* Nothing to do */ 4565 4566 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 0); 4567 4568 /* Fire off the adminq task */ 4569 iflib_admin_intr_deferred(ctx); 4570 4571 } /* ixgbe_if_timer */ 4572 4573 /************************************************************************ 4574 * ixgbe_fw_mode_timer - FW mode timer routine 4575 ************************************************************************/ 4576 static void 4577 ixgbe_fw_mode_timer(void *arg) 4578 { 4579 struct ixgbe_softc *sc = arg; 4580 struct ixgbe_hw *hw = &sc->hw; 4581 4582 if (ixgbe_fw_recovery_mode(hw)) { 4583 if (atomic_cmpset_acq_int(&sc->recovery_mode, 0, 1)) { 4584 /* Firmware error detected, entering recovery mode */ 4585 device_printf(sc->dev, 4586 "Firmware recovery mode detected. Limiting" 4587 " functionality. Refer to the Intel(R) Ethernet" 4588 " Adapters and Devices User Guide for details on" 4589 " firmware recovery mode.\n"); 4590 4591 /* Stop and publish the failure from the iflib taskqueue. */ 4592 iflib_request_reset_if_up(sc->ctx); 4593 iflib_admin_intr_deferred(sc->ctx); 4594 } 4595 } else if (atomic_cmpset_acq_int(&sc->recovery_mode, 1, 0)) { 4596 /* Reinitialize an interface which was up when recovery began. */ 4597 iflib_request_reset_if_up(sc->ctx); 4598 iflib_admin_intr_deferred(sc->ctx); 4599 } 4600 4601 4602 callout_reset(&sc->fw_mode_timer, hz, 4603 ixgbe_fw_mode_timer, sc); 4604 } /* ixgbe_fw_mode_timer */ 4605 4606 /************************************************************************ 4607 * ixgbe_sfp_probe 4608 * 4609 * Determine if a port had optics inserted. 4610 ************************************************************************/ 4611 static bool 4612 ixgbe_sfp_probe(if_ctx_t ctx) 4613 { 4614 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4615 struct ixgbe_hw *hw = &sc->hw; 4616 device_t dev = iflib_get_dev(ctx); 4617 bool result = false; 4618 4619 if ((hw->phy.type == ixgbe_phy_nl) && 4620 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 4621 s32 ret = hw->phy.ops.identify_sfp(hw); 4622 if (ret) 4623 goto out; 4624 ret = hw->phy.ops.reset(hw); 4625 sc->sfp_probe = false; 4626 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4627 device_printf(dev, 4628 "Unsupported SFP+ module detected!"); 4629 device_printf(dev, 4630 "Reload driver with supported module.\n"); 4631 goto out; 4632 } else 4633 device_printf(dev, "SFP+ module detected!\n"); 4634 /* We now have supported optics */ 4635 result = true; 4636 } 4637 out: 4638 4639 return (result); 4640 } /* ixgbe_sfp_probe */ 4641 4642 /************************************************************************ 4643 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4644 ************************************************************************/ 4645 static bool 4646 ixgbe_handle_mod(void *context) 4647 { 4648 if_ctx_t ctx = context; 4649 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4650 struct ixgbe_hw *hw = &sc->hw; 4651 device_t dev = iflib_get_dev(ctx); 4652 u32 err, cage_full = 0; 4653 4654 if (sc->hw.need_crosstalk_fix) { 4655 switch (hw->mac.type) { 4656 case ixgbe_mac_82599EB: 4657 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4658 IXGBE_ESDP_SDP2; 4659 break; 4660 case ixgbe_mac_X550EM_x: 4661 case ixgbe_mac_X550EM_a: 4662 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4663 IXGBE_ESDP_SDP0; 4664 break; 4665 default: 4666 break; 4667 } 4668 4669 if (!cage_full) 4670 goto handle_mod_out; 4671 } 4672 4673 err = hw->phy.ops.identify_sfp(hw); 4674 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4675 device_printf(dev, 4676 "Unsupported SFP+ module type was detected.\n"); 4677 goto handle_mod_out; 4678 } 4679 4680 if (hw->mac.type == ixgbe_mac_82598EB) 4681 err = hw->phy.ops.reset(hw); 4682 else 4683 err = hw->mac.ops.setup_sfp(hw); 4684 4685 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4686 device_printf(dev, 4687 "Setup failure - unsupported SFP+ module type.\n"); 4688 goto handle_mod_out; 4689 } 4690 return (true); 4691 4692 handle_mod_out: 4693 return (false); 4694 } /* ixgbe_handle_mod */ 4695 4696 4697 /************************************************************************ 4698 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4699 ************************************************************************/ 4700 static void 4701 ixgbe_handle_msf(void *context) 4702 { 4703 if_ctx_t ctx = context; 4704 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4705 struct ixgbe_hw *hw = &sc->hw; 4706 u32 autoneg; 4707 bool negotiate; 4708 4709 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4710 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4711 4712 autoneg = hw->phy.autoneg_advertised; 4713 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4714 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4715 if (hw->mac.ops.setup_link) 4716 hw->mac.ops.setup_link(hw, autoneg, true); 4717 4718 /* Adjust media types shown in ifconfig */ 4719 ifmedia_removeall(sc->media); 4720 ixgbe_add_media_types(sc->ctx); 4721 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 4722 } /* ixgbe_handle_msf */ 4723 4724 /************************************************************************ 4725 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4726 ************************************************************************/ 4727 static void 4728 ixgbe_handle_phy(void *context) 4729 { 4730 if_ctx_t ctx = context; 4731 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4732 struct ixgbe_hw *hw = &sc->hw; 4733 int error; 4734 4735 error = hw->phy.ops.handle_lasi(hw); 4736 if (error == IXGBE_ERR_OVERTEMP) 4737 device_printf(sc->dev, 4738 "CRITICAL: EXTERNAL PHY OVER TEMP!!" 4739 " PHY will downshift to lower power state!\n"); 4740 else if (error) 4741 device_printf(sc->dev, 4742 "Error handling LASI interrupt: %d\n", error); 4743 } /* ixgbe_handle_phy */ 4744 4745 /************************************************************************ 4746 * ixgbe_enable_lse - enable link status events 4747 * 4748 * Sets mask and enables link status events 4749 ************************************************************************/ 4750 s32 ixgbe_enable_lse(struct ixgbe_softc *sc) 4751 { 4752 s32 error; 4753 4754 u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN | 4755 IXGBE_ACI_LINK_EVENT_MEDIA_NA | 4756 IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL | 4757 IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL)); 4758 4759 error = ixgbe_configure_lse(&sc->hw, TRUE, mask); 4760 if (error) 4761 return (error); 4762 4763 sc->lse_mask = mask; 4764 return (IXGBE_SUCCESS); 4765 } /* ixgbe_enable_lse */ 4766 4767 /************************************************************************ 4768 * ixgbe_disable_lse - disable link status events 4769 ************************************************************************/ 4770 s32 ixgbe_disable_lse(struct ixgbe_softc *sc) 4771 { 4772 s32 error; 4773 4774 error = ixgbe_configure_lse(&sc->hw, false, sc->lse_mask); 4775 if (error) 4776 return (error); 4777 4778 sc->lse_mask = 0; 4779 return (IXGBE_SUCCESS); 4780 } /* ixgbe_disable_lse */ 4781 4782 /************************************************************************ 4783 * ixgbe_handle_fw_event - Tasklet for MSI-X Link Status Event interrupts 4784 ************************************************************************/ 4785 static u32 4786 ixgbe_handle_fw_event(void *context) 4787 { 4788 if_ctx_t ctx = context; 4789 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4790 struct ixgbe_hw *hw = &sc->hw; 4791 struct ixgbe_aci_event event; 4792 bool pending = false; 4793 s32 error; 4794 u32 requests = 0; 4795 4796 event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE; 4797 event.msg_buf = malloc(event.buf_len, M_IXGBE, M_ZERO | M_NOWAIT); 4798 if (!event.msg_buf) { 4799 device_printf(sc->dev, "Can not allocate buffer for " 4800 "event message\n"); 4801 return (0); 4802 } 4803 4804 do { 4805 error = ixgbe_aci_get_event(hw, &event, &pending); 4806 if (error) { 4807 device_printf(sc->dev, "Error getting event from " 4808 "FW:%d\n", error); 4809 break; 4810 } 4811 4812 switch (le16toh(event.desc.opcode)) { 4813 case ixgbe_aci_opc_get_link_status: 4814 requests |= IXGBE_REQUEST_TASK_LSC; 4815 break; 4816 4817 case ixgbe_aci_opc_fw_logs_event: 4818 ixgbe_fwlog_event_dump(&sc->hw, &event.desc, event.msg_buf); 4819 break; 4820 4821 case ixgbe_aci_opc_temp_tca_event: 4822 if (!sc->overtemp_shutdown_pending) { 4823 sc->overtemp_shutdown_pending = true; 4824 requests |= IXGBE_REQUEST_TASK_RESET; 4825 device_printf(sc->dev, 4826 "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n"); 4827 device_printf(sc->dev, 4828 "System shutdown required!\n"); 4829 } 4830 break; 4831 4832 default: 4833 device_printf(sc->dev, 4834 "Unknown FW event captured, opcode=0x%04X\n", 4835 le16toh(event.desc.opcode)); 4836 break; 4837 } 4838 } while (pending); 4839 4840 free(event.msg_buf, M_IXGBE); 4841 return (requests); 4842 } /* ixgbe_handle_fw_event */ 4843 4844 /************************************************************************ 4845 * ixgbe_if_stop - Stop the hardware 4846 * 4847 * Disables all traffic on the adapter by issuing a 4848 * global reset on the MAC and deallocates TX/RX buffers. 4849 ************************************************************************/ 4850 static void 4851 ixgbe_if_stop(if_ctx_t ctx) 4852 { 4853 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4854 struct ixgbe_hw *hw = &sc->hw; 4855 4856 INIT_DEBUGOUT("ixgbe_if_stop: begin\n"); 4857 4858 ixgbe_led_restore(sc); 4859 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4860 ixgbe_disable_mdd(hw); 4861 ixgbe_quiesce_vfs(sc); 4862 } 4863 ixgbe_reset_hw(hw); 4864 atomic_store_rel_int(&sc->ecc_reset_pending, 0); 4865 hw->adapter_stopped = false; 4866 ixgbe_stop_adapter(hw); 4867 /* Turn off the laser - noop with no optics */ 4868 ixgbe_disable_tx_laser(hw); 4869 4870 /* Update the stack */ 4871 sc->link_up = false; 4872 if (sc->link_active) { 4873 if (bootverbose) 4874 device_printf(sc->dev, "Link is Down\n"); 4875 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); 4876 sc->link_active = false; 4877 } 4878 4879 /* reprogram the RAR[0] in case user changed it. */ 4880 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 4881 4882 return; 4883 } /* ixgbe_if_stop */ 4884 4885 /* 4886 * Identify the physical port while retaining the NVM-selected LED mode. 4887 * E610 exposes identification through firmware rather than LEDCTL. 4888 */ 4889 static void 4890 ixgbe_if_led_func(if_ctx_t ctx, int onoff) 4891 { 4892 struct ixgbe_softc *sc; 4893 struct ixgbe_hw *hw; 4894 4895 sc = iflib_get_softc(ctx); 4896 hw = &sc->hw; 4897 if (!onoff) { 4898 ixgbe_led_restore(sc); 4899 return; 4900 } 4901 if (sc->led_active) 4902 return; 4903 4904 if (hw->mac.type == ixgbe_mac_E610) { 4905 if (ixgbe_aci_set_port_id_led(hw, false) == IXGBE_SUCCESS) 4906 sc->led_active = true; 4907 return; 4908 } 4909 4910 sc->ledctl_default = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 4911 if (ixgbe_led_on(hw, hw->mac.led_link_act) == IXGBE_SUCCESS) 4912 sc->led_active = true; 4913 } 4914 4915 static void 4916 ixgbe_led_restore(struct ixgbe_softc *sc) 4917 { 4918 struct ixgbe_hw *hw; 4919 4920 if (!sc->led_active) 4921 return; 4922 4923 hw = &sc->hw; 4924 if (hw->mac.type == ixgbe_mac_E610) { 4925 (void)ixgbe_aci_set_port_id_led(hw, true); 4926 } else { 4927 /* Clear any PHY manual override before restoring LEDCTL. */ 4928 (void)ixgbe_led_off(hw, hw->mac.led_link_act); 4929 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, sc->ledctl_default); 4930 IXGBE_WRITE_FLUSH(hw); 4931 } 4932 sc->led_active = false; 4933 } 4934 4935 /************************************************************************ 4936 * ixgbe_link_speed_to_str - Convert link speed to string 4937 * 4938 * Helper function to convert link speed constants to human-readable 4939 * string representations in conventional Gbps or Mbps. 4940 ************************************************************************/ 4941 static const char * 4942 ixgbe_link_speed_to_str(u32 link_speed) 4943 { 4944 switch (link_speed) { 4945 case IXGBE_LINK_SPEED_10GB_FULL: 4946 return "10 Gbps"; 4947 case IXGBE_LINK_SPEED_5GB_FULL: 4948 return "5 Gbps"; 4949 case IXGBE_LINK_SPEED_2_5GB_FULL: 4950 return "2.5 Gbps"; 4951 case IXGBE_LINK_SPEED_1GB_FULL: 4952 return "1 Gbps"; 4953 case IXGBE_LINK_SPEED_100_FULL: 4954 return "100 Mbps"; 4955 case IXGBE_LINK_SPEED_10_FULL: 4956 return "10 Mbps"; 4957 default: 4958 return "Unknown"; 4959 } 4960 } /* ixgbe_link_speed_to_str */ 4961 4962 /************************************************************************ 4963 * ixgbe_update_link_status - Update OS on link state 4964 * 4965 * Process deferred administrative requests and update the OS link state. 4966 ************************************************************************/ 4967 static void 4968 ixgbe_if_update_admin_status(if_ctx_t ctx) 4969 { 4970 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4971 device_t dev = iflib_get_dev(ctx); 4972 u32 requests; 4973 u_int pass; 4974 bool check_link = false; 4975 4976 /* 4977 * The interrupt filter and other producers can run concurrently with 4978 * this task. Claim each batch atomically so a request posted while the 4979 * task is running remains pending for this or the next invocation. 4980 * 4981 * MOD and firmware events can produce dependent requests. Fold those 4982 * into the claimed batch so link state is sampled after any link setup. 4983 */ 4984 if ((if_getdrvflags(iflib_get_ifp(ctx)) & IFF_DRV_RUNNING) != 0 && 4985 (sc->iov_mbx_cleanup_pending || ixgbe_mbx_pending(sc))) 4986 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MBX); 4987 for (pass = 0; pass < IXGBE_ADMIN_TASK_BUDGET; pass++) { 4988 requests = atomic_readandclear_32(&sc->task_requests); 4989 if (requests == 0) 4990 break; 4991 if (requests & IXGBE_REQUEST_TASK_FWEVENT) 4992 requests |= ixgbe_handle_fw_event(ctx); 4993 if (requests & IXGBE_REQUEST_TASK_MOD) { 4994 if (ixgbe_handle_mod(ctx)) 4995 requests |= IXGBE_REQUEST_TASK_MSF; 4996 else 4997 requests &= ~IXGBE_REQUEST_TASK_MSF; 4998 } 4999 if (requests & IXGBE_REQUEST_TASK_MSF) 5000 ixgbe_handle_msf(ctx); 5001 /* A reset request can re-enable VF traffic; skip it while stopped. */ 5002 if ((requests & IXGBE_REQUEST_TASK_MBX) != 0 && 5003 (if_getdrvflags(iflib_get_ifp(ctx)) & IFF_DRV_RUNNING) != 0) 5004 ixgbe_handle_mbx(ctx); 5005 if (requests & IXGBE_REQUEST_TASK_FDIR) 5006 ixgbe_reinit_fdir(ctx); 5007 if (requests & IXGBE_REQUEST_TASK_PHY) 5008 ixgbe_handle_phy(ctx); 5009 if (requests & IXGBE_REQUEST_TASK_LSC) 5010 check_link = true; 5011 if (requests & IXGBE_REQUEST_TASK_RESET) { 5012 /* Re-enter the admin task so it observes IFC_DO_RESET. */ 5013 iflib_request_reset(ctx); 5014 iflib_admin_intr_deferred(ctx); 5015 } 5016 } 5017 5018 /* Do not let a continuous producer monopolize the admin taskqueue. */ 5019 if (atomic_load_acq_32(&sc->task_requests) != 0) 5020 iflib_admin_intr_deferred(ctx); 5021 5022 if (check_link) 5023 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 5024 false); 5025 5026 if (sc->link_up) { 5027 if (sc->link_active == false) { 5028 if (bootverbose) 5029 device_printf(dev, 5030 "Link is up %s Full Duplex\n", 5031 ixgbe_link_speed_to_str(sc->link_speed)); 5032 sc->link_active = true; 5033 5034 /* If link speed is <= 1Gbps and EEE is enabled, 5035 * log info. 5036 */ 5037 if (sc->hw.mac.type == ixgbe_mac_E610 && 5038 (sc->feat_en & IXGBE_FEATURE_EEE) && 5039 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 5040 device_printf(sc->dev, 5041 "Energy Efficient Ethernet (EEE) feature " 5042 "is not supported on link speeds equal to " 5043 "or below 1Gbps. EEE is supported on " 5044 "speeds above 1Gbps.\n"); 5045 } 5046 5047 /* Update any Flow Control changes */ 5048 ixgbe_fc_enable(&sc->hw); 5049 /* Update DMA coalescing config */ 5050 ixgbe_config_dmac(sc); 5051 iflib_link_state_change(ctx, LINK_STATE_UP, 5052 ixgbe_link_speed_to_baudrate(sc->link_speed)); 5053 5054 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5055 ixgbe_ping_all_vfs(sc); 5056 } 5057 } else { /* Link down */ 5058 if (sc->link_active == true) { 5059 if (bootverbose) 5060 device_printf(dev, "Link is Down\n"); 5061 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); 5062 sc->link_active = false; 5063 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5064 ixgbe_ping_all_vfs(sc); 5065 } 5066 } 5067 5068 ixgbe_schedule_iov_recovery(sc); 5069 5070 ixgbe_update_stats_counters(sc); 5071 } /* ixgbe_if_update_admin_status */ 5072 5073 /************************************************************************ 5074 * ixgbe_config_dmac - Configure DMA Coalescing 5075 ************************************************************************/ 5076 static void 5077 ixgbe_config_dmac(struct ixgbe_softc *sc) 5078 { 5079 struct ixgbe_hw *hw = &sc->hw; 5080 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5081 5082 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5083 return; 5084 5085 if (dcfg->watchdog_timer ^ sc->dmac || 5086 dcfg->link_speed ^ sc->link_speed) { 5087 dcfg->watchdog_timer = sc->dmac; 5088 dcfg->fcoe_en = false; 5089 dcfg->link_speed = sc->link_speed; 5090 dcfg->num_tcs = 1; 5091 5092 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5093 dcfg->watchdog_timer, dcfg->link_speed); 5094 5095 hw->mac.ops.dmac_config(hw); 5096 } 5097 } /* ixgbe_config_dmac */ 5098 5099 /************************************************************************ 5100 * ixgbe_if_enable_intr 5101 ************************************************************************/ 5102 void 5103 ixgbe_if_enable_intr(if_ctx_t ctx) 5104 { 5105 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5106 struct ixgbe_hw *hw = &sc->hw; 5107 struct ix_rx_queue *que = sc->rx_queues; 5108 u32 mask, fwsm; 5109 5110 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5111 5112 switch (sc->hw.mac.type) { 5113 case ixgbe_mac_82599EB: 5114 mask |= IXGBE_EIMS_ECC; 5115 /* Temperature sensor on some scs */ 5116 mask |= IXGBE_EIMS_GPI_SDP0; 5117 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5118 mask |= IXGBE_EIMS_GPI_SDP1; 5119 mask |= IXGBE_EIMS_GPI_SDP2; 5120 break; 5121 case ixgbe_mac_X540: 5122 /* Detect if Thermal Sensor is enabled */ 5123 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5124 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5125 mask |= IXGBE_EIMS_TS; 5126 mask |= IXGBE_EIMS_ECC; 5127 break; 5128 case ixgbe_mac_X550: 5129 /* MAC thermal sensor is automatically enabled */ 5130 mask |= IXGBE_EIMS_TS; 5131 mask |= IXGBE_EIMS_ECC; 5132 break; 5133 case ixgbe_mac_X550EM_x: 5134 case ixgbe_mac_X550EM_a: 5135 /* Some devices use SDP0 for important information */ 5136 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5137 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5138 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5139 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5140 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5141 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5142 mask |= IXGBE_EICR_GPI_SDP0_X540; 5143 mask |= IXGBE_EIMS_ECC; 5144 break; 5145 case ixgbe_mac_E610: 5146 mask |= IXGBE_EIMS_FW_EVENT; 5147 break; 5148 default: 5149 break; 5150 } 5151 5152 /* Enable Fan Failure detection */ 5153 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5154 mask |= IXGBE_EIMS_GPI_SDP1; 5155 /* Enable SR-IOV */ 5156 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5157 mask |= IXGBE_EIMS_MAILBOX; 5158 /* Enable Flow Director */ 5159 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5160 mask |= IXGBE_EIMS_FLOW_DIR; 5161 if (atomic_load_acq_int(&sc->ecc_reset_pending)) 5162 mask &= ~IXGBE_EIMS_ECC; 5163 5164 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5165 5166 /* With MSI-X we use auto clear */ 5167 if (sc->intr_type == IFLIB_INTR_MSIX) { 5168 mask = IXGBE_EIMS_ENABLE_MASK; 5169 /* Don't autoclear Link */ 5170 mask &= ~IXGBE_EIMS_OTHER; 5171 mask &= ~IXGBE_EIMS_LSC; 5172 mask &= ~IXGBE_EIMS_FW_EVENT; 5173 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 5174 mask &= ~IXGBE_EIMS_MAILBOX; 5175 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 5176 } 5177 5178 /* 5179 * Now enable all queues, this is done separately to 5180 * allow for handling the extended (beyond 32) MSI-X 5181 * vectors that can be used by 82599 5182 */ 5183 for (int i = 0; i < sc->num_rx_queues; i++, que++) 5184 ixgbe_enable_queue(sc, que->msix); 5185 5186 IXGBE_WRITE_FLUSH(hw); 5187 5188 } /* ixgbe_if_enable_intr */ 5189 5190 /************************************************************************ 5191 * ixgbe_if_disable_intr 5192 ************************************************************************/ 5193 static void 5194 ixgbe_if_disable_intr(if_ctx_t ctx) 5195 { 5196 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5197 5198 if (sc->intr_type == IFLIB_INTR_MSIX) 5199 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5200 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 5201 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~0); 5202 } else { 5203 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, 0xFFFF0000); 5204 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(0), ~0); 5205 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(1), ~0); 5206 } 5207 IXGBE_WRITE_FLUSH(&sc->hw); 5208 5209 } /* ixgbe_if_disable_intr */ 5210 5211 /************************************************************************ 5212 * ixgbe_link_intr_enable 5213 ************************************************************************/ 5214 static void 5215 ixgbe_link_intr_enable(if_ctx_t ctx) 5216 { 5217 struct ixgbe_hw *hw = 5218 &((struct ixgbe_softc *)iflib_get_softc(ctx))->hw; 5219 5220 /* Re-enable other interrupts */ 5221 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC); 5222 } /* ixgbe_link_intr_enable */ 5223 5224 /************************************************************************ 5225 * ixgbe_if_rx_queue_intr_enable 5226 ************************************************************************/ 5227 static int 5228 ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) 5229 { 5230 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5231 struct ix_rx_queue *que = &sc->rx_queues[rxqid]; 5232 5233 ixgbe_enable_queue(sc, que->msix); 5234 5235 return (0); 5236 } /* ixgbe_if_rx_queue_intr_enable */ 5237 5238 /************************************************************************ 5239 * ixgbe_enable_queue 5240 ************************************************************************/ 5241 static void 5242 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 5243 { 5244 struct ixgbe_hw *hw = &sc->hw; 5245 u64 queue = 1ULL << vector; 5246 u32 mask; 5247 5248 if (hw->mac.type == ixgbe_mac_82598EB) { 5249 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 5250 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5251 } else { 5252 mask = (queue & 0xFFFFFFFF); 5253 if (mask) 5254 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 5255 mask = (queue >> 32); 5256 if (mask) 5257 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 5258 } 5259 } /* ixgbe_enable_queue */ 5260 5261 /************************************************************************ 5262 * ixgbe_disable_queue 5263 ************************************************************************/ 5264 static void 5265 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 5266 { 5267 struct ixgbe_hw *hw = &sc->hw; 5268 u64 queue = 1ULL << vector; 5269 u32 mask; 5270 5271 if (hw->mac.type == ixgbe_mac_82598EB) { 5272 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 5273 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 5274 } else { 5275 mask = (queue & 0xFFFFFFFF); 5276 if (mask) 5277 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 5278 mask = (queue >> 32); 5279 if (mask) 5280 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 5281 } 5282 } /* ixgbe_disable_queue */ 5283 5284 /************************************************************************ 5285 * ixgbe_intr - Legacy Interrupt Service Routine 5286 ************************************************************************/ 5287 int 5288 ixgbe_intr(void *arg) 5289 { 5290 struct ixgbe_softc *sc = arg; 5291 struct ix_rx_queue *que = sc->rx_queues; 5292 struct ixgbe_hw *hw = &sc->hw; 5293 if_ctx_t ctx = sc->ctx; 5294 u32 eicr, eicr_mask, requests; 5295 5296 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5297 requests = 0; 5298 5299 ++que->irqs; 5300 if (eicr == 0) { 5301 ixgbe_if_enable_intr(ctx); 5302 return (FILTER_HANDLED); 5303 } 5304 5305 /* Check for fan failure */ 5306 if ((sc->feat_en & IXGBE_FEATURE_FAN_FAIL) && 5307 (eicr & IXGBE_EICR_GPI_SDP1)) { 5308 device_printf(sc->dev, 5309 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 5310 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5311 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 5312 } 5313 5314 /* Link status change */ 5315 if (eicr & IXGBE_EICR_LSC) { 5316 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 5317 requests |= IXGBE_REQUEST_TASK_LSC; 5318 } 5319 5320 if (ixgbe_is_sfp(hw)) { 5321 /* Pluggable optics-related interrupt */ 5322 if (hw->mac.type >= ixgbe_mac_X540) 5323 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 5324 else 5325 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 5326 5327 if (eicr & eicr_mask) { 5328 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 5329 requests |= IXGBE_REQUEST_TASK_MOD; 5330 } 5331 5332 if ((hw->mac.type == ixgbe_mac_82599EB) && 5333 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 5334 IXGBE_WRITE_REG(hw, IXGBE_EICR, 5335 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 5336 requests |= IXGBE_REQUEST_TASK_MSF; 5337 } 5338 } 5339 5340 /* External PHY interrupt */ 5341 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 5342 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 5343 requests |= IXGBE_REQUEST_TASK_PHY; 5344 } 5345 if (hw->mac.type != ixgbe_mac_82598EB && 5346 ixgbe_handle_ecc(sc, eicr)) 5347 requests |= IXGBE_REQUEST_TASK_RESET; 5348 if (requests != 0) { 5349 atomic_set_32(&sc->task_requests, requests); 5350 iflib_admin_intr_deferred(ctx); 5351 } 5352 5353 return (FILTER_SCHEDULE_THREAD); 5354 } /* ixgbe_intr */ 5355 5356 /************************************************************************ 5357 * ixgbe_free_pci_resources 5358 ************************************************************************/ 5359 static void 5360 ixgbe_free_pci_resources(if_ctx_t ctx) 5361 { 5362 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5363 struct ix_rx_queue *que = sc->rx_queues; 5364 device_t dev = iflib_get_dev(ctx); 5365 5366 /* Release all MSI-X queue resources */ 5367 if (sc->intr_type == IFLIB_INTR_MSIX) 5368 iflib_irq_free(ctx, &sc->irq); 5369 5370 if (que != NULL) { 5371 for (int i = 0; i < sc->num_rx_queues; i++, que++) { 5372 iflib_irq_free(ctx, &que->que_irq); 5373 } 5374 } 5375 5376 if (sc->pci_mem != NULL) 5377 bus_release_resource(dev, SYS_RES_MEMORY, 5378 rman_get_rid(sc->pci_mem), sc->pci_mem); 5379 } /* ixgbe_free_pci_resources */ 5380 5381 /************************************************************************ 5382 * ixgbe_sysctl_flowcntl 5383 * 5384 * SYSCTL wrapper around setting Flow Control 5385 ************************************************************************/ 5386 static int 5387 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS) 5388 { 5389 struct ixgbe_softc *sc; 5390 struct sx *ctx_lock; 5391 int error, fc; 5392 5393 sc = (struct ixgbe_softc *)arg1; 5394 fc = sc->hw.fc.requested_mode; 5395 5396 error = sysctl_handle_int(oidp, &fc, 0, req); 5397 if ((error) || (req->newptr == NULL)) 5398 return (error); 5399 5400 /* Serialize the live register update with the administrative task. */ 5401 ctx_lock = iflib_ctx_lock_get(sc->ctx); 5402 sx_xlock(ctx_lock); 5403 if (fc == sc->hw.fc.requested_mode) 5404 error = 0; 5405 else 5406 error = ixgbe_set_flowcntl(sc, fc); 5407 sx_xunlock(ctx_lock); 5408 return (error); 5409 } /* ixgbe_sysctl_flowcntl */ 5410 5411 /************************************************************************ 5412 * ixgbe_set_flowcntl - Set flow control 5413 * 5414 * Flow control values: 5415 * 0 - off 5416 * 1 - rx pause 5417 * 2 - tx pause 5418 * 3 - full 5419 ************************************************************************/ 5420 static int 5421 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5422 { 5423 bool enable_drop, mdd_active; 5424 5425 switch (fc) { 5426 case ixgbe_fc_rx_pause: 5427 case ixgbe_fc_tx_pause: 5428 case ixgbe_fc_full: 5429 enable_drop = false; 5430 break; 5431 case ixgbe_fc_none: 5432 enable_drop = true; 5433 break; 5434 default: 5435 return (EINVAL); 5436 } 5437 5438 /* Updating SRRCTL on a live queue is itself an MDD violation. */ 5439 mdd_active = sc->num_rx_queues > 1 && 5440 (sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 && 5441 (if_getdrvflags(iflib_get_ifp(sc->ctx)) & IFF_DRV_RUNNING) != 0; 5442 if (mdd_active) 5443 ixgbe_disable_mdd(&sc->hw); 5444 if (sc->num_rx_queues > 1) { 5445 if (enable_drop) 5446 ixgbe_enable_rx_drop(sc); 5447 else 5448 ixgbe_disable_rx_drop(sc); 5449 } 5450 if (mdd_active) { 5451 ixgbe_enable_mdd(&sc->hw); 5452 /* Service an event whose interrupt edge was lost while masked. */ 5453 if (ixgbe_mbx_pending(sc)) { 5454 atomic_set_32(&sc->task_requests, 5455 IXGBE_REQUEST_TASK_MBX); 5456 iflib_admin_intr_deferred(sc->ctx); 5457 } 5458 } 5459 5460 sc->hw.fc.requested_mode = fc; 5461 5462 /* Don't autoneg if forcing a value */ 5463 sc->hw.fc.disable_fc_autoneg = true; 5464 ixgbe_fc_enable(&sc->hw); 5465 5466 return (0); 5467 } /* ixgbe_set_flowcntl */ 5468 5469 /************************************************************************ 5470 * ixgbe_enable_rx_drop 5471 * 5472 * Enable the hardware to drop packets when the buffer is 5473 * full. This is useful with multiqueue, so that no single 5474 * queue being full stalls the entire RX engine. We only 5475 * enable this when Multiqueue is enabled AND Flow Control 5476 * is disabled. 5477 ************************************************************************/ 5478 static void 5479 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5480 { 5481 struct ixgbe_hw *hw = &sc->hw; 5482 struct rx_ring *rxr; 5483 u32 srrctl; 5484 5485 for (int i = 0; i < sc->num_rx_queues; i++) { 5486 rxr = &sc->rx_queues[i].rxr; 5487 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5488 srrctl |= IXGBE_SRRCTL_DROP_EN; 5489 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5490 } 5491 5492 } /* ixgbe_enable_rx_drop */ 5493 5494 /************************************************************************ 5495 * ixgbe_disable_rx_drop 5496 ************************************************************************/ 5497 static void 5498 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5499 { 5500 struct ixgbe_hw *hw = &sc->hw; 5501 struct rx_ring *rxr; 5502 u32 srrctl; 5503 5504 for (int i = 0; i < sc->num_rx_queues; i++) { 5505 rxr = &sc->rx_queues[i].rxr; 5506 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5507 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5508 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5509 } 5510 5511 } /* ixgbe_disable_rx_drop */ 5512 5513 /************************************************************************ 5514 * ixgbe_sysctl_advertise 5515 * 5516 * SYSCTL wrapper around setting advertised speed 5517 ************************************************************************/ 5518 static int 5519 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS) 5520 { 5521 struct ixgbe_softc *sc; 5522 int error, advertise; 5523 5524 sc = (struct ixgbe_softc *)arg1; 5525 if (atomic_load_acq_int(&sc->recovery_mode)) 5526 return (EPERM); 5527 5528 advertise = sc->advertise; 5529 5530 error = sysctl_handle_int(oidp, &advertise, 0, req); 5531 if ((error) || (req->newptr == NULL)) 5532 return (error); 5533 5534 return ixgbe_set_advertise(sc, advertise); 5535 } /* ixgbe_sysctl_advertise */ 5536 5537 /************************************************************************ 5538 * ixgbe_set_advertise - Control advertised link speed 5539 * 5540 * Flags: 5541 * 0x1 - advertise 100 Mb 5542 * 0x2 - advertise 1G 5543 * 0x4 - advertise 10G 5544 * 0x8 - advertise 10 Mb (yes, Mb) 5545 * 0x10 - advertise 2.5G (disabled by default) 5546 * 0x20 - advertise 5G (disabled by default) 5547 * 5548 ************************************************************************/ 5549 static int 5550 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5551 { 5552 device_t dev = iflib_get_dev(sc->ctx); 5553 struct ixgbe_hw *hw; 5554 ixgbe_link_speed speed = 0; 5555 ixgbe_link_speed link_caps = 0; 5556 s32 err = IXGBE_NOT_IMPLEMENTED; 5557 bool negotiate = false; 5558 5559 /* Checks to validate new value */ 5560 if (sc->advertise == advertise) /* no change */ 5561 return (0); 5562 5563 hw = &sc->hw; 5564 5565 /* No speed changes for backplane media */ 5566 if (hw->phy.media_type == ixgbe_media_type_backplane) 5567 return (ENODEV); 5568 5569 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5570 (hw->phy.multispeed_fiber))) { 5571 device_printf(dev, 5572 "Advertised speed can only be set on copper or multispeed" 5573 " fiber media types.\n"); 5574 return (EINVAL); 5575 } 5576 5577 if (advertise < 0x1 || advertise > 0x3F) { 5578 device_printf(dev, 5579 "Invalid advertised speed; valid modes are 0x1 through" 5580 " 0x3F\n"); 5581 return (EINVAL); 5582 } 5583 5584 if (hw->mac.ops.get_link_capabilities) { 5585 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5586 &negotiate); 5587 if (err != IXGBE_SUCCESS) { 5588 device_printf(dev, 5589 "Unable to determine supported advertise speeds" 5590 "\n"); 5591 return (ENODEV); 5592 } 5593 } 5594 5595 /* Set new value and report new advertised mode */ 5596 if (advertise & 0x1) { 5597 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5598 device_printf(dev, 5599 "Interface does not support 100Mb advertised" 5600 " speed\n"); 5601 return (EINVAL); 5602 } 5603 speed |= IXGBE_LINK_SPEED_100_FULL; 5604 } 5605 if (advertise & 0x2) { 5606 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5607 device_printf(dev, 5608 "Interface does not support 1Gb advertised speed" 5609 "\n"); 5610 return (EINVAL); 5611 } 5612 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5613 } 5614 if (advertise & 0x4) { 5615 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5616 device_printf(dev, 5617 "Interface does not support 10Gb advertised speed" 5618 "\n"); 5619 return (EINVAL); 5620 } 5621 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5622 } 5623 if (advertise & 0x8) { 5624 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5625 device_printf(dev, 5626 "Interface does not support 10Mb advertised speed" 5627 "\n"); 5628 return (EINVAL); 5629 } 5630 speed |= IXGBE_LINK_SPEED_10_FULL; 5631 } 5632 if (advertise & 0x10) { 5633 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5634 device_printf(dev, 5635 "Interface does not support 2.5G advertised speed" 5636 "\n"); 5637 return (EINVAL); 5638 } 5639 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5640 } 5641 if (advertise & 0x20) { 5642 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5643 device_printf(dev, 5644 "Interface does not support 5G advertised speed" 5645 "\n"); 5646 return (EINVAL); 5647 } 5648 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5649 } 5650 5651 hw->mac.autotry_restart = true; 5652 hw->mac.ops.setup_link(hw, speed, true); 5653 sc->advertise = advertise; 5654 5655 return (0); 5656 } /* ixgbe_set_advertise */ 5657 5658 /************************************************************************ 5659 * ixgbe_get_default_advertise - Get default advertised speed settings 5660 * 5661 * Formatted for sysctl usage. 5662 * Flags: 5663 * 0x1 - advertise 100 Mb 5664 * 0x2 - advertise 1G 5665 * 0x4 - advertise 10G 5666 * 0x8 - advertise 10 Mb (yes, Mb) 5667 * 0x10 - advertise 2.5G (disabled by default) 5668 * 0x20 - advertise 5G (disabled by default) 5669 ************************************************************************/ 5670 static int 5671 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5672 { 5673 struct ixgbe_hw *hw = &sc->hw; 5674 int speed; 5675 ixgbe_link_speed link_caps = 0; 5676 s32 err; 5677 bool negotiate = false; 5678 5679 /* 5680 * Advertised speed means nothing unless it's copper or 5681 * multi-speed fiber 5682 */ 5683 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5684 !(hw->phy.multispeed_fiber)) 5685 return (0); 5686 5687 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5688 if (err != IXGBE_SUCCESS) 5689 return (0); 5690 5691 if (hw->mac.type == ixgbe_mac_X550) { 5692 /* 5693 * 2.5G and 5G autonegotiation speeds on X550 5694 * are disabled by default due to reported 5695 * interoperability issues with some switches. 5696 */ 5697 link_caps &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 5698 IXGBE_LINK_SPEED_5GB_FULL); 5699 } 5700 5701 speed = 5702 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5703 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5704 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5705 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5706 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5707 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5708 5709 return speed; 5710 } /* ixgbe_get_default_advertise */ 5711 5712 /************************************************************************ 5713 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5714 * 5715 * Control values: 5716 * 0/1 - off / on (use default value of 1000) 5717 * 5718 * Legal timer values are: 5719 * 50,100,250,500,1000,2000,5000,10000 5720 * 5721 * Turning off interrupt moderation will also turn this off. 5722 ************************************************************************/ 5723 static int 5724 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 5725 { 5726 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5727 if_t ifp = iflib_get_ifp(sc->ctx); 5728 int error; 5729 u16 newval; 5730 5731 newval = sc->dmac; 5732 error = sysctl_handle_16(oidp, &newval, 0, req); 5733 if ((error) || (req->newptr == NULL)) 5734 return (error); 5735 5736 switch (newval) { 5737 case 0: 5738 /* Disabled */ 5739 sc->dmac = 0; 5740 break; 5741 case 1: 5742 /* Enable and use default */ 5743 sc->dmac = 1000; 5744 break; 5745 case 50: 5746 case 100: 5747 case 250: 5748 case 500: 5749 case 1000: 5750 case 2000: 5751 case 5000: 5752 case 10000: 5753 /* Legal values - allow */ 5754 sc->dmac = newval; 5755 break; 5756 default: 5757 /* Do nothing, illegal value */ 5758 return (EINVAL); 5759 } 5760 5761 /* Re-initialize hardware if it's already running */ 5762 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 5763 if_init(ifp, ifp); 5764 5765 return (0); 5766 } /* ixgbe_sysctl_dmac */ 5767 5768 #ifdef IXGBE_DEBUG 5769 /************************************************************************ 5770 * ixgbe_sysctl_power_state 5771 * 5772 * Sysctl to test power states 5773 * Values: 5774 * 0 - set device to D0 5775 * 3 - set device to D3 5776 * (none) - get current device power state 5777 ************************************************************************/ 5778 static int 5779 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 5780 { 5781 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5782 device_t dev = sc->dev; 5783 int curr_ps, new_ps, error = 0; 5784 5785 curr_ps = new_ps = pci_get_powerstate(dev); 5786 5787 error = sysctl_handle_int(oidp, &new_ps, 0, req); 5788 if ((error) || (req->newptr == NULL)) 5789 return (error); 5790 5791 if (new_ps == curr_ps) 5792 return (0); 5793 5794 if (new_ps == 3 && curr_ps == 0) 5795 error = DEVICE_SUSPEND(dev); 5796 else if (new_ps == 0 && curr_ps == 3) 5797 error = DEVICE_RESUME(dev); 5798 else 5799 return (EINVAL); 5800 5801 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5802 5803 return (error); 5804 } /* ixgbe_sysctl_power_state */ 5805 #endif 5806 5807 /************************************************************************ 5808 * ixgbe_sysctl_wol_enable 5809 * 5810 * Sysctl to enable/disable the WoL capability, 5811 * if supported by the adapter. 5812 * 5813 * Values: 5814 * 0 - disabled 5815 * 1 - enabled 5816 ************************************************************************/ 5817 static int 5818 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 5819 { 5820 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5821 struct ixgbe_hw *hw = &sc->hw; 5822 int new_wol_enabled; 5823 int error = 0; 5824 5825 new_wol_enabled = hw->wol_enabled; 5826 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 5827 if ((error) || (req->newptr == NULL)) 5828 return (error); 5829 new_wol_enabled = !!(new_wol_enabled); 5830 if (new_wol_enabled == hw->wol_enabled) 5831 return (0); 5832 5833 if (new_wol_enabled > 0 && !sc->wol_support) 5834 return (ENODEV); 5835 else 5836 hw->wol_enabled = new_wol_enabled; 5837 5838 return (0); 5839 } /* ixgbe_sysctl_wol_enable */ 5840 5841 /************************************************************************ 5842 * ixgbe_sysctl_wufc - Wake Up Filter Control 5843 * 5844 * Sysctl to enable/disable the types of packets that the 5845 * adapter will wake up on upon receipt. 5846 * Flags: 5847 * 0x1 - Link Status Change 5848 * 0x2 - Magic Packet 5849 * 0x4 - Direct Exact 5850 * 0x8 - Directed Multicast 5851 * 0x10 - Broadcast 5852 * 0x20 - ARP/IPv4 Request Packet 5853 * 0x40 - Direct IPv4 Packet 5854 * 0x80 - Direct IPv6 Packet 5855 * 5856 * Settings not listed above will cause the sysctl to return an error. 5857 ************************************************************************/ 5858 static int 5859 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 5860 { 5861 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5862 int error = 0; 5863 u32 new_wufc; 5864 5865 new_wufc = sc->wufc; 5866 5867 error = sysctl_handle_32(oidp, &new_wufc, 0, req); 5868 if ((error) || (req->newptr == NULL)) 5869 return (error); 5870 if (new_wufc == sc->wufc) 5871 return (0); 5872 5873 if (new_wufc & 0xffffff00) 5874 return (EINVAL); 5875 5876 new_wufc &= 0xff; 5877 new_wufc |= (0xffffff & sc->wufc); 5878 sc->wufc = new_wufc; 5879 5880 return (0); 5881 } /* ixgbe_sysctl_wufc */ 5882 5883 #ifdef IXGBE_DEBUG 5884 /************************************************************************ 5885 * ixgbe_sysctl_print_rss_config 5886 ************************************************************************/ 5887 static int 5888 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 5889 { 5890 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5891 struct ixgbe_hw *hw = &sc->hw; 5892 device_t dev = sc->dev; 5893 struct sbuf *buf; 5894 int error = 0, reta_size; 5895 u32 reg; 5896 5897 if (atomic_load_acq_int(&sc->recovery_mode)) 5898 return (EPERM); 5899 5900 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5901 if (!buf) { 5902 device_printf(dev, "Could not allocate sbuf for output.\n"); 5903 return (ENOMEM); 5904 } 5905 5906 // TODO: use sbufs to make a string to print out 5907 /* Set multiplier for RETA setup and table size based on MAC */ 5908 switch (sc->hw.mac.type) { 5909 case ixgbe_mac_X550: 5910 case ixgbe_mac_X550EM_x: 5911 case ixgbe_mac_X550EM_a: 5912 reta_size = 128; 5913 break; 5914 default: 5915 reta_size = 32; 5916 break; 5917 } 5918 5919 /* Print out the redirection table */ 5920 sbuf_cat(buf, "\n"); 5921 for (int i = 0; i < reta_size; i++) { 5922 if (i < 32) { 5923 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5924 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5925 } else { 5926 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5927 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5928 } 5929 } 5930 5931 // TODO: print more config 5932 5933 error = sbuf_finish(buf); 5934 if (error) 5935 device_printf(dev, "Error finishing sbuf: %d\n", error); 5936 5937 sbuf_delete(buf); 5938 5939 return (0); 5940 } /* ixgbe_sysctl_print_rss_config */ 5941 #endif /* IXGBE_DEBUG */ 5942 5943 /************************************************************************ 5944 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5945 * 5946 * For X552/X557-AT devices using an external PHY 5947 ************************************************************************/ 5948 static int 5949 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 5950 { 5951 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5952 struct ixgbe_hw *hw = &sc->hw; 5953 u16 reg; 5954 5955 if (atomic_load_acq_int(&sc->recovery_mode)) 5956 return (EPERM); 5957 5958 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 5959 device_printf(iflib_get_dev(sc->ctx), 5960 "Device has no supported external thermal sensor.\n"); 5961 return (ENODEV); 5962 } 5963 5964 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 5965 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 5966 device_printf(iflib_get_dev(sc->ctx), 5967 "Error reading from PHY's current temperature register" 5968 "\n"); 5969 return (EAGAIN); 5970 } 5971 5972 /* Shift temp for output */ 5973 reg = reg >> 8; 5974 5975 return (sysctl_handle_16(oidp, NULL, reg, req)); 5976 } /* ixgbe_sysctl_phy_temp */ 5977 5978 /************************************************************************ 5979 * ixgbe_sysctl_phy_overtemp_occurred 5980 * 5981 * Reports (directly from the PHY) whether the current PHY 5982 * temperature is over the overtemp threshold. 5983 ************************************************************************/ 5984 static int 5985 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 5986 { 5987 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5988 struct ixgbe_hw *hw = &sc->hw; 5989 u16 reg; 5990 5991 if (atomic_load_acq_int(&sc->recovery_mode)) 5992 return (EPERM); 5993 5994 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 5995 device_printf(iflib_get_dev(sc->ctx), 5996 "Device has no supported external thermal sensor.\n"); 5997 return (ENODEV); 5998 } 5999 6000 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6001 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6002 device_printf(iflib_get_dev(sc->ctx), 6003 "Error reading from PHY's temperature status register\n"); 6004 return (EAGAIN); 6005 } 6006 6007 /* Get occurrence bit */ 6008 reg = !!(reg & 0x4000); 6009 6010 return (sysctl_handle_16(oidp, 0, reg, req)); 6011 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6012 6013 /************************************************************************ 6014 * ixgbe_sysctl_eee_state 6015 * 6016 * Sysctl to set EEE power saving feature 6017 * Values: 6018 * 0 - disable EEE 6019 * 1 - enable EEE 6020 * (none) - get current device EEE state 6021 ************************************************************************/ 6022 static int 6023 ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS) 6024 { 6025 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6026 device_t dev = sc->dev; 6027 if_t ifp = iflib_get_ifp(sc->ctx); 6028 int curr_eee, new_eee, error = 0; 6029 s32 retval; 6030 6031 if (atomic_load_acq_int(&sc->recovery_mode)) 6032 return (EPERM); 6033 6034 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6035 6036 error = sysctl_handle_int(oidp, &new_eee, 0, req); 6037 if ((error) || (req->newptr == NULL)) 6038 return (error); 6039 6040 /* Nothing to do */ 6041 if (new_eee == curr_eee) 6042 return (0); 6043 6044 /* Not supported */ 6045 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6046 return (EINVAL); 6047 6048 /* Bounds checking */ 6049 if ((new_eee < 0) || (new_eee > 1)) 6050 return (EINVAL); 6051 6052 /* If link speed is <= 1Gbps and EEE is being enabled, log info */ 6053 if (sc->hw.mac.type == ixgbe_mac_E610 && 6054 new_eee && 6055 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 6056 device_printf(dev, 6057 "Energy Efficient Ethernet (EEE) feature is not " 6058 "supported on link speeds equal to or below 1Gbps. " 6059 "EEE is supported on speeds above 1Gbps.\n"); 6060 return (EINVAL); 6061 } 6062 6063 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6064 if (retval) { 6065 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6066 return (EINVAL); 6067 } 6068 6069 /* Restart auto-neg */ 6070 if_init(ifp, ifp); 6071 6072 device_printf(dev, "New EEE state: %d\n", new_eee); 6073 6074 /* Cache new value */ 6075 if (new_eee) 6076 sc->feat_en |= IXGBE_FEATURE_EEE; 6077 else 6078 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6079 6080 return (error); 6081 } /* ixgbe_sysctl_eee_state */ 6082 6083 static int 6084 ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS) 6085 { 6086 struct ixgbe_softc *sc; 6087 u32 reg, val, shift; 6088 int error, mask; 6089 6090 sc = oidp->oid_arg1; 6091 switch (oidp->oid_arg2) { 6092 case 0: 6093 reg = IXGBE_DTXTCPFLGL; 6094 shift = 0; 6095 break; 6096 case 1: 6097 reg = IXGBE_DTXTCPFLGL; 6098 shift = 16; 6099 break; 6100 case 2: 6101 reg = IXGBE_DTXTCPFLGH; 6102 shift = 0; 6103 break; 6104 default: 6105 return (EINVAL); 6106 break; 6107 } 6108 val = IXGBE_READ_REG(&sc->hw, reg); 6109 mask = (val >> shift) & 0xfff; 6110 error = sysctl_handle_int(oidp, &mask, 0, req); 6111 if (error != 0 || req->newptr == NULL) 6112 return (error); 6113 if (mask < 0 || mask > 0xfff) 6114 return (EINVAL); 6115 val = (val & ~(0xfff << shift)) | (mask << shift); 6116 IXGBE_WRITE_REG(&sc->hw, reg, val); 6117 return (0); 6118 } 6119 6120 /************************************************************************ 6121 * ixgbe_init_device_features 6122 ************************************************************************/ 6123 static void 6124 ixgbe_init_device_features(struct ixgbe_softc *sc) 6125 { 6126 s32 error; 6127 6128 sc->feat_cap = IXGBE_FEATURE_NETMAP | 6129 IXGBE_FEATURE_RSS | 6130 IXGBE_FEATURE_MSI | 6131 IXGBE_FEATURE_MSIX | 6132 IXGBE_FEATURE_LEGACY_IRQ; 6133 6134 /* Set capabilities first... */ 6135 switch (sc->hw.mac.type) { 6136 case ixgbe_mac_82598EB: 6137 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6138 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6139 break; 6140 case ixgbe_mac_X540: 6141 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6142 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6143 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6144 (sc->hw.bus.func == 0)) 6145 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6146 break; 6147 case ixgbe_mac_X550: 6148 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6149 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6150 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6151 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6152 break; 6153 case ixgbe_mac_X550EM_x: 6154 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6155 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6156 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6157 if (sc->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR) 6158 sc->feat_cap |= IXGBE_FEATURE_EEE; 6159 break; 6160 case ixgbe_mac_X550EM_a: 6161 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6162 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6163 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6164 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6165 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6166 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6167 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6168 sc->feat_cap |= IXGBE_FEATURE_EEE; 6169 } 6170 break; 6171 case ixgbe_mac_82599EB: 6172 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6173 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6174 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6175 (sc->hw.bus.func == 0)) 6176 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6177 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6178 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6179 break; 6180 case ixgbe_mac_E610: 6181 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 6182 sc->feat_cap |= IXGBE_FEATURE_DBG_DUMP; 6183 sc->feat_cap |= IXGBE_FEATURE_FW_LOGGING; 6184 error = ixgbe_get_caps(&sc->hw); 6185 if (error == 0 && sc->hw.func_caps.common_cap.eee_support != 0) 6186 sc->feat_cap |= IXGBE_FEATURE_EEE; 6187 break; 6188 default: 6189 break; 6190 } 6191 6192 /* Enabled by default... */ 6193 /* Fan failure detection */ 6194 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6195 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6196 /* Netmap */ 6197 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6198 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6199 /* EEE */ 6200 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6201 sc->feat_en |= IXGBE_FEATURE_EEE; 6202 /* Thermal Sensor */ 6203 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6204 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6205 /* Recovery mode */ 6206 if (sc->feat_cap & IXGBE_FEATURE_RECOVERY_MODE) 6207 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 6208 /* FW Debug Dump */ 6209 if (sc->feat_cap & IXGBE_FEATURE_DBG_DUMP) 6210 sc->feat_en |= IXGBE_FEATURE_DBG_DUMP; 6211 /* FW Logging */ 6212 if (sc->feat_cap & IXGBE_FEATURE_FW_LOGGING) 6213 sc->feat_en |= IXGBE_FEATURE_FW_LOGGING; 6214 6215 /* Enabled via global sysctl... */ 6216 /* Flow Director */ 6217 if (ixgbe_enable_fdir) { 6218 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6219 sc->feat_en |= IXGBE_FEATURE_FDIR; 6220 else 6221 device_printf(sc->dev, 6222 "Device does not support Flow Director." 6223 " Leaving disabled."); 6224 } 6225 /* 6226 * Message Signal Interrupts - Extended (MSI-X) 6227 * Normal MSI is only enabled if MSI-X calls fail. 6228 */ 6229 if (!ixgbe_enable_msix) 6230 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6231 /* Receive-Side Scaling (RSS) */ 6232 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6233 sc->feat_en |= IXGBE_FEATURE_RSS; 6234 6235 /* Disable features with unmet dependencies... */ 6236 /* No MSI-X */ 6237 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6238 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6239 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6240 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6241 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6242 } 6243 } /* ixgbe_init_device_features */ 6244 6245 /************************************************************************ 6246 * ixgbe_check_fan_failure 6247 ************************************************************************/ 6248 static void 6249 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6250 { 6251 u32 mask; 6252 6253 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6254 IXGBE_ESDP_SDP1; 6255 6256 if (reg & mask) 6257 device_printf(sc->dev, 6258 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6259 } /* ixgbe_check_fan_failure */ 6260 6261 /************************************************************************ 6262 * ixgbe_sbuf_fw_version 6263 ************************************************************************/ 6264 static void 6265 ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf) 6266 { 6267 struct ixgbe_nvm_version nvm_ver = {0}; 6268 const char *space = ""; 6269 6270 ixgbe_get_nvm_version(hw, &nvm_ver); /* NVM version */ 6271 ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */ 6272 ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack a build ID in Intel's SCM */ 6273 ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */ 6274 6275 /* FW version */ 6276 if ((nvm_ver.phy_fw_maj == 0x0 && 6277 nvm_ver.phy_fw_min == 0x0 && 6278 nvm_ver.phy_fw_id == 0x0) || 6279 (nvm_ver.phy_fw_maj == 0xF && 6280 nvm_ver.phy_fw_min == 0xFF && 6281 nvm_ver.phy_fw_id == 0xF)) { 6282 /* If major, minor and id numbers are set to 0, 6283 * reading FW version is unsupported. If major number 6284 * is set to 0xF, minor is set to 0xFF and id is set 6285 * to 0xF, this means that number read is invalid. */ 6286 } else 6287 sbuf_printf(buf, "fw %d.%d.%d ", 6288 nvm_ver.phy_fw_maj, nvm_ver.phy_fw_min, 6289 nvm_ver.phy_fw_id); 6290 6291 /* NVM version */ 6292 if ((nvm_ver.nvm_major == 0x0 && 6293 nvm_ver.nvm_minor == 0x0 && 6294 nvm_ver.nvm_id == 0x0) || 6295 (nvm_ver.nvm_major == 0xF && 6296 nvm_ver.nvm_minor == 0xFF && 6297 nvm_ver.nvm_id == 0xF)) { 6298 /* If major, minor and id numbers are set to 0, 6299 * reading NVM version is unsupported. If major number 6300 * is set to 0xF, minor is set to 0xFF and id is set 6301 * to 0xF, this means that number read is invalid. */ 6302 } else 6303 sbuf_printf(buf, "nvm %x.%02x.%x ", 6304 nvm_ver.nvm_major, nvm_ver.nvm_minor, nvm_ver.nvm_id); 6305 6306 if (nvm_ver.oem_valid) { 6307 sbuf_printf(buf, "NVM OEM V%d.%d R%d", nvm_ver.oem_major, 6308 nvm_ver.oem_minor, nvm_ver.oem_release); 6309 space = " "; 6310 } 6311 6312 if (nvm_ver.or_valid) { 6313 sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d", 6314 space, nvm_ver.or_major, nvm_ver.or_build, 6315 nvm_ver.or_patch); 6316 space = " "; 6317 } 6318 6319 if (nvm_ver.etk_id != ((NVM_VER_INVALID << NVM_ETK_SHIFT) | 6320 NVM_VER_INVALID | 0xFFFFFFFF)) { 6321 sbuf_printf(buf, "%seTrack 0x%08x", space, nvm_ver.etk_id); 6322 } 6323 } /* ixgbe_sbuf_fw_version */ 6324 6325 /************************************************************************ 6326 * ixgbe_print_fw_version 6327 ************************************************************************/ 6328 static void 6329 ixgbe_print_fw_version(if_ctx_t ctx) 6330 { 6331 struct ixgbe_softc *sc = iflib_get_softc(ctx); 6332 struct ixgbe_hw *hw = &sc->hw; 6333 device_t dev = sc->dev; 6334 struct sbuf *buf; 6335 int error = 0; 6336 6337 buf = sbuf_new_auto(); 6338 if (!buf) { 6339 device_printf(dev, "Could not allocate sbuf for output.\n"); 6340 return; 6341 } 6342 6343 ixgbe_sbuf_fw_version(hw, buf); 6344 6345 error = sbuf_finish(buf); 6346 if (error) 6347 device_printf(dev, "Error finishing sbuf: %d\n", error); 6348 else if (sbuf_len(buf)) 6349 device_printf(dev, "%s\n", sbuf_data(buf)); 6350 6351 sbuf_delete(buf); 6352 } /* ixgbe_print_fw_version */ 6353 6354 /************************************************************************ 6355 * ixgbe_sysctl_print_fw_version 6356 ************************************************************************/ 6357 static int 6358 ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS) 6359 { 6360 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 6361 struct ixgbe_hw *hw = &sc->hw; 6362 device_t dev = sc->dev; 6363 struct sbuf *buf; 6364 int error = 0; 6365 6366 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 6367 if (!buf) { 6368 device_printf(dev, "Could not allocate sbuf for output.\n"); 6369 return (ENOMEM); 6370 } 6371 6372 ixgbe_sbuf_fw_version(hw, buf); 6373 6374 error = sbuf_finish(buf); 6375 if (error) 6376 device_printf(dev, "Error finishing sbuf: %d\n", error); 6377 6378 sbuf_delete(buf); 6379 6380 return (0); 6381 } /* ixgbe_sysctl_print_fw_version */ 6382