1 /***************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *****************************************************************************/ 33 34 #include "opt_inet.h" 35 #include "opt_inet6.h" 36 #include "opt_rss.h" 37 38 #include "ixgbe.h" 39 #include "ixgbe_sriov.h" 40 #include "ifdi_if.h" 41 42 #include <net/netmap.h> 43 #include <dev/netmap/netmap_kern.h> 44 45 /************************************************************************ 46 * Driver version 47 ************************************************************************/ 48 static const char ixgbe_driver_version[] = "5.0.1-k"; 49 50 /************************************************************************ 51 * PCI Device ID Table 52 * 53 * Used by probe to select devices to load on 54 * Last field stores an index into ixgbe_strings 55 * Last entry must be all 0s 56 * 57 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 58 ************************************************************************/ 59 static const pci_vendor_info_t ixgbe_vendor_info_array[] = 60 { 61 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 62 "Intel(R) 82598EB AF (Dual Fiber)"), 63 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 64 "Intel(R) 82598EB AF (Fiber)"), 65 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 66 "Intel(R) 82598EB AT (CX4)"), 67 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 68 "Intel(R) 82598EB AT"), 69 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 70 "Intel(R) 82598EB AT2"), 71 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, "Intel(R) 82598"), 72 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 73 "Intel(R) 82598EB AF DA (Dual Fiber)"), 74 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 75 "Intel(R) 82598EB AT (Dual CX4)"), 76 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 77 "Intel(R) 82598EB AF (Dual Fiber LR)"), 78 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 79 "Intel(R) 82598EB AF (Dual Fiber SR)"), 80 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 81 "Intel(R) 82598EB LOM"), 82 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 83 "Intel(R) X520 82599 (KX4)"), 84 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 85 "Intel(R) X520 82599 (KX4 Mezzanine)"), 86 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 87 "Intel(R) X520 82599ES (SFI/SFP+)"), 88 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 89 "Intel(R) X520 82599 (XAUI/BX4)"), 90 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 91 "Intel(R) X520 82599 (Dual CX4)"), 92 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 93 "Intel(R) X520-T 82599 LOM"), 94 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 95 "Intel(R) X520 82599 LS"), 96 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 97 "Intel(R) X520 82599 (Combined Backplane)"), 98 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 99 "Intel(R) X520 82599 (Backplane w/FCoE)"), 100 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 101 "Intel(R) X520 82599 (Dual SFP+)"), 102 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 103 "Intel(R) X520 82599 (Dual SFP+ w/FCoE)"), 104 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 105 "Intel(R) X520-1 82599EN (SFP+)"), 106 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 107 "Intel(R) X520-4 82599 (Quad SFP+)"), 108 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 109 "Intel(R) X520-Q1 82599 (QSFP+)"), 110 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 111 "Intel(R) X540-AT2"), 112 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"), 113 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"), 114 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"), 115 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 116 "Intel(R) X552 (KR Backplane)"), 117 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 118 "Intel(R) X552 (KX4 Backplane)"), 119 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 120 "Intel(R) X552/X557-AT (10GBASE-T)"), 121 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 122 "Intel(R) X552 (1000BASE-T)"), 123 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 124 "Intel(R) X552 (SFP+)"), 125 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 126 "Intel(R) X553 (KR Backplane)"), 127 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 128 "Intel(R) X553 L (KR Backplane)"), 129 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 130 "Intel(R) X553 (SFP+)"), 131 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 132 "Intel(R) X553 N (SFP+)"), 133 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 134 "Intel(R) X553 (1GbE SGMII)"), 135 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 136 "Intel(R) X553 L (1GbE SGMII)"), 137 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 138 "Intel(R) X553/X557-AT (10GBASE-T)"), 139 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 140 "Intel(R) X553 (1GbE)"), 141 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 142 "Intel(R) X553 L (1GbE)"), 143 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 144 "Intel(R) X540-T2 (Bypass)"), 145 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 146 "Intel(R) X520 82599 (Bypass)"), 147 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_BACKPLANE, 148 "Intel(R) E610 (Backplane)"), 149 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SFP, 150 "Intel(R) E610 (SFP)"), 151 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_2_5G_T, 152 "Intel(R) E610 (2.5 GbE)"), 153 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_10G_T, 154 "Intel(R) E610 (10 GbE)"), 155 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SGMII, 156 "Intel(R) E610 (SGMII)"), 157 /* required last entry */ 158 PVID_END 159 }; 160 161 static void *ixgbe_register(device_t); 162 static int ixgbe_if_attach_pre(if_ctx_t); 163 static int ixgbe_if_attach_post(if_ctx_t); 164 static int ixgbe_if_detach(if_ctx_t); 165 static int ixgbe_if_shutdown(if_ctx_t); 166 static int ixgbe_if_suspend(if_ctx_t); 167 static int ixgbe_if_resume(if_ctx_t); 168 169 static void ixgbe_if_stop(if_ctx_t); 170 void ixgbe_if_enable_intr(if_ctx_t); 171 static void ixgbe_if_disable_intr(if_ctx_t); 172 static void ixgbe_link_intr_enable(if_ctx_t); 173 static int ixgbe_if_rx_queue_intr_enable(if_ctx_t, uint16_t); 174 static void ixgbe_if_media_status(if_ctx_t, struct ifmediareq *); 175 static int ixgbe_if_media_change(if_ctx_t); 176 static int ixgbe_if_msix_intr_assign(if_ctx_t, int); 177 static int ixgbe_if_mtu_set(if_ctx_t, uint32_t); 178 static void ixgbe_if_crcstrip_set(if_ctx_t, int, int); 179 static void ixgbe_if_multi_set(if_ctx_t); 180 static int ixgbe_if_promisc_set(if_ctx_t, int); 181 static int ixgbe_if_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 182 int); 183 static int ixgbe_if_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 184 int); 185 static void ixgbe_if_queues_free(if_ctx_t); 186 static void ixgbe_if_timer(if_ctx_t, uint16_t); 187 static const char *ixgbe_link_speed_to_str(u32 link_speed); 188 static void ixgbe_if_update_admin_status(if_ctx_t); 189 static void ixgbe_if_vlan_register(if_ctx_t, u16); 190 static void ixgbe_if_vlan_unregister(if_ctx_t, u16); 191 static int ixgbe_if_i2c_req(if_ctx_t, struct ifi2creq *); 192 static bool ixgbe_if_needs_restart(if_ctx_t, enum iflib_restart_event); 193 int ixgbe_intr(void *); 194 195 static int ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data); 196 197 /************************************************************************ 198 * Function prototypes 199 ************************************************************************/ 200 static uint64_t ixgbe_if_get_counter(if_ctx_t, ift_counter); 201 202 static void ixgbe_enable_queue(struct ixgbe_softc *, u32); 203 static void ixgbe_disable_queue(struct ixgbe_softc *, u32); 204 static void ixgbe_add_device_sysctls(if_ctx_t); 205 static int ixgbe_allocate_pci_resources(if_ctx_t); 206 static int ixgbe_setup_low_power_mode(if_ctx_t); 207 208 static void ixgbe_config_dmac(struct ixgbe_softc *); 209 static void ixgbe_configure_ivars(struct ixgbe_softc *); 210 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 211 static u8 *ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 212 static bool ixgbe_sfp_probe(if_ctx_t); 213 214 static void ixgbe_free_pci_resources(if_ctx_t); 215 216 static int ixgbe_msix_link(void *); 217 static int ixgbe_msix_que(void *); 218 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 219 static void ixgbe_initialize_receive_units(if_ctx_t); 220 static void ixgbe_initialize_transmit_units(if_ctx_t); 221 222 static int ixgbe_setup_interface(if_ctx_t); 223 static void ixgbe_init_device_features(struct ixgbe_softc *); 224 static void ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 225 static void ixgbe_sbuf_fw_version(struct ixgbe_hw *, struct sbuf *); 226 static void ixgbe_print_fw_version(if_ctx_t); 227 static void ixgbe_add_media_types(if_ctx_t); 228 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 229 static void ixgbe_config_link(if_ctx_t); 230 static void ixgbe_get_slot_info(struct ixgbe_softc *); 231 static void ixgbe_fw_mode_timer(void *); 232 static void ixgbe_check_wol_support(struct ixgbe_softc *); 233 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 234 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 235 236 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 237 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 238 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 239 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 240 static void ixgbe_setup_vlan_hw_support(if_ctx_t); 241 static void ixgbe_config_gpie(struct ixgbe_softc *); 242 static void ixgbe_config_delay_values(struct ixgbe_softc *); 243 244 static void ixgbe_add_debug_sysctls(struct ixgbe_softc *sc); 245 static void ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc); 246 static int ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 247 static u8 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, 248 struct sbuf *sbuf, u8 cluster_id); 249 static int ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 250 251 /* Sysctl handlers */ 252 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS); 253 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS); 254 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS); 255 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 256 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 257 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 258 static int ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS); 259 #ifdef IXGBE_DEBUG 260 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 261 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 262 #endif 263 static int ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS); 264 static int ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS); 265 static int ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS); 266 static int ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS); 267 static int ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS); 268 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 269 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 270 static int ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS); 271 272 static int ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS); 273 static int ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS); 274 275 /* Deferred interrupt tasklets */ 276 static void ixgbe_handle_msf(void *); 277 static void ixgbe_handle_mod(void *); 278 static void ixgbe_handle_phy(void *); 279 static void ixgbe_handle_fw_event(void *); 280 281 static int ixgbe_enable_lse(struct ixgbe_softc *sc); 282 static int ixgbe_disable_lse(struct ixgbe_softc *sc); 283 284 /************************************************************************ 285 * FreeBSD Device Interface Entry Points 286 ************************************************************************/ 287 static device_method_t ix_methods[] = { 288 /* Device interface */ 289 DEVMETHOD(device_register, ixgbe_register), 290 DEVMETHOD(device_probe, iflib_device_probe), 291 DEVMETHOD(device_attach, iflib_device_attach), 292 DEVMETHOD(device_detach, iflib_device_detach), 293 DEVMETHOD(device_shutdown, iflib_device_shutdown), 294 DEVMETHOD(device_suspend, iflib_device_suspend), 295 DEVMETHOD(device_resume, iflib_device_resume), 296 #ifdef PCI_IOV 297 DEVMETHOD(pci_iov_init, iflib_device_iov_init), 298 DEVMETHOD(pci_iov_uninit, iflib_device_iov_uninit), 299 DEVMETHOD(pci_iov_add_vf, iflib_device_iov_add_vf), 300 #endif /* PCI_IOV */ 301 DEVMETHOD_END 302 }; 303 304 static driver_t ix_driver = { 305 "ix", ix_methods, sizeof(struct ixgbe_softc), 306 }; 307 308 DRIVER_MODULE(ix, pci, ix_driver, 0, 0); 309 IFLIB_PNP_INFO(pci, ix_driver, ixgbe_vendor_info_array); 310 MODULE_DEPEND(ix, pci, 1, 1, 1); 311 MODULE_DEPEND(ix, ether, 1, 1, 1); 312 MODULE_DEPEND(ix, iflib, 1, 1, 1); 313 314 static device_method_t ixgbe_if_methods[] = { 315 DEVMETHOD(ifdi_attach_pre, ixgbe_if_attach_pre), 316 DEVMETHOD(ifdi_attach_post, ixgbe_if_attach_post), 317 DEVMETHOD(ifdi_detach, ixgbe_if_detach), 318 DEVMETHOD(ifdi_shutdown, ixgbe_if_shutdown), 319 DEVMETHOD(ifdi_suspend, ixgbe_if_suspend), 320 DEVMETHOD(ifdi_resume, ixgbe_if_resume), 321 DEVMETHOD(ifdi_init, ixgbe_if_init), 322 DEVMETHOD(ifdi_stop, ixgbe_if_stop), 323 DEVMETHOD(ifdi_msix_intr_assign, ixgbe_if_msix_intr_assign), 324 DEVMETHOD(ifdi_intr_enable, ixgbe_if_enable_intr), 325 DEVMETHOD(ifdi_intr_disable, ixgbe_if_disable_intr), 326 DEVMETHOD(ifdi_link_intr_enable, ixgbe_link_intr_enable), 327 DEVMETHOD(ifdi_tx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 328 DEVMETHOD(ifdi_rx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 329 DEVMETHOD(ifdi_tx_queues_alloc, ixgbe_if_tx_queues_alloc), 330 DEVMETHOD(ifdi_rx_queues_alloc, ixgbe_if_rx_queues_alloc), 331 DEVMETHOD(ifdi_queues_free, ixgbe_if_queues_free), 332 DEVMETHOD(ifdi_update_admin_status, ixgbe_if_update_admin_status), 333 DEVMETHOD(ifdi_multi_set, ixgbe_if_multi_set), 334 DEVMETHOD(ifdi_mtu_set, ixgbe_if_mtu_set), 335 DEVMETHOD(ifdi_crcstrip_set, ixgbe_if_crcstrip_set), 336 DEVMETHOD(ifdi_media_status, ixgbe_if_media_status), 337 DEVMETHOD(ifdi_media_change, ixgbe_if_media_change), 338 DEVMETHOD(ifdi_promisc_set, ixgbe_if_promisc_set), 339 DEVMETHOD(ifdi_timer, ixgbe_if_timer), 340 DEVMETHOD(ifdi_vlan_register, ixgbe_if_vlan_register), 341 DEVMETHOD(ifdi_vlan_unregister, ixgbe_if_vlan_unregister), 342 DEVMETHOD(ifdi_get_counter, ixgbe_if_get_counter), 343 DEVMETHOD(ifdi_i2c_req, ixgbe_if_i2c_req), 344 DEVMETHOD(ifdi_needs_restart, ixgbe_if_needs_restart), 345 DEVMETHOD(ifdi_priv_ioctl, ixgbe_if_priv_ioctl), 346 #ifdef PCI_IOV 347 DEVMETHOD(ifdi_iov_init, ixgbe_if_iov_init), 348 DEVMETHOD(ifdi_iov_uninit, ixgbe_if_iov_uninit), 349 DEVMETHOD(ifdi_iov_vf_add, ixgbe_if_iov_vf_add), 350 #endif /* PCI_IOV */ 351 DEVMETHOD_END 352 }; 353 354 /* 355 * TUNEABLE PARAMETERS: 356 */ 357 358 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 359 "IXGBE driver parameters"); 360 static driver_t ixgbe_if_driver = { 361 "ixgbe_if", ixgbe_if_methods, sizeof(struct ixgbe_softc) 362 }; 363 364 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 365 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 366 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 367 368 /* Flow control setting, default to full */ 369 static int ixgbe_flow_control = ixgbe_fc_full; 370 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 371 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 372 373 /* Advertise Speed, default to 0 (auto) */ 374 static int ixgbe_advertise_speed = 0; 375 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN, 376 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters"); 377 378 /* 379 * Smart speed setting, default to on 380 * this only works as a compile option 381 * right now as its during attach, set 382 * this to 'ixgbe_smart_speed_off' to 383 * disable. 384 */ 385 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 386 387 /* 388 * MSI-X should be the default for best performance, 389 * but this allows it to be forced off for testing. 390 */ 391 static int ixgbe_enable_msix = 1; 392 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 393 0, 394 "Enable MSI-X interrupts"); 395 396 /* 397 * Defining this on will allow the use 398 * of unsupported SFP+ modules, note that 399 * doing so you are on your own :) 400 */ 401 static int allow_unsupported_sfp = false; 402 SYSCTL_INT(_hw_ix, OID_AUTO, unsupported_sfp, CTLFLAG_RDTUN, 403 &allow_unsupported_sfp, 0, 404 "Allow unsupported SFP modules...use at your own risk"); 405 406 /* 407 * Not sure if Flow Director is fully baked, 408 * so we'll default to turning it off. 409 */ 410 static int ixgbe_enable_fdir = 0; 411 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 412 0, 413 "Enable Flow Director"); 414 415 /* Receive-Side Scaling */ 416 static int ixgbe_enable_rss = 1; 417 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 418 0, 419 "Enable Receive-Side Scaling (RSS)"); 420 421 /* 422 * AIM: Adaptive Interrupt Moderation 423 * which means that the interrupt rate 424 * is varied over time based on the 425 * traffic for that interrupt vector 426 */ 427 static int ixgbe_enable_aim = false; 428 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 429 0, 430 "Enable adaptive interrupt moderation"); 431 432 #if 0 433 /* Keep running tab on them for sanity check */ 434 static int ixgbe_total_ports; 435 #endif 436 437 MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 438 439 /* 440 * For Flow Director: this is the number of TX packets we sample 441 * for the filter pool, this means every 20th packet will be probed. 442 * 443 * This feature can be disabled by setting this to 0. 444 */ 445 static int atr_sample_rate = 20; 446 447 extern struct if_txrx ixgbe_txrx; 448 449 static struct if_shared_ctx ixgbe_sctx_init = { 450 .isc_magic = IFLIB_MAGIC, 451 .isc_q_align = PAGE_SIZE,/* max(DBA_ALIGN, PAGE_SIZE) */ 452 .isc_tx_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 453 .isc_tx_maxsegsize = PAGE_SIZE, 454 .isc_tso_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 455 .isc_tso_maxsegsize = PAGE_SIZE, 456 .isc_rx_maxsize = PAGE_SIZE*4, 457 .isc_rx_nsegments = 1, 458 .isc_rx_maxsegsize = PAGE_SIZE*4, 459 .isc_nfl = 1, 460 .isc_ntxqs = 1, 461 .isc_nrxqs = 1, 462 463 .isc_admin_intrcnt = 1, 464 .isc_vendor_info = ixgbe_vendor_info_array, 465 .isc_driver_version = ixgbe_driver_version, 466 .isc_driver = &ixgbe_if_driver, 467 .isc_flags = IFLIB_TSO_INIT_IP, 468 469 .isc_nrxd_min = {MIN_RXD}, 470 .isc_ntxd_min = {MIN_TXD}, 471 .isc_nrxd_max = {MAX_RXD}, 472 .isc_ntxd_max = {MAX_TXD}, 473 .isc_nrxd_default = {DEFAULT_RXD}, 474 .isc_ntxd_default = {DEFAULT_TXD}, 475 }; 476 477 /************************************************************************ 478 * ixgbe_if_tx_queues_alloc 479 ************************************************************************/ 480 static int 481 ixgbe_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 482 int ntxqs, int ntxqsets) 483 { 484 struct ixgbe_softc *sc = iflib_get_softc(ctx); 485 if_softc_ctx_t scctx = sc->shared; 486 struct ix_tx_queue *que; 487 int i, j, error; 488 489 MPASS(sc->num_tx_queues > 0); 490 MPASS(sc->num_tx_queues == ntxqsets); 491 MPASS(ntxqs == 1); 492 493 /* Allocate queue structure memory */ 494 sc->tx_queues = 495 (struct ix_tx_queue *)malloc(sizeof(struct ix_tx_queue) * 496 ntxqsets, M_IXGBE, M_NOWAIT | M_ZERO); 497 if (!sc->tx_queues) { 498 device_printf(iflib_get_dev(ctx), 499 "Unable to allocate TX ring memory\n"); 500 return (ENOMEM); 501 } 502 503 for (i = 0, que = sc->tx_queues; i < ntxqsets; i++, que++) { 504 struct tx_ring *txr = &que->txr; 505 506 /* In case SR-IOV is enabled, align the index properly */ 507 txr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 508 509 txr->sc = que->sc = sc; 510 511 /* Allocate report status array */ 512 txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) * 513 scctx->isc_ntxd[0], M_IXGBE, M_NOWAIT | M_ZERO); 514 if (txr->tx_rsq == NULL) { 515 error = ENOMEM; 516 goto fail; 517 } 518 for (j = 0; j < scctx->isc_ntxd[0]; j++) 519 txr->tx_rsq[j] = QIDX_INVALID; 520 /* get virtual and physical address of the hardware queues */ 521 txr->tail = IXGBE_TDT(txr->me); 522 txr->tx_base = (union ixgbe_adv_tx_desc *)vaddrs[i]; 523 txr->tx_paddr = paddrs[i]; 524 525 txr->bytes = 0; 526 txr->total_packets = 0; 527 528 /* Set the rate at which we sample packets */ 529 if (sc->feat_en & IXGBE_FEATURE_FDIR) 530 txr->atr_sample = atr_sample_rate; 531 532 } 533 534 device_printf(iflib_get_dev(ctx), "allocated for %d queues\n", 535 sc->num_tx_queues); 536 537 return (0); 538 539 fail: 540 ixgbe_if_queues_free(ctx); 541 542 return (error); 543 } /* ixgbe_if_tx_queues_alloc */ 544 545 /************************************************************************ 546 * ixgbe_if_rx_queues_alloc 547 ************************************************************************/ 548 static int 549 ixgbe_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 550 int nrxqs, int nrxqsets) 551 { 552 struct ixgbe_softc *sc = iflib_get_softc(ctx); 553 struct ix_rx_queue *que; 554 int i; 555 556 MPASS(sc->num_rx_queues > 0); 557 MPASS(sc->num_rx_queues == nrxqsets); 558 MPASS(nrxqs == 1); 559 560 /* Allocate queue structure memory */ 561 sc->rx_queues = 562 (struct ix_rx_queue *)malloc(sizeof(struct ix_rx_queue)*nrxqsets, 563 M_IXGBE, M_NOWAIT | M_ZERO); 564 if (!sc->rx_queues) { 565 device_printf(iflib_get_dev(ctx), 566 "Unable to allocate TX ring memory\n"); 567 return (ENOMEM); 568 } 569 570 for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) { 571 struct rx_ring *rxr = &que->rxr; 572 573 /* In case SR-IOV is enabled, align the index properly */ 574 rxr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 575 576 rxr->sc = que->sc = sc; 577 578 /* get the virtual and physical address of the hw queues */ 579 rxr->tail = IXGBE_RDT(rxr->me); 580 rxr->rx_base = (union ixgbe_adv_rx_desc *)vaddrs[i]; 581 rxr->rx_paddr = paddrs[i]; 582 rxr->bytes = 0; 583 rxr->que = que; 584 } 585 586 device_printf(iflib_get_dev(ctx), "allocated for %d rx queues\n", 587 sc->num_rx_queues); 588 589 return (0); 590 } /* ixgbe_if_rx_queues_alloc */ 591 592 /************************************************************************ 593 * ixgbe_if_queues_free 594 ************************************************************************/ 595 static void 596 ixgbe_if_queues_free(if_ctx_t ctx) 597 { 598 struct ixgbe_softc *sc = iflib_get_softc(ctx); 599 struct ix_tx_queue *tx_que = sc->tx_queues; 600 struct ix_rx_queue *rx_que = sc->rx_queues; 601 int i; 602 603 if (tx_que != NULL) { 604 for (i = 0; i < sc->num_tx_queues; i++, tx_que++) { 605 struct tx_ring *txr = &tx_que->txr; 606 if (txr->tx_rsq == NULL) 607 break; 608 609 free(txr->tx_rsq, M_IXGBE); 610 txr->tx_rsq = NULL; 611 } 612 613 free(sc->tx_queues, M_IXGBE); 614 sc->tx_queues = NULL; 615 } 616 if (rx_que != NULL) { 617 free(sc->rx_queues, M_IXGBE); 618 sc->rx_queues = NULL; 619 } 620 } /* ixgbe_if_queues_free */ 621 622 /************************************************************************ 623 * ixgbe_initialize_rss_mapping 624 ************************************************************************/ 625 static void 626 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 627 { 628 struct ixgbe_hw *hw = &sc->hw; 629 u32 reta = 0, mrqc, rss_key[10]; 630 int queue_id, table_size, index_mult; 631 int i, j; 632 u32 rss_hash_config; 633 634 if (sc->feat_en & IXGBE_FEATURE_RSS) { 635 /* Fetch the configured RSS key */ 636 rss_getkey((uint8_t *)&rss_key); 637 } else { 638 /* set up random bits */ 639 arc4rand(&rss_key, sizeof(rss_key), 0); 640 } 641 642 /* Set multiplier for RETA setup and table size based on MAC */ 643 index_mult = 0x1; 644 table_size = 128; 645 switch (sc->hw.mac.type) { 646 case ixgbe_mac_82598EB: 647 index_mult = 0x11; 648 break; 649 case ixgbe_mac_X550: 650 case ixgbe_mac_X550EM_x: 651 case ixgbe_mac_X550EM_a: 652 case ixgbe_mac_E610: 653 table_size = 512; 654 break; 655 default: 656 break; 657 } 658 659 /* Set up the redirection table */ 660 for (i = 0, j = 0; i < table_size; i++, j++) { 661 if (j == sc->num_rx_queues) 662 j = 0; 663 664 if (sc->feat_en & IXGBE_FEATURE_RSS) { 665 /* 666 * Fetch the RSS bucket id for the given indirection 667 * entry. Cap it at the number of configured buckets 668 * (which is num_rx_queues.) 669 */ 670 queue_id = rss_get_indirection_to_bucket(i); 671 queue_id = queue_id % sc->num_rx_queues; 672 } else 673 queue_id = (j * index_mult); 674 675 /* 676 * The low 8 bits are for hash value (n+0); 677 * The next 8 bits are for hash value (n+1), etc. 678 */ 679 reta = reta >> 8; 680 reta = reta | (((uint32_t)queue_id) << 24); 681 if ((i & 3) == 3) { 682 if (i < 128) 683 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 684 else 685 IXGBE_WRITE_REG(hw, 686 IXGBE_ERETA((i >> 2) - 32), reta); 687 reta = 0; 688 } 689 } 690 691 /* Now fill our hash function seeds */ 692 for (i = 0; i < 10; i++) 693 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 694 695 /* Perform hash on these packet types */ 696 if (sc->feat_en & IXGBE_FEATURE_RSS) 697 rss_hash_config = rss_gethashconfig(); 698 else { 699 /* 700 * Disable UDP - IP fragments aren't currently being handled 701 * and so we end up with a mix of 2-tuple and 4-tuple 702 * traffic. 703 */ 704 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 | 705 RSS_HASHTYPE_RSS_TCP_IPV4 | 706 RSS_HASHTYPE_RSS_IPV6 | 707 RSS_HASHTYPE_RSS_TCP_IPV6 | 708 RSS_HASHTYPE_RSS_IPV6_EX | 709 RSS_HASHTYPE_RSS_TCP_IPV6_EX; 710 } 711 712 mrqc = IXGBE_MRQC_RSSEN; 713 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 714 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 715 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 716 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 717 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 718 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 719 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 720 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 721 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 722 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 723 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 724 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 725 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 726 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 727 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 728 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 729 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 730 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 731 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 732 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 733 } /* ixgbe_initialize_rss_mapping */ 734 735 /************************************************************************ 736 * ixgbe_initialize_receive_units - Setup receive registers and features. 737 ************************************************************************/ 738 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 739 740 static void 741 ixgbe_initialize_receive_units(if_ctx_t ctx) 742 { 743 struct ixgbe_softc *sc = iflib_get_softc(ctx); 744 if_softc_ctx_t scctx = sc->shared; 745 struct ixgbe_hw *hw = &sc->hw; 746 if_t ifp = iflib_get_ifp(ctx); 747 struct ix_rx_queue *que; 748 int i, j; 749 u32 bufsz, fctrl, srrctl, rxcsum; 750 u32 hlreg; 751 752 /* 753 * Make sure receives are disabled while 754 * setting up the descriptor ring 755 */ 756 ixgbe_disable_rx(hw); 757 758 /* Enable broadcasts */ 759 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 760 fctrl |= IXGBE_FCTRL_BAM; 761 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 762 fctrl |= IXGBE_FCTRL_DPF; 763 fctrl |= IXGBE_FCTRL_PMCF; 764 } 765 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 766 767 /* Set for Jumbo Frames? */ 768 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 769 if (if_getmtu(ifp) > ETHERMTU) 770 hlreg |= IXGBE_HLREG0_JUMBOEN; 771 else 772 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 773 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 774 775 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 776 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 777 778 /* Setup the Base and Length of the Rx Descriptor Ring */ 779 for (i = 0, que = sc->rx_queues; i < sc->num_rx_queues; i++, que++) { 780 struct rx_ring *rxr = &que->rxr; 781 u64 rdba = rxr->rx_paddr; 782 783 j = rxr->me; 784 785 /* Setup the Base and Length of the Rx Descriptor Ring */ 786 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 787 (rdba & 0x00000000ffffffffULL)); 788 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 789 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 790 scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc)); 791 792 /* Set up the SRRCTL register */ 793 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 794 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 795 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 796 srrctl |= bufsz; 797 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 798 799 /* 800 * Set DROP_EN iff we have no flow control and >1 queue. 801 * Note that srrctl was cleared shortly before during reset, 802 * so we do not need to clear the bit, but do it just in case 803 * this code is moved elsewhere. 804 */ 805 if (sc->num_rx_queues > 1 && 806 sc->hw.fc.requested_mode == ixgbe_fc_none) { 807 srrctl |= IXGBE_SRRCTL_DROP_EN; 808 } else { 809 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 810 } 811 812 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 813 814 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 815 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 816 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 817 818 /* Set the driver rx tail address */ 819 rxr->tail = IXGBE_RDT(rxr->me); 820 } 821 822 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 823 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 824 IXGBE_PSRTYPE_UDPHDR | 825 IXGBE_PSRTYPE_IPV4HDR | 826 IXGBE_PSRTYPE_IPV6HDR; 827 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 828 } 829 830 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 831 832 ixgbe_initialize_rss_mapping(sc); 833 834 if (sc->feat_en & IXGBE_FEATURE_RSS) { 835 /* RSS and RX IPP Checksum are mutually exclusive */ 836 rxcsum |= IXGBE_RXCSUM_PCSD; 837 } 838 839 if (if_getcapenable(ifp) & IFCAP_RXCSUM) 840 rxcsum |= IXGBE_RXCSUM_PCSD; 841 842 /* This is useful for calculating UDP/IP fragment checksums */ 843 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 844 rxcsum |= IXGBE_RXCSUM_IPPCSE; 845 846 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 847 848 } /* ixgbe_initialize_receive_units */ 849 850 /************************************************************************ 851 * ixgbe_initialize_transmit_units - Enable transmit units. 852 ************************************************************************/ 853 static void 854 ixgbe_initialize_transmit_units(if_ctx_t ctx) 855 { 856 struct ixgbe_softc *sc = iflib_get_softc(ctx); 857 struct ixgbe_hw *hw = &sc->hw; 858 if_softc_ctx_t scctx = sc->shared; 859 struct ix_tx_queue *que; 860 int i; 861 862 /* Setup the Base and Length of the Tx Descriptor Ring */ 863 for (i = 0, que = sc->tx_queues; i < sc->num_tx_queues; 864 i++, que++) { 865 struct tx_ring *txr = &que->txr; 866 u64 tdba = txr->tx_paddr; 867 u32 txctrl = 0; 868 int j = txr->me; 869 870 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 871 (tdba & 0x00000000ffffffffULL)); 872 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 873 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 874 scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc)); 875 876 /* Setup the HW Tx Head and Tail descriptor pointers */ 877 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 878 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 879 880 /* Cache the tail address */ 881 txr->tail = IXGBE_TDT(txr->me); 882 883 txr->tx_rs_cidx = txr->tx_rs_pidx; 884 txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1; 885 for (int k = 0; k < scctx->isc_ntxd[0]; k++) 886 txr->tx_rsq[k] = QIDX_INVALID; 887 888 /* Disable Head Writeback */ 889 /* 890 * Note: for X550 series devices, these registers are actually 891 * prefixed with TPH_ isntead of DCA_, but the addresses and 892 * fields remain the same. 893 */ 894 switch (hw->mac.type) { 895 case ixgbe_mac_82598EB: 896 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 897 break; 898 default: 899 txctrl = 900 IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 901 break; 902 } 903 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 904 switch (hw->mac.type) { 905 case ixgbe_mac_82598EB: 906 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 907 break; 908 default: 909 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), 910 txctrl); 911 break; 912 } 913 914 } 915 916 if (hw->mac.type != ixgbe_mac_82598EB) { 917 u32 dmatxctl, rttdcs; 918 919 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 920 dmatxctl |= IXGBE_DMATXCTL_TE; 921 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 922 /* Disable arbiter to set MTQC */ 923 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 924 rttdcs |= IXGBE_RTTDCS_ARBDIS; 925 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 926 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 927 ixgbe_get_mtqc(sc->iov_mode)); 928 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 929 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 930 } 931 932 } /* ixgbe_initialize_transmit_units */ 933 934 static int 935 ixgbe_check_fw_api_version(struct ixgbe_softc *sc) 936 { 937 struct ixgbe_hw *hw = &sc->hw; 938 if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) { 939 device_printf(sc->dev, 940 "The driver for the device stopped because the NVM " 941 "image is newer than expected. You must install the " 942 "most recent version of the network driver.\n"); 943 return (EOPNOTSUPP); 944 } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR && 945 hw->api_min_ver > (IXGBE_FW_API_VER_MINOR + 2)) { 946 device_printf(sc->dev, 947 "The driver for the device detected a newer version of " 948 "the NVM image than expected. Please install the most " 949 "recent version of the network driver.\n"); 950 } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR || 951 hw->api_min_ver < IXGBE_FW_API_VER_MINOR - 2) { 952 device_printf(sc->dev, 953 "The driver for the device detected an older version " 954 "of the NVM image than expected. " 955 "Please update the NVM image.\n"); 956 } 957 return (0); 958 } 959 960 /************************************************************************ 961 * ixgbe_register 962 ************************************************************************/ 963 static void * 964 ixgbe_register(device_t dev) 965 { 966 return (&ixgbe_sctx_init); 967 } /* ixgbe_register */ 968 969 /************************************************************************ 970 * ixgbe_if_attach_pre - Device initialization routine, part 1 971 * 972 * Called when the driver is being loaded. 973 * Identifies the type of hardware, initializes the hardware, 974 * and initializes iflib structures. 975 * 976 * return 0 on success, positive on failure 977 ************************************************************************/ 978 static int 979 ixgbe_if_attach_pre(if_ctx_t ctx) 980 { 981 struct ixgbe_softc *sc; 982 device_t dev; 983 if_softc_ctx_t scctx; 984 struct ixgbe_hw *hw; 985 int error = 0; 986 u32 ctrl_ext; 987 size_t i; 988 989 INIT_DEBUGOUT("ixgbe_attach: begin"); 990 991 /* Allocate, clear, and link in our adapter structure */ 992 dev = iflib_get_dev(ctx); 993 sc = iflib_get_softc(ctx); 994 sc->hw.back = sc; 995 sc->ctx = ctx; 996 sc->dev = dev; 997 scctx = sc->shared = iflib_get_softc_ctx(ctx); 998 sc->media = iflib_get_media(ctx); 999 hw = &sc->hw; 1000 1001 /* Determine hardware revision */ 1002 hw->vendor_id = pci_get_vendor(dev); 1003 hw->device_id = pci_get_device(dev); 1004 hw->revision_id = pci_get_revid(dev); 1005 hw->subsystem_vendor_id = pci_get_subvendor(dev); 1006 hw->subsystem_device_id = pci_get_subdevice(dev); 1007 1008 /* Do base PCI setup - map BAR0 */ 1009 if (ixgbe_allocate_pci_resources(ctx)) { 1010 device_printf(dev, "Allocation of PCI resources failed\n"); 1011 return (ENXIO); 1012 } 1013 1014 /* let hardware know driver is loaded */ 1015 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1016 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 1017 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 1018 1019 /* 1020 * Initialize the shared code 1021 */ 1022 if (ixgbe_init_shared_code(hw) != 0) { 1023 device_printf(dev, "Unable to initialize the shared code\n"); 1024 error = ENXIO; 1025 goto err_pci; 1026 } 1027 1028 if (hw->mac.type == ixgbe_mac_E610) 1029 ixgbe_init_aci(hw); 1030 1031 sc->do_debug_dump = false; 1032 1033 if (hw->mac.ops.fw_recovery_mode && 1034 hw->mac.ops.fw_recovery_mode(hw)) { 1035 device_printf(dev, 1036 "Firmware recovery mode detected. Limiting " 1037 "functionality.\nRefer to the Intel(R) Ethernet Adapters " 1038 "and Devices User Guide for details on firmware recovery " 1039 "mode."); 1040 error = ENOSYS; 1041 goto err_pci; 1042 } 1043 1044 /* 82598 Does not support SR-IOV, initialize everything else */ 1045 if (hw->mac.type >= ixgbe_mac_82599_vf) { 1046 for (i = 0; i < sc->num_vfs; i++) 1047 hw->mbx.ops[i].init_params(hw); 1048 } 1049 1050 hw->allow_unsupported_sfp = allow_unsupported_sfp; 1051 1052 if (hw->mac.type != ixgbe_mac_82598EB) 1053 hw->phy.smart_speed = ixgbe_smart_speed; 1054 1055 ixgbe_init_device_features(sc); 1056 1057 /* Enable WoL (if supported) */ 1058 ixgbe_check_wol_support(sc); 1059 1060 /* Verify adapter fan is still functional (if applicable) */ 1061 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 1062 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 1063 ixgbe_check_fan_failure(sc, esdp, false); 1064 } 1065 1066 /* Ensure SW/FW semaphore is free */ 1067 ixgbe_init_swfw_semaphore(hw); 1068 1069 /* Enable EEE power saving */ 1070 if (sc->feat_en & IXGBE_FEATURE_EEE) 1071 hw->mac.ops.setup_eee(hw, true); 1072 1073 /* Set an initial default flow control value */ 1074 hw->fc.requested_mode = ixgbe_flow_control; 1075 1076 hw->phy.reset_if_overtemp = true; 1077 error = ixgbe_reset_hw(hw); 1078 hw->phy.reset_if_overtemp = false; 1079 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 1080 /* 1081 * No optics in this port, set up 1082 * so the timer routine will probe 1083 * for later insertion. 1084 */ 1085 sc->sfp_probe = true; 1086 error = 0; 1087 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1088 device_printf(dev, "Unsupported SFP+ module detected!\n"); 1089 error = EIO; 1090 goto err_pci; 1091 } else if (error) { 1092 device_printf(dev, "Hardware initialization failed\n"); 1093 error = EIO; 1094 goto err_pci; 1095 } 1096 1097 /* Make sure we have a good EEPROM before we read from it */ 1098 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1099 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 1100 error = EIO; 1101 goto err_pci; 1102 } 1103 1104 error = ixgbe_start_hw(hw); 1105 switch (error) { 1106 case IXGBE_ERR_EEPROM_VERSION: 1107 device_printf(dev, 1108 "This device is a pre-production adapter/LOM. Please be" 1109 " aware there may be issues associated with your" 1110 " hardware.\nIf you are experiencing problems please" 1111 " contact your Intel or hardware representative who" 1112 " provided you with this hardware.\n"); 1113 break; 1114 case IXGBE_ERR_SFP_NOT_SUPPORTED: 1115 device_printf(dev, "Unsupported SFP+ Module\n"); 1116 error = EIO; 1117 goto err_pci; 1118 case IXGBE_ERR_SFP_NOT_PRESENT: 1119 device_printf(dev, "No SFP+ Module found\n"); 1120 /* falls thru */ 1121 default: 1122 break; 1123 } 1124 1125 /* Check the FW API version and enable FW logging support for E610 */ 1126 if (hw->mac.type == ixgbe_mac_E610) { 1127 if (ixgbe_check_fw_api_version(sc)) { 1128 error = EIO; 1129 goto err_pci; 1130 } 1131 ixgbe_fwlog_set_support_ena(hw); 1132 } 1133 1134 /* Most of the iflib initialization... */ 1135 1136 iflib_set_mac(ctx, hw->mac.addr); 1137 switch (sc->hw.mac.type) { 1138 case ixgbe_mac_X550: 1139 case ixgbe_mac_X550EM_x: 1140 case ixgbe_mac_X550EM_a: 1141 scctx->isc_rss_table_size = 512; 1142 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 64; 1143 break; 1144 default: 1145 scctx->isc_rss_table_size = 128; 1146 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 16; 1147 } 1148 1149 /* Allow legacy interrupts */ 1150 ixgbe_txrx.ift_legacy_intr = ixgbe_intr; 1151 1152 scctx->isc_txqsizes[0] = 1153 roundup2(scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc) + 1154 sizeof(u32), DBA_ALIGN), 1155 scctx->isc_rxqsizes[0] = 1156 roundup2(scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc), 1157 DBA_ALIGN); 1158 1159 /* XXX */ 1160 scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO | 1161 CSUM_IP6_TCP | CSUM_IP6_UDP | CSUM_IP6_TSO; 1162 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 1163 scctx->isc_tx_nsegments = IXGBE_82598_SCATTER; 1164 } else { 1165 scctx->isc_tx_csum_flags |= CSUM_SCTP |CSUM_IP6_SCTP; 1166 scctx->isc_tx_nsegments = IXGBE_82599_SCATTER; 1167 } 1168 1169 scctx->isc_msix_bar = pci_msix_table_bar(dev); 1170 1171 scctx->isc_tx_tso_segments_max = scctx->isc_tx_nsegments; 1172 scctx->isc_tx_tso_size_max = IXGBE_TSO_SIZE; 1173 scctx->isc_tx_tso_segsize_max = PAGE_SIZE; 1174 1175 scctx->isc_txrx = &ixgbe_txrx; 1176 1177 scctx->isc_capabilities = scctx->isc_capenable = IXGBE_CAPS; 1178 1179 return (0); 1180 1181 err_pci: 1182 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1183 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1184 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1185 ixgbe_free_pci_resources(ctx); 1186 1187 if (hw->mac.type == ixgbe_mac_E610) 1188 ixgbe_shutdown_aci(hw); 1189 1190 return (error); 1191 } /* ixgbe_if_attach_pre */ 1192 1193 /********************************************************************* 1194 * ixgbe_if_attach_post - Device initialization routine, part 2 1195 * 1196 * Called during driver load, but after interrupts and 1197 * resources have been allocated and configured. 1198 * Sets up some data structures not relevant to iflib. 1199 * 1200 * return 0 on success, positive on failure 1201 *********************************************************************/ 1202 static int 1203 ixgbe_if_attach_post(if_ctx_t ctx) 1204 { 1205 device_t dev; 1206 struct ixgbe_softc *sc; 1207 struct ixgbe_hw *hw; 1208 int error = 0; 1209 1210 dev = iflib_get_dev(ctx); 1211 sc = iflib_get_softc(ctx); 1212 hw = &sc->hw; 1213 1214 if (sc->intr_type == IFLIB_INTR_LEGACY && 1215 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) == 0) { 1216 device_printf(dev, "Device does not support legacy interrupts"); 1217 error = ENXIO; 1218 goto err; 1219 } 1220 1221 /* Allocate multicast array memory. */ 1222 sc->mta = malloc(sizeof(*sc->mta) * MAX_NUM_MULTICAST_ADDRESSES, 1223 M_IXGBE, M_NOWAIT); 1224 if (sc->mta == NULL) { 1225 device_printf(dev, 1226 "Can not allocate multicast setup array\n"); 1227 error = ENOMEM; 1228 goto err; 1229 } 1230 1231 /* hw.ix defaults init */ 1232 ixgbe_set_advertise(sc, ixgbe_advertise_speed); 1233 1234 /* Enable the optics for 82599 SFP+ fiber */ 1235 ixgbe_enable_tx_laser(hw); 1236 1237 /* Enable power to the phy. */ 1238 ixgbe_set_phy_power(hw, true); 1239 1240 ixgbe_initialize_iov(sc); 1241 1242 error = ixgbe_setup_interface(ctx); 1243 if (error) { 1244 device_printf(dev, "Interface setup failed: %d\n", error); 1245 goto err; 1246 } 1247 1248 ixgbe_if_update_admin_status(ctx); 1249 1250 /* Initialize statistics */ 1251 ixgbe_update_stats_counters(sc); 1252 ixgbe_add_hw_stats(sc); 1253 1254 /* Check PCIE slot type/speed/width */ 1255 ixgbe_get_slot_info(sc); 1256 1257 /* 1258 * Do time init and sysctl init here, but 1259 * only on the first port of a bypass sc. 1260 */ 1261 ixgbe_bypass_init(sc); 1262 1263 /* Display NVM and Option ROM versions */ 1264 ixgbe_print_fw_version(ctx); 1265 1266 /* Set an initial dmac value */ 1267 sc->dmac = 0; 1268 /* Set initial advertised speeds (if applicable) */ 1269 sc->advertise = ixgbe_get_default_advertise(sc); 1270 1271 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1272 ixgbe_define_iov_schemas(dev, &error); 1273 1274 /* Add sysctls */ 1275 ixgbe_add_device_sysctls(ctx); 1276 1277 /* Init recovery mode timer and state variable */ 1278 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1279 sc->recovery_mode = 0; 1280 1281 /* Set up the timer callout */ 1282 callout_init(&sc->fw_mode_timer, true); 1283 1284 /* Start the task */ 1285 callout_reset(&sc->fw_mode_timer, hz, ixgbe_fw_mode_timer, sc); 1286 } 1287 1288 return (0); 1289 err: 1290 return (error); 1291 } /* ixgbe_if_attach_post */ 1292 1293 /************************************************************************ 1294 * ixgbe_check_wol_support 1295 * 1296 * Checks whether the adapter's ports are capable of 1297 * Wake On LAN by reading the adapter's NVM. 1298 * 1299 * Sets each port's hw->wol_enabled value depending 1300 * on the value read here. 1301 ************************************************************************/ 1302 static void 1303 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1304 { 1305 struct ixgbe_hw *hw = &sc->hw; 1306 u16 dev_caps = 0; 1307 1308 /* Find out WoL support for port */ 1309 sc->wol_support = hw->wol_enabled = 0; 1310 ixgbe_get_device_caps(hw, &dev_caps); 1311 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1312 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1313 hw->bus.func == 0)) 1314 sc->wol_support = hw->wol_enabled = 1; 1315 1316 /* Save initial wake up filter configuration */ 1317 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1318 1319 return; 1320 } /* ixgbe_check_wol_support */ 1321 1322 /************************************************************************ 1323 * ixgbe_setup_interface 1324 * 1325 * Setup networking device structure and register an interface. 1326 ************************************************************************/ 1327 static int 1328 ixgbe_setup_interface(if_ctx_t ctx) 1329 { 1330 if_t ifp = iflib_get_ifp(ctx); 1331 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1332 1333 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1334 1335 if_setbaudrate(ifp, IF_Gbps(10)); 1336 1337 sc->max_frame_size = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN; 1338 1339 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1340 1341 ixgbe_add_media_types(ctx); 1342 1343 /* Autoselect media by default */ 1344 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 1345 1346 return (0); 1347 } /* ixgbe_setup_interface */ 1348 1349 /************************************************************************ 1350 * ixgbe_if_get_counter 1351 ************************************************************************/ 1352 static uint64_t 1353 ixgbe_if_get_counter(if_ctx_t ctx, ift_counter cnt) 1354 { 1355 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1356 if_t ifp = iflib_get_ifp(ctx); 1357 1358 switch (cnt) { 1359 case IFCOUNTER_IPACKETS: 1360 return (sc->ipackets); 1361 case IFCOUNTER_OPACKETS: 1362 return (sc->opackets); 1363 case IFCOUNTER_IBYTES: 1364 return (sc->ibytes); 1365 case IFCOUNTER_OBYTES: 1366 return (sc->obytes); 1367 case IFCOUNTER_IMCASTS: 1368 return (sc->imcasts); 1369 case IFCOUNTER_OMCASTS: 1370 return (sc->omcasts); 1371 case IFCOUNTER_COLLISIONS: 1372 return (0); 1373 case IFCOUNTER_IQDROPS: 1374 return (sc->iqdrops); 1375 case IFCOUNTER_IERRORS: 1376 return (sc->ierrors); 1377 default: 1378 return (if_get_counter_default(ifp, cnt)); 1379 } 1380 } /* ixgbe_if_get_counter */ 1381 1382 /************************************************************************ 1383 * ixgbe_if_i2c_req 1384 ************************************************************************/ 1385 static int 1386 ixgbe_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req) 1387 { 1388 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1389 struct ixgbe_hw *hw = &sc->hw; 1390 int i; 1391 1392 if (hw->phy.ops.read_i2c_byte == NULL) 1393 return (ENXIO); 1394 for (i = 0; i < req->len; i++) 1395 hw->phy.ops.read_i2c_byte(hw, req->offset + i, 1396 req->dev_addr, &req->data[i]); 1397 return (0); 1398 } /* ixgbe_if_i2c_req */ 1399 1400 /* ixgbe_if_needs_restart - Tell iflib when the driver needs to be 1401 * reinitialized 1402 * @ctx: iflib context 1403 * @event: event code to check 1404 * 1405 * Defaults to returning false for unknown events. 1406 * 1407 * @returns true if iflib needs to reinit the interface 1408 */ 1409 static bool 1410 ixgbe_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event) 1411 { 1412 switch (event) { 1413 case IFLIB_RESTART_VLAN_CONFIG: 1414 default: 1415 return (false); 1416 } 1417 } 1418 1419 /************************************************************************ 1420 * ixgbe_if_priv_ioctl - Ioctl handler for driver 1421 * 1422 * Handler for custom driver specific ioctls 1423 * 1424 * return 0 on success, positive on failure 1425 ************************************************************************/ 1426 static int 1427 ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data) 1428 { 1429 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1430 struct ifdrv *ifd; 1431 device_t dev = sc->dev; 1432 1433 /* Make sure the command type is valid */ 1434 switch (command) { 1435 case SIOCSDRVSPEC: 1436 case SIOCGDRVSPEC: 1437 /* Accepted commands */ 1438 break; 1439 case SIOCGPRIVATE_0: 1440 /* 1441 * Although we do not support this ioctl command, it's expected 1442 * that iflib will forward it to the IFDI_PRIV_IOCTL handler. 1443 * Do not print a message in this case. 1444 */ 1445 return (ENOTSUP); 1446 default: 1447 /* 1448 * If we get a different command for this function, it's 1449 * definitely unexpected, so log a message indicating what 1450 * command we got for debugging purposes. 1451 */ 1452 device_printf(dev, 1453 "%s: unexpected ioctl command %08lx\n", 1454 __func__, command); 1455 return (EINVAL); 1456 } 1457 1458 ifd = (struct ifdrv *)data; 1459 1460 switch (ifd->ifd_cmd) { 1461 case IXGBE_NVM_ACCESS: 1462 IOCTL_DEBUGOUT("ioctl: NVM ACCESS"); 1463 return (ixgbe_nvm_access_ioctl(sc, ifd)); 1464 case IXGBE_DEBUG_DUMP: 1465 IOCTL_DEBUGOUT("ioctl: DEBUG DUMP"); 1466 return (ixgbe_debug_dump_ioctl(sc, ifd)); 1467 default: 1468 IOCTL_DEBUGOUT1( 1469 "ioctl: UNKNOWN SIOC(S|G)DRVSPEC (0x%X) command\n", 1470 (int)ifd->ifd_cmd); 1471 return (EINVAL); 1472 } 1473 1474 return (0); 1475 } 1476 1477 /************************************************************************ 1478 * ixgbe_nvm_access_ioctl 1479 * 1480 * Handles an NVM access ioctl request 1481 ************************************************************************/ 1482 static int 1483 ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1484 { 1485 struct ixgbe_nvm_access_data *data; 1486 struct ixgbe_nvm_access_cmd *cmd; 1487 struct ixgbe_hw *hw = &sc->hw; 1488 size_t ifd_len = ifd->ifd_len; 1489 size_t malloc_len; 1490 device_t dev = sc->dev; 1491 u8 *nvm_buffer; 1492 s32 error = 0; 1493 1494 /* 1495 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1496 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1497 * without verifying privileges. To prevent non-privileged threads from 1498 * accessing this interface, perform a privilege check at this point. 1499 */ 1500 error = priv_check(curthread, PRIV_DRIVER); 1501 if (error) 1502 return (error); 1503 1504 if (ifd_len < sizeof(*cmd)) { 1505 device_printf(dev, 1506 "%s: ifdrv length is too small. Got %zu, " 1507 "but expected %zu\n", 1508 __func__, ifd_len, sizeof(*cmd)); 1509 return (EINVAL); 1510 } 1511 1512 if (ifd->ifd_data == NULL) { 1513 device_printf(dev, "%s: No ifd data buffer.\n", 1514 __func__); 1515 return (EINVAL); 1516 } 1517 1518 malloc_len = max(ifd_len, sizeof(*data) + sizeof(*cmd)); 1519 1520 nvm_buffer = (u8 *)malloc(malloc_len, M_IXGBE, M_ZERO | M_NOWAIT); 1521 if (!nvm_buffer) 1522 return (ENOMEM); 1523 1524 /* Copy the NVM access command and data in from user space */ 1525 error = copyin(ifd->ifd_data, nvm_buffer, ifd_len); 1526 if (error) { 1527 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1528 __func__, error); 1529 goto cleanup_free_nvm_buffer; 1530 } 1531 1532 /* 1533 * The NVM command structure is immediately followed by data which 1534 * varies in size based on the command. 1535 */ 1536 cmd = (struct ixgbe_nvm_access_cmd *)nvm_buffer; 1537 data = (struct ixgbe_nvm_access_data *) 1538 (nvm_buffer + sizeof(struct ixgbe_nvm_access_cmd)); 1539 1540 /* Handle the NVM access request */ 1541 error = ixgbe_handle_nvm_access(hw, cmd, data); 1542 if (error) { 1543 device_printf(dev, "%s: NVM access request failed, error %d\n", 1544 __func__, error); 1545 } 1546 1547 /* Copy the possibly modified contents of the handled request out */ 1548 error = copyout(nvm_buffer, ifd->ifd_data, ifd_len); 1549 if (error) { 1550 device_printf(dev, "%s: Copying response back to " 1551 "user space failed, error %d\n", 1552 __func__, error); 1553 goto cleanup_free_nvm_buffer; 1554 } 1555 1556 cleanup_free_nvm_buffer: 1557 free(nvm_buffer, M_IXGBE); 1558 return (error); 1559 } 1560 1561 /************************************************************************ 1562 * ixgbe_debug_dump_ioctl 1563 * 1564 * Makes debug dump of internal FW/HW data. 1565 ************************************************************************/ 1566 static int 1567 ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1568 { 1569 struct ixgbe_debug_dump_cmd *dd_cmd; 1570 struct ixgbe_hw *hw = &sc->hw; 1571 size_t ifd_len = ifd->ifd_len; 1572 device_t dev = sc->dev; 1573 s32 error = 0; 1574 1575 if (!(sc->feat_en & IXGBE_FEATURE_DBG_DUMP)) 1576 return (ENODEV); 1577 1578 /* Data returned from ACI command */ 1579 u16 ret_buf_size = 0; 1580 u16 ret_next_cluster = 0; 1581 u16 ret_next_table = 0; 1582 u32 ret_next_index = 0; 1583 1584 /* 1585 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1586 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1587 * without verifying privileges. To prevent non-privileged threads from 1588 * accessing this interface, perform a privilege check at this point. 1589 */ 1590 error = priv_check(curthread, PRIV_DRIVER); 1591 if (error) 1592 return (error); 1593 1594 if (ifd_len < sizeof(*dd_cmd)) { 1595 device_printf(dev, 1596 "%s: ifdrv length is too small. Got %zu, " 1597 "but expected %zu\n", 1598 __func__, ifd_len, sizeof(*dd_cmd)); 1599 return (EINVAL); 1600 } 1601 1602 if (ifd->ifd_data == NULL) { 1603 device_printf(dev, "%s: No ifd data buffer.\n", 1604 __func__); 1605 return (EINVAL); 1606 } 1607 1608 dd_cmd = (struct ixgbe_debug_dump_cmd *)malloc(ifd_len, M_IXGBE, 1609 M_NOWAIT | M_ZERO); 1610 if (!dd_cmd) { 1611 error = -ENOMEM; 1612 goto out; 1613 } 1614 /* copy data from userspace */ 1615 error = copyin(ifd->ifd_data, dd_cmd, ifd_len); 1616 if (error) { 1617 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1618 __func__, error); 1619 goto out; 1620 } 1621 1622 /* ACI command requires buf_size arg to be grater than 0 */ 1623 if (dd_cmd->data_size == 0) { 1624 device_printf(dev, "%s: data_size must be greater than 0\n", 1625 __func__); 1626 error = EINVAL; 1627 goto out; 1628 } 1629 1630 /* Zero the data buffer memory space */ 1631 memset(dd_cmd->data, 0, ifd_len - sizeof(*dd_cmd)); 1632 1633 error = ixgbe_aci_get_internal_data(hw, dd_cmd->cluster_id, 1634 dd_cmd->table_id, dd_cmd->offset, dd_cmd->data, dd_cmd->data_size, 1635 &ret_buf_size, &ret_next_cluster, &ret_next_table, &ret_next_index); 1636 if (error) { 1637 device_printf(dev, 1638 "%s: Failed to get internal FW/HW data, error: %d\n", 1639 __func__, error); 1640 goto out; 1641 } 1642 1643 dd_cmd->cluster_id = ret_next_cluster; 1644 dd_cmd->table_id = ret_next_table; 1645 dd_cmd->offset = ret_next_index; 1646 dd_cmd->data_size = ret_buf_size; 1647 1648 error = copyout(dd_cmd, ifd->ifd_data, ifd->ifd_len); 1649 if (error) { 1650 device_printf(dev, 1651 "%s: Failed to copy data out, error: %d\n", 1652 __func__, error); 1653 } 1654 1655 out: 1656 free(dd_cmd, M_IXGBE); 1657 1658 return (error); 1659 } 1660 1661 /************************************************************************ 1662 * ixgbe_add_media_types 1663 ************************************************************************/ 1664 static void 1665 ixgbe_add_media_types(if_ctx_t ctx) 1666 { 1667 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1668 struct ixgbe_hw *hw = &sc->hw; 1669 device_t dev = iflib_get_dev(ctx); 1670 u64 layer; 1671 1672 layer = sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 1673 1674 /* Media types with matching FreeBSD media defines */ 1675 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1676 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_T, 0, NULL); 1677 if (layer & IXGBE_PHYSICAL_LAYER_5000BASE_T) 1678 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1679 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1680 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1681 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1682 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1683 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1684 ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL); 1685 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1686 ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL); 1687 1688 if (hw->mac.type == ixgbe_mac_X550) { 1689 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1690 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1691 } 1692 1693 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1694 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) { 1695 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_TWINAX, 0, 1696 NULL); 1697 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1698 } 1699 1700 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1701 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 1702 if (hw->phy.multispeed_fiber) 1703 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_LX, 0, 1704 NULL); 1705 } 1706 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1707 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1708 if (hw->phy.multispeed_fiber) 1709 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, 1710 NULL); 1711 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1712 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 1713 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1714 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1715 1716 #ifdef IFM_ETH_XTYPE 1717 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1718 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 1719 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1720 ifmedia_add( sc->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 1721 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1722 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1723 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1724 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_KX, 0, NULL); 1725 #else 1726 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 1727 device_printf(dev, "Media supported: 10GbaseKR\n"); 1728 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 1729 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1730 } 1731 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 1732 device_printf(dev, "Media supported: 10GbaseKX4\n"); 1733 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 1734 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1735 } 1736 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 1737 device_printf(dev, "Media supported: 1000baseKX\n"); 1738 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 1739 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 1740 } 1741 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) { 1742 device_printf(dev, "Media supported: 2500baseKX\n"); 1743 device_printf(dev, "2500baseKX mapped to 2500baseSX\n"); 1744 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_SX, 0, NULL); 1745 } 1746 #endif 1747 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) { 1748 device_printf(dev, "Media supported: 1000baseBX\n"); 1749 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_BX, 0, NULL); 1750 } 1751 1752 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 1753 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1754 0, NULL); 1755 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1756 } 1757 1758 ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1759 } /* ixgbe_add_media_types */ 1760 1761 /************************************************************************ 1762 * ixgbe_is_sfp 1763 ************************************************************************/ 1764 static inline bool 1765 ixgbe_is_sfp(struct ixgbe_hw *hw) 1766 { 1767 switch (hw->mac.type) { 1768 case ixgbe_mac_82598EB: 1769 if (hw->phy.type == ixgbe_phy_nl) 1770 return (true); 1771 return (false); 1772 case ixgbe_mac_82599EB: 1773 switch (hw->mac.ops.get_media_type(hw)) { 1774 case ixgbe_media_type_fiber: 1775 case ixgbe_media_type_fiber_qsfp: 1776 return (true); 1777 default: 1778 return (false); 1779 } 1780 case ixgbe_mac_X550EM_x: 1781 case ixgbe_mac_X550EM_a: 1782 case ixgbe_mac_E610: 1783 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) 1784 return (true); 1785 return (false); 1786 default: 1787 return (false); 1788 } 1789 } /* ixgbe_is_sfp */ 1790 1791 /************************************************************************ 1792 * ixgbe_config_link 1793 ************************************************************************/ 1794 static void 1795 ixgbe_config_link(if_ctx_t ctx) 1796 { 1797 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1798 struct ixgbe_hw *hw = &sc->hw; 1799 u32 autoneg, err = 0; 1800 bool sfp, negotiate; 1801 1802 sfp = ixgbe_is_sfp(hw); 1803 1804 if (sfp) { 1805 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 1806 iflib_admin_intr_deferred(ctx); 1807 } else { 1808 if (hw->mac.ops.check_link) 1809 err = ixgbe_check_link(hw, &sc->link_speed, 1810 &sc->link_up, false); 1811 if (err) 1812 return; 1813 autoneg = hw->phy.autoneg_advertised; 1814 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 1815 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1816 &negotiate); 1817 if (err) 1818 return; 1819 1820 if (hw->mac.type == ixgbe_mac_X550 && 1821 hw->phy.autoneg_advertised == 0) { 1822 /* 1823 * 2.5G and 5G autonegotiation speeds on X550 1824 * are disabled by default due to reported 1825 * interoperability issues with some switches. 1826 * 1827 * The second condition checks if any operations 1828 * involving setting autonegotiation speeds have 1829 * been performed prior to this ixgbe_config_link() 1830 * call. 1831 * 1832 * If hw->phy.autoneg_advertised does not 1833 * equal 0, this means that the user might have 1834 * set autonegotiation speeds via the sysctl 1835 * before bringing the interface up. In this 1836 * case, we should not disable 2.5G and 5G 1837 * since that speeds might be selected by the 1838 * user. 1839 * 1840 * Otherwise (i.e. if hw->phy.autoneg_advertised 1841 * is set to 0), it is the first time we set 1842 * autonegotiation preferences and the default 1843 * set of speeds should exclude 2.5G and 5G. 1844 */ 1845 autoneg &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 1846 IXGBE_LINK_SPEED_5GB_FULL); 1847 } 1848 1849 if (hw->mac.type == ixgbe_mac_E610) { 1850 hw->phy.ops.init(hw); 1851 err = ixgbe_enable_lse(sc); 1852 if (err) 1853 device_printf(sc->dev, 1854 "Failed to enable Link Status Event, " 1855 "error: %d", err); 1856 } 1857 1858 if (hw->mac.ops.setup_link) 1859 err = hw->mac.ops.setup_link(hw, autoneg, 1860 sc->link_up); 1861 } 1862 } /* ixgbe_config_link */ 1863 1864 /************************************************************************ 1865 * ixgbe_update_stats_counters - Update board statistics counters. 1866 ************************************************************************/ 1867 static void 1868 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1869 { 1870 struct ixgbe_hw *hw = &sc->hw; 1871 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1872 u32 missed_rx = 0, bprc, lxon, lxoff, total; 1873 u32 lxoffrxc; 1874 u64 total_missed_rx = 0; 1875 1876 stats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 1877 stats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 1878 stats->errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 1879 stats->mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 1880 stats->mpc[0] += IXGBE_READ_REG(hw, IXGBE_MPC(0)); 1881 1882 for (int i = 0; i < 16; i++) { 1883 stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 1884 stats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 1885 stats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 1886 } 1887 stats->mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 1888 stats->mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 1889 stats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 1890 1891 /* Hardware workaround, gprc counts missed packets */ 1892 stats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 1893 stats->gprc -= missed_rx; 1894 1895 if (hw->mac.type != ixgbe_mac_82598EB) { 1896 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 1897 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 1898 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1899 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 1900 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 1901 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 1902 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 1903 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 1904 stats->lxoffrxc += lxoffrxc; 1905 } else { 1906 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 1907 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 1908 stats->lxoffrxc += lxoffrxc; 1909 /* 82598 only has a counter in the high register */ 1910 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 1911 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 1912 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 1913 } 1914 1915 /* 1916 * For watchdog management we need to know if we have been paused 1917 * during the last interval, so capture that here. 1918 */ 1919 if (lxoffrxc) 1920 sc->shared->isc_pause_frames = 1; 1921 1922 /* 1923 * Workaround: mprc hardware is incorrectly counting 1924 * broadcasts, so for now we subtract those. 1925 */ 1926 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 1927 stats->bprc += bprc; 1928 stats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 1929 if (hw->mac.type == ixgbe_mac_82598EB) 1930 stats->mprc -= bprc; 1931 1932 stats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 1933 stats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 1934 stats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 1935 stats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 1936 stats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 1937 stats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 1938 1939 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 1940 stats->lxontxc += lxon; 1941 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 1942 stats->lxofftxc += lxoff; 1943 total = lxon + lxoff; 1944 1945 stats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 1946 stats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 1947 stats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 1948 stats->gptc -= total; 1949 stats->mptc -= total; 1950 stats->ptc64 -= total; 1951 stats->gotc -= total * ETHER_MIN_LEN; 1952 1953 stats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 1954 stats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 1955 stats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); 1956 stats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 1957 stats->mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 1958 stats->mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 1959 stats->mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 1960 stats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 1961 stats->tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 1962 stats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 1963 stats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 1964 stats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 1965 stats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 1966 stats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 1967 stats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 1968 stats->xec += IXGBE_READ_REG(hw, IXGBE_XEC); 1969 stats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 1970 stats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 1971 /* Only read FCOE on 82599 */ 1972 if (hw->mac.type != ixgbe_mac_82598EB) { 1973 stats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 1974 stats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 1975 stats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 1976 stats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 1977 stats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 1978 } 1979 1980 /* Fill out the OS statistics structure */ 1981 IXGBE_SET_IPACKETS(sc, stats->gprc); 1982 IXGBE_SET_OPACKETS(sc, stats->gptc); 1983 IXGBE_SET_IBYTES(sc, stats->gorc); 1984 IXGBE_SET_OBYTES(sc, stats->gotc); 1985 IXGBE_SET_IMCASTS(sc, stats->mprc); 1986 IXGBE_SET_OMCASTS(sc, stats->mptc); 1987 IXGBE_SET_COLLISIONS(sc, 0); 1988 IXGBE_SET_IQDROPS(sc, total_missed_rx); 1989 1990 /* 1991 * Aggregate following types of errors as RX errors: 1992 * - CRC error count, 1993 * - illegal byte error count, 1994 * - missed packets count, 1995 * - length error count, 1996 * - undersized packets count, 1997 * - fragmented packets count, 1998 * - oversized packets count, 1999 * - jabber count. 2000 */ 2001 IXGBE_SET_IERRORS(sc, stats->crcerrs + stats->illerrc + 2002 stats->mpc[0] + stats->rlec + stats->ruc + stats->rfc + 2003 stats->roc + stats->rjc); 2004 } /* ixgbe_update_stats_counters */ 2005 2006 /************************************************************************ 2007 * ixgbe_add_hw_stats 2008 * 2009 * Add sysctl variables, one per statistic, to the system. 2010 ************************************************************************/ 2011 static void 2012 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 2013 { 2014 device_t dev = iflib_get_dev(sc->ctx); 2015 struct ix_rx_queue *rx_que; 2016 struct ix_tx_queue *tx_que; 2017 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 2018 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 2019 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 2020 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2021 struct sysctl_oid *stat_node, *queue_node; 2022 struct sysctl_oid_list *stat_list, *queue_list; 2023 int i; 2024 2025 #define QUEUE_NAME_LEN 32 2026 char namebuf[QUEUE_NAME_LEN]; 2027 2028 /* Driver Statistics */ 2029 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 2030 CTLFLAG_RD, &sc->dropped_pkts, "Driver dropped packets"); 2031 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events", 2032 CTLFLAG_RD, &sc->watchdog_events, "Watchdog timeouts"); 2033 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 2034 CTLFLAG_RD, &sc->link_irq, "Link MSI-X IRQ Handled"); 2035 2036 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 2037 i++, tx_que++) { 2038 struct tx_ring *txr = &tx_que->txr; 2039 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2040 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2041 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2042 queue_list = SYSCTL_CHILDREN(queue_node); 2043 2044 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 2045 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2046 ixgbe_sysctl_tdh_handler, "IU", 2047 "Transmit Descriptor Head"); 2048 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 2049 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2050 ixgbe_sysctl_tdt_handler, "IU", 2051 "Transmit Descriptor Tail"); 2052 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx", 2053 CTLFLAG_RD, &txr->tso_tx, "TSO"); 2054 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 2055 CTLFLAG_RD, &txr->total_packets, 2056 "Queue Packets Transmitted"); 2057 } 2058 2059 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 2060 i++, rx_que++) { 2061 struct rx_ring *rxr = &rx_que->rxr; 2062 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2063 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2064 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2065 queue_list = SYSCTL_CHILDREN(queue_node); 2066 2067 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 2068 CTLTYPE_UINT | CTLFLAG_RW, 2069 &sc->rx_queues[i], 0, 2070 ixgbe_sysctl_interrupt_rate_handler, "IU", 2071 "Interrupt Rate"); 2072 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 2073 CTLFLAG_RD, &(sc->rx_queues[i].irqs), 2074 "irqs on this queue"); 2075 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 2076 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2077 ixgbe_sysctl_rdh_handler, "IU", 2078 "Receive Descriptor Head"); 2079 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 2080 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2081 ixgbe_sysctl_rdt_handler, "IU", 2082 "Receive Descriptor Tail"); 2083 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 2084 CTLFLAG_RD, &rxr->rx_packets, "Queue Packets Received"); 2085 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 2086 CTLFLAG_RD, &rxr->rx_bytes, "Queue Bytes Received"); 2087 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 2088 CTLFLAG_RD, &rxr->rx_copies, "Copied RX Frames"); 2089 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_discarded", 2090 CTLFLAG_RD, &rxr->rx_discarded, "Discarded RX packets"); 2091 } 2092 2093 /* MAC stats get their own sub node */ 2094 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 2095 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "MAC Statistics"); 2096 stat_list = SYSCTL_CHILDREN(stat_node); 2097 2098 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_errs", 2099 CTLFLAG_RD, &sc->ierrors, IXGBE_SYSCTL_DESC_RX_ERRS); 2100 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 2101 CTLFLAG_RD, &stats->crcerrs, "CRC Errors"); 2102 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 2103 CTLFLAG_RD, &stats->illerrc, "Illegal Byte Errors"); 2104 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 2105 CTLFLAG_RD, &stats->errbc, "Byte Errors"); 2106 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 2107 CTLFLAG_RD, &stats->mspdc, "MAC Short Packets Discarded"); 2108 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 2109 CTLFLAG_RD, &stats->mlfc, "MAC Local Faults"); 2110 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 2111 CTLFLAG_RD, &stats->mrfc, "MAC Remote Faults"); 2112 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 2113 CTLFLAG_RD, &stats->rlec, "Receive Length Errors"); 2114 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_missed_packets", 2115 CTLFLAG_RD, &stats->mpc[0], "RX Missed Packet Count"); 2116 2117 /* Flow Control stats */ 2118 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 2119 CTLFLAG_RD, &stats->lxontxc, "Link XON Transmitted"); 2120 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 2121 CTLFLAG_RD, &stats->lxonrxc, "Link XON Received"); 2122 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 2123 CTLFLAG_RD, &stats->lxofftxc, "Link XOFF Transmitted"); 2124 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 2125 CTLFLAG_RD, &stats->lxoffrxc, "Link XOFF Received"); 2126 2127 /* Packet Reception Stats */ 2128 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 2129 CTLFLAG_RD, &stats->tor, "Total Octets Received"); 2130 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 2131 CTLFLAG_RD, &stats->gorc, "Good Octets Received"); 2132 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 2133 CTLFLAG_RD, &stats->tpr, "Total Packets Received"); 2134 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 2135 CTLFLAG_RD, &stats->gprc, "Good Packets Received"); 2136 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 2137 CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); 2138 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 2139 CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); 2140 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 2141 CTLFLAG_RD, &stats->prc64, "64 byte frames received "); 2142 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 2143 CTLFLAG_RD, &stats->prc127, "65-127 byte frames received"); 2144 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 2145 CTLFLAG_RD, &stats->prc255, "128-255 byte frames received"); 2146 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 2147 CTLFLAG_RD, &stats->prc511, "256-511 byte frames received"); 2148 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 2149 CTLFLAG_RD, &stats->prc1023, "512-1023 byte frames received"); 2150 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 2151 CTLFLAG_RD, &stats->prc1522, "1023-1522 byte frames received"); 2152 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 2153 CTLFLAG_RD, &stats->ruc, "Receive Undersized"); 2154 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 2155 CTLFLAG_RD, &stats->rfc, "Fragmented Packets Received "); 2156 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 2157 CTLFLAG_RD, &stats->roc, "Oversized Packets Received"); 2158 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 2159 CTLFLAG_RD, &stats->rjc, "Received Jabber"); 2160 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 2161 CTLFLAG_RD, &stats->mngprc, "Management Packets Received"); 2162 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 2163 CTLFLAG_RD, &stats->mngptc, "Management Packets Dropped"); 2164 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 2165 CTLFLAG_RD, &stats->xec, "Checksum Errors"); 2166 2167 /* Packet Transmission Stats */ 2168 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 2169 CTLFLAG_RD, &stats->gotc, "Good Octets Transmitted"); 2170 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 2171 CTLFLAG_RD, &stats->tpt, "Total Packets Transmitted"); 2172 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 2173 CTLFLAG_RD, &stats->gptc, "Good Packets Transmitted"); 2174 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 2175 CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); 2176 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 2177 CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); 2178 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 2179 CTLFLAG_RD, &stats->mngptc, "Management Packets Transmitted"); 2180 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 2181 CTLFLAG_RD, &stats->ptc64, "64 byte frames transmitted "); 2182 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 2183 CTLFLAG_RD, &stats->ptc127, "65-127 byte frames transmitted"); 2184 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 2185 CTLFLAG_RD, &stats->ptc255, "128-255 byte frames transmitted"); 2186 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 2187 CTLFLAG_RD, &stats->ptc511, "256-511 byte frames transmitted"); 2188 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 2189 CTLFLAG_RD, &stats->ptc1023, "512-1023 byte frames transmitted"); 2190 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 2191 CTLFLAG_RD, &stats->ptc1522, "1024-1522 byte frames transmitted"); 2192 } /* ixgbe_add_hw_stats */ 2193 2194 /************************************************************************ 2195 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2196 * 2197 * Retrieves the TDH value from the hardware 2198 ************************************************************************/ 2199 static int 2200 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 2201 { 2202 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2203 int error; 2204 unsigned int val; 2205 2206 if (!txr) 2207 return (0); 2208 2209 2210 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2211 return (EPERM); 2212 2213 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me)); 2214 error = sysctl_handle_int(oidp, &val, 0, req); 2215 if (error || !req->newptr) 2216 return error; 2217 2218 return (0); 2219 } /* ixgbe_sysctl_tdh_handler */ 2220 2221 /************************************************************************ 2222 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2223 * 2224 * Retrieves the TDT value from the hardware 2225 ************************************************************************/ 2226 static int 2227 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 2228 { 2229 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2230 int error; 2231 unsigned int val; 2232 2233 if (!txr) 2234 return (0); 2235 2236 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2237 return (EPERM); 2238 2239 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me)); 2240 error = sysctl_handle_int(oidp, &val, 0, req); 2241 if (error || !req->newptr) 2242 return error; 2243 2244 return (0); 2245 } /* ixgbe_sysctl_tdt_handler */ 2246 2247 /************************************************************************ 2248 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2249 * 2250 * Retrieves the RDH value from the hardware 2251 ************************************************************************/ 2252 static int 2253 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 2254 { 2255 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2256 int error; 2257 unsigned int val; 2258 2259 if (!rxr) 2260 return (0); 2261 2262 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2263 return (EPERM); 2264 2265 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me)); 2266 error = sysctl_handle_int(oidp, &val, 0, req); 2267 if (error || !req->newptr) 2268 return error; 2269 2270 return (0); 2271 } /* ixgbe_sysctl_rdh_handler */ 2272 2273 /************************************************************************ 2274 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2275 * 2276 * Retrieves the RDT value from the hardware 2277 ************************************************************************/ 2278 static int 2279 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 2280 { 2281 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2282 int error; 2283 unsigned int val; 2284 2285 if (!rxr) 2286 return (0); 2287 2288 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2289 return (EPERM); 2290 2291 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me)); 2292 error = sysctl_handle_int(oidp, &val, 0, req); 2293 if (error || !req->newptr) 2294 return error; 2295 2296 return (0); 2297 } /* ixgbe_sysctl_rdt_handler */ 2298 2299 /************************************************************************ 2300 * ixgbe_if_vlan_register 2301 * 2302 * Run via vlan config EVENT, it enables us to use the 2303 * HW Filter table since we can get the vlan id. This 2304 * just creates the entry in the soft version of the 2305 * VFTA, init will repopulate the real table. 2306 ************************************************************************/ 2307 static void 2308 ixgbe_if_vlan_register(if_ctx_t ctx, u16 vtag) 2309 { 2310 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2311 u16 index, bit; 2312 2313 index = (vtag >> 5) & 0x7F; 2314 bit = vtag & 0x1F; 2315 sc->shadow_vfta[index] |= (1 << bit); 2316 ++sc->num_vlans; 2317 ixgbe_setup_vlan_hw_support(ctx); 2318 } /* ixgbe_if_vlan_register */ 2319 2320 /************************************************************************ 2321 * ixgbe_if_vlan_unregister 2322 * 2323 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2324 ************************************************************************/ 2325 static void 2326 ixgbe_if_vlan_unregister(if_ctx_t ctx, u16 vtag) 2327 { 2328 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2329 u16 index, bit; 2330 2331 index = (vtag >> 5) & 0x7F; 2332 bit = vtag & 0x1F; 2333 sc->shadow_vfta[index] &= ~(1 << bit); 2334 --sc->num_vlans; 2335 /* Re-init to load the changes */ 2336 ixgbe_setup_vlan_hw_support(ctx); 2337 } /* ixgbe_if_vlan_unregister */ 2338 2339 /************************************************************************ 2340 * ixgbe_setup_vlan_hw_support 2341 ************************************************************************/ 2342 static void 2343 ixgbe_setup_vlan_hw_support(if_ctx_t ctx) 2344 { 2345 if_t ifp = iflib_get_ifp(ctx); 2346 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2347 struct ixgbe_hw *hw = &sc->hw; 2348 struct rx_ring *rxr; 2349 int i; 2350 u32 ctrl; 2351 2352 2353 /* 2354 * We get here thru init_locked, meaning 2355 * a soft reset, this has already cleared 2356 * the VFTA and other state, so if there 2357 * have been no vlan's registered do nothing. 2358 */ 2359 if (sc->num_vlans == 0 || 2360 (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) == 0) { 2361 /* Clear the vlan hw flag */ 2362 for (i = 0; i < sc->num_rx_queues; i++) { 2363 rxr = &sc->rx_queues[i].rxr; 2364 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 2365 if (hw->mac.type != ixgbe_mac_82598EB) { 2366 ctrl = IXGBE_READ_REG(hw, 2367 IXGBE_RXDCTL(rxr->me)); 2368 ctrl &= ~IXGBE_RXDCTL_VME; 2369 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), 2370 ctrl); 2371 } 2372 rxr->vtag_strip = false; 2373 } 2374 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2375 /* Enable the Filter Table if enabled */ 2376 ctrl |= IXGBE_VLNCTRL_CFIEN; 2377 ctrl &= ~IXGBE_VLNCTRL_VFE; 2378 if (hw->mac.type == ixgbe_mac_82598EB) 2379 ctrl &= ~IXGBE_VLNCTRL_VME; 2380 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2381 return; 2382 } 2383 2384 /* Setup the queues for vlans */ 2385 if (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) { 2386 for (i = 0; i < sc->num_rx_queues; i++) { 2387 rxr = &sc->rx_queues[i].rxr; 2388 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 2389 if (hw->mac.type != ixgbe_mac_82598EB) { 2390 ctrl = IXGBE_READ_REG(hw, 2391 IXGBE_RXDCTL(rxr->me)); 2392 ctrl |= IXGBE_RXDCTL_VME; 2393 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), 2394 ctrl); 2395 } 2396 rxr->vtag_strip = true; 2397 } 2398 } 2399 2400 if ((if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0) 2401 return; 2402 /* 2403 * A soft reset zero's out the VFTA, so 2404 * we need to repopulate it now. 2405 */ 2406 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2407 if (sc->shadow_vfta[i] != 0) 2408 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 2409 sc->shadow_vfta[i]); 2410 2411 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2412 /* Enable the Filter Table if enabled */ 2413 if (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) { 2414 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 2415 ctrl |= IXGBE_VLNCTRL_VFE; 2416 } 2417 if (hw->mac.type == ixgbe_mac_82598EB) 2418 ctrl |= IXGBE_VLNCTRL_VME; 2419 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2420 } /* ixgbe_setup_vlan_hw_support */ 2421 2422 /************************************************************************ 2423 * ixgbe_get_slot_info 2424 * 2425 * Get the width and transaction speed of 2426 * the slot this adapter is plugged into. 2427 ************************************************************************/ 2428 static void 2429 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2430 { 2431 device_t dev = iflib_get_dev(sc->ctx); 2432 struct ixgbe_hw *hw = &sc->hw; 2433 int bus_info_valid = true; 2434 u32 offset; 2435 u16 link; 2436 2437 /* Some devices are behind an internal bridge */ 2438 switch (hw->device_id) { 2439 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2440 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2441 goto get_parent_info; 2442 default: 2443 break; 2444 } 2445 2446 ixgbe_get_bus_info(hw); 2447 2448 /* 2449 * Some devices don't use PCI-E, but there is no need 2450 * to display "Unknown" for bus speed and width. 2451 */ 2452 switch (hw->mac.type) { 2453 case ixgbe_mac_X550EM_x: 2454 case ixgbe_mac_X550EM_a: 2455 return; 2456 default: 2457 goto display; 2458 } 2459 2460 get_parent_info: 2461 /* 2462 * For the Quad port adapter we need to parse back 2463 * up the PCI tree to find the speed of the expansion 2464 * slot into which this adapter is plugged. A bit more work. 2465 */ 2466 dev = device_get_parent(device_get_parent(dev)); 2467 #ifdef IXGBE_DEBUG 2468 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2469 pci_get_slot(dev), pci_get_function(dev)); 2470 #endif 2471 dev = device_get_parent(device_get_parent(dev)); 2472 #ifdef IXGBE_DEBUG 2473 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2474 pci_get_slot(dev), pci_get_function(dev)); 2475 #endif 2476 /* Now get the PCI Express Capabilities offset */ 2477 if (pci_find_cap(dev, PCIY_EXPRESS, &offset)) { 2478 /* 2479 * Hmm...can't get PCI-Express capabilities. 2480 * Falling back to default method. 2481 */ 2482 bus_info_valid = false; 2483 ixgbe_get_bus_info(hw); 2484 goto display; 2485 } 2486 /* ...and read the Link Status Register */ 2487 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 2488 ixgbe_set_pci_config_data_generic(hw, link); 2489 2490 display: 2491 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2492 ((hw->bus.speed == ixgbe_bus_speed_16000) ? "16.0GT/s" : 2493 (hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2494 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2495 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2496 "Unknown"), 2497 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2498 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2499 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2500 "Unknown")); 2501 2502 if (bus_info_valid) { 2503 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2504 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2505 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2506 device_printf(dev, 2507 "PCI-Express bandwidth available for this card" 2508 " is not sufficient for optimal performance.\n"); 2509 device_printf(dev, 2510 "For optimal performance a x8 PCIE, or x4 PCIE" 2511 " Gen2 slot is required.\n"); 2512 } 2513 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2514 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2515 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2516 device_printf(dev, 2517 "PCI-Express bandwidth available for this card" 2518 " is not sufficient for optimal performance.\n"); 2519 device_printf(dev, 2520 "For optimal performance a x8 PCIE Gen3 slot is" 2521 " required.\n"); 2522 } 2523 } else 2524 device_printf(dev, 2525 "Unable to determine slot speed/width. The speed/width" 2526 " reported are that of the internal switch.\n"); 2527 2528 return; 2529 } /* ixgbe_get_slot_info */ 2530 2531 /************************************************************************ 2532 * ixgbe_if_msix_intr_assign 2533 * 2534 * Setup MSI-X Interrupt resources and handlers 2535 ************************************************************************/ 2536 static int 2537 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix) 2538 { 2539 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2540 struct ix_rx_queue *rx_que = sc->rx_queues; 2541 struct ix_tx_queue *tx_que; 2542 int error, rid, vector = 0; 2543 char buf[16]; 2544 2545 /* Admin Que is vector 0*/ 2546 rid = vector + 1; 2547 for (int i = 0; i < sc->num_rx_queues; i++, vector++, rx_que++) { 2548 rid = vector + 1; 2549 2550 snprintf(buf, sizeof(buf), "rxq%d", i); 2551 error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid, 2552 IFLIB_INTR_RXTX, ixgbe_msix_que, rx_que, rx_que->rxr.me, 2553 buf); 2554 2555 if (error) { 2556 device_printf(iflib_get_dev(ctx), 2557 "Failed to allocate que int %d err: %d", 2558 i,error); 2559 sc->num_rx_queues = i + 1; 2560 goto fail; 2561 } 2562 2563 rx_que->msix = vector; 2564 } 2565 for (int i = 0; i < sc->num_tx_queues; i++) { 2566 snprintf(buf, sizeof(buf), "txq%d", i); 2567 tx_que = &sc->tx_queues[i]; 2568 tx_que->msix = i % sc->num_rx_queues; 2569 iflib_softirq_alloc_generic(ctx, 2570 &sc->rx_queues[tx_que->msix].que_irq, 2571 IFLIB_INTR_TX, tx_que, tx_que->txr.me, buf); 2572 } 2573 rid = vector + 1; 2574 error = iflib_irq_alloc_generic(ctx, &sc->irq, rid, 2575 IFLIB_INTR_ADMIN, ixgbe_msix_link, sc, 0, "aq"); 2576 if (error) { 2577 device_printf(iflib_get_dev(ctx), 2578 "Failed to register admin handler"); 2579 return (error); 2580 } 2581 2582 sc->vector = vector; 2583 2584 return (0); 2585 fail: 2586 iflib_irq_free(ctx, &sc->irq); 2587 rx_que = sc->rx_queues; 2588 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) 2589 iflib_irq_free(ctx, &rx_que->que_irq); 2590 2591 return (error); 2592 } /* ixgbe_if_msix_intr_assign */ 2593 2594 static inline void 2595 ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que) 2596 { 2597 uint32_t newitr = 0; 2598 struct rx_ring *rxr = &que->rxr; 2599 /* FIXME struct tx_ring *txr = ... ->txr; */ 2600 2601 /* 2602 * Do Adaptive Interrupt Moderation: 2603 * - Write out last calculated setting 2604 * - Calculate based on average size over 2605 * the last interval. 2606 */ 2607 if (que->eitr_setting) { 2608 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix), 2609 que->eitr_setting); 2610 } 2611 2612 que->eitr_setting = 0; 2613 /* Idle, do nothing */ 2614 if (rxr->bytes == 0) { 2615 /* FIXME && txr->bytes == 0 */ 2616 return; 2617 } 2618 2619 if ((rxr->bytes) && (rxr->packets)) 2620 newitr = rxr->bytes / rxr->packets; 2621 /* FIXME for transmit accounting 2622 * if ((txr->bytes) && (txr->packets)) 2623 * newitr = txr->bytes/txr->packets; 2624 * if ((rxr->bytes) && (rxr->packets)) 2625 * newitr = max(newitr, (rxr->bytes / rxr->packets)); 2626 */ 2627 2628 newitr += 24; /* account for hardware frame, crc */ 2629 /* set an upper boundary */ 2630 newitr = min(newitr, 3000); 2631 2632 /* Be nice to the mid range */ 2633 if ((newitr > 300) && (newitr < 1200)) { 2634 newitr = (newitr / 3); 2635 } else { 2636 newitr = (newitr / 2); 2637 } 2638 2639 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 2640 newitr |= newitr << 16; 2641 } else { 2642 newitr |= IXGBE_EITR_CNT_WDIS; 2643 } 2644 2645 /* save for next interrupt */ 2646 que->eitr_setting = newitr; 2647 2648 /* Reset state */ 2649 /* FIXME txr->bytes = 0; */ 2650 /* FIXME txr->packets = 0; */ 2651 rxr->bytes = 0; 2652 rxr->packets = 0; 2653 2654 return; 2655 } 2656 2657 /********************************************************************* 2658 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2659 **********************************************************************/ 2660 static int 2661 ixgbe_msix_que(void *arg) 2662 { 2663 struct ix_rx_queue *que = arg; 2664 struct ixgbe_softc *sc = que->sc; 2665 if_t ifp = iflib_get_ifp(que->sc->ctx); 2666 2667 /* Protect against spurious interrupts */ 2668 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) 2669 return (FILTER_HANDLED); 2670 2671 ixgbe_disable_queue(sc, que->msix); 2672 ++que->irqs; 2673 2674 /* Check for AIM */ 2675 if (sc->enable_aim) { 2676 ixgbe_perform_aim(sc, que); 2677 } 2678 2679 return (FILTER_SCHEDULE_THREAD); 2680 } /* ixgbe_msix_que */ 2681 2682 /************************************************************************ 2683 * ixgbe_media_status - Media Ioctl callback 2684 * 2685 * Called whenever the user queries the status of 2686 * the interface using ifconfig. 2687 ************************************************************************/ 2688 static void 2689 ixgbe_if_media_status(if_ctx_t ctx, struct ifmediareq * ifmr) 2690 { 2691 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2692 struct ixgbe_hw *hw = &sc->hw; 2693 int layer; 2694 2695 INIT_DEBUGOUT("ixgbe_if_media_status: begin"); 2696 2697 ifmr->ifm_status = IFM_AVALID; 2698 ifmr->ifm_active = IFM_ETHER; 2699 2700 if (!sc->link_active) 2701 return; 2702 2703 ifmr->ifm_status |= IFM_ACTIVE; 2704 layer = sc->phy_layer; 2705 2706 if (layer & IXGBE_PHYSICAL_LAYERS_BASE_T_ALL) 2707 switch (sc->link_speed) { 2708 case IXGBE_LINK_SPEED_10GB_FULL: 2709 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2710 break; 2711 case IXGBE_LINK_SPEED_5GB_FULL: 2712 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2713 break; 2714 case IXGBE_LINK_SPEED_2_5GB_FULL: 2715 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2716 break; 2717 case IXGBE_LINK_SPEED_1GB_FULL: 2718 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2719 break; 2720 case IXGBE_LINK_SPEED_100_FULL: 2721 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2722 break; 2723 case IXGBE_LINK_SPEED_10_FULL: 2724 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2725 break; 2726 } 2727 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2728 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2729 switch (sc->link_speed) { 2730 case IXGBE_LINK_SPEED_10GB_FULL: 2731 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2732 break; 2733 case IXGBE_LINK_SPEED_1GB_FULL: 2734 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2735 break; 2736 } 2737 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2738 switch (sc->link_speed) { 2739 case IXGBE_LINK_SPEED_10GB_FULL: 2740 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2741 break; 2742 case IXGBE_LINK_SPEED_1GB_FULL: 2743 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2744 break; 2745 } 2746 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2747 switch (sc->link_speed) { 2748 case IXGBE_LINK_SPEED_10GB_FULL: 2749 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2750 break; 2751 case IXGBE_LINK_SPEED_1GB_FULL: 2752 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2753 break; 2754 } 2755 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2756 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2757 switch (sc->link_speed) { 2758 case IXGBE_LINK_SPEED_10GB_FULL: 2759 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2760 break; 2761 case IXGBE_LINK_SPEED_1GB_FULL: 2762 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 2763 break; 2764 } 2765 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2766 switch (sc->link_speed) { 2767 case IXGBE_LINK_SPEED_10GB_FULL: 2768 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2769 break; 2770 } 2771 /* 2772 * XXX: These need to use the proper media types once 2773 * they're added. 2774 */ 2775 #ifndef IFM_ETH_XTYPE 2776 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2777 switch (sc->link_speed) { 2778 case IXGBE_LINK_SPEED_10GB_FULL: 2779 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2780 break; 2781 case IXGBE_LINK_SPEED_2_5GB_FULL: 2782 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2783 break; 2784 case IXGBE_LINK_SPEED_1GB_FULL: 2785 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2786 break; 2787 } 2788 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2789 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2790 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2791 switch (sc->link_speed) { 2792 case IXGBE_LINK_SPEED_10GB_FULL: 2793 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2794 break; 2795 case IXGBE_LINK_SPEED_2_5GB_FULL: 2796 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2797 break; 2798 case IXGBE_LINK_SPEED_1GB_FULL: 2799 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2800 break; 2801 } 2802 #else 2803 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2804 switch (sc->link_speed) { 2805 case IXGBE_LINK_SPEED_10GB_FULL: 2806 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 2807 break; 2808 case IXGBE_LINK_SPEED_2_5GB_FULL: 2809 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2810 break; 2811 case IXGBE_LINK_SPEED_1GB_FULL: 2812 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2813 break; 2814 } 2815 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2816 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2817 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2818 switch (sc->link_speed) { 2819 case IXGBE_LINK_SPEED_10GB_FULL: 2820 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 2821 break; 2822 case IXGBE_LINK_SPEED_2_5GB_FULL: 2823 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2824 break; 2825 case IXGBE_LINK_SPEED_1GB_FULL: 2826 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2827 break; 2828 } 2829 #endif 2830 2831 /* If nothing is recognized... */ 2832 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 2833 ifmr->ifm_active |= IFM_UNKNOWN; 2834 2835 /* Display current flow control setting used on link */ 2836 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 2837 hw->fc.current_mode == ixgbe_fc_full) 2838 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 2839 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 2840 hw->fc.current_mode == ixgbe_fc_full) 2841 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 2842 } /* ixgbe_media_status */ 2843 2844 /************************************************************************ 2845 * ixgbe_media_change - Media Ioctl callback 2846 * 2847 * Called when the user changes speed/duplex using 2848 * media/mediopt option with ifconfig. 2849 ************************************************************************/ 2850 static int 2851 ixgbe_if_media_change(if_ctx_t ctx) 2852 { 2853 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2854 struct ifmedia *ifm = iflib_get_media(ctx); 2855 struct ixgbe_hw *hw = &sc->hw; 2856 ixgbe_link_speed speed = 0; 2857 2858 INIT_DEBUGOUT("ixgbe_if_media_change: begin"); 2859 2860 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 2861 return (EINVAL); 2862 2863 if (hw->phy.media_type == ixgbe_media_type_backplane) 2864 return (EPERM); 2865 2866 /* 2867 * We don't actually need to check against the supported 2868 * media types of the adapter; ifmedia will take care of 2869 * that for us. 2870 */ 2871 switch (IFM_SUBTYPE(ifm->ifm_media)) { 2872 case IFM_AUTO: 2873 case IFM_10G_T: 2874 speed |= IXGBE_LINK_SPEED_100_FULL; 2875 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2876 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2877 break; 2878 case IFM_10G_LRM: 2879 case IFM_10G_LR: 2880 #ifndef IFM_ETH_XTYPE 2881 case IFM_10G_SR: /* KR, too */ 2882 case IFM_10G_CX4: /* KX4 */ 2883 #else 2884 case IFM_10G_KR: 2885 case IFM_10G_KX4: 2886 #endif 2887 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2888 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2889 break; 2890 #ifndef IFM_ETH_XTYPE 2891 case IFM_1000_CX: /* KX */ 2892 #else 2893 case IFM_1000_KX: 2894 #endif 2895 case IFM_1000_LX: 2896 case IFM_1000_SX: 2897 case IFM_1000_BX: 2898 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2899 break; 2900 case IFM_1000_T: 2901 speed |= IXGBE_LINK_SPEED_100_FULL; 2902 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2903 break; 2904 case IFM_10G_TWINAX: 2905 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2906 break; 2907 case IFM_5000_T: 2908 speed |= IXGBE_LINK_SPEED_5GB_FULL; 2909 break; 2910 case IFM_2500_T: 2911 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 2912 break; 2913 case IFM_100_TX: 2914 speed |= IXGBE_LINK_SPEED_100_FULL; 2915 break; 2916 case IFM_10_T: 2917 speed |= IXGBE_LINK_SPEED_10_FULL; 2918 break; 2919 default: 2920 goto invalid; 2921 } 2922 2923 hw->mac.autotry_restart = true; 2924 hw->mac.ops.setup_link(hw, speed, true); 2925 sc->advertise = 2926 ((speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 2927 ((speed & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 2928 ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 2929 ((speed & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 2930 ((speed & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 2931 ((speed & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 2932 2933 return (0); 2934 2935 invalid: 2936 device_printf(iflib_get_dev(ctx), "Invalid media type!\n"); 2937 2938 return (EINVAL); 2939 } /* ixgbe_if_media_change */ 2940 2941 /************************************************************************ 2942 * ixgbe_set_promisc 2943 ************************************************************************/ 2944 static int 2945 ixgbe_if_promisc_set(if_ctx_t ctx, int flags) 2946 { 2947 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2948 if_t ifp = iflib_get_ifp(ctx); 2949 u32 rctl; 2950 int mcnt = 0; 2951 2952 rctl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 2953 rctl &= (~IXGBE_FCTRL_UPE); 2954 if (if_getflags(ifp) & IFF_ALLMULTI) 2955 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 2956 else { 2957 mcnt = min(if_llmaddr_count(ifp), 2958 MAX_NUM_MULTICAST_ADDRESSES); 2959 } 2960 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 2961 rctl &= (~IXGBE_FCTRL_MPE); 2962 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2963 2964 if (if_getflags(ifp) & IFF_PROMISC) { 2965 rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2966 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2967 } else if (if_getflags(ifp) & IFF_ALLMULTI) { 2968 rctl |= IXGBE_FCTRL_MPE; 2969 rctl &= ~IXGBE_FCTRL_UPE; 2970 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2971 } 2972 return (0); 2973 } /* ixgbe_if_promisc_set */ 2974 2975 /************************************************************************ 2976 * ixgbe_msix_link - Link status change ISR (MSI/MSI-X) 2977 ************************************************************************/ 2978 static int 2979 ixgbe_msix_link(void *arg) 2980 { 2981 struct ixgbe_softc *sc = arg; 2982 struct ixgbe_hw *hw = &sc->hw; 2983 u32 eicr, eicr_mask; 2984 s32 retval; 2985 2986 ++sc->link_irq; 2987 2988 /* Pause other interrupts */ 2989 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 2990 2991 /* First get the cause */ 2992 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 2993 /* Be sure the queue bits are not cleared */ 2994 eicr &= ~IXGBE_EICR_RTX_QUEUE; 2995 /* Clear interrupt with write */ 2996 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 2997 2998 /* Link status change */ 2999 if (eicr & IXGBE_EICR_LSC) { 3000 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 3001 sc->task_requests |= IXGBE_REQUEST_TASK_LSC; 3002 } 3003 3004 if (eicr & IXGBE_EICR_FW_EVENT) { 3005 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FW_EVENT); 3006 sc->task_requests |= IXGBE_REQUEST_TASK_FWEVENT; 3007 } 3008 3009 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3010 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3011 (eicr & IXGBE_EICR_FLOW_DIR)) { 3012 /* This is probably overkill :) */ 3013 if (!atomic_cmpset_int(&sc->fdir_reinit, 0, 1)) 3014 return (FILTER_HANDLED); 3015 /* Disable the interrupt */ 3016 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR); 3017 sc->task_requests |= IXGBE_REQUEST_TASK_FDIR; 3018 } else 3019 if (eicr & IXGBE_EICR_ECC) { 3020 device_printf(iflib_get_dev(sc->ctx), 3021 "Received ECC Err, initiating reset\n"); 3022 hw->mac.flags |= 3023 ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; 3024 ixgbe_reset_hw(hw); 3025 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3026 IXGBE_EICR_ECC); 3027 } 3028 3029 /* Check for over temp condition */ 3030 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3031 switch (sc->hw.mac.type) { 3032 case ixgbe_mac_X550EM_a: 3033 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3034 break; 3035 IXGBE_WRITE_REG(hw, IXGBE_EIMC, 3036 IXGBE_EICR_GPI_SDP0_X550EM_a); 3037 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3038 IXGBE_EICR_GPI_SDP0_X550EM_a); 3039 retval = hw->phy.ops.check_overtemp(hw); 3040 if (retval != IXGBE_ERR_OVERTEMP) 3041 break; 3042 device_printf(iflib_get_dev(sc->ctx), 3043 "\nCRITICAL: OVER TEMP!!" 3044 " PHY IS SHUT DOWN!!\n"); 3045 device_printf(iflib_get_dev(sc->ctx), 3046 "System shutdown required!\n"); 3047 break; 3048 default: 3049 if (!(eicr & IXGBE_EICR_TS)) 3050 break; 3051 retval = hw->phy.ops.check_overtemp(hw); 3052 if (retval != IXGBE_ERR_OVERTEMP) 3053 break; 3054 device_printf(iflib_get_dev(sc->ctx), 3055 "\nCRITICAL: OVER TEMP!!" 3056 " PHY IS SHUT DOWN!!\n"); 3057 device_printf(iflib_get_dev(sc->ctx), 3058 "System shutdown required!\n"); 3059 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3060 IXGBE_EICR_TS); 3061 break; 3062 } 3063 } 3064 3065 /* Check for VF message */ 3066 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3067 (eicr & IXGBE_EICR_MAILBOX)) { 3068 sc->task_requests |= IXGBE_REQUEST_TASK_MBX; 3069 } 3070 } 3071 3072 /* 3073 * On E610, the firmware handles PHY configuration, so 3074 * there is no need to perform any SFP-specific tasks. 3075 */ 3076 if (hw->mac.type != ixgbe_mac_E610 && ixgbe_is_sfp(hw)) { 3077 /* Pluggable optics-related interrupt */ 3078 if (hw->mac.type >= ixgbe_mac_X540) 3079 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3080 else 3081 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3082 3083 if (eicr & eicr_mask) { 3084 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 3085 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 3086 } 3087 3088 if ((hw->mac.type == ixgbe_mac_82599EB) && 3089 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3090 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3091 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3092 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 3093 } 3094 } 3095 3096 /* Check for fan failure */ 3097 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 3098 ixgbe_check_fan_failure(sc, eicr, true); 3099 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3100 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3101 } 3102 3103 /* External PHY interrupt */ 3104 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3105 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3106 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 3107 sc->task_requests |= IXGBE_REQUEST_TASK_PHY; 3108 } 3109 3110 return (sc->task_requests != 0) ? 3111 FILTER_SCHEDULE_THREAD : FILTER_HANDLED; 3112 } /* ixgbe_msix_link */ 3113 3114 /************************************************************************ 3115 * ixgbe_sysctl_interrupt_rate_handler 3116 ************************************************************************/ 3117 static int 3118 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 3119 { 3120 struct ix_rx_queue *que = ((struct ix_rx_queue *)oidp->oid_arg1); 3121 int error; 3122 unsigned int reg, usec, rate; 3123 3124 if (atomic_load_acq_int(&que->sc->recovery_mode)) 3125 return (EPERM); 3126 3127 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix)); 3128 usec = ((reg & 0x0FF8) >> 3); 3129 if (usec > 0) 3130 rate = 500000 / usec; 3131 else 3132 rate = 0; 3133 error = sysctl_handle_int(oidp, &rate, 0, req); 3134 if (error || !req->newptr) 3135 return error; 3136 reg &= ~0xfff; /* default, no limitation */ 3137 ixgbe_max_interrupt_rate = 0; 3138 if (rate > 0 && rate < 500000) { 3139 if (rate < 1000) 3140 rate = 1000; 3141 ixgbe_max_interrupt_rate = rate; 3142 reg |= ((4000000/rate) & 0xff8); 3143 } 3144 IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg); 3145 3146 return (0); 3147 } /* ixgbe_sysctl_interrupt_rate_handler */ 3148 3149 /************************************************************************ 3150 * ixgbe_debug_dump_print_cluster 3151 ************************************************************************/ 3152 static u8 3153 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, struct sbuf *sbuf, 3154 u8 cluster_id) 3155 { 3156 u16 data_buf_size = IXGBE_ACI_MAX_BUFFER_SIZE; 3157 device_t dev = sc->dev; 3158 struct ixgbe_hw *hw = &sc->hw; 3159 const u8 reserved_buf[8] = {}; 3160 int max_aci_calls = 1000; 3161 int error, counter = 0; 3162 u8 *data_buf; 3163 3164 /* Input parameters / loop variables */ 3165 u16 table_id = 0; 3166 u32 offset = 0; 3167 3168 /* Data returned from ACI command */ 3169 u16 ret_buf_size = 0; 3170 u16 ret_next_cluster = 0; 3171 u16 ret_next_table = 0; 3172 u32 ret_next_index = 0; 3173 3174 data_buf = (u8 *)malloc(data_buf_size, M_IXGBE, M_NOWAIT | M_ZERO); 3175 if (!data_buf) 3176 return (0); 3177 3178 DEBUGOUT2("%s: dumping cluster id (relative) %d\n", 3179 __func__, cluster_id); 3180 3181 do { 3182 DEBUGOUT3("table_id 0x%04x offset 0x%08x buf_size %d\n", 3183 table_id, offset, data_buf_size); 3184 3185 error = ixgbe_aci_get_internal_data(hw, cluster_id, table_id, 3186 offset, data_buf, data_buf_size, &ret_buf_size, 3187 &ret_next_cluster, &ret_next_table, &ret_next_index); 3188 if (error) { 3189 device_printf(dev, 3190 "%s: Failed to get internal FW/HW data, error: %d, " 3191 "last aci status: %d\n", 3192 __func__, error, hw->aci.last_status); 3193 break; 3194 } 3195 3196 DEBUGOUT3("ret_table_id 0x%04x ret_offset 0x%08x " 3197 "ret_buf_size %d\n", 3198 ret_next_table, ret_next_index, ret_buf_size); 3199 3200 /* Print cluster id */ 3201 u32 print_cluster_id = (u32)cluster_id; 3202 sbuf_bcat(sbuf, &print_cluster_id, sizeof(print_cluster_id)); 3203 /* Print table id */ 3204 u32 print_table_id = (u32)table_id; 3205 sbuf_bcat(sbuf, &print_table_id, sizeof(print_table_id)); 3206 /* Print table length */ 3207 u32 print_table_length = (u32)ret_buf_size; 3208 sbuf_bcat(sbuf, &print_table_length, 3209 sizeof(print_table_length)); 3210 /* Print current offset */ 3211 u32 print_curr_offset = offset; 3212 sbuf_bcat(sbuf, &print_curr_offset, sizeof(print_curr_offset)); 3213 /* Print reserved bytes */ 3214 sbuf_bcat(sbuf, reserved_buf, sizeof(reserved_buf)); 3215 /* Print data */ 3216 sbuf_bcat(sbuf, data_buf, ret_buf_size); 3217 3218 /* Prepare for the next loop spin */ 3219 memset(data_buf, 0, data_buf_size); 3220 3221 bool last_index = (ret_next_index == 0xffffffff); 3222 bool last_table = ((ret_next_table == 0xff || 3223 ret_next_table == 0xffff) && 3224 last_index); 3225 3226 if (last_table) { 3227 /* End of the cluster */ 3228 DEBUGOUT1("End of the cluster ID %d\n", cluster_id); 3229 break; 3230 } else if (last_index) { 3231 /* End of the table */ 3232 table_id = ret_next_table; 3233 offset = 0; 3234 } else { 3235 /* More data left in the table */ 3236 offset = ret_next_index; 3237 } 3238 } while (++counter < max_aci_calls); 3239 3240 if (counter >= max_aci_calls) 3241 device_printf(dev, "Exceeded nr of ACI calls for cluster %d\n", 3242 cluster_id); 3243 3244 free(data_buf, M_IXGBE); 3245 3246 return (++cluster_id); 3247 } /* ixgbe_print_debug_dump_cluster */ 3248 3249 /************************************************************************ 3250 * ixgbe_sysctl_debug_dump_set_clusters 3251 * 3252 * Sets the cluster to dump from FW when Debug Dump requested. 3253 ************************************************************************/ 3254 static int 3255 ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS) 3256 { 3257 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3258 u32 clusters = sc->debug_dump_cluster_mask; 3259 device_t dev = sc->dev; 3260 int error; 3261 3262 error = sysctl_handle_32(oidp, &clusters, 0, req); 3263 if ((error) || !req->newptr) 3264 return (error); 3265 3266 if (clusters & ~(IXGBE_DBG_DUMP_VALID_CLUSTERS_MASK)) { 3267 device_printf(dev, 3268 "%s: Unrecognized parameter: %u\n", 3269 __func__, clusters); 3270 sc->debug_dump_cluster_mask = 3271 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID; 3272 return (EINVAL); 3273 } 3274 3275 sc->debug_dump_cluster_mask = clusters; 3276 3277 return (0); 3278 } /* ixgbe_sysctl_debug_dump_set_clusters */ 3279 3280 /************************************************************************ 3281 * ixgbe_sysctl_dump_debug_dump 3282 ************************************************************************/ 3283 static int 3284 ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS) 3285 { 3286 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3287 device_t dev = sc->dev; 3288 struct sbuf *sbuf; 3289 int error = 0; 3290 3291 UNREFERENCED_PARAMETER(arg2); 3292 3293 if (!sc->do_debug_dump) { 3294 if (req->oldptr == NULL && req->newptr == NULL) { 3295 error = SYSCTL_OUT(req, 0, 0); 3296 return (error); 3297 } 3298 3299 char input_buf[2] = ""; 3300 error = sysctl_handle_string(oidp, input_buf, 3301 sizeof(input_buf), req); 3302 if ((error) || (req->newptr == NULL)) 3303 return (error); 3304 3305 if (input_buf[0] == '1') { 3306 if (sc->debug_dump_cluster_mask == 3307 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID) { 3308 device_printf(dev, 3309 "Debug Dump failed because an invalid " 3310 "cluster was specified.\n"); 3311 return (EINVAL); 3312 } 3313 3314 sc->do_debug_dump = true; 3315 return (0); 3316 } 3317 3318 return (EINVAL); 3319 } 3320 3321 /* Caller just wants the upper bound for size */ 3322 if (req->oldptr == NULL && req->newptr == NULL) { 3323 size_t est_output_len = IXGBE_DBG_DUMP_BASE_SIZE; 3324 if (sc->debug_dump_cluster_mask & 0x2) 3325 est_output_len += IXGBE_DBG_DUMP_BASE_SIZE; 3326 error = SYSCTL_OUT(req, 0, est_output_len); 3327 return (error); 3328 } 3329 3330 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 3331 sbuf_clear_flags(sbuf, SBUF_INCLUDENUL); 3332 3333 DEBUGOUT("FW Debug Dump running...\n"); 3334 3335 if (sc->debug_dump_cluster_mask) { 3336 for (u8 id = 0; id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX; id++) { 3337 if (sc->debug_dump_cluster_mask & BIT(id)) { 3338 DEBUGOUT1("Dumping cluster ID %u...\n", id); 3339 ixgbe_debug_dump_print_cluster(sc, sbuf, id); 3340 } 3341 } 3342 } else { 3343 u8 next_cluster_id = 0; 3344 do { 3345 DEBUGOUT1("Dumping cluster ID %u...\n", 3346 next_cluster_id); 3347 next_cluster_id = ixgbe_debug_dump_print_cluster(sc, 3348 sbuf, next_cluster_id); 3349 } while (next_cluster_id != 0 && 3350 next_cluster_id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX); 3351 } 3352 3353 sbuf_finish(sbuf); 3354 sbuf_delete(sbuf); 3355 3356 sc->do_debug_dump = false; 3357 3358 return (error); 3359 } /* ixgbe_sysctl_dump_debug_dump */ 3360 3361 /************************************************************************ 3362 * ixgbe_add_debug_dump_sysctls 3363 ************************************************************************/ 3364 static void 3365 ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc) 3366 { 3367 struct sysctl_oid_list *debug_list, *dump_list; 3368 struct sysctl_oid *dump_node; 3369 struct sysctl_ctx_list *ctx; 3370 device_t dev = sc->dev; 3371 3372 ctx = device_get_sysctl_ctx(dev); 3373 debug_list = SYSCTL_CHILDREN(sc->debug_sysctls); 3374 3375 dump_node = SYSCTL_ADD_NODE(ctx, debug_list, OID_AUTO, "dump", 3376 CTLFLAG_RD, NULL, "Internal FW/HW Dump"); 3377 dump_list = SYSCTL_CHILDREN(dump_node); 3378 3379 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "clusters", 3380 CTLTYPE_U32 | CTLFLAG_RW, sc, 0, 3381 ixgbe_sysctl_debug_dump_set_clusters, "SU", 3382 IXGBE_SYSCTL_DESC_DEBUG_DUMP_SET_CLUSTER); 3383 3384 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "dump", 3385 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, 3386 ixgbe_sysctl_dump_debug_dump, "", 3387 IXGBE_SYSCTL_DESC_DUMP_DEBUG_DUMP); 3388 } /* ixgbe_add_debug_dump_sysctls */ 3389 3390 static void 3391 ixgbe_add_debug_sysctls(struct ixgbe_softc *sc) 3392 { 3393 struct sysctl_oid_list *ctx_list; 3394 struct sysctl_ctx_list *ctx; 3395 device_t dev = sc->dev; 3396 3397 ctx = device_get_sysctl_ctx(dev); 3398 ctx_list = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3399 3400 sc->debug_sysctls = SYSCTL_ADD_NODE(ctx, ctx_list, OID_AUTO, "debug", 3401 CTLFLAG_RD, NULL, "Debug Sysctls"); 3402 3403 if (sc->feat_en & IXGBE_FEATURE_DBG_DUMP) 3404 ixgbe_add_debug_dump_sysctls(sc); 3405 3406 if (sc->feat_en & IXGBE_FEATURE_FW_LOGGING) 3407 ixgbe_add_fw_logging_tunables(sc, sc->debug_sysctls); 3408 } /* ixgbe_add_debug_sysctls */ 3409 3410 /************************************************************************ 3411 * ixgbe_add_device_sysctls 3412 ************************************************************************/ 3413 static void 3414 ixgbe_add_device_sysctls(if_ctx_t ctx) 3415 { 3416 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3417 device_t dev = iflib_get_dev(ctx); 3418 struct ixgbe_hw *hw = &sc->hw; 3419 struct sysctl_oid_list *child; 3420 struct sysctl_ctx_list *ctx_list; 3421 3422 ctx_list = device_get_sysctl_ctx(dev); 3423 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3424 3425 /* Sysctls for all devices */ 3426 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc", 3427 CTLTYPE_INT | CTLFLAG_RW, 3428 sc, 0, ixgbe_sysctl_flowcntl, "I", 3429 IXGBE_SYSCTL_DESC_SET_FC); 3430 3431 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "advertise_speed", 3432 CTLTYPE_INT | CTLFLAG_RW, 3433 sc, 0, ixgbe_sysctl_advertise, "I", 3434 IXGBE_SYSCTL_DESC_ADV_SPEED); 3435 3436 sc->enable_aim = ixgbe_enable_aim; 3437 SYSCTL_ADD_INT(ctx_list, child, OID_AUTO, "enable_aim", CTLFLAG_RW, 3438 &sc->enable_aim, 0, "Interrupt Moderation"); 3439 3440 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version", 3441 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3442 ixgbe_sysctl_print_fw_version, "A", "Prints FW/NVM Versions"); 3443 3444 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3445 "tso_tcp_flags_mask_first_segment", 3446 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3447 sc, 0, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3448 "TSO TCP flags mask for first segment"); 3449 3450 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3451 "tso_tcp_flags_mask_middle_segment", 3452 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3453 sc, 1, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3454 "TSO TCP flags mask for middle segment"); 3455 3456 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3457 "tso_tcp_flags_mask_last_segment", 3458 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3459 sc, 2, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3460 "TSO TCP flags mask for last segment"); 3461 3462 #ifdef IXGBE_DEBUG 3463 /* testing sysctls (for all devices) */ 3464 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "power_state", 3465 CTLTYPE_INT | CTLFLAG_RW, 3466 sc, 0, ixgbe_sysctl_power_state, 3467 "I", "PCI Power State"); 3468 3469 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "print_rss_config", 3470 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3471 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 3472 #endif 3473 /* for X550 series devices */ 3474 if (hw->mac.type >= ixgbe_mac_X550) 3475 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "dmac", 3476 CTLTYPE_U16 | CTLFLAG_RW, 3477 sc, 0, ixgbe_sysctl_dmac, 3478 "I", "DMA Coalesce"); 3479 3480 /* for WoL-capable devices */ 3481 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 3482 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wol_enable", 3483 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 3484 ixgbe_sysctl_wol_enable, "I", 3485 "Enable/Disable Wake on LAN"); 3486 3487 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wufc", 3488 CTLTYPE_U32 | CTLFLAG_RW, 3489 sc, 0, ixgbe_sysctl_wufc, 3490 "I", "Enable/Disable Wake Up Filters"); 3491 } 3492 3493 /* for X552/X557-AT devices */ 3494 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 3495 struct sysctl_oid *phy_node; 3496 struct sysctl_oid_list *phy_list; 3497 3498 phy_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "phy", 3499 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 3500 "External PHY sysctls"); 3501 phy_list = SYSCTL_CHILDREN(phy_node); 3502 3503 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, "temp", 3504 CTLTYPE_U16 | CTLFLAG_RD, 3505 sc, 0, ixgbe_sysctl_phy_temp, 3506 "I", "Current External PHY Temperature (Celsius)"); 3507 3508 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, 3509 "overtemp_occurred", 3510 CTLTYPE_U16 | CTLFLAG_RD, sc, 0, 3511 ixgbe_sysctl_phy_overtemp_occurred, "I", 3512 "External PHY High Temperature Event Occurred"); 3513 } 3514 3515 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3516 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_state", 3517 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 3518 ixgbe_sysctl_eee_state, "I", "EEE Power Save State"); 3519 } 3520 3521 ixgbe_add_debug_sysctls(sc); 3522 } /* ixgbe_add_device_sysctls */ 3523 3524 /************************************************************************ 3525 * ixgbe_allocate_pci_resources 3526 ************************************************************************/ 3527 static int 3528 ixgbe_allocate_pci_resources(if_ctx_t ctx) 3529 { 3530 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3531 device_t dev = iflib_get_dev(ctx); 3532 int rid; 3533 3534 rid = PCIR_BAR(0); 3535 sc->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 3536 RF_ACTIVE); 3537 3538 if (!(sc->pci_mem)) { 3539 device_printf(dev, 3540 "Unable to allocate bus resource: memory\n"); 3541 return (ENXIO); 3542 } 3543 3544 /* Save bus_space values for READ/WRITE_REG macros */ 3545 sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->pci_mem); 3546 sc->osdep.mem_bus_space_handle = 3547 rman_get_bushandle(sc->pci_mem); 3548 /* Set hw values for shared code */ 3549 sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle; 3550 3551 return (0); 3552 } /* ixgbe_allocate_pci_resources */ 3553 3554 /************************************************************************ 3555 * ixgbe_detach - Device removal routine 3556 * 3557 * Called when the driver is being removed. 3558 * Stops the adapter and deallocates all the resources 3559 * that were allocated for driver operation. 3560 * 3561 * return 0 on success, positive on failure 3562 ************************************************************************/ 3563 static int 3564 ixgbe_if_detach(if_ctx_t ctx) 3565 { 3566 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3567 device_t dev = iflib_get_dev(ctx); 3568 u32 ctrl_ext; 3569 3570 INIT_DEBUGOUT("ixgbe_detach: begin"); 3571 3572 if (ixgbe_pci_iov_detach(dev) != 0) { 3573 device_printf(dev, "SR-IOV in use; detach first.\n"); 3574 return (EBUSY); 3575 } 3576 3577 ixgbe_setup_low_power_mode(ctx); 3578 3579 /* let hardware know driver is unloading */ 3580 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3581 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3582 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3583 3584 callout_drain(&sc->fw_mode_timer); 3585 3586 if (sc->hw.mac.type == ixgbe_mac_E610) { 3587 ixgbe_disable_lse(sc); 3588 ixgbe_shutdown_aci(&sc->hw); 3589 } 3590 3591 ixgbe_free_pci_resources(ctx); 3592 3593 free(sc->mta, M_IXGBE); 3594 3595 return (0); 3596 } /* ixgbe_if_detach */ 3597 3598 /************************************************************************ 3599 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3600 * 3601 * Prepare the adapter/port for LPLU and/or WoL 3602 ************************************************************************/ 3603 static int 3604 ixgbe_setup_low_power_mode(if_ctx_t ctx) 3605 { 3606 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3607 struct ixgbe_hw *hw = &sc->hw; 3608 device_t dev = iflib_get_dev(ctx); 3609 s32 error = 0; 3610 3611 if (!hw->wol_enabled) 3612 ixgbe_set_phy_power(hw, false); 3613 3614 /* Limit power management flow to X550EM baseT */ 3615 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3616 hw->phy.ops.enter_lplu) { 3617 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3618 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3619 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3620 3621 /* 3622 * Clear Wake Up Status register to prevent any previous 3623 * wakeup events from waking us up immediately after we 3624 * suspend. 3625 */ 3626 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3627 3628 /* 3629 * Program the Wakeup Filter Control register with user filter 3630 * settings 3631 */ 3632 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3633 3634 /* Enable wakeups and power management in Wakeup Control */ 3635 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3636 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3637 3638 /* X550EM baseT adapters need a special LPLU flow */ 3639 hw->phy.reset_disable = true; 3640 ixgbe_if_stop(ctx); 3641 error = hw->phy.ops.enter_lplu(hw); 3642 if (error) 3643 device_printf(dev, "Error entering LPLU: %d\n", 3644 error); 3645 hw->phy.reset_disable = false; 3646 } else { 3647 /* Just stop for other adapters */ 3648 ixgbe_if_stop(ctx); 3649 } 3650 3651 return error; 3652 } /* ixgbe_setup_low_power_mode */ 3653 3654 /************************************************************************ 3655 * ixgbe_shutdown - Shutdown entry point 3656 ************************************************************************/ 3657 static int 3658 ixgbe_if_shutdown(if_ctx_t ctx) 3659 { 3660 int error = 0; 3661 3662 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3663 3664 error = ixgbe_setup_low_power_mode(ctx); 3665 3666 return (error); 3667 } /* ixgbe_if_shutdown */ 3668 3669 /************************************************************************ 3670 * ixgbe_suspend 3671 * 3672 * From D0 to D3 3673 ************************************************************************/ 3674 static int 3675 ixgbe_if_suspend(if_ctx_t ctx) 3676 { 3677 int error = 0; 3678 3679 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3680 3681 error = ixgbe_setup_low_power_mode(ctx); 3682 3683 return (error); 3684 } /* ixgbe_if_suspend */ 3685 3686 /************************************************************************ 3687 * ixgbe_resume 3688 * 3689 * From D3 to D0 3690 ************************************************************************/ 3691 static int 3692 ixgbe_if_resume(if_ctx_t ctx) 3693 { 3694 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3695 device_t dev = iflib_get_dev(ctx); 3696 if_t ifp = iflib_get_ifp(ctx); 3697 struct ixgbe_hw *hw = &sc->hw; 3698 u32 wus; 3699 3700 INIT_DEBUGOUT("ixgbe_resume: begin"); 3701 3702 /* Read & clear WUS register */ 3703 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 3704 if (wus) 3705 device_printf(dev, "Woken up by (WUS): %#010x\n", 3706 IXGBE_READ_REG(hw, IXGBE_WUS)); 3707 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3708 /* And clear WUFC until next low-power transition */ 3709 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3710 3711 /* 3712 * Required after D3->D0 transition; 3713 * will re-advertise all previous advertised speeds 3714 */ 3715 if (if_getflags(ifp) & IFF_UP) 3716 ixgbe_if_init(ctx); 3717 3718 return (0); 3719 } /* ixgbe_if_resume */ 3720 3721 /************************************************************************ 3722 * ixgbe_if_mtu_set - Ioctl mtu entry point 3723 * 3724 * Return 0 on success, EINVAL on failure 3725 ************************************************************************/ 3726 static int 3727 ixgbe_if_mtu_set(if_ctx_t ctx, uint32_t mtu) 3728 { 3729 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3730 int error = 0; 3731 3732 IOCTL_DEBUGOUT("ioctl: SIOCIFMTU (Set Interface MTU)"); 3733 3734 if (mtu > IXGBE_MAX_MTU) { 3735 error = EINVAL; 3736 } else { 3737 sc->max_frame_size = mtu + IXGBE_MTU_HDR; 3738 } 3739 3740 return error; 3741 } /* ixgbe_if_mtu_set */ 3742 3743 /************************************************************************ 3744 * ixgbe_if_crcstrip_set 3745 ************************************************************************/ 3746 static void 3747 ixgbe_if_crcstrip_set(if_ctx_t ctx, int onoff, int crcstrip) 3748 { 3749 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3750 struct ixgbe_hw *hw = &sc->hw; 3751 /* crc stripping is set in two places: 3752 * IXGBE_HLREG0 (modified on init_locked and hw reset) 3753 * IXGBE_RDRXCTL (set by the original driver in 3754 * ixgbe_setup_hw_rsc() called in init_locked. 3755 * We disable the setting when netmap is compiled in). 3756 * We update the values here, but also in ixgbe.c because 3757 * init_locked sometimes is called outside our control. 3758 */ 3759 uint32_t hl, rxc; 3760 3761 hl = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3762 rxc = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 3763 #ifdef NETMAP 3764 if (netmap_verbose) 3765 D("%s read HLREG 0x%x rxc 0x%x", 3766 onoff ? "enter" : "exit", hl, rxc); 3767 #endif 3768 /* hw requirements ... */ 3769 rxc &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; 3770 rxc |= IXGBE_RDRXCTL_RSCACKC; 3771 if (onoff && !crcstrip) { 3772 /* keep the crc. Fast rx */ 3773 hl &= ~IXGBE_HLREG0_RXCRCSTRP; 3774 rxc &= ~IXGBE_RDRXCTL_CRCSTRIP; 3775 } else { 3776 /* reset default mode */ 3777 hl |= IXGBE_HLREG0_RXCRCSTRP; 3778 rxc |= IXGBE_RDRXCTL_CRCSTRIP; 3779 } 3780 #ifdef NETMAP 3781 if (netmap_verbose) 3782 D("%s write HLREG 0x%x rxc 0x%x", 3783 onoff ? "enter" : "exit", hl, rxc); 3784 #endif 3785 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl); 3786 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc); 3787 } /* ixgbe_if_crcstrip_set */ 3788 3789 /********************************************************************* 3790 * ixgbe_if_init - Init entry point 3791 * 3792 * Used in two ways: It is used by the stack as an init 3793 * entry point in network interface structure. It is also 3794 * used by the driver as a hw/sw initialization routine to 3795 * get to a consistent state. 3796 * 3797 * Return 0 on success, positive on failure 3798 **********************************************************************/ 3799 void 3800 ixgbe_if_init(if_ctx_t ctx) 3801 { 3802 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3803 if_t ifp = iflib_get_ifp(ctx); 3804 device_t dev = iflib_get_dev(ctx); 3805 struct ixgbe_hw *hw = &sc->hw; 3806 struct ix_rx_queue *rx_que; 3807 struct ix_tx_queue *tx_que; 3808 u32 txdctl, mhadd; 3809 u32 rxdctl, rxctrl; 3810 u32 ctrl_ext; 3811 3812 int i, j, err; 3813 3814 INIT_DEBUGOUT("ixgbe_if_init: begin"); 3815 3816 /* Queue indices may change with IOV mode */ 3817 ixgbe_align_all_queue_indices(sc); 3818 3819 /* reprogram the RAR[0] in case user changed it. */ 3820 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 3821 3822 /* Get the latest mac address, User can use a LAA */ 3823 bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 3824 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 3825 hw->addr_ctrl.rar_used_count = 1; 3826 3827 ixgbe_init_hw(hw); 3828 3829 ixgbe_initialize_iov(sc); 3830 3831 ixgbe_initialize_transmit_units(ctx); 3832 3833 /* Setup Multicast table */ 3834 ixgbe_if_multi_set(ctx); 3835 3836 /* Determine the correct mbuf pool, based on frame size */ 3837 sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); 3838 3839 /* Configure RX settings */ 3840 ixgbe_initialize_receive_units(ctx); 3841 3842 /* 3843 * Initialize variable holding task enqueue requests 3844 * from MSI-X interrupts 3845 */ 3846 sc->task_requests = 0; 3847 3848 /* Enable SDP & MSI-X interrupts based on adapter */ 3849 ixgbe_config_gpie(sc); 3850 3851 /* Set MTU size */ 3852 if (if_getmtu(ifp) > ETHERMTU) { 3853 /* aka IXGBE_MAXFRS on 82599 and newer */ 3854 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 3855 mhadd &= ~IXGBE_MHADD_MFS_MASK; 3856 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 3857 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 3858 } 3859 3860 /* Now enable all the queues */ 3861 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 3862 i++, tx_que++) { 3863 struct tx_ring *txr = &tx_que->txr; 3864 3865 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 3866 txdctl |= IXGBE_TXDCTL_ENABLE; 3867 /* Set WTHRESH to 8, burst writeback */ 3868 txdctl |= (8 << 16); 3869 /* 3870 * When the internal queue falls below PTHRESH (32), 3871 * start prefetching as long as there are at least 3872 * HTHRESH (1) buffers ready. The values are taken 3873 * from the Intel linux driver 3.8.21. 3874 * Prefetching enables tx line rate even with 1 queue. 3875 */ 3876 txdctl |= (32 << 0) | (1 << 8); 3877 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 3878 } 3879 3880 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 3881 i++, rx_que++) { 3882 struct rx_ring *rxr = &rx_que->rxr; 3883 3884 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 3885 if (hw->mac.type == ixgbe_mac_82598EB) { 3886 /* 3887 * PTHRESH = 21 3888 * HTHRESH = 4 3889 * WTHRESH = 8 3890 */ 3891 rxdctl &= ~0x3FFFFF; 3892 rxdctl |= 0x080420; 3893 } 3894 rxdctl |= IXGBE_RXDCTL_ENABLE; 3895 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 3896 for (j = 0; j < 10; j++) { 3897 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 3898 IXGBE_RXDCTL_ENABLE) 3899 break; 3900 else 3901 msec_delay(1); 3902 } 3903 wmb(); 3904 } 3905 3906 /* Enable Receive engine */ 3907 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 3908 if (hw->mac.type == ixgbe_mac_82598EB) 3909 rxctrl |= IXGBE_RXCTRL_DMBYPS; 3910 rxctrl |= IXGBE_RXCTRL_RXEN; 3911 ixgbe_enable_rx_dma(hw, rxctrl); 3912 3913 /* Set up MSI/MSI-X routing */ 3914 if (ixgbe_enable_msix) { 3915 ixgbe_configure_ivars(sc); 3916 /* Set up auto-mask */ 3917 if (hw->mac.type == ixgbe_mac_82598EB) 3918 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 3919 else { 3920 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 3921 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 3922 } 3923 } else { /* Simple settings for Legacy/MSI */ 3924 ixgbe_set_ivar(sc, 0, 0, 0); 3925 ixgbe_set_ivar(sc, 0, 0, 1); 3926 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 3927 } 3928 3929 ixgbe_init_fdir(sc); 3930 3931 /* 3932 * Check on any SFP devices that 3933 * need to be kick-started 3934 */ 3935 if (hw->phy.type == ixgbe_phy_none) { 3936 err = hw->phy.ops.identify(hw); 3937 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3938 device_printf(dev, 3939 "Unsupported SFP+ module type was detected.\n"); 3940 return; 3941 } 3942 } 3943 3944 /* Set moderation on the Link interrupt */ 3945 IXGBE_WRITE_REG(hw, IXGBE_EITR(sc->vector), IXGBE_LINK_ITR); 3946 3947 /* Enable power to the phy. */ 3948 ixgbe_set_phy_power(hw, true); 3949 3950 /* Config/Enable Link */ 3951 ixgbe_config_link(ctx); 3952 3953 /* Hardware Packet Buffer & Flow Control setup */ 3954 ixgbe_config_delay_values(sc); 3955 3956 /* Initialize the FC settings */ 3957 ixgbe_start_hw(hw); 3958 3959 /* Set up VLAN support and filter */ 3960 ixgbe_setup_vlan_hw_support(ctx); 3961 3962 /* Setup DMA Coalescing */ 3963 ixgbe_config_dmac(sc); 3964 3965 /* And now turn on interrupts */ 3966 ixgbe_if_enable_intr(ctx); 3967 3968 /* Enable the use of the MBX by the VF's */ 3969 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 3970 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 3971 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 3972 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 3973 } 3974 3975 } /* ixgbe_init_locked */ 3976 3977 /************************************************************************ 3978 * ixgbe_set_ivar 3979 * 3980 * Setup the correct IVAR register for a particular MSI-X interrupt 3981 * (yes this is all very magic and confusing :) 3982 * - entry is the register array entry 3983 * - vector is the MSI-X vector for this queue 3984 * - type is RX/TX/MISC 3985 ************************************************************************/ 3986 static void 3987 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 3988 { 3989 struct ixgbe_hw *hw = &sc->hw; 3990 u32 ivar, index; 3991 3992 vector |= IXGBE_IVAR_ALLOC_VAL; 3993 3994 switch (hw->mac.type) { 3995 case ixgbe_mac_82598EB: 3996 if (type == -1) 3997 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 3998 else 3999 entry += (type * 64); 4000 index = (entry >> 2) & 0x1F; 4001 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4002 ivar &= ~(0xFF << (8 * (entry & 0x3))); 4003 ivar |= (vector << (8 * (entry & 0x3))); 4004 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4005 break; 4006 case ixgbe_mac_82599EB: 4007 case ixgbe_mac_X540: 4008 case ixgbe_mac_X550: 4009 case ixgbe_mac_X550EM_x: 4010 case ixgbe_mac_X550EM_a: 4011 case ixgbe_mac_E610: 4012 if (type == -1) { /* MISC IVAR */ 4013 index = (entry & 1) * 8; 4014 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4015 ivar &= ~(0xFF << index); 4016 ivar |= (vector << index); 4017 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4018 } else { /* RX/TX IVARS */ 4019 index = (16 * (entry & 1)) + (8 * type); 4020 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4021 ivar &= ~(0xFF << index); 4022 ivar |= (vector << index); 4023 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4024 } 4025 default: 4026 break; 4027 } 4028 } /* ixgbe_set_ivar */ 4029 4030 /************************************************************************ 4031 * ixgbe_configure_ivars 4032 ************************************************************************/ 4033 static void 4034 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4035 { 4036 struct ix_rx_queue *rx_que = sc->rx_queues; 4037 struct ix_tx_queue *tx_que = sc->tx_queues; 4038 u32 newitr; 4039 4040 if (ixgbe_max_interrupt_rate > 0) 4041 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 4042 else { 4043 /* 4044 * Disable DMA coalescing if interrupt moderation is 4045 * disabled. 4046 */ 4047 sc->dmac = 0; 4048 newitr = 0; 4049 } 4050 4051 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) { 4052 struct rx_ring *rxr = &rx_que->rxr; 4053 4054 /* First the RX queue entry */ 4055 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0); 4056 4057 /* Set an Initial EITR value */ 4058 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr); 4059 } 4060 for (int i = 0; i < sc->num_tx_queues; i++, tx_que++) { 4061 struct tx_ring *txr = &tx_que->txr; 4062 4063 /* ... and the TX */ 4064 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1); 4065 } 4066 /* For the Link interrupt */ 4067 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4068 } /* ixgbe_configure_ivars */ 4069 4070 /************************************************************************ 4071 * ixgbe_config_gpie 4072 ************************************************************************/ 4073 static void 4074 ixgbe_config_gpie(struct ixgbe_softc *sc) 4075 { 4076 struct ixgbe_hw *hw = &sc->hw; 4077 u32 gpie; 4078 4079 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4080 4081 if (sc->intr_type == IFLIB_INTR_MSIX) { 4082 /* Enable Enhanced MSI-X mode */ 4083 gpie |= IXGBE_GPIE_MSIX_MODE | 4084 IXGBE_GPIE_EIAME | 4085 IXGBE_GPIE_PBA_SUPPORT | 4086 IXGBE_GPIE_OCD; 4087 } 4088 4089 /* Fan Failure Interrupt */ 4090 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4091 gpie |= IXGBE_SDP1_GPIEN; 4092 4093 /* Thermal Sensor Interrupt */ 4094 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4095 gpie |= IXGBE_SDP0_GPIEN_X540; 4096 4097 /* Link detection */ 4098 switch (hw->mac.type) { 4099 case ixgbe_mac_82599EB: 4100 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4101 break; 4102 case ixgbe_mac_X550EM_x: 4103 case ixgbe_mac_X550EM_a: 4104 gpie |= IXGBE_SDP0_GPIEN_X540; 4105 break; 4106 default: 4107 break; 4108 } 4109 4110 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4111 4112 } /* ixgbe_config_gpie */ 4113 4114 /************************************************************************ 4115 * ixgbe_config_delay_values 4116 * 4117 * Requires sc->max_frame_size to be set. 4118 ************************************************************************/ 4119 static void 4120 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4121 { 4122 struct ixgbe_hw *hw = &sc->hw; 4123 u32 rxpb, frame, size, tmp; 4124 4125 frame = sc->max_frame_size; 4126 4127 /* Calculate High Water */ 4128 switch (hw->mac.type) { 4129 case ixgbe_mac_X540: 4130 case ixgbe_mac_X550: 4131 case ixgbe_mac_X550EM_x: 4132 case ixgbe_mac_X550EM_a: 4133 tmp = IXGBE_DV_X540(frame, frame); 4134 break; 4135 default: 4136 tmp = IXGBE_DV(frame, frame); 4137 break; 4138 } 4139 size = IXGBE_BT2KB(tmp); 4140 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4141 hw->fc.high_water[0] = rxpb - size; 4142 4143 /* Now calculate Low Water */ 4144 switch (hw->mac.type) { 4145 case ixgbe_mac_X540: 4146 case ixgbe_mac_X550: 4147 case ixgbe_mac_X550EM_x: 4148 case ixgbe_mac_X550EM_a: 4149 tmp = IXGBE_LOW_DV_X540(frame); 4150 break; 4151 default: 4152 tmp = IXGBE_LOW_DV(frame); 4153 break; 4154 } 4155 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4156 4157 hw->fc.pause_time = IXGBE_FC_PAUSE; 4158 hw->fc.send_xon = true; 4159 } /* ixgbe_config_delay_values */ 4160 4161 /************************************************************************ 4162 * ixgbe_set_multi - Multicast Update 4163 * 4164 * Called whenever multicast address list is updated. 4165 ************************************************************************/ 4166 static u_int 4167 ixgbe_mc_filter_apply(void *arg, struct sockaddr_dl *sdl, u_int idx) 4168 { 4169 struct ixgbe_softc *sc = arg; 4170 struct ixgbe_mc_addr *mta = sc->mta; 4171 4172 if (idx == MAX_NUM_MULTICAST_ADDRESSES) 4173 return (0); 4174 bcopy(LLADDR(sdl), mta[idx].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4175 mta[idx].vmdq = sc->pool; 4176 4177 return (1); 4178 } /* ixgbe_mc_filter_apply */ 4179 4180 static void 4181 ixgbe_if_multi_set(if_ctx_t ctx) 4182 { 4183 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4184 struct ixgbe_mc_addr *mta; 4185 if_t ifp = iflib_get_ifp(ctx); 4186 u8 *update_ptr; 4187 u32 fctrl; 4188 u_int mcnt; 4189 4190 IOCTL_DEBUGOUT("ixgbe_if_multi_set: begin"); 4191 4192 mta = sc->mta; 4193 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4194 4195 mcnt = if_foreach_llmaddr(iflib_get_ifp(ctx), ixgbe_mc_filter_apply, 4196 sc); 4197 4198 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 4199 update_ptr = (u8 *)mta; 4200 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4201 ixgbe_mc_array_itr, true); 4202 } 4203 4204 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4205 4206 if (if_getflags(ifp) & IFF_PROMISC) 4207 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4208 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 4209 if_getflags(ifp) & IFF_ALLMULTI) { 4210 fctrl |= IXGBE_FCTRL_MPE; 4211 fctrl &= ~IXGBE_FCTRL_UPE; 4212 } else 4213 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4214 4215 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4216 } /* ixgbe_if_multi_set */ 4217 4218 /************************************************************************ 4219 * ixgbe_mc_array_itr 4220 * 4221 * An iterator function needed by the multicast shared code. 4222 * It feeds the shared code routine the addresses in the 4223 * array of ixgbe_set_multi() one by one. 4224 ************************************************************************/ 4225 static u8 * 4226 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4227 { 4228 struct ixgbe_mc_addr *mta; 4229 4230 mta = (struct ixgbe_mc_addr *)*update_ptr; 4231 *vmdq = mta->vmdq; 4232 4233 *update_ptr = (u8*)(mta + 1); 4234 4235 return (mta->addr); 4236 } /* ixgbe_mc_array_itr */ 4237 4238 /************************************************************************ 4239 * ixgbe_local_timer - Timer routine 4240 * 4241 * Checks for link status, updates statistics, 4242 * and runs the watchdog check. 4243 ************************************************************************/ 4244 static void 4245 ixgbe_if_timer(if_ctx_t ctx, uint16_t qid) 4246 { 4247 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4248 4249 if (qid != 0) 4250 return; 4251 4252 /* Check for pluggable optics */ 4253 if (sc->sfp_probe) 4254 if (!ixgbe_sfp_probe(ctx)) 4255 return; /* Nothing to do */ 4256 4257 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 0); 4258 4259 /* Fire off the adminq task */ 4260 iflib_admin_intr_deferred(ctx); 4261 4262 } /* ixgbe_if_timer */ 4263 4264 /************************************************************************ 4265 * ixgbe_fw_mode_timer - FW mode timer routine 4266 ************************************************************************/ 4267 static void 4268 ixgbe_fw_mode_timer(void *arg) 4269 { 4270 struct ixgbe_softc *sc = arg; 4271 struct ixgbe_hw *hw = &sc->hw; 4272 4273 if (ixgbe_fw_recovery_mode(hw)) { 4274 if (atomic_cmpset_acq_int(&sc->recovery_mode, 0, 1)) { 4275 /* Firmware error detected, entering recovery mode */ 4276 device_printf(sc->dev, 4277 "Firmware recovery mode detected. Limiting" 4278 " functionality. Refer to the Intel(R) Ethernet" 4279 " Adapters and Devices User Guide for details on" 4280 " firmware recovery mode.\n"); 4281 4282 if (hw->adapter_stopped == FALSE) 4283 ixgbe_if_stop(sc->ctx); 4284 } 4285 } else 4286 atomic_cmpset_acq_int(&sc->recovery_mode, 1, 0); 4287 4288 4289 callout_reset(&sc->fw_mode_timer, hz, 4290 ixgbe_fw_mode_timer, sc); 4291 } /* ixgbe_fw_mode_timer */ 4292 4293 /************************************************************************ 4294 * ixgbe_sfp_probe 4295 * 4296 * Determine if a port had optics inserted. 4297 ************************************************************************/ 4298 static bool 4299 ixgbe_sfp_probe(if_ctx_t ctx) 4300 { 4301 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4302 struct ixgbe_hw *hw = &sc->hw; 4303 device_t dev = iflib_get_dev(ctx); 4304 bool result = false; 4305 4306 if ((hw->phy.type == ixgbe_phy_nl) && 4307 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 4308 s32 ret = hw->phy.ops.identify_sfp(hw); 4309 if (ret) 4310 goto out; 4311 ret = hw->phy.ops.reset(hw); 4312 sc->sfp_probe = false; 4313 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4314 device_printf(dev, 4315 "Unsupported SFP+ module detected!"); 4316 device_printf(dev, 4317 "Reload driver with supported module.\n"); 4318 goto out; 4319 } else 4320 device_printf(dev, "SFP+ module detected!\n"); 4321 /* We now have supported optics */ 4322 result = true; 4323 } 4324 out: 4325 4326 return (result); 4327 } /* ixgbe_sfp_probe */ 4328 4329 /************************************************************************ 4330 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4331 ************************************************************************/ 4332 static void 4333 ixgbe_handle_mod(void *context) 4334 { 4335 if_ctx_t ctx = context; 4336 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4337 struct ixgbe_hw *hw = &sc->hw; 4338 device_t dev = iflib_get_dev(ctx); 4339 u32 err, cage_full = 0; 4340 4341 if (sc->hw.need_crosstalk_fix) { 4342 switch (hw->mac.type) { 4343 case ixgbe_mac_82599EB: 4344 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4345 IXGBE_ESDP_SDP2; 4346 break; 4347 case ixgbe_mac_X550EM_x: 4348 case ixgbe_mac_X550EM_a: 4349 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4350 IXGBE_ESDP_SDP0; 4351 break; 4352 default: 4353 break; 4354 } 4355 4356 if (!cage_full) 4357 goto handle_mod_out; 4358 } 4359 4360 err = hw->phy.ops.identify_sfp(hw); 4361 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4362 device_printf(dev, 4363 "Unsupported SFP+ module type was detected.\n"); 4364 goto handle_mod_out; 4365 } 4366 4367 if (hw->mac.type == ixgbe_mac_82598EB) 4368 err = hw->phy.ops.reset(hw); 4369 else 4370 err = hw->mac.ops.setup_sfp(hw); 4371 4372 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4373 device_printf(dev, 4374 "Setup failure - unsupported SFP+ module type.\n"); 4375 goto handle_mod_out; 4376 } 4377 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4378 return; 4379 4380 handle_mod_out: 4381 sc->task_requests &= ~(IXGBE_REQUEST_TASK_MSF); 4382 } /* ixgbe_handle_mod */ 4383 4384 4385 /************************************************************************ 4386 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4387 ************************************************************************/ 4388 static void 4389 ixgbe_handle_msf(void *context) 4390 { 4391 if_ctx_t ctx = context; 4392 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4393 struct ixgbe_hw *hw = &sc->hw; 4394 u32 autoneg; 4395 bool negotiate; 4396 4397 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4398 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4399 4400 autoneg = hw->phy.autoneg_advertised; 4401 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4402 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4403 if (hw->mac.ops.setup_link) 4404 hw->mac.ops.setup_link(hw, autoneg, true); 4405 4406 /* Adjust media types shown in ifconfig */ 4407 ifmedia_removeall(sc->media); 4408 ixgbe_add_media_types(sc->ctx); 4409 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 4410 } /* ixgbe_handle_msf */ 4411 4412 /************************************************************************ 4413 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4414 ************************************************************************/ 4415 static void 4416 ixgbe_handle_phy(void *context) 4417 { 4418 if_ctx_t ctx = context; 4419 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4420 struct ixgbe_hw *hw = &sc->hw; 4421 int error; 4422 4423 error = hw->phy.ops.handle_lasi(hw); 4424 if (error == IXGBE_ERR_OVERTEMP) 4425 device_printf(sc->dev, 4426 "CRITICAL: EXTERNAL PHY OVER TEMP!!" 4427 " PHY will downshift to lower power state!\n"); 4428 else if (error) 4429 device_printf(sc->dev, 4430 "Error handling LASI interrupt: %d\n", error); 4431 } /* ixgbe_handle_phy */ 4432 4433 /************************************************************************ 4434 * ixgbe_enable_lse - enable link status events 4435 * 4436 * Sets mask and enables link status events 4437 ************************************************************************/ 4438 s32 ixgbe_enable_lse(struct ixgbe_softc *sc) 4439 { 4440 s32 error; 4441 4442 u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN | 4443 IXGBE_ACI_LINK_EVENT_MEDIA_NA | 4444 IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL | 4445 IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL)); 4446 4447 error = ixgbe_configure_lse(&sc->hw, TRUE, mask); 4448 if (error) 4449 return (error); 4450 4451 sc->lse_mask = mask; 4452 return (IXGBE_SUCCESS); 4453 } /* ixgbe_enable_lse */ 4454 4455 /************************************************************************ 4456 * ixgbe_disable_lse - disable link status events 4457 ************************************************************************/ 4458 s32 ixgbe_disable_lse(struct ixgbe_softc *sc) 4459 { 4460 s32 error; 4461 4462 error = ixgbe_configure_lse(&sc->hw, false, sc->lse_mask); 4463 if (error) 4464 return (error); 4465 4466 sc->lse_mask = 0; 4467 return (IXGBE_SUCCESS); 4468 } /* ixgbe_disable_lse */ 4469 4470 /************************************************************************ 4471 * ixgbe_handle_fw_event - Tasklet for MSI-X Link Status Event interrupts 4472 ************************************************************************/ 4473 static void 4474 ixgbe_handle_fw_event(void *context) 4475 { 4476 if_ctx_t ctx = context; 4477 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4478 struct ixgbe_hw *hw = &sc->hw; 4479 struct ixgbe_aci_event event; 4480 bool pending = false; 4481 s32 error; 4482 4483 event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE; 4484 event.msg_buf = malloc(event.buf_len, M_IXGBE, M_ZERO | M_NOWAIT); 4485 if (!event.msg_buf) { 4486 device_printf(sc->dev, "Can not allocate buffer for " 4487 "event message\n"); 4488 return; 4489 } 4490 4491 do { 4492 error = ixgbe_aci_get_event(hw, &event, &pending); 4493 if (error) { 4494 device_printf(sc->dev, "Error getting event from " 4495 "FW:%d\n", error); 4496 break; 4497 } 4498 4499 switch (le16toh(event.desc.opcode)) { 4500 case ixgbe_aci_opc_get_link_status: 4501 sc->task_requests |= IXGBE_REQUEST_TASK_LSC; 4502 break; 4503 4504 case ixgbe_aci_opc_fw_logs_event: 4505 ixgbe_fwlog_event_dump(&sc->hw, &event.desc, event.msg_buf); 4506 break; 4507 4508 case ixgbe_aci_opc_temp_tca_event: 4509 if (hw->adapter_stopped == FALSE) 4510 ixgbe_if_stop(ctx); 4511 device_printf(sc->dev, 4512 "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n"); 4513 device_printf(sc->dev, "System shutdown required!\n"); 4514 break; 4515 4516 default: 4517 device_printf(sc->dev, 4518 "Unknown FW event captured, opcode=0x%04X\n", 4519 le16toh(event.desc.opcode)); 4520 break; 4521 } 4522 } while (pending); 4523 4524 free(event.msg_buf, M_IXGBE); 4525 } /* ixgbe_handle_fw_event */ 4526 4527 /************************************************************************ 4528 * ixgbe_if_stop - Stop the hardware 4529 * 4530 * Disables all traffic on the adapter by issuing a 4531 * global reset on the MAC and deallocates TX/RX buffers. 4532 ************************************************************************/ 4533 static void 4534 ixgbe_if_stop(if_ctx_t ctx) 4535 { 4536 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4537 struct ixgbe_hw *hw = &sc->hw; 4538 4539 INIT_DEBUGOUT("ixgbe_if_stop: begin\n"); 4540 4541 ixgbe_reset_hw(hw); 4542 hw->adapter_stopped = false; 4543 ixgbe_stop_adapter(hw); 4544 if (hw->mac.type == ixgbe_mac_82599EB) 4545 ixgbe_stop_mac_link_on_d3_82599(hw); 4546 /* Turn off the laser - noop with no optics */ 4547 ixgbe_disable_tx_laser(hw); 4548 4549 /* Update the stack */ 4550 sc->link_up = false; 4551 ixgbe_if_update_admin_status(ctx); 4552 4553 /* reprogram the RAR[0] in case user changed it. */ 4554 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 4555 4556 return; 4557 } /* ixgbe_if_stop */ 4558 4559 /************************************************************************ 4560 * ixgbe_link_speed_to_str - Convert link speed to string 4561 * 4562 * Helper function to convert link speed constants to human-readable 4563 * string representations in conventional Gbps or Mbps. 4564 ************************************************************************/ 4565 static const char * 4566 ixgbe_link_speed_to_str(u32 link_speed) 4567 { 4568 switch (link_speed) { 4569 case IXGBE_LINK_SPEED_10GB_FULL: 4570 return "10 Gbps"; 4571 case IXGBE_LINK_SPEED_5GB_FULL: 4572 return "5 Gbps"; 4573 case IXGBE_LINK_SPEED_2_5GB_FULL: 4574 return "2.5 Gbps"; 4575 case IXGBE_LINK_SPEED_1GB_FULL: 4576 return "1 Gbps"; 4577 case IXGBE_LINK_SPEED_100_FULL: 4578 return "100 Mbps"; 4579 case IXGBE_LINK_SPEED_10_FULL: 4580 return "10 Mbps"; 4581 default: 4582 return "Unknown"; 4583 } 4584 } /* ixgbe_link_speed_to_str */ 4585 4586 /************************************************************************ 4587 * ixgbe_update_link_status - Update OS on link state 4588 * 4589 * Note: Only updates the OS on the cached link state. 4590 * The real check of the hardware only happens with 4591 * a link interrupt. 4592 ************************************************************************/ 4593 static void 4594 ixgbe_if_update_admin_status(if_ctx_t ctx) 4595 { 4596 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4597 device_t dev = iflib_get_dev(ctx); 4598 4599 if (sc->link_up) { 4600 if (sc->link_active == false) { 4601 if (bootverbose) 4602 device_printf(dev, 4603 "Link is up %s Full Duplex\n", 4604 ixgbe_link_speed_to_str(sc->link_speed)); 4605 sc->link_active = true; 4606 4607 /* If link speed is <= 1Gbps and EEE is enabled, 4608 * log info. 4609 */ 4610 if (sc->hw.mac.type == ixgbe_mac_E610 && 4611 (sc->feat_en & IXGBE_FEATURE_EEE) && 4612 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 4613 device_printf(sc->dev, 4614 "Energy Efficient Ethernet (EEE) feature " 4615 "is not supported on link speeds equal to " 4616 "or below 1Gbps. EEE is supported on " 4617 "speeds above 1Gbps.\n"); 4618 } 4619 4620 /* Update any Flow Control changes */ 4621 ixgbe_fc_enable(&sc->hw); 4622 /* Update DMA coalescing config */ 4623 ixgbe_config_dmac(sc); 4624 iflib_link_state_change(ctx, LINK_STATE_UP, 4625 ixgbe_link_speed_to_baudrate(sc->link_speed)); 4626 4627 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 4628 ixgbe_ping_all_vfs(sc); 4629 } 4630 } else { /* Link down */ 4631 if (sc->link_active == true) { 4632 if (bootverbose) 4633 device_printf(dev, "Link is Down\n"); 4634 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); 4635 sc->link_active = false; 4636 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 4637 ixgbe_ping_all_vfs(sc); 4638 } 4639 } 4640 4641 /* Handle task requests from msix_link() */ 4642 if (sc->task_requests & IXGBE_REQUEST_TASK_FWEVENT) 4643 ixgbe_handle_fw_event(ctx); 4644 if (sc->task_requests & IXGBE_REQUEST_TASK_MOD) 4645 ixgbe_handle_mod(ctx); 4646 if (sc->task_requests & IXGBE_REQUEST_TASK_MSF) 4647 ixgbe_handle_msf(ctx); 4648 if (sc->task_requests & IXGBE_REQUEST_TASK_MBX) 4649 ixgbe_handle_mbx(ctx); 4650 if (sc->task_requests & IXGBE_REQUEST_TASK_FDIR) 4651 ixgbe_reinit_fdir(ctx); 4652 if (sc->task_requests & IXGBE_REQUEST_TASK_PHY) 4653 ixgbe_handle_phy(ctx); 4654 sc->task_requests = 0; 4655 4656 ixgbe_update_stats_counters(sc); 4657 } /* ixgbe_if_update_admin_status */ 4658 4659 /************************************************************************ 4660 * ixgbe_config_dmac - Configure DMA Coalescing 4661 ************************************************************************/ 4662 static void 4663 ixgbe_config_dmac(struct ixgbe_softc *sc) 4664 { 4665 struct ixgbe_hw *hw = &sc->hw; 4666 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 4667 4668 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 4669 return; 4670 4671 if (dcfg->watchdog_timer ^ sc->dmac || 4672 dcfg->link_speed ^ sc->link_speed) { 4673 dcfg->watchdog_timer = sc->dmac; 4674 dcfg->fcoe_en = false; 4675 dcfg->link_speed = sc->link_speed; 4676 dcfg->num_tcs = 1; 4677 4678 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 4679 dcfg->watchdog_timer, dcfg->link_speed); 4680 4681 hw->mac.ops.dmac_config(hw); 4682 } 4683 } /* ixgbe_config_dmac */ 4684 4685 /************************************************************************ 4686 * ixgbe_if_enable_intr 4687 ************************************************************************/ 4688 void 4689 ixgbe_if_enable_intr(if_ctx_t ctx) 4690 { 4691 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4692 struct ixgbe_hw *hw = &sc->hw; 4693 struct ix_rx_queue *que = sc->rx_queues; 4694 u32 mask, fwsm; 4695 4696 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 4697 4698 switch (sc->hw.mac.type) { 4699 case ixgbe_mac_82599EB: 4700 mask |= IXGBE_EIMS_ECC; 4701 /* Temperature sensor on some scs */ 4702 mask |= IXGBE_EIMS_GPI_SDP0; 4703 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 4704 mask |= IXGBE_EIMS_GPI_SDP1; 4705 mask |= IXGBE_EIMS_GPI_SDP2; 4706 break; 4707 case ixgbe_mac_X540: 4708 /* Detect if Thermal Sensor is enabled */ 4709 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 4710 if (fwsm & IXGBE_FWSM_TS_ENABLED) 4711 mask |= IXGBE_EIMS_TS; 4712 mask |= IXGBE_EIMS_ECC; 4713 break; 4714 case ixgbe_mac_X550: 4715 /* MAC thermal sensor is automatically enabled */ 4716 mask |= IXGBE_EIMS_TS; 4717 mask |= IXGBE_EIMS_ECC; 4718 break; 4719 case ixgbe_mac_X550EM_x: 4720 case ixgbe_mac_X550EM_a: 4721 /* Some devices use SDP0 for important information */ 4722 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 4723 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 4724 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 4725 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 4726 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 4727 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 4728 mask |= IXGBE_EICR_GPI_SDP0_X540; 4729 mask |= IXGBE_EIMS_ECC; 4730 break; 4731 case ixgbe_mac_E610: 4732 mask |= IXGBE_EIMS_FW_EVENT; 4733 break; 4734 default: 4735 break; 4736 } 4737 4738 /* Enable Fan Failure detection */ 4739 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4740 mask |= IXGBE_EIMS_GPI_SDP1; 4741 /* Enable SR-IOV */ 4742 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 4743 mask |= IXGBE_EIMS_MAILBOX; 4744 /* Enable Flow Director */ 4745 if (sc->feat_en & IXGBE_FEATURE_FDIR) 4746 mask |= IXGBE_EIMS_FLOW_DIR; 4747 4748 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 4749 4750 /* With MSI-X we use auto clear */ 4751 if (sc->intr_type == IFLIB_INTR_MSIX) { 4752 mask = IXGBE_EIMS_ENABLE_MASK; 4753 /* Don't autoclear Link */ 4754 mask &= ~IXGBE_EIMS_OTHER; 4755 mask &= ~IXGBE_EIMS_LSC; 4756 mask &= ~IXGBE_EIMS_FW_EVENT; 4757 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 4758 mask &= ~IXGBE_EIMS_MAILBOX; 4759 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 4760 } 4761 4762 /* 4763 * Now enable all queues, this is done separately to 4764 * allow for handling the extended (beyond 32) MSI-X 4765 * vectors that can be used by 82599 4766 */ 4767 for (int i = 0; i < sc->num_rx_queues; i++, que++) 4768 ixgbe_enable_queue(sc, que->msix); 4769 4770 IXGBE_WRITE_FLUSH(hw); 4771 4772 } /* ixgbe_if_enable_intr */ 4773 4774 /************************************************************************ 4775 * ixgbe_if_disable_intr 4776 ************************************************************************/ 4777 static void 4778 ixgbe_if_disable_intr(if_ctx_t ctx) 4779 { 4780 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4781 4782 if (sc->intr_type == IFLIB_INTR_MSIX) 4783 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 4784 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 4785 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~0); 4786 } else { 4787 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, 0xFFFF0000); 4788 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(0), ~0); 4789 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(1), ~0); 4790 } 4791 IXGBE_WRITE_FLUSH(&sc->hw); 4792 4793 } /* ixgbe_if_disable_intr */ 4794 4795 /************************************************************************ 4796 * ixgbe_link_intr_enable 4797 ************************************************************************/ 4798 static void 4799 ixgbe_link_intr_enable(if_ctx_t ctx) 4800 { 4801 struct ixgbe_hw *hw = 4802 &((struct ixgbe_softc *)iflib_get_softc(ctx))->hw; 4803 4804 /* Re-enable other interrupts */ 4805 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC); 4806 } /* ixgbe_link_intr_enable */ 4807 4808 /************************************************************************ 4809 * ixgbe_if_rx_queue_intr_enable 4810 ************************************************************************/ 4811 static int 4812 ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) 4813 { 4814 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4815 struct ix_rx_queue *que = &sc->rx_queues[rxqid]; 4816 4817 ixgbe_enable_queue(sc, que->msix); 4818 4819 return (0); 4820 } /* ixgbe_if_rx_queue_intr_enable */ 4821 4822 /************************************************************************ 4823 * ixgbe_enable_queue 4824 ************************************************************************/ 4825 static void 4826 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 4827 { 4828 struct ixgbe_hw *hw = &sc->hw; 4829 u64 queue = 1ULL << vector; 4830 u32 mask; 4831 4832 if (hw->mac.type == ixgbe_mac_82598EB) { 4833 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 4834 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 4835 } else { 4836 mask = (queue & 0xFFFFFFFF); 4837 if (mask) 4838 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 4839 mask = (queue >> 32); 4840 if (mask) 4841 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 4842 } 4843 } /* ixgbe_enable_queue */ 4844 4845 /************************************************************************ 4846 * ixgbe_disable_queue 4847 ************************************************************************/ 4848 static void 4849 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 4850 { 4851 struct ixgbe_hw *hw = &sc->hw; 4852 u64 queue = 1ULL << vector; 4853 u32 mask; 4854 4855 if (hw->mac.type == ixgbe_mac_82598EB) { 4856 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 4857 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 4858 } else { 4859 mask = (queue & 0xFFFFFFFF); 4860 if (mask) 4861 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 4862 mask = (queue >> 32); 4863 if (mask) 4864 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 4865 } 4866 } /* ixgbe_disable_queue */ 4867 4868 /************************************************************************ 4869 * ixgbe_intr - Legacy Interrupt Service Routine 4870 ************************************************************************/ 4871 int 4872 ixgbe_intr(void *arg) 4873 { 4874 struct ixgbe_softc *sc = arg; 4875 struct ix_rx_queue *que = sc->rx_queues; 4876 struct ixgbe_hw *hw = &sc->hw; 4877 if_ctx_t ctx = sc->ctx; 4878 u32 eicr, eicr_mask; 4879 4880 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 4881 4882 ++que->irqs; 4883 if (eicr == 0) { 4884 ixgbe_if_enable_intr(ctx); 4885 return (FILTER_HANDLED); 4886 } 4887 4888 /* Check for fan failure */ 4889 if ((sc->feat_en & IXGBE_FEATURE_FAN_FAIL) && 4890 (eicr & IXGBE_EICR_GPI_SDP1)) { 4891 device_printf(sc->dev, 4892 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 4893 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 4894 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 4895 } 4896 4897 /* Link status change */ 4898 if (eicr & IXGBE_EICR_LSC) { 4899 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 4900 iflib_admin_intr_deferred(ctx); 4901 } 4902 4903 if (ixgbe_is_sfp(hw)) { 4904 /* Pluggable optics-related interrupt */ 4905 if (hw->mac.type >= ixgbe_mac_X540) 4906 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 4907 else 4908 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4909 4910 if (eicr & eicr_mask) { 4911 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 4912 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 4913 } 4914 4915 if ((hw->mac.type == ixgbe_mac_82599EB) && 4916 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 4917 IXGBE_WRITE_REG(hw, IXGBE_EICR, 4918 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 4919 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4920 } 4921 } 4922 4923 /* External PHY interrupt */ 4924 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 4925 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 4926 sc->task_requests |= IXGBE_REQUEST_TASK_PHY; 4927 } 4928 4929 return (FILTER_SCHEDULE_THREAD); 4930 } /* ixgbe_intr */ 4931 4932 /************************************************************************ 4933 * ixgbe_free_pci_resources 4934 ************************************************************************/ 4935 static void 4936 ixgbe_free_pci_resources(if_ctx_t ctx) 4937 { 4938 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4939 struct ix_rx_queue *que = sc->rx_queues; 4940 device_t dev = iflib_get_dev(ctx); 4941 4942 /* Release all MSI-X queue resources */ 4943 if (sc->intr_type == IFLIB_INTR_MSIX) 4944 iflib_irq_free(ctx, &sc->irq); 4945 4946 if (que != NULL) { 4947 for (int i = 0; i < sc->num_rx_queues; i++, que++) { 4948 iflib_irq_free(ctx, &que->que_irq); 4949 } 4950 } 4951 4952 if (sc->pci_mem != NULL) 4953 bus_release_resource(dev, SYS_RES_MEMORY, 4954 rman_get_rid(sc->pci_mem), sc->pci_mem); 4955 } /* ixgbe_free_pci_resources */ 4956 4957 /************************************************************************ 4958 * ixgbe_sysctl_flowcntl 4959 * 4960 * SYSCTL wrapper around setting Flow Control 4961 ************************************************************************/ 4962 static int 4963 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS) 4964 { 4965 struct ixgbe_softc *sc; 4966 int error, fc; 4967 4968 sc = (struct ixgbe_softc *)arg1; 4969 fc = sc->hw.fc.requested_mode; 4970 4971 error = sysctl_handle_int(oidp, &fc, 0, req); 4972 if ((error) || (req->newptr == NULL)) 4973 return (error); 4974 4975 /* Don't bother if it's not changed */ 4976 if (fc == sc->hw.fc.current_mode) 4977 return (0); 4978 4979 return ixgbe_set_flowcntl(sc, fc); 4980 } /* ixgbe_sysctl_flowcntl */ 4981 4982 /************************************************************************ 4983 * ixgbe_set_flowcntl - Set flow control 4984 * 4985 * Flow control values: 4986 * 0 - off 4987 * 1 - rx pause 4988 * 2 - tx pause 4989 * 3 - full 4990 ************************************************************************/ 4991 static int 4992 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 4993 { 4994 switch (fc) { 4995 case ixgbe_fc_rx_pause: 4996 case ixgbe_fc_tx_pause: 4997 case ixgbe_fc_full: 4998 if (sc->num_rx_queues > 1) 4999 ixgbe_disable_rx_drop(sc); 5000 break; 5001 case ixgbe_fc_none: 5002 if (sc->num_rx_queues > 1) 5003 ixgbe_enable_rx_drop(sc); 5004 break; 5005 default: 5006 return (EINVAL); 5007 } 5008 5009 sc->hw.fc.requested_mode = fc; 5010 5011 /* Don't autoneg if forcing a value */ 5012 sc->hw.fc.disable_fc_autoneg = true; 5013 ixgbe_fc_enable(&sc->hw); 5014 5015 return (0); 5016 } /* ixgbe_set_flowcntl */ 5017 5018 /************************************************************************ 5019 * ixgbe_enable_rx_drop 5020 * 5021 * Enable the hardware to drop packets when the buffer is 5022 * full. This is useful with multiqueue, so that no single 5023 * queue being full stalls the entire RX engine. We only 5024 * enable this when Multiqueue is enabled AND Flow Control 5025 * is disabled. 5026 ************************************************************************/ 5027 static void 5028 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5029 { 5030 struct ixgbe_hw *hw = &sc->hw; 5031 struct rx_ring *rxr; 5032 u32 srrctl; 5033 5034 for (int i = 0; i < sc->num_rx_queues; i++) { 5035 rxr = &sc->rx_queues[i].rxr; 5036 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5037 srrctl |= IXGBE_SRRCTL_DROP_EN; 5038 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5039 } 5040 5041 /* enable drop for each vf */ 5042 for (int i = 0; i < sc->num_vfs; i++) { 5043 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5044 (IXGBE_QDE_WRITE | 5045 (i << IXGBE_QDE_IDX_SHIFT) | 5046 IXGBE_QDE_ENABLE)); 5047 } 5048 } /* ixgbe_enable_rx_drop */ 5049 5050 /************************************************************************ 5051 * ixgbe_disable_rx_drop 5052 ************************************************************************/ 5053 static void 5054 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5055 { 5056 struct ixgbe_hw *hw = &sc->hw; 5057 struct rx_ring *rxr; 5058 u32 srrctl; 5059 5060 for (int i = 0; i < sc->num_rx_queues; i++) { 5061 rxr = &sc->rx_queues[i].rxr; 5062 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5063 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5064 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5065 } 5066 5067 /* disable drop for each vf */ 5068 for (int i = 0; i < sc->num_vfs; i++) { 5069 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5070 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5071 } 5072 } /* ixgbe_disable_rx_drop */ 5073 5074 /************************************************************************ 5075 * ixgbe_sysctl_advertise 5076 * 5077 * SYSCTL wrapper around setting advertised speed 5078 ************************************************************************/ 5079 static int 5080 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS) 5081 { 5082 struct ixgbe_softc *sc; 5083 int error, advertise; 5084 5085 sc = (struct ixgbe_softc *)arg1; 5086 if (atomic_load_acq_int(&sc->recovery_mode)) 5087 return (EPERM); 5088 5089 advertise = sc->advertise; 5090 5091 error = sysctl_handle_int(oidp, &advertise, 0, req); 5092 if ((error) || (req->newptr == NULL)) 5093 return (error); 5094 5095 return ixgbe_set_advertise(sc, advertise); 5096 } /* ixgbe_sysctl_advertise */ 5097 5098 /************************************************************************ 5099 * ixgbe_set_advertise - Control advertised link speed 5100 * 5101 * Flags: 5102 * 0x1 - advertise 100 Mb 5103 * 0x2 - advertise 1G 5104 * 0x4 - advertise 10G 5105 * 0x8 - advertise 10 Mb (yes, Mb) 5106 * 0x10 - advertise 2.5G (disabled by default) 5107 * 0x20 - advertise 5G (disabled by default) 5108 * 5109 ************************************************************************/ 5110 static int 5111 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5112 { 5113 device_t dev = iflib_get_dev(sc->ctx); 5114 struct ixgbe_hw *hw; 5115 ixgbe_link_speed speed = 0; 5116 ixgbe_link_speed link_caps = 0; 5117 s32 err = IXGBE_NOT_IMPLEMENTED; 5118 bool negotiate = false; 5119 5120 /* Checks to validate new value */ 5121 if (sc->advertise == advertise) /* no change */ 5122 return (0); 5123 5124 hw = &sc->hw; 5125 5126 /* No speed changes for backplane media */ 5127 if (hw->phy.media_type == ixgbe_media_type_backplane) 5128 return (ENODEV); 5129 5130 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5131 (hw->phy.multispeed_fiber))) { 5132 device_printf(dev, 5133 "Advertised speed can only be set on copper or multispeed" 5134 " fiber media types.\n"); 5135 return (EINVAL); 5136 } 5137 5138 if (advertise < 0x1 || advertise > 0x3F) { 5139 device_printf(dev, 5140 "Invalid advertised speed; valid modes are 0x1 through" 5141 " 0x3F\n"); 5142 return (EINVAL); 5143 } 5144 5145 if (hw->mac.ops.get_link_capabilities) { 5146 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5147 &negotiate); 5148 if (err != IXGBE_SUCCESS) { 5149 device_printf(dev, 5150 "Unable to determine supported advertise speeds" 5151 "\n"); 5152 return (ENODEV); 5153 } 5154 } 5155 5156 /* Set new value and report new advertised mode */ 5157 if (advertise & 0x1) { 5158 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5159 device_printf(dev, 5160 "Interface does not support 100Mb advertised" 5161 " speed\n"); 5162 return (EINVAL); 5163 } 5164 speed |= IXGBE_LINK_SPEED_100_FULL; 5165 } 5166 if (advertise & 0x2) { 5167 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5168 device_printf(dev, 5169 "Interface does not support 1Gb advertised speed" 5170 "\n"); 5171 return (EINVAL); 5172 } 5173 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5174 } 5175 if (advertise & 0x4) { 5176 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5177 device_printf(dev, 5178 "Interface does not support 10Gb advertised speed" 5179 "\n"); 5180 return (EINVAL); 5181 } 5182 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5183 } 5184 if (advertise & 0x8) { 5185 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5186 device_printf(dev, 5187 "Interface does not support 10Mb advertised speed" 5188 "\n"); 5189 return (EINVAL); 5190 } 5191 speed |= IXGBE_LINK_SPEED_10_FULL; 5192 } 5193 if (advertise & 0x10) { 5194 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5195 device_printf(dev, 5196 "Interface does not support 2.5G advertised speed" 5197 "\n"); 5198 return (EINVAL); 5199 } 5200 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5201 } 5202 if (advertise & 0x20) { 5203 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5204 device_printf(dev, 5205 "Interface does not support 5G advertised speed" 5206 "\n"); 5207 return (EINVAL); 5208 } 5209 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5210 } 5211 5212 hw->mac.autotry_restart = true; 5213 hw->mac.ops.setup_link(hw, speed, true); 5214 sc->advertise = advertise; 5215 5216 return (0); 5217 } /* ixgbe_set_advertise */ 5218 5219 /************************************************************************ 5220 * ixgbe_get_default_advertise - Get default advertised speed settings 5221 * 5222 * Formatted for sysctl usage. 5223 * Flags: 5224 * 0x1 - advertise 100 Mb 5225 * 0x2 - advertise 1G 5226 * 0x4 - advertise 10G 5227 * 0x8 - advertise 10 Mb (yes, Mb) 5228 * 0x10 - advertise 2.5G (disabled by default) 5229 * 0x20 - advertise 5G (disabled by default) 5230 ************************************************************************/ 5231 static int 5232 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5233 { 5234 struct ixgbe_hw *hw = &sc->hw; 5235 int speed; 5236 ixgbe_link_speed link_caps = 0; 5237 s32 err; 5238 bool negotiate = false; 5239 5240 /* 5241 * Advertised speed means nothing unless it's copper or 5242 * multi-speed fiber 5243 */ 5244 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5245 !(hw->phy.multispeed_fiber)) 5246 return (0); 5247 5248 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5249 if (err != IXGBE_SUCCESS) 5250 return (0); 5251 5252 if (hw->mac.type == ixgbe_mac_X550) { 5253 /* 5254 * 2.5G and 5G autonegotiation speeds on X550 5255 * are disabled by default due to reported 5256 * interoperability issues with some switches. 5257 */ 5258 link_caps &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 5259 IXGBE_LINK_SPEED_5GB_FULL); 5260 } 5261 5262 speed = 5263 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5264 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5265 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5266 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5267 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5268 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5269 5270 return speed; 5271 } /* ixgbe_get_default_advertise */ 5272 5273 /************************************************************************ 5274 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5275 * 5276 * Control values: 5277 * 0/1 - off / on (use default value of 1000) 5278 * 5279 * Legal timer values are: 5280 * 50,100,250,500,1000,2000,5000,10000 5281 * 5282 * Turning off interrupt moderation will also turn this off. 5283 ************************************************************************/ 5284 static int 5285 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 5286 { 5287 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5288 if_t ifp = iflib_get_ifp(sc->ctx); 5289 int error; 5290 u16 newval; 5291 5292 newval = sc->dmac; 5293 error = sysctl_handle_16(oidp, &newval, 0, req); 5294 if ((error) || (req->newptr == NULL)) 5295 return (error); 5296 5297 switch (newval) { 5298 case 0: 5299 /* Disabled */ 5300 sc->dmac = 0; 5301 break; 5302 case 1: 5303 /* Enable and use default */ 5304 sc->dmac = 1000; 5305 break; 5306 case 50: 5307 case 100: 5308 case 250: 5309 case 500: 5310 case 1000: 5311 case 2000: 5312 case 5000: 5313 case 10000: 5314 /* Legal values - allow */ 5315 sc->dmac = newval; 5316 break; 5317 default: 5318 /* Do nothing, illegal value */ 5319 return (EINVAL); 5320 } 5321 5322 /* Re-initialize hardware if it's already running */ 5323 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 5324 if_init(ifp, ifp); 5325 5326 return (0); 5327 } /* ixgbe_sysctl_dmac */ 5328 5329 #ifdef IXGBE_DEBUG 5330 /************************************************************************ 5331 * ixgbe_sysctl_power_state 5332 * 5333 * Sysctl to test power states 5334 * Values: 5335 * 0 - set device to D0 5336 * 3 - set device to D3 5337 * (none) - get current device power state 5338 ************************************************************************/ 5339 static int 5340 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 5341 { 5342 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5343 device_t dev = sc->dev; 5344 int curr_ps, new_ps, error = 0; 5345 5346 curr_ps = new_ps = pci_get_powerstate(dev); 5347 5348 error = sysctl_handle_int(oidp, &new_ps, 0, req); 5349 if ((error) || (req->newptr == NULL)) 5350 return (error); 5351 5352 if (new_ps == curr_ps) 5353 return (0); 5354 5355 if (new_ps == 3 && curr_ps == 0) 5356 error = DEVICE_SUSPEND(dev); 5357 else if (new_ps == 0 && curr_ps == 3) 5358 error = DEVICE_RESUME(dev); 5359 else 5360 return (EINVAL); 5361 5362 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5363 5364 return (error); 5365 } /* ixgbe_sysctl_power_state */ 5366 #endif 5367 5368 /************************************************************************ 5369 * ixgbe_sysctl_wol_enable 5370 * 5371 * Sysctl to enable/disable the WoL capability, 5372 * if supported by the adapter. 5373 * 5374 * Values: 5375 * 0 - disabled 5376 * 1 - enabled 5377 ************************************************************************/ 5378 static int 5379 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 5380 { 5381 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5382 struct ixgbe_hw *hw = &sc->hw; 5383 int new_wol_enabled; 5384 int error = 0; 5385 5386 new_wol_enabled = hw->wol_enabled; 5387 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 5388 if ((error) || (req->newptr == NULL)) 5389 return (error); 5390 new_wol_enabled = !!(new_wol_enabled); 5391 if (new_wol_enabled == hw->wol_enabled) 5392 return (0); 5393 5394 if (new_wol_enabled > 0 && !sc->wol_support) 5395 return (ENODEV); 5396 else 5397 hw->wol_enabled = new_wol_enabled; 5398 5399 return (0); 5400 } /* ixgbe_sysctl_wol_enable */ 5401 5402 /************************************************************************ 5403 * ixgbe_sysctl_wufc - Wake Up Filter Control 5404 * 5405 * Sysctl to enable/disable the types of packets that the 5406 * adapter will wake up on upon receipt. 5407 * Flags: 5408 * 0x1 - Link Status Change 5409 * 0x2 - Magic Packet 5410 * 0x4 - Direct Exact 5411 * 0x8 - Directed Multicast 5412 * 0x10 - Broadcast 5413 * 0x20 - ARP/IPv4 Request Packet 5414 * 0x40 - Direct IPv4 Packet 5415 * 0x80 - Direct IPv6 Packet 5416 * 5417 * Settings not listed above will cause the sysctl to return an error. 5418 ************************************************************************/ 5419 static int 5420 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 5421 { 5422 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5423 int error = 0; 5424 u32 new_wufc; 5425 5426 new_wufc = sc->wufc; 5427 5428 error = sysctl_handle_32(oidp, &new_wufc, 0, req); 5429 if ((error) || (req->newptr == NULL)) 5430 return (error); 5431 if (new_wufc == sc->wufc) 5432 return (0); 5433 5434 if (new_wufc & 0xffffff00) 5435 return (EINVAL); 5436 5437 new_wufc &= 0xff; 5438 new_wufc |= (0xffffff & sc->wufc); 5439 sc->wufc = new_wufc; 5440 5441 return (0); 5442 } /* ixgbe_sysctl_wufc */ 5443 5444 #ifdef IXGBE_DEBUG 5445 /************************************************************************ 5446 * ixgbe_sysctl_print_rss_config 5447 ************************************************************************/ 5448 static int 5449 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 5450 { 5451 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5452 struct ixgbe_hw *hw = &sc->hw; 5453 device_t dev = sc->dev; 5454 struct sbuf *buf; 5455 int error = 0, reta_size; 5456 u32 reg; 5457 5458 if (atomic_load_acq_int(&sc->recovery_mode)) 5459 return (EPERM); 5460 5461 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5462 if (!buf) { 5463 device_printf(dev, "Could not allocate sbuf for output.\n"); 5464 return (ENOMEM); 5465 } 5466 5467 // TODO: use sbufs to make a string to print out 5468 /* Set multiplier for RETA setup and table size based on MAC */ 5469 switch (sc->hw.mac.type) { 5470 case ixgbe_mac_X550: 5471 case ixgbe_mac_X550EM_x: 5472 case ixgbe_mac_X550EM_a: 5473 reta_size = 128; 5474 break; 5475 default: 5476 reta_size = 32; 5477 break; 5478 } 5479 5480 /* Print out the redirection table */ 5481 sbuf_cat(buf, "\n"); 5482 for (int i = 0; i < reta_size; i++) { 5483 if (i < 32) { 5484 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5485 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5486 } else { 5487 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5488 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5489 } 5490 } 5491 5492 // TODO: print more config 5493 5494 error = sbuf_finish(buf); 5495 if (error) 5496 device_printf(dev, "Error finishing sbuf: %d\n", error); 5497 5498 sbuf_delete(buf); 5499 5500 return (0); 5501 } /* ixgbe_sysctl_print_rss_config */ 5502 #endif /* IXGBE_DEBUG */ 5503 5504 /************************************************************************ 5505 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5506 * 5507 * For X552/X557-AT devices using an external PHY 5508 ************************************************************************/ 5509 static int 5510 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 5511 { 5512 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5513 struct ixgbe_hw *hw = &sc->hw; 5514 u16 reg; 5515 5516 if (atomic_load_acq_int(&sc->recovery_mode)) 5517 return (EPERM); 5518 5519 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 5520 device_printf(iflib_get_dev(sc->ctx), 5521 "Device has no supported external thermal sensor.\n"); 5522 return (ENODEV); 5523 } 5524 5525 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 5526 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 5527 device_printf(iflib_get_dev(sc->ctx), 5528 "Error reading from PHY's current temperature register" 5529 "\n"); 5530 return (EAGAIN); 5531 } 5532 5533 /* Shift temp for output */ 5534 reg = reg >> 8; 5535 5536 return (sysctl_handle_16(oidp, NULL, reg, req)); 5537 } /* ixgbe_sysctl_phy_temp */ 5538 5539 /************************************************************************ 5540 * ixgbe_sysctl_phy_overtemp_occurred 5541 * 5542 * Reports (directly from the PHY) whether the current PHY 5543 * temperature is over the overtemp threshold. 5544 ************************************************************************/ 5545 static int 5546 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 5547 { 5548 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5549 struct ixgbe_hw *hw = &sc->hw; 5550 u16 reg; 5551 5552 if (atomic_load_acq_int(&sc->recovery_mode)) 5553 return (EPERM); 5554 5555 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 5556 device_printf(iflib_get_dev(sc->ctx), 5557 "Device has no supported external thermal sensor.\n"); 5558 return (ENODEV); 5559 } 5560 5561 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 5562 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 5563 device_printf(iflib_get_dev(sc->ctx), 5564 "Error reading from PHY's temperature status register\n"); 5565 return (EAGAIN); 5566 } 5567 5568 /* Get occurrence bit */ 5569 reg = !!(reg & 0x4000); 5570 5571 return (sysctl_handle_16(oidp, 0, reg, req)); 5572 } /* ixgbe_sysctl_phy_overtemp_occurred */ 5573 5574 /************************************************************************ 5575 * ixgbe_sysctl_eee_state 5576 * 5577 * Sysctl to set EEE power saving feature 5578 * Values: 5579 * 0 - disable EEE 5580 * 1 - enable EEE 5581 * (none) - get current device EEE state 5582 ************************************************************************/ 5583 static int 5584 ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS) 5585 { 5586 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5587 device_t dev = sc->dev; 5588 if_t ifp = iflib_get_ifp(sc->ctx); 5589 int curr_eee, new_eee, error = 0; 5590 s32 retval; 5591 5592 if (atomic_load_acq_int(&sc->recovery_mode)) 5593 return (EPERM); 5594 5595 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 5596 5597 error = sysctl_handle_int(oidp, &new_eee, 0, req); 5598 if ((error) || (req->newptr == NULL)) 5599 return (error); 5600 5601 /* Nothing to do */ 5602 if (new_eee == curr_eee) 5603 return (0); 5604 5605 /* Not supported */ 5606 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 5607 return (EINVAL); 5608 5609 /* Bounds checking */ 5610 if ((new_eee < 0) || (new_eee > 1)) 5611 return (EINVAL); 5612 5613 /* If link speed is <= 1Gbps and EEE is being enabled, log info */ 5614 if (sc->hw.mac.type == ixgbe_mac_E610 && 5615 new_eee && 5616 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 5617 device_printf(dev, 5618 "Energy Efficient Ethernet (EEE) feature is not " 5619 "supported on link speeds equal to or below 1Gbps. " 5620 "EEE is supported on speeds above 1Gbps.\n"); 5621 return (EINVAL); 5622 } 5623 5624 retval = ixgbe_setup_eee(&sc->hw, new_eee); 5625 if (retval) { 5626 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 5627 return (EINVAL); 5628 } 5629 5630 /* Restart auto-neg */ 5631 if_init(ifp, ifp); 5632 5633 device_printf(dev, "New EEE state: %d\n", new_eee); 5634 5635 /* Cache new value */ 5636 if (new_eee) 5637 sc->feat_en |= IXGBE_FEATURE_EEE; 5638 else 5639 sc->feat_en &= ~IXGBE_FEATURE_EEE; 5640 5641 return (error); 5642 } /* ixgbe_sysctl_eee_state */ 5643 5644 static int 5645 ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS) 5646 { 5647 struct ixgbe_softc *sc; 5648 u32 reg, val, shift; 5649 int error, mask; 5650 5651 sc = oidp->oid_arg1; 5652 switch (oidp->oid_arg2) { 5653 case 0: 5654 reg = IXGBE_DTXTCPFLGL; 5655 shift = 0; 5656 break; 5657 case 1: 5658 reg = IXGBE_DTXTCPFLGL; 5659 shift = 16; 5660 break; 5661 case 2: 5662 reg = IXGBE_DTXTCPFLGH; 5663 shift = 0; 5664 break; 5665 default: 5666 return (EINVAL); 5667 break; 5668 } 5669 val = IXGBE_READ_REG(&sc->hw, reg); 5670 mask = (val >> shift) & 0xfff; 5671 error = sysctl_handle_int(oidp, &mask, 0, req); 5672 if (error != 0 || req->newptr == NULL) 5673 return (error); 5674 if (mask < 0 || mask > 0xfff) 5675 return (EINVAL); 5676 val = (val & ~(0xfff << shift)) | (mask << shift); 5677 IXGBE_WRITE_REG(&sc->hw, reg, val); 5678 return (0); 5679 } 5680 5681 /************************************************************************ 5682 * ixgbe_init_device_features 5683 ************************************************************************/ 5684 static void 5685 ixgbe_init_device_features(struct ixgbe_softc *sc) 5686 { 5687 s32 error; 5688 5689 sc->feat_cap = IXGBE_FEATURE_NETMAP | 5690 IXGBE_FEATURE_RSS | 5691 IXGBE_FEATURE_MSI | 5692 IXGBE_FEATURE_MSIX | 5693 IXGBE_FEATURE_LEGACY_IRQ; 5694 5695 /* Set capabilities first... */ 5696 switch (sc->hw.mac.type) { 5697 case ixgbe_mac_82598EB: 5698 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 5699 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 5700 break; 5701 case ixgbe_mac_X540: 5702 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5703 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5704 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 5705 (sc->hw.bus.func == 0)) 5706 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 5707 break; 5708 case ixgbe_mac_X550: 5709 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5710 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 5711 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5712 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5713 break; 5714 case ixgbe_mac_X550EM_x: 5715 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5716 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5717 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5718 if (sc->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR) 5719 sc->feat_cap |= IXGBE_FEATURE_EEE; 5720 break; 5721 case ixgbe_mac_X550EM_a: 5722 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5723 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5724 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5725 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 5726 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 5727 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 5728 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 5729 sc->feat_cap |= IXGBE_FEATURE_EEE; 5730 } 5731 break; 5732 case ixgbe_mac_82599EB: 5733 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5734 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5735 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 5736 (sc->hw.bus.func == 0)) 5737 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 5738 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 5739 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 5740 break; 5741 case ixgbe_mac_E610: 5742 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5743 sc->feat_cap |= IXGBE_FEATURE_DBG_DUMP; 5744 sc->feat_cap |= IXGBE_FEATURE_FW_LOGGING; 5745 error = ixgbe_get_caps(&sc->hw); 5746 if (error == 0 && sc->hw.func_caps.common_cap.eee_support != 0) 5747 sc->feat_cap |= IXGBE_FEATURE_EEE; 5748 break; 5749 default: 5750 break; 5751 } 5752 5753 /* Enabled by default... */ 5754 /* Fan failure detection */ 5755 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 5756 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 5757 /* Netmap */ 5758 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 5759 sc->feat_en |= IXGBE_FEATURE_NETMAP; 5760 /* EEE */ 5761 if (sc->feat_cap & IXGBE_FEATURE_EEE) 5762 sc->feat_en |= IXGBE_FEATURE_EEE; 5763 /* Thermal Sensor */ 5764 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 5765 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 5766 /* Recovery mode */ 5767 if (sc->feat_cap & IXGBE_FEATURE_RECOVERY_MODE) 5768 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 5769 /* FW Debug Dump */ 5770 if (sc->feat_cap & IXGBE_FEATURE_DBG_DUMP) 5771 sc->feat_en |= IXGBE_FEATURE_DBG_DUMP; 5772 /* FW Logging */ 5773 if (sc->feat_cap & IXGBE_FEATURE_FW_LOGGING) 5774 sc->feat_en |= IXGBE_FEATURE_FW_LOGGING; 5775 5776 /* Enabled via global sysctl... */ 5777 /* Flow Director */ 5778 if (ixgbe_enable_fdir) { 5779 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 5780 sc->feat_en |= IXGBE_FEATURE_FDIR; 5781 else 5782 device_printf(sc->dev, 5783 "Device does not support Flow Director." 5784 " Leaving disabled."); 5785 } 5786 /* 5787 * Message Signal Interrupts - Extended (MSI-X) 5788 * Normal MSI is only enabled if MSI-X calls fail. 5789 */ 5790 if (!ixgbe_enable_msix) 5791 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 5792 /* Receive-Side Scaling (RSS) */ 5793 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 5794 sc->feat_en |= IXGBE_FEATURE_RSS; 5795 5796 /* Disable features with unmet dependencies... */ 5797 /* No MSI-X */ 5798 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 5799 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 5800 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 5801 sc->feat_en &= ~IXGBE_FEATURE_RSS; 5802 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 5803 } 5804 } /* ixgbe_init_device_features */ 5805 5806 /************************************************************************ 5807 * ixgbe_check_fan_failure 5808 ************************************************************************/ 5809 static void 5810 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 5811 { 5812 u32 mask; 5813 5814 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 5815 IXGBE_ESDP_SDP1; 5816 5817 if (reg & mask) 5818 device_printf(sc->dev, 5819 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 5820 } /* ixgbe_check_fan_failure */ 5821 5822 /************************************************************************ 5823 * ixgbe_sbuf_fw_version 5824 ************************************************************************/ 5825 static void 5826 ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf) 5827 { 5828 struct ixgbe_nvm_version nvm_ver = {0}; 5829 const char *space = ""; 5830 5831 ixgbe_get_nvm_version(hw, &nvm_ver); /* NVM version */ 5832 ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */ 5833 ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack a build ID in Intel's SCM */ 5834 ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */ 5835 5836 /* FW version */ 5837 if ((nvm_ver.phy_fw_maj == 0x0 && 5838 nvm_ver.phy_fw_min == 0x0 && 5839 nvm_ver.phy_fw_id == 0x0) || 5840 (nvm_ver.phy_fw_maj == 0xF && 5841 nvm_ver.phy_fw_min == 0xFF && 5842 nvm_ver.phy_fw_id == 0xF)) { 5843 /* If major, minor and id numbers are set to 0, 5844 * reading FW version is unsupported. If major number 5845 * is set to 0xF, minor is set to 0xFF and id is set 5846 * to 0xF, this means that number read is invalid. */ 5847 } else 5848 sbuf_printf(buf, "fw %d.%d.%d ", 5849 nvm_ver.phy_fw_maj, nvm_ver.phy_fw_min, 5850 nvm_ver.phy_fw_id); 5851 5852 /* NVM version */ 5853 if ((nvm_ver.nvm_major == 0x0 && 5854 nvm_ver.nvm_minor == 0x0 && 5855 nvm_ver.nvm_id == 0x0) || 5856 (nvm_ver.nvm_major == 0xF && 5857 nvm_ver.nvm_minor == 0xFF && 5858 nvm_ver.nvm_id == 0xF)) { 5859 /* If major, minor and id numbers are set to 0, 5860 * reading NVM version is unsupported. If major number 5861 * is set to 0xF, minor is set to 0xFF and id is set 5862 * to 0xF, this means that number read is invalid. */ 5863 } else 5864 sbuf_printf(buf, "nvm %x.%02x.%x ", 5865 nvm_ver.nvm_major, nvm_ver.nvm_minor, nvm_ver.nvm_id); 5866 5867 if (nvm_ver.oem_valid) { 5868 sbuf_printf(buf, "NVM OEM V%d.%d R%d", nvm_ver.oem_major, 5869 nvm_ver.oem_minor, nvm_ver.oem_release); 5870 space = " "; 5871 } 5872 5873 if (nvm_ver.or_valid) { 5874 sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d", 5875 space, nvm_ver.or_major, nvm_ver.or_build, 5876 nvm_ver.or_patch); 5877 space = " "; 5878 } 5879 5880 if (nvm_ver.etk_id != ((NVM_VER_INVALID << NVM_ETK_SHIFT) | 5881 NVM_VER_INVALID | 0xFFFFFFFF)) { 5882 sbuf_printf(buf, "%seTrack 0x%08x", space, nvm_ver.etk_id); 5883 } 5884 } /* ixgbe_sbuf_fw_version */ 5885 5886 /************************************************************************ 5887 * ixgbe_print_fw_version 5888 ************************************************************************/ 5889 static void 5890 ixgbe_print_fw_version(if_ctx_t ctx) 5891 { 5892 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5893 struct ixgbe_hw *hw = &sc->hw; 5894 device_t dev = sc->dev; 5895 struct sbuf *buf; 5896 int error = 0; 5897 5898 buf = sbuf_new_auto(); 5899 if (!buf) { 5900 device_printf(dev, "Could not allocate sbuf for output.\n"); 5901 return; 5902 } 5903 5904 ixgbe_sbuf_fw_version(hw, buf); 5905 5906 error = sbuf_finish(buf); 5907 if (error) 5908 device_printf(dev, "Error finishing sbuf: %d\n", error); 5909 else if (sbuf_len(buf)) 5910 device_printf(dev, "%s\n", sbuf_data(buf)); 5911 5912 sbuf_delete(buf); 5913 } /* ixgbe_print_fw_version */ 5914 5915 /************************************************************************ 5916 * ixgbe_sysctl_print_fw_version 5917 ************************************************************************/ 5918 static int 5919 ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS) 5920 { 5921 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5922 struct ixgbe_hw *hw = &sc->hw; 5923 device_t dev = sc->dev; 5924 struct sbuf *buf; 5925 int error = 0; 5926 5927 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5928 if (!buf) { 5929 device_printf(dev, "Could not allocate sbuf for output.\n"); 5930 return (ENOMEM); 5931 } 5932 5933 ixgbe_sbuf_fw_version(hw, buf); 5934 5935 error = sbuf_finish(buf); 5936 if (error) 5937 device_printf(dev, "Error finishing sbuf: %d\n", error); 5938 5939 sbuf_delete(buf); 5940 5941 return (0); 5942 } /* ixgbe_sysctl_print_fw_version */ 5943