1 /***************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *****************************************************************************/ 33 34 #include "opt_inet.h" 35 #include "opt_inet6.h" 36 #include "opt_rss.h" 37 38 #include "ixgbe.h" 39 #include "mdio_if.h" 40 #include "ixgbe_sriov.h" 41 #include "ifdi_if.h" 42 #include "if_ix_mdio_hw.h" 43 #include "if_ix_mdio.h" 44 45 #include <net/netmap.h> 46 #include <dev/mdio/mdio.h> 47 #include <dev/netmap/netmap_kern.h> 48 49 /************************************************************************ 50 * Driver version 51 ************************************************************************/ 52 static const char ixgbe_driver_version[] = "5.0.1-k"; 53 54 /************************************************************************ 55 * PCI Device ID Table 56 * 57 * Used by probe to select devices to load on 58 * Last field stores an index into ixgbe_strings 59 * Last entry must be all 0s 60 * 61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 62 ************************************************************************/ 63 static const pci_vendor_info_t ixgbe_vendor_info_array[] = 64 { 65 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 66 "Intel(R) 82598EB AF (Dual Fiber)"), 67 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 68 "Intel(R) 82598EB AF (Fiber)"), 69 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 70 "Intel(R) 82598EB AT (CX4)"), 71 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 72 "Intel(R) 82598EB AT"), 73 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 74 "Intel(R) 82598EB AT2"), 75 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, "Intel(R) 82598"), 76 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 77 "Intel(R) 82598EB AF DA (Dual Fiber)"), 78 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 79 "Intel(R) 82598EB AT (Dual CX4)"), 80 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 81 "Intel(R) 82598EB AF (Dual Fiber LR)"), 82 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 83 "Intel(R) 82598EB AF (Dual Fiber SR)"), 84 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 85 "Intel(R) 82598EB LOM"), 86 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 87 "Intel(R) X520 82599 (KX4)"), 88 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 89 "Intel(R) X520 82599 (KX4 Mezzanine)"), 90 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 91 "Intel(R) X520 82599ES (SFI/SFP+)"), 92 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 93 "Intel(R) X520 82599 (XAUI/BX4)"), 94 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 95 "Intel(R) X520 82599 (Dual CX4)"), 96 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 97 "Intel(R) X520-T 82599 LOM"), 98 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 99 "Intel(R) X520 82599 LS"), 100 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 101 "Intel(R) X520 82599 (Combined Backplane)"), 102 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 103 "Intel(R) X520 82599 (Backplane w/FCoE)"), 104 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 105 "Intel(R) X520 82599 (Dual SFP+)"), 106 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 107 "Intel(R) X520 82599 (Dual SFP+ w/FCoE)"), 108 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 109 "Intel(R) X520-1 82599EN (SFP+)"), 110 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 111 "Intel(R) X520-4 82599 (Quad SFP+)"), 112 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 113 "Intel(R) X520-Q1 82599 (QSFP+)"), 114 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 115 "Intel(R) X540-AT2"), 116 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"), 117 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"), 118 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"), 119 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 120 "Intel(R) X552 (KR Backplane)"), 121 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 122 "Intel(R) X552 (KX4 Backplane)"), 123 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 124 "Intel(R) X552/X557-AT (10GBASE-T)"), 125 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 126 "Intel(R) X552 (1000BASE-T)"), 127 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 128 "Intel(R) X552 (SFP+)"), 129 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 130 "Intel(R) X553 (KR Backplane)"), 131 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 132 "Intel(R) X553 L (KR Backplane)"), 133 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 134 "Intel(R) X553 (SFP+)"), 135 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 136 "Intel(R) X553 N (SFP+)"), 137 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 138 "Intel(R) X553 (1GbE SGMII)"), 139 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 140 "Intel(R) X553 L (1GbE SGMII)"), 141 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 142 "Intel(R) X553/X557-AT (10GBASE-T)"), 143 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 144 "Intel(R) X553 (1GbE)"), 145 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 146 "Intel(R) X553 L (1GbE)"), 147 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 148 "Intel(R) X540-T2 (Bypass)"), 149 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 150 "Intel(R) X520 82599 (Bypass)"), 151 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_BACKPLANE, 152 "Intel(R) E610 (Backplane)"), 153 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SFP, 154 "Intel(R) E610 (SFP)"), 155 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_2_5G_T, 156 "Intel(R) E610 (2.5 GbE)"), 157 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_10G_T, 158 "Intel(R) E610 (10 GbE)"), 159 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SGMII, 160 "Intel(R) E610 (SGMII)"), 161 /* required last entry */ 162 PVID_END 163 }; 164 165 static void *ixgbe_register(device_t); 166 static int ixgbe_if_attach_pre(if_ctx_t); 167 static int ixgbe_if_attach_post(if_ctx_t); 168 static int ixgbe_if_detach(if_ctx_t); 169 static int ixgbe_if_shutdown(if_ctx_t); 170 static int ixgbe_if_suspend(if_ctx_t); 171 static int ixgbe_if_resume(if_ctx_t); 172 173 static void ixgbe_if_stop(if_ctx_t); 174 void ixgbe_if_enable_intr(if_ctx_t); 175 static void ixgbe_if_disable_intr(if_ctx_t); 176 static void ixgbe_link_intr_enable(if_ctx_t); 177 static int ixgbe_if_rx_queue_intr_enable(if_ctx_t, uint16_t); 178 static void ixgbe_if_media_status(if_ctx_t, struct ifmediareq *); 179 static int ixgbe_if_media_change(if_ctx_t); 180 static int ixgbe_if_msix_intr_assign(if_ctx_t, int); 181 static int ixgbe_if_mtu_set(if_ctx_t, uint32_t); 182 static void ixgbe_if_crcstrip_set(if_ctx_t, int, int); 183 static void ixgbe_if_multi_set(if_ctx_t); 184 static int ixgbe_if_promisc_set(if_ctx_t, int); 185 static int ixgbe_if_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 186 int); 187 static int ixgbe_if_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, 188 int); 189 static void ixgbe_if_queues_free(if_ctx_t); 190 static void ixgbe_if_timer(if_ctx_t, uint16_t); 191 static const char *ixgbe_link_speed_to_str(u32 link_speed); 192 static void ixgbe_if_update_admin_status(if_ctx_t); 193 static void ixgbe_if_vlan_register(if_ctx_t, u16); 194 static void ixgbe_if_vlan_unregister(if_ctx_t, u16); 195 static int ixgbe_if_i2c_req(if_ctx_t, struct ifi2creq *); 196 static bool ixgbe_if_needs_restart(if_ctx_t, enum iflib_restart_event); 197 int ixgbe_intr(void *); 198 199 static int ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data); 200 201 /************************************************************************ 202 * Function prototypes 203 ************************************************************************/ 204 static uint64_t ixgbe_if_get_counter(if_ctx_t, ift_counter); 205 206 static void ixgbe_enable_queue(struct ixgbe_softc *, u32); 207 static void ixgbe_disable_queue(struct ixgbe_softc *, u32); 208 static void ixgbe_add_device_sysctls(if_ctx_t); 209 static int ixgbe_allocate_pci_resources(if_ctx_t); 210 static int ixgbe_setup_low_power_mode(if_ctx_t); 211 212 static void ixgbe_config_dmac(struct ixgbe_softc *); 213 static void ixgbe_configure_ivars(struct ixgbe_softc *); 214 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 215 static u8 *ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 216 static bool ixgbe_sfp_probe(if_ctx_t); 217 218 static void ixgbe_free_pci_resources(if_ctx_t); 219 220 static int ixgbe_msix_link(void *); 221 static int ixgbe_msix_que(void *); 222 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 223 static void ixgbe_initialize_receive_units(if_ctx_t); 224 static void ixgbe_initialize_transmit_units(if_ctx_t); 225 226 static int ixgbe_setup_interface(if_ctx_t); 227 static void ixgbe_init_device_features(struct ixgbe_softc *); 228 static void ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 229 static void ixgbe_sbuf_fw_version(struct ixgbe_hw *, struct sbuf *); 230 static void ixgbe_print_fw_version(if_ctx_t); 231 static void ixgbe_add_media_types(if_ctx_t); 232 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 233 static void ixgbe_config_link(if_ctx_t); 234 static void ixgbe_get_slot_info(struct ixgbe_softc *); 235 static void ixgbe_fw_mode_timer(void *); 236 static void ixgbe_check_wol_support(struct ixgbe_softc *); 237 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 238 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 239 240 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 241 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 242 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 243 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 244 static void ixgbe_setup_vlan_hw_support(if_ctx_t); 245 static void ixgbe_config_gpie(struct ixgbe_softc *); 246 static void ixgbe_config_delay_values(struct ixgbe_softc *); 247 248 static void ixgbe_add_debug_sysctls(struct ixgbe_softc *sc); 249 static void ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc); 250 static int ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 251 static u8 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, 252 struct sbuf *sbuf, u8 cluster_id); 253 static int ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd); 254 255 /* Sysctl handlers */ 256 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS); 257 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS); 258 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS); 259 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 260 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 261 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 262 static int ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS); 263 #ifdef IXGBE_DEBUG 264 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 265 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 266 #endif 267 static int ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS); 268 static int ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS); 269 static int ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS); 270 static int ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS); 271 static int ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS); 272 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 273 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 274 static int ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS); 275 276 static int ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS); 277 static int ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS); 278 279 /* Deferred interrupt tasklets */ 280 static void ixgbe_handle_msf(void *); 281 static void ixgbe_handle_mod(void *); 282 static void ixgbe_handle_phy(void *); 283 static void ixgbe_handle_fw_event(void *); 284 285 static int ixgbe_enable_lse(struct ixgbe_softc *sc); 286 static int ixgbe_disable_lse(struct ixgbe_softc *sc); 287 288 /************************************************************************ 289 * FreeBSD Device Interface Entry Points 290 ************************************************************************/ 291 static device_method_t ix_methods[] = { 292 /* Device interface */ 293 DEVMETHOD(device_register, ixgbe_register), 294 DEVMETHOD(device_probe, iflib_device_probe), 295 DEVMETHOD(device_attach, iflib_device_attach), 296 DEVMETHOD(device_detach, iflib_device_detach), 297 DEVMETHOD(device_shutdown, iflib_device_shutdown), 298 DEVMETHOD(device_suspend, iflib_device_suspend), 299 DEVMETHOD(device_resume, iflib_device_resume), 300 #ifdef PCI_IOV 301 DEVMETHOD(pci_iov_init, iflib_device_iov_init), 302 DEVMETHOD(pci_iov_uninit, iflib_device_iov_uninit), 303 DEVMETHOD(pci_iov_add_vf, iflib_device_iov_add_vf), 304 #endif /* PCI_IOV */ 305 DEVMETHOD(bus_add_child, device_add_child_ordered), 306 DEVMETHOD(mdio_readreg, ixgbe_mdio_readreg_c22), 307 DEVMETHOD(mdio_writereg, ixgbe_mdio_writereg_c22), 308 309 DEVMETHOD_END 310 }; 311 312 static driver_t ix_driver = { 313 "ix", ix_methods, sizeof(struct ixgbe_softc), 314 }; 315 316 DRIVER_MODULE(mdio, ix, mdio_driver, 0, 0); /* needs to happen before ix */ 317 DRIVER_MODULE_ORDERED(ix, pci, ix_driver, NULL, NULL, SI_ORDER_ANY); /* needs to be last */ 318 IFLIB_PNP_INFO(pci, ix_driver, ixgbe_vendor_info_array); 319 MODULE_DEPEND(ix, pci, 1, 1, 1); 320 MODULE_DEPEND(ix, ether, 1, 1, 1); 321 MODULE_DEPEND(ix, iflib, 1, 1, 1); 322 MODULE_DEPEND(ix, mdio, 1, 1, 1); 323 324 static device_method_t ixgbe_if_methods[] = { 325 DEVMETHOD(ifdi_attach_pre, ixgbe_if_attach_pre), 326 DEVMETHOD(ifdi_attach_post, ixgbe_if_attach_post), 327 DEVMETHOD(ifdi_detach, ixgbe_if_detach), 328 DEVMETHOD(ifdi_shutdown, ixgbe_if_shutdown), 329 DEVMETHOD(ifdi_suspend, ixgbe_if_suspend), 330 DEVMETHOD(ifdi_resume, ixgbe_if_resume), 331 DEVMETHOD(ifdi_init, ixgbe_if_init), 332 DEVMETHOD(ifdi_stop, ixgbe_if_stop), 333 DEVMETHOD(ifdi_msix_intr_assign, ixgbe_if_msix_intr_assign), 334 DEVMETHOD(ifdi_intr_enable, ixgbe_if_enable_intr), 335 DEVMETHOD(ifdi_intr_disable, ixgbe_if_disable_intr), 336 DEVMETHOD(ifdi_link_intr_enable, ixgbe_link_intr_enable), 337 DEVMETHOD(ifdi_tx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 338 DEVMETHOD(ifdi_rx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable), 339 DEVMETHOD(ifdi_tx_queues_alloc, ixgbe_if_tx_queues_alloc), 340 DEVMETHOD(ifdi_rx_queues_alloc, ixgbe_if_rx_queues_alloc), 341 DEVMETHOD(ifdi_queues_free, ixgbe_if_queues_free), 342 DEVMETHOD(ifdi_update_admin_status, ixgbe_if_update_admin_status), 343 DEVMETHOD(ifdi_multi_set, ixgbe_if_multi_set), 344 DEVMETHOD(ifdi_mtu_set, ixgbe_if_mtu_set), 345 DEVMETHOD(ifdi_crcstrip_set, ixgbe_if_crcstrip_set), 346 DEVMETHOD(ifdi_media_status, ixgbe_if_media_status), 347 DEVMETHOD(ifdi_media_change, ixgbe_if_media_change), 348 DEVMETHOD(ifdi_promisc_set, ixgbe_if_promisc_set), 349 DEVMETHOD(ifdi_timer, ixgbe_if_timer), 350 DEVMETHOD(ifdi_vlan_register, ixgbe_if_vlan_register), 351 DEVMETHOD(ifdi_vlan_unregister, ixgbe_if_vlan_unregister), 352 DEVMETHOD(ifdi_get_counter, ixgbe_if_get_counter), 353 DEVMETHOD(ifdi_i2c_req, ixgbe_if_i2c_req), 354 DEVMETHOD(ifdi_needs_restart, ixgbe_if_needs_restart), 355 DEVMETHOD(ifdi_priv_ioctl, ixgbe_if_priv_ioctl), 356 #ifdef PCI_IOV 357 DEVMETHOD(ifdi_iov_init, ixgbe_if_iov_init), 358 DEVMETHOD(ifdi_iov_uninit, ixgbe_if_iov_uninit), 359 DEVMETHOD(ifdi_iov_vf_add, ixgbe_if_iov_vf_add), 360 #endif /* PCI_IOV */ 361 DEVMETHOD_END 362 }; 363 364 /* 365 * TUNEABLE PARAMETERS: 366 */ 367 368 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 369 "IXGBE driver parameters"); 370 static driver_t ixgbe_if_driver = { 371 "ixgbe_if", ixgbe_if_methods, sizeof(struct ixgbe_softc) 372 }; 373 374 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 375 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 376 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 377 378 /* Flow control setting, default to full */ 379 static int ixgbe_flow_control = ixgbe_fc_full; 380 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 381 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 382 383 /* Advertise Speed, default to 0 (auto) */ 384 static int ixgbe_advertise_speed = 0; 385 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN, 386 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters"); 387 388 /* 389 * Smart speed setting, default to on 390 * this only works as a compile option 391 * right now as its during attach, set 392 * this to 'ixgbe_smart_speed_off' to 393 * disable. 394 */ 395 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 396 397 /* 398 * MSI-X should be the default for best performance, 399 * but this allows it to be forced off for testing. 400 */ 401 static int ixgbe_enable_msix = 1; 402 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 403 0, 404 "Enable MSI-X interrupts"); 405 406 /* 407 * Defining this on will allow the use 408 * of unsupported SFP+ modules, note that 409 * doing so you are on your own :) 410 */ 411 static int allow_unsupported_sfp = false; 412 SYSCTL_INT(_hw_ix, OID_AUTO, unsupported_sfp, CTLFLAG_RDTUN, 413 &allow_unsupported_sfp, 0, 414 "Allow unsupported SFP modules...use at your own risk"); 415 416 /* 417 * Not sure if Flow Director is fully baked, 418 * so we'll default to turning it off. 419 */ 420 static int ixgbe_enable_fdir = 0; 421 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 422 0, 423 "Enable Flow Director"); 424 425 /* Receive-Side Scaling */ 426 static int ixgbe_enable_rss = 1; 427 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 428 0, 429 "Enable Receive-Side Scaling (RSS)"); 430 431 /* 432 * AIM: Adaptive Interrupt Moderation 433 * which means that the interrupt rate 434 * is varied over time based on the 435 * traffic for that interrupt vector 436 */ 437 static int ixgbe_enable_aim = false; 438 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 439 0, 440 "Enable adaptive interrupt moderation"); 441 442 #if 0 443 /* Keep running tab on them for sanity check */ 444 static int ixgbe_total_ports; 445 #endif 446 447 MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 448 449 /* 450 * For Flow Director: this is the number of TX packets we sample 451 * for the filter pool, this means every 20th packet will be probed. 452 * 453 * This feature can be disabled by setting this to 0. 454 */ 455 static int atr_sample_rate = 20; 456 457 extern struct if_txrx ixgbe_txrx; 458 459 static struct if_shared_ctx ixgbe_sctx_init = { 460 .isc_magic = IFLIB_MAGIC, 461 .isc_q_align = PAGE_SIZE,/* max(DBA_ALIGN, PAGE_SIZE) */ 462 .isc_tx_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 463 .isc_tx_maxsegsize = PAGE_SIZE, 464 .isc_tso_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header), 465 .isc_tso_maxsegsize = PAGE_SIZE, 466 .isc_rx_maxsize = PAGE_SIZE*4, 467 .isc_rx_nsegments = 1, 468 .isc_rx_maxsegsize = PAGE_SIZE*4, 469 .isc_nfl = 1, 470 .isc_ntxqs = 1, 471 .isc_nrxqs = 1, 472 473 .isc_admin_intrcnt = 1, 474 .isc_vendor_info = ixgbe_vendor_info_array, 475 .isc_driver_version = ixgbe_driver_version, 476 .isc_driver = &ixgbe_if_driver, 477 .isc_flags = IFLIB_TSO_INIT_IP, 478 479 .isc_nrxd_min = {MIN_RXD}, 480 .isc_ntxd_min = {MIN_TXD}, 481 .isc_nrxd_max = {MAX_RXD}, 482 .isc_ntxd_max = {MAX_TXD}, 483 .isc_nrxd_default = {DEFAULT_RXD}, 484 .isc_ntxd_default = {DEFAULT_TXD}, 485 }; 486 487 /************************************************************************ 488 * ixgbe_if_tx_queues_alloc 489 ************************************************************************/ 490 static int 491 ixgbe_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 492 int ntxqs, int ntxqsets) 493 { 494 struct ixgbe_softc *sc = iflib_get_softc(ctx); 495 if_softc_ctx_t scctx = sc->shared; 496 struct ix_tx_queue *que; 497 int i, j, error; 498 499 MPASS(sc->num_tx_queues > 0); 500 MPASS(sc->num_tx_queues == ntxqsets); 501 MPASS(ntxqs == 1); 502 503 /* Allocate queue structure memory */ 504 sc->tx_queues = 505 (struct ix_tx_queue *)malloc(sizeof(struct ix_tx_queue) * 506 ntxqsets, M_IXGBE, M_NOWAIT | M_ZERO); 507 if (!sc->tx_queues) { 508 device_printf(iflib_get_dev(ctx), 509 "Unable to allocate TX ring memory\n"); 510 return (ENOMEM); 511 } 512 513 for (i = 0, que = sc->tx_queues; i < ntxqsets; i++, que++) { 514 struct tx_ring *txr = &que->txr; 515 516 /* In case SR-IOV is enabled, align the index properly */ 517 txr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 518 519 txr->sc = que->sc = sc; 520 521 /* Allocate report status array */ 522 txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) * 523 scctx->isc_ntxd[0], M_IXGBE, M_NOWAIT | M_ZERO); 524 if (txr->tx_rsq == NULL) { 525 error = ENOMEM; 526 goto fail; 527 } 528 for (j = 0; j < scctx->isc_ntxd[0]; j++) 529 txr->tx_rsq[j] = QIDX_INVALID; 530 /* get virtual and physical address of the hardware queues */ 531 txr->tail = IXGBE_TDT(txr->me); 532 txr->tx_base = (union ixgbe_adv_tx_desc *)vaddrs[i]; 533 txr->tx_paddr = paddrs[i]; 534 535 txr->bytes = 0; 536 txr->total_packets = 0; 537 538 /* Set the rate at which we sample packets */ 539 if (sc->feat_en & IXGBE_FEATURE_FDIR) 540 txr->atr_sample = atr_sample_rate; 541 542 } 543 544 device_printf(iflib_get_dev(ctx), "allocated for %d queues\n", 545 sc->num_tx_queues); 546 547 return (0); 548 549 fail: 550 ixgbe_if_queues_free(ctx); 551 552 return (error); 553 } /* ixgbe_if_tx_queues_alloc */ 554 555 /************************************************************************ 556 * ixgbe_if_rx_queues_alloc 557 ************************************************************************/ 558 static int 559 ixgbe_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, 560 int nrxqs, int nrxqsets) 561 { 562 struct ixgbe_softc *sc = iflib_get_softc(ctx); 563 struct ix_rx_queue *que; 564 int i; 565 566 MPASS(sc->num_rx_queues > 0); 567 MPASS(sc->num_rx_queues == nrxqsets); 568 MPASS(nrxqs == 1); 569 570 /* Allocate queue structure memory */ 571 sc->rx_queues = 572 (struct ix_rx_queue *)malloc(sizeof(struct ix_rx_queue)*nrxqsets, 573 M_IXGBE, M_NOWAIT | M_ZERO); 574 if (!sc->rx_queues) { 575 device_printf(iflib_get_dev(ctx), 576 "Unable to allocate TX ring memory\n"); 577 return (ENOMEM); 578 } 579 580 for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) { 581 struct rx_ring *rxr = &que->rxr; 582 583 /* In case SR-IOV is enabled, align the index properly */ 584 rxr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i); 585 586 rxr->sc = que->sc = sc; 587 588 /* get the virtual and physical address of the hw queues */ 589 rxr->tail = IXGBE_RDT(rxr->me); 590 rxr->rx_base = (union ixgbe_adv_rx_desc *)vaddrs[i]; 591 rxr->rx_paddr = paddrs[i]; 592 rxr->bytes = 0; 593 rxr->que = que; 594 } 595 596 device_printf(iflib_get_dev(ctx), "allocated for %d rx queues\n", 597 sc->num_rx_queues); 598 599 return (0); 600 } /* ixgbe_if_rx_queues_alloc */ 601 602 /************************************************************************ 603 * ixgbe_if_queues_free 604 ************************************************************************/ 605 static void 606 ixgbe_if_queues_free(if_ctx_t ctx) 607 { 608 struct ixgbe_softc *sc = iflib_get_softc(ctx); 609 struct ix_tx_queue *tx_que = sc->tx_queues; 610 struct ix_rx_queue *rx_que = sc->rx_queues; 611 int i; 612 613 if (tx_que != NULL) { 614 for (i = 0; i < sc->num_tx_queues; i++, tx_que++) { 615 struct tx_ring *txr = &tx_que->txr; 616 if (txr->tx_rsq == NULL) 617 break; 618 619 free(txr->tx_rsq, M_IXGBE); 620 txr->tx_rsq = NULL; 621 } 622 623 free(sc->tx_queues, M_IXGBE); 624 sc->tx_queues = NULL; 625 } 626 if (rx_que != NULL) { 627 free(sc->rx_queues, M_IXGBE); 628 sc->rx_queues = NULL; 629 } 630 } /* ixgbe_if_queues_free */ 631 632 /************************************************************************ 633 * ixgbe_initialize_rss_mapping 634 ************************************************************************/ 635 static void 636 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 637 { 638 struct ixgbe_hw *hw = &sc->hw; 639 u32 reta = 0, mrqc, rss_key[10]; 640 int queue_id, table_size, index_mult; 641 int i, j; 642 u32 rss_hash_config; 643 644 if (sc->feat_en & IXGBE_FEATURE_RSS) { 645 /* Fetch the configured RSS key */ 646 rss_getkey((uint8_t *)&rss_key); 647 } else { 648 /* set up random bits */ 649 arc4rand(&rss_key, sizeof(rss_key), 0); 650 } 651 652 /* Set multiplier for RETA setup and table size based on MAC */ 653 index_mult = 0x1; 654 table_size = 128; 655 switch (sc->hw.mac.type) { 656 case ixgbe_mac_82598EB: 657 index_mult = 0x11; 658 break; 659 case ixgbe_mac_X550: 660 case ixgbe_mac_X550EM_x: 661 case ixgbe_mac_X550EM_a: 662 case ixgbe_mac_E610: 663 table_size = 512; 664 break; 665 default: 666 break; 667 } 668 669 /* Set up the redirection table */ 670 for (i = 0, j = 0; i < table_size; i++, j++) { 671 if (j == sc->num_rx_queues) 672 j = 0; 673 674 if (sc->feat_en & IXGBE_FEATURE_RSS) { 675 /* 676 * Fetch the RSS bucket id for the given indirection 677 * entry. Cap it at the number of configured buckets 678 * (which is num_rx_queues.) 679 */ 680 queue_id = rss_get_indirection_to_bucket(i); 681 queue_id = queue_id % sc->num_rx_queues; 682 } else 683 queue_id = (j * index_mult); 684 685 /* 686 * The low 8 bits are for hash value (n+0); 687 * The next 8 bits are for hash value (n+1), etc. 688 */ 689 reta = reta >> 8; 690 reta = reta | (((uint32_t)queue_id) << 24); 691 if ((i & 3) == 3) { 692 if (i < 128) 693 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 694 else 695 IXGBE_WRITE_REG(hw, 696 IXGBE_ERETA((i >> 2) - 32), reta); 697 reta = 0; 698 } 699 } 700 701 /* Now fill our hash function seeds */ 702 for (i = 0; i < 10; i++) 703 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 704 705 /* Perform hash on these packet types */ 706 if (sc->feat_en & IXGBE_FEATURE_RSS) 707 rss_hash_config = rss_gethashconfig(); 708 else { 709 /* 710 * Disable UDP - IP fragments aren't currently being handled 711 * and so we end up with a mix of 2-tuple and 4-tuple 712 * traffic. 713 */ 714 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 | 715 RSS_HASHTYPE_RSS_TCP_IPV4 | 716 RSS_HASHTYPE_RSS_IPV6 | 717 RSS_HASHTYPE_RSS_TCP_IPV6 | 718 RSS_HASHTYPE_RSS_IPV6_EX | 719 RSS_HASHTYPE_RSS_TCP_IPV6_EX; 720 } 721 722 mrqc = ixgbe_get_mrqc(sc->iov_mode); 723 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 724 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 725 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 726 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 727 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 728 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 729 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 730 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 731 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 732 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 733 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 734 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 735 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 736 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 737 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 738 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 739 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 740 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 741 742 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 743 } /* ixgbe_initialize_rss_mapping */ 744 745 /************************************************************************ 746 * ixgbe_initialize_receive_units - Setup receive registers and features. 747 ************************************************************************/ 748 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 749 750 static void 751 ixgbe_initialize_receive_units(if_ctx_t ctx) 752 { 753 struct ixgbe_softc *sc = iflib_get_softc(ctx); 754 if_softc_ctx_t scctx = sc->shared; 755 struct ixgbe_hw *hw = &sc->hw; 756 if_t ifp = iflib_get_ifp(ctx); 757 struct ix_rx_queue *que; 758 int i, j; 759 u32 bufsz, fctrl, srrctl, rxcsum; 760 u32 hlreg; 761 762 /* 763 * Make sure receives are disabled while 764 * setting up the descriptor ring 765 */ 766 ixgbe_disable_rx(hw); 767 768 /* Enable broadcasts */ 769 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 770 fctrl |= IXGBE_FCTRL_BAM; 771 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 772 fctrl |= IXGBE_FCTRL_DPF; 773 fctrl |= IXGBE_FCTRL_PMCF; 774 } 775 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 776 777 /* Set for Jumbo Frames? */ 778 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 779 if (if_getmtu(ifp) > ETHERMTU) 780 hlreg |= IXGBE_HLREG0_JUMBOEN; 781 else 782 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 783 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 784 785 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 786 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 787 788 /* Setup the Base and Length of the Rx Descriptor Ring */ 789 for (i = 0, que = sc->rx_queues; i < sc->num_rx_queues; i++, que++) { 790 struct rx_ring *rxr = &que->rxr; 791 u64 rdba = rxr->rx_paddr; 792 793 j = rxr->me; 794 795 /* Setup the Base and Length of the Rx Descriptor Ring */ 796 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 797 (rdba & 0x00000000ffffffffULL)); 798 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 799 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 800 scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc)); 801 802 /* Set up the SRRCTL register */ 803 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 804 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 805 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 806 srrctl |= bufsz; 807 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 808 809 /* 810 * Set DROP_EN iff we have no flow control and >1 queue. 811 * Note that srrctl was cleared shortly before during reset, 812 * so we do not need to clear the bit, but do it just in case 813 * this code is moved elsewhere. 814 */ 815 if (sc->num_rx_queues > 1 && 816 sc->hw.fc.requested_mode == ixgbe_fc_none) { 817 srrctl |= IXGBE_SRRCTL_DROP_EN; 818 } else { 819 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 820 } 821 822 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 823 824 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 825 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 826 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 827 828 /* Set the driver rx tail address */ 829 rxr->tail = IXGBE_RDT(rxr->me); 830 } 831 832 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 833 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 834 IXGBE_PSRTYPE_UDPHDR | 835 IXGBE_PSRTYPE_IPV4HDR | 836 IXGBE_PSRTYPE_IPV6HDR; 837 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 838 } 839 840 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 841 842 ixgbe_initialize_rss_mapping(sc); 843 844 if (sc->feat_en & IXGBE_FEATURE_RSS) { 845 /* RSS and RX IPP Checksum are mutually exclusive */ 846 rxcsum |= IXGBE_RXCSUM_PCSD; 847 } 848 849 if (if_getcapenable(ifp) & IFCAP_RXCSUM) 850 rxcsum |= IXGBE_RXCSUM_PCSD; 851 852 /* This is useful for calculating UDP/IP fragment checksums */ 853 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 854 rxcsum |= IXGBE_RXCSUM_IPPCSE; 855 856 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 857 858 } /* ixgbe_initialize_receive_units */ 859 860 /************************************************************************ 861 * ixgbe_initialize_transmit_units - Enable transmit units. 862 ************************************************************************/ 863 static void 864 ixgbe_initialize_transmit_units(if_ctx_t ctx) 865 { 866 struct ixgbe_softc *sc = iflib_get_softc(ctx); 867 struct ixgbe_hw *hw = &sc->hw; 868 if_softc_ctx_t scctx = sc->shared; 869 struct ix_tx_queue *que; 870 int i; 871 872 /* Setup the Base and Length of the Tx Descriptor Ring */ 873 for (i = 0, que = sc->tx_queues; i < sc->num_tx_queues; 874 i++, que++) { 875 struct tx_ring *txr = &que->txr; 876 u64 tdba = txr->tx_paddr; 877 u32 txctrl = 0; 878 int j = txr->me; 879 880 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 881 (tdba & 0x00000000ffffffffULL)); 882 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 883 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 884 scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc)); 885 886 /* Setup the HW Tx Head and Tail descriptor pointers */ 887 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 888 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 889 890 /* Cache the tail address */ 891 txr->tail = IXGBE_TDT(txr->me); 892 893 txr->tx_rs_cidx = txr->tx_rs_pidx; 894 txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1; 895 for (int k = 0; k < scctx->isc_ntxd[0]; k++) 896 txr->tx_rsq[k] = QIDX_INVALID; 897 898 /* Disable Head Writeback */ 899 /* 900 * Note: for X550 series devices, these registers are actually 901 * prefixed with TPH_ isntead of DCA_, but the addresses and 902 * fields remain the same. 903 */ 904 switch (hw->mac.type) { 905 case ixgbe_mac_82598EB: 906 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 907 break; 908 default: 909 txctrl = 910 IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 911 break; 912 } 913 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 914 switch (hw->mac.type) { 915 case ixgbe_mac_82598EB: 916 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 917 break; 918 default: 919 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), 920 txctrl); 921 break; 922 } 923 924 } 925 926 if (hw->mac.type != ixgbe_mac_82598EB) { 927 u32 dmatxctl, rttdcs; 928 929 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 930 dmatxctl |= IXGBE_DMATXCTL_TE; 931 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 932 /* Disable arbiter to set MTQC */ 933 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 934 rttdcs |= IXGBE_RTTDCS_ARBDIS; 935 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 936 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 937 ixgbe_get_mtqc(sc->iov_mode)); 938 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 939 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 940 } 941 942 } /* ixgbe_initialize_transmit_units */ 943 944 static int 945 ixgbe_check_fw_api_version(struct ixgbe_softc *sc) 946 { 947 struct ixgbe_hw *hw = &sc->hw; 948 if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) { 949 device_printf(sc->dev, 950 "The driver for the device stopped because the NVM " 951 "image is newer than expected. You must install the " 952 "most recent version of the network driver.\n"); 953 return (EOPNOTSUPP); 954 } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR && 955 hw->api_min_ver > (IXGBE_FW_API_VER_MINOR + 2)) { 956 device_printf(sc->dev, 957 "The driver for the device detected a newer version of " 958 "the NVM image than expected. Please install the most " 959 "recent version of the network driver.\n"); 960 } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR || 961 hw->api_min_ver < IXGBE_FW_API_VER_MINOR - 2) { 962 device_printf(sc->dev, 963 "The driver for the device detected an older version " 964 "of the NVM image than expected. " 965 "Please update the NVM image.\n"); 966 } 967 return (0); 968 } 969 970 /************************************************************************ 971 * ixgbe_register 972 ************************************************************************/ 973 static void * 974 ixgbe_register(device_t dev) 975 { 976 return (&ixgbe_sctx_init); 977 } /* ixgbe_register */ 978 979 /************************************************************************ 980 * ixgbe_if_attach_pre - Device initialization routine, part 1 981 * 982 * Called when the driver is being loaded. 983 * Identifies the type of hardware, initializes the hardware, 984 * and initializes iflib structures. 985 * 986 * return 0 on success, positive on failure 987 ************************************************************************/ 988 static int 989 ixgbe_if_attach_pre(if_ctx_t ctx) 990 { 991 struct ixgbe_softc *sc; 992 device_t dev; 993 if_softc_ctx_t scctx; 994 struct ixgbe_hw *hw; 995 int error = 0; 996 u32 ctrl_ext; 997 size_t i; 998 999 INIT_DEBUGOUT("ixgbe_attach: begin"); 1000 1001 /* Allocate, clear, and link in our adapter structure */ 1002 dev = iflib_get_dev(ctx); 1003 sc = iflib_get_softc(ctx); 1004 sc->hw.back = sc; 1005 sc->ctx = ctx; 1006 sc->dev = dev; 1007 scctx = sc->shared = iflib_get_softc_ctx(ctx); 1008 sc->media = iflib_get_media(ctx); 1009 hw = &sc->hw; 1010 1011 /* Determine hardware revision */ 1012 hw->vendor_id = pci_get_vendor(dev); 1013 hw->device_id = pci_get_device(dev); 1014 hw->revision_id = pci_get_revid(dev); 1015 hw->subsystem_vendor_id = pci_get_subvendor(dev); 1016 hw->subsystem_device_id = pci_get_subdevice(dev); 1017 1018 /* Do base PCI setup - map BAR0 */ 1019 if (ixgbe_allocate_pci_resources(ctx)) { 1020 device_printf(dev, "Allocation of PCI resources failed\n"); 1021 return (ENXIO); 1022 } 1023 1024 /* let hardware know driver is loaded */ 1025 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1026 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 1027 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 1028 1029 /* 1030 * Initialize the shared code 1031 */ 1032 if (ixgbe_init_shared_code(hw) != 0) { 1033 device_printf(dev, "Unable to initialize the shared code\n"); 1034 error = ENXIO; 1035 goto err_pci; 1036 } 1037 1038 if (hw->mac.type == ixgbe_mac_E610) 1039 ixgbe_init_aci(hw); 1040 1041 sc->do_debug_dump = false; 1042 1043 if (hw->mac.ops.fw_recovery_mode && 1044 hw->mac.ops.fw_recovery_mode(hw)) { 1045 device_printf(dev, 1046 "Firmware recovery mode detected. Limiting " 1047 "functionality.\nRefer to the Intel(R) Ethernet Adapters " 1048 "and Devices User Guide for details on firmware recovery " 1049 "mode."); 1050 error = ENOSYS; 1051 goto err_pci; 1052 } 1053 1054 /* 82598 Does not support SR-IOV, initialize everything else */ 1055 if (hw->mac.type >= ixgbe_mac_82599_vf) { 1056 for (i = 0; i < sc->num_vfs; i++) 1057 hw->mbx.ops[i].init_params(hw); 1058 } 1059 1060 hw->allow_unsupported_sfp = allow_unsupported_sfp; 1061 1062 if (hw->mac.type != ixgbe_mac_82598EB) 1063 hw->phy.smart_speed = ixgbe_smart_speed; 1064 1065 ixgbe_init_device_features(sc); 1066 1067 /* Enable WoL (if supported) */ 1068 ixgbe_check_wol_support(sc); 1069 1070 /* Verify adapter fan is still functional (if applicable) */ 1071 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 1072 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 1073 ixgbe_check_fan_failure(sc, esdp, false); 1074 } 1075 1076 /* Ensure SW/FW semaphore is free */ 1077 ixgbe_init_swfw_semaphore(hw); 1078 1079 /* Enable EEE power saving */ 1080 if (sc->feat_en & IXGBE_FEATURE_EEE) 1081 hw->mac.ops.setup_eee(hw, true); 1082 1083 /* Set an initial default flow control value */ 1084 hw->fc.requested_mode = ixgbe_flow_control; 1085 1086 hw->phy.reset_if_overtemp = true; 1087 error = ixgbe_reset_hw(hw); 1088 hw->phy.reset_if_overtemp = false; 1089 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 1090 /* 1091 * No optics in this port, set up 1092 * so the timer routine will probe 1093 * for later insertion. 1094 */ 1095 sc->sfp_probe = true; 1096 error = 0; 1097 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1098 device_printf(dev, "Unsupported SFP+ module detected!\n"); 1099 error = EIO; 1100 goto err_pci; 1101 } else if (error) { 1102 device_printf(dev, "Hardware initialization failed\n"); 1103 error = EIO; 1104 goto err_pci; 1105 } 1106 1107 /* Make sure we have a good EEPROM before we read from it */ 1108 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1109 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 1110 error = EIO; 1111 goto err_pci; 1112 } 1113 1114 error = ixgbe_start_hw(hw); 1115 switch (error) { 1116 case IXGBE_ERR_EEPROM_VERSION: 1117 device_printf(dev, 1118 "This device is a pre-production adapter/LOM. Please be" 1119 " aware there may be issues associated with your" 1120 " hardware.\nIf you are experiencing problems please" 1121 " contact your Intel or hardware representative who" 1122 " provided you with this hardware.\n"); 1123 break; 1124 case IXGBE_ERR_SFP_NOT_SUPPORTED: 1125 device_printf(dev, "Unsupported SFP+ Module\n"); 1126 error = EIO; 1127 goto err_pci; 1128 case IXGBE_ERR_SFP_NOT_PRESENT: 1129 device_printf(dev, "No SFP+ Module found\n"); 1130 /* falls thru */ 1131 default: 1132 break; 1133 } 1134 1135 /* Check the FW API version and enable FW logging support for E610 */ 1136 if (hw->mac.type == ixgbe_mac_E610) { 1137 if (ixgbe_check_fw_api_version(sc)) { 1138 error = EIO; 1139 goto err_pci; 1140 } 1141 ixgbe_fwlog_set_support_ena(hw); 1142 } 1143 1144 /* Most of the iflib initialization... */ 1145 1146 iflib_set_mac(ctx, hw->mac.addr); 1147 switch (sc->hw.mac.type) { 1148 case ixgbe_mac_X550: 1149 case ixgbe_mac_X550EM_x: 1150 case ixgbe_mac_X550EM_a: 1151 scctx->isc_rss_table_size = 512; 1152 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 64; 1153 break; 1154 default: 1155 scctx->isc_rss_table_size = 128; 1156 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 16; 1157 } 1158 1159 /* Allow legacy interrupts */ 1160 ixgbe_txrx.ift_legacy_intr = ixgbe_intr; 1161 1162 scctx->isc_txqsizes[0] = 1163 roundup2(scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc) + 1164 sizeof(u32), DBA_ALIGN), 1165 scctx->isc_rxqsizes[0] = 1166 roundup2(scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc), 1167 DBA_ALIGN); 1168 1169 /* XXX */ 1170 scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO | 1171 CSUM_IP6_TCP | CSUM_IP6_UDP | CSUM_IP6_TSO; 1172 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 1173 scctx->isc_tx_nsegments = IXGBE_82598_SCATTER; 1174 } else { 1175 scctx->isc_tx_csum_flags |= CSUM_SCTP |CSUM_IP6_SCTP; 1176 scctx->isc_tx_nsegments = IXGBE_82599_SCATTER; 1177 } 1178 1179 scctx->isc_msix_bar = pci_msix_table_bar(dev); 1180 1181 scctx->isc_tx_tso_segments_max = scctx->isc_tx_nsegments; 1182 scctx->isc_tx_tso_size_max = IXGBE_TSO_SIZE; 1183 scctx->isc_tx_tso_segsize_max = PAGE_SIZE; 1184 1185 scctx->isc_txrx = &ixgbe_txrx; 1186 1187 scctx->isc_capabilities = scctx->isc_capenable = IXGBE_CAPS; 1188 1189 return (0); 1190 1191 err_pci: 1192 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1193 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1194 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1195 ixgbe_free_pci_resources(ctx); 1196 1197 if (hw->mac.type == ixgbe_mac_E610) 1198 ixgbe_shutdown_aci(hw); 1199 1200 return (error); 1201 } /* ixgbe_if_attach_pre */ 1202 1203 /********************************************************************* 1204 * ixgbe_if_attach_post - Device initialization routine, part 2 1205 * 1206 * Called during driver load, but after interrupts and 1207 * resources have been allocated and configured. 1208 * Sets up some data structures not relevant to iflib. 1209 * 1210 * return 0 on success, positive on failure 1211 *********************************************************************/ 1212 static int 1213 ixgbe_if_attach_post(if_ctx_t ctx) 1214 { 1215 device_t dev; 1216 struct ixgbe_softc *sc; 1217 struct ixgbe_hw *hw; 1218 int error = 0; 1219 1220 dev = iflib_get_dev(ctx); 1221 sc = iflib_get_softc(ctx); 1222 hw = &sc->hw; 1223 1224 if (sc->intr_type == IFLIB_INTR_LEGACY && 1225 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) == 0) { 1226 device_printf(dev, "Device does not support legacy interrupts"); 1227 error = ENXIO; 1228 goto err; 1229 } 1230 1231 /* Allocate multicast array memory. */ 1232 sc->mta = malloc(sizeof(*sc->mta) * MAX_NUM_MULTICAST_ADDRESSES, 1233 M_IXGBE, M_NOWAIT); 1234 if (sc->mta == NULL) { 1235 device_printf(dev, 1236 "Can not allocate multicast setup array\n"); 1237 error = ENOMEM; 1238 goto err; 1239 } 1240 1241 /* hw.ix defaults init */ 1242 ixgbe_set_advertise(sc, ixgbe_advertise_speed); 1243 1244 /* Enable the optics for 82599 SFP+ fiber */ 1245 ixgbe_enable_tx_laser(hw); 1246 1247 /* Enable power to the phy. */ 1248 ixgbe_set_phy_power(hw, true); 1249 1250 ixgbe_initialize_iov(sc); 1251 1252 error = ixgbe_setup_interface(ctx); 1253 if (error) { 1254 device_printf(dev, "Interface setup failed: %d\n", error); 1255 goto err; 1256 } 1257 1258 ixgbe_if_update_admin_status(ctx); 1259 1260 /* Initialize statistics */ 1261 ixgbe_update_stats_counters(sc); 1262 ixgbe_add_hw_stats(sc); 1263 1264 /* Check PCIE slot type/speed/width */ 1265 ixgbe_get_slot_info(sc); 1266 1267 /* 1268 * Do time init and sysctl init here, but 1269 * only on the first port of a bypass sc. 1270 */ 1271 ixgbe_bypass_init(sc); 1272 1273 /* Display NVM and Option ROM versions */ 1274 ixgbe_print_fw_version(ctx); 1275 1276 /* Set an initial dmac value */ 1277 sc->dmac = 0; 1278 /* Set initial advertised speeds (if applicable) */ 1279 sc->advertise = ixgbe_get_default_advertise(sc); 1280 1281 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1282 ixgbe_define_iov_schemas(dev, &error); 1283 1284 /* Add sysctls */ 1285 ixgbe_add_device_sysctls(ctx); 1286 1287 /* Add MDIO bus if required / supported */ 1288 ixgbe_mdio_attach(sc); 1289 1290 /* Init recovery mode timer and state variable */ 1291 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1292 sc->recovery_mode = 0; 1293 1294 /* Set up the timer callout */ 1295 callout_init(&sc->fw_mode_timer, true); 1296 1297 /* Start the task */ 1298 callout_reset(&sc->fw_mode_timer, hz, ixgbe_fw_mode_timer, sc); 1299 } 1300 1301 return (0); 1302 err: 1303 return (error); 1304 } /* ixgbe_if_attach_post */ 1305 1306 /************************************************************************ 1307 * ixgbe_check_wol_support 1308 * 1309 * Checks whether the adapter's ports are capable of 1310 * Wake On LAN by reading the adapter's NVM. 1311 * 1312 * Sets each port's hw->wol_enabled value depending 1313 * on the value read here. 1314 ************************************************************************/ 1315 static void 1316 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1317 { 1318 struct ixgbe_hw *hw = &sc->hw; 1319 u16 dev_caps = 0; 1320 1321 /* Find out WoL support for port */ 1322 sc->wol_support = hw->wol_enabled = 0; 1323 ixgbe_get_device_caps(hw, &dev_caps); 1324 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1325 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1326 hw->bus.func == 0)) 1327 sc->wol_support = hw->wol_enabled = 1; 1328 1329 /* Save initial wake up filter configuration */ 1330 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1331 1332 return; 1333 } /* ixgbe_check_wol_support */ 1334 1335 /************************************************************************ 1336 * ixgbe_setup_interface 1337 * 1338 * Setup networking device structure and register an interface. 1339 ************************************************************************/ 1340 static int 1341 ixgbe_setup_interface(if_ctx_t ctx) 1342 { 1343 if_t ifp = iflib_get_ifp(ctx); 1344 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1345 1346 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1347 1348 if_setbaudrate(ifp, IF_Gbps(10)); 1349 1350 sc->max_frame_size = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN; 1351 1352 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1353 1354 ixgbe_add_media_types(ctx); 1355 1356 /* Autoselect media by default */ 1357 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 1358 1359 return (0); 1360 } /* ixgbe_setup_interface */ 1361 1362 /************************************************************************ 1363 * ixgbe_if_get_counter 1364 ************************************************************************/ 1365 static uint64_t 1366 ixgbe_if_get_counter(if_ctx_t ctx, ift_counter cnt) 1367 { 1368 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1369 if_t ifp = iflib_get_ifp(ctx); 1370 1371 switch (cnt) { 1372 case IFCOUNTER_IPACKETS: 1373 return (sc->ipackets); 1374 case IFCOUNTER_OPACKETS: 1375 return (sc->opackets); 1376 case IFCOUNTER_IBYTES: 1377 return (sc->ibytes); 1378 case IFCOUNTER_OBYTES: 1379 return (sc->obytes); 1380 case IFCOUNTER_IMCASTS: 1381 return (sc->imcasts); 1382 case IFCOUNTER_OMCASTS: 1383 return (sc->omcasts); 1384 case IFCOUNTER_COLLISIONS: 1385 return (0); 1386 case IFCOUNTER_IQDROPS: 1387 return (sc->iqdrops); 1388 case IFCOUNTER_IERRORS: 1389 return (sc->ierrors); 1390 default: 1391 return (if_get_counter_default(ifp, cnt)); 1392 } 1393 } /* ixgbe_if_get_counter */ 1394 1395 /************************************************************************ 1396 * ixgbe_if_i2c_req 1397 ************************************************************************/ 1398 static int 1399 ixgbe_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req) 1400 { 1401 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1402 struct ixgbe_hw *hw = &sc->hw; 1403 int i; 1404 1405 if (hw->phy.ops.read_i2c_byte == NULL) 1406 return (ENXIO); 1407 for (i = 0; i < req->len; i++) 1408 hw->phy.ops.read_i2c_byte(hw, req->offset + i, 1409 req->dev_addr, &req->data[i]); 1410 return (0); 1411 } /* ixgbe_if_i2c_req */ 1412 1413 /* ixgbe_if_needs_restart - Tell iflib when the driver needs to be 1414 * reinitialized 1415 * @ctx: iflib context 1416 * @event: event code to check 1417 * 1418 * Defaults to returning false for unknown events. 1419 * 1420 * @returns true if iflib needs to reinit the interface 1421 */ 1422 static bool 1423 ixgbe_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event) 1424 { 1425 switch (event) { 1426 case IFLIB_RESTART_VLAN_CONFIG: 1427 default: 1428 return (false); 1429 } 1430 } 1431 1432 /************************************************************************ 1433 * ixgbe_if_priv_ioctl - Ioctl handler for driver 1434 * 1435 * Handler for custom driver specific ioctls 1436 * 1437 * return 0 on success, positive on failure 1438 ************************************************************************/ 1439 static int 1440 ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data) 1441 { 1442 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1443 struct ifdrv *ifd; 1444 device_t dev = sc->dev; 1445 1446 /* Make sure the command type is valid */ 1447 switch (command) { 1448 case SIOCSDRVSPEC: 1449 case SIOCGDRVSPEC: 1450 /* Accepted commands */ 1451 break; 1452 case SIOCGPRIVATE_0: 1453 /* 1454 * Although we do not support this ioctl command, it's expected 1455 * that iflib will forward it to the IFDI_PRIV_IOCTL handler. 1456 * Do not print a message in this case. 1457 */ 1458 return (ENOTSUP); 1459 default: 1460 /* 1461 * If we get a different command for this function, it's 1462 * definitely unexpected, so log a message indicating what 1463 * command we got for debugging purposes. 1464 */ 1465 device_printf(dev, 1466 "%s: unexpected ioctl command %08lx\n", 1467 __func__, command); 1468 return (EINVAL); 1469 } 1470 1471 ifd = (struct ifdrv *)data; 1472 1473 switch (ifd->ifd_cmd) { 1474 case IXGBE_NVM_ACCESS: 1475 IOCTL_DEBUGOUT("ioctl: NVM ACCESS"); 1476 return (ixgbe_nvm_access_ioctl(sc, ifd)); 1477 case IXGBE_DEBUG_DUMP: 1478 IOCTL_DEBUGOUT("ioctl: DEBUG DUMP"); 1479 return (ixgbe_debug_dump_ioctl(sc, ifd)); 1480 default: 1481 IOCTL_DEBUGOUT1( 1482 "ioctl: UNKNOWN SIOC(S|G)DRVSPEC (0x%X) command\n", 1483 (int)ifd->ifd_cmd); 1484 return (EINVAL); 1485 } 1486 1487 return (0); 1488 } 1489 1490 /************************************************************************ 1491 * ixgbe_nvm_access_ioctl 1492 * 1493 * Handles an NVM access ioctl request 1494 ************************************************************************/ 1495 static int 1496 ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1497 { 1498 struct ixgbe_nvm_access_data *data; 1499 struct ixgbe_nvm_access_cmd *cmd; 1500 struct ixgbe_hw *hw = &sc->hw; 1501 size_t ifd_len = ifd->ifd_len; 1502 size_t malloc_len; 1503 device_t dev = sc->dev; 1504 u8 *nvm_buffer; 1505 s32 error = 0; 1506 1507 /* 1508 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1509 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1510 * without verifying privileges. To prevent non-privileged threads from 1511 * accessing this interface, perform a privilege check at this point. 1512 */ 1513 error = priv_check(curthread, PRIV_DRIVER); 1514 if (error) 1515 return (error); 1516 1517 if (ifd_len < sizeof(*cmd)) { 1518 device_printf(dev, 1519 "%s: ifdrv length is too small. Got %zu, " 1520 "but expected %zu\n", 1521 __func__, ifd_len, sizeof(*cmd)); 1522 return (EINVAL); 1523 } 1524 1525 if (ifd->ifd_data == NULL) { 1526 device_printf(dev, "%s: No ifd data buffer.\n", 1527 __func__); 1528 return (EINVAL); 1529 } 1530 1531 malloc_len = max(ifd_len, sizeof(*data) + sizeof(*cmd)); 1532 1533 nvm_buffer = (u8 *)malloc(malloc_len, M_IXGBE, M_ZERO | M_NOWAIT); 1534 if (!nvm_buffer) 1535 return (ENOMEM); 1536 1537 /* Copy the NVM access command and data in from user space */ 1538 error = copyin(ifd->ifd_data, nvm_buffer, ifd_len); 1539 if (error) { 1540 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1541 __func__, error); 1542 goto cleanup_free_nvm_buffer; 1543 } 1544 1545 /* 1546 * The NVM command structure is immediately followed by data which 1547 * varies in size based on the command. 1548 */ 1549 cmd = (struct ixgbe_nvm_access_cmd *)nvm_buffer; 1550 data = (struct ixgbe_nvm_access_data *) 1551 (nvm_buffer + sizeof(struct ixgbe_nvm_access_cmd)); 1552 1553 /* Handle the NVM access request */ 1554 error = ixgbe_handle_nvm_access(hw, cmd, data); 1555 if (error) { 1556 device_printf(dev, "%s: NVM access request failed, error %d\n", 1557 __func__, error); 1558 } 1559 1560 /* Copy the possibly modified contents of the handled request out */ 1561 error = copyout(nvm_buffer, ifd->ifd_data, ifd_len); 1562 if (error) { 1563 device_printf(dev, "%s: Copying response back to " 1564 "user space failed, error %d\n", 1565 __func__, error); 1566 goto cleanup_free_nvm_buffer; 1567 } 1568 1569 cleanup_free_nvm_buffer: 1570 free(nvm_buffer, M_IXGBE); 1571 return (error); 1572 } 1573 1574 /************************************************************************ 1575 * ixgbe_debug_dump_ioctl 1576 * 1577 * Makes debug dump of internal FW/HW data. 1578 ************************************************************************/ 1579 static int 1580 ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd) 1581 { 1582 struct ixgbe_debug_dump_cmd *dd_cmd; 1583 struct ixgbe_hw *hw = &sc->hw; 1584 size_t ifd_len = ifd->ifd_len; 1585 device_t dev = sc->dev; 1586 s32 error = 0; 1587 1588 if (!(sc->feat_en & IXGBE_FEATURE_DBG_DUMP)) 1589 return (ENODEV); 1590 1591 /* Data returned from ACI command */ 1592 u16 ret_buf_size = 0; 1593 u16 ret_next_cluster = 0; 1594 u16 ret_next_table = 0; 1595 u32 ret_next_index = 0; 1596 1597 /* 1598 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting 1599 * a privilege check. Subsequently, iflib passes the ioctl to the driver 1600 * without verifying privileges. To prevent non-privileged threads from 1601 * accessing this interface, perform a privilege check at this point. 1602 */ 1603 error = priv_check(curthread, PRIV_DRIVER); 1604 if (error) 1605 return (error); 1606 1607 if (ifd_len < sizeof(*dd_cmd)) { 1608 device_printf(dev, 1609 "%s: ifdrv length is too small. Got %zu, " 1610 "but expected %zu\n", 1611 __func__, ifd_len, sizeof(*dd_cmd)); 1612 return (EINVAL); 1613 } 1614 1615 if (ifd->ifd_data == NULL) { 1616 device_printf(dev, "%s: No ifd data buffer.\n", 1617 __func__); 1618 return (EINVAL); 1619 } 1620 1621 dd_cmd = (struct ixgbe_debug_dump_cmd *)malloc(ifd_len, M_IXGBE, 1622 M_NOWAIT | M_ZERO); 1623 if (!dd_cmd) { 1624 error = -ENOMEM; 1625 goto out; 1626 } 1627 /* copy data from userspace */ 1628 error = copyin(ifd->ifd_data, dd_cmd, ifd_len); 1629 if (error) { 1630 device_printf(dev, "%s: Failed to copy data in, error: %d\n", 1631 __func__, error); 1632 goto out; 1633 } 1634 1635 /* ACI command requires buf_size arg to be grater than 0 */ 1636 if (dd_cmd->data_size == 0) { 1637 device_printf(dev, "%s: data_size must be greater than 0\n", 1638 __func__); 1639 error = EINVAL; 1640 goto out; 1641 } 1642 1643 /* Zero the data buffer memory space */ 1644 memset(dd_cmd->data, 0, ifd_len - sizeof(*dd_cmd)); 1645 1646 error = ixgbe_aci_get_internal_data(hw, dd_cmd->cluster_id, 1647 dd_cmd->table_id, dd_cmd->offset, dd_cmd->data, dd_cmd->data_size, 1648 &ret_buf_size, &ret_next_cluster, &ret_next_table, &ret_next_index); 1649 if (error) { 1650 device_printf(dev, 1651 "%s: Failed to get internal FW/HW data, error: %d\n", 1652 __func__, error); 1653 goto out; 1654 } 1655 1656 dd_cmd->cluster_id = ret_next_cluster; 1657 dd_cmd->table_id = ret_next_table; 1658 dd_cmd->offset = ret_next_index; 1659 dd_cmd->data_size = ret_buf_size; 1660 1661 error = copyout(dd_cmd, ifd->ifd_data, ifd->ifd_len); 1662 if (error) { 1663 device_printf(dev, 1664 "%s: Failed to copy data out, error: %d\n", 1665 __func__, error); 1666 } 1667 1668 out: 1669 free(dd_cmd, M_IXGBE); 1670 1671 return (error); 1672 } 1673 1674 /************************************************************************ 1675 * ixgbe_add_media_types 1676 ************************************************************************/ 1677 static void 1678 ixgbe_add_media_types(if_ctx_t ctx) 1679 { 1680 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1681 struct ixgbe_hw *hw = &sc->hw; 1682 device_t dev = iflib_get_dev(ctx); 1683 u64 layer; 1684 1685 layer = sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 1686 1687 /* Media types with matching FreeBSD media defines */ 1688 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1689 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_T, 0, NULL); 1690 if (layer & IXGBE_PHYSICAL_LAYER_5000BASE_T) 1691 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1692 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1693 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1694 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1695 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1696 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1697 ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL); 1698 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1699 ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL); 1700 1701 if (hw->mac.type == ixgbe_mac_X550) { 1702 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL); 1703 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL); 1704 } 1705 1706 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1707 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) { 1708 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_TWINAX, 0, 1709 NULL); 1710 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1711 } 1712 1713 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1714 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 1715 if (hw->phy.multispeed_fiber) 1716 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_LX, 0, 1717 NULL); 1718 } 1719 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1720 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1721 if (hw->phy.multispeed_fiber) 1722 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, 1723 NULL); 1724 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1725 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 1726 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1727 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1728 1729 #ifdef IFM_ETH_XTYPE 1730 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1731 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 1732 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1733 ifmedia_add( sc->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 1734 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1735 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 1736 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1737 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_KX, 0, NULL); 1738 #else 1739 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 1740 device_printf(dev, "Media supported: 10GbaseKR\n"); 1741 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 1742 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 1743 } 1744 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 1745 device_printf(dev, "Media supported: 10GbaseKX4\n"); 1746 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 1747 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 1748 } 1749 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 1750 device_printf(dev, "Media supported: 1000baseKX\n"); 1751 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 1752 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 1753 } 1754 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) { 1755 device_printf(dev, "Media supported: 2500baseKX\n"); 1756 device_printf(dev, "2500baseKX mapped to 2500baseSX\n"); 1757 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_SX, 0, NULL); 1758 } 1759 #endif 1760 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) { 1761 device_printf(dev, "Media supported: 1000baseBX\n"); 1762 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_BX, 0, NULL); 1763 } 1764 1765 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 1766 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1767 0, NULL); 1768 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1769 } 1770 1771 ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1772 } /* ixgbe_add_media_types */ 1773 1774 /************************************************************************ 1775 * ixgbe_is_sfp 1776 ************************************************************************/ 1777 static inline bool 1778 ixgbe_is_sfp(struct ixgbe_hw *hw) 1779 { 1780 switch (hw->mac.type) { 1781 case ixgbe_mac_82598EB: 1782 if (hw->phy.type == ixgbe_phy_nl) 1783 return (true); 1784 return (false); 1785 case ixgbe_mac_82599EB: 1786 switch (hw->mac.ops.get_media_type(hw)) { 1787 case ixgbe_media_type_fiber: 1788 case ixgbe_media_type_fiber_qsfp: 1789 return (true); 1790 default: 1791 return (false); 1792 } 1793 case ixgbe_mac_X550EM_x: 1794 case ixgbe_mac_X550EM_a: 1795 case ixgbe_mac_E610: 1796 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) 1797 return (true); 1798 return (false); 1799 default: 1800 return (false); 1801 } 1802 } /* ixgbe_is_sfp */ 1803 1804 /************************************************************************ 1805 * ixgbe_config_link 1806 ************************************************************************/ 1807 static void 1808 ixgbe_config_link(if_ctx_t ctx) 1809 { 1810 struct ixgbe_softc *sc = iflib_get_softc(ctx); 1811 struct ixgbe_hw *hw = &sc->hw; 1812 u32 autoneg, err = 0; 1813 bool sfp, negotiate; 1814 1815 sfp = ixgbe_is_sfp(hw); 1816 1817 if (sfp) { 1818 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 1819 iflib_admin_intr_deferred(ctx); 1820 } else { 1821 if (hw->mac.ops.check_link) 1822 err = ixgbe_check_link(hw, &sc->link_speed, 1823 &sc->link_up, false); 1824 if (err) 1825 return; 1826 autoneg = hw->phy.autoneg_advertised; 1827 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 1828 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1829 &negotiate); 1830 if (err) 1831 return; 1832 1833 if (hw->mac.type == ixgbe_mac_X550 && 1834 hw->phy.autoneg_advertised == 0) { 1835 /* 1836 * 2.5G and 5G autonegotiation speeds on X550 1837 * are disabled by default due to reported 1838 * interoperability issues with some switches. 1839 * 1840 * The second condition checks if any operations 1841 * involving setting autonegotiation speeds have 1842 * been performed prior to this ixgbe_config_link() 1843 * call. 1844 * 1845 * If hw->phy.autoneg_advertised does not 1846 * equal 0, this means that the user might have 1847 * set autonegotiation speeds via the sysctl 1848 * before bringing the interface up. In this 1849 * case, we should not disable 2.5G and 5G 1850 * since that speeds might be selected by the 1851 * user. 1852 * 1853 * Otherwise (i.e. if hw->phy.autoneg_advertised 1854 * is set to 0), it is the first time we set 1855 * autonegotiation preferences and the default 1856 * set of speeds should exclude 2.5G and 5G. 1857 */ 1858 autoneg &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 1859 IXGBE_LINK_SPEED_5GB_FULL); 1860 } 1861 1862 if (hw->mac.type == ixgbe_mac_E610) { 1863 hw->phy.ops.init(hw); 1864 err = ixgbe_enable_lse(sc); 1865 if (err) 1866 device_printf(sc->dev, 1867 "Failed to enable Link Status Event, " 1868 "error: %d", err); 1869 } 1870 1871 if (hw->mac.ops.setup_link) 1872 err = hw->mac.ops.setup_link(hw, autoneg, 1873 sc->link_up); 1874 } 1875 } /* ixgbe_config_link */ 1876 1877 /************************************************************************ 1878 * ixgbe_update_stats_counters - Update board statistics counters. 1879 ************************************************************************/ 1880 static void 1881 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1882 { 1883 struct ixgbe_hw *hw = &sc->hw; 1884 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1885 u32 missed_rx = 0, bprc, lxon, lxoff, total; 1886 u32 lxoffrxc; 1887 u64 total_missed_rx = 0; 1888 1889 stats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 1890 stats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 1891 stats->errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 1892 stats->mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 1893 stats->mpc[0] += IXGBE_READ_REG(hw, IXGBE_MPC(0)); 1894 1895 for (int i = 0; i < 16; i++) { 1896 stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 1897 stats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 1898 stats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 1899 } 1900 stats->mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 1901 stats->mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 1902 stats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 1903 1904 /* Hardware workaround, gprc counts missed packets */ 1905 stats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 1906 stats->gprc -= missed_rx; 1907 1908 if (hw->mac.type != ixgbe_mac_82598EB) { 1909 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 1910 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 1911 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1912 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 1913 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 1914 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 1915 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 1916 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 1917 stats->lxoffrxc += lxoffrxc; 1918 } else { 1919 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 1920 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 1921 stats->lxoffrxc += lxoffrxc; 1922 /* 82598 only has a counter in the high register */ 1923 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 1924 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 1925 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 1926 } 1927 1928 /* 1929 * For watchdog management we need to know if we have been paused 1930 * during the last interval, so capture that here. 1931 */ 1932 if (lxoffrxc) 1933 sc->shared->isc_pause_frames = 1; 1934 1935 /* 1936 * Workaround: mprc hardware is incorrectly counting 1937 * broadcasts, so for now we subtract those. 1938 */ 1939 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 1940 stats->bprc += bprc; 1941 stats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 1942 if (hw->mac.type == ixgbe_mac_82598EB) 1943 stats->mprc -= bprc; 1944 1945 stats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 1946 stats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 1947 stats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 1948 stats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 1949 stats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 1950 stats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 1951 1952 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 1953 stats->lxontxc += lxon; 1954 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 1955 stats->lxofftxc += lxoff; 1956 total = lxon + lxoff; 1957 1958 stats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 1959 stats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 1960 stats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 1961 stats->gptc -= total; 1962 stats->mptc -= total; 1963 stats->ptc64 -= total; 1964 stats->gotc -= total * ETHER_MIN_LEN; 1965 1966 stats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 1967 stats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 1968 stats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); 1969 stats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 1970 stats->mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 1971 stats->mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 1972 stats->mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 1973 stats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 1974 stats->tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 1975 stats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 1976 stats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 1977 stats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 1978 stats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 1979 stats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 1980 stats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 1981 stats->xec += IXGBE_READ_REG(hw, IXGBE_XEC); 1982 stats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 1983 stats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 1984 /* Only read FCOE on 82599 */ 1985 if (hw->mac.type != ixgbe_mac_82598EB) { 1986 stats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 1987 stats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 1988 stats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 1989 stats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 1990 stats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 1991 } 1992 1993 /* Fill out the OS statistics structure */ 1994 IXGBE_SET_IPACKETS(sc, stats->gprc); 1995 IXGBE_SET_OPACKETS(sc, stats->gptc); 1996 IXGBE_SET_IBYTES(sc, stats->gorc); 1997 IXGBE_SET_OBYTES(sc, stats->gotc); 1998 IXGBE_SET_IMCASTS(sc, stats->mprc); 1999 IXGBE_SET_OMCASTS(sc, stats->mptc); 2000 IXGBE_SET_COLLISIONS(sc, 0); 2001 IXGBE_SET_IQDROPS(sc, total_missed_rx); 2002 2003 /* 2004 * Aggregate following types of errors as RX errors: 2005 * - CRC error count, 2006 * - illegal byte error count, 2007 * - missed packets count, 2008 * - length error count, 2009 * - undersized packets count, 2010 * - fragmented packets count, 2011 * - oversized packets count, 2012 * - jabber count. 2013 */ 2014 IXGBE_SET_IERRORS(sc, stats->crcerrs + stats->illerrc + 2015 stats->mpc[0] + stats->rlec + stats->ruc + stats->rfc + 2016 stats->roc + stats->rjc); 2017 } /* ixgbe_update_stats_counters */ 2018 2019 /************************************************************************ 2020 * ixgbe_add_hw_stats 2021 * 2022 * Add sysctl variables, one per statistic, to the system. 2023 ************************************************************************/ 2024 static void 2025 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 2026 { 2027 device_t dev = iflib_get_dev(sc->ctx); 2028 struct ix_rx_queue *rx_que; 2029 struct ix_tx_queue *tx_que; 2030 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 2031 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 2032 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 2033 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2034 struct sysctl_oid *stat_node, *queue_node; 2035 struct sysctl_oid_list *stat_list, *queue_list; 2036 int i; 2037 2038 #define QUEUE_NAME_LEN 32 2039 char namebuf[QUEUE_NAME_LEN]; 2040 2041 /* Driver Statistics */ 2042 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 2043 CTLFLAG_RD, &sc->dropped_pkts, "Driver dropped packets"); 2044 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events", 2045 CTLFLAG_RD, &sc->watchdog_events, "Watchdog timeouts"); 2046 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 2047 CTLFLAG_RD, &sc->link_irq, "Link MSI-X IRQ Handled"); 2048 2049 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 2050 i++, tx_que++) { 2051 struct tx_ring *txr = &tx_que->txr; 2052 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2053 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2054 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2055 queue_list = SYSCTL_CHILDREN(queue_node); 2056 2057 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 2058 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2059 ixgbe_sysctl_tdh_handler, "IU", 2060 "Transmit Descriptor Head"); 2061 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 2062 CTLTYPE_UINT | CTLFLAG_RD, txr, 0, 2063 ixgbe_sysctl_tdt_handler, "IU", 2064 "Transmit Descriptor Tail"); 2065 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx", 2066 CTLFLAG_RD, &txr->tso_tx, "TSO"); 2067 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 2068 CTLFLAG_RD, &txr->total_packets, 2069 "Queue Packets Transmitted"); 2070 } 2071 2072 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 2073 i++, rx_que++) { 2074 struct rx_ring *rxr = &rx_que->rxr; 2075 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 2076 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 2077 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name"); 2078 queue_list = SYSCTL_CHILDREN(queue_node); 2079 2080 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 2081 CTLTYPE_UINT | CTLFLAG_RW, 2082 &sc->rx_queues[i], 0, 2083 ixgbe_sysctl_interrupt_rate_handler, "IU", 2084 "Interrupt Rate"); 2085 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 2086 CTLFLAG_RD, &(sc->rx_queues[i].irqs), 2087 "irqs on this queue"); 2088 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 2089 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2090 ixgbe_sysctl_rdh_handler, "IU", 2091 "Receive Descriptor Head"); 2092 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 2093 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0, 2094 ixgbe_sysctl_rdt_handler, "IU", 2095 "Receive Descriptor Tail"); 2096 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 2097 CTLFLAG_RD, &rxr->rx_packets, "Queue Packets Received"); 2098 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 2099 CTLFLAG_RD, &rxr->rx_bytes, "Queue Bytes Received"); 2100 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 2101 CTLFLAG_RD, &rxr->rx_copies, "Copied RX Frames"); 2102 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_discarded", 2103 CTLFLAG_RD, &rxr->rx_discarded, "Discarded RX packets"); 2104 } 2105 2106 /* MAC stats get their own sub node */ 2107 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 2108 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "MAC Statistics"); 2109 stat_list = SYSCTL_CHILDREN(stat_node); 2110 2111 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_errs", 2112 CTLFLAG_RD, &sc->ierrors, IXGBE_SYSCTL_DESC_RX_ERRS); 2113 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 2114 CTLFLAG_RD, &stats->crcerrs, "CRC Errors"); 2115 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 2116 CTLFLAG_RD, &stats->illerrc, "Illegal Byte Errors"); 2117 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 2118 CTLFLAG_RD, &stats->errbc, "Byte Errors"); 2119 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 2120 CTLFLAG_RD, &stats->mspdc, "MAC Short Packets Discarded"); 2121 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 2122 CTLFLAG_RD, &stats->mlfc, "MAC Local Faults"); 2123 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 2124 CTLFLAG_RD, &stats->mrfc, "MAC Remote Faults"); 2125 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 2126 CTLFLAG_RD, &stats->rlec, "Receive Length Errors"); 2127 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_missed_packets", 2128 CTLFLAG_RD, &stats->mpc[0], "RX Missed Packet Count"); 2129 2130 /* Flow Control stats */ 2131 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 2132 CTLFLAG_RD, &stats->lxontxc, "Link XON Transmitted"); 2133 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 2134 CTLFLAG_RD, &stats->lxonrxc, "Link XON Received"); 2135 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 2136 CTLFLAG_RD, &stats->lxofftxc, "Link XOFF Transmitted"); 2137 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 2138 CTLFLAG_RD, &stats->lxoffrxc, "Link XOFF Received"); 2139 2140 /* Packet Reception Stats */ 2141 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 2142 CTLFLAG_RD, &stats->tor, "Total Octets Received"); 2143 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 2144 CTLFLAG_RD, &stats->gorc, "Good Octets Received"); 2145 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 2146 CTLFLAG_RD, &stats->tpr, "Total Packets Received"); 2147 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 2148 CTLFLAG_RD, &stats->gprc, "Good Packets Received"); 2149 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 2150 CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); 2151 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 2152 CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); 2153 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 2154 CTLFLAG_RD, &stats->prc64, "64 byte frames received "); 2155 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 2156 CTLFLAG_RD, &stats->prc127, "65-127 byte frames received"); 2157 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 2158 CTLFLAG_RD, &stats->prc255, "128-255 byte frames received"); 2159 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 2160 CTLFLAG_RD, &stats->prc511, "256-511 byte frames received"); 2161 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 2162 CTLFLAG_RD, &stats->prc1023, "512-1023 byte frames received"); 2163 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 2164 CTLFLAG_RD, &stats->prc1522, "1023-1522 byte frames received"); 2165 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 2166 CTLFLAG_RD, &stats->ruc, "Receive Undersized"); 2167 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 2168 CTLFLAG_RD, &stats->rfc, "Fragmented Packets Received "); 2169 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 2170 CTLFLAG_RD, &stats->roc, "Oversized Packets Received"); 2171 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 2172 CTLFLAG_RD, &stats->rjc, "Received Jabber"); 2173 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 2174 CTLFLAG_RD, &stats->mngprc, "Management Packets Received"); 2175 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 2176 CTLFLAG_RD, &stats->mngptc, "Management Packets Dropped"); 2177 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 2178 CTLFLAG_RD, &stats->xec, "Checksum Errors"); 2179 2180 /* Packet Transmission Stats */ 2181 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 2182 CTLFLAG_RD, &stats->gotc, "Good Octets Transmitted"); 2183 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 2184 CTLFLAG_RD, &stats->tpt, "Total Packets Transmitted"); 2185 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 2186 CTLFLAG_RD, &stats->gptc, "Good Packets Transmitted"); 2187 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 2188 CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); 2189 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 2190 CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); 2191 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 2192 CTLFLAG_RD, &stats->mngptc, "Management Packets Transmitted"); 2193 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 2194 CTLFLAG_RD, &stats->ptc64, "64 byte frames transmitted "); 2195 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 2196 CTLFLAG_RD, &stats->ptc127, "65-127 byte frames transmitted"); 2197 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 2198 CTLFLAG_RD, &stats->ptc255, "128-255 byte frames transmitted"); 2199 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 2200 CTLFLAG_RD, &stats->ptc511, "256-511 byte frames transmitted"); 2201 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 2202 CTLFLAG_RD, &stats->ptc1023, "512-1023 byte frames transmitted"); 2203 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 2204 CTLFLAG_RD, &stats->ptc1522, "1024-1522 byte frames transmitted"); 2205 } /* ixgbe_add_hw_stats */ 2206 2207 /************************************************************************ 2208 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2209 * 2210 * Retrieves the TDH value from the hardware 2211 ************************************************************************/ 2212 static int 2213 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 2214 { 2215 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2216 int error; 2217 unsigned int val; 2218 2219 if (!txr) 2220 return (0); 2221 2222 2223 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2224 return (EPERM); 2225 2226 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me)); 2227 error = sysctl_handle_int(oidp, &val, 0, req); 2228 if (error || !req->newptr) 2229 return error; 2230 2231 return (0); 2232 } /* ixgbe_sysctl_tdh_handler */ 2233 2234 /************************************************************************ 2235 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2236 * 2237 * Retrieves the TDT value from the hardware 2238 ************************************************************************/ 2239 static int 2240 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 2241 { 2242 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 2243 int error; 2244 unsigned int val; 2245 2246 if (!txr) 2247 return (0); 2248 2249 if (atomic_load_acq_int(&txr->sc->recovery_mode)) 2250 return (EPERM); 2251 2252 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me)); 2253 error = sysctl_handle_int(oidp, &val, 0, req); 2254 if (error || !req->newptr) 2255 return error; 2256 2257 return (0); 2258 } /* ixgbe_sysctl_tdt_handler */ 2259 2260 /************************************************************************ 2261 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2262 * 2263 * Retrieves the RDH value from the hardware 2264 ************************************************************************/ 2265 static int 2266 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 2267 { 2268 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2269 int error; 2270 unsigned int val; 2271 2272 if (!rxr) 2273 return (0); 2274 2275 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2276 return (EPERM); 2277 2278 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me)); 2279 error = sysctl_handle_int(oidp, &val, 0, req); 2280 if (error || !req->newptr) 2281 return error; 2282 2283 return (0); 2284 } /* ixgbe_sysctl_rdh_handler */ 2285 2286 /************************************************************************ 2287 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2288 * 2289 * Retrieves the RDT value from the hardware 2290 ************************************************************************/ 2291 static int 2292 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 2293 { 2294 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 2295 int error; 2296 unsigned int val; 2297 2298 if (!rxr) 2299 return (0); 2300 2301 if (atomic_load_acq_int(&rxr->sc->recovery_mode)) 2302 return (EPERM); 2303 2304 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me)); 2305 error = sysctl_handle_int(oidp, &val, 0, req); 2306 if (error || !req->newptr) 2307 return error; 2308 2309 return (0); 2310 } /* ixgbe_sysctl_rdt_handler */ 2311 2312 /************************************************************************ 2313 * ixgbe_if_vlan_register 2314 * 2315 * Run via vlan config EVENT, it enables us to use the 2316 * HW Filter table since we can get the vlan id. This 2317 * just creates the entry in the soft version of the 2318 * VFTA, init will repopulate the real table. 2319 ************************************************************************/ 2320 static void 2321 ixgbe_if_vlan_register(if_ctx_t ctx, u16 vtag) 2322 { 2323 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2324 u16 index, bit; 2325 2326 index = (vtag >> 5) & 0x7F; 2327 bit = vtag & 0x1F; 2328 sc->shadow_vfta[index] |= (1 << bit); 2329 ++sc->num_vlans; 2330 ixgbe_setup_vlan_hw_support(ctx); 2331 } /* ixgbe_if_vlan_register */ 2332 2333 /************************************************************************ 2334 * ixgbe_if_vlan_unregister 2335 * 2336 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2337 ************************************************************************/ 2338 static void 2339 ixgbe_if_vlan_unregister(if_ctx_t ctx, u16 vtag) 2340 { 2341 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2342 u16 index, bit; 2343 2344 index = (vtag >> 5) & 0x7F; 2345 bit = vtag & 0x1F; 2346 sc->shadow_vfta[index] &= ~(1 << bit); 2347 --sc->num_vlans; 2348 /* Re-init to load the changes */ 2349 ixgbe_setup_vlan_hw_support(ctx); 2350 } /* ixgbe_if_vlan_unregister */ 2351 2352 /************************************************************************ 2353 * ixgbe_setup_vlan_hw_support 2354 ************************************************************************/ 2355 static void 2356 ixgbe_setup_vlan_hw_support(if_ctx_t ctx) 2357 { 2358 if_t ifp = iflib_get_ifp(ctx); 2359 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2360 struct ixgbe_hw *hw = &sc->hw; 2361 struct rx_ring *rxr; 2362 int i; 2363 u32 ctrl; 2364 2365 2366 /* 2367 * We get here thru init_locked, meaning 2368 * a soft reset, this has already cleared 2369 * the VFTA and other state, so if there 2370 * have been no vlan's registered do nothing. 2371 */ 2372 if (sc->num_vlans == 0 || 2373 (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) == 0) { 2374 /* Clear the vlan hw flag */ 2375 for (i = 0; i < sc->num_rx_queues; i++) { 2376 rxr = &sc->rx_queues[i].rxr; 2377 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 2378 if (hw->mac.type != ixgbe_mac_82598EB) { 2379 ctrl = IXGBE_READ_REG(hw, 2380 IXGBE_RXDCTL(rxr->me)); 2381 ctrl &= ~IXGBE_RXDCTL_VME; 2382 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), 2383 ctrl); 2384 } 2385 rxr->vtag_strip = false; 2386 } 2387 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2388 /* Enable the Filter Table if enabled */ 2389 ctrl |= IXGBE_VLNCTRL_CFIEN; 2390 ctrl &= ~IXGBE_VLNCTRL_VFE; 2391 if (hw->mac.type == ixgbe_mac_82598EB) 2392 ctrl &= ~IXGBE_VLNCTRL_VME; 2393 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2394 return; 2395 } 2396 2397 /* Setup the queues for vlans */ 2398 if (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) { 2399 for (i = 0; i < sc->num_rx_queues; i++) { 2400 rxr = &sc->rx_queues[i].rxr; 2401 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 2402 if (hw->mac.type != ixgbe_mac_82598EB) { 2403 ctrl = IXGBE_READ_REG(hw, 2404 IXGBE_RXDCTL(rxr->me)); 2405 ctrl |= IXGBE_RXDCTL_VME; 2406 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), 2407 ctrl); 2408 } 2409 rxr->vtag_strip = true; 2410 } 2411 } 2412 2413 if ((if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0) 2414 return; 2415 /* 2416 * A soft reset zero's out the VFTA, so 2417 * we need to repopulate it now. 2418 */ 2419 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2420 if (sc->shadow_vfta[i] != 0) 2421 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 2422 sc->shadow_vfta[i]); 2423 2424 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2425 /* Enable the Filter Table if enabled */ 2426 if (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) { 2427 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 2428 ctrl |= IXGBE_VLNCTRL_VFE; 2429 } 2430 if (hw->mac.type == ixgbe_mac_82598EB) 2431 ctrl |= IXGBE_VLNCTRL_VME; 2432 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2433 } /* ixgbe_setup_vlan_hw_support */ 2434 2435 /************************************************************************ 2436 * ixgbe_get_slot_info 2437 * 2438 * Get the width and transaction speed of 2439 * the slot this adapter is plugged into. 2440 ************************************************************************/ 2441 static void 2442 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2443 { 2444 device_t dev = iflib_get_dev(sc->ctx); 2445 struct ixgbe_hw *hw = &sc->hw; 2446 int bus_info_valid = true; 2447 u32 offset; 2448 u16 link; 2449 2450 /* Some devices are behind an internal bridge */ 2451 switch (hw->device_id) { 2452 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2453 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2454 goto get_parent_info; 2455 default: 2456 break; 2457 } 2458 2459 ixgbe_get_bus_info(hw); 2460 2461 /* 2462 * Some devices don't use PCI-E, but there is no need 2463 * to display "Unknown" for bus speed and width. 2464 */ 2465 switch (hw->mac.type) { 2466 case ixgbe_mac_X550EM_x: 2467 case ixgbe_mac_X550EM_a: 2468 return; 2469 default: 2470 goto display; 2471 } 2472 2473 get_parent_info: 2474 /* 2475 * For the Quad port adapter we need to parse back 2476 * up the PCI tree to find the speed of the expansion 2477 * slot into which this adapter is plugged. A bit more work. 2478 */ 2479 dev = device_get_parent(device_get_parent(dev)); 2480 #ifdef IXGBE_DEBUG 2481 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2482 pci_get_slot(dev), pci_get_function(dev)); 2483 #endif 2484 dev = device_get_parent(device_get_parent(dev)); 2485 #ifdef IXGBE_DEBUG 2486 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2487 pci_get_slot(dev), pci_get_function(dev)); 2488 #endif 2489 /* Now get the PCI Express Capabilities offset */ 2490 if (pci_find_cap(dev, PCIY_EXPRESS, &offset)) { 2491 /* 2492 * Hmm...can't get PCI-Express capabilities. 2493 * Falling back to default method. 2494 */ 2495 bus_info_valid = false; 2496 ixgbe_get_bus_info(hw); 2497 goto display; 2498 } 2499 /* ...and read the Link Status Register */ 2500 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 2501 ixgbe_set_pci_config_data_generic(hw, link); 2502 2503 display: 2504 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2505 ((hw->bus.speed == ixgbe_bus_speed_16000) ? "16.0GT/s" : 2506 (hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2507 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2508 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2509 "Unknown"), 2510 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2511 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2512 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2513 "Unknown")); 2514 2515 if (bus_info_valid) { 2516 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2517 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2518 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2519 device_printf(dev, 2520 "PCI-Express bandwidth available for this card" 2521 " is not sufficient for optimal performance.\n"); 2522 device_printf(dev, 2523 "For optimal performance a x8 PCIE, or x4 PCIE" 2524 " Gen2 slot is required.\n"); 2525 } 2526 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2527 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2528 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2529 device_printf(dev, 2530 "PCI-Express bandwidth available for this card" 2531 " is not sufficient for optimal performance.\n"); 2532 device_printf(dev, 2533 "For optimal performance a x8 PCIE Gen3 slot is" 2534 " required.\n"); 2535 } 2536 } else 2537 device_printf(dev, 2538 "Unable to determine slot speed/width. The speed/width" 2539 " reported are that of the internal switch.\n"); 2540 2541 return; 2542 } /* ixgbe_get_slot_info */ 2543 2544 /************************************************************************ 2545 * ixgbe_if_msix_intr_assign 2546 * 2547 * Setup MSI-X Interrupt resources and handlers 2548 ************************************************************************/ 2549 static int 2550 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix) 2551 { 2552 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2553 struct ix_rx_queue *rx_que = sc->rx_queues; 2554 struct ix_tx_queue *tx_que; 2555 int error, rid, vector = 0; 2556 char buf[16]; 2557 2558 /* Admin Que is vector 0*/ 2559 rid = vector + 1; 2560 for (int i = 0; i < sc->num_rx_queues; i++, vector++, rx_que++) { 2561 rid = vector + 1; 2562 2563 snprintf(buf, sizeof(buf), "rxq%d", i); 2564 error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid, 2565 IFLIB_INTR_RXTX, ixgbe_msix_que, rx_que, rx_que->rxr.me, 2566 buf); 2567 2568 if (error) { 2569 device_printf(iflib_get_dev(ctx), 2570 "Failed to allocate que int %d err: %d", 2571 i,error); 2572 sc->num_rx_queues = i + 1; 2573 goto fail; 2574 } 2575 2576 rx_que->msix = vector; 2577 } 2578 for (int i = 0; i < sc->num_tx_queues; i++) { 2579 snprintf(buf, sizeof(buf), "txq%d", i); 2580 tx_que = &sc->tx_queues[i]; 2581 tx_que->msix = i % sc->num_rx_queues; 2582 iflib_softirq_alloc_generic(ctx, 2583 &sc->rx_queues[tx_que->msix].que_irq, 2584 IFLIB_INTR_TX, tx_que, tx_que->txr.me, buf); 2585 } 2586 rid = vector + 1; 2587 error = iflib_irq_alloc_generic(ctx, &sc->irq, rid, 2588 IFLIB_INTR_ADMIN, ixgbe_msix_link, sc, 0, "aq"); 2589 if (error) { 2590 device_printf(iflib_get_dev(ctx), 2591 "Failed to register admin handler"); 2592 return (error); 2593 } 2594 2595 sc->vector = vector; 2596 2597 return (0); 2598 fail: 2599 iflib_irq_free(ctx, &sc->irq); 2600 rx_que = sc->rx_queues; 2601 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) 2602 iflib_irq_free(ctx, &rx_que->que_irq); 2603 2604 return (error); 2605 } /* ixgbe_if_msix_intr_assign */ 2606 2607 static inline void 2608 ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que) 2609 { 2610 uint32_t newitr = 0; 2611 struct rx_ring *rxr = &que->rxr; 2612 /* FIXME struct tx_ring *txr = ... ->txr; */ 2613 2614 /* 2615 * Do Adaptive Interrupt Moderation: 2616 * - Write out last calculated setting 2617 * - Calculate based on average size over 2618 * the last interval. 2619 */ 2620 if (que->eitr_setting) { 2621 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix), 2622 que->eitr_setting); 2623 } 2624 2625 que->eitr_setting = 0; 2626 /* Idle, do nothing */ 2627 if (rxr->bytes == 0) { 2628 /* FIXME && txr->bytes == 0 */ 2629 return; 2630 } 2631 2632 if ((rxr->bytes) && (rxr->packets)) 2633 newitr = rxr->bytes / rxr->packets; 2634 /* FIXME for transmit accounting 2635 * if ((txr->bytes) && (txr->packets)) 2636 * newitr = txr->bytes/txr->packets; 2637 * if ((rxr->bytes) && (rxr->packets)) 2638 * newitr = max(newitr, (rxr->bytes / rxr->packets)); 2639 */ 2640 2641 newitr += 24; /* account for hardware frame, crc */ 2642 /* set an upper boundary */ 2643 newitr = min(newitr, 3000); 2644 2645 /* Be nice to the mid range */ 2646 if ((newitr > 300) && (newitr < 1200)) { 2647 newitr = (newitr / 3); 2648 } else { 2649 newitr = (newitr / 2); 2650 } 2651 2652 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 2653 newitr |= newitr << 16; 2654 } else { 2655 newitr |= IXGBE_EITR_CNT_WDIS; 2656 } 2657 2658 /* save for next interrupt */ 2659 que->eitr_setting = newitr; 2660 2661 /* Reset state */ 2662 /* FIXME txr->bytes = 0; */ 2663 /* FIXME txr->packets = 0; */ 2664 rxr->bytes = 0; 2665 rxr->packets = 0; 2666 2667 return; 2668 } 2669 2670 /********************************************************************* 2671 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2672 **********************************************************************/ 2673 static int 2674 ixgbe_msix_que(void *arg) 2675 { 2676 struct ix_rx_queue *que = arg; 2677 struct ixgbe_softc *sc = que->sc; 2678 if_t ifp = iflib_get_ifp(que->sc->ctx); 2679 2680 /* Protect against spurious interrupts */ 2681 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) 2682 return (FILTER_HANDLED); 2683 2684 ixgbe_disable_queue(sc, que->msix); 2685 ++que->irqs; 2686 2687 /* Check for AIM */ 2688 if (sc->enable_aim) { 2689 ixgbe_perform_aim(sc, que); 2690 } 2691 2692 return (FILTER_SCHEDULE_THREAD); 2693 } /* ixgbe_msix_que */ 2694 2695 /************************************************************************ 2696 * ixgbe_media_status - Media Ioctl callback 2697 * 2698 * Called whenever the user queries the status of 2699 * the interface using ifconfig. 2700 ************************************************************************/ 2701 static void 2702 ixgbe_if_media_status(if_ctx_t ctx, struct ifmediareq * ifmr) 2703 { 2704 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2705 struct ixgbe_hw *hw = &sc->hw; 2706 int layer; 2707 2708 INIT_DEBUGOUT("ixgbe_if_media_status: begin"); 2709 2710 ifmr->ifm_status = IFM_AVALID; 2711 ifmr->ifm_active = IFM_ETHER; 2712 2713 if (!sc->link_active) 2714 return; 2715 2716 ifmr->ifm_status |= IFM_ACTIVE; 2717 layer = sc->phy_layer; 2718 2719 if (layer & IXGBE_PHYSICAL_LAYERS_BASE_T_ALL) 2720 switch (sc->link_speed) { 2721 case IXGBE_LINK_SPEED_10GB_FULL: 2722 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2723 break; 2724 case IXGBE_LINK_SPEED_5GB_FULL: 2725 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2726 break; 2727 case IXGBE_LINK_SPEED_2_5GB_FULL: 2728 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2729 break; 2730 case IXGBE_LINK_SPEED_1GB_FULL: 2731 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2732 break; 2733 case IXGBE_LINK_SPEED_100_FULL: 2734 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2735 break; 2736 case IXGBE_LINK_SPEED_10_FULL: 2737 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2738 break; 2739 } 2740 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2741 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2742 switch (sc->link_speed) { 2743 case IXGBE_LINK_SPEED_10GB_FULL: 2744 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2745 break; 2746 case IXGBE_LINK_SPEED_1GB_FULL: 2747 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2748 break; 2749 } 2750 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2751 switch (sc->link_speed) { 2752 case IXGBE_LINK_SPEED_10GB_FULL: 2753 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2754 break; 2755 case IXGBE_LINK_SPEED_1GB_FULL: 2756 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2757 break; 2758 } 2759 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2760 switch (sc->link_speed) { 2761 case IXGBE_LINK_SPEED_10GB_FULL: 2762 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2763 break; 2764 case IXGBE_LINK_SPEED_1GB_FULL: 2765 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2766 break; 2767 } 2768 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2769 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2770 switch (sc->link_speed) { 2771 case IXGBE_LINK_SPEED_10GB_FULL: 2772 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2773 break; 2774 case IXGBE_LINK_SPEED_1GB_FULL: 2775 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 2776 break; 2777 } 2778 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2779 switch (sc->link_speed) { 2780 case IXGBE_LINK_SPEED_10GB_FULL: 2781 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2782 break; 2783 } 2784 /* 2785 * XXX: These need to use the proper media types once 2786 * they're added. 2787 */ 2788 #ifndef IFM_ETH_XTYPE 2789 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2790 switch (sc->link_speed) { 2791 case IXGBE_LINK_SPEED_10GB_FULL: 2792 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2793 break; 2794 case IXGBE_LINK_SPEED_2_5GB_FULL: 2795 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2796 break; 2797 case IXGBE_LINK_SPEED_1GB_FULL: 2798 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2799 break; 2800 } 2801 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2802 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2803 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2804 switch (sc->link_speed) { 2805 case IXGBE_LINK_SPEED_10GB_FULL: 2806 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2807 break; 2808 case IXGBE_LINK_SPEED_2_5GB_FULL: 2809 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 2810 break; 2811 case IXGBE_LINK_SPEED_1GB_FULL: 2812 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 2813 break; 2814 } 2815 #else 2816 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2817 switch (sc->link_speed) { 2818 case IXGBE_LINK_SPEED_10GB_FULL: 2819 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 2820 break; 2821 case IXGBE_LINK_SPEED_2_5GB_FULL: 2822 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2823 break; 2824 case IXGBE_LINK_SPEED_1GB_FULL: 2825 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2826 break; 2827 } 2828 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 2829 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 2830 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2831 switch (sc->link_speed) { 2832 case IXGBE_LINK_SPEED_10GB_FULL: 2833 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 2834 break; 2835 case IXGBE_LINK_SPEED_2_5GB_FULL: 2836 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 2837 break; 2838 case IXGBE_LINK_SPEED_1GB_FULL: 2839 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 2840 break; 2841 } 2842 #endif 2843 2844 /* If nothing is recognized... */ 2845 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 2846 ifmr->ifm_active |= IFM_UNKNOWN; 2847 2848 /* Display current flow control setting used on link */ 2849 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 2850 hw->fc.current_mode == ixgbe_fc_full) 2851 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 2852 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 2853 hw->fc.current_mode == ixgbe_fc_full) 2854 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 2855 } /* ixgbe_media_status */ 2856 2857 /************************************************************************ 2858 * ixgbe_media_change - Media Ioctl callback 2859 * 2860 * Called when the user changes speed/duplex using 2861 * media/mediopt option with ifconfig. 2862 ************************************************************************/ 2863 static int 2864 ixgbe_if_media_change(if_ctx_t ctx) 2865 { 2866 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2867 struct ifmedia *ifm = iflib_get_media(ctx); 2868 struct ixgbe_hw *hw = &sc->hw; 2869 ixgbe_link_speed speed = 0; 2870 2871 INIT_DEBUGOUT("ixgbe_if_media_change: begin"); 2872 2873 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 2874 return (EINVAL); 2875 2876 if (hw->phy.media_type == ixgbe_media_type_backplane) 2877 return (EPERM); 2878 2879 /* 2880 * We don't actually need to check against the supported 2881 * media types of the adapter; ifmedia will take care of 2882 * that for us. 2883 */ 2884 switch (IFM_SUBTYPE(ifm->ifm_media)) { 2885 case IFM_AUTO: 2886 case IFM_10G_T: 2887 speed |= IXGBE_LINK_SPEED_100_FULL; 2888 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2889 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2890 break; 2891 case IFM_10G_LRM: 2892 case IFM_10G_LR: 2893 #ifndef IFM_ETH_XTYPE 2894 case IFM_10G_SR: /* KR, too */ 2895 case IFM_10G_CX4: /* KX4 */ 2896 #else 2897 case IFM_10G_KR: 2898 case IFM_10G_KX4: 2899 #endif 2900 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2901 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2902 break; 2903 #ifndef IFM_ETH_XTYPE 2904 case IFM_1000_CX: /* KX */ 2905 #else 2906 case IFM_1000_KX: 2907 #endif 2908 case IFM_1000_LX: 2909 case IFM_1000_SX: 2910 case IFM_1000_BX: 2911 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2912 break; 2913 case IFM_1000_T: 2914 speed |= IXGBE_LINK_SPEED_100_FULL; 2915 speed |= IXGBE_LINK_SPEED_1GB_FULL; 2916 break; 2917 case IFM_10G_TWINAX: 2918 speed |= IXGBE_LINK_SPEED_10GB_FULL; 2919 break; 2920 case IFM_5000_T: 2921 speed |= IXGBE_LINK_SPEED_5GB_FULL; 2922 break; 2923 case IFM_2500_T: 2924 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 2925 break; 2926 case IFM_100_TX: 2927 speed |= IXGBE_LINK_SPEED_100_FULL; 2928 break; 2929 case IFM_10_T: 2930 speed |= IXGBE_LINK_SPEED_10_FULL; 2931 break; 2932 default: 2933 goto invalid; 2934 } 2935 2936 hw->mac.autotry_restart = true; 2937 hw->mac.ops.setup_link(hw, speed, true); 2938 sc->advertise = 2939 ((speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 2940 ((speed & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 2941 ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 2942 ((speed & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 2943 ((speed & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 2944 ((speed & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 2945 2946 return (0); 2947 2948 invalid: 2949 device_printf(iflib_get_dev(ctx), "Invalid media type!\n"); 2950 2951 return (EINVAL); 2952 } /* ixgbe_if_media_change */ 2953 2954 /************************************************************************ 2955 * ixgbe_set_promisc 2956 ************************************************************************/ 2957 static int 2958 ixgbe_if_promisc_set(if_ctx_t ctx, int flags) 2959 { 2960 struct ixgbe_softc *sc = iflib_get_softc(ctx); 2961 if_t ifp = iflib_get_ifp(ctx); 2962 u32 rctl; 2963 int mcnt = 0; 2964 2965 rctl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 2966 rctl &= (~IXGBE_FCTRL_UPE); 2967 if (if_getflags(ifp) & IFF_ALLMULTI) 2968 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 2969 else { 2970 mcnt = min(if_llmaddr_count(ifp), 2971 MAX_NUM_MULTICAST_ADDRESSES); 2972 } 2973 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 2974 rctl &= (~IXGBE_FCTRL_MPE); 2975 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2976 2977 if (if_getflags(ifp) & IFF_PROMISC) { 2978 rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2979 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2980 } else if (if_getflags(ifp) & IFF_ALLMULTI) { 2981 rctl |= IXGBE_FCTRL_MPE; 2982 rctl &= ~IXGBE_FCTRL_UPE; 2983 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl); 2984 } 2985 return (0); 2986 } /* ixgbe_if_promisc_set */ 2987 2988 /************************************************************************ 2989 * ixgbe_msix_link - Link status change ISR (MSI/MSI-X) 2990 ************************************************************************/ 2991 static int 2992 ixgbe_msix_link(void *arg) 2993 { 2994 struct ixgbe_softc *sc = arg; 2995 struct ixgbe_hw *hw = &sc->hw; 2996 u32 eicr, eicr_mask; 2997 s32 retval; 2998 2999 ++sc->link_irq; 3000 3001 /* Pause other interrupts */ 3002 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 3003 3004 /* First get the cause */ 3005 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3006 /* Be sure the queue bits are not cleared */ 3007 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3008 /* Clear interrupt with write */ 3009 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3010 3011 /* Link status change */ 3012 if (eicr & IXGBE_EICR_LSC) { 3013 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 3014 sc->task_requests |= IXGBE_REQUEST_TASK_LSC; 3015 } 3016 3017 if (eicr & IXGBE_EICR_FW_EVENT) { 3018 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FW_EVENT); 3019 sc->task_requests |= IXGBE_REQUEST_TASK_FWEVENT; 3020 } 3021 3022 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3023 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3024 (eicr & IXGBE_EICR_FLOW_DIR)) { 3025 /* This is probably overkill :) */ 3026 if (!atomic_cmpset_int(&sc->fdir_reinit, 0, 1)) 3027 return (FILTER_HANDLED); 3028 /* Disable the interrupt */ 3029 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR); 3030 sc->task_requests |= IXGBE_REQUEST_TASK_FDIR; 3031 } else 3032 if (eicr & IXGBE_EICR_ECC) { 3033 device_printf(iflib_get_dev(sc->ctx), 3034 "Received ECC Err, initiating reset\n"); 3035 hw->mac.flags |= 3036 ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; 3037 ixgbe_reset_hw(hw); 3038 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3039 IXGBE_EICR_ECC); 3040 } 3041 3042 /* Check for over temp condition */ 3043 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3044 switch (sc->hw.mac.type) { 3045 case ixgbe_mac_X550EM_a: 3046 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3047 break; 3048 IXGBE_WRITE_REG(hw, IXGBE_EIMC, 3049 IXGBE_EICR_GPI_SDP0_X550EM_a); 3050 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3051 IXGBE_EICR_GPI_SDP0_X550EM_a); 3052 retval = hw->phy.ops.check_overtemp(hw); 3053 if (retval != IXGBE_ERR_OVERTEMP) 3054 break; 3055 device_printf(iflib_get_dev(sc->ctx), 3056 "\nCRITICAL: OVER TEMP!!" 3057 " PHY IS SHUT DOWN!!\n"); 3058 device_printf(iflib_get_dev(sc->ctx), 3059 "System shutdown required!\n"); 3060 break; 3061 default: 3062 if (!(eicr & IXGBE_EICR_TS)) 3063 break; 3064 retval = hw->phy.ops.check_overtemp(hw); 3065 if (retval != IXGBE_ERR_OVERTEMP) 3066 break; 3067 device_printf(iflib_get_dev(sc->ctx), 3068 "\nCRITICAL: OVER TEMP!!" 3069 " PHY IS SHUT DOWN!!\n"); 3070 device_printf(iflib_get_dev(sc->ctx), 3071 "System shutdown required!\n"); 3072 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3073 IXGBE_EICR_TS); 3074 break; 3075 } 3076 } 3077 3078 /* Check for VF message */ 3079 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3080 (eicr & IXGBE_EICR_MAILBOX)) { 3081 sc->task_requests |= IXGBE_REQUEST_TASK_MBX; 3082 } 3083 } 3084 3085 /* 3086 * On E610, the firmware handles PHY configuration, so 3087 * there is no need to perform any SFP-specific tasks. 3088 */ 3089 if (hw->mac.type != ixgbe_mac_E610 && ixgbe_is_sfp(hw)) { 3090 /* Pluggable optics-related interrupt */ 3091 if (hw->mac.type >= ixgbe_mac_X540) 3092 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3093 else 3094 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3095 3096 if (eicr & eicr_mask) { 3097 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 3098 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 3099 } 3100 3101 if ((hw->mac.type == ixgbe_mac_82599EB) && 3102 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3103 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3104 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3105 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 3106 } 3107 } 3108 3109 /* Check for fan failure */ 3110 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 3111 ixgbe_check_fan_failure(sc, eicr, true); 3112 IXGBE_WRITE_REG(hw, IXGBE_EICR, 3113 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 3114 } 3115 3116 /* External PHY interrupt */ 3117 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3118 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3119 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 3120 sc->task_requests |= IXGBE_REQUEST_TASK_PHY; 3121 } 3122 3123 return (sc->task_requests != 0) ? 3124 FILTER_SCHEDULE_THREAD : FILTER_HANDLED; 3125 } /* ixgbe_msix_link */ 3126 3127 /************************************************************************ 3128 * ixgbe_sysctl_interrupt_rate_handler 3129 ************************************************************************/ 3130 static int 3131 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 3132 { 3133 struct ix_rx_queue *que = ((struct ix_rx_queue *)oidp->oid_arg1); 3134 int error; 3135 unsigned int reg, usec, rate; 3136 3137 if (atomic_load_acq_int(&que->sc->recovery_mode)) 3138 return (EPERM); 3139 3140 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix)); 3141 usec = ((reg & 0x0FF8) >> 3); 3142 if (usec > 0) 3143 rate = 500000 / usec; 3144 else 3145 rate = 0; 3146 error = sysctl_handle_int(oidp, &rate, 0, req); 3147 if (error || !req->newptr) 3148 return error; 3149 reg &= ~0xfff; /* default, no limitation */ 3150 ixgbe_max_interrupt_rate = 0; 3151 if (rate > 0 && rate < 500000) { 3152 if (rate < 1000) 3153 rate = 1000; 3154 ixgbe_max_interrupt_rate = rate; 3155 reg |= ((4000000/rate) & 0xff8); 3156 } 3157 IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg); 3158 3159 return (0); 3160 } /* ixgbe_sysctl_interrupt_rate_handler */ 3161 3162 /************************************************************************ 3163 * ixgbe_debug_dump_print_cluster 3164 ************************************************************************/ 3165 static u8 3166 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, struct sbuf *sbuf, 3167 u8 cluster_id) 3168 { 3169 u16 data_buf_size = IXGBE_ACI_MAX_BUFFER_SIZE; 3170 device_t dev = sc->dev; 3171 struct ixgbe_hw *hw = &sc->hw; 3172 const u8 reserved_buf[8] = {}; 3173 int max_aci_calls = 1000; 3174 int error, counter = 0; 3175 u8 *data_buf; 3176 3177 /* Input parameters / loop variables */ 3178 u16 table_id = 0; 3179 u32 offset = 0; 3180 3181 /* Data returned from ACI command */ 3182 u16 ret_buf_size = 0; 3183 u16 ret_next_cluster = 0; 3184 u16 ret_next_table = 0; 3185 u32 ret_next_index = 0; 3186 3187 data_buf = (u8 *)malloc(data_buf_size, M_IXGBE, M_NOWAIT | M_ZERO); 3188 if (!data_buf) 3189 return (0); 3190 3191 DEBUGOUT2("%s: dumping cluster id (relative) %d\n", 3192 __func__, cluster_id); 3193 3194 do { 3195 DEBUGOUT3("table_id 0x%04x offset 0x%08x buf_size %d\n", 3196 table_id, offset, data_buf_size); 3197 3198 error = ixgbe_aci_get_internal_data(hw, cluster_id, table_id, 3199 offset, data_buf, data_buf_size, &ret_buf_size, 3200 &ret_next_cluster, &ret_next_table, &ret_next_index); 3201 if (error) { 3202 device_printf(dev, 3203 "%s: Failed to get internal FW/HW data, error: %d, " 3204 "last aci status: %d\n", 3205 __func__, error, hw->aci.last_status); 3206 break; 3207 } 3208 3209 DEBUGOUT3("ret_table_id 0x%04x ret_offset 0x%08x " 3210 "ret_buf_size %d\n", 3211 ret_next_table, ret_next_index, ret_buf_size); 3212 3213 /* Print cluster id */ 3214 u32 print_cluster_id = (u32)cluster_id; 3215 sbuf_bcat(sbuf, &print_cluster_id, sizeof(print_cluster_id)); 3216 /* Print table id */ 3217 u32 print_table_id = (u32)table_id; 3218 sbuf_bcat(sbuf, &print_table_id, sizeof(print_table_id)); 3219 /* Print table length */ 3220 u32 print_table_length = (u32)ret_buf_size; 3221 sbuf_bcat(sbuf, &print_table_length, 3222 sizeof(print_table_length)); 3223 /* Print current offset */ 3224 u32 print_curr_offset = offset; 3225 sbuf_bcat(sbuf, &print_curr_offset, sizeof(print_curr_offset)); 3226 /* Print reserved bytes */ 3227 sbuf_bcat(sbuf, reserved_buf, sizeof(reserved_buf)); 3228 /* Print data */ 3229 sbuf_bcat(sbuf, data_buf, ret_buf_size); 3230 3231 /* Prepare for the next loop spin */ 3232 memset(data_buf, 0, data_buf_size); 3233 3234 bool last_index = (ret_next_index == 0xffffffff); 3235 bool last_table = ((ret_next_table == 0xff || 3236 ret_next_table == 0xffff) && 3237 last_index); 3238 3239 if (last_table) { 3240 /* End of the cluster */ 3241 DEBUGOUT1("End of the cluster ID %d\n", cluster_id); 3242 break; 3243 } else if (last_index) { 3244 /* End of the table */ 3245 table_id = ret_next_table; 3246 offset = 0; 3247 } else { 3248 /* More data left in the table */ 3249 offset = ret_next_index; 3250 } 3251 } while (++counter < max_aci_calls); 3252 3253 if (counter >= max_aci_calls) 3254 device_printf(dev, "Exceeded nr of ACI calls for cluster %d\n", 3255 cluster_id); 3256 3257 free(data_buf, M_IXGBE); 3258 3259 return (++cluster_id); 3260 } /* ixgbe_print_debug_dump_cluster */ 3261 3262 /************************************************************************ 3263 * ixgbe_sysctl_debug_dump_set_clusters 3264 * 3265 * Sets the cluster to dump from FW when Debug Dump requested. 3266 ************************************************************************/ 3267 static int 3268 ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS) 3269 { 3270 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3271 u32 clusters = sc->debug_dump_cluster_mask; 3272 device_t dev = sc->dev; 3273 int error; 3274 3275 error = sysctl_handle_32(oidp, &clusters, 0, req); 3276 if ((error) || !req->newptr) 3277 return (error); 3278 3279 if (clusters & ~(IXGBE_DBG_DUMP_VALID_CLUSTERS_MASK)) { 3280 device_printf(dev, 3281 "%s: Unrecognized parameter: %u\n", 3282 __func__, clusters); 3283 sc->debug_dump_cluster_mask = 3284 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID; 3285 return (EINVAL); 3286 } 3287 3288 sc->debug_dump_cluster_mask = clusters; 3289 3290 return (0); 3291 } /* ixgbe_sysctl_debug_dump_set_clusters */ 3292 3293 /************************************************************************ 3294 * ixgbe_sysctl_dump_debug_dump 3295 ************************************************************************/ 3296 static int 3297 ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS) 3298 { 3299 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 3300 device_t dev = sc->dev; 3301 struct sbuf *sbuf; 3302 int error = 0; 3303 3304 UNREFERENCED_PARAMETER(arg2); 3305 3306 if (!sc->do_debug_dump) { 3307 if (req->oldptr == NULL && req->newptr == NULL) { 3308 error = SYSCTL_OUT(req, 0, 0); 3309 return (error); 3310 } 3311 3312 char input_buf[2] = ""; 3313 error = sysctl_handle_string(oidp, input_buf, 3314 sizeof(input_buf), req); 3315 if ((error) || (req->newptr == NULL)) 3316 return (error); 3317 3318 if (input_buf[0] == '1') { 3319 if (sc->debug_dump_cluster_mask == 3320 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID) { 3321 device_printf(dev, 3322 "Debug Dump failed because an invalid " 3323 "cluster was specified.\n"); 3324 return (EINVAL); 3325 } 3326 3327 sc->do_debug_dump = true; 3328 return (0); 3329 } 3330 3331 return (EINVAL); 3332 } 3333 3334 /* Caller just wants the upper bound for size */ 3335 if (req->oldptr == NULL && req->newptr == NULL) { 3336 size_t est_output_len = IXGBE_DBG_DUMP_BASE_SIZE; 3337 if (sc->debug_dump_cluster_mask & 0x2) 3338 est_output_len += IXGBE_DBG_DUMP_BASE_SIZE; 3339 error = SYSCTL_OUT(req, 0, est_output_len); 3340 return (error); 3341 } 3342 3343 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 3344 sbuf_clear_flags(sbuf, SBUF_INCLUDENUL); 3345 3346 DEBUGOUT("FW Debug Dump running...\n"); 3347 3348 if (sc->debug_dump_cluster_mask) { 3349 for (u8 id = 0; id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX; id++) { 3350 if (sc->debug_dump_cluster_mask & BIT(id)) { 3351 DEBUGOUT1("Dumping cluster ID %u...\n", id); 3352 ixgbe_debug_dump_print_cluster(sc, sbuf, id); 3353 } 3354 } 3355 } else { 3356 u8 next_cluster_id = 0; 3357 do { 3358 DEBUGOUT1("Dumping cluster ID %u...\n", 3359 next_cluster_id); 3360 next_cluster_id = ixgbe_debug_dump_print_cluster(sc, 3361 sbuf, next_cluster_id); 3362 } while (next_cluster_id != 0 && 3363 next_cluster_id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX); 3364 } 3365 3366 sbuf_finish(sbuf); 3367 sbuf_delete(sbuf); 3368 3369 sc->do_debug_dump = false; 3370 3371 return (error); 3372 } /* ixgbe_sysctl_dump_debug_dump */ 3373 3374 /************************************************************************ 3375 * ixgbe_add_debug_dump_sysctls 3376 ************************************************************************/ 3377 static void 3378 ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc) 3379 { 3380 struct sysctl_oid_list *debug_list, *dump_list; 3381 struct sysctl_oid *dump_node; 3382 struct sysctl_ctx_list *ctx; 3383 device_t dev = sc->dev; 3384 3385 ctx = device_get_sysctl_ctx(dev); 3386 debug_list = SYSCTL_CHILDREN(sc->debug_sysctls); 3387 3388 dump_node = SYSCTL_ADD_NODE(ctx, debug_list, OID_AUTO, "dump", 3389 CTLFLAG_RD, NULL, "Internal FW/HW Dump"); 3390 dump_list = SYSCTL_CHILDREN(dump_node); 3391 3392 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "clusters", 3393 CTLTYPE_U32 | CTLFLAG_RW, sc, 0, 3394 ixgbe_sysctl_debug_dump_set_clusters, "SU", 3395 IXGBE_SYSCTL_DESC_DEBUG_DUMP_SET_CLUSTER); 3396 3397 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "dump", 3398 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, 3399 ixgbe_sysctl_dump_debug_dump, "", 3400 IXGBE_SYSCTL_DESC_DUMP_DEBUG_DUMP); 3401 } /* ixgbe_add_debug_dump_sysctls */ 3402 3403 static void 3404 ixgbe_add_debug_sysctls(struct ixgbe_softc *sc) 3405 { 3406 struct sysctl_oid_list *ctx_list; 3407 struct sysctl_ctx_list *ctx; 3408 device_t dev = sc->dev; 3409 3410 ctx = device_get_sysctl_ctx(dev); 3411 ctx_list = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3412 3413 sc->debug_sysctls = SYSCTL_ADD_NODE(ctx, ctx_list, OID_AUTO, "debug", 3414 CTLFLAG_RD, NULL, "Debug Sysctls"); 3415 3416 if (sc->feat_en & IXGBE_FEATURE_DBG_DUMP) 3417 ixgbe_add_debug_dump_sysctls(sc); 3418 3419 if (sc->feat_en & IXGBE_FEATURE_FW_LOGGING) 3420 ixgbe_add_fw_logging_tunables(sc, sc->debug_sysctls); 3421 } /* ixgbe_add_debug_sysctls */ 3422 3423 /************************************************************************ 3424 * ixgbe_add_device_sysctls 3425 ************************************************************************/ 3426 static void 3427 ixgbe_add_device_sysctls(if_ctx_t ctx) 3428 { 3429 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3430 device_t dev = iflib_get_dev(ctx); 3431 struct ixgbe_hw *hw = &sc->hw; 3432 struct sysctl_oid_list *child; 3433 struct sysctl_ctx_list *ctx_list; 3434 3435 ctx_list = device_get_sysctl_ctx(dev); 3436 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 3437 3438 /* Sysctls for all devices */ 3439 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc", 3440 CTLTYPE_INT | CTLFLAG_RW, 3441 sc, 0, ixgbe_sysctl_flowcntl, "I", 3442 IXGBE_SYSCTL_DESC_SET_FC); 3443 3444 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "advertise_speed", 3445 CTLTYPE_INT | CTLFLAG_RW, 3446 sc, 0, ixgbe_sysctl_advertise, "I", 3447 IXGBE_SYSCTL_DESC_ADV_SPEED); 3448 3449 sc->enable_aim = ixgbe_enable_aim; 3450 SYSCTL_ADD_INT(ctx_list, child, OID_AUTO, "enable_aim", CTLFLAG_RW, 3451 &sc->enable_aim, 0, "Interrupt Moderation"); 3452 3453 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version", 3454 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3455 ixgbe_sysctl_print_fw_version, "A", "Prints FW/NVM Versions"); 3456 3457 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3458 "tso_tcp_flags_mask_first_segment", 3459 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3460 sc, 0, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3461 "TSO TCP flags mask for first segment"); 3462 3463 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3464 "tso_tcp_flags_mask_middle_segment", 3465 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3466 sc, 1, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3467 "TSO TCP flags mask for middle segment"); 3468 3469 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, 3470 "tso_tcp_flags_mask_last_segment", 3471 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 3472 sc, 2, ixgbe_sysctl_tso_tcp_flags_mask, "IU", 3473 "TSO TCP flags mask for last segment"); 3474 3475 #ifdef IXGBE_DEBUG 3476 /* testing sysctls (for all devices) */ 3477 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "power_state", 3478 CTLTYPE_INT | CTLFLAG_RW, 3479 sc, 0, ixgbe_sysctl_power_state, 3480 "I", "PCI Power State"); 3481 3482 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "print_rss_config", 3483 CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 3484 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 3485 #endif 3486 /* for X550 series devices */ 3487 if (hw->mac.type >= ixgbe_mac_X550) 3488 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "dmac", 3489 CTLTYPE_U16 | CTLFLAG_RW, 3490 sc, 0, ixgbe_sysctl_dmac, 3491 "I", "DMA Coalesce"); 3492 3493 /* for WoL-capable devices */ 3494 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 3495 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wol_enable", 3496 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 3497 ixgbe_sysctl_wol_enable, "I", 3498 "Enable/Disable Wake on LAN"); 3499 3500 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wufc", 3501 CTLTYPE_U32 | CTLFLAG_RW, 3502 sc, 0, ixgbe_sysctl_wufc, 3503 "I", "Enable/Disable Wake Up Filters"); 3504 } 3505 3506 /* for X552/X557-AT devices */ 3507 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 3508 struct sysctl_oid *phy_node; 3509 struct sysctl_oid_list *phy_list; 3510 3511 phy_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "phy", 3512 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 3513 "External PHY sysctls"); 3514 phy_list = SYSCTL_CHILDREN(phy_node); 3515 3516 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, "temp", 3517 CTLTYPE_U16 | CTLFLAG_RD, 3518 sc, 0, ixgbe_sysctl_phy_temp, 3519 "I", "Current External PHY Temperature (Celsius)"); 3520 3521 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, 3522 "overtemp_occurred", 3523 CTLTYPE_U16 | CTLFLAG_RD, sc, 0, 3524 ixgbe_sysctl_phy_overtemp_occurred, "I", 3525 "External PHY High Temperature Event Occurred"); 3526 } 3527 3528 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3529 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_state", 3530 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 3531 ixgbe_sysctl_eee_state, "I", "EEE Power Save State"); 3532 } 3533 3534 ixgbe_add_debug_sysctls(sc); 3535 } /* ixgbe_add_device_sysctls */ 3536 3537 /************************************************************************ 3538 * ixgbe_allocate_pci_resources 3539 ************************************************************************/ 3540 static int 3541 ixgbe_allocate_pci_resources(if_ctx_t ctx) 3542 { 3543 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3544 device_t dev = iflib_get_dev(ctx); 3545 int rid; 3546 3547 rid = PCIR_BAR(0); 3548 sc->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 3549 RF_ACTIVE); 3550 3551 if (!(sc->pci_mem)) { 3552 device_printf(dev, 3553 "Unable to allocate bus resource: memory\n"); 3554 return (ENXIO); 3555 } 3556 3557 /* Save bus_space values for READ/WRITE_REG macros */ 3558 sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->pci_mem); 3559 sc->osdep.mem_bus_space_handle = 3560 rman_get_bushandle(sc->pci_mem); 3561 /* Set hw values for shared code */ 3562 sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle; 3563 3564 return (0); 3565 } /* ixgbe_allocate_pci_resources */ 3566 3567 /************************************************************************ 3568 * ixgbe_detach - Device removal routine 3569 * 3570 * Called when the driver is being removed. 3571 * Stops the adapter and deallocates all the resources 3572 * that were allocated for driver operation. 3573 * 3574 * return 0 on success, positive on failure 3575 ************************************************************************/ 3576 static int 3577 ixgbe_if_detach(if_ctx_t ctx) 3578 { 3579 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3580 device_t dev = iflib_get_dev(ctx); 3581 u32 ctrl_ext; 3582 3583 INIT_DEBUGOUT("ixgbe_detach: begin"); 3584 3585 if (ixgbe_pci_iov_detach(dev) != 0) { 3586 device_printf(dev, "SR-IOV in use; detach first.\n"); 3587 return (EBUSY); 3588 } 3589 3590 ixgbe_setup_low_power_mode(ctx); 3591 3592 /* let hardware know driver is unloading */ 3593 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3594 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3595 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3596 3597 callout_drain(&sc->fw_mode_timer); 3598 3599 if (sc->hw.mac.type == ixgbe_mac_E610) { 3600 ixgbe_disable_lse(sc); 3601 ixgbe_shutdown_aci(&sc->hw); 3602 } 3603 3604 ixgbe_free_pci_resources(ctx); 3605 3606 free(sc->mta, M_IXGBE); 3607 3608 return (0); 3609 } /* ixgbe_if_detach */ 3610 3611 /************************************************************************ 3612 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3613 * 3614 * Prepare the adapter/port for LPLU and/or WoL 3615 ************************************************************************/ 3616 static int 3617 ixgbe_setup_low_power_mode(if_ctx_t ctx) 3618 { 3619 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3620 struct ixgbe_hw *hw = &sc->hw; 3621 device_t dev = iflib_get_dev(ctx); 3622 s32 error = 0; 3623 3624 if (!hw->wol_enabled) 3625 ixgbe_set_phy_power(hw, false); 3626 3627 /* Limit power management flow to X550EM baseT */ 3628 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3629 hw->phy.ops.enter_lplu) { 3630 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3631 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3632 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3633 3634 /* 3635 * Clear Wake Up Status register to prevent any previous 3636 * wakeup events from waking us up immediately after we 3637 * suspend. 3638 */ 3639 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3640 3641 /* 3642 * Program the Wakeup Filter Control register with user filter 3643 * settings 3644 */ 3645 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3646 3647 /* Enable wakeups and power management in Wakeup Control */ 3648 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3649 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3650 3651 /* X550EM baseT adapters need a special LPLU flow */ 3652 hw->phy.reset_disable = true; 3653 ixgbe_if_stop(ctx); 3654 error = hw->phy.ops.enter_lplu(hw); 3655 if (error) 3656 device_printf(dev, "Error entering LPLU: %d\n", 3657 error); 3658 hw->phy.reset_disable = false; 3659 } else { 3660 /* Just stop for other adapters */ 3661 ixgbe_if_stop(ctx); 3662 } 3663 3664 return error; 3665 } /* ixgbe_setup_low_power_mode */ 3666 3667 /************************************************************************ 3668 * ixgbe_shutdown - Shutdown entry point 3669 ************************************************************************/ 3670 static int 3671 ixgbe_if_shutdown(if_ctx_t ctx) 3672 { 3673 int error = 0; 3674 3675 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3676 3677 error = ixgbe_setup_low_power_mode(ctx); 3678 3679 return (error); 3680 } /* ixgbe_if_shutdown */ 3681 3682 /************************************************************************ 3683 * ixgbe_suspend 3684 * 3685 * From D0 to D3 3686 ************************************************************************/ 3687 static int 3688 ixgbe_if_suspend(if_ctx_t ctx) 3689 { 3690 int error = 0; 3691 3692 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3693 3694 error = ixgbe_setup_low_power_mode(ctx); 3695 3696 return (error); 3697 } /* ixgbe_if_suspend */ 3698 3699 /************************************************************************ 3700 * ixgbe_resume 3701 * 3702 * From D3 to D0 3703 ************************************************************************/ 3704 static int 3705 ixgbe_if_resume(if_ctx_t ctx) 3706 { 3707 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3708 device_t dev = iflib_get_dev(ctx); 3709 if_t ifp = iflib_get_ifp(ctx); 3710 struct ixgbe_hw *hw = &sc->hw; 3711 u32 wus; 3712 3713 INIT_DEBUGOUT("ixgbe_resume: begin"); 3714 3715 /* Read & clear WUS register */ 3716 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 3717 if (wus) 3718 device_printf(dev, "Woken up by (WUS): %#010x\n", 3719 IXGBE_READ_REG(hw, IXGBE_WUS)); 3720 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3721 /* And clear WUFC until next low-power transition */ 3722 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3723 3724 /* 3725 * Required after D3->D0 transition; 3726 * will re-advertise all previous advertised speeds 3727 */ 3728 if (if_getflags(ifp) & IFF_UP) 3729 ixgbe_if_init(ctx); 3730 3731 return (0); 3732 } /* ixgbe_if_resume */ 3733 3734 /************************************************************************ 3735 * ixgbe_if_mtu_set - Ioctl mtu entry point 3736 * 3737 * Return 0 on success, EINVAL on failure 3738 ************************************************************************/ 3739 static int 3740 ixgbe_if_mtu_set(if_ctx_t ctx, uint32_t mtu) 3741 { 3742 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3743 int error = 0; 3744 3745 IOCTL_DEBUGOUT("ioctl: SIOCIFMTU (Set Interface MTU)"); 3746 3747 if (mtu > IXGBE_MAX_MTU) { 3748 error = EINVAL; 3749 } else { 3750 sc->max_frame_size = mtu + IXGBE_MTU_HDR; 3751 } 3752 3753 return error; 3754 } /* ixgbe_if_mtu_set */ 3755 3756 /************************************************************************ 3757 * ixgbe_if_crcstrip_set 3758 ************************************************************************/ 3759 static void 3760 ixgbe_if_crcstrip_set(if_ctx_t ctx, int onoff, int crcstrip) 3761 { 3762 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3763 struct ixgbe_hw *hw = &sc->hw; 3764 /* crc stripping is set in two places: 3765 * IXGBE_HLREG0 (modified on init_locked and hw reset) 3766 * IXGBE_RDRXCTL (set by the original driver in 3767 * ixgbe_setup_hw_rsc() called in init_locked. 3768 * We disable the setting when netmap is compiled in). 3769 * We update the values here, but also in ixgbe.c because 3770 * init_locked sometimes is called outside our control. 3771 */ 3772 uint32_t hl, rxc; 3773 3774 hl = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3775 rxc = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 3776 #ifdef NETMAP 3777 if (netmap_verbose) 3778 D("%s read HLREG 0x%x rxc 0x%x", 3779 onoff ? "enter" : "exit", hl, rxc); 3780 #endif 3781 /* hw requirements ... */ 3782 rxc &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; 3783 rxc |= IXGBE_RDRXCTL_RSCACKC; 3784 if (onoff && !crcstrip) { 3785 /* keep the crc. Fast rx */ 3786 hl &= ~IXGBE_HLREG0_RXCRCSTRP; 3787 rxc &= ~IXGBE_RDRXCTL_CRCSTRIP; 3788 } else { 3789 /* reset default mode */ 3790 hl |= IXGBE_HLREG0_RXCRCSTRP; 3791 rxc |= IXGBE_RDRXCTL_CRCSTRIP; 3792 } 3793 #ifdef NETMAP 3794 if (netmap_verbose) 3795 D("%s write HLREG 0x%x rxc 0x%x", 3796 onoff ? "enter" : "exit", hl, rxc); 3797 #endif 3798 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl); 3799 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc); 3800 } /* ixgbe_if_crcstrip_set */ 3801 3802 /********************************************************************* 3803 * ixgbe_if_init - Init entry point 3804 * 3805 * Used in two ways: It is used by the stack as an init 3806 * entry point in network interface structure. It is also 3807 * used by the driver as a hw/sw initialization routine to 3808 * get to a consistent state. 3809 * 3810 * Return 0 on success, positive on failure 3811 **********************************************************************/ 3812 void 3813 ixgbe_if_init(if_ctx_t ctx) 3814 { 3815 struct ixgbe_softc *sc = iflib_get_softc(ctx); 3816 if_t ifp = iflib_get_ifp(ctx); 3817 device_t dev = iflib_get_dev(ctx); 3818 struct ixgbe_hw *hw = &sc->hw; 3819 struct ix_rx_queue *rx_que; 3820 struct ix_tx_queue *tx_que; 3821 u32 txdctl, mhadd; 3822 u32 rxdctl, rxctrl; 3823 u32 ctrl_ext; 3824 3825 int i, j, err; 3826 3827 INIT_DEBUGOUT("ixgbe_if_init: begin"); 3828 3829 /* Queue indices may change with IOV mode */ 3830 ixgbe_align_all_queue_indices(sc); 3831 3832 /* reprogram the RAR[0] in case user changed it. */ 3833 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 3834 3835 /* Get the latest mac address, User can use a LAA */ 3836 bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 3837 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 3838 hw->addr_ctrl.rar_used_count = 1; 3839 3840 ixgbe_init_hw(hw); 3841 3842 ixgbe_initialize_iov(sc); 3843 3844 ixgbe_initialize_transmit_units(ctx); 3845 3846 /* Setup Multicast table */ 3847 ixgbe_if_multi_set(ctx); 3848 3849 /* Determine the correct mbuf pool, based on frame size */ 3850 sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); 3851 3852 /* Configure RX settings */ 3853 ixgbe_initialize_receive_units(ctx); 3854 3855 /* 3856 * Initialize variable holding task enqueue requests 3857 * from MSI-X interrupts 3858 */ 3859 sc->task_requests = 0; 3860 3861 /* Enable SDP & MSI-X interrupts based on adapter */ 3862 ixgbe_config_gpie(sc); 3863 3864 /* Set MTU size */ 3865 if (if_getmtu(ifp) > ETHERMTU) { 3866 /* aka IXGBE_MAXFRS on 82599 and newer */ 3867 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 3868 mhadd &= ~IXGBE_MHADD_MFS_MASK; 3869 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 3870 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 3871 } 3872 3873 /* Now enable all the queues */ 3874 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues; 3875 i++, tx_que++) { 3876 struct tx_ring *txr = &tx_que->txr; 3877 3878 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 3879 txdctl |= IXGBE_TXDCTL_ENABLE; 3880 /* Set WTHRESH to 8, burst writeback */ 3881 txdctl |= (8 << 16); 3882 /* 3883 * When the internal queue falls below PTHRESH (32), 3884 * start prefetching as long as there are at least 3885 * HTHRESH (1) buffers ready. The values are taken 3886 * from the Intel linux driver 3.8.21. 3887 * Prefetching enables tx line rate even with 1 queue. 3888 */ 3889 txdctl |= (32 << 0) | (1 << 8); 3890 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 3891 } 3892 3893 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues; 3894 i++, rx_que++) { 3895 struct rx_ring *rxr = &rx_que->rxr; 3896 3897 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 3898 if (hw->mac.type == ixgbe_mac_82598EB) { 3899 /* 3900 * PTHRESH = 21 3901 * HTHRESH = 4 3902 * WTHRESH = 8 3903 */ 3904 rxdctl &= ~0x3FFFFF; 3905 rxdctl |= 0x080420; 3906 } 3907 rxdctl |= IXGBE_RXDCTL_ENABLE; 3908 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 3909 for (j = 0; j < 10; j++) { 3910 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 3911 IXGBE_RXDCTL_ENABLE) 3912 break; 3913 else 3914 msec_delay(1); 3915 } 3916 wmb(); 3917 } 3918 3919 /* Enable Receive engine */ 3920 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 3921 if (hw->mac.type == ixgbe_mac_82598EB) 3922 rxctrl |= IXGBE_RXCTRL_DMBYPS; 3923 rxctrl |= IXGBE_RXCTRL_RXEN; 3924 ixgbe_enable_rx_dma(hw, rxctrl); 3925 3926 /* Set up MSI/MSI-X routing */ 3927 if (ixgbe_enable_msix) { 3928 ixgbe_configure_ivars(sc); 3929 /* Set up auto-mask */ 3930 if (hw->mac.type == ixgbe_mac_82598EB) 3931 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 3932 else { 3933 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 3934 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 3935 } 3936 } else { /* Simple settings for Legacy/MSI */ 3937 ixgbe_set_ivar(sc, 0, 0, 0); 3938 ixgbe_set_ivar(sc, 0, 0, 1); 3939 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 3940 } 3941 3942 ixgbe_init_fdir(sc); 3943 3944 /* 3945 * Check on any SFP devices that 3946 * need to be kick-started 3947 */ 3948 if (hw->phy.type == ixgbe_phy_none) { 3949 err = hw->phy.ops.identify(hw); 3950 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3951 device_printf(dev, 3952 "Unsupported SFP+ module type was detected.\n"); 3953 return; 3954 } 3955 } 3956 3957 /* Set moderation on the Link interrupt */ 3958 IXGBE_WRITE_REG(hw, IXGBE_EITR(sc->vector), IXGBE_LINK_ITR); 3959 3960 /* Enable power to the phy. */ 3961 ixgbe_set_phy_power(hw, true); 3962 3963 /* Config/Enable Link */ 3964 ixgbe_config_link(ctx); 3965 3966 /* Hardware Packet Buffer & Flow Control setup */ 3967 ixgbe_config_delay_values(sc); 3968 3969 /* Initialize the FC settings */ 3970 ixgbe_start_hw(hw); 3971 3972 /* Set up VLAN support and filter */ 3973 ixgbe_setup_vlan_hw_support(ctx); 3974 3975 /* Setup DMA Coalescing */ 3976 ixgbe_config_dmac(sc); 3977 3978 /* And now turn on interrupts */ 3979 ixgbe_if_enable_intr(ctx); 3980 3981 /* Enable the use of the MBX by the VF's */ 3982 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 3983 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 3984 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 3985 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 3986 } 3987 3988 } /* ixgbe_init_locked */ 3989 3990 /************************************************************************ 3991 * ixgbe_set_ivar 3992 * 3993 * Setup the correct IVAR register for a particular MSI-X interrupt 3994 * (yes this is all very magic and confusing :) 3995 * - entry is the register array entry 3996 * - vector is the MSI-X vector for this queue 3997 * - type is RX/TX/MISC 3998 ************************************************************************/ 3999 static void 4000 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4001 { 4002 struct ixgbe_hw *hw = &sc->hw; 4003 u32 ivar, index; 4004 4005 vector |= IXGBE_IVAR_ALLOC_VAL; 4006 4007 switch (hw->mac.type) { 4008 case ixgbe_mac_82598EB: 4009 if (type == -1) 4010 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4011 else 4012 entry += (type * 64); 4013 index = (entry >> 2) & 0x1F; 4014 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4015 ivar &= ~(0xFF << (8 * (entry & 0x3))); 4016 ivar |= (vector << (8 * (entry & 0x3))); 4017 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4018 break; 4019 case ixgbe_mac_82599EB: 4020 case ixgbe_mac_X540: 4021 case ixgbe_mac_X550: 4022 case ixgbe_mac_X550EM_x: 4023 case ixgbe_mac_X550EM_a: 4024 case ixgbe_mac_E610: 4025 if (type == -1) { /* MISC IVAR */ 4026 index = (entry & 1) * 8; 4027 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4028 ivar &= ~(0xFF << index); 4029 ivar |= (vector << index); 4030 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4031 } else { /* RX/TX IVARS */ 4032 index = (16 * (entry & 1)) + (8 * type); 4033 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4034 ivar &= ~(0xFF << index); 4035 ivar |= (vector << index); 4036 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4037 } 4038 default: 4039 break; 4040 } 4041 } /* ixgbe_set_ivar */ 4042 4043 /************************************************************************ 4044 * ixgbe_configure_ivars 4045 ************************************************************************/ 4046 static void 4047 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4048 { 4049 struct ix_rx_queue *rx_que = sc->rx_queues; 4050 struct ix_tx_queue *tx_que = sc->tx_queues; 4051 u32 newitr; 4052 4053 if (ixgbe_max_interrupt_rate > 0) 4054 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 4055 else { 4056 /* 4057 * Disable DMA coalescing if interrupt moderation is 4058 * disabled. 4059 */ 4060 sc->dmac = 0; 4061 newitr = 0; 4062 } 4063 4064 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) { 4065 struct rx_ring *rxr = &rx_que->rxr; 4066 4067 /* First the RX queue entry */ 4068 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0); 4069 4070 /* Set an Initial EITR value */ 4071 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr); 4072 } 4073 for (int i = 0; i < sc->num_tx_queues; i++, tx_que++) { 4074 struct tx_ring *txr = &tx_que->txr; 4075 4076 /* ... and the TX */ 4077 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1); 4078 } 4079 /* For the Link interrupt */ 4080 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4081 } /* ixgbe_configure_ivars */ 4082 4083 /************************************************************************ 4084 * ixgbe_config_gpie 4085 ************************************************************************/ 4086 static void 4087 ixgbe_config_gpie(struct ixgbe_softc *sc) 4088 { 4089 struct ixgbe_hw *hw = &sc->hw; 4090 u32 gpie; 4091 4092 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4093 4094 if (sc->intr_type == IFLIB_INTR_MSIX) { 4095 /* Enable Enhanced MSI-X mode */ 4096 gpie |= IXGBE_GPIE_MSIX_MODE | 4097 IXGBE_GPIE_EIAME | 4098 IXGBE_GPIE_PBA_SUPPORT | 4099 IXGBE_GPIE_OCD; 4100 } 4101 4102 /* Fan Failure Interrupt */ 4103 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4104 gpie |= IXGBE_SDP1_GPIEN; 4105 4106 /* Thermal Sensor Interrupt */ 4107 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4108 gpie |= IXGBE_SDP0_GPIEN_X540; 4109 4110 /* Link detection */ 4111 switch (hw->mac.type) { 4112 case ixgbe_mac_82599EB: 4113 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4114 break; 4115 case ixgbe_mac_X550EM_x: 4116 case ixgbe_mac_X550EM_a: 4117 gpie |= IXGBE_SDP0_GPIEN_X540; 4118 break; 4119 default: 4120 break; 4121 } 4122 4123 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4124 4125 } /* ixgbe_config_gpie */ 4126 4127 /************************************************************************ 4128 * ixgbe_config_delay_values 4129 * 4130 * Requires sc->max_frame_size to be set. 4131 ************************************************************************/ 4132 static void 4133 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4134 { 4135 struct ixgbe_hw *hw = &sc->hw; 4136 u32 rxpb, frame, size, tmp; 4137 4138 frame = sc->max_frame_size; 4139 4140 /* Calculate High Water */ 4141 switch (hw->mac.type) { 4142 case ixgbe_mac_X540: 4143 case ixgbe_mac_X550: 4144 case ixgbe_mac_X550EM_x: 4145 case ixgbe_mac_X550EM_a: 4146 tmp = IXGBE_DV_X540(frame, frame); 4147 break; 4148 default: 4149 tmp = IXGBE_DV(frame, frame); 4150 break; 4151 } 4152 size = IXGBE_BT2KB(tmp); 4153 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4154 hw->fc.high_water[0] = rxpb - size; 4155 4156 /* Now calculate Low Water */ 4157 switch (hw->mac.type) { 4158 case ixgbe_mac_X540: 4159 case ixgbe_mac_X550: 4160 case ixgbe_mac_X550EM_x: 4161 case ixgbe_mac_X550EM_a: 4162 tmp = IXGBE_LOW_DV_X540(frame); 4163 break; 4164 default: 4165 tmp = IXGBE_LOW_DV(frame); 4166 break; 4167 } 4168 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4169 4170 hw->fc.pause_time = IXGBE_FC_PAUSE; 4171 hw->fc.send_xon = true; 4172 } /* ixgbe_config_delay_values */ 4173 4174 /************************************************************************ 4175 * ixgbe_set_multi - Multicast Update 4176 * 4177 * Called whenever multicast address list is updated. 4178 ************************************************************************/ 4179 static u_int 4180 ixgbe_mc_filter_apply(void *arg, struct sockaddr_dl *sdl, u_int idx) 4181 { 4182 struct ixgbe_softc *sc = arg; 4183 struct ixgbe_mc_addr *mta = sc->mta; 4184 4185 if (idx == MAX_NUM_MULTICAST_ADDRESSES) 4186 return (0); 4187 bcopy(LLADDR(sdl), mta[idx].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4188 mta[idx].vmdq = sc->pool; 4189 4190 return (1); 4191 } /* ixgbe_mc_filter_apply */ 4192 4193 static void 4194 ixgbe_if_multi_set(if_ctx_t ctx) 4195 { 4196 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4197 struct ixgbe_mc_addr *mta; 4198 if_t ifp = iflib_get_ifp(ctx); 4199 u8 *update_ptr; 4200 u32 fctrl; 4201 u_int mcnt; 4202 4203 IOCTL_DEBUGOUT("ixgbe_if_multi_set: begin"); 4204 4205 mta = sc->mta; 4206 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4207 4208 mcnt = if_foreach_llmaddr(iflib_get_ifp(ctx), ixgbe_mc_filter_apply, 4209 sc); 4210 4211 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 4212 update_ptr = (u8 *)mta; 4213 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4214 ixgbe_mc_array_itr, true); 4215 } 4216 4217 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4218 4219 if (if_getflags(ifp) & IFF_PROMISC) 4220 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4221 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 4222 if_getflags(ifp) & IFF_ALLMULTI) { 4223 fctrl |= IXGBE_FCTRL_MPE; 4224 fctrl &= ~IXGBE_FCTRL_UPE; 4225 } else 4226 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4227 4228 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4229 } /* ixgbe_if_multi_set */ 4230 4231 /************************************************************************ 4232 * ixgbe_mc_array_itr 4233 * 4234 * An iterator function needed by the multicast shared code. 4235 * It feeds the shared code routine the addresses in the 4236 * array of ixgbe_set_multi() one by one. 4237 ************************************************************************/ 4238 static u8 * 4239 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4240 { 4241 struct ixgbe_mc_addr *mta; 4242 4243 mta = (struct ixgbe_mc_addr *)*update_ptr; 4244 *vmdq = mta->vmdq; 4245 4246 *update_ptr = (u8*)(mta + 1); 4247 4248 return (mta->addr); 4249 } /* ixgbe_mc_array_itr */ 4250 4251 /************************************************************************ 4252 * ixgbe_local_timer - Timer routine 4253 * 4254 * Checks for link status, updates statistics, 4255 * and runs the watchdog check. 4256 ************************************************************************/ 4257 static void 4258 ixgbe_if_timer(if_ctx_t ctx, uint16_t qid) 4259 { 4260 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4261 4262 if (qid != 0) 4263 return; 4264 4265 /* Check for pluggable optics */ 4266 if (sc->sfp_probe) 4267 if (!ixgbe_sfp_probe(ctx)) 4268 return; /* Nothing to do */ 4269 4270 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 0); 4271 4272 /* Fire off the adminq task */ 4273 iflib_admin_intr_deferred(ctx); 4274 4275 } /* ixgbe_if_timer */ 4276 4277 /************************************************************************ 4278 * ixgbe_fw_mode_timer - FW mode timer routine 4279 ************************************************************************/ 4280 static void 4281 ixgbe_fw_mode_timer(void *arg) 4282 { 4283 struct ixgbe_softc *sc = arg; 4284 struct ixgbe_hw *hw = &sc->hw; 4285 4286 if (ixgbe_fw_recovery_mode(hw)) { 4287 if (atomic_cmpset_acq_int(&sc->recovery_mode, 0, 1)) { 4288 /* Firmware error detected, entering recovery mode */ 4289 device_printf(sc->dev, 4290 "Firmware recovery mode detected. Limiting" 4291 " functionality. Refer to the Intel(R) Ethernet" 4292 " Adapters and Devices User Guide for details on" 4293 " firmware recovery mode.\n"); 4294 4295 if (hw->adapter_stopped == FALSE) 4296 ixgbe_if_stop(sc->ctx); 4297 } 4298 } else 4299 atomic_cmpset_acq_int(&sc->recovery_mode, 1, 0); 4300 4301 4302 callout_reset(&sc->fw_mode_timer, hz, 4303 ixgbe_fw_mode_timer, sc); 4304 } /* ixgbe_fw_mode_timer */ 4305 4306 /************************************************************************ 4307 * ixgbe_sfp_probe 4308 * 4309 * Determine if a port had optics inserted. 4310 ************************************************************************/ 4311 static bool 4312 ixgbe_sfp_probe(if_ctx_t ctx) 4313 { 4314 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4315 struct ixgbe_hw *hw = &sc->hw; 4316 device_t dev = iflib_get_dev(ctx); 4317 bool result = false; 4318 4319 if ((hw->phy.type == ixgbe_phy_nl) && 4320 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 4321 s32 ret = hw->phy.ops.identify_sfp(hw); 4322 if (ret) 4323 goto out; 4324 ret = hw->phy.ops.reset(hw); 4325 sc->sfp_probe = false; 4326 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4327 device_printf(dev, 4328 "Unsupported SFP+ module detected!"); 4329 device_printf(dev, 4330 "Reload driver with supported module.\n"); 4331 goto out; 4332 } else 4333 device_printf(dev, "SFP+ module detected!\n"); 4334 /* We now have supported optics */ 4335 result = true; 4336 } 4337 out: 4338 4339 return (result); 4340 } /* ixgbe_sfp_probe */ 4341 4342 /************************************************************************ 4343 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4344 ************************************************************************/ 4345 static void 4346 ixgbe_handle_mod(void *context) 4347 { 4348 if_ctx_t ctx = context; 4349 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4350 struct ixgbe_hw *hw = &sc->hw; 4351 device_t dev = iflib_get_dev(ctx); 4352 u32 err, cage_full = 0; 4353 4354 if (sc->hw.need_crosstalk_fix) { 4355 switch (hw->mac.type) { 4356 case ixgbe_mac_82599EB: 4357 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4358 IXGBE_ESDP_SDP2; 4359 break; 4360 case ixgbe_mac_X550EM_x: 4361 case ixgbe_mac_X550EM_a: 4362 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & 4363 IXGBE_ESDP_SDP0; 4364 break; 4365 default: 4366 break; 4367 } 4368 4369 if (!cage_full) 4370 goto handle_mod_out; 4371 } 4372 4373 err = hw->phy.ops.identify_sfp(hw); 4374 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4375 device_printf(dev, 4376 "Unsupported SFP+ module type was detected.\n"); 4377 goto handle_mod_out; 4378 } 4379 4380 if (hw->mac.type == ixgbe_mac_82598EB) 4381 err = hw->phy.ops.reset(hw); 4382 else 4383 err = hw->mac.ops.setup_sfp(hw); 4384 4385 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4386 device_printf(dev, 4387 "Setup failure - unsupported SFP+ module type.\n"); 4388 goto handle_mod_out; 4389 } 4390 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4391 return; 4392 4393 handle_mod_out: 4394 sc->task_requests &= ~(IXGBE_REQUEST_TASK_MSF); 4395 } /* ixgbe_handle_mod */ 4396 4397 4398 /************************************************************************ 4399 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4400 ************************************************************************/ 4401 static void 4402 ixgbe_handle_msf(void *context) 4403 { 4404 if_ctx_t ctx = context; 4405 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4406 struct ixgbe_hw *hw = &sc->hw; 4407 u32 autoneg; 4408 bool negotiate; 4409 4410 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4411 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4412 4413 autoneg = hw->phy.autoneg_advertised; 4414 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4415 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4416 if (hw->mac.ops.setup_link) 4417 hw->mac.ops.setup_link(hw, autoneg, true); 4418 4419 /* Adjust media types shown in ifconfig */ 4420 ifmedia_removeall(sc->media); 4421 ixgbe_add_media_types(sc->ctx); 4422 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); 4423 } /* ixgbe_handle_msf */ 4424 4425 /************************************************************************ 4426 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4427 ************************************************************************/ 4428 static void 4429 ixgbe_handle_phy(void *context) 4430 { 4431 if_ctx_t ctx = context; 4432 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4433 struct ixgbe_hw *hw = &sc->hw; 4434 int error; 4435 4436 error = hw->phy.ops.handle_lasi(hw); 4437 if (error == IXGBE_ERR_OVERTEMP) 4438 device_printf(sc->dev, 4439 "CRITICAL: EXTERNAL PHY OVER TEMP!!" 4440 " PHY will downshift to lower power state!\n"); 4441 else if (error) 4442 device_printf(sc->dev, 4443 "Error handling LASI interrupt: %d\n", error); 4444 } /* ixgbe_handle_phy */ 4445 4446 /************************************************************************ 4447 * ixgbe_enable_lse - enable link status events 4448 * 4449 * Sets mask and enables link status events 4450 ************************************************************************/ 4451 s32 ixgbe_enable_lse(struct ixgbe_softc *sc) 4452 { 4453 s32 error; 4454 4455 u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN | 4456 IXGBE_ACI_LINK_EVENT_MEDIA_NA | 4457 IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL | 4458 IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL)); 4459 4460 error = ixgbe_configure_lse(&sc->hw, TRUE, mask); 4461 if (error) 4462 return (error); 4463 4464 sc->lse_mask = mask; 4465 return (IXGBE_SUCCESS); 4466 } /* ixgbe_enable_lse */ 4467 4468 /************************************************************************ 4469 * ixgbe_disable_lse - disable link status events 4470 ************************************************************************/ 4471 s32 ixgbe_disable_lse(struct ixgbe_softc *sc) 4472 { 4473 s32 error; 4474 4475 error = ixgbe_configure_lse(&sc->hw, false, sc->lse_mask); 4476 if (error) 4477 return (error); 4478 4479 sc->lse_mask = 0; 4480 return (IXGBE_SUCCESS); 4481 } /* ixgbe_disable_lse */ 4482 4483 /************************************************************************ 4484 * ixgbe_handle_fw_event - Tasklet for MSI-X Link Status Event interrupts 4485 ************************************************************************/ 4486 static void 4487 ixgbe_handle_fw_event(void *context) 4488 { 4489 if_ctx_t ctx = context; 4490 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4491 struct ixgbe_hw *hw = &sc->hw; 4492 struct ixgbe_aci_event event; 4493 bool pending = false; 4494 s32 error; 4495 4496 event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE; 4497 event.msg_buf = malloc(event.buf_len, M_IXGBE, M_ZERO | M_NOWAIT); 4498 if (!event.msg_buf) { 4499 device_printf(sc->dev, "Can not allocate buffer for " 4500 "event message\n"); 4501 return; 4502 } 4503 4504 do { 4505 error = ixgbe_aci_get_event(hw, &event, &pending); 4506 if (error) { 4507 device_printf(sc->dev, "Error getting event from " 4508 "FW:%d\n", error); 4509 break; 4510 } 4511 4512 switch (le16toh(event.desc.opcode)) { 4513 case ixgbe_aci_opc_get_link_status: 4514 sc->task_requests |= IXGBE_REQUEST_TASK_LSC; 4515 break; 4516 4517 case ixgbe_aci_opc_fw_logs_event: 4518 ixgbe_fwlog_event_dump(&sc->hw, &event.desc, event.msg_buf); 4519 break; 4520 4521 case ixgbe_aci_opc_temp_tca_event: 4522 if (hw->adapter_stopped == FALSE) 4523 ixgbe_if_stop(ctx); 4524 device_printf(sc->dev, 4525 "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n"); 4526 device_printf(sc->dev, "System shutdown required!\n"); 4527 break; 4528 4529 default: 4530 device_printf(sc->dev, 4531 "Unknown FW event captured, opcode=0x%04X\n", 4532 le16toh(event.desc.opcode)); 4533 break; 4534 } 4535 } while (pending); 4536 4537 free(event.msg_buf, M_IXGBE); 4538 } /* ixgbe_handle_fw_event */ 4539 4540 /************************************************************************ 4541 * ixgbe_if_stop - Stop the hardware 4542 * 4543 * Disables all traffic on the adapter by issuing a 4544 * global reset on the MAC and deallocates TX/RX buffers. 4545 ************************************************************************/ 4546 static void 4547 ixgbe_if_stop(if_ctx_t ctx) 4548 { 4549 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4550 struct ixgbe_hw *hw = &sc->hw; 4551 4552 INIT_DEBUGOUT("ixgbe_if_stop: begin\n"); 4553 4554 ixgbe_reset_hw(hw); 4555 hw->adapter_stopped = false; 4556 ixgbe_stop_adapter(hw); 4557 if (hw->mac.type == ixgbe_mac_82599EB) 4558 ixgbe_stop_mac_link_on_d3_82599(hw); 4559 /* Turn off the laser - noop with no optics */ 4560 ixgbe_disable_tx_laser(hw); 4561 4562 /* Update the stack */ 4563 sc->link_up = false; 4564 ixgbe_if_update_admin_status(ctx); 4565 4566 /* reprogram the RAR[0] in case user changed it. */ 4567 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 4568 4569 return; 4570 } /* ixgbe_if_stop */ 4571 4572 /************************************************************************ 4573 * ixgbe_link_speed_to_str - Convert link speed to string 4574 * 4575 * Helper function to convert link speed constants to human-readable 4576 * string representations in conventional Gbps or Mbps. 4577 ************************************************************************/ 4578 static const char * 4579 ixgbe_link_speed_to_str(u32 link_speed) 4580 { 4581 switch (link_speed) { 4582 case IXGBE_LINK_SPEED_10GB_FULL: 4583 return "10 Gbps"; 4584 case IXGBE_LINK_SPEED_5GB_FULL: 4585 return "5 Gbps"; 4586 case IXGBE_LINK_SPEED_2_5GB_FULL: 4587 return "2.5 Gbps"; 4588 case IXGBE_LINK_SPEED_1GB_FULL: 4589 return "1 Gbps"; 4590 case IXGBE_LINK_SPEED_100_FULL: 4591 return "100 Mbps"; 4592 case IXGBE_LINK_SPEED_10_FULL: 4593 return "10 Mbps"; 4594 default: 4595 return "Unknown"; 4596 } 4597 } /* ixgbe_link_speed_to_str */ 4598 4599 /************************************************************************ 4600 * ixgbe_update_link_status - Update OS on link state 4601 * 4602 * Note: Only updates the OS on the cached link state. 4603 * The real check of the hardware only happens with 4604 * a link interrupt. 4605 ************************************************************************/ 4606 static void 4607 ixgbe_if_update_admin_status(if_ctx_t ctx) 4608 { 4609 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4610 device_t dev = iflib_get_dev(ctx); 4611 4612 if (sc->link_up) { 4613 if (sc->link_active == false) { 4614 if (bootverbose) 4615 device_printf(dev, 4616 "Link is up %s Full Duplex\n", 4617 ixgbe_link_speed_to_str(sc->link_speed)); 4618 sc->link_active = true; 4619 4620 /* If link speed is <= 1Gbps and EEE is enabled, 4621 * log info. 4622 */ 4623 if (sc->hw.mac.type == ixgbe_mac_E610 && 4624 (sc->feat_en & IXGBE_FEATURE_EEE) && 4625 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 4626 device_printf(sc->dev, 4627 "Energy Efficient Ethernet (EEE) feature " 4628 "is not supported on link speeds equal to " 4629 "or below 1Gbps. EEE is supported on " 4630 "speeds above 1Gbps.\n"); 4631 } 4632 4633 /* Update any Flow Control changes */ 4634 ixgbe_fc_enable(&sc->hw); 4635 /* Update DMA coalescing config */ 4636 ixgbe_config_dmac(sc); 4637 iflib_link_state_change(ctx, LINK_STATE_UP, 4638 ixgbe_link_speed_to_baudrate(sc->link_speed)); 4639 4640 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 4641 ixgbe_ping_all_vfs(sc); 4642 } 4643 } else { /* Link down */ 4644 if (sc->link_active == true) { 4645 if (bootverbose) 4646 device_printf(dev, "Link is Down\n"); 4647 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); 4648 sc->link_active = false; 4649 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 4650 ixgbe_ping_all_vfs(sc); 4651 } 4652 } 4653 4654 /* Handle task requests from msix_link() */ 4655 if (sc->task_requests & IXGBE_REQUEST_TASK_FWEVENT) 4656 ixgbe_handle_fw_event(ctx); 4657 if (sc->task_requests & IXGBE_REQUEST_TASK_MOD) 4658 ixgbe_handle_mod(ctx); 4659 if (sc->task_requests & IXGBE_REQUEST_TASK_MSF) 4660 ixgbe_handle_msf(ctx); 4661 if (sc->task_requests & IXGBE_REQUEST_TASK_MBX) 4662 ixgbe_handle_mbx(ctx); 4663 if (sc->task_requests & IXGBE_REQUEST_TASK_FDIR) 4664 ixgbe_reinit_fdir(ctx); 4665 if (sc->task_requests & IXGBE_REQUEST_TASK_PHY) 4666 ixgbe_handle_phy(ctx); 4667 sc->task_requests = 0; 4668 4669 ixgbe_update_stats_counters(sc); 4670 } /* ixgbe_if_update_admin_status */ 4671 4672 /************************************************************************ 4673 * ixgbe_config_dmac - Configure DMA Coalescing 4674 ************************************************************************/ 4675 static void 4676 ixgbe_config_dmac(struct ixgbe_softc *sc) 4677 { 4678 struct ixgbe_hw *hw = &sc->hw; 4679 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 4680 4681 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 4682 return; 4683 4684 if (dcfg->watchdog_timer ^ sc->dmac || 4685 dcfg->link_speed ^ sc->link_speed) { 4686 dcfg->watchdog_timer = sc->dmac; 4687 dcfg->fcoe_en = false; 4688 dcfg->link_speed = sc->link_speed; 4689 dcfg->num_tcs = 1; 4690 4691 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 4692 dcfg->watchdog_timer, dcfg->link_speed); 4693 4694 hw->mac.ops.dmac_config(hw); 4695 } 4696 } /* ixgbe_config_dmac */ 4697 4698 /************************************************************************ 4699 * ixgbe_if_enable_intr 4700 ************************************************************************/ 4701 void 4702 ixgbe_if_enable_intr(if_ctx_t ctx) 4703 { 4704 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4705 struct ixgbe_hw *hw = &sc->hw; 4706 struct ix_rx_queue *que = sc->rx_queues; 4707 u32 mask, fwsm; 4708 4709 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 4710 4711 switch (sc->hw.mac.type) { 4712 case ixgbe_mac_82599EB: 4713 mask |= IXGBE_EIMS_ECC; 4714 /* Temperature sensor on some scs */ 4715 mask |= IXGBE_EIMS_GPI_SDP0; 4716 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 4717 mask |= IXGBE_EIMS_GPI_SDP1; 4718 mask |= IXGBE_EIMS_GPI_SDP2; 4719 break; 4720 case ixgbe_mac_X540: 4721 /* Detect if Thermal Sensor is enabled */ 4722 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 4723 if (fwsm & IXGBE_FWSM_TS_ENABLED) 4724 mask |= IXGBE_EIMS_TS; 4725 mask |= IXGBE_EIMS_ECC; 4726 break; 4727 case ixgbe_mac_X550: 4728 /* MAC thermal sensor is automatically enabled */ 4729 mask |= IXGBE_EIMS_TS; 4730 mask |= IXGBE_EIMS_ECC; 4731 break; 4732 case ixgbe_mac_X550EM_x: 4733 case ixgbe_mac_X550EM_a: 4734 /* Some devices use SDP0 for important information */ 4735 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 4736 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 4737 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 4738 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 4739 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 4740 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 4741 mask |= IXGBE_EICR_GPI_SDP0_X540; 4742 mask |= IXGBE_EIMS_ECC; 4743 break; 4744 case ixgbe_mac_E610: 4745 mask |= IXGBE_EIMS_FW_EVENT; 4746 break; 4747 default: 4748 break; 4749 } 4750 4751 /* Enable Fan Failure detection */ 4752 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4753 mask |= IXGBE_EIMS_GPI_SDP1; 4754 /* Enable SR-IOV */ 4755 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 4756 mask |= IXGBE_EIMS_MAILBOX; 4757 /* Enable Flow Director */ 4758 if (sc->feat_en & IXGBE_FEATURE_FDIR) 4759 mask |= IXGBE_EIMS_FLOW_DIR; 4760 4761 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 4762 4763 /* With MSI-X we use auto clear */ 4764 if (sc->intr_type == IFLIB_INTR_MSIX) { 4765 mask = IXGBE_EIMS_ENABLE_MASK; 4766 /* Don't autoclear Link */ 4767 mask &= ~IXGBE_EIMS_OTHER; 4768 mask &= ~IXGBE_EIMS_LSC; 4769 mask &= ~IXGBE_EIMS_FW_EVENT; 4770 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 4771 mask &= ~IXGBE_EIMS_MAILBOX; 4772 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 4773 } 4774 4775 /* 4776 * Now enable all queues, this is done separately to 4777 * allow for handling the extended (beyond 32) MSI-X 4778 * vectors that can be used by 82599 4779 */ 4780 for (int i = 0; i < sc->num_rx_queues; i++, que++) 4781 ixgbe_enable_queue(sc, que->msix); 4782 4783 IXGBE_WRITE_FLUSH(hw); 4784 4785 } /* ixgbe_if_enable_intr */ 4786 4787 /************************************************************************ 4788 * ixgbe_if_disable_intr 4789 ************************************************************************/ 4790 static void 4791 ixgbe_if_disable_intr(if_ctx_t ctx) 4792 { 4793 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4794 4795 if (sc->intr_type == IFLIB_INTR_MSIX) 4796 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 4797 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 4798 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~0); 4799 } else { 4800 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, 0xFFFF0000); 4801 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(0), ~0); 4802 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(1), ~0); 4803 } 4804 IXGBE_WRITE_FLUSH(&sc->hw); 4805 4806 } /* ixgbe_if_disable_intr */ 4807 4808 /************************************************************************ 4809 * ixgbe_link_intr_enable 4810 ************************************************************************/ 4811 static void 4812 ixgbe_link_intr_enable(if_ctx_t ctx) 4813 { 4814 struct ixgbe_hw *hw = 4815 &((struct ixgbe_softc *)iflib_get_softc(ctx))->hw; 4816 4817 /* Re-enable other interrupts */ 4818 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC); 4819 } /* ixgbe_link_intr_enable */ 4820 4821 /************************************************************************ 4822 * ixgbe_if_rx_queue_intr_enable 4823 ************************************************************************/ 4824 static int 4825 ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) 4826 { 4827 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4828 struct ix_rx_queue *que = &sc->rx_queues[rxqid]; 4829 4830 ixgbe_enable_queue(sc, que->msix); 4831 4832 return (0); 4833 } /* ixgbe_if_rx_queue_intr_enable */ 4834 4835 /************************************************************************ 4836 * ixgbe_enable_queue 4837 ************************************************************************/ 4838 static void 4839 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 4840 { 4841 struct ixgbe_hw *hw = &sc->hw; 4842 u64 queue = 1ULL << vector; 4843 u32 mask; 4844 4845 if (hw->mac.type == ixgbe_mac_82598EB) { 4846 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 4847 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 4848 } else { 4849 mask = (queue & 0xFFFFFFFF); 4850 if (mask) 4851 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 4852 mask = (queue >> 32); 4853 if (mask) 4854 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 4855 } 4856 } /* ixgbe_enable_queue */ 4857 4858 /************************************************************************ 4859 * ixgbe_disable_queue 4860 ************************************************************************/ 4861 static void 4862 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 4863 { 4864 struct ixgbe_hw *hw = &sc->hw; 4865 u64 queue = 1ULL << vector; 4866 u32 mask; 4867 4868 if (hw->mac.type == ixgbe_mac_82598EB) { 4869 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 4870 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 4871 } else { 4872 mask = (queue & 0xFFFFFFFF); 4873 if (mask) 4874 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 4875 mask = (queue >> 32); 4876 if (mask) 4877 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 4878 } 4879 } /* ixgbe_disable_queue */ 4880 4881 /************************************************************************ 4882 * ixgbe_intr - Legacy Interrupt Service Routine 4883 ************************************************************************/ 4884 int 4885 ixgbe_intr(void *arg) 4886 { 4887 struct ixgbe_softc *sc = arg; 4888 struct ix_rx_queue *que = sc->rx_queues; 4889 struct ixgbe_hw *hw = &sc->hw; 4890 if_ctx_t ctx = sc->ctx; 4891 u32 eicr, eicr_mask; 4892 4893 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 4894 4895 ++que->irqs; 4896 if (eicr == 0) { 4897 ixgbe_if_enable_intr(ctx); 4898 return (FILTER_HANDLED); 4899 } 4900 4901 /* Check for fan failure */ 4902 if ((sc->feat_en & IXGBE_FEATURE_FAN_FAIL) && 4903 (eicr & IXGBE_EICR_GPI_SDP1)) { 4904 device_printf(sc->dev, 4905 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 4906 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 4907 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 4908 } 4909 4910 /* Link status change */ 4911 if (eicr & IXGBE_EICR_LSC) { 4912 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 4913 iflib_admin_intr_deferred(ctx); 4914 } 4915 4916 if (ixgbe_is_sfp(hw)) { 4917 /* Pluggable optics-related interrupt */ 4918 if (hw->mac.type >= ixgbe_mac_X540) 4919 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 4920 else 4921 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4922 4923 if (eicr & eicr_mask) { 4924 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); 4925 sc->task_requests |= IXGBE_REQUEST_TASK_MOD; 4926 } 4927 4928 if ((hw->mac.type == ixgbe_mac_82599EB) && 4929 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 4930 IXGBE_WRITE_REG(hw, IXGBE_EICR, 4931 IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 4932 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4933 } 4934 } 4935 4936 /* External PHY interrupt */ 4937 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 4938 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 4939 sc->task_requests |= IXGBE_REQUEST_TASK_PHY; 4940 } 4941 4942 return (FILTER_SCHEDULE_THREAD); 4943 } /* ixgbe_intr */ 4944 4945 /************************************************************************ 4946 * ixgbe_free_pci_resources 4947 ************************************************************************/ 4948 static void 4949 ixgbe_free_pci_resources(if_ctx_t ctx) 4950 { 4951 struct ixgbe_softc *sc = iflib_get_softc(ctx); 4952 struct ix_rx_queue *que = sc->rx_queues; 4953 device_t dev = iflib_get_dev(ctx); 4954 4955 /* Release all MSI-X queue resources */ 4956 if (sc->intr_type == IFLIB_INTR_MSIX) 4957 iflib_irq_free(ctx, &sc->irq); 4958 4959 if (que != NULL) { 4960 for (int i = 0; i < sc->num_rx_queues; i++, que++) { 4961 iflib_irq_free(ctx, &que->que_irq); 4962 } 4963 } 4964 4965 if (sc->pci_mem != NULL) 4966 bus_release_resource(dev, SYS_RES_MEMORY, 4967 rman_get_rid(sc->pci_mem), sc->pci_mem); 4968 } /* ixgbe_free_pci_resources */ 4969 4970 /************************************************************************ 4971 * ixgbe_sysctl_flowcntl 4972 * 4973 * SYSCTL wrapper around setting Flow Control 4974 ************************************************************************/ 4975 static int 4976 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS) 4977 { 4978 struct ixgbe_softc *sc; 4979 int error, fc; 4980 4981 sc = (struct ixgbe_softc *)arg1; 4982 fc = sc->hw.fc.requested_mode; 4983 4984 error = sysctl_handle_int(oidp, &fc, 0, req); 4985 if ((error) || (req->newptr == NULL)) 4986 return (error); 4987 4988 /* Don't bother if it's not changed */ 4989 if (fc == sc->hw.fc.current_mode) 4990 return (0); 4991 4992 return ixgbe_set_flowcntl(sc, fc); 4993 } /* ixgbe_sysctl_flowcntl */ 4994 4995 /************************************************************************ 4996 * ixgbe_set_flowcntl - Set flow control 4997 * 4998 * Flow control values: 4999 * 0 - off 5000 * 1 - rx pause 5001 * 2 - tx pause 5002 * 3 - full 5003 ************************************************************************/ 5004 static int 5005 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5006 { 5007 switch (fc) { 5008 case ixgbe_fc_rx_pause: 5009 case ixgbe_fc_tx_pause: 5010 case ixgbe_fc_full: 5011 if (sc->num_rx_queues > 1) 5012 ixgbe_disable_rx_drop(sc); 5013 break; 5014 case ixgbe_fc_none: 5015 if (sc->num_rx_queues > 1) 5016 ixgbe_enable_rx_drop(sc); 5017 break; 5018 default: 5019 return (EINVAL); 5020 } 5021 5022 sc->hw.fc.requested_mode = fc; 5023 5024 /* Don't autoneg if forcing a value */ 5025 sc->hw.fc.disable_fc_autoneg = true; 5026 ixgbe_fc_enable(&sc->hw); 5027 5028 return (0); 5029 } /* ixgbe_set_flowcntl */ 5030 5031 /************************************************************************ 5032 * ixgbe_enable_rx_drop 5033 * 5034 * Enable the hardware to drop packets when the buffer is 5035 * full. This is useful with multiqueue, so that no single 5036 * queue being full stalls the entire RX engine. We only 5037 * enable this when Multiqueue is enabled AND Flow Control 5038 * is disabled. 5039 ************************************************************************/ 5040 static void 5041 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5042 { 5043 struct ixgbe_hw *hw = &sc->hw; 5044 struct rx_ring *rxr; 5045 u32 srrctl; 5046 5047 for (int i = 0; i < sc->num_rx_queues; i++) { 5048 rxr = &sc->rx_queues[i].rxr; 5049 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5050 srrctl |= IXGBE_SRRCTL_DROP_EN; 5051 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5052 } 5053 5054 /* enable drop for each vf */ 5055 for (int i = 0; i < sc->num_vfs; i++) { 5056 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5057 (IXGBE_QDE_WRITE | 5058 (i << IXGBE_QDE_IDX_SHIFT) | 5059 IXGBE_QDE_ENABLE)); 5060 } 5061 } /* ixgbe_enable_rx_drop */ 5062 5063 /************************************************************************ 5064 * ixgbe_disable_rx_drop 5065 ************************************************************************/ 5066 static void 5067 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5068 { 5069 struct ixgbe_hw *hw = &sc->hw; 5070 struct rx_ring *rxr; 5071 u32 srrctl; 5072 5073 for (int i = 0; i < sc->num_rx_queues; i++) { 5074 rxr = &sc->rx_queues[i].rxr; 5075 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5076 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5077 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5078 } 5079 5080 /* disable drop for each vf */ 5081 for (int i = 0; i < sc->num_vfs; i++) { 5082 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5083 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5084 } 5085 } /* ixgbe_disable_rx_drop */ 5086 5087 /************************************************************************ 5088 * ixgbe_sysctl_advertise 5089 * 5090 * SYSCTL wrapper around setting advertised speed 5091 ************************************************************************/ 5092 static int 5093 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS) 5094 { 5095 struct ixgbe_softc *sc; 5096 int error, advertise; 5097 5098 sc = (struct ixgbe_softc *)arg1; 5099 if (atomic_load_acq_int(&sc->recovery_mode)) 5100 return (EPERM); 5101 5102 advertise = sc->advertise; 5103 5104 error = sysctl_handle_int(oidp, &advertise, 0, req); 5105 if ((error) || (req->newptr == NULL)) 5106 return (error); 5107 5108 return ixgbe_set_advertise(sc, advertise); 5109 } /* ixgbe_sysctl_advertise */ 5110 5111 /************************************************************************ 5112 * ixgbe_set_advertise - Control advertised link speed 5113 * 5114 * Flags: 5115 * 0x1 - advertise 100 Mb 5116 * 0x2 - advertise 1G 5117 * 0x4 - advertise 10G 5118 * 0x8 - advertise 10 Mb (yes, Mb) 5119 * 0x10 - advertise 2.5G (disabled by default) 5120 * 0x20 - advertise 5G (disabled by default) 5121 * 5122 ************************************************************************/ 5123 static int 5124 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5125 { 5126 device_t dev = iflib_get_dev(sc->ctx); 5127 struct ixgbe_hw *hw; 5128 ixgbe_link_speed speed = 0; 5129 ixgbe_link_speed link_caps = 0; 5130 s32 err = IXGBE_NOT_IMPLEMENTED; 5131 bool negotiate = false; 5132 5133 /* Checks to validate new value */ 5134 if (sc->advertise == advertise) /* no change */ 5135 return (0); 5136 5137 hw = &sc->hw; 5138 5139 /* No speed changes for backplane media */ 5140 if (hw->phy.media_type == ixgbe_media_type_backplane) 5141 return (ENODEV); 5142 5143 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5144 (hw->phy.multispeed_fiber))) { 5145 device_printf(dev, 5146 "Advertised speed can only be set on copper or multispeed" 5147 " fiber media types.\n"); 5148 return (EINVAL); 5149 } 5150 5151 if (advertise < 0x1 || advertise > 0x3F) { 5152 device_printf(dev, 5153 "Invalid advertised speed; valid modes are 0x1 through" 5154 " 0x3F\n"); 5155 return (EINVAL); 5156 } 5157 5158 if (hw->mac.ops.get_link_capabilities) { 5159 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5160 &negotiate); 5161 if (err != IXGBE_SUCCESS) { 5162 device_printf(dev, 5163 "Unable to determine supported advertise speeds" 5164 "\n"); 5165 return (ENODEV); 5166 } 5167 } 5168 5169 /* Set new value and report new advertised mode */ 5170 if (advertise & 0x1) { 5171 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5172 device_printf(dev, 5173 "Interface does not support 100Mb advertised" 5174 " speed\n"); 5175 return (EINVAL); 5176 } 5177 speed |= IXGBE_LINK_SPEED_100_FULL; 5178 } 5179 if (advertise & 0x2) { 5180 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5181 device_printf(dev, 5182 "Interface does not support 1Gb advertised speed" 5183 "\n"); 5184 return (EINVAL); 5185 } 5186 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5187 } 5188 if (advertise & 0x4) { 5189 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5190 device_printf(dev, 5191 "Interface does not support 10Gb advertised speed" 5192 "\n"); 5193 return (EINVAL); 5194 } 5195 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5196 } 5197 if (advertise & 0x8) { 5198 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5199 device_printf(dev, 5200 "Interface does not support 10Mb advertised speed" 5201 "\n"); 5202 return (EINVAL); 5203 } 5204 speed |= IXGBE_LINK_SPEED_10_FULL; 5205 } 5206 if (advertise & 0x10) { 5207 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5208 device_printf(dev, 5209 "Interface does not support 2.5G advertised speed" 5210 "\n"); 5211 return (EINVAL); 5212 } 5213 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5214 } 5215 if (advertise & 0x20) { 5216 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5217 device_printf(dev, 5218 "Interface does not support 5G advertised speed" 5219 "\n"); 5220 return (EINVAL); 5221 } 5222 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5223 } 5224 5225 hw->mac.autotry_restart = true; 5226 hw->mac.ops.setup_link(hw, speed, true); 5227 sc->advertise = advertise; 5228 5229 return (0); 5230 } /* ixgbe_set_advertise */ 5231 5232 /************************************************************************ 5233 * ixgbe_get_default_advertise - Get default advertised speed settings 5234 * 5235 * Formatted for sysctl usage. 5236 * Flags: 5237 * 0x1 - advertise 100 Mb 5238 * 0x2 - advertise 1G 5239 * 0x4 - advertise 10G 5240 * 0x8 - advertise 10 Mb (yes, Mb) 5241 * 0x10 - advertise 2.5G (disabled by default) 5242 * 0x20 - advertise 5G (disabled by default) 5243 ************************************************************************/ 5244 static int 5245 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5246 { 5247 struct ixgbe_hw *hw = &sc->hw; 5248 int speed; 5249 ixgbe_link_speed link_caps = 0; 5250 s32 err; 5251 bool negotiate = false; 5252 5253 /* 5254 * Advertised speed means nothing unless it's copper or 5255 * multi-speed fiber 5256 */ 5257 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5258 !(hw->phy.multispeed_fiber)) 5259 return (0); 5260 5261 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5262 if (err != IXGBE_SUCCESS) 5263 return (0); 5264 5265 if (hw->mac.type == ixgbe_mac_X550) { 5266 /* 5267 * 2.5G and 5G autonegotiation speeds on X550 5268 * are disabled by default due to reported 5269 * interoperability issues with some switches. 5270 */ 5271 link_caps &= ~(IXGBE_LINK_SPEED_2_5GB_FULL | 5272 IXGBE_LINK_SPEED_5GB_FULL); 5273 } 5274 5275 speed = 5276 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5277 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5278 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5279 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5280 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5281 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5282 5283 return speed; 5284 } /* ixgbe_get_default_advertise */ 5285 5286 /************************************************************************ 5287 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5288 * 5289 * Control values: 5290 * 0/1 - off / on (use default value of 1000) 5291 * 5292 * Legal timer values are: 5293 * 50,100,250,500,1000,2000,5000,10000 5294 * 5295 * Turning off interrupt moderation will also turn this off. 5296 ************************************************************************/ 5297 static int 5298 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 5299 { 5300 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5301 if_t ifp = iflib_get_ifp(sc->ctx); 5302 int error; 5303 u16 newval; 5304 5305 newval = sc->dmac; 5306 error = sysctl_handle_16(oidp, &newval, 0, req); 5307 if ((error) || (req->newptr == NULL)) 5308 return (error); 5309 5310 switch (newval) { 5311 case 0: 5312 /* Disabled */ 5313 sc->dmac = 0; 5314 break; 5315 case 1: 5316 /* Enable and use default */ 5317 sc->dmac = 1000; 5318 break; 5319 case 50: 5320 case 100: 5321 case 250: 5322 case 500: 5323 case 1000: 5324 case 2000: 5325 case 5000: 5326 case 10000: 5327 /* Legal values - allow */ 5328 sc->dmac = newval; 5329 break; 5330 default: 5331 /* Do nothing, illegal value */ 5332 return (EINVAL); 5333 } 5334 5335 /* Re-initialize hardware if it's already running */ 5336 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 5337 if_init(ifp, ifp); 5338 5339 return (0); 5340 } /* ixgbe_sysctl_dmac */ 5341 5342 #ifdef IXGBE_DEBUG 5343 /************************************************************************ 5344 * ixgbe_sysctl_power_state 5345 * 5346 * Sysctl to test power states 5347 * Values: 5348 * 0 - set device to D0 5349 * 3 - set device to D3 5350 * (none) - get current device power state 5351 ************************************************************************/ 5352 static int 5353 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 5354 { 5355 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5356 device_t dev = sc->dev; 5357 int curr_ps, new_ps, error = 0; 5358 5359 curr_ps = new_ps = pci_get_powerstate(dev); 5360 5361 error = sysctl_handle_int(oidp, &new_ps, 0, req); 5362 if ((error) || (req->newptr == NULL)) 5363 return (error); 5364 5365 if (new_ps == curr_ps) 5366 return (0); 5367 5368 if (new_ps == 3 && curr_ps == 0) 5369 error = DEVICE_SUSPEND(dev); 5370 else if (new_ps == 0 && curr_ps == 3) 5371 error = DEVICE_RESUME(dev); 5372 else 5373 return (EINVAL); 5374 5375 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5376 5377 return (error); 5378 } /* ixgbe_sysctl_power_state */ 5379 #endif 5380 5381 /************************************************************************ 5382 * ixgbe_sysctl_wol_enable 5383 * 5384 * Sysctl to enable/disable the WoL capability, 5385 * if supported by the adapter. 5386 * 5387 * Values: 5388 * 0 - disabled 5389 * 1 - enabled 5390 ************************************************************************/ 5391 static int 5392 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 5393 { 5394 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5395 struct ixgbe_hw *hw = &sc->hw; 5396 int new_wol_enabled; 5397 int error = 0; 5398 5399 new_wol_enabled = hw->wol_enabled; 5400 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 5401 if ((error) || (req->newptr == NULL)) 5402 return (error); 5403 new_wol_enabled = !!(new_wol_enabled); 5404 if (new_wol_enabled == hw->wol_enabled) 5405 return (0); 5406 5407 if (new_wol_enabled > 0 && !sc->wol_support) 5408 return (ENODEV); 5409 else 5410 hw->wol_enabled = new_wol_enabled; 5411 5412 return (0); 5413 } /* ixgbe_sysctl_wol_enable */ 5414 5415 /************************************************************************ 5416 * ixgbe_sysctl_wufc - Wake Up Filter Control 5417 * 5418 * Sysctl to enable/disable the types of packets that the 5419 * adapter will wake up on upon receipt. 5420 * Flags: 5421 * 0x1 - Link Status Change 5422 * 0x2 - Magic Packet 5423 * 0x4 - Direct Exact 5424 * 0x8 - Directed Multicast 5425 * 0x10 - Broadcast 5426 * 0x20 - ARP/IPv4 Request Packet 5427 * 0x40 - Direct IPv4 Packet 5428 * 0x80 - Direct IPv6 Packet 5429 * 5430 * Settings not listed above will cause the sysctl to return an error. 5431 ************************************************************************/ 5432 static int 5433 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 5434 { 5435 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5436 int error = 0; 5437 u32 new_wufc; 5438 5439 new_wufc = sc->wufc; 5440 5441 error = sysctl_handle_32(oidp, &new_wufc, 0, req); 5442 if ((error) || (req->newptr == NULL)) 5443 return (error); 5444 if (new_wufc == sc->wufc) 5445 return (0); 5446 5447 if (new_wufc & 0xffffff00) 5448 return (EINVAL); 5449 5450 new_wufc &= 0xff; 5451 new_wufc |= (0xffffff & sc->wufc); 5452 sc->wufc = new_wufc; 5453 5454 return (0); 5455 } /* ixgbe_sysctl_wufc */ 5456 5457 #ifdef IXGBE_DEBUG 5458 /************************************************************************ 5459 * ixgbe_sysctl_print_rss_config 5460 ************************************************************************/ 5461 static int 5462 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 5463 { 5464 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5465 struct ixgbe_hw *hw = &sc->hw; 5466 device_t dev = sc->dev; 5467 struct sbuf *buf; 5468 int error = 0, reta_size; 5469 u32 reg; 5470 5471 if (atomic_load_acq_int(&sc->recovery_mode)) 5472 return (EPERM); 5473 5474 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5475 if (!buf) { 5476 device_printf(dev, "Could not allocate sbuf for output.\n"); 5477 return (ENOMEM); 5478 } 5479 5480 // TODO: use sbufs to make a string to print out 5481 /* Set multiplier for RETA setup and table size based on MAC */ 5482 switch (sc->hw.mac.type) { 5483 case ixgbe_mac_X550: 5484 case ixgbe_mac_X550EM_x: 5485 case ixgbe_mac_X550EM_a: 5486 reta_size = 128; 5487 break; 5488 default: 5489 reta_size = 32; 5490 break; 5491 } 5492 5493 /* Print out the redirection table */ 5494 sbuf_cat(buf, "\n"); 5495 for (int i = 0; i < reta_size; i++) { 5496 if (i < 32) { 5497 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5498 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5499 } else { 5500 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5501 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5502 } 5503 } 5504 5505 // TODO: print more config 5506 5507 error = sbuf_finish(buf); 5508 if (error) 5509 device_printf(dev, "Error finishing sbuf: %d\n", error); 5510 5511 sbuf_delete(buf); 5512 5513 return (0); 5514 } /* ixgbe_sysctl_print_rss_config */ 5515 #endif /* IXGBE_DEBUG */ 5516 5517 /************************************************************************ 5518 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5519 * 5520 * For X552/X557-AT devices using an external PHY 5521 ************************************************************************/ 5522 static int 5523 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 5524 { 5525 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5526 struct ixgbe_hw *hw = &sc->hw; 5527 u16 reg; 5528 5529 if (atomic_load_acq_int(&sc->recovery_mode)) 5530 return (EPERM); 5531 5532 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 5533 device_printf(iflib_get_dev(sc->ctx), 5534 "Device has no supported external thermal sensor.\n"); 5535 return (ENODEV); 5536 } 5537 5538 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 5539 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 5540 device_printf(iflib_get_dev(sc->ctx), 5541 "Error reading from PHY's current temperature register" 5542 "\n"); 5543 return (EAGAIN); 5544 } 5545 5546 /* Shift temp for output */ 5547 reg = reg >> 8; 5548 5549 return (sysctl_handle_16(oidp, NULL, reg, req)); 5550 } /* ixgbe_sysctl_phy_temp */ 5551 5552 /************************************************************************ 5553 * ixgbe_sysctl_phy_overtemp_occurred 5554 * 5555 * Reports (directly from the PHY) whether the current PHY 5556 * temperature is over the overtemp threshold. 5557 ************************************************************************/ 5558 static int 5559 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 5560 { 5561 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5562 struct ixgbe_hw *hw = &sc->hw; 5563 u16 reg; 5564 5565 if (atomic_load_acq_int(&sc->recovery_mode)) 5566 return (EPERM); 5567 5568 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 5569 device_printf(iflib_get_dev(sc->ctx), 5570 "Device has no supported external thermal sensor.\n"); 5571 return (ENODEV); 5572 } 5573 5574 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 5575 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 5576 device_printf(iflib_get_dev(sc->ctx), 5577 "Error reading from PHY's temperature status register\n"); 5578 return (EAGAIN); 5579 } 5580 5581 /* Get occurrence bit */ 5582 reg = !!(reg & 0x4000); 5583 5584 return (sysctl_handle_16(oidp, 0, reg, req)); 5585 } /* ixgbe_sysctl_phy_overtemp_occurred */ 5586 5587 /************************************************************************ 5588 * ixgbe_sysctl_eee_state 5589 * 5590 * Sysctl to set EEE power saving feature 5591 * Values: 5592 * 0 - disable EEE 5593 * 1 - enable EEE 5594 * (none) - get current device EEE state 5595 ************************************************************************/ 5596 static int 5597 ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS) 5598 { 5599 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5600 device_t dev = sc->dev; 5601 if_t ifp = iflib_get_ifp(sc->ctx); 5602 int curr_eee, new_eee, error = 0; 5603 s32 retval; 5604 5605 if (atomic_load_acq_int(&sc->recovery_mode)) 5606 return (EPERM); 5607 5608 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 5609 5610 error = sysctl_handle_int(oidp, &new_eee, 0, req); 5611 if ((error) || (req->newptr == NULL)) 5612 return (error); 5613 5614 /* Nothing to do */ 5615 if (new_eee == curr_eee) 5616 return (0); 5617 5618 /* Not supported */ 5619 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 5620 return (EINVAL); 5621 5622 /* Bounds checking */ 5623 if ((new_eee < 0) || (new_eee > 1)) 5624 return (EINVAL); 5625 5626 /* If link speed is <= 1Gbps and EEE is being enabled, log info */ 5627 if (sc->hw.mac.type == ixgbe_mac_E610 && 5628 new_eee && 5629 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) { 5630 device_printf(dev, 5631 "Energy Efficient Ethernet (EEE) feature is not " 5632 "supported on link speeds equal to or below 1Gbps. " 5633 "EEE is supported on speeds above 1Gbps.\n"); 5634 return (EINVAL); 5635 } 5636 5637 retval = ixgbe_setup_eee(&sc->hw, new_eee); 5638 if (retval) { 5639 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 5640 return (EINVAL); 5641 } 5642 5643 /* Restart auto-neg */ 5644 if_init(ifp, ifp); 5645 5646 device_printf(dev, "New EEE state: %d\n", new_eee); 5647 5648 /* Cache new value */ 5649 if (new_eee) 5650 sc->feat_en |= IXGBE_FEATURE_EEE; 5651 else 5652 sc->feat_en &= ~IXGBE_FEATURE_EEE; 5653 5654 return (error); 5655 } /* ixgbe_sysctl_eee_state */ 5656 5657 static int 5658 ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS) 5659 { 5660 struct ixgbe_softc *sc; 5661 u32 reg, val, shift; 5662 int error, mask; 5663 5664 sc = oidp->oid_arg1; 5665 switch (oidp->oid_arg2) { 5666 case 0: 5667 reg = IXGBE_DTXTCPFLGL; 5668 shift = 0; 5669 break; 5670 case 1: 5671 reg = IXGBE_DTXTCPFLGL; 5672 shift = 16; 5673 break; 5674 case 2: 5675 reg = IXGBE_DTXTCPFLGH; 5676 shift = 0; 5677 break; 5678 default: 5679 return (EINVAL); 5680 break; 5681 } 5682 val = IXGBE_READ_REG(&sc->hw, reg); 5683 mask = (val >> shift) & 0xfff; 5684 error = sysctl_handle_int(oidp, &mask, 0, req); 5685 if (error != 0 || req->newptr == NULL) 5686 return (error); 5687 if (mask < 0 || mask > 0xfff) 5688 return (EINVAL); 5689 val = (val & ~(0xfff << shift)) | (mask << shift); 5690 IXGBE_WRITE_REG(&sc->hw, reg, val); 5691 return (0); 5692 } 5693 5694 /************************************************************************ 5695 * ixgbe_init_device_features 5696 ************************************************************************/ 5697 static void 5698 ixgbe_init_device_features(struct ixgbe_softc *sc) 5699 { 5700 s32 error; 5701 5702 sc->feat_cap = IXGBE_FEATURE_NETMAP | 5703 IXGBE_FEATURE_RSS | 5704 IXGBE_FEATURE_MSI | 5705 IXGBE_FEATURE_MSIX | 5706 IXGBE_FEATURE_LEGACY_IRQ; 5707 5708 /* Set capabilities first... */ 5709 switch (sc->hw.mac.type) { 5710 case ixgbe_mac_82598EB: 5711 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 5712 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 5713 break; 5714 case ixgbe_mac_X540: 5715 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5716 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5717 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 5718 (sc->hw.bus.func == 0)) 5719 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 5720 break; 5721 case ixgbe_mac_X550: 5722 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5723 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 5724 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5725 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5726 break; 5727 case ixgbe_mac_X550EM_x: 5728 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5729 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5730 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5731 if (sc->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR) 5732 sc->feat_cap |= IXGBE_FEATURE_EEE; 5733 break; 5734 case ixgbe_mac_X550EM_a: 5735 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5736 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5737 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5738 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 5739 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 5740 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 5741 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 5742 sc->feat_cap |= IXGBE_FEATURE_EEE; 5743 } 5744 break; 5745 case ixgbe_mac_82599EB: 5746 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 5747 sc->feat_cap |= IXGBE_FEATURE_FDIR; 5748 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 5749 (sc->hw.bus.func == 0)) 5750 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 5751 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 5752 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 5753 break; 5754 case ixgbe_mac_E610: 5755 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 5756 sc->feat_cap |= IXGBE_FEATURE_DBG_DUMP; 5757 sc->feat_cap |= IXGBE_FEATURE_FW_LOGGING; 5758 error = ixgbe_get_caps(&sc->hw); 5759 if (error == 0 && sc->hw.func_caps.common_cap.eee_support != 0) 5760 sc->feat_cap |= IXGBE_FEATURE_EEE; 5761 break; 5762 default: 5763 break; 5764 } 5765 5766 /* Enabled by default... */ 5767 /* Fan failure detection */ 5768 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 5769 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 5770 /* Netmap */ 5771 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 5772 sc->feat_en |= IXGBE_FEATURE_NETMAP; 5773 /* EEE */ 5774 if (sc->feat_cap & IXGBE_FEATURE_EEE) 5775 sc->feat_en |= IXGBE_FEATURE_EEE; 5776 /* Thermal Sensor */ 5777 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 5778 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 5779 /* Recovery mode */ 5780 if (sc->feat_cap & IXGBE_FEATURE_RECOVERY_MODE) 5781 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 5782 /* FW Debug Dump */ 5783 if (sc->feat_cap & IXGBE_FEATURE_DBG_DUMP) 5784 sc->feat_en |= IXGBE_FEATURE_DBG_DUMP; 5785 /* FW Logging */ 5786 if (sc->feat_cap & IXGBE_FEATURE_FW_LOGGING) 5787 sc->feat_en |= IXGBE_FEATURE_FW_LOGGING; 5788 5789 /* Enabled via global sysctl... */ 5790 /* Flow Director */ 5791 if (ixgbe_enable_fdir) { 5792 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 5793 sc->feat_en |= IXGBE_FEATURE_FDIR; 5794 else 5795 device_printf(sc->dev, 5796 "Device does not support Flow Director." 5797 " Leaving disabled."); 5798 } 5799 /* 5800 * Message Signal Interrupts - Extended (MSI-X) 5801 * Normal MSI is only enabled if MSI-X calls fail. 5802 */ 5803 if (!ixgbe_enable_msix) 5804 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 5805 /* Receive-Side Scaling (RSS) */ 5806 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 5807 sc->feat_en |= IXGBE_FEATURE_RSS; 5808 5809 /* Disable features with unmet dependencies... */ 5810 /* No MSI-X */ 5811 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 5812 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 5813 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 5814 sc->feat_en &= ~IXGBE_FEATURE_RSS; 5815 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 5816 } 5817 } /* ixgbe_init_device_features */ 5818 5819 /************************************************************************ 5820 * ixgbe_check_fan_failure 5821 ************************************************************************/ 5822 static void 5823 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 5824 { 5825 u32 mask; 5826 5827 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 5828 IXGBE_ESDP_SDP1; 5829 5830 if (reg & mask) 5831 device_printf(sc->dev, 5832 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 5833 } /* ixgbe_check_fan_failure */ 5834 5835 /************************************************************************ 5836 * ixgbe_sbuf_fw_version 5837 ************************************************************************/ 5838 static void 5839 ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf) 5840 { 5841 struct ixgbe_nvm_version nvm_ver = {0}; 5842 const char *space = ""; 5843 5844 ixgbe_get_nvm_version(hw, &nvm_ver); /* NVM version */ 5845 ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */ 5846 ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack a build ID in Intel's SCM */ 5847 ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */ 5848 5849 /* FW version */ 5850 if ((nvm_ver.phy_fw_maj == 0x0 && 5851 nvm_ver.phy_fw_min == 0x0 && 5852 nvm_ver.phy_fw_id == 0x0) || 5853 (nvm_ver.phy_fw_maj == 0xF && 5854 nvm_ver.phy_fw_min == 0xFF && 5855 nvm_ver.phy_fw_id == 0xF)) { 5856 /* If major, minor and id numbers are set to 0, 5857 * reading FW version is unsupported. If major number 5858 * is set to 0xF, minor is set to 0xFF and id is set 5859 * to 0xF, this means that number read is invalid. */ 5860 } else 5861 sbuf_printf(buf, "fw %d.%d.%d ", 5862 nvm_ver.phy_fw_maj, nvm_ver.phy_fw_min, 5863 nvm_ver.phy_fw_id); 5864 5865 /* NVM version */ 5866 if ((nvm_ver.nvm_major == 0x0 && 5867 nvm_ver.nvm_minor == 0x0 && 5868 nvm_ver.nvm_id == 0x0) || 5869 (nvm_ver.nvm_major == 0xF && 5870 nvm_ver.nvm_minor == 0xFF && 5871 nvm_ver.nvm_id == 0xF)) { 5872 /* If major, minor and id numbers are set to 0, 5873 * reading NVM version is unsupported. If major number 5874 * is set to 0xF, minor is set to 0xFF and id is set 5875 * to 0xF, this means that number read is invalid. */ 5876 } else 5877 sbuf_printf(buf, "nvm %x.%02x.%x ", 5878 nvm_ver.nvm_major, nvm_ver.nvm_minor, nvm_ver.nvm_id); 5879 5880 if (nvm_ver.oem_valid) { 5881 sbuf_printf(buf, "NVM OEM V%d.%d R%d", nvm_ver.oem_major, 5882 nvm_ver.oem_minor, nvm_ver.oem_release); 5883 space = " "; 5884 } 5885 5886 if (nvm_ver.or_valid) { 5887 sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d", 5888 space, nvm_ver.or_major, nvm_ver.or_build, 5889 nvm_ver.or_patch); 5890 space = " "; 5891 } 5892 5893 if (nvm_ver.etk_id != ((NVM_VER_INVALID << NVM_ETK_SHIFT) | 5894 NVM_VER_INVALID | 0xFFFFFFFF)) { 5895 sbuf_printf(buf, "%seTrack 0x%08x", space, nvm_ver.etk_id); 5896 } 5897 } /* ixgbe_sbuf_fw_version */ 5898 5899 /************************************************************************ 5900 * ixgbe_print_fw_version 5901 ************************************************************************/ 5902 static void 5903 ixgbe_print_fw_version(if_ctx_t ctx) 5904 { 5905 struct ixgbe_softc *sc = iflib_get_softc(ctx); 5906 struct ixgbe_hw *hw = &sc->hw; 5907 device_t dev = sc->dev; 5908 struct sbuf *buf; 5909 int error = 0; 5910 5911 buf = sbuf_new_auto(); 5912 if (!buf) { 5913 device_printf(dev, "Could not allocate sbuf for output.\n"); 5914 return; 5915 } 5916 5917 ixgbe_sbuf_fw_version(hw, buf); 5918 5919 error = sbuf_finish(buf); 5920 if (error) 5921 device_printf(dev, "Error finishing sbuf: %d\n", error); 5922 else if (sbuf_len(buf)) 5923 device_printf(dev, "%s\n", sbuf_data(buf)); 5924 5925 sbuf_delete(buf); 5926 } /* ixgbe_print_fw_version */ 5927 5928 /************************************************************************ 5929 * ixgbe_sysctl_print_fw_version 5930 ************************************************************************/ 5931 static int 5932 ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS) 5933 { 5934 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1; 5935 struct ixgbe_hw *hw = &sc->hw; 5936 device_t dev = sc->dev; 5937 struct sbuf *buf; 5938 int error = 0; 5939 5940 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5941 if (!buf) { 5942 device_printf(dev, "Could not allocate sbuf for output.\n"); 5943 return (ENOMEM); 5944 } 5945 5946 ixgbe_sbuf_fw_version(hw, buf); 5947 5948 error = sbuf_finish(buf); 5949 if (error) 5950 device_printf(dev, "Error finishing sbuf: %d\n", error); 5951 5952 sbuf_delete(buf); 5953 5954 return (0); 5955 } /* ixgbe_sysctl_print_fw_version */ 5956