1 /****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef IXGBE_STANDALONE_BUILD 37 #include "opt_inet.h" 38 #include "opt_inet6.h" 39 #include "opt_rss.h" 40 #endif 41 42 #include "ixgbe.h" 43 44 #ifdef RSS 45 #include <net/rss_config.h> 46 #include <netinet/in_rss.h> 47 #endif 48 49 /********************************************************************* 50 * Driver version 51 *********************************************************************/ 52 char ixgbe_driver_version[] = "3.1.13-k"; 53 54 55 /********************************************************************* 56 * PCI Device ID Table 57 * 58 * Used by probe to select devices to load on 59 * Last field stores an index into ixgbe_strings 60 * Last entry must be all 0s 61 * 62 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 63 *********************************************************************/ 64 65 static ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 66 { 67 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 68 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 69 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 70 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 71 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 72 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 73 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 74 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 75 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 76 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 77 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 78 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 79 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 80 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 81 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 82 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 83 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 84 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 85 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 86 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 87 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 88 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 89 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 90 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 91 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 92 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 93 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 94 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 95 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 96 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 97 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 98 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 99 /* required last entry */ 100 {0, 0, 0, 0, 0} 101 }; 102 103 /********************************************************************* 104 * Table of branding strings 105 *********************************************************************/ 106 107 static char *ixgbe_strings[] = { 108 "Intel(R) PRO/10GbE PCI-Express Network Driver" 109 }; 110 111 /********************************************************************* 112 * Function prototypes 113 *********************************************************************/ 114 static int ixgbe_probe(device_t); 115 static int ixgbe_attach(device_t); 116 static int ixgbe_detach(device_t); 117 static int ixgbe_shutdown(device_t); 118 static int ixgbe_suspend(device_t); 119 static int ixgbe_resume(device_t); 120 static int ixgbe_ioctl(struct ifnet *, u_long, caddr_t); 121 static void ixgbe_init(void *); 122 static void ixgbe_init_locked(struct adapter *); 123 static void ixgbe_stop(void *); 124 #if __FreeBSD_version >= 1100036 125 static uint64_t ixgbe_get_counter(struct ifnet *, ift_counter); 126 #endif 127 static void ixgbe_add_media_types(struct adapter *); 128 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 129 static int ixgbe_media_change(struct ifnet *); 130 static void ixgbe_identify_hardware(struct adapter *); 131 static int ixgbe_allocate_pci_resources(struct adapter *); 132 static void ixgbe_get_slot_info(struct adapter *); 133 static int ixgbe_allocate_msix(struct adapter *); 134 static int ixgbe_allocate_legacy(struct adapter *); 135 static int ixgbe_setup_msix(struct adapter *); 136 static void ixgbe_free_pci_resources(struct adapter *); 137 static void ixgbe_local_timer(void *); 138 static int ixgbe_setup_interface(device_t, struct adapter *); 139 static void ixgbe_config_gpie(struct adapter *); 140 static void ixgbe_config_dmac(struct adapter *); 141 static void ixgbe_config_delay_values(struct adapter *); 142 static void ixgbe_config_link(struct adapter *); 143 static void ixgbe_check_wol_support(struct adapter *); 144 static int ixgbe_setup_low_power_mode(struct adapter *); 145 static void ixgbe_rearm_queues(struct adapter *, u64); 146 147 static void ixgbe_initialize_transmit_units(struct adapter *); 148 static void ixgbe_initialize_receive_units(struct adapter *); 149 static void ixgbe_enable_rx_drop(struct adapter *); 150 static void ixgbe_disable_rx_drop(struct adapter *); 151 static void ixgbe_initialize_rss_mapping(struct adapter *); 152 153 static void ixgbe_enable_intr(struct adapter *); 154 static void ixgbe_disable_intr(struct adapter *); 155 static void ixgbe_update_stats_counters(struct adapter *); 156 static void ixgbe_set_promisc(struct adapter *); 157 static void ixgbe_set_multi(struct adapter *); 158 static void ixgbe_update_link_status(struct adapter *); 159 static void ixgbe_set_ivar(struct adapter *, u8, u8, s8); 160 static void ixgbe_configure_ivars(struct adapter *); 161 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 162 163 static void ixgbe_setup_vlan_hw_support(struct adapter *); 164 static void ixgbe_register_vlan(void *, struct ifnet *, u16); 165 static void ixgbe_unregister_vlan(void *, struct ifnet *, u16); 166 167 static void ixgbe_add_device_sysctls(struct adapter *); 168 static void ixgbe_add_hw_stats(struct adapter *); 169 170 /* Sysctl handlers */ 171 static void ixgbe_set_sysctl_value(struct adapter *, const char *, 172 const char *, int *, int); 173 static int ixgbe_set_flowcntl(SYSCTL_HANDLER_ARGS); 174 static int ixgbe_set_advertise(SYSCTL_HANDLER_ARGS); 175 static int ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS); 176 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 177 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 178 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 179 #ifdef IXGBE_DEBUG 180 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 181 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 182 #endif 183 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 184 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 185 static int ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS); 186 static int ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS); 187 static int ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS); 188 static int ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS); 189 static int ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS); 190 191 /* Support for pluggable optic modules */ 192 static bool ixgbe_sfp_probe(struct adapter *); 193 static void ixgbe_setup_optics(struct adapter *); 194 195 /* Legacy (single vector interrupt handler */ 196 static void ixgbe_legacy_irq(void *); 197 198 /* The MSI/X Interrupt handlers */ 199 static void ixgbe_msix_que(void *); 200 static void ixgbe_msix_link(void *); 201 202 /* Deferred interrupt tasklets */ 203 static void ixgbe_handle_que(void *, int); 204 static void ixgbe_handle_link(void *, int); 205 static void ixgbe_handle_msf(void *, int); 206 static void ixgbe_handle_mod(void *, int); 207 static void ixgbe_handle_phy(void *, int); 208 209 #ifdef IXGBE_FDIR 210 static void ixgbe_reinit_fdir(void *, int); 211 #endif 212 213 #ifdef PCI_IOV 214 static void ixgbe_ping_all_vfs(struct adapter *); 215 static void ixgbe_handle_mbx(void *, int); 216 static int ixgbe_init_iov(device_t, u16, const nvlist_t *); 217 static void ixgbe_uninit_iov(device_t); 218 static int ixgbe_add_vf(device_t, u16, const nvlist_t *); 219 static void ixgbe_initialize_iov(struct adapter *); 220 static void ixgbe_recalculate_max_frame(struct adapter *); 221 static void ixgbe_init_vf(struct adapter *, struct ixgbe_vf *); 222 #endif /* PCI_IOV */ 223 224 225 /********************************************************************* 226 * FreeBSD Device Interface Entry Points 227 *********************************************************************/ 228 229 static device_method_t ix_methods[] = { 230 /* Device interface */ 231 DEVMETHOD(device_probe, ixgbe_probe), 232 DEVMETHOD(device_attach, ixgbe_attach), 233 DEVMETHOD(device_detach, ixgbe_detach), 234 DEVMETHOD(device_shutdown, ixgbe_shutdown), 235 DEVMETHOD(device_suspend, ixgbe_suspend), 236 DEVMETHOD(device_resume, ixgbe_resume), 237 #ifdef PCI_IOV 238 DEVMETHOD(pci_iov_init, ixgbe_init_iov), 239 DEVMETHOD(pci_iov_uninit, ixgbe_uninit_iov), 240 DEVMETHOD(pci_iov_add_vf, ixgbe_add_vf), 241 #endif /* PCI_IOV */ 242 DEVMETHOD_END 243 }; 244 245 static driver_t ix_driver = { 246 "ix", ix_methods, sizeof(struct adapter), 247 }; 248 249 devclass_t ix_devclass; 250 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 251 252 MODULE_DEPEND(ix, pci, 1, 1, 1); 253 MODULE_DEPEND(ix, ether, 1, 1, 1); 254 #ifdef DEV_NETMAP 255 MODULE_DEPEND(ix, netmap, 1, 1, 1); 256 #endif /* DEV_NETMAP */ 257 258 /* 259 ** TUNEABLE PARAMETERS: 260 */ 261 262 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD, 0, 263 "IXGBE driver parameters"); 264 265 /* 266 ** AIM: Adaptive Interrupt Moderation 267 ** which means that the interrupt rate 268 ** is varied over time based on the 269 ** traffic for that interrupt vector 270 */ 271 static int ixgbe_enable_aim = TRUE; 272 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 0, 273 "Enable adaptive interrupt moderation"); 274 275 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 276 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 277 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 278 279 /* How many packets rxeof tries to clean at a time */ 280 static int ixgbe_rx_process_limit = 256; 281 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 282 &ixgbe_rx_process_limit, 0, 283 "Maximum number of received packets to process at a time," 284 "-1 means unlimited"); 285 286 /* How many packets txeof tries to clean at a time */ 287 static int ixgbe_tx_process_limit = 256; 288 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 289 &ixgbe_tx_process_limit, 0, 290 "Maximum number of sent packets to process at a time," 291 "-1 means unlimited"); 292 293 /* 294 ** Smart speed setting, default to on 295 ** this only works as a compile option 296 ** right now as its during attach, set 297 ** this to 'ixgbe_smart_speed_off' to 298 ** disable. 299 */ 300 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 301 302 /* 303 * MSIX should be the default for best performance, 304 * but this allows it to be forced off for testing. 305 */ 306 static int ixgbe_enable_msix = 1; 307 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 308 "Enable MSI-X interrupts"); 309 310 /* 311 * Number of Queues, can be set to 0, 312 * it then autoconfigures based on the 313 * number of cpus with a max of 8. This 314 * can be overriden manually here. 315 */ 316 static int ixgbe_num_queues = 0; 317 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 318 "Number of queues to configure, 0 indicates autoconfigure"); 319 320 /* 321 ** Number of TX descriptors per ring, 322 ** setting higher than RX as this seems 323 ** the better performing choice. 324 */ 325 static int ixgbe_txd = PERFORM_TXD; 326 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 327 "Number of transmit descriptors per queue"); 328 329 /* Number of RX descriptors per ring */ 330 static int ixgbe_rxd = PERFORM_RXD; 331 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 332 "Number of receive descriptors per queue"); 333 334 /* 335 ** Defining this on will allow the use 336 ** of unsupported SFP+ modules, note that 337 ** doing so you are on your own :) 338 */ 339 static int allow_unsupported_sfp = FALSE; 340 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 341 342 /* Keep running tab on them for sanity check */ 343 static int ixgbe_total_ports; 344 345 #ifdef IXGBE_FDIR 346 /* 347 ** Flow Director actually 'steals' 348 ** part of the packet buffer as its 349 ** filter pool, this variable controls 350 ** how much it uses: 351 ** 0 = 64K, 1 = 128K, 2 = 256K 352 */ 353 static int fdir_pballoc = 1; 354 #endif 355 356 #ifdef DEV_NETMAP 357 /* 358 * The #ifdef DEV_NETMAP / #endif blocks in this file are meant to 359 * be a reference on how to implement netmap support in a driver. 360 * Additional comments are in ixgbe_netmap.h . 361 * 362 * <dev/netmap/ixgbe_netmap.h> contains functions for netmap support 363 * that extend the standard driver. 364 */ 365 #include <dev/netmap/ixgbe_netmap.h> 366 #endif /* DEV_NETMAP */ 367 368 static MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 369 370 /********************************************************************* 371 * Device identification routine 372 * 373 * ixgbe_probe determines if the driver should be loaded on 374 * adapter based on PCI vendor/device id of the adapter. 375 * 376 * return BUS_PROBE_DEFAULT on success, positive on failure 377 *********************************************************************/ 378 379 static int 380 ixgbe_probe(device_t dev) 381 { 382 ixgbe_vendor_info_t *ent; 383 384 u16 pci_vendor_id = 0; 385 u16 pci_device_id = 0; 386 u16 pci_subvendor_id = 0; 387 u16 pci_subdevice_id = 0; 388 char adapter_name[256]; 389 390 INIT_DEBUGOUT("ixgbe_probe: begin"); 391 392 pci_vendor_id = pci_get_vendor(dev); 393 if (pci_vendor_id != IXGBE_INTEL_VENDOR_ID) 394 return (ENXIO); 395 396 pci_device_id = pci_get_device(dev); 397 pci_subvendor_id = pci_get_subvendor(dev); 398 pci_subdevice_id = pci_get_subdevice(dev); 399 400 ent = ixgbe_vendor_info_array; 401 while (ent->vendor_id != 0) { 402 if ((pci_vendor_id == ent->vendor_id) && 403 (pci_device_id == ent->device_id) && 404 405 ((pci_subvendor_id == ent->subvendor_id) || 406 (ent->subvendor_id == 0)) && 407 408 ((pci_subdevice_id == ent->subdevice_id) || 409 (ent->subdevice_id == 0))) { 410 sprintf(adapter_name, "%s, Version - %s", 411 ixgbe_strings[ent->index], 412 ixgbe_driver_version); 413 device_set_desc_copy(dev, adapter_name); 414 ++ixgbe_total_ports; 415 return (BUS_PROBE_DEFAULT); 416 } 417 ent++; 418 } 419 return (ENXIO); 420 } 421 422 /********************************************************************* 423 * Device initialization routine 424 * 425 * The attach entry point is called when the driver is being loaded. 426 * This routine identifies the type of hardware, allocates all resources 427 * and initializes the hardware. 428 * 429 * return 0 on success, positive on failure 430 *********************************************************************/ 431 432 static int 433 ixgbe_attach(device_t dev) 434 { 435 struct adapter *adapter; 436 struct ixgbe_hw *hw; 437 int error = 0; 438 u16 csum; 439 u32 ctrl_ext; 440 441 INIT_DEBUGOUT("ixgbe_attach: begin"); 442 443 /* Allocate, clear, and link in our adapter structure */ 444 adapter = device_get_softc(dev); 445 adapter->dev = dev; 446 hw = &adapter->hw; 447 448 #ifdef DEV_NETMAP 449 adapter->init_locked = ixgbe_init_locked; 450 adapter->stop_locked = ixgbe_stop; 451 #endif 452 453 /* Core Lock Init*/ 454 IXGBE_CORE_LOCK_INIT(adapter, device_get_nameunit(dev)); 455 456 /* Set up the timer callout */ 457 callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0); 458 459 /* Determine hardware revision */ 460 ixgbe_identify_hardware(adapter); 461 462 /* Do base PCI setup - map BAR0 */ 463 if (ixgbe_allocate_pci_resources(adapter)) { 464 device_printf(dev, "Allocation of PCI resources failed\n"); 465 error = ENXIO; 466 goto err_out; 467 } 468 469 /* Sysctls for limiting the amount of work done in the taskqueues */ 470 ixgbe_set_sysctl_value(adapter, "rx_processing_limit", 471 "max number of rx packets to process", 472 &adapter->rx_process_limit, ixgbe_rx_process_limit); 473 474 ixgbe_set_sysctl_value(adapter, "tx_processing_limit", 475 "max number of tx packets to process", 476 &adapter->tx_process_limit, ixgbe_tx_process_limit); 477 478 /* Do descriptor calc and sanity checks */ 479 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 480 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 481 device_printf(dev, "TXD config issue, using default!\n"); 482 adapter->num_tx_desc = DEFAULT_TXD; 483 } else 484 adapter->num_tx_desc = ixgbe_txd; 485 486 /* 487 ** With many RX rings it is easy to exceed the 488 ** system mbuf allocation. Tuning nmbclusters 489 ** can alleviate this. 490 */ 491 if (nmbclusters > 0) { 492 int s; 493 s = (ixgbe_rxd * adapter->num_queues) * ixgbe_total_ports; 494 if (s > nmbclusters) { 495 device_printf(dev, "RX Descriptors exceed " 496 "system mbuf max, using default instead!\n"); 497 ixgbe_rxd = DEFAULT_RXD; 498 } 499 } 500 501 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 502 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 503 device_printf(dev, "RXD config issue, using default!\n"); 504 adapter->num_rx_desc = DEFAULT_RXD; 505 } else 506 adapter->num_rx_desc = ixgbe_rxd; 507 508 /* Allocate our TX/RX Queues */ 509 if (ixgbe_allocate_queues(adapter)) { 510 error = ENOMEM; 511 goto err_out; 512 } 513 514 /* Allocate multicast array memory. */ 515 adapter->mta = malloc(sizeof(*adapter->mta) * 516 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT); 517 if (adapter->mta == NULL) { 518 device_printf(dev, "Can not allocate multicast setup array\n"); 519 error = ENOMEM; 520 goto err_late; 521 } 522 523 /* Initialize the shared code */ 524 hw->allow_unsupported_sfp = allow_unsupported_sfp; 525 error = ixgbe_init_shared_code(hw); 526 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 527 /* 528 ** No optics in this port, set up 529 ** so the timer routine will probe 530 ** for later insertion. 531 */ 532 adapter->sfp_probe = TRUE; 533 error = 0; 534 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 535 device_printf(dev, "Unsupported SFP+ module detected!\n"); 536 error = EIO; 537 goto err_late; 538 } else if (error) { 539 device_printf(dev, "Unable to initialize the shared code\n"); 540 error = EIO; 541 goto err_late; 542 } 543 544 /* Make sure we have a good EEPROM before we read from it */ 545 if (ixgbe_validate_eeprom_checksum(&adapter->hw, &csum) < 0) { 546 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 547 error = EIO; 548 goto err_late; 549 } 550 551 error = ixgbe_init_hw(hw); 552 switch (error) { 553 case IXGBE_ERR_EEPROM_VERSION: 554 device_printf(dev, "This device is a pre-production adapter/" 555 "LOM. Please be aware there may be issues associated " 556 "with your hardware.\nIf you are experiencing problems " 557 "please contact your Intel or hardware representative " 558 "who provided you with this hardware.\n"); 559 break; 560 case IXGBE_ERR_SFP_NOT_SUPPORTED: 561 device_printf(dev, "Unsupported SFP+ Module\n"); 562 error = EIO; 563 goto err_late; 564 case IXGBE_ERR_SFP_NOT_PRESENT: 565 device_printf(dev, "No SFP+ Module found\n"); 566 /* falls thru */ 567 default: 568 break; 569 } 570 571 if ((adapter->msix > 1) && (ixgbe_enable_msix)) 572 error = ixgbe_allocate_msix(adapter); 573 else 574 error = ixgbe_allocate_legacy(adapter); 575 if (error) 576 goto err_late; 577 578 /* Setup OS specific network interface */ 579 if (ixgbe_setup_interface(dev, adapter) != 0) 580 goto err_late; 581 582 /* Initialize statistics */ 583 ixgbe_update_stats_counters(adapter); 584 585 /* Register for VLAN events */ 586 adapter->vlan_attach = EVENTHANDLER_REGISTER(vlan_config, 587 ixgbe_register_vlan, adapter, EVENTHANDLER_PRI_FIRST); 588 adapter->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig, 589 ixgbe_unregister_vlan, adapter, EVENTHANDLER_PRI_FIRST); 590 591 /* Check PCIE slot type/speed/width */ 592 ixgbe_get_slot_info(adapter); 593 594 /* Set an initial default flow control & dmac value */ 595 adapter->fc = ixgbe_fc_full; 596 adapter->dmac = 0; 597 adapter->eee_enabled = 0; 598 599 #ifdef PCI_IOV 600 if ((hw->mac.type != ixgbe_mac_82598EB) && (adapter->msix > 1)) { 601 nvlist_t *pf_schema, *vf_schema; 602 603 hw->mbx.ops.init_params(hw); 604 pf_schema = pci_iov_schema_alloc_node(); 605 vf_schema = pci_iov_schema_alloc_node(); 606 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); 607 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", 608 IOV_SCHEMA_HASDEFAULT, TRUE); 609 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", 610 IOV_SCHEMA_HASDEFAULT, FALSE); 611 pci_iov_schema_add_bool(vf_schema, "allow-promisc", 612 IOV_SCHEMA_HASDEFAULT, FALSE); 613 error = pci_iov_attach(dev, pf_schema, vf_schema); 614 if (error != 0) { 615 device_printf(dev, 616 "Error %d setting up SR-IOV\n", error); 617 } 618 } 619 #endif /* PCI_IOV */ 620 621 /* Check for certain supported features */ 622 ixgbe_check_wol_support(adapter); 623 624 /* Add sysctls */ 625 ixgbe_add_device_sysctls(adapter); 626 ixgbe_add_hw_stats(adapter); 627 628 /* let hardware know driver is loaded */ 629 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 630 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 631 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 632 633 #ifdef DEV_NETMAP 634 ixgbe_netmap_attach(adapter); 635 #endif /* DEV_NETMAP */ 636 INIT_DEBUGOUT("ixgbe_attach: end"); 637 return (0); 638 639 err_late: 640 ixgbe_free_transmit_structures(adapter); 641 ixgbe_free_receive_structures(adapter); 642 err_out: 643 if (adapter->ifp != NULL) 644 if_free(adapter->ifp); 645 ixgbe_free_pci_resources(adapter); 646 free(adapter->mta, M_DEVBUF); 647 return (error); 648 } 649 650 /********************************************************************* 651 * Device removal routine 652 * 653 * The detach entry point is called when the driver is being removed. 654 * This routine stops the adapter and deallocates all the resources 655 * that were allocated for driver operation. 656 * 657 * return 0 on success, positive on failure 658 *********************************************************************/ 659 660 static int 661 ixgbe_detach(device_t dev) 662 { 663 struct adapter *adapter = device_get_softc(dev); 664 struct ix_queue *que = adapter->queues; 665 struct tx_ring *txr = adapter->tx_rings; 666 u32 ctrl_ext; 667 668 INIT_DEBUGOUT("ixgbe_detach: begin"); 669 670 /* Make sure VLANS are not using driver */ 671 if (adapter->ifp->if_vlantrunk != NULL) { 672 device_printf(dev,"Vlan in use, detach first\n"); 673 return (EBUSY); 674 } 675 676 #ifdef PCI_IOV 677 if (pci_iov_detach(dev) != 0) { 678 device_printf(dev, "SR-IOV in use; detach first.\n"); 679 return (EBUSY); 680 } 681 #endif /* PCI_IOV */ 682 683 ether_ifdetach(adapter->ifp); 684 /* Stop the adapter */ 685 IXGBE_CORE_LOCK(adapter); 686 ixgbe_setup_low_power_mode(adapter); 687 IXGBE_CORE_UNLOCK(adapter); 688 689 for (int i = 0; i < adapter->num_queues; i++, que++, txr++) { 690 if (que->tq) { 691 #ifndef IXGBE_LEGACY_TX 692 taskqueue_drain(que->tq, &txr->txq_task); 693 #endif 694 taskqueue_drain(que->tq, &que->que_task); 695 taskqueue_free(que->tq); 696 } 697 } 698 699 /* Drain the Link queue */ 700 if (adapter->tq) { 701 taskqueue_drain(adapter->tq, &adapter->link_task); 702 taskqueue_drain(adapter->tq, &adapter->mod_task); 703 taskqueue_drain(adapter->tq, &adapter->msf_task); 704 #ifdef PCI_IOV 705 taskqueue_drain(adapter->tq, &adapter->mbx_task); 706 #endif 707 taskqueue_drain(adapter->tq, &adapter->phy_task); 708 #ifdef IXGBE_FDIR 709 taskqueue_drain(adapter->tq, &adapter->fdir_task); 710 #endif 711 taskqueue_free(adapter->tq); 712 } 713 714 /* let hardware know driver is unloading */ 715 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 716 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 717 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext); 718 719 /* Unregister VLAN events */ 720 if (adapter->vlan_attach != NULL) 721 EVENTHANDLER_DEREGISTER(vlan_config, adapter->vlan_attach); 722 if (adapter->vlan_detach != NULL) 723 EVENTHANDLER_DEREGISTER(vlan_unconfig, adapter->vlan_detach); 724 725 callout_drain(&adapter->timer); 726 #ifdef DEV_NETMAP 727 netmap_detach(adapter->ifp); 728 #endif /* DEV_NETMAP */ 729 ixgbe_free_pci_resources(adapter); 730 bus_generic_detach(dev); 731 if_free(adapter->ifp); 732 733 ixgbe_free_transmit_structures(adapter); 734 ixgbe_free_receive_structures(adapter); 735 free(adapter->mta, M_DEVBUF); 736 737 IXGBE_CORE_LOCK_DESTROY(adapter); 738 return (0); 739 } 740 741 /********************************************************************* 742 * 743 * Shutdown entry point 744 * 745 **********************************************************************/ 746 747 static int 748 ixgbe_shutdown(device_t dev) 749 { 750 struct adapter *adapter = device_get_softc(dev); 751 int error = 0; 752 753 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 754 755 IXGBE_CORE_LOCK(adapter); 756 error = ixgbe_setup_low_power_mode(adapter); 757 IXGBE_CORE_UNLOCK(adapter); 758 759 return (error); 760 } 761 762 /** 763 * Methods for going from: 764 * D0 -> D3: ixgbe_suspend 765 * D3 -> D0: ixgbe_resume 766 */ 767 static int 768 ixgbe_suspend(device_t dev) 769 { 770 struct adapter *adapter = device_get_softc(dev); 771 int error = 0; 772 773 INIT_DEBUGOUT("ixgbe_suspend: begin"); 774 775 IXGBE_CORE_LOCK(adapter); 776 777 error = ixgbe_setup_low_power_mode(adapter); 778 779 IXGBE_CORE_UNLOCK(adapter); 780 781 return (error); 782 } 783 784 static int 785 ixgbe_resume(device_t dev) 786 { 787 struct adapter *adapter = device_get_softc(dev); 788 struct ifnet *ifp = adapter->ifp; 789 struct ixgbe_hw *hw = &adapter->hw; 790 u32 wus; 791 792 INIT_DEBUGOUT("ixgbe_resume: begin"); 793 794 IXGBE_CORE_LOCK(adapter); 795 796 /* Read & clear WUS register */ 797 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 798 if (wus) 799 device_printf(dev, "Woken up by (WUS): %#010x\n", 800 IXGBE_READ_REG(hw, IXGBE_WUS)); 801 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 802 /* And clear WUFC until next low-power transition */ 803 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 804 805 /* 806 * Required after D3->D0 transition; 807 * will re-advertise all previous advertised speeds 808 */ 809 if (ifp->if_flags & IFF_UP) 810 ixgbe_init_locked(adapter); 811 812 IXGBE_CORE_UNLOCK(adapter); 813 814 return (0); 815 } 816 817 818 /********************************************************************* 819 * Ioctl entry point 820 * 821 * ixgbe_ioctl is called when the user wants to configure the 822 * interface. 823 * 824 * return 0 on success, positive on failure 825 **********************************************************************/ 826 827 static int 828 ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data) 829 { 830 struct adapter *adapter = ifp->if_softc; 831 struct ifreq *ifr = (struct ifreq *) data; 832 #if defined(INET) || defined(INET6) 833 struct ifaddr *ifa = (struct ifaddr *)data; 834 #endif 835 int error = 0; 836 bool avoid_reset = FALSE; 837 838 switch (command) { 839 840 case SIOCSIFADDR: 841 #ifdef INET 842 if (ifa->ifa_addr->sa_family == AF_INET) 843 avoid_reset = TRUE; 844 #endif 845 #ifdef INET6 846 if (ifa->ifa_addr->sa_family == AF_INET6) 847 avoid_reset = TRUE; 848 #endif 849 /* 850 ** Calling init results in link renegotiation, 851 ** so we avoid doing it when possible. 852 */ 853 if (avoid_reset) { 854 ifp->if_flags |= IFF_UP; 855 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 856 ixgbe_init(adapter); 857 #ifdef INET 858 if (!(ifp->if_flags & IFF_NOARP)) 859 arp_ifinit(ifp, ifa); 860 #endif 861 } else 862 error = ether_ioctl(ifp, command, data); 863 break; 864 case SIOCSIFMTU: 865 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 866 if (ifr->ifr_mtu > IXGBE_MAX_MTU) { 867 error = EINVAL; 868 } else { 869 IXGBE_CORE_LOCK(adapter); 870 ifp->if_mtu = ifr->ifr_mtu; 871 adapter->max_frame_size = 872 ifp->if_mtu + IXGBE_MTU_HDR; 873 ixgbe_init_locked(adapter); 874 #ifdef PCI_IOV 875 ixgbe_recalculate_max_frame(adapter); 876 #endif 877 IXGBE_CORE_UNLOCK(adapter); 878 } 879 break; 880 case SIOCSIFFLAGS: 881 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 882 IXGBE_CORE_LOCK(adapter); 883 if (ifp->if_flags & IFF_UP) { 884 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 885 if ((ifp->if_flags ^ adapter->if_flags) & 886 (IFF_PROMISC | IFF_ALLMULTI)) { 887 ixgbe_set_promisc(adapter); 888 } 889 } else 890 ixgbe_init_locked(adapter); 891 } else 892 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 893 ixgbe_stop(adapter); 894 adapter->if_flags = ifp->if_flags; 895 IXGBE_CORE_UNLOCK(adapter); 896 break; 897 case SIOCADDMULTI: 898 case SIOCDELMULTI: 899 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 900 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 901 IXGBE_CORE_LOCK(adapter); 902 ixgbe_disable_intr(adapter); 903 ixgbe_set_multi(adapter); 904 ixgbe_enable_intr(adapter); 905 IXGBE_CORE_UNLOCK(adapter); 906 } 907 break; 908 case SIOCSIFMEDIA: 909 case SIOCGIFMEDIA: 910 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 911 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 912 break; 913 case SIOCSIFCAP: 914 { 915 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 916 917 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 918 if (!mask) 919 break; 920 921 /* HW cannot turn these on/off separately */ 922 if (mask & (IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6)) { 923 ifp->if_capenable ^= IFCAP_RXCSUM; 924 ifp->if_capenable ^= IFCAP_RXCSUM_IPV6; 925 } 926 if (mask & IFCAP_TXCSUM) 927 ifp->if_capenable ^= IFCAP_TXCSUM; 928 if (mask & IFCAP_TXCSUM_IPV6) 929 ifp->if_capenable ^= IFCAP_TXCSUM_IPV6; 930 if (mask & IFCAP_TSO4) 931 ifp->if_capenable ^= IFCAP_TSO4; 932 if (mask & IFCAP_TSO6) 933 ifp->if_capenable ^= IFCAP_TSO6; 934 if (mask & IFCAP_LRO) 935 ifp->if_capenable ^= IFCAP_LRO; 936 if (mask & IFCAP_VLAN_HWTAGGING) 937 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 938 if (mask & IFCAP_VLAN_HWFILTER) 939 ifp->if_capenable ^= IFCAP_VLAN_HWFILTER; 940 if (mask & IFCAP_VLAN_HWTSO) 941 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 942 943 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 944 IXGBE_CORE_LOCK(adapter); 945 ixgbe_init_locked(adapter); 946 IXGBE_CORE_UNLOCK(adapter); 947 } 948 VLAN_CAPABILITIES(ifp); 949 break; 950 } 951 #if __FreeBSD_version >= 1100036 952 case SIOCGI2C: 953 { 954 struct ixgbe_hw *hw = &adapter->hw; 955 struct ifi2creq i2c; 956 int i; 957 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 958 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 959 if (error != 0) 960 break; 961 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 962 error = EINVAL; 963 break; 964 } 965 if (i2c.len > sizeof(i2c.data)) { 966 error = EINVAL; 967 break; 968 } 969 970 for (i = 0; i < i2c.len; i++) 971 hw->phy.ops.read_i2c_byte(hw, i2c.offset + i, 972 i2c.dev_addr, &i2c.data[i]); 973 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 974 break; 975 } 976 #endif 977 default: 978 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)\n", (int)command); 979 error = ether_ioctl(ifp, command, data); 980 break; 981 } 982 983 return (error); 984 } 985 986 /* 987 * Set the various hardware offload abilities. 988 * 989 * This takes the ifnet's if_capenable flags (e.g. set by the user using 990 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 991 * mbuf offload flags the driver will understand. 992 */ 993 static void 994 ixgbe_set_if_hwassist(struct adapter *adapter) 995 { 996 struct ifnet *ifp = adapter->ifp; 997 998 ifp->if_hwassist = 0; 999 #if __FreeBSD_version >= 1000000 1000 if (ifp->if_capenable & IFCAP_TSO4) 1001 ifp->if_hwassist |= CSUM_IP_TSO; 1002 if (ifp->if_capenable & IFCAP_TSO6) 1003 ifp->if_hwassist |= CSUM_IP6_TSO; 1004 if (ifp->if_capenable & IFCAP_TXCSUM) 1005 ifp->if_hwassist |= (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | 1006 CSUM_IP_SCTP); 1007 if (ifp->if_capenable & IFCAP_TXCSUM_IPV6) 1008 ifp->if_hwassist |= (CSUM_IP6_UDP | CSUM_IP6_TCP | 1009 CSUM_IP6_SCTP); 1010 #else 1011 if (ifp->if_capenable & IFCAP_TSO) 1012 ifp->if_hwassist |= CSUM_TSO; 1013 if (ifp->if_capenable & IFCAP_TXCSUM) { 1014 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP); 1015 struct ixgbe_hw *hw = &adapter->hw; 1016 if (hw->mac.type != ixgbe_mac_82598EB) 1017 ifp->if_hwassist |= CSUM_SCTP; 1018 } 1019 #endif 1020 } 1021 1022 /********************************************************************* 1023 * Init entry point 1024 * 1025 * This routine is used in two ways. It is used by the stack as 1026 * init entry point in network interface structure. It is also used 1027 * by the driver as a hw/sw initialization routine to get to a 1028 * consistent state. 1029 * 1030 * return 0 on success, positive on failure 1031 **********************************************************************/ 1032 #define IXGBE_MHADD_MFS_SHIFT 16 1033 1034 static void 1035 ixgbe_init_locked(struct adapter *adapter) 1036 { 1037 struct ifnet *ifp = adapter->ifp; 1038 device_t dev = adapter->dev; 1039 struct ixgbe_hw *hw = &adapter->hw; 1040 struct tx_ring *txr; 1041 struct rx_ring *rxr; 1042 u32 txdctl, mhadd; 1043 u32 rxdctl, rxctrl; 1044 int err = 0; 1045 #ifdef PCI_IOV 1046 enum ixgbe_iov_mode mode; 1047 #endif 1048 1049 mtx_assert(&adapter->core_mtx, MA_OWNED); 1050 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 1051 1052 hw->adapter_stopped = FALSE; 1053 ixgbe_stop_adapter(hw); 1054 callout_stop(&adapter->timer); 1055 1056 #ifdef PCI_IOV 1057 mode = ixgbe_get_iov_mode(adapter); 1058 adapter->pool = ixgbe_max_vfs(mode); 1059 /* Queue indices may change with IOV mode */ 1060 for (int i = 0; i < adapter->num_queues; i++) { 1061 adapter->rx_rings[i].me = ixgbe_pf_que_index(mode, i); 1062 adapter->tx_rings[i].me = ixgbe_pf_que_index(mode, i); 1063 } 1064 #endif 1065 /* reprogram the RAR[0] in case user changed it. */ 1066 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV); 1067 1068 /* Get the latest mac address, User can use a LAA */ 1069 bcopy(IF_LLADDR(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 1070 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1); 1071 hw->addr_ctrl.rar_used_count = 1; 1072 1073 /* Set hardware offload abilities from ifnet flags */ 1074 ixgbe_set_if_hwassist(adapter); 1075 1076 /* Prepare transmit descriptors and buffers */ 1077 if (ixgbe_setup_transmit_structures(adapter)) { 1078 device_printf(dev, "Could not setup transmit structures\n"); 1079 ixgbe_stop(adapter); 1080 return; 1081 } 1082 1083 ixgbe_init_hw(hw); 1084 #ifdef PCI_IOV 1085 ixgbe_initialize_iov(adapter); 1086 #endif 1087 ixgbe_initialize_transmit_units(adapter); 1088 1089 /* Setup Multicast table */ 1090 ixgbe_set_multi(adapter); 1091 1092 /* Determine the correct mbuf pool, based on frame size */ 1093 if (adapter->max_frame_size <= MCLBYTES) 1094 adapter->rx_mbuf_sz = MCLBYTES; 1095 else 1096 adapter->rx_mbuf_sz = MJUMPAGESIZE; 1097 1098 /* Prepare receive descriptors and buffers */ 1099 if (ixgbe_setup_receive_structures(adapter)) { 1100 device_printf(dev, "Could not setup receive structures\n"); 1101 ixgbe_stop(adapter); 1102 return; 1103 } 1104 1105 /* Configure RX settings */ 1106 ixgbe_initialize_receive_units(adapter); 1107 1108 /* Enable SDP & MSIX interrupts based on adapter */ 1109 ixgbe_config_gpie(adapter); 1110 1111 /* Set MTU size */ 1112 if (ifp->if_mtu > ETHERMTU) { 1113 /* aka IXGBE_MAXFRS on 82599 and newer */ 1114 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 1115 mhadd &= ~IXGBE_MHADD_MFS_MASK; 1116 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 1117 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 1118 } 1119 1120 /* Now enable all the queues */ 1121 for (int i = 0; i < adapter->num_queues; i++) { 1122 txr = &adapter->tx_rings[i]; 1123 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 1124 txdctl |= IXGBE_TXDCTL_ENABLE; 1125 /* Set WTHRESH to 8, burst writeback */ 1126 txdctl |= (8 << 16); 1127 /* 1128 * When the internal queue falls below PTHRESH (32), 1129 * start prefetching as long as there are at least 1130 * HTHRESH (1) buffers ready. The values are taken 1131 * from the Intel linux driver 3.8.21. 1132 * Prefetching enables tx line rate even with 1 queue. 1133 */ 1134 txdctl |= (32 << 0) | (1 << 8); 1135 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 1136 } 1137 1138 for (int i = 0, j = 0; i < adapter->num_queues; i++) { 1139 rxr = &adapter->rx_rings[i]; 1140 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 1141 if (hw->mac.type == ixgbe_mac_82598EB) { 1142 /* 1143 ** PTHRESH = 21 1144 ** HTHRESH = 4 1145 ** WTHRESH = 8 1146 */ 1147 rxdctl &= ~0x3FFFFF; 1148 rxdctl |= 0x080420; 1149 } 1150 rxdctl |= IXGBE_RXDCTL_ENABLE; 1151 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 1152 for (; j < 10; j++) { 1153 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 1154 IXGBE_RXDCTL_ENABLE) 1155 break; 1156 else 1157 msec_delay(1); 1158 } 1159 wmb(); 1160 #ifdef DEV_NETMAP 1161 /* 1162 * In netmap mode, we must preserve the buffers made 1163 * available to userspace before the if_init() 1164 * (this is true by default on the TX side, because 1165 * init makes all buffers available to userspace). 1166 * 1167 * netmap_reset() and the device specific routines 1168 * (e.g. ixgbe_setup_receive_rings()) map these 1169 * buffers at the end of the NIC ring, so here we 1170 * must set the RDT (tail) register to make sure 1171 * they are not overwritten. 1172 * 1173 * In this driver the NIC ring starts at RDH = 0, 1174 * RDT points to the last slot available for reception (?), 1175 * so RDT = num_rx_desc - 1 means the whole ring is available. 1176 */ 1177 if (ifp->if_capenable & IFCAP_NETMAP) { 1178 struct netmap_adapter *na = NA(adapter->ifp); 1179 struct netmap_kring *kring = &na->rx_rings[i]; 1180 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 1181 1182 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 1183 } else 1184 #endif /* DEV_NETMAP */ 1185 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), adapter->num_rx_desc - 1); 1186 } 1187 1188 /* Enable Receive engine */ 1189 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 1190 if (hw->mac.type == ixgbe_mac_82598EB) 1191 rxctrl |= IXGBE_RXCTRL_DMBYPS; 1192 rxctrl |= IXGBE_RXCTRL_RXEN; 1193 ixgbe_enable_rx_dma(hw, rxctrl); 1194 1195 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 1196 1197 /* Set up MSI/X routing */ 1198 if (ixgbe_enable_msix) { 1199 ixgbe_configure_ivars(adapter); 1200 /* Set up auto-mask */ 1201 if (hw->mac.type == ixgbe_mac_82598EB) 1202 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1203 else { 1204 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 1205 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 1206 } 1207 } else { /* Simple settings for Legacy/MSI */ 1208 ixgbe_set_ivar(adapter, 0, 0, 0); 1209 ixgbe_set_ivar(adapter, 0, 0, 1); 1210 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1211 } 1212 1213 #ifdef IXGBE_FDIR 1214 /* Init Flow director */ 1215 if (hw->mac.type != ixgbe_mac_82598EB) { 1216 u32 hdrm = 32 << fdir_pballoc; 1217 1218 hw->mac.ops.setup_rxpba(hw, 0, hdrm, PBA_STRATEGY_EQUAL); 1219 ixgbe_init_fdir_signature_82599(&adapter->hw, fdir_pballoc); 1220 } 1221 #endif 1222 1223 /* 1224 * Check on any SFP devices that 1225 * need to be kick-started 1226 */ 1227 if (hw->phy.type == ixgbe_phy_none) { 1228 err = hw->phy.ops.identify(hw); 1229 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1230 device_printf(dev, 1231 "Unsupported SFP+ module type was detected.\n"); 1232 return; 1233 } 1234 } 1235 1236 /* Set moderation on the Link interrupt */ 1237 IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR); 1238 1239 /* Configure Energy Efficient Ethernet for supported devices */ 1240 if (hw->mac.ops.setup_eee) { 1241 err = hw->mac.ops.setup_eee(hw, adapter->eee_enabled); 1242 if (err) 1243 device_printf(dev, "Error setting up EEE: %d\n", err); 1244 } 1245 1246 /* Config/Enable Link */ 1247 ixgbe_config_link(adapter); 1248 1249 /* Hardware Packet Buffer & Flow Control setup */ 1250 ixgbe_config_delay_values(adapter); 1251 1252 /* Initialize the FC settings */ 1253 ixgbe_start_hw(hw); 1254 1255 /* Set up VLAN support and filter */ 1256 ixgbe_setup_vlan_hw_support(adapter); 1257 1258 /* Setup DMA Coalescing */ 1259 ixgbe_config_dmac(adapter); 1260 1261 /* And now turn on interrupts */ 1262 ixgbe_enable_intr(adapter); 1263 1264 #ifdef PCI_IOV 1265 /* Enable the use of the MBX by the VF's */ 1266 { 1267 u32 reg = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1268 reg |= IXGBE_CTRL_EXT_PFRSTD; 1269 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, reg); 1270 } 1271 #endif 1272 1273 /* Now inform the stack we're ready */ 1274 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1275 1276 return; 1277 } 1278 1279 static void 1280 ixgbe_init(void *arg) 1281 { 1282 struct adapter *adapter = arg; 1283 1284 IXGBE_CORE_LOCK(adapter); 1285 ixgbe_init_locked(adapter); 1286 IXGBE_CORE_UNLOCK(adapter); 1287 return; 1288 } 1289 1290 static void 1291 ixgbe_config_gpie(struct adapter *adapter) 1292 { 1293 struct ixgbe_hw *hw = &adapter->hw; 1294 u32 gpie; 1295 1296 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 1297 1298 /* Fan Failure Interrupt */ 1299 if (hw->device_id == IXGBE_DEV_ID_82598AT) 1300 gpie |= IXGBE_SDP1_GPIEN; 1301 1302 /* 1303 * Module detection (SDP2) 1304 * Media ready (SDP1) 1305 */ 1306 if (hw->mac.type == ixgbe_mac_82599EB) { 1307 gpie |= IXGBE_SDP2_GPIEN; 1308 if (hw->device_id != IXGBE_DEV_ID_82599_QSFP_SF_QP) 1309 gpie |= IXGBE_SDP1_GPIEN; 1310 } 1311 1312 /* 1313 * Thermal Failure Detection (X540) 1314 * Link Detection (X552 SFP+, X552/X557-AT) 1315 */ 1316 if (hw->mac.type == ixgbe_mac_X540 || 1317 hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 1318 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 1319 gpie |= IXGBE_SDP0_GPIEN_X540; 1320 1321 if (adapter->msix > 1) { 1322 /* Enable Enhanced MSIX mode */ 1323 gpie |= IXGBE_GPIE_MSIX_MODE; 1324 gpie |= IXGBE_GPIE_EIAME | IXGBE_GPIE_PBA_SUPPORT | 1325 IXGBE_GPIE_OCD; 1326 } 1327 1328 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 1329 return; 1330 } 1331 1332 /* 1333 * Requires adapter->max_frame_size to be set. 1334 */ 1335 static void 1336 ixgbe_config_delay_values(struct adapter *adapter) 1337 { 1338 struct ixgbe_hw *hw = &adapter->hw; 1339 u32 rxpb, frame, size, tmp; 1340 1341 frame = adapter->max_frame_size; 1342 1343 /* Calculate High Water */ 1344 switch (hw->mac.type) { 1345 case ixgbe_mac_X540: 1346 case ixgbe_mac_X550: 1347 case ixgbe_mac_X550EM_x: 1348 tmp = IXGBE_DV_X540(frame, frame); 1349 break; 1350 default: 1351 tmp = IXGBE_DV(frame, frame); 1352 break; 1353 } 1354 size = IXGBE_BT2KB(tmp); 1355 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 1356 hw->fc.high_water[0] = rxpb - size; 1357 1358 /* Now calculate Low Water */ 1359 switch (hw->mac.type) { 1360 case ixgbe_mac_X540: 1361 case ixgbe_mac_X550: 1362 case ixgbe_mac_X550EM_x: 1363 tmp = IXGBE_LOW_DV_X540(frame); 1364 break; 1365 default: 1366 tmp = IXGBE_LOW_DV(frame); 1367 break; 1368 } 1369 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 1370 1371 hw->fc.requested_mode = adapter->fc; 1372 hw->fc.pause_time = IXGBE_FC_PAUSE; 1373 hw->fc.send_xon = TRUE; 1374 } 1375 1376 /* 1377 ** 1378 ** MSIX Interrupt Handlers and Tasklets 1379 ** 1380 */ 1381 1382 static inline void 1383 ixgbe_enable_queue(struct adapter *adapter, u32 vector) 1384 { 1385 struct ixgbe_hw *hw = &adapter->hw; 1386 u64 queue = (u64)(1 << vector); 1387 u32 mask; 1388 1389 if (hw->mac.type == ixgbe_mac_82598EB) { 1390 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1391 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 1392 } else { 1393 mask = (queue & 0xFFFFFFFF); 1394 if (mask) 1395 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 1396 mask = (queue >> 32); 1397 if (mask) 1398 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 1399 } 1400 } 1401 1402 static inline void 1403 ixgbe_disable_queue(struct adapter *adapter, u32 vector) 1404 { 1405 struct ixgbe_hw *hw = &adapter->hw; 1406 u64 queue = (u64)(1 << vector); 1407 u32 mask; 1408 1409 if (hw->mac.type == ixgbe_mac_82598EB) { 1410 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1411 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 1412 } else { 1413 mask = (queue & 0xFFFFFFFF); 1414 if (mask) 1415 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 1416 mask = (queue >> 32); 1417 if (mask) 1418 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 1419 } 1420 } 1421 1422 static void 1423 ixgbe_handle_que(void *context, int pending) 1424 { 1425 struct ix_queue *que = context; 1426 struct adapter *adapter = que->adapter; 1427 struct tx_ring *txr = que->txr; 1428 struct ifnet *ifp = adapter->ifp; 1429 1430 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1431 ixgbe_rxeof(que); 1432 IXGBE_TX_LOCK(txr); 1433 ixgbe_txeof(txr); 1434 #ifndef IXGBE_LEGACY_TX 1435 if (!drbr_empty(ifp, txr->br)) 1436 ixgbe_mq_start_locked(ifp, txr); 1437 #else 1438 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1439 ixgbe_start_locked(txr, ifp); 1440 #endif 1441 IXGBE_TX_UNLOCK(txr); 1442 } 1443 1444 /* Reenable this interrupt */ 1445 if (que->res != NULL) 1446 ixgbe_enable_queue(adapter, que->msix); 1447 else 1448 ixgbe_enable_intr(adapter); 1449 return; 1450 } 1451 1452 1453 /********************************************************************* 1454 * 1455 * Legacy Interrupt Service routine 1456 * 1457 **********************************************************************/ 1458 1459 static void 1460 ixgbe_legacy_irq(void *arg) 1461 { 1462 struct ix_queue *que = arg; 1463 struct adapter *adapter = que->adapter; 1464 struct ixgbe_hw *hw = &adapter->hw; 1465 struct ifnet *ifp = adapter->ifp; 1466 struct tx_ring *txr = adapter->tx_rings; 1467 bool more; 1468 u32 reg_eicr; 1469 1470 1471 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 1472 1473 ++que->irqs; 1474 if (reg_eicr == 0) { 1475 ixgbe_enable_intr(adapter); 1476 return; 1477 } 1478 1479 more = ixgbe_rxeof(que); 1480 1481 IXGBE_TX_LOCK(txr); 1482 ixgbe_txeof(txr); 1483 #ifdef IXGBE_LEGACY_TX 1484 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1485 ixgbe_start_locked(txr, ifp); 1486 #else 1487 if (!drbr_empty(ifp, txr->br)) 1488 ixgbe_mq_start_locked(ifp, txr); 1489 #endif 1490 IXGBE_TX_UNLOCK(txr); 1491 1492 /* Check for fan failure */ 1493 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1494 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1495 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1496 "REPLACE IMMEDIATELY!!\n"); 1497 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1498 } 1499 1500 /* Link status change */ 1501 if (reg_eicr & IXGBE_EICR_LSC) 1502 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1503 1504 /* External PHY interrupt */ 1505 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1506 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) 1507 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1508 1509 if (more) 1510 taskqueue_enqueue(que->tq, &que->que_task); 1511 else 1512 ixgbe_enable_intr(adapter); 1513 return; 1514 } 1515 1516 1517 /********************************************************************* 1518 * 1519 * MSIX Queue Interrupt Service routine 1520 * 1521 **********************************************************************/ 1522 void 1523 ixgbe_msix_que(void *arg) 1524 { 1525 struct ix_queue *que = arg; 1526 struct adapter *adapter = que->adapter; 1527 struct ifnet *ifp = adapter->ifp; 1528 struct tx_ring *txr = que->txr; 1529 struct rx_ring *rxr = que->rxr; 1530 bool more; 1531 u32 newitr = 0; 1532 1533 1534 /* Protect against spurious interrupts */ 1535 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1536 return; 1537 1538 ixgbe_disable_queue(adapter, que->msix); 1539 ++que->irqs; 1540 1541 more = ixgbe_rxeof(que); 1542 1543 IXGBE_TX_LOCK(txr); 1544 ixgbe_txeof(txr); 1545 #ifdef IXGBE_LEGACY_TX 1546 if (!IFQ_DRV_IS_EMPTY(ifp->if_snd)) 1547 ixgbe_start_locked(txr, ifp); 1548 #else 1549 if (!drbr_empty(ifp, txr->br)) 1550 ixgbe_mq_start_locked(ifp, txr); 1551 #endif 1552 IXGBE_TX_UNLOCK(txr); 1553 1554 /* Do AIM now? */ 1555 1556 if (ixgbe_enable_aim == FALSE) 1557 goto no_calc; 1558 /* 1559 ** Do Adaptive Interrupt Moderation: 1560 ** - Write out last calculated setting 1561 ** - Calculate based on average size over 1562 ** the last interval. 1563 */ 1564 if (que->eitr_setting) 1565 IXGBE_WRITE_REG(&adapter->hw, 1566 IXGBE_EITR(que->msix), que->eitr_setting); 1567 1568 que->eitr_setting = 0; 1569 1570 /* Idle, do nothing */ 1571 if ((txr->bytes == 0) && (rxr->bytes == 0)) 1572 goto no_calc; 1573 1574 if ((txr->bytes) && (txr->packets)) 1575 newitr = txr->bytes/txr->packets; 1576 if ((rxr->bytes) && (rxr->packets)) 1577 newitr = max(newitr, 1578 (rxr->bytes / rxr->packets)); 1579 newitr += 24; /* account for hardware frame, crc */ 1580 1581 /* set an upper boundary */ 1582 newitr = min(newitr, 3000); 1583 1584 /* Be nice to the mid range */ 1585 if ((newitr > 300) && (newitr < 1200)) 1586 newitr = (newitr / 3); 1587 else 1588 newitr = (newitr / 2); 1589 1590 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 1591 newitr |= newitr << 16; 1592 else 1593 newitr |= IXGBE_EITR_CNT_WDIS; 1594 1595 /* save for next interrupt */ 1596 que->eitr_setting = newitr; 1597 1598 /* Reset state */ 1599 txr->bytes = 0; 1600 txr->packets = 0; 1601 rxr->bytes = 0; 1602 rxr->packets = 0; 1603 1604 no_calc: 1605 if (more) 1606 taskqueue_enqueue(que->tq, &que->que_task); 1607 else 1608 ixgbe_enable_queue(adapter, que->msix); 1609 return; 1610 } 1611 1612 1613 static void 1614 ixgbe_msix_link(void *arg) 1615 { 1616 struct adapter *adapter = arg; 1617 struct ixgbe_hw *hw = &adapter->hw; 1618 u32 reg_eicr, mod_mask; 1619 1620 ++adapter->link_irq; 1621 1622 /* Pause other interrupts */ 1623 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 1624 1625 /* First get the cause */ 1626 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 1627 /* Be sure the queue bits are not cleared */ 1628 reg_eicr &= ~IXGBE_EICR_RTX_QUEUE; 1629 /* Clear interrupt with write */ 1630 IXGBE_WRITE_REG(hw, IXGBE_EICR, reg_eicr); 1631 1632 /* Link status change */ 1633 if (reg_eicr & IXGBE_EICR_LSC) { 1634 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 1635 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1636 } 1637 1638 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 1639 #ifdef IXGBE_FDIR 1640 if (reg_eicr & IXGBE_EICR_FLOW_DIR) { 1641 /* This is probably overkill :) */ 1642 if (!atomic_cmpset_int(&adapter->fdir_reinit, 0, 1)) 1643 return; 1644 /* Disable the interrupt */ 1645 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR); 1646 taskqueue_enqueue(adapter->tq, &adapter->fdir_task); 1647 } else 1648 #endif 1649 if (reg_eicr & IXGBE_EICR_ECC) { 1650 device_printf(adapter->dev, "CRITICAL: ECC ERROR!! " 1651 "Please Reboot!!\n"); 1652 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 1653 } 1654 1655 /* Check for over temp condition */ 1656 if (reg_eicr & IXGBE_EICR_TS) { 1657 device_printf(adapter->dev, "CRITICAL: OVER TEMP!! " 1658 "PHY IS SHUT DOWN!!\n"); 1659 device_printf(adapter->dev, "System shutdown required!\n"); 1660 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS); 1661 } 1662 #ifdef PCI_IOV 1663 if (reg_eicr & IXGBE_EICR_MAILBOX) 1664 taskqueue_enqueue(adapter->tq, &adapter->mbx_task); 1665 #endif 1666 } 1667 1668 /* Pluggable optics-related interrupt */ 1669 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP) 1670 mod_mask = IXGBE_EICR_GPI_SDP0_X540; 1671 else 1672 mod_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 1673 1674 if (ixgbe_is_sfp(hw)) { 1675 if (reg_eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw)) { 1676 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1677 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 1678 } else if (reg_eicr & mod_mask) { 1679 IXGBE_WRITE_REG(hw, IXGBE_EICR, mod_mask); 1680 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 1681 } 1682 } 1683 1684 /* Check for fan failure */ 1685 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1686 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1687 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1); 1688 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1689 "REPLACE IMMEDIATELY!!\n"); 1690 } 1691 1692 /* External PHY interrupt */ 1693 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1694 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) { 1695 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 1696 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1697 } 1698 1699 /* Re-enable other interrupts */ 1700 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER); 1701 return; 1702 } 1703 1704 /********************************************************************* 1705 * 1706 * Media Ioctl callback 1707 * 1708 * This routine is called whenever the user queries the status of 1709 * the interface using ifconfig. 1710 * 1711 **********************************************************************/ 1712 static void 1713 ixgbe_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) 1714 { 1715 struct adapter *adapter = ifp->if_softc; 1716 struct ixgbe_hw *hw = &adapter->hw; 1717 int layer; 1718 1719 INIT_DEBUGOUT("ixgbe_media_status: begin"); 1720 IXGBE_CORE_LOCK(adapter); 1721 ixgbe_update_link_status(adapter); 1722 1723 ifmr->ifm_status = IFM_AVALID; 1724 ifmr->ifm_active = IFM_ETHER; 1725 1726 if (!adapter->link_active) { 1727 IXGBE_CORE_UNLOCK(adapter); 1728 return; 1729 } 1730 1731 ifmr->ifm_status |= IFM_ACTIVE; 1732 layer = adapter->phy_layer; 1733 1734 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 1735 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 1736 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1737 switch (adapter->link_speed) { 1738 case IXGBE_LINK_SPEED_10GB_FULL: 1739 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 1740 break; 1741 case IXGBE_LINK_SPEED_1GB_FULL: 1742 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 1743 break; 1744 case IXGBE_LINK_SPEED_100_FULL: 1745 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 1746 break; 1747 } 1748 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1749 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1750 switch (adapter->link_speed) { 1751 case IXGBE_LINK_SPEED_10GB_FULL: 1752 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 1753 break; 1754 } 1755 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 1756 switch (adapter->link_speed) { 1757 case IXGBE_LINK_SPEED_10GB_FULL: 1758 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 1759 break; 1760 case IXGBE_LINK_SPEED_1GB_FULL: 1761 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1762 break; 1763 } 1764 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 1765 switch (adapter->link_speed) { 1766 case IXGBE_LINK_SPEED_10GB_FULL: 1767 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 1768 break; 1769 case IXGBE_LINK_SPEED_1GB_FULL: 1770 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1771 break; 1772 } 1773 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 1774 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1775 switch (adapter->link_speed) { 1776 case IXGBE_LINK_SPEED_10GB_FULL: 1777 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1778 break; 1779 case IXGBE_LINK_SPEED_1GB_FULL: 1780 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1781 break; 1782 } 1783 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1784 switch (adapter->link_speed) { 1785 case IXGBE_LINK_SPEED_10GB_FULL: 1786 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1787 break; 1788 } 1789 /* 1790 ** XXX: These need to use the proper media types once 1791 ** they're added. 1792 */ 1793 #ifndef IFM_ETH_XTYPE 1794 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1795 switch (adapter->link_speed) { 1796 case IXGBE_LINK_SPEED_10GB_FULL: 1797 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1798 break; 1799 case IXGBE_LINK_SPEED_2_5GB_FULL: 1800 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1801 break; 1802 case IXGBE_LINK_SPEED_1GB_FULL: 1803 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1804 break; 1805 } 1806 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1807 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1808 switch (adapter->link_speed) { 1809 case IXGBE_LINK_SPEED_10GB_FULL: 1810 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1811 break; 1812 case IXGBE_LINK_SPEED_2_5GB_FULL: 1813 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1814 break; 1815 case IXGBE_LINK_SPEED_1GB_FULL: 1816 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1817 break; 1818 } 1819 #else 1820 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1821 switch (adapter->link_speed) { 1822 case IXGBE_LINK_SPEED_10GB_FULL: 1823 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 1824 break; 1825 case IXGBE_LINK_SPEED_2_5GB_FULL: 1826 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1827 break; 1828 case IXGBE_LINK_SPEED_1GB_FULL: 1829 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1830 break; 1831 } 1832 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1833 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1834 switch (adapter->link_speed) { 1835 case IXGBE_LINK_SPEED_10GB_FULL: 1836 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 1837 break; 1838 case IXGBE_LINK_SPEED_2_5GB_FULL: 1839 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1840 break; 1841 case IXGBE_LINK_SPEED_1GB_FULL: 1842 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1843 break; 1844 } 1845 #endif 1846 1847 /* If nothing is recognized... */ 1848 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 1849 ifmr->ifm_active |= IFM_UNKNOWN; 1850 1851 #if __FreeBSD_version >= 900025 1852 /* Display current flow control setting used on link */ 1853 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 1854 hw->fc.current_mode == ixgbe_fc_full) 1855 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 1856 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 1857 hw->fc.current_mode == ixgbe_fc_full) 1858 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 1859 #endif 1860 1861 IXGBE_CORE_UNLOCK(adapter); 1862 1863 return; 1864 } 1865 1866 /********************************************************************* 1867 * 1868 * Media Ioctl callback 1869 * 1870 * This routine is called when the user changes speed/duplex using 1871 * media/mediopt option with ifconfig. 1872 * 1873 **********************************************************************/ 1874 static int 1875 ixgbe_media_change(struct ifnet * ifp) 1876 { 1877 struct adapter *adapter = ifp->if_softc; 1878 struct ifmedia *ifm = &adapter->media; 1879 struct ixgbe_hw *hw = &adapter->hw; 1880 ixgbe_link_speed speed = 0; 1881 1882 INIT_DEBUGOUT("ixgbe_media_change: begin"); 1883 1884 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1885 return (EINVAL); 1886 1887 if (hw->phy.media_type == ixgbe_media_type_backplane) 1888 return (ENODEV); 1889 1890 /* 1891 ** We don't actually need to check against the supported 1892 ** media types of the adapter; ifmedia will take care of 1893 ** that for us. 1894 */ 1895 #ifndef IFM_ETH_XTYPE 1896 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1897 case IFM_AUTO: 1898 case IFM_10G_T: 1899 speed |= IXGBE_LINK_SPEED_100_FULL; 1900 case IFM_10G_LRM: 1901 case IFM_10G_SR: /* KR, too */ 1902 case IFM_10G_LR: 1903 case IFM_10G_CX4: /* KX4 */ 1904 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1905 case IFM_10G_TWINAX: 1906 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1907 break; 1908 case IFM_1000_T: 1909 speed |= IXGBE_LINK_SPEED_100_FULL; 1910 case IFM_1000_LX: 1911 case IFM_1000_SX: 1912 case IFM_1000_CX: /* KX */ 1913 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1914 break; 1915 case IFM_100_TX: 1916 speed |= IXGBE_LINK_SPEED_100_FULL; 1917 break; 1918 default: 1919 goto invalid; 1920 } 1921 #else 1922 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1923 case IFM_AUTO: 1924 case IFM_10G_T: 1925 speed |= IXGBE_LINK_SPEED_100_FULL; 1926 case IFM_10G_LRM: 1927 case IFM_10G_KR: 1928 case IFM_10G_LR: 1929 case IFM_10G_KX4: 1930 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1931 case IFM_10G_TWINAX: 1932 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1933 break; 1934 case IFM_1000_T: 1935 speed |= IXGBE_LINK_SPEED_100_FULL; 1936 case IFM_1000_LX: 1937 case IFM_1000_SX: 1938 case IFM_1000_KX: 1939 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1940 break; 1941 case IFM_100_TX: 1942 speed |= IXGBE_LINK_SPEED_100_FULL; 1943 break; 1944 default: 1945 goto invalid; 1946 } 1947 #endif 1948 1949 hw->mac.autotry_restart = TRUE; 1950 hw->mac.ops.setup_link(hw, speed, TRUE); 1951 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1952 adapter->advertise = 0; 1953 } else { 1954 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 1955 adapter->advertise |= 1 << 2; 1956 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 1957 adapter->advertise |= 1 << 1; 1958 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 1959 adapter->advertise |= 1 << 0; 1960 } 1961 1962 return (0); 1963 1964 invalid: 1965 device_printf(adapter->dev, "Invalid media type!\n"); 1966 return (EINVAL); 1967 } 1968 1969 static void 1970 ixgbe_set_promisc(struct adapter *adapter) 1971 { 1972 u_int32_t reg_rctl; 1973 struct ifnet *ifp = adapter->ifp; 1974 int mcnt = 0; 1975 1976 reg_rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 1977 reg_rctl &= (~IXGBE_FCTRL_UPE); 1978 if (ifp->if_flags & IFF_ALLMULTI) 1979 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 1980 else { 1981 struct ifmultiaddr *ifma; 1982 #if __FreeBSD_version < 800000 1983 IF_ADDR_LOCK(ifp); 1984 #else 1985 if_maddr_rlock(ifp); 1986 #endif 1987 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1988 if (ifma->ifma_addr->sa_family != AF_LINK) 1989 continue; 1990 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 1991 break; 1992 mcnt++; 1993 } 1994 #if __FreeBSD_version < 800000 1995 IF_ADDR_UNLOCK(ifp); 1996 #else 1997 if_maddr_runlock(ifp); 1998 #endif 1999 } 2000 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 2001 reg_rctl &= (~IXGBE_FCTRL_MPE); 2002 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2003 2004 if (ifp->if_flags & IFF_PROMISC) { 2005 reg_rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2006 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2007 } else if (ifp->if_flags & IFF_ALLMULTI) { 2008 reg_rctl |= IXGBE_FCTRL_MPE; 2009 reg_rctl &= ~IXGBE_FCTRL_UPE; 2010 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2011 } 2012 return; 2013 } 2014 2015 2016 /********************************************************************* 2017 * Multicast Update 2018 * 2019 * This routine is called whenever multicast address list is updated. 2020 * 2021 **********************************************************************/ 2022 #define IXGBE_RAR_ENTRIES 16 2023 2024 static void 2025 ixgbe_set_multi(struct adapter *adapter) 2026 { 2027 u32 fctrl; 2028 u8 *update_ptr; 2029 struct ifmultiaddr *ifma; 2030 struct ixgbe_mc_addr *mta; 2031 int mcnt = 0; 2032 struct ifnet *ifp = adapter->ifp; 2033 2034 IOCTL_DEBUGOUT("ixgbe_set_multi: begin"); 2035 2036 mta = adapter->mta; 2037 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 2038 2039 #if __FreeBSD_version < 800000 2040 IF_ADDR_LOCK(ifp); 2041 #else 2042 if_maddr_rlock(ifp); 2043 #endif 2044 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2045 if (ifma->ifma_addr->sa_family != AF_LINK) 2046 continue; 2047 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2048 break; 2049 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 2050 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 2051 mta[mcnt].vmdq = adapter->pool; 2052 mcnt++; 2053 } 2054 #if __FreeBSD_version < 800000 2055 IF_ADDR_UNLOCK(ifp); 2056 #else 2057 if_maddr_runlock(ifp); 2058 #endif 2059 2060 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 2061 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2062 if (ifp->if_flags & IFF_PROMISC) 2063 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2064 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 2065 ifp->if_flags & IFF_ALLMULTI) { 2066 fctrl |= IXGBE_FCTRL_MPE; 2067 fctrl &= ~IXGBE_FCTRL_UPE; 2068 } else 2069 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2070 2071 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl); 2072 2073 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 2074 update_ptr = (u8 *)mta; 2075 ixgbe_update_mc_addr_list(&adapter->hw, 2076 update_ptr, mcnt, ixgbe_mc_array_itr, TRUE); 2077 } 2078 2079 return; 2080 } 2081 2082 /* 2083 * This is an iterator function now needed by the multicast 2084 * shared code. It simply feeds the shared code routine the 2085 * addresses in the array of ixgbe_set_multi() one by one. 2086 */ 2087 static u8 * 2088 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 2089 { 2090 struct ixgbe_mc_addr *mta; 2091 2092 mta = (struct ixgbe_mc_addr *)*update_ptr; 2093 *vmdq = mta->vmdq; 2094 2095 *update_ptr = (u8*)(mta + 1);; 2096 return (mta->addr); 2097 } 2098 2099 2100 /********************************************************************* 2101 * Timer routine 2102 * 2103 * This routine checks for link status,updates statistics, 2104 * and runs the watchdog check. 2105 * 2106 **********************************************************************/ 2107 2108 static void 2109 ixgbe_local_timer(void *arg) 2110 { 2111 struct adapter *adapter = arg; 2112 device_t dev = adapter->dev; 2113 struct ix_queue *que = adapter->queues; 2114 u64 queues = 0; 2115 int hung = 0; 2116 2117 mtx_assert(&adapter->core_mtx, MA_OWNED); 2118 2119 /* Check for pluggable optics */ 2120 if (adapter->sfp_probe) 2121 if (!ixgbe_sfp_probe(adapter)) 2122 goto out; /* Nothing to do */ 2123 2124 ixgbe_update_link_status(adapter); 2125 ixgbe_update_stats_counters(adapter); 2126 2127 /* 2128 ** Check the TX queues status 2129 ** - mark hung queues so we don't schedule on them 2130 ** - watchdog only if all queues show hung 2131 */ 2132 for (int i = 0; i < adapter->num_queues; i++, que++) { 2133 /* Keep track of queues with work for soft irq */ 2134 if (que->txr->busy) 2135 queues |= ((u64)1 << que->me); 2136 /* 2137 ** Each time txeof runs without cleaning, but there 2138 ** are uncleaned descriptors it increments busy. If 2139 ** we get to the MAX we declare it hung. 2140 */ 2141 if (que->busy == IXGBE_QUEUE_HUNG) { 2142 ++hung; 2143 /* Mark the queue as inactive */ 2144 adapter->active_queues &= ~((u64)1 << que->me); 2145 continue; 2146 } else { 2147 /* Check if we've come back from hung */ 2148 if ((adapter->active_queues & ((u64)1 << que->me)) == 0) 2149 adapter->active_queues |= ((u64)1 << que->me); 2150 } 2151 if (que->busy >= IXGBE_MAX_TX_BUSY) { 2152 device_printf(dev,"Warning queue %d " 2153 "appears to be hung!\n", i); 2154 que->txr->busy = IXGBE_QUEUE_HUNG; 2155 ++hung; 2156 } 2157 2158 } 2159 2160 /* Only truly watchdog if all queues show hung */ 2161 if (hung == adapter->num_queues) 2162 goto watchdog; 2163 else if (queues != 0) { /* Force an IRQ on queues with work */ 2164 ixgbe_rearm_queues(adapter, queues); 2165 } 2166 2167 out: 2168 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 2169 return; 2170 2171 watchdog: 2172 device_printf(adapter->dev, "Watchdog timeout -- resetting\n"); 2173 adapter->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2174 adapter->watchdog_events++; 2175 ixgbe_init_locked(adapter); 2176 } 2177 2178 2179 /* 2180 ** Note: this routine updates the OS on the link state 2181 ** the real check of the hardware only happens with 2182 ** a link interrupt. 2183 */ 2184 static void 2185 ixgbe_update_link_status(struct adapter *adapter) 2186 { 2187 struct ifnet *ifp = adapter->ifp; 2188 device_t dev = adapter->dev; 2189 2190 if (adapter->link_up){ 2191 if (adapter->link_active == FALSE) { 2192 if (bootverbose) 2193 device_printf(dev,"Link is up %d Gbps %s \n", 2194 ((adapter->link_speed == 128)? 10:1), 2195 "Full Duplex"); 2196 adapter->link_active = TRUE; 2197 /* Update any Flow Control changes */ 2198 ixgbe_fc_enable(&adapter->hw); 2199 /* Update DMA coalescing config */ 2200 ixgbe_config_dmac(adapter); 2201 if_link_state_change(ifp, LINK_STATE_UP); 2202 #ifdef PCI_IOV 2203 ixgbe_ping_all_vfs(adapter); 2204 #endif 2205 } 2206 } else { /* Link down */ 2207 if (adapter->link_active == TRUE) { 2208 if (bootverbose) 2209 device_printf(dev,"Link is Down\n"); 2210 if_link_state_change(ifp, LINK_STATE_DOWN); 2211 adapter->link_active = FALSE; 2212 #ifdef PCI_IOV 2213 ixgbe_ping_all_vfs(adapter); 2214 #endif 2215 } 2216 } 2217 2218 return; 2219 } 2220 2221 2222 /********************************************************************* 2223 * 2224 * This routine disables all traffic on the adapter by issuing a 2225 * global reset on the MAC and deallocates TX/RX buffers. 2226 * 2227 **********************************************************************/ 2228 2229 static void 2230 ixgbe_stop(void *arg) 2231 { 2232 struct ifnet *ifp; 2233 struct adapter *adapter = arg; 2234 struct ixgbe_hw *hw = &adapter->hw; 2235 ifp = adapter->ifp; 2236 2237 mtx_assert(&adapter->core_mtx, MA_OWNED); 2238 2239 INIT_DEBUGOUT("ixgbe_stop: begin\n"); 2240 ixgbe_disable_intr(adapter); 2241 callout_stop(&adapter->timer); 2242 2243 /* Let the stack know...*/ 2244 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2245 2246 ixgbe_reset_hw(hw); 2247 hw->adapter_stopped = FALSE; 2248 ixgbe_stop_adapter(hw); 2249 if (hw->mac.type == ixgbe_mac_82599EB) 2250 ixgbe_stop_mac_link_on_d3_82599(hw); 2251 /* Turn off the laser - noop with no optics */ 2252 ixgbe_disable_tx_laser(hw); 2253 2254 /* Update the stack */ 2255 adapter->link_up = FALSE; 2256 ixgbe_update_link_status(adapter); 2257 2258 /* reprogram the RAR[0] in case user changed it. */ 2259 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); 2260 2261 return; 2262 } 2263 2264 2265 /********************************************************************* 2266 * 2267 * Determine hardware revision. 2268 * 2269 **********************************************************************/ 2270 static void 2271 ixgbe_identify_hardware(struct adapter *adapter) 2272 { 2273 device_t dev = adapter->dev; 2274 struct ixgbe_hw *hw = &adapter->hw; 2275 2276 /* Save off the information about this board */ 2277 hw->vendor_id = pci_get_vendor(dev); 2278 hw->device_id = pci_get_device(dev); 2279 hw->revision_id = pci_read_config(dev, PCIR_REVID, 1); 2280 hw->subsystem_vendor_id = 2281 pci_read_config(dev, PCIR_SUBVEND_0, 2); 2282 hw->subsystem_device_id = 2283 pci_read_config(dev, PCIR_SUBDEV_0, 2); 2284 2285 /* 2286 ** Make sure BUSMASTER is set 2287 */ 2288 pci_enable_busmaster(dev); 2289 2290 /* We need this here to set the num_segs below */ 2291 ixgbe_set_mac_type(hw); 2292 2293 /* Pick up the 82599 settings */ 2294 if (hw->mac.type != ixgbe_mac_82598EB) { 2295 hw->phy.smart_speed = ixgbe_smart_speed; 2296 adapter->num_segs = IXGBE_82599_SCATTER; 2297 } else 2298 adapter->num_segs = IXGBE_82598_SCATTER; 2299 2300 return; 2301 } 2302 2303 /********************************************************************* 2304 * 2305 * Determine optic type 2306 * 2307 **********************************************************************/ 2308 static void 2309 ixgbe_setup_optics(struct adapter *adapter) 2310 { 2311 struct ixgbe_hw *hw = &adapter->hw; 2312 int layer; 2313 2314 layer = adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 2315 2316 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) { 2317 adapter->optics = IFM_10G_T; 2318 return; 2319 } 2320 2321 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) { 2322 adapter->optics = IFM_1000_T; 2323 return; 2324 } 2325 2326 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) { 2327 adapter->optics = IFM_1000_SX; 2328 return; 2329 } 2330 2331 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_LR | 2332 IXGBE_PHYSICAL_LAYER_10GBASE_LRM)) { 2333 adapter->optics = IFM_10G_LR; 2334 return; 2335 } 2336 2337 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2338 adapter->optics = IFM_10G_SR; 2339 return; 2340 } 2341 2342 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU) { 2343 adapter->optics = IFM_10G_TWINAX; 2344 return; 2345 } 2346 2347 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | 2348 IXGBE_PHYSICAL_LAYER_10GBASE_CX4)) { 2349 adapter->optics = IFM_10G_CX4; 2350 return; 2351 } 2352 2353 /* If we get here just set the default */ 2354 adapter->optics = IFM_ETHER | IFM_AUTO; 2355 return; 2356 } 2357 2358 /********************************************************************* 2359 * 2360 * Setup the Legacy or MSI Interrupt handler 2361 * 2362 **********************************************************************/ 2363 static int 2364 ixgbe_allocate_legacy(struct adapter *adapter) 2365 { 2366 device_t dev = adapter->dev; 2367 struct ix_queue *que = adapter->queues; 2368 #ifndef IXGBE_LEGACY_TX 2369 struct tx_ring *txr = adapter->tx_rings; 2370 #endif 2371 int error, rid = 0; 2372 2373 /* MSI RID at 1 */ 2374 if (adapter->msix == 1) 2375 rid = 1; 2376 2377 /* We allocate a single interrupt resource */ 2378 adapter->res = bus_alloc_resource_any(dev, 2379 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2380 if (adapter->res == NULL) { 2381 device_printf(dev, "Unable to allocate bus resource: " 2382 "interrupt\n"); 2383 return (ENXIO); 2384 } 2385 2386 /* 2387 * Try allocating a fast interrupt and the associated deferred 2388 * processing contexts. 2389 */ 2390 #ifndef IXGBE_LEGACY_TX 2391 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2392 #endif 2393 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2394 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2395 taskqueue_thread_enqueue, &que->tq); 2396 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s ixq", 2397 device_get_nameunit(adapter->dev)); 2398 2399 /* Tasklets for Link, SFP and Multispeed Fiber */ 2400 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2401 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2402 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2403 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2404 #ifdef IXGBE_FDIR 2405 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2406 #endif 2407 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2408 taskqueue_thread_enqueue, &adapter->tq); 2409 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2410 device_get_nameunit(adapter->dev)); 2411 2412 if ((error = bus_setup_intr(dev, adapter->res, 2413 INTR_TYPE_NET | INTR_MPSAFE, NULL, ixgbe_legacy_irq, 2414 que, &adapter->tag)) != 0) { 2415 device_printf(dev, "Failed to register fast interrupt " 2416 "handler: %d\n", error); 2417 taskqueue_free(que->tq); 2418 taskqueue_free(adapter->tq); 2419 que->tq = NULL; 2420 adapter->tq = NULL; 2421 return (error); 2422 } 2423 /* For simplicity in the handlers */ 2424 adapter->active_queues = IXGBE_EIMS_ENABLE_MASK; 2425 2426 return (0); 2427 } 2428 2429 2430 /********************************************************************* 2431 * 2432 * Setup MSIX Interrupt resources and handlers 2433 * 2434 **********************************************************************/ 2435 static int 2436 ixgbe_allocate_msix(struct adapter *adapter) 2437 { 2438 device_t dev = adapter->dev; 2439 struct ix_queue *que = adapter->queues; 2440 struct tx_ring *txr = adapter->tx_rings; 2441 int error, rid, vector = 0; 2442 int cpu_id = 0; 2443 #ifdef RSS 2444 cpuset_t cpu_mask; 2445 #endif 2446 2447 #ifdef RSS 2448 /* 2449 * If we're doing RSS, the number of queues needs to 2450 * match the number of RSS buckets that are configured. 2451 * 2452 * + If there's more queues than RSS buckets, we'll end 2453 * up with queues that get no traffic. 2454 * 2455 * + If there's more RSS buckets than queues, we'll end 2456 * up having multiple RSS buckets map to the same queue, 2457 * so there'll be some contention. 2458 */ 2459 if (adapter->num_queues != rss_getnumbuckets()) { 2460 device_printf(dev, 2461 "%s: number of queues (%d) != number of RSS buckets (%d)" 2462 "; performance will be impacted.\n", 2463 __func__, 2464 adapter->num_queues, 2465 rss_getnumbuckets()); 2466 } 2467 #endif 2468 2469 for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) { 2470 rid = vector + 1; 2471 que->res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 2472 RF_SHAREABLE | RF_ACTIVE); 2473 if (que->res == NULL) { 2474 device_printf(dev,"Unable to allocate" 2475 " bus resource: que interrupt [%d]\n", vector); 2476 return (ENXIO); 2477 } 2478 /* Set the handler function */ 2479 error = bus_setup_intr(dev, que->res, 2480 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2481 ixgbe_msix_que, que, &que->tag); 2482 if (error) { 2483 que->res = NULL; 2484 device_printf(dev, "Failed to register QUE handler"); 2485 return (error); 2486 } 2487 #if __FreeBSD_version >= 800504 2488 bus_describe_intr(dev, que->res, que->tag, "q%d", i); 2489 #endif 2490 que->msix = vector; 2491 adapter->active_queues |= (u64)(1 << que->msix); 2492 #ifdef RSS 2493 /* 2494 * The queue ID is used as the RSS layer bucket ID. 2495 * We look up the queue ID -> RSS CPU ID and select 2496 * that. 2497 */ 2498 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 2499 #else 2500 /* 2501 * Bind the msix vector, and thus the 2502 * rings to the corresponding cpu. 2503 * 2504 * This just happens to match the default RSS round-robin 2505 * bucket -> queue -> CPU allocation. 2506 */ 2507 if (adapter->num_queues > 1) 2508 cpu_id = i; 2509 #endif 2510 if (adapter->num_queues > 1) 2511 bus_bind_intr(dev, que->res, cpu_id); 2512 #ifdef IXGBE_DEBUG 2513 #ifdef RSS 2514 device_printf(dev, 2515 "Bound RSS bucket %d to CPU %d\n", 2516 i, cpu_id); 2517 #else 2518 device_printf(dev, 2519 "Bound queue %d to cpu %d\n", 2520 i, cpu_id); 2521 #endif 2522 #endif /* IXGBE_DEBUG */ 2523 2524 2525 #ifndef IXGBE_LEGACY_TX 2526 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2527 #endif 2528 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2529 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2530 taskqueue_thread_enqueue, &que->tq); 2531 #ifdef RSS 2532 CPU_SETOF(cpu_id, &cpu_mask); 2533 taskqueue_start_threads_cpuset(&que->tq, 1, PI_NET, 2534 &cpu_mask, 2535 "%s (bucket %d)", 2536 device_get_nameunit(adapter->dev), 2537 cpu_id); 2538 #else 2539 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s:q%d", 2540 device_get_nameunit(adapter->dev), i); 2541 #endif 2542 } 2543 2544 /* and Link */ 2545 rid = vector + 1; 2546 adapter->res = bus_alloc_resource_any(dev, 2547 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2548 if (!adapter->res) { 2549 device_printf(dev,"Unable to allocate" 2550 " bus resource: Link interrupt [%d]\n", rid); 2551 return (ENXIO); 2552 } 2553 /* Set the link handler function */ 2554 error = bus_setup_intr(dev, adapter->res, 2555 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2556 ixgbe_msix_link, adapter, &adapter->tag); 2557 if (error) { 2558 adapter->res = NULL; 2559 device_printf(dev, "Failed to register LINK handler"); 2560 return (error); 2561 } 2562 #if __FreeBSD_version >= 800504 2563 bus_describe_intr(dev, adapter->res, adapter->tag, "link"); 2564 #endif 2565 adapter->vector = vector; 2566 /* Tasklets for Link, SFP and Multispeed Fiber */ 2567 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2568 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2569 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2570 #ifdef PCI_IOV 2571 TASK_INIT(&adapter->mbx_task, 0, ixgbe_handle_mbx, adapter); 2572 #endif 2573 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2574 #ifdef IXGBE_FDIR 2575 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2576 #endif 2577 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2578 taskqueue_thread_enqueue, &adapter->tq); 2579 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2580 device_get_nameunit(adapter->dev)); 2581 2582 return (0); 2583 } 2584 2585 /* 2586 * Setup Either MSI/X or MSI 2587 */ 2588 static int 2589 ixgbe_setup_msix(struct adapter *adapter) 2590 { 2591 device_t dev = adapter->dev; 2592 int rid, want, queues, msgs; 2593 2594 /* Override by tuneable */ 2595 if (ixgbe_enable_msix == 0) 2596 goto msi; 2597 2598 /* First try MSI/X */ 2599 msgs = pci_msix_count(dev); 2600 if (msgs == 0) 2601 goto msi; 2602 rid = PCIR_BAR(MSIX_82598_BAR); 2603 adapter->msix_mem = bus_alloc_resource_any(dev, 2604 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2605 if (adapter->msix_mem == NULL) { 2606 rid += 4; /* 82599 maps in higher BAR */ 2607 adapter->msix_mem = bus_alloc_resource_any(dev, 2608 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2609 } 2610 if (adapter->msix_mem == NULL) { 2611 /* May not be enabled */ 2612 device_printf(adapter->dev, 2613 "Unable to map MSIX table \n"); 2614 goto msi; 2615 } 2616 2617 /* Figure out a reasonable auto config value */ 2618 queues = (mp_ncpus > (msgs - 1)) ? (msgs - 1) : mp_ncpus; 2619 2620 #ifdef RSS 2621 /* If we're doing RSS, clamp at the number of RSS buckets */ 2622 if (queues > rss_getnumbuckets()) 2623 queues = rss_getnumbuckets(); 2624 #endif 2625 2626 if (ixgbe_num_queues != 0) 2627 queues = ixgbe_num_queues; 2628 /* Set max queues to 8 when autoconfiguring */ 2629 else if ((ixgbe_num_queues == 0) && (queues > 8)) 2630 queues = 8; 2631 2632 /* reflect correct sysctl value */ 2633 ixgbe_num_queues = queues; 2634 2635 /* 2636 ** Want one vector (RX/TX pair) per queue 2637 ** plus an additional for Link. 2638 */ 2639 want = queues + 1; 2640 if (msgs >= want) 2641 msgs = want; 2642 else { 2643 device_printf(adapter->dev, 2644 "MSIX Configuration Problem, " 2645 "%d vectors but %d queues wanted!\n", 2646 msgs, want); 2647 goto msi; 2648 } 2649 if ((pci_alloc_msix(dev, &msgs) == 0) && (msgs == want)) { 2650 device_printf(adapter->dev, 2651 "Using MSIX interrupts with %d vectors\n", msgs); 2652 adapter->num_queues = queues; 2653 return (msgs); 2654 } 2655 /* 2656 ** If MSIX alloc failed or provided us with 2657 ** less than needed, free and fall through to MSI 2658 */ 2659 pci_release_msi(dev); 2660 2661 msi: 2662 if (adapter->msix_mem != NULL) { 2663 bus_release_resource(dev, SYS_RES_MEMORY, 2664 rid, adapter->msix_mem); 2665 adapter->msix_mem = NULL; 2666 } 2667 msgs = 1; 2668 if (pci_alloc_msi(dev, &msgs) == 0) { 2669 device_printf(adapter->dev, "Using an MSI interrupt\n"); 2670 return (msgs); 2671 } 2672 device_printf(adapter->dev, "Using a Legacy interrupt\n"); 2673 return (0); 2674 } 2675 2676 2677 static int 2678 ixgbe_allocate_pci_resources(struct adapter *adapter) 2679 { 2680 int rid; 2681 device_t dev = adapter->dev; 2682 2683 rid = PCIR_BAR(0); 2684 adapter->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2685 &rid, RF_ACTIVE); 2686 2687 if (!(adapter->pci_mem)) { 2688 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2689 return (ENXIO); 2690 } 2691 2692 /* Save bus_space values for READ/WRITE_REG macros */ 2693 adapter->osdep.mem_bus_space_tag = 2694 rman_get_bustag(adapter->pci_mem); 2695 adapter->osdep.mem_bus_space_handle = 2696 rman_get_bushandle(adapter->pci_mem); 2697 /* Set hw values for shared code */ 2698 adapter->hw.hw_addr = (u8 *) &adapter->osdep.mem_bus_space_handle; 2699 adapter->hw.back = adapter; 2700 2701 /* Default to 1 queue if MSI-X setup fails */ 2702 adapter->num_queues = 1; 2703 2704 /* 2705 ** Now setup MSI or MSI-X, should 2706 ** return us the number of supported 2707 ** vectors. (Will be 1 for MSI) 2708 */ 2709 adapter->msix = ixgbe_setup_msix(adapter); 2710 return (0); 2711 } 2712 2713 static void 2714 ixgbe_free_pci_resources(struct adapter * adapter) 2715 { 2716 struct ix_queue *que = adapter->queues; 2717 device_t dev = adapter->dev; 2718 int rid, memrid; 2719 2720 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 2721 memrid = PCIR_BAR(MSIX_82598_BAR); 2722 else 2723 memrid = PCIR_BAR(MSIX_82599_BAR); 2724 2725 /* 2726 ** There is a slight possibility of a failure mode 2727 ** in attach that will result in entering this function 2728 ** before interrupt resources have been initialized, and 2729 ** in that case we do not want to execute the loops below 2730 ** We can detect this reliably by the state of the adapter 2731 ** res pointer. 2732 */ 2733 if (adapter->res == NULL) 2734 goto mem; 2735 2736 /* 2737 ** Release all msix queue resources: 2738 */ 2739 for (int i = 0; i < adapter->num_queues; i++, que++) { 2740 rid = que->msix + 1; 2741 if (que->tag != NULL) { 2742 bus_teardown_intr(dev, que->res, que->tag); 2743 que->tag = NULL; 2744 } 2745 if (que->res != NULL) 2746 bus_release_resource(dev, SYS_RES_IRQ, rid, que->res); 2747 } 2748 2749 2750 /* Clean the Legacy or Link interrupt last */ 2751 if (adapter->vector) /* we are doing MSIX */ 2752 rid = adapter->vector + 1; 2753 else 2754 (adapter->msix != 0) ? (rid = 1):(rid = 0); 2755 2756 if (adapter->tag != NULL) { 2757 bus_teardown_intr(dev, adapter->res, adapter->tag); 2758 adapter->tag = NULL; 2759 } 2760 if (adapter->res != NULL) 2761 bus_release_resource(dev, SYS_RES_IRQ, rid, adapter->res); 2762 2763 mem: 2764 if (adapter->msix) 2765 pci_release_msi(dev); 2766 2767 if (adapter->msix_mem != NULL) 2768 bus_release_resource(dev, SYS_RES_MEMORY, 2769 memrid, adapter->msix_mem); 2770 2771 if (adapter->pci_mem != NULL) 2772 bus_release_resource(dev, SYS_RES_MEMORY, 2773 PCIR_BAR(0), adapter->pci_mem); 2774 2775 return; 2776 } 2777 2778 /********************************************************************* 2779 * 2780 * Setup networking device structure and register an interface. 2781 * 2782 **********************************************************************/ 2783 static int 2784 ixgbe_setup_interface(device_t dev, struct adapter *adapter) 2785 { 2786 struct ifnet *ifp; 2787 2788 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 2789 2790 ifp = adapter->ifp = if_alloc(IFT_ETHER); 2791 if (ifp == NULL) { 2792 device_printf(dev, "can not allocate ifnet structure\n"); 2793 return (-1); 2794 } 2795 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 2796 ifp->if_baudrate = IF_Gbps(10); 2797 ifp->if_init = ixgbe_init; 2798 ifp->if_softc = adapter; 2799 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2800 ifp->if_ioctl = ixgbe_ioctl; 2801 #if __FreeBSD_version >= 1100036 2802 if_setgetcounterfn(ifp, ixgbe_get_counter); 2803 #endif 2804 #if __FreeBSD_version >= 1100045 2805 /* TSO parameters */ 2806 ifp->if_hw_tsomax = 65518; 2807 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 2808 ifp->if_hw_tsomaxsegsize = 2048; 2809 #endif 2810 #ifndef IXGBE_LEGACY_TX 2811 ifp->if_transmit = ixgbe_mq_start; 2812 ifp->if_qflush = ixgbe_qflush; 2813 #else 2814 ifp->if_start = ixgbe_start; 2815 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2); 2816 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 2; 2817 IFQ_SET_READY(&ifp->if_snd); 2818 #endif 2819 2820 ether_ifattach(ifp, adapter->hw.mac.addr); 2821 2822 adapter->max_frame_size = 2823 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 2824 2825 /* 2826 * Tell the upper layer(s) we support long frames. 2827 */ 2828 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 2829 2830 /* Set capability flags */ 2831 ifp->if_capabilities |= IFCAP_RXCSUM 2832 | IFCAP_TXCSUM 2833 | IFCAP_RXCSUM_IPV6 2834 | IFCAP_TXCSUM_IPV6 2835 | IFCAP_TSO4 2836 | IFCAP_TSO6 2837 | IFCAP_LRO 2838 | IFCAP_VLAN_HWTAGGING 2839 | IFCAP_VLAN_HWTSO 2840 | IFCAP_VLAN_HWCSUM 2841 | IFCAP_JUMBO_MTU 2842 | IFCAP_VLAN_MTU 2843 | IFCAP_HWSTATS; 2844 2845 /* Enable the above capabilities by default */ 2846 ifp->if_capenable = ifp->if_capabilities; 2847 2848 /* 2849 ** Don't turn this on by default, if vlans are 2850 ** created on another pseudo device (eg. lagg) 2851 ** then vlan events are not passed thru, breaking 2852 ** operation, but with HW FILTER off it works. If 2853 ** using vlans directly on the ixgbe driver you can 2854 ** enable this and get full hardware tag filtering. 2855 */ 2856 ifp->if_capabilities |= IFCAP_VLAN_HWFILTER; 2857 2858 /* 2859 * Specify the media types supported by this adapter and register 2860 * callbacks to update media and link information 2861 */ 2862 ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change, 2863 ixgbe_media_status); 2864 2865 adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw); 2866 ixgbe_add_media_types(adapter); 2867 2868 /* Set autoselect media by default */ 2869 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2870 2871 return (0); 2872 } 2873 2874 static void 2875 ixgbe_add_media_types(struct adapter *adapter) 2876 { 2877 struct ixgbe_hw *hw = &adapter->hw; 2878 device_t dev = adapter->dev; 2879 int layer; 2880 2881 layer = adapter->phy_layer; 2882 2883 /* Media types with matching FreeBSD media defines */ 2884 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 2885 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_T, 0, NULL); 2886 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 2887 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); 2888 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 2889 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 0, NULL); 2890 2891 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2892 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2893 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_TWINAX, 0, NULL); 2894 2895 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 2896 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 2897 if (hw->phy.multispeed_fiber) 2898 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_LX, 0, NULL); 2899 } 2900 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2901 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2902 if (hw->phy.multispeed_fiber) 2903 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2904 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2905 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2906 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2907 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2908 2909 #ifdef IFM_ETH_XTYPE 2910 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2911 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 2912 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 2913 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 2914 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2915 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 2916 #else 2917 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 2918 device_printf(dev, "Media supported: 10GbaseKR\n"); 2919 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 2920 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2921 } 2922 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 2923 device_printf(dev, "Media supported: 10GbaseKX4\n"); 2924 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 2925 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2926 } 2927 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 2928 device_printf(dev, "Media supported: 1000baseKX\n"); 2929 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 2930 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 2931 } 2932 #endif 2933 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 2934 device_printf(dev, "Media supported: 1000baseBX\n"); 2935 2936 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 2937 ifmedia_add(&adapter->media, 2938 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 2939 ifmedia_add(&adapter->media, 2940 IFM_ETHER | IFM_1000_T, 0, NULL); 2941 } 2942 2943 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2944 } 2945 2946 static void 2947 ixgbe_config_link(struct adapter *adapter) 2948 { 2949 struct ixgbe_hw *hw = &adapter->hw; 2950 u32 autoneg, err = 0; 2951 bool sfp, negotiate; 2952 2953 sfp = ixgbe_is_sfp(hw); 2954 2955 if (sfp) { 2956 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 2957 } else { 2958 if (hw->mac.ops.check_link) 2959 err = ixgbe_check_link(hw, &adapter->link_speed, 2960 &adapter->link_up, FALSE); 2961 if (err) 2962 goto out; 2963 autoneg = hw->phy.autoneg_advertised; 2964 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 2965 err = hw->mac.ops.get_link_capabilities(hw, 2966 &autoneg, &negotiate); 2967 if (err) 2968 goto out; 2969 if (hw->mac.ops.setup_link) 2970 err = hw->mac.ops.setup_link(hw, 2971 autoneg, adapter->link_up); 2972 } 2973 out: 2974 return; 2975 } 2976 2977 2978 /********************************************************************* 2979 * 2980 * Enable transmit units. 2981 * 2982 **********************************************************************/ 2983 static void 2984 ixgbe_initialize_transmit_units(struct adapter *adapter) 2985 { 2986 struct tx_ring *txr = adapter->tx_rings; 2987 struct ixgbe_hw *hw = &adapter->hw; 2988 2989 /* Setup the Base and Length of the Tx Descriptor Ring */ 2990 for (int i = 0; i < adapter->num_queues; i++, txr++) { 2991 u64 tdba = txr->txdma.dma_paddr; 2992 u32 txctrl = 0; 2993 int j = txr->me; 2994 2995 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 2996 (tdba & 0x00000000ffffffffULL)); 2997 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 2998 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 2999 adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 3000 3001 /* Setup the HW Tx Head and Tail descriptor pointers */ 3002 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 3003 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 3004 3005 /* Cache the tail address */ 3006 txr->tail = IXGBE_TDT(j); 3007 3008 /* Disable Head Writeback */ 3009 /* 3010 * Note: for X550 series devices, these registers are actually 3011 * prefixed with TPH_ isntead of DCA_, but the addresses and 3012 * fields remain the same. 3013 */ 3014 switch (hw->mac.type) { 3015 case ixgbe_mac_82598EB: 3016 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 3017 break; 3018 default: 3019 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 3020 break; 3021 } 3022 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 3023 switch (hw->mac.type) { 3024 case ixgbe_mac_82598EB: 3025 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 3026 break; 3027 default: 3028 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 3029 break; 3030 } 3031 3032 } 3033 3034 if (hw->mac.type != ixgbe_mac_82598EB) { 3035 u32 dmatxctl, rttdcs; 3036 #ifdef PCI_IOV 3037 enum ixgbe_iov_mode mode = ixgbe_get_iov_mode(adapter); 3038 #endif 3039 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 3040 dmatxctl |= IXGBE_DMATXCTL_TE; 3041 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 3042 /* Disable arbiter to set MTQC */ 3043 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 3044 rttdcs |= IXGBE_RTTDCS_ARBDIS; 3045 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3046 #ifdef PCI_IOV 3047 IXGBE_WRITE_REG(hw, IXGBE_MTQC, ixgbe_get_mtqc(mode)); 3048 #else 3049 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB); 3050 #endif 3051 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 3052 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3053 } 3054 3055 return; 3056 } 3057 3058 static void 3059 ixgbe_initialize_rss_mapping(struct adapter *adapter) 3060 { 3061 struct ixgbe_hw *hw = &adapter->hw; 3062 u32 reta = 0, mrqc, rss_key[10]; 3063 int queue_id, table_size, index_mult; 3064 #ifdef RSS 3065 u32 rss_hash_config; 3066 #endif 3067 #ifdef PCI_IOV 3068 enum ixgbe_iov_mode mode; 3069 #endif 3070 3071 #ifdef RSS 3072 /* Fetch the configured RSS key */ 3073 rss_getkey((uint8_t *) &rss_key); 3074 #else 3075 /* set up random bits */ 3076 arc4rand(&rss_key, sizeof(rss_key), 0); 3077 #endif 3078 3079 /* Set multiplier for RETA setup and table size based on MAC */ 3080 index_mult = 0x1; 3081 table_size = 128; 3082 switch (adapter->hw.mac.type) { 3083 case ixgbe_mac_82598EB: 3084 index_mult = 0x11; 3085 break; 3086 case ixgbe_mac_X550: 3087 case ixgbe_mac_X550EM_x: 3088 table_size = 512; 3089 break; 3090 default: 3091 break; 3092 } 3093 3094 /* Set up the redirection table */ 3095 for (int i = 0, j = 0; i < table_size; i++, j++) { 3096 if (j == adapter->num_queues) j = 0; 3097 #ifdef RSS 3098 /* 3099 * Fetch the RSS bucket id for the given indirection entry. 3100 * Cap it at the number of configured buckets (which is 3101 * num_queues.) 3102 */ 3103 queue_id = rss_get_indirection_to_bucket(i); 3104 queue_id = queue_id % adapter->num_queues; 3105 #else 3106 queue_id = (j * index_mult); 3107 #endif 3108 /* 3109 * The low 8 bits are for hash value (n+0); 3110 * The next 8 bits are for hash value (n+1), etc. 3111 */ 3112 reta = reta >> 8; 3113 reta = reta | ( ((uint32_t) queue_id) << 24); 3114 if ((i & 3) == 3) { 3115 if (i < 128) 3116 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 3117 else 3118 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), reta); 3119 reta = 0; 3120 } 3121 } 3122 3123 /* Now fill our hash function seeds */ 3124 for (int i = 0; i < 10; i++) 3125 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 3126 3127 /* Perform hash on these packet types */ 3128 #ifdef RSS 3129 mrqc = IXGBE_MRQC_RSSEN; 3130 rss_hash_config = rss_gethashconfig(); 3131 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 3132 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 3133 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 3134 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 3135 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 3136 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 3137 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 3138 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3139 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 3140 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 3141 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 3142 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 3143 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 3144 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3145 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4_EX) 3146 device_printf(adapter->dev, 3147 "%s: RSS_HASHTYPE_RSS_UDP_IPV4_EX defined, " 3148 "but not supported\n", __func__); 3149 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 3150 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3151 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 3152 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 3153 #else 3154 /* 3155 * Disable UDP - IP fragments aren't currently being handled 3156 * and so we end up with a mix of 2-tuple and 4-tuple 3157 * traffic. 3158 */ 3159 mrqc = IXGBE_MRQC_RSSEN 3160 | IXGBE_MRQC_RSS_FIELD_IPV4 3161 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3162 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP 3163 | IXGBE_MRQC_RSS_FIELD_IPV6_EX 3164 | IXGBE_MRQC_RSS_FIELD_IPV6 3165 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP 3166 ; 3167 #endif /* RSS */ 3168 #ifdef PCI_IOV 3169 mode = ixgbe_get_iov_mode(adapter); 3170 mrqc |= ixgbe_get_mrqc(mode); 3171 #endif 3172 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3173 } 3174 3175 3176 /********************************************************************* 3177 * 3178 * Setup receive registers and features. 3179 * 3180 **********************************************************************/ 3181 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 3182 3183 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 3184 3185 static void 3186 ixgbe_initialize_receive_units(struct adapter *adapter) 3187 { 3188 struct rx_ring *rxr = adapter->rx_rings; 3189 struct ixgbe_hw *hw = &adapter->hw; 3190 struct ifnet *ifp = adapter->ifp; 3191 u32 bufsz, fctrl, srrctl, rxcsum; 3192 u32 hlreg; 3193 3194 /* 3195 * Make sure receives are disabled while 3196 * setting up the descriptor ring 3197 */ 3198 ixgbe_disable_rx(hw); 3199 3200 /* Enable broadcasts */ 3201 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 3202 fctrl |= IXGBE_FCTRL_BAM; 3203 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3204 fctrl |= IXGBE_FCTRL_DPF; 3205 fctrl |= IXGBE_FCTRL_PMCF; 3206 } 3207 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 3208 3209 /* Set for Jumbo Frames? */ 3210 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3211 if (ifp->if_mtu > ETHERMTU) 3212 hlreg |= IXGBE_HLREG0_JUMBOEN; 3213 else 3214 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 3215 #ifdef DEV_NETMAP 3216 /* crcstrip is conditional in netmap (in RDRXCTL too ?) */ 3217 if (ifp->if_capenable & IFCAP_NETMAP && !ix_crcstrip) 3218 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 3219 else 3220 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 3221 #endif /* DEV_NETMAP */ 3222 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 3223 3224 bufsz = (adapter->rx_mbuf_sz + 3225 BSIZEPKT_ROUNDUP) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 3226 3227 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 3228 u64 rdba = rxr->rxdma.dma_paddr; 3229 int j = rxr->me; 3230 3231 /* Setup the Base and Length of the Rx Descriptor Ring */ 3232 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 3233 (rdba & 0x00000000ffffffffULL)); 3234 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 3235 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 3236 adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 3237 3238 /* Set up the SRRCTL register */ 3239 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 3240 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 3241 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 3242 srrctl |= bufsz; 3243 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 3244 3245 /* 3246 * Set DROP_EN iff we have no flow control and >1 queue. 3247 * Note that srrctl was cleared shortly before during reset, 3248 * so we do not need to clear the bit, but do it just in case 3249 * this code is moved elsewhere. 3250 */ 3251 if (adapter->num_queues > 1 && 3252 adapter->hw.fc.requested_mode == ixgbe_fc_none) { 3253 srrctl |= IXGBE_SRRCTL_DROP_EN; 3254 } else { 3255 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 3256 } 3257 3258 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 3259 3260 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 3261 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 3262 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 3263 3264 /* Set the driver rx tail address */ 3265 rxr->tail = IXGBE_RDT(rxr->me); 3266 } 3267 3268 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 3269 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 3270 IXGBE_PSRTYPE_UDPHDR | 3271 IXGBE_PSRTYPE_IPV4HDR | 3272 IXGBE_PSRTYPE_IPV6HDR; 3273 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 3274 } 3275 3276 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 3277 3278 ixgbe_initialize_rss_mapping(adapter); 3279 3280 if (adapter->num_queues > 1) { 3281 /* RSS and RX IPP Checksum are mutually exclusive */ 3282 rxcsum |= IXGBE_RXCSUM_PCSD; 3283 } 3284 3285 if (ifp->if_capenable & IFCAP_RXCSUM) 3286 rxcsum |= IXGBE_RXCSUM_PCSD; 3287 3288 /* This is useful for calculating UDP/IP fragment checksums */ 3289 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 3290 rxcsum |= IXGBE_RXCSUM_IPPCSE; 3291 3292 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 3293 3294 return; 3295 } 3296 3297 3298 /* 3299 ** This routine is run via an vlan config EVENT, 3300 ** it enables us to use the HW Filter table since 3301 ** we can get the vlan id. This just creates the 3302 ** entry in the soft version of the VFTA, init will 3303 ** repopulate the real table. 3304 */ 3305 static void 3306 ixgbe_register_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3307 { 3308 struct adapter *adapter = ifp->if_softc; 3309 u16 index, bit; 3310 3311 if (ifp->if_softc != arg) /* Not our event */ 3312 return; 3313 3314 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3315 return; 3316 3317 IXGBE_CORE_LOCK(adapter); 3318 index = (vtag >> 5) & 0x7F; 3319 bit = vtag & 0x1F; 3320 adapter->shadow_vfta[index] |= (1 << bit); 3321 ++adapter->num_vlans; 3322 ixgbe_setup_vlan_hw_support(adapter); 3323 IXGBE_CORE_UNLOCK(adapter); 3324 } 3325 3326 /* 3327 ** This routine is run via an vlan 3328 ** unconfig EVENT, remove our entry 3329 ** in the soft vfta. 3330 */ 3331 static void 3332 ixgbe_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3333 { 3334 struct adapter *adapter = ifp->if_softc; 3335 u16 index, bit; 3336 3337 if (ifp->if_softc != arg) 3338 return; 3339 3340 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3341 return; 3342 3343 IXGBE_CORE_LOCK(adapter); 3344 index = (vtag >> 5) & 0x7F; 3345 bit = vtag & 0x1F; 3346 adapter->shadow_vfta[index] &= ~(1 << bit); 3347 --adapter->num_vlans; 3348 /* Re-init to load the changes */ 3349 ixgbe_setup_vlan_hw_support(adapter); 3350 IXGBE_CORE_UNLOCK(adapter); 3351 } 3352 3353 static void 3354 ixgbe_setup_vlan_hw_support(struct adapter *adapter) 3355 { 3356 struct ifnet *ifp = adapter->ifp; 3357 struct ixgbe_hw *hw = &adapter->hw; 3358 struct rx_ring *rxr; 3359 u32 ctrl; 3360 3361 3362 /* 3363 ** We get here thru init_locked, meaning 3364 ** a soft reset, this has already cleared 3365 ** the VFTA and other state, so if there 3366 ** have been no vlan's registered do nothing. 3367 */ 3368 if (adapter->num_vlans == 0) 3369 return; 3370 3371 /* Setup the queues for vlans */ 3372 for (int i = 0; i < adapter->num_queues; i++) { 3373 rxr = &adapter->rx_rings[i]; 3374 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 3375 if (hw->mac.type != ixgbe_mac_82598EB) { 3376 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 3377 ctrl |= IXGBE_RXDCTL_VME; 3378 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 3379 } 3380 rxr->vtag_strip = TRUE; 3381 } 3382 3383 if ((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0) 3384 return; 3385 /* 3386 ** A soft reset zero's out the VFTA, so 3387 ** we need to repopulate it now. 3388 */ 3389 for (int i = 0; i < IXGBE_VFTA_SIZE; i++) 3390 if (adapter->shadow_vfta[i] != 0) 3391 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 3392 adapter->shadow_vfta[i]); 3393 3394 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 3395 /* Enable the Filter Table if enabled */ 3396 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER) { 3397 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 3398 ctrl |= IXGBE_VLNCTRL_VFE; 3399 } 3400 if (hw->mac.type == ixgbe_mac_82598EB) 3401 ctrl |= IXGBE_VLNCTRL_VME; 3402 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 3403 } 3404 3405 static void 3406 ixgbe_enable_intr(struct adapter *adapter) 3407 { 3408 struct ixgbe_hw *hw = &adapter->hw; 3409 struct ix_queue *que = adapter->queues; 3410 u32 mask, fwsm; 3411 3412 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 3413 /* Enable Fan Failure detection */ 3414 if (hw->device_id == IXGBE_DEV_ID_82598AT) 3415 mask |= IXGBE_EIMS_GPI_SDP1; 3416 3417 switch (adapter->hw.mac.type) { 3418 case ixgbe_mac_82599EB: 3419 mask |= IXGBE_EIMS_ECC; 3420 /* Temperature sensor on some adapters */ 3421 mask |= IXGBE_EIMS_GPI_SDP0; 3422 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 3423 mask |= IXGBE_EIMS_GPI_SDP1; 3424 mask |= IXGBE_EIMS_GPI_SDP2; 3425 #ifdef IXGBE_FDIR 3426 mask |= IXGBE_EIMS_FLOW_DIR; 3427 #endif 3428 #ifdef PCI_IOV 3429 mask |= IXGBE_EIMS_MAILBOX; 3430 #endif 3431 break; 3432 case ixgbe_mac_X540: 3433 /* Detect if Thermal Sensor is enabled */ 3434 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 3435 if (fwsm & IXGBE_FWSM_TS_ENABLED) 3436 mask |= IXGBE_EIMS_TS; 3437 mask |= IXGBE_EIMS_ECC; 3438 #ifdef IXGBE_FDIR 3439 mask |= IXGBE_EIMS_FLOW_DIR; 3440 #endif 3441 break; 3442 case ixgbe_mac_X550: 3443 case ixgbe_mac_X550EM_x: 3444 /* MAC thermal sensor is automatically enabled */ 3445 mask |= IXGBE_EIMS_TS; 3446 /* Some devices use SDP0 for important information */ 3447 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 3448 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 3449 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 3450 mask |= IXGBE_EIMS_ECC; 3451 #ifdef IXGBE_FDIR 3452 mask |= IXGBE_EIMS_FLOW_DIR; 3453 #endif 3454 #ifdef PCI_IOV 3455 mask |= IXGBE_EIMS_MAILBOX; 3456 #endif 3457 /* falls through */ 3458 default: 3459 break; 3460 } 3461 3462 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3463 3464 /* With MSI-X we use auto clear */ 3465 if (adapter->msix_mem) { 3466 mask = IXGBE_EIMS_ENABLE_MASK; 3467 /* Don't autoclear Link */ 3468 mask &= ~IXGBE_EIMS_OTHER; 3469 mask &= ~IXGBE_EIMS_LSC; 3470 #ifdef PCI_IOV 3471 mask &= ~IXGBE_EIMS_MAILBOX; 3472 #endif 3473 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 3474 } 3475 3476 /* 3477 ** Now enable all queues, this is done separately to 3478 ** allow for handling the extended (beyond 32) MSIX 3479 ** vectors that can be used by 82599 3480 */ 3481 for (int i = 0; i < adapter->num_queues; i++, que++) 3482 ixgbe_enable_queue(adapter, que->msix); 3483 3484 IXGBE_WRITE_FLUSH(hw); 3485 3486 return; 3487 } 3488 3489 static void 3490 ixgbe_disable_intr(struct adapter *adapter) 3491 { 3492 if (adapter->msix_mem) 3493 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0); 3494 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3495 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); 3496 } else { 3497 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); 3498 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); 3499 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 3500 } 3501 IXGBE_WRITE_FLUSH(&adapter->hw); 3502 return; 3503 } 3504 3505 /* 3506 ** Get the width and transaction speed of 3507 ** the slot this adapter is plugged into. 3508 */ 3509 static void 3510 ixgbe_get_slot_info(struct adapter *adapter) 3511 { 3512 device_t dev = adapter->dev; 3513 struct ixgbe_hw *hw = &adapter->hw; 3514 struct ixgbe_mac_info *mac = &hw->mac; 3515 u16 link; 3516 u32 offset; 3517 3518 /* For most devices simply call the shared code routine */ 3519 if (hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) { 3520 ixgbe_get_bus_info(hw); 3521 /* These devices don't use PCI-E */ 3522 switch (hw->mac.type) { 3523 case ixgbe_mac_X550EM_x: 3524 return; 3525 default: 3526 goto display; 3527 } 3528 } 3529 3530 /* 3531 ** For the Quad port adapter we need to parse back 3532 ** up the PCI tree to find the speed of the expansion 3533 ** slot into which this adapter is plugged. A bit more work. 3534 */ 3535 dev = device_get_parent(device_get_parent(dev)); 3536 #ifdef IXGBE_DEBUG 3537 device_printf(dev, "parent pcib = %x,%x,%x\n", 3538 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3539 #endif 3540 dev = device_get_parent(device_get_parent(dev)); 3541 #ifdef IXGBE_DEBUG 3542 device_printf(dev, "slot pcib = %x,%x,%x\n", 3543 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3544 #endif 3545 /* Now get the PCI Express Capabilities offset */ 3546 pci_find_cap(dev, PCIY_EXPRESS, &offset); 3547 /* ...and read the Link Status Register */ 3548 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 3549 switch (link & IXGBE_PCI_LINK_WIDTH) { 3550 case IXGBE_PCI_LINK_WIDTH_1: 3551 hw->bus.width = ixgbe_bus_width_pcie_x1; 3552 break; 3553 case IXGBE_PCI_LINK_WIDTH_2: 3554 hw->bus.width = ixgbe_bus_width_pcie_x2; 3555 break; 3556 case IXGBE_PCI_LINK_WIDTH_4: 3557 hw->bus.width = ixgbe_bus_width_pcie_x4; 3558 break; 3559 case IXGBE_PCI_LINK_WIDTH_8: 3560 hw->bus.width = ixgbe_bus_width_pcie_x8; 3561 break; 3562 default: 3563 hw->bus.width = ixgbe_bus_width_unknown; 3564 break; 3565 } 3566 3567 switch (link & IXGBE_PCI_LINK_SPEED) { 3568 case IXGBE_PCI_LINK_SPEED_2500: 3569 hw->bus.speed = ixgbe_bus_speed_2500; 3570 break; 3571 case IXGBE_PCI_LINK_SPEED_5000: 3572 hw->bus.speed = ixgbe_bus_speed_5000; 3573 break; 3574 case IXGBE_PCI_LINK_SPEED_8000: 3575 hw->bus.speed = ixgbe_bus_speed_8000; 3576 break; 3577 default: 3578 hw->bus.speed = ixgbe_bus_speed_unknown; 3579 break; 3580 } 3581 3582 mac->ops.set_lan_id(hw); 3583 3584 display: 3585 device_printf(dev,"PCI Express Bus: Speed %s %s\n", 3586 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s": 3587 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s": 3588 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s":"Unknown"), 3589 (hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" : 3590 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" : 3591 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" : 3592 ("Unknown")); 3593 3594 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 3595 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 3596 (hw->bus.speed == ixgbe_bus_speed_2500))) { 3597 device_printf(dev, "PCI-Express bandwidth available" 3598 " for this card\n is not sufficient for" 3599 " optimal performance.\n"); 3600 device_printf(dev, "For optimal performance a x8 " 3601 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 3602 } 3603 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 3604 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 3605 (hw->bus.speed < ixgbe_bus_speed_8000))) { 3606 device_printf(dev, "PCI-Express bandwidth available" 3607 " for this card\n is not sufficient for" 3608 " optimal performance.\n"); 3609 device_printf(dev, "For optimal performance a x8 " 3610 "PCIE Gen3 slot is required.\n"); 3611 } 3612 3613 return; 3614 } 3615 3616 3617 /* 3618 ** Setup the correct IVAR register for a particular MSIX interrupt 3619 ** (yes this is all very magic and confusing :) 3620 ** - entry is the register array entry 3621 ** - vector is the MSIX vector for this queue 3622 ** - type is RX/TX/MISC 3623 */ 3624 static void 3625 ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type) 3626 { 3627 struct ixgbe_hw *hw = &adapter->hw; 3628 u32 ivar, index; 3629 3630 vector |= IXGBE_IVAR_ALLOC_VAL; 3631 3632 switch (hw->mac.type) { 3633 3634 case ixgbe_mac_82598EB: 3635 if (type == -1) 3636 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 3637 else 3638 entry += (type * 64); 3639 index = (entry >> 2) & 0x1F; 3640 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 3641 ivar &= ~(0xFF << (8 * (entry & 0x3))); 3642 ivar |= (vector << (8 * (entry & 0x3))); 3643 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar); 3644 break; 3645 3646 case ixgbe_mac_82599EB: 3647 case ixgbe_mac_X540: 3648 case ixgbe_mac_X550: 3649 case ixgbe_mac_X550EM_x: 3650 if (type == -1) { /* MISC IVAR */ 3651 index = (entry & 1) * 8; 3652 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 3653 ivar &= ~(0xFF << index); 3654 ivar |= (vector << index); 3655 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 3656 } else { /* RX/TX IVARS */ 3657 index = (16 * (entry & 1)) + (8 * type); 3658 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 3659 ivar &= ~(0xFF << index); 3660 ivar |= (vector << index); 3661 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 3662 } 3663 3664 default: 3665 break; 3666 } 3667 } 3668 3669 static void 3670 ixgbe_configure_ivars(struct adapter *adapter) 3671 { 3672 struct ix_queue *que = adapter->queues; 3673 u32 newitr; 3674 3675 if (ixgbe_max_interrupt_rate > 0) 3676 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 3677 else { 3678 /* 3679 ** Disable DMA coalescing if interrupt moderation is 3680 ** disabled. 3681 */ 3682 adapter->dmac = 0; 3683 newitr = 0; 3684 } 3685 3686 for (int i = 0; i < adapter->num_queues; i++, que++) { 3687 struct rx_ring *rxr = &adapter->rx_rings[i]; 3688 struct tx_ring *txr = &adapter->tx_rings[i]; 3689 /* First the RX queue entry */ 3690 ixgbe_set_ivar(adapter, rxr->me, que->msix, 0); 3691 /* ... and the TX */ 3692 ixgbe_set_ivar(adapter, txr->me, que->msix, 1); 3693 /* Set an Initial EITR value */ 3694 IXGBE_WRITE_REG(&adapter->hw, 3695 IXGBE_EITR(que->msix), newitr); 3696 } 3697 3698 /* For the Link interrupt */ 3699 ixgbe_set_ivar(adapter, 1, adapter->vector, -1); 3700 } 3701 3702 /* 3703 ** ixgbe_sfp_probe - called in the local timer to 3704 ** determine if a port had optics inserted. 3705 */ 3706 static bool 3707 ixgbe_sfp_probe(struct adapter *adapter) 3708 { 3709 struct ixgbe_hw *hw = &adapter->hw; 3710 device_t dev = adapter->dev; 3711 bool result = FALSE; 3712 3713 if ((hw->phy.type == ixgbe_phy_nl) && 3714 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 3715 s32 ret = hw->phy.ops.identify_sfp(hw); 3716 if (ret) 3717 goto out; 3718 ret = hw->phy.ops.reset(hw); 3719 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3720 device_printf(dev, "Unsupported SFP+ module detected!"); 3721 device_printf(dev, "Reload driver with supported module.\n"); 3722 adapter->sfp_probe = FALSE; 3723 goto out; 3724 } else 3725 device_printf(dev, "SFP+ module detected!\n"); 3726 /* We now have supported optics */ 3727 adapter->sfp_probe = FALSE; 3728 /* Set the optics type so system reports correctly */ 3729 ixgbe_setup_optics(adapter); 3730 result = TRUE; 3731 } 3732 out: 3733 return (result); 3734 } 3735 3736 /* 3737 ** Tasklet handler for MSIX Link interrupts 3738 ** - do outside interrupt since it might sleep 3739 */ 3740 static void 3741 ixgbe_handle_link(void *context, int pending) 3742 { 3743 struct adapter *adapter = context; 3744 struct ixgbe_hw *hw = &adapter->hw; 3745 3746 ixgbe_check_link(hw, 3747 &adapter->link_speed, &adapter->link_up, 0); 3748 ixgbe_update_link_status(adapter); 3749 3750 /* Re-enable link interrupts */ 3751 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 3752 } 3753 3754 /* 3755 ** Tasklet for handling SFP module interrupts 3756 */ 3757 static void 3758 ixgbe_handle_mod(void *context, int pending) 3759 { 3760 struct adapter *adapter = context; 3761 struct ixgbe_hw *hw = &adapter->hw; 3762 enum ixgbe_phy_type orig_type = hw->phy.type; 3763 device_t dev = adapter->dev; 3764 u32 err; 3765 3766 IXGBE_CORE_LOCK(adapter); 3767 3768 /* Check to see if the PHY type changed */ 3769 if (hw->phy.ops.identify) { 3770 hw->phy.type = ixgbe_phy_unknown; 3771 hw->phy.ops.identify(hw); 3772 } 3773 3774 if (hw->phy.type != orig_type) { 3775 device_printf(dev, "Detected phy_type %d\n", hw->phy.type); 3776 3777 if (hw->phy.type == ixgbe_phy_none) { 3778 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 3779 goto out; 3780 } 3781 3782 /* Try to do the initialization that was skipped before */ 3783 if (hw->phy.ops.init) 3784 hw->phy.ops.init(hw); 3785 if (hw->phy.ops.reset) 3786 hw->phy.ops.reset(hw); 3787 } 3788 3789 err = hw->phy.ops.identify_sfp(hw); 3790 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3791 device_printf(dev, 3792 "Unsupported SFP+ module type was detected.\n"); 3793 goto out; 3794 } 3795 3796 err = hw->mac.ops.setup_sfp(hw); 3797 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3798 device_printf(dev, 3799 "Setup failure - unsupported SFP+ module type.\n"); 3800 goto out; 3801 } 3802 if (hw->phy.multispeed_fiber) 3803 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 3804 out: 3805 /* Update media type */ 3806 switch (hw->mac.ops.get_media_type(hw)) { 3807 case ixgbe_media_type_fiber: 3808 adapter->optics = IFM_10G_SR; 3809 break; 3810 case ixgbe_media_type_copper: 3811 adapter->optics = IFM_10G_TWINAX; 3812 break; 3813 case ixgbe_media_type_cx4: 3814 adapter->optics = IFM_10G_CX4; 3815 break; 3816 default: 3817 adapter->optics = 0; 3818 break; 3819 } 3820 3821 IXGBE_CORE_UNLOCK(adapter); 3822 return; 3823 } 3824 3825 3826 /* 3827 ** Tasklet for handling MSF (multispeed fiber) interrupts 3828 */ 3829 static void 3830 ixgbe_handle_msf(void *context, int pending) 3831 { 3832 struct adapter *adapter = context; 3833 struct ixgbe_hw *hw = &adapter->hw; 3834 u32 autoneg; 3835 bool negotiate; 3836 3837 IXGBE_CORE_LOCK(adapter); 3838 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 3839 adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 3840 3841 autoneg = hw->phy.autoneg_advertised; 3842 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 3843 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 3844 if (hw->mac.ops.setup_link) 3845 hw->mac.ops.setup_link(hw, autoneg, TRUE); 3846 3847 /* Adjust media types shown in ifconfig */ 3848 ifmedia_removeall(&adapter->media); 3849 ixgbe_add_media_types(adapter); 3850 IXGBE_CORE_UNLOCK(adapter); 3851 return; 3852 } 3853 3854 /* 3855 ** Tasklet for handling interrupts from an external PHY 3856 */ 3857 static void 3858 ixgbe_handle_phy(void *context, int pending) 3859 { 3860 struct adapter *adapter = context; 3861 struct ixgbe_hw *hw = &adapter->hw; 3862 int error; 3863 3864 error = hw->phy.ops.handle_lasi(hw); 3865 if (error == IXGBE_ERR_OVERTEMP) 3866 device_printf(adapter->dev, 3867 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 3868 " PHY will downshift to lower power state!\n"); 3869 else if (error) 3870 device_printf(adapter->dev, 3871 "Error handling LASI interrupt: %d\n", 3872 error); 3873 return; 3874 } 3875 3876 #ifdef IXGBE_FDIR 3877 /* 3878 ** Tasklet for reinitializing the Flow Director filter table 3879 */ 3880 static void 3881 ixgbe_reinit_fdir(void *context, int pending) 3882 { 3883 struct adapter *adapter = context; 3884 struct ifnet *ifp = adapter->ifp; 3885 3886 if (adapter->fdir_reinit != 1) /* Shouldn't happen */ 3887 return; 3888 ixgbe_reinit_fdir_tables_82599(&adapter->hw); 3889 adapter->fdir_reinit = 0; 3890 /* re-enable flow director interrupts */ 3891 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 3892 /* Restart the interface */ 3893 ifp->if_drv_flags |= IFF_DRV_RUNNING; 3894 return; 3895 } 3896 #endif 3897 3898 /********************************************************************* 3899 * 3900 * Configure DMA Coalescing 3901 * 3902 **********************************************************************/ 3903 static void 3904 ixgbe_config_dmac(struct adapter *adapter) 3905 { 3906 struct ixgbe_hw *hw = &adapter->hw; 3907 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 3908 3909 if (hw->mac.type < ixgbe_mac_X550 || 3910 !hw->mac.ops.dmac_config) 3911 return; 3912 3913 if (dcfg->watchdog_timer ^ adapter->dmac || 3914 dcfg->link_speed ^ adapter->link_speed) { 3915 dcfg->watchdog_timer = adapter->dmac; 3916 dcfg->fcoe_en = false; 3917 dcfg->link_speed = adapter->link_speed; 3918 dcfg->num_tcs = 1; 3919 3920 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 3921 dcfg->watchdog_timer, dcfg->link_speed); 3922 3923 hw->mac.ops.dmac_config(hw); 3924 } 3925 } 3926 3927 /* 3928 * Checks whether the adapter's ports are capable of 3929 * Wake On LAN by reading the adapter's NVM. 3930 * 3931 * Sets each port's hw->wol_enabled value depending 3932 * on the value read here. 3933 */ 3934 static void 3935 ixgbe_check_wol_support(struct adapter *adapter) 3936 { 3937 struct ixgbe_hw *hw = &adapter->hw; 3938 u16 dev_caps = 0; 3939 3940 /* Find out WoL support for port */ 3941 adapter->wol_support = hw->wol_enabled = 0; 3942 ixgbe_get_device_caps(hw, &dev_caps); 3943 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 3944 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 3945 hw->bus.func == 0)) 3946 adapter->wol_support = hw->wol_enabled = 1; 3947 3948 /* Save initial wake up filter configuration */ 3949 adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 3950 3951 return; 3952 } 3953 3954 /* 3955 * Prepare the adapter/port for LPLU and/or WoL 3956 */ 3957 static int 3958 ixgbe_setup_low_power_mode(struct adapter *adapter) 3959 { 3960 struct ixgbe_hw *hw = &adapter->hw; 3961 device_t dev = adapter->dev; 3962 s32 error = 0; 3963 3964 mtx_assert(&adapter->core_mtx, MA_OWNED); 3965 3966 /* Limit power management flow to X550EM baseT */ 3967 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T 3968 && hw->phy.ops.enter_lplu) { 3969 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3970 IXGBE_WRITE_REG(hw, IXGBE_GRC, 3971 IXGBE_READ_REG(hw, IXGBE_GRC) & ~(u32)2); 3972 3973 /* 3974 * Clear Wake Up Status register to prevent any previous wakeup 3975 * events from waking us up immediately after we suspend. 3976 */ 3977 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3978 3979 /* 3980 * Program the Wakeup Filter Control register with user filter 3981 * settings 3982 */ 3983 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc); 3984 3985 /* Enable wakeups and power management in Wakeup Control */ 3986 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3987 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3988 3989 /* X550EM baseT adapters need a special LPLU flow */ 3990 hw->phy.reset_disable = true; 3991 ixgbe_stop(adapter); 3992 error = hw->phy.ops.enter_lplu(hw); 3993 if (error) 3994 device_printf(dev, 3995 "Error entering LPLU: %d\n", error); 3996 hw->phy.reset_disable = false; 3997 } else { 3998 /* Just stop for other adapters */ 3999 ixgbe_stop(adapter); 4000 } 4001 4002 return error; 4003 } 4004 4005 /********************************************************************** 4006 * 4007 * Update the board statistics counters. 4008 * 4009 **********************************************************************/ 4010 static void 4011 ixgbe_update_stats_counters(struct adapter *adapter) 4012 { 4013 struct ixgbe_hw *hw = &adapter->hw; 4014 u32 missed_rx = 0, bprc, lxon, lxoff, total; 4015 u64 total_missed_rx = 0; 4016 4017 adapter->stats.pf.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 4018 adapter->stats.pf.illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 4019 adapter->stats.pf.errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 4020 adapter->stats.pf.mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 4021 4022 for (int i = 0; i < 16; i++) { 4023 adapter->stats.pf.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 4024 adapter->stats.pf.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 4025 adapter->stats.pf.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 4026 } 4027 adapter->stats.pf.mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 4028 adapter->stats.pf.mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 4029 adapter->stats.pf.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 4030 4031 /* Hardware workaround, gprc counts missed packets */ 4032 adapter->stats.pf.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 4033 adapter->stats.pf.gprc -= missed_rx; 4034 4035 if (hw->mac.type != ixgbe_mac_82598EB) { 4036 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 4037 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 4038 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 4039 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 4040 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 4041 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 4042 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 4043 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 4044 } else { 4045 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 4046 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 4047 /* 82598 only has a counter in the high register */ 4048 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 4049 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 4050 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORH); 4051 } 4052 4053 /* 4054 * Workaround: mprc hardware is incorrectly counting 4055 * broadcasts, so for now we subtract those. 4056 */ 4057 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 4058 adapter->stats.pf.bprc += bprc; 4059 adapter->stats.pf.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 4060 if (hw->mac.type == ixgbe_mac_82598EB) 4061 adapter->stats.pf.mprc -= bprc; 4062 4063 adapter->stats.pf.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 4064 adapter->stats.pf.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 4065 adapter->stats.pf.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 4066 adapter->stats.pf.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 4067 adapter->stats.pf.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 4068 adapter->stats.pf.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 4069 4070 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 4071 adapter->stats.pf.lxontxc += lxon; 4072 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 4073 adapter->stats.pf.lxofftxc += lxoff; 4074 total = lxon + lxoff; 4075 4076 adapter->stats.pf.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 4077 adapter->stats.pf.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 4078 adapter->stats.pf.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 4079 adapter->stats.pf.gptc -= total; 4080 adapter->stats.pf.mptc -= total; 4081 adapter->stats.pf.ptc64 -= total; 4082 adapter->stats.pf.gotc -= total * ETHER_MIN_LEN; 4083 4084 adapter->stats.pf.ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 4085 adapter->stats.pf.rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 4086 adapter->stats.pf.roc += IXGBE_READ_REG(hw, IXGBE_ROC); 4087 adapter->stats.pf.rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 4088 adapter->stats.pf.mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 4089 adapter->stats.pf.mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 4090 adapter->stats.pf.mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 4091 adapter->stats.pf.tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 4092 adapter->stats.pf.tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 4093 adapter->stats.pf.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 4094 adapter->stats.pf.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 4095 adapter->stats.pf.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 4096 adapter->stats.pf.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 4097 adapter->stats.pf.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 4098 adapter->stats.pf.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 4099 adapter->stats.pf.xec += IXGBE_READ_REG(hw, IXGBE_XEC); 4100 adapter->stats.pf.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 4101 adapter->stats.pf.fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 4102 /* Only read FCOE on 82599 */ 4103 if (hw->mac.type != ixgbe_mac_82598EB) { 4104 adapter->stats.pf.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 4105 adapter->stats.pf.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 4106 adapter->stats.pf.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 4107 adapter->stats.pf.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 4108 adapter->stats.pf.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 4109 } 4110 4111 /* Fill out the OS statistics structure */ 4112 IXGBE_SET_IPACKETS(adapter, adapter->stats.pf.gprc); 4113 IXGBE_SET_OPACKETS(adapter, adapter->stats.pf.gptc); 4114 IXGBE_SET_IBYTES(adapter, adapter->stats.pf.gorc); 4115 IXGBE_SET_OBYTES(adapter, adapter->stats.pf.gotc); 4116 IXGBE_SET_IMCASTS(adapter, adapter->stats.pf.mprc); 4117 IXGBE_SET_OMCASTS(adapter, adapter->stats.pf.mptc); 4118 IXGBE_SET_COLLISIONS(adapter, 0); 4119 IXGBE_SET_IQDROPS(adapter, total_missed_rx); 4120 IXGBE_SET_IERRORS(adapter, adapter->stats.pf.crcerrs 4121 + adapter->stats.pf.rlec); 4122 } 4123 4124 #if __FreeBSD_version >= 1100036 4125 static uint64_t 4126 ixgbe_get_counter(struct ifnet *ifp, ift_counter cnt) 4127 { 4128 struct adapter *adapter; 4129 struct tx_ring *txr; 4130 uint64_t rv; 4131 4132 adapter = if_getsoftc(ifp); 4133 4134 switch (cnt) { 4135 case IFCOUNTER_IPACKETS: 4136 return (adapter->ipackets); 4137 case IFCOUNTER_OPACKETS: 4138 return (adapter->opackets); 4139 case IFCOUNTER_IBYTES: 4140 return (adapter->ibytes); 4141 case IFCOUNTER_OBYTES: 4142 return (adapter->obytes); 4143 case IFCOUNTER_IMCASTS: 4144 return (adapter->imcasts); 4145 case IFCOUNTER_OMCASTS: 4146 return (adapter->omcasts); 4147 case IFCOUNTER_COLLISIONS: 4148 return (0); 4149 case IFCOUNTER_IQDROPS: 4150 return (adapter->iqdrops); 4151 case IFCOUNTER_OQDROPS: 4152 rv = 0; 4153 txr = adapter->tx_rings; 4154 for (int i = 0; i < adapter->num_queues; i++, txr++) 4155 rv += txr->br->br_drops; 4156 return (rv); 4157 case IFCOUNTER_IERRORS: 4158 return (adapter->ierrors); 4159 default: 4160 return (if_get_counter_default(ifp, cnt)); 4161 } 4162 } 4163 #endif 4164 4165 /** ixgbe_sysctl_tdh_handler - Handler function 4166 * Retrieves the TDH value from the hardware 4167 */ 4168 static int 4169 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 4170 { 4171 int error; 4172 4173 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4174 if (!txr) return 0; 4175 4176 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDH(txr->me)); 4177 error = sysctl_handle_int(oidp, &val, 0, req); 4178 if (error || !req->newptr) 4179 return error; 4180 return 0; 4181 } 4182 4183 /** ixgbe_sysctl_tdt_handler - Handler function 4184 * Retrieves the TDT value from the hardware 4185 */ 4186 static int 4187 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 4188 { 4189 int error; 4190 4191 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4192 if (!txr) return 0; 4193 4194 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDT(txr->me)); 4195 error = sysctl_handle_int(oidp, &val, 0, req); 4196 if (error || !req->newptr) 4197 return error; 4198 return 0; 4199 } 4200 4201 /** ixgbe_sysctl_rdh_handler - Handler function 4202 * Retrieves the RDH value from the hardware 4203 */ 4204 static int 4205 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 4206 { 4207 int error; 4208 4209 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4210 if (!rxr) return 0; 4211 4212 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDH(rxr->me)); 4213 error = sysctl_handle_int(oidp, &val, 0, req); 4214 if (error || !req->newptr) 4215 return error; 4216 return 0; 4217 } 4218 4219 /** ixgbe_sysctl_rdt_handler - Handler function 4220 * Retrieves the RDT value from the hardware 4221 */ 4222 static int 4223 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 4224 { 4225 int error; 4226 4227 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4228 if (!rxr) return 0; 4229 4230 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDT(rxr->me)); 4231 error = sysctl_handle_int(oidp, &val, 0, req); 4232 if (error || !req->newptr) 4233 return error; 4234 return 0; 4235 } 4236 4237 static int 4238 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 4239 { 4240 int error; 4241 struct ix_queue *que = ((struct ix_queue *)oidp->oid_arg1); 4242 unsigned int reg, usec, rate; 4243 4244 reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_EITR(que->msix)); 4245 usec = ((reg & 0x0FF8) >> 3); 4246 if (usec > 0) 4247 rate = 500000 / usec; 4248 else 4249 rate = 0; 4250 error = sysctl_handle_int(oidp, &rate, 0, req); 4251 if (error || !req->newptr) 4252 return error; 4253 reg &= ~0xfff; /* default, no limitation */ 4254 ixgbe_max_interrupt_rate = 0; 4255 if (rate > 0 && rate < 500000) { 4256 if (rate < 1000) 4257 rate = 1000; 4258 ixgbe_max_interrupt_rate = rate; 4259 reg |= ((4000000/rate) & 0xff8 ); 4260 } 4261 IXGBE_WRITE_REG(&que->adapter->hw, IXGBE_EITR(que->msix), reg); 4262 return 0; 4263 } 4264 4265 static void 4266 ixgbe_add_device_sysctls(struct adapter *adapter) 4267 { 4268 device_t dev = adapter->dev; 4269 struct ixgbe_hw *hw = &adapter->hw; 4270 struct sysctl_oid_list *child; 4271 struct sysctl_ctx_list *ctx; 4272 4273 ctx = device_get_sysctl_ctx(dev); 4274 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 4275 4276 /* Sysctls for all devices */ 4277 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "fc", 4278 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4279 ixgbe_set_flowcntl, "I", IXGBE_SYSCTL_DESC_SET_FC); 4280 4281 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "enable_aim", 4282 CTLFLAG_RW, 4283 &ixgbe_enable_aim, 1, "Interrupt Moderation"); 4284 4285 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "advertise_speed", 4286 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4287 ixgbe_set_advertise, "I", IXGBE_SYSCTL_DESC_ADV_SPEED); 4288 4289 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "thermal_test", 4290 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4291 ixgbe_sysctl_thermal_test, "I", "Thermal Test"); 4292 4293 #ifdef IXGBE_DEBUG 4294 /* testing sysctls (for all devices) */ 4295 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "power_state", 4296 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4297 ixgbe_sysctl_power_state, "I", "PCI Power State"); 4298 4299 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "print_rss_config", 4300 CTLTYPE_STRING | CTLFLAG_RD, adapter, 0, 4301 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 4302 #endif 4303 /* for X550 series devices */ 4304 if (hw->mac.type >= ixgbe_mac_X550) 4305 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "dmac", 4306 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4307 ixgbe_sysctl_dmac, "I", "DMA Coalesce"); 4308 4309 /* for X552 backplane devices */ 4310 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) { 4311 struct sysctl_oid *eee_node; 4312 struct sysctl_oid_list *eee_list; 4313 4314 eee_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "eee", 4315 CTLFLAG_RD, NULL, 4316 "Energy Efficient Ethernet sysctls"); 4317 eee_list = SYSCTL_CHILDREN(eee_node); 4318 4319 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "enable", 4320 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4321 ixgbe_sysctl_eee_enable, "I", 4322 "Enable or Disable EEE"); 4323 4324 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "negotiated", 4325 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4326 ixgbe_sysctl_eee_negotiated, "I", 4327 "EEE negotiated on link"); 4328 4329 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_status", 4330 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4331 ixgbe_sysctl_eee_tx_lpi_status, "I", 4332 "Whether or not TX link is in LPI state"); 4333 4334 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "rx_lpi_status", 4335 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4336 ixgbe_sysctl_eee_rx_lpi_status, "I", 4337 "Whether or not RX link is in LPI state"); 4338 4339 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_delay", 4340 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4341 ixgbe_sysctl_eee_tx_lpi_delay, "I", 4342 "TX LPI entry delay in microseconds"); 4343 } 4344 4345 /* for WoL-capable devices */ 4346 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4347 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wol_enable", 4348 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4349 ixgbe_sysctl_wol_enable, "I", 4350 "Enable/Disable Wake on LAN"); 4351 4352 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wufc", 4353 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4354 ixgbe_sysctl_wufc, "I", 4355 "Enable/Disable Wake Up Filters"); 4356 } 4357 4358 /* for X552/X557-AT devices */ 4359 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4360 struct sysctl_oid *phy_node; 4361 struct sysctl_oid_list *phy_list; 4362 4363 phy_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "phy", 4364 CTLFLAG_RD, NULL, 4365 "External PHY sysctls"); 4366 phy_list = SYSCTL_CHILDREN(phy_node); 4367 4368 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "temp", 4369 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4370 ixgbe_sysctl_phy_temp, "I", 4371 "Current External PHY Temperature (Celsius)"); 4372 4373 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "overtemp_occurred", 4374 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4375 ixgbe_sysctl_phy_overtemp_occurred, "I", 4376 "External PHY High Temperature Event Occurred"); 4377 } 4378 } 4379 4380 /* 4381 * Add sysctl variables, one per statistic, to the system. 4382 */ 4383 static void 4384 ixgbe_add_hw_stats(struct adapter *adapter) 4385 { 4386 device_t dev = adapter->dev; 4387 4388 struct tx_ring *txr = adapter->tx_rings; 4389 struct rx_ring *rxr = adapter->rx_rings; 4390 4391 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 4392 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 4393 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 4394 struct ixgbe_hw_stats *stats = &adapter->stats.pf; 4395 4396 struct sysctl_oid *stat_node, *queue_node; 4397 struct sysctl_oid_list *stat_list, *queue_list; 4398 4399 #define QUEUE_NAME_LEN 32 4400 char namebuf[QUEUE_NAME_LEN]; 4401 4402 /* Driver Statistics */ 4403 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 4404 CTLFLAG_RD, &adapter->dropped_pkts, 4405 "Driver dropped packets"); 4406 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "mbuf_defrag_failed", 4407 CTLFLAG_RD, &adapter->mbuf_defrag_failed, 4408 "m_defrag() failed"); 4409 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events", 4410 CTLFLAG_RD, &adapter->watchdog_events, 4411 "Watchdog timeouts"); 4412 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 4413 CTLFLAG_RD, &adapter->link_irq, 4414 "Link MSIX IRQ Handled"); 4415 4416 for (int i = 0; i < adapter->num_queues; i++, txr++) { 4417 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4418 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4419 CTLFLAG_RD, NULL, "Queue Name"); 4420 queue_list = SYSCTL_CHILDREN(queue_node); 4421 4422 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 4423 CTLTYPE_UINT | CTLFLAG_RW, &adapter->queues[i], 4424 sizeof(&adapter->queues[i]), 4425 ixgbe_sysctl_interrupt_rate_handler, "IU", 4426 "Interrupt Rate"); 4427 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 4428 CTLFLAG_RD, &(adapter->queues[i].irqs), 4429 "irqs on this queue"); 4430 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 4431 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4432 ixgbe_sysctl_tdh_handler, "IU", 4433 "Transmit Descriptor Head"); 4434 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 4435 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4436 ixgbe_sysctl_tdt_handler, "IU", 4437 "Transmit Descriptor Tail"); 4438 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "tso_tx", 4439 CTLFLAG_RD, &txr->tso_tx, 4440 "TSO"); 4441 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "no_tx_dma_setup", 4442 CTLFLAG_RD, &txr->no_tx_dma_setup, 4443 "Driver tx dma failure in xmit"); 4444 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "no_desc_avail", 4445 CTLFLAG_RD, &txr->no_desc_avail, 4446 "Queue No Descriptor Available"); 4447 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 4448 CTLFLAG_RD, &txr->total_packets, 4449 "Queue Packets Transmitted"); 4450 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "br_drops", 4451 CTLFLAG_RD, &txr->br->br_drops, 4452 "Packets dropped in buf_ring"); 4453 } 4454 4455 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 4456 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4457 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4458 CTLFLAG_RD, NULL, "Queue Name"); 4459 queue_list = SYSCTL_CHILDREN(queue_node); 4460 4461 struct lro_ctrl *lro = &rxr->lro; 4462 4463 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4464 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4465 CTLFLAG_RD, NULL, "Queue Name"); 4466 queue_list = SYSCTL_CHILDREN(queue_node); 4467 4468 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 4469 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4470 ixgbe_sysctl_rdh_handler, "IU", 4471 "Receive Descriptor Head"); 4472 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 4473 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4474 ixgbe_sysctl_rdt_handler, "IU", 4475 "Receive Descriptor Tail"); 4476 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 4477 CTLFLAG_RD, &rxr->rx_packets, 4478 "Queue Packets Received"); 4479 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 4480 CTLFLAG_RD, &rxr->rx_bytes, 4481 "Queue Bytes Received"); 4482 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 4483 CTLFLAG_RD, &rxr->rx_copies, 4484 "Copied RX Frames"); 4485 SYSCTL_ADD_U64(ctx, queue_list, OID_AUTO, "lro_queued", 4486 CTLFLAG_RD, &lro->lro_queued, 0, 4487 "LRO Queued"); 4488 SYSCTL_ADD_U64(ctx, queue_list, OID_AUTO, "lro_flushed", 4489 CTLFLAG_RD, &lro->lro_flushed, 0, 4490 "LRO Flushed"); 4491 } 4492 4493 /* MAC stats get the own sub node */ 4494 4495 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 4496 CTLFLAG_RD, NULL, "MAC Statistics"); 4497 stat_list = SYSCTL_CHILDREN(stat_node); 4498 4499 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 4500 CTLFLAG_RD, &stats->crcerrs, 4501 "CRC Errors"); 4502 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 4503 CTLFLAG_RD, &stats->illerrc, 4504 "Illegal Byte Errors"); 4505 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 4506 CTLFLAG_RD, &stats->errbc, 4507 "Byte Errors"); 4508 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 4509 CTLFLAG_RD, &stats->mspdc, 4510 "MAC Short Packets Discarded"); 4511 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 4512 CTLFLAG_RD, &stats->mlfc, 4513 "MAC Local Faults"); 4514 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 4515 CTLFLAG_RD, &stats->mrfc, 4516 "MAC Remote Faults"); 4517 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 4518 CTLFLAG_RD, &stats->rlec, 4519 "Receive Length Errors"); 4520 4521 /* Flow Control stats */ 4522 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 4523 CTLFLAG_RD, &stats->lxontxc, 4524 "Link XON Transmitted"); 4525 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 4526 CTLFLAG_RD, &stats->lxonrxc, 4527 "Link XON Received"); 4528 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 4529 CTLFLAG_RD, &stats->lxofftxc, 4530 "Link XOFF Transmitted"); 4531 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 4532 CTLFLAG_RD, &stats->lxoffrxc, 4533 "Link XOFF Received"); 4534 4535 /* Packet Reception Stats */ 4536 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 4537 CTLFLAG_RD, &stats->tor, 4538 "Total Octets Received"); 4539 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 4540 CTLFLAG_RD, &stats->gorc, 4541 "Good Octets Received"); 4542 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 4543 CTLFLAG_RD, &stats->tpr, 4544 "Total Packets Received"); 4545 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 4546 CTLFLAG_RD, &stats->gprc, 4547 "Good Packets Received"); 4548 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 4549 CTLFLAG_RD, &stats->mprc, 4550 "Multicast Packets Received"); 4551 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 4552 CTLFLAG_RD, &stats->bprc, 4553 "Broadcast Packets Received"); 4554 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 4555 CTLFLAG_RD, &stats->prc64, 4556 "64 byte frames received "); 4557 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 4558 CTLFLAG_RD, &stats->prc127, 4559 "65-127 byte frames received"); 4560 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 4561 CTLFLAG_RD, &stats->prc255, 4562 "128-255 byte frames received"); 4563 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 4564 CTLFLAG_RD, &stats->prc511, 4565 "256-511 byte frames received"); 4566 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 4567 CTLFLAG_RD, &stats->prc1023, 4568 "512-1023 byte frames received"); 4569 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 4570 CTLFLAG_RD, &stats->prc1522, 4571 "1023-1522 byte frames received"); 4572 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 4573 CTLFLAG_RD, &stats->ruc, 4574 "Receive Undersized"); 4575 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 4576 CTLFLAG_RD, &stats->rfc, 4577 "Fragmented Packets Received "); 4578 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 4579 CTLFLAG_RD, &stats->roc, 4580 "Oversized Packets Received"); 4581 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 4582 CTLFLAG_RD, &stats->rjc, 4583 "Received Jabber"); 4584 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 4585 CTLFLAG_RD, &stats->mngprc, 4586 "Management Packets Received"); 4587 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 4588 CTLFLAG_RD, &stats->mngptc, 4589 "Management Packets Dropped"); 4590 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 4591 CTLFLAG_RD, &stats->xec, 4592 "Checksum Errors"); 4593 4594 /* Packet Transmission Stats */ 4595 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 4596 CTLFLAG_RD, &stats->gotc, 4597 "Good Octets Transmitted"); 4598 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 4599 CTLFLAG_RD, &stats->tpt, 4600 "Total Packets Transmitted"); 4601 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 4602 CTLFLAG_RD, &stats->gptc, 4603 "Good Packets Transmitted"); 4604 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 4605 CTLFLAG_RD, &stats->bptc, 4606 "Broadcast Packets Transmitted"); 4607 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 4608 CTLFLAG_RD, &stats->mptc, 4609 "Multicast Packets Transmitted"); 4610 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 4611 CTLFLAG_RD, &stats->mngptc, 4612 "Management Packets Transmitted"); 4613 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 4614 CTLFLAG_RD, &stats->ptc64, 4615 "64 byte frames transmitted "); 4616 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 4617 CTLFLAG_RD, &stats->ptc127, 4618 "65-127 byte frames transmitted"); 4619 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 4620 CTLFLAG_RD, &stats->ptc255, 4621 "128-255 byte frames transmitted"); 4622 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 4623 CTLFLAG_RD, &stats->ptc511, 4624 "256-511 byte frames transmitted"); 4625 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 4626 CTLFLAG_RD, &stats->ptc1023, 4627 "512-1023 byte frames transmitted"); 4628 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 4629 CTLFLAG_RD, &stats->ptc1522, 4630 "1024-1522 byte frames transmitted"); 4631 } 4632 4633 static void 4634 ixgbe_set_sysctl_value(struct adapter *adapter, const char *name, 4635 const char *description, int *limit, int value) 4636 { 4637 *limit = value; 4638 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), 4639 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 4640 OID_AUTO, name, CTLFLAG_RW, limit, value, description); 4641 } 4642 4643 /* 4644 ** Set flow control using sysctl: 4645 ** Flow control values: 4646 ** 0 - off 4647 ** 1 - rx pause 4648 ** 2 - tx pause 4649 ** 3 - full 4650 */ 4651 static int 4652 ixgbe_set_flowcntl(SYSCTL_HANDLER_ARGS) 4653 { 4654 int error, last; 4655 struct adapter *adapter = (struct adapter *) arg1; 4656 4657 last = adapter->fc; 4658 error = sysctl_handle_int(oidp, &adapter->fc, 0, req); 4659 if ((error) || (req->newptr == NULL)) 4660 return (error); 4661 4662 /* Don't bother if it's not changed */ 4663 if (adapter->fc == last) 4664 return (0); 4665 4666 switch (adapter->fc) { 4667 case ixgbe_fc_rx_pause: 4668 case ixgbe_fc_tx_pause: 4669 case ixgbe_fc_full: 4670 adapter->hw.fc.requested_mode = adapter->fc; 4671 if (adapter->num_queues > 1) 4672 ixgbe_disable_rx_drop(adapter); 4673 break; 4674 case ixgbe_fc_none: 4675 adapter->hw.fc.requested_mode = ixgbe_fc_none; 4676 if (adapter->num_queues > 1) 4677 ixgbe_enable_rx_drop(adapter); 4678 break; 4679 default: 4680 adapter->fc = last; 4681 return (EINVAL); 4682 } 4683 /* Don't autoneg if forcing a value */ 4684 adapter->hw.fc.disable_fc_autoneg = TRUE; 4685 ixgbe_fc_enable(&adapter->hw); 4686 return error; 4687 } 4688 4689 /* 4690 ** Control advertised link speed: 4691 ** Flags: 4692 ** 0x1 - advertise 100 Mb 4693 ** 0x2 - advertise 1G 4694 ** 0x4 - advertise 10G 4695 */ 4696 static int 4697 ixgbe_set_advertise(SYSCTL_HANDLER_ARGS) 4698 { 4699 int error = 0, requested; 4700 struct adapter *adapter; 4701 device_t dev; 4702 struct ixgbe_hw *hw; 4703 ixgbe_link_speed speed = 0; 4704 4705 adapter = (struct adapter *) arg1; 4706 dev = adapter->dev; 4707 hw = &adapter->hw; 4708 4709 requested = adapter->advertise; 4710 error = sysctl_handle_int(oidp, &requested, 0, req); 4711 if ((error) || (req->newptr == NULL)) 4712 return (error); 4713 4714 /* No speed changes for backplane media */ 4715 if (hw->phy.media_type == ixgbe_media_type_backplane) 4716 return (ENODEV); 4717 4718 /* Checks to validate new value */ 4719 if (adapter->advertise == requested) /* no change */ 4720 return (0); 4721 4722 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 4723 (hw->phy.multispeed_fiber))) { 4724 device_printf(dev, 4725 "Advertised speed can only be set on copper or " 4726 "multispeed fiber media types.\n"); 4727 return (EINVAL); 4728 } 4729 4730 if (requested < 0x1 || requested > 0x7) { 4731 device_printf(dev, 4732 "Invalid advertised speed; valid modes are 0x1 through 0x7\n"); 4733 return (EINVAL); 4734 } 4735 4736 if ((requested & 0x1) 4737 && (hw->mac.type != ixgbe_mac_X540) 4738 && (hw->mac.type != ixgbe_mac_X550)) { 4739 device_printf(dev, "Set Advertise: 100Mb on X540/X550 only\n"); 4740 return (EINVAL); 4741 } 4742 4743 /* Set new value and report new advertised mode */ 4744 if (requested & 0x1) 4745 speed |= IXGBE_LINK_SPEED_100_FULL; 4746 if (requested & 0x2) 4747 speed |= IXGBE_LINK_SPEED_1GB_FULL; 4748 if (requested & 0x4) 4749 speed |= IXGBE_LINK_SPEED_10GB_FULL; 4750 4751 hw->mac.autotry_restart = TRUE; 4752 hw->mac.ops.setup_link(hw, speed, TRUE); 4753 adapter->advertise = requested; 4754 4755 return (error); 4756 } 4757 4758 /* 4759 * The following two sysctls are for X552/X557-AT devices; 4760 * they deal with the external PHY used in them. 4761 */ 4762 static int 4763 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 4764 { 4765 struct adapter *adapter = (struct adapter *) arg1; 4766 struct ixgbe_hw *hw = &adapter->hw; 4767 u16 reg; 4768 4769 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4770 device_printf(adapter->dev, 4771 "Device has no supported external thermal sensor.\n"); 4772 return (ENODEV); 4773 } 4774 4775 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 4776 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4777 ®)) { 4778 device_printf(adapter->dev, 4779 "Error reading from PHY's current temperature register\n"); 4780 return (EAGAIN); 4781 } 4782 4783 /* Shift temp for output */ 4784 reg = reg >> 8; 4785 4786 return (sysctl_handle_int(oidp, NULL, reg, req)); 4787 } 4788 4789 /* 4790 * Reports whether the current PHY temperature is over 4791 * the overtemp threshold. 4792 * - This is reported directly from the PHY 4793 */ 4794 static int 4795 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 4796 { 4797 struct adapter *adapter = (struct adapter *) arg1; 4798 struct ixgbe_hw *hw = &adapter->hw; 4799 u16 reg; 4800 4801 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4802 device_printf(adapter->dev, 4803 "Device has no supported external thermal sensor.\n"); 4804 return (ENODEV); 4805 } 4806 4807 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 4808 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4809 ®)) { 4810 device_printf(adapter->dev, 4811 "Error reading from PHY's temperature status register\n"); 4812 return (EAGAIN); 4813 } 4814 4815 /* Get occurrence bit */ 4816 reg = !!(reg & 0x4000); 4817 return (sysctl_handle_int(oidp, 0, reg, req)); 4818 } 4819 4820 /* 4821 ** Thermal Shutdown Trigger (internal MAC) 4822 ** - Set this to 1 to cause an overtemp event to occur 4823 */ 4824 static int 4825 ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS) 4826 { 4827 struct adapter *adapter = (struct adapter *) arg1; 4828 struct ixgbe_hw *hw = &adapter->hw; 4829 int error, fire = 0; 4830 4831 error = sysctl_handle_int(oidp, &fire, 0, req); 4832 if ((error) || (req->newptr == NULL)) 4833 return (error); 4834 4835 if (fire) { 4836 u32 reg = IXGBE_READ_REG(hw, IXGBE_EICS); 4837 reg |= IXGBE_EICR_TS; 4838 IXGBE_WRITE_REG(hw, IXGBE_EICS, reg); 4839 } 4840 4841 return (0); 4842 } 4843 4844 /* 4845 ** Manage DMA Coalescing. 4846 ** Control values: 4847 ** 0/1 - off / on (use default value of 1000) 4848 ** 4849 ** Legal timer values are: 4850 ** 50,100,250,500,1000,2000,5000,10000 4851 ** 4852 ** Turning off interrupt moderation will also turn this off. 4853 */ 4854 static int 4855 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 4856 { 4857 struct adapter *adapter = (struct adapter *) arg1; 4858 struct ifnet *ifp = adapter->ifp; 4859 int error; 4860 u32 newval; 4861 4862 newval = adapter->dmac; 4863 error = sysctl_handle_int(oidp, &newval, 0, req); 4864 if ((error) || (req->newptr == NULL)) 4865 return (error); 4866 4867 switch (newval) { 4868 case 0: 4869 /* Disabled */ 4870 adapter->dmac = 0; 4871 break; 4872 case 1: 4873 /* Enable and use default */ 4874 adapter->dmac = 1000; 4875 break; 4876 case 50: 4877 case 100: 4878 case 250: 4879 case 500: 4880 case 1000: 4881 case 2000: 4882 case 5000: 4883 case 10000: 4884 /* Legal values - allow */ 4885 adapter->dmac = newval; 4886 break; 4887 default: 4888 /* Do nothing, illegal value */ 4889 return (EINVAL); 4890 } 4891 4892 /* Re-initialize hardware if it's already running */ 4893 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 4894 ixgbe_init(adapter); 4895 4896 return (0); 4897 } 4898 4899 #ifdef IXGBE_DEBUG 4900 /** 4901 * Sysctl to test power states 4902 * Values: 4903 * 0 - set device to D0 4904 * 3 - set device to D3 4905 * (none) - get current device power state 4906 */ 4907 static int 4908 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 4909 { 4910 struct adapter *adapter = (struct adapter *) arg1; 4911 device_t dev = adapter->dev; 4912 int curr_ps, new_ps, error = 0; 4913 4914 curr_ps = new_ps = pci_get_powerstate(dev); 4915 4916 error = sysctl_handle_int(oidp, &new_ps, 0, req); 4917 if ((error) || (req->newptr == NULL)) 4918 return (error); 4919 4920 if (new_ps == curr_ps) 4921 return (0); 4922 4923 if (new_ps == 3 && curr_ps == 0) 4924 error = DEVICE_SUSPEND(dev); 4925 else if (new_ps == 0 && curr_ps == 3) 4926 error = DEVICE_RESUME(dev); 4927 else 4928 return (EINVAL); 4929 4930 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 4931 4932 return (error); 4933 } 4934 #endif 4935 /* 4936 * Sysctl to enable/disable the WoL capability, if supported by the adapter. 4937 * Values: 4938 * 0 - disabled 4939 * 1 - enabled 4940 */ 4941 static int 4942 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 4943 { 4944 struct adapter *adapter = (struct adapter *) arg1; 4945 struct ixgbe_hw *hw = &adapter->hw; 4946 int new_wol_enabled; 4947 int error = 0; 4948 4949 new_wol_enabled = hw->wol_enabled; 4950 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 4951 if ((error) || (req->newptr == NULL)) 4952 return (error); 4953 new_wol_enabled = !!(new_wol_enabled); 4954 if (new_wol_enabled == hw->wol_enabled) 4955 return (0); 4956 4957 if (new_wol_enabled > 0 && !adapter->wol_support) 4958 return (ENODEV); 4959 else 4960 hw->wol_enabled = new_wol_enabled; 4961 4962 return (0); 4963 } 4964 4965 /* 4966 * Sysctl to enable/disable the Energy Efficient Ethernet capability, 4967 * if supported by the adapter. 4968 * Values: 4969 * 0 - disabled 4970 * 1 - enabled 4971 */ 4972 static int 4973 ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS) 4974 { 4975 struct adapter *adapter = (struct adapter *) arg1; 4976 struct ixgbe_hw *hw = &adapter->hw; 4977 struct ifnet *ifp = adapter->ifp; 4978 int new_eee_enabled, error = 0; 4979 4980 new_eee_enabled = adapter->eee_enabled; 4981 error = sysctl_handle_int(oidp, &new_eee_enabled, 0, req); 4982 if ((error) || (req->newptr == NULL)) 4983 return (error); 4984 new_eee_enabled = !!(new_eee_enabled); 4985 if (new_eee_enabled == adapter->eee_enabled) 4986 return (0); 4987 4988 if (new_eee_enabled > 0 && !hw->mac.ops.setup_eee) 4989 return (ENODEV); 4990 else 4991 adapter->eee_enabled = new_eee_enabled; 4992 4993 /* Re-initialize hardware if it's already running */ 4994 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 4995 ixgbe_init(adapter); 4996 4997 return (0); 4998 } 4999 5000 /* 5001 * Read-only sysctl indicating whether EEE support was negotiated 5002 * on the link. 5003 */ 5004 static int 5005 ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS) 5006 { 5007 struct adapter *adapter = (struct adapter *) arg1; 5008 struct ixgbe_hw *hw = &adapter->hw; 5009 bool status; 5010 5011 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & IXGBE_EEE_STAT_NEG); 5012 5013 return (sysctl_handle_int(oidp, 0, status, req)); 5014 } 5015 5016 /* 5017 * Read-only sysctl indicating whether RX Link is in LPI state. 5018 */ 5019 static int 5020 ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS) 5021 { 5022 struct adapter *adapter = (struct adapter *) arg1; 5023 struct ixgbe_hw *hw = &adapter->hw; 5024 bool status; 5025 5026 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5027 IXGBE_EEE_RX_LPI_STATUS); 5028 5029 return (sysctl_handle_int(oidp, 0, status, req)); 5030 } 5031 5032 /* 5033 * Read-only sysctl indicating whether TX Link is in LPI state. 5034 */ 5035 static int 5036 ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS) 5037 { 5038 struct adapter *adapter = (struct adapter *) arg1; 5039 struct ixgbe_hw *hw = &adapter->hw; 5040 bool status; 5041 5042 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5043 IXGBE_EEE_TX_LPI_STATUS); 5044 5045 return (sysctl_handle_int(oidp, 0, status, req)); 5046 } 5047 5048 /* 5049 * Read-only sysctl indicating TX Link LPI delay 5050 */ 5051 static int 5052 ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS) 5053 { 5054 struct adapter *adapter = (struct adapter *) arg1; 5055 struct ixgbe_hw *hw = &adapter->hw; 5056 u32 reg; 5057 5058 reg = IXGBE_READ_REG(hw, IXGBE_EEE_SU); 5059 5060 return (sysctl_handle_int(oidp, 0, reg >> 26, req)); 5061 } 5062 5063 /* 5064 * Sysctl to enable/disable the types of packets that the 5065 * adapter will wake up on upon receipt. 5066 * WUFC - Wake Up Filter Control 5067 * Flags: 5068 * 0x1 - Link Status Change 5069 * 0x2 - Magic Packet 5070 * 0x4 - Direct Exact 5071 * 0x8 - Directed Multicast 5072 * 0x10 - Broadcast 5073 * 0x20 - ARP/IPv4 Request Packet 5074 * 0x40 - Direct IPv4 Packet 5075 * 0x80 - Direct IPv6 Packet 5076 * 5077 * Setting another flag will cause the sysctl to return an 5078 * error. 5079 */ 5080 static int 5081 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 5082 { 5083 struct adapter *adapter = (struct adapter *) arg1; 5084 int error = 0; 5085 u32 new_wufc; 5086 5087 new_wufc = adapter->wufc; 5088 5089 error = sysctl_handle_int(oidp, &new_wufc, 0, req); 5090 if ((error) || (req->newptr == NULL)) 5091 return (error); 5092 if (new_wufc == adapter->wufc) 5093 return (0); 5094 5095 if (new_wufc & 0xffffff00) 5096 return (EINVAL); 5097 else { 5098 new_wufc &= 0xff; 5099 new_wufc |= (0xffffff & adapter->wufc); 5100 adapter->wufc = new_wufc; 5101 } 5102 5103 return (0); 5104 } 5105 5106 #ifdef IXGBE_DEBUG 5107 static int 5108 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 5109 { 5110 struct adapter *adapter = (struct adapter *)arg1; 5111 struct ixgbe_hw *hw = &adapter->hw; 5112 device_t dev = adapter->dev; 5113 int error = 0, reta_size; 5114 struct sbuf *buf; 5115 u32 reg; 5116 5117 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5118 if (!buf) { 5119 device_printf(dev, "Could not allocate sbuf for output.\n"); 5120 return (ENOMEM); 5121 } 5122 5123 // TODO: use sbufs to make a string to print out 5124 /* Set multiplier for RETA setup and table size based on MAC */ 5125 switch (adapter->hw.mac.type) { 5126 case ixgbe_mac_X550: 5127 case ixgbe_mac_X550EM_x: 5128 reta_size = 128; 5129 break; 5130 default: 5131 reta_size = 32; 5132 break; 5133 } 5134 5135 /* Print out the redirection table */ 5136 sbuf_cat(buf, "\n"); 5137 for (int i = 0; i < reta_size; i++) { 5138 if (i < 32) { 5139 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5140 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5141 } else { 5142 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5143 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5144 } 5145 } 5146 5147 // TODO: print more config 5148 5149 error = sbuf_finish(buf); 5150 if (error) 5151 device_printf(dev, "Error finishing sbuf: %d\n", error); 5152 5153 sbuf_delete(buf); 5154 return (0); 5155 } 5156 #endif /* IXGBE_DEBUG */ 5157 5158 /* 5159 ** Enable the hardware to drop packets when the buffer is 5160 ** full. This is useful when multiqueue,so that no single 5161 ** queue being full stalls the entire RX engine. We only 5162 ** enable this when Multiqueue AND when Flow Control is 5163 ** disabled. 5164 */ 5165 static void 5166 ixgbe_enable_rx_drop(struct adapter *adapter) 5167 { 5168 struct ixgbe_hw *hw = &adapter->hw; 5169 5170 for (int i = 0; i < adapter->num_queues; i++) { 5171 struct rx_ring *rxr = &adapter->rx_rings[i]; 5172 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5173 srrctl |= IXGBE_SRRCTL_DROP_EN; 5174 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5175 } 5176 #ifdef PCI_IOV 5177 /* enable drop for each vf */ 5178 for (int i = 0; i < adapter->num_vfs; i++) { 5179 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5180 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5181 IXGBE_QDE_ENABLE)); 5182 } 5183 #endif 5184 } 5185 5186 static void 5187 ixgbe_disable_rx_drop(struct adapter *adapter) 5188 { 5189 struct ixgbe_hw *hw = &adapter->hw; 5190 5191 for (int i = 0; i < adapter->num_queues; i++) { 5192 struct rx_ring *rxr = &adapter->rx_rings[i]; 5193 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5194 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5195 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5196 } 5197 #ifdef PCI_IOV 5198 /* disable drop for each vf */ 5199 for (int i = 0; i < adapter->num_vfs; i++) { 5200 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5201 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5202 } 5203 #endif 5204 } 5205 5206 static void 5207 ixgbe_rearm_queues(struct adapter *adapter, u64 queues) 5208 { 5209 u32 mask; 5210 5211 switch (adapter->hw.mac.type) { 5212 case ixgbe_mac_82598EB: 5213 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 5214 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 5215 break; 5216 case ixgbe_mac_82599EB: 5217 case ixgbe_mac_X540: 5218 case ixgbe_mac_X550: 5219 case ixgbe_mac_X550EM_x: 5220 mask = (queues & 0xFFFFFFFF); 5221 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); 5222 mask = (queues >> 32); 5223 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask); 5224 break; 5225 default: 5226 break; 5227 } 5228 } 5229 5230 #ifdef PCI_IOV 5231 5232 /* 5233 ** Support functions for SRIOV/VF management 5234 */ 5235 5236 static void 5237 ixgbe_ping_all_vfs(struct adapter *adapter) 5238 { 5239 struct ixgbe_vf *vf; 5240 5241 for (int i = 0; i < adapter->num_vfs; i++) { 5242 vf = &adapter->vfs[i]; 5243 if (vf->flags & IXGBE_VF_ACTIVE) 5244 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5245 } 5246 } 5247 5248 5249 static void 5250 ixgbe_vf_set_default_vlan(struct adapter *adapter, struct ixgbe_vf *vf, 5251 uint16_t tag) 5252 { 5253 struct ixgbe_hw *hw; 5254 uint32_t vmolr, vmvir; 5255 5256 hw = &adapter->hw; 5257 5258 vf->vlan_tag = tag; 5259 5260 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf->pool)); 5261 5262 /* Do not receive packets that pass inexact filters. */ 5263 vmolr &= ~(IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_ROPE); 5264 5265 /* Disable Multicast Promicuous Mode. */ 5266 vmolr &= ~IXGBE_VMOLR_MPE; 5267 5268 /* Accept broadcasts. */ 5269 vmolr |= IXGBE_VMOLR_BAM; 5270 5271 if (tag == 0) { 5272 /* Accept non-vlan tagged traffic. */ 5273 //vmolr |= IXGBE_VMOLR_AUPE; 5274 5275 /* Allow VM to tag outgoing traffic; no default tag. */ 5276 vmvir = 0; 5277 } else { 5278 /* Require vlan-tagged traffic. */ 5279 vmolr &= ~IXGBE_VMOLR_AUPE; 5280 5281 /* Tag all traffic with provided vlan tag. */ 5282 vmvir = (tag | IXGBE_VMVIR_VLANA_DEFAULT); 5283 } 5284 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr); 5285 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir); 5286 } 5287 5288 5289 static boolean_t 5290 ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf) 5291 { 5292 5293 /* 5294 * Frame size compatibility between PF and VF is only a problem on 5295 * 82599-based cards. X540 and later support any combination of jumbo 5296 * frames on PFs and VFs. 5297 */ 5298 if (adapter->hw.mac.type != ixgbe_mac_82599EB) 5299 return (TRUE); 5300 5301 switch (vf->api_ver) { 5302 case IXGBE_API_VER_1_0: 5303 case IXGBE_API_VER_UNKNOWN: 5304 /* 5305 * On legacy (1.0 and older) VF versions, we don't support jumbo 5306 * frames on either the PF or the VF. 5307 */ 5308 if (adapter->max_frame_size > ETHER_MAX_LEN || 5309 vf->max_frame_size > ETHER_MAX_LEN) 5310 return (FALSE); 5311 5312 return (TRUE); 5313 5314 break; 5315 case IXGBE_API_VER_1_1: 5316 default: 5317 /* 5318 * 1.1 or later VF versions always work if they aren't using 5319 * jumbo frames. 5320 */ 5321 if (vf->max_frame_size <= ETHER_MAX_LEN) 5322 return (TRUE); 5323 5324 /* 5325 * Jumbo frames only work with VFs if the PF is also using jumbo 5326 * frames. 5327 */ 5328 if (adapter->max_frame_size <= ETHER_MAX_LEN) 5329 return (TRUE); 5330 5331 return (FALSE); 5332 5333 } 5334 } 5335 5336 5337 static void 5338 ixgbe_process_vf_reset(struct adapter *adapter, struct ixgbe_vf *vf) 5339 { 5340 ixgbe_vf_set_default_vlan(adapter, vf, vf->default_vlan); 5341 5342 // XXX clear multicast addresses 5343 5344 ixgbe_clear_rar(&adapter->hw, vf->rar_index); 5345 5346 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5347 } 5348 5349 5350 static void 5351 ixgbe_vf_enable_transmit(struct adapter *adapter, struct ixgbe_vf *vf) 5352 { 5353 struct ixgbe_hw *hw; 5354 uint32_t vf_index, vfte; 5355 5356 hw = &adapter->hw; 5357 5358 vf_index = IXGBE_VF_INDEX(vf->pool); 5359 vfte = IXGBE_READ_REG(hw, IXGBE_VFTE(vf_index)); 5360 vfte |= IXGBE_VF_BIT(vf->pool); 5361 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte); 5362 } 5363 5364 5365 static void 5366 ixgbe_vf_enable_receive(struct adapter *adapter, struct ixgbe_vf *vf) 5367 { 5368 struct ixgbe_hw *hw; 5369 uint32_t vf_index, vfre; 5370 5371 hw = &adapter->hw; 5372 5373 vf_index = IXGBE_VF_INDEX(vf->pool); 5374 vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(vf_index)); 5375 if (ixgbe_vf_frame_size_compatible(adapter, vf)) 5376 vfre |= IXGBE_VF_BIT(vf->pool); 5377 else 5378 vfre &= ~IXGBE_VF_BIT(vf->pool); 5379 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre); 5380 } 5381 5382 5383 static void 5384 ixgbe_vf_reset_msg(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5385 { 5386 struct ixgbe_hw *hw; 5387 uint32_t ack; 5388 uint32_t resp[IXGBE_VF_PERMADDR_MSG_LEN]; 5389 5390 hw = &adapter->hw; 5391 5392 ixgbe_process_vf_reset(adapter, vf); 5393 5394 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5395 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5396 vf->ether_addr, vf->pool, TRUE); 5397 ack = IXGBE_VT_MSGTYPE_ACK; 5398 } else 5399 ack = IXGBE_VT_MSGTYPE_NACK; 5400 5401 ixgbe_vf_enable_transmit(adapter, vf); 5402 ixgbe_vf_enable_receive(adapter, vf); 5403 5404 vf->flags |= IXGBE_VF_CTS; 5405 5406 resp[0] = IXGBE_VF_RESET | ack | IXGBE_VT_MSGTYPE_CTS; 5407 bcopy(vf->ether_addr, &resp[1], ETHER_ADDR_LEN); 5408 resp[3] = hw->mac.mc_filter_type; 5409 ixgbe_write_mbx(hw, resp, IXGBE_VF_PERMADDR_MSG_LEN, vf->pool); 5410 } 5411 5412 5413 static void 5414 ixgbe_vf_set_mac(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5415 { 5416 uint8_t *mac; 5417 5418 mac = (uint8_t*)&msg[1]; 5419 5420 /* Check that the VF has permission to change the MAC address. */ 5421 if (!(vf->flags & IXGBE_VF_CAP_MAC) && ixgbe_vf_mac_changed(vf, mac)) { 5422 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5423 return; 5424 } 5425 5426 if (ixgbe_validate_mac_addr(mac) != 0) { 5427 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5428 return; 5429 } 5430 5431 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5432 5433 ixgbe_set_rar(&adapter->hw, vf->rar_index, vf->ether_addr, 5434 vf->pool, TRUE); 5435 5436 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5437 } 5438 5439 5440 /* 5441 ** VF multicast addresses are set by using the appropriate bit in 5442 ** 1 of 128 32 bit addresses (4096 possible). 5443 */ 5444 static void 5445 ixgbe_vf_set_mc_addr(struct adapter *adapter, struct ixgbe_vf *vf, u32 *msg) 5446 { 5447 u16 *list = (u16*)&msg[1]; 5448 int entries; 5449 u32 vmolr, vec_bit, vec_reg, mta_reg; 5450 5451 entries = (msg[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; 5452 entries = min(entries, IXGBE_MAX_VF_MC); 5453 5454 vmolr = IXGBE_READ_REG(&adapter->hw, IXGBE_VMOLR(vf->pool)); 5455 5456 vf->num_mc_hashes = entries; 5457 5458 /* Set the appropriate MTA bit */ 5459 for (int i = 0; i < entries; i++) { 5460 vf->mc_hash[i] = list[i]; 5461 vec_reg = (vf->mc_hash[i] >> 5) & 0x7F; 5462 vec_bit = vf->mc_hash[i] & 0x1F; 5463 mta_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_MTA(vec_reg)); 5464 mta_reg |= (1 << vec_bit); 5465 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MTA(vec_reg), mta_reg); 5466 } 5467 5468 vmolr |= IXGBE_VMOLR_ROMPE; 5469 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(vf->pool), vmolr); 5470 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5471 return; 5472 } 5473 5474 5475 static void 5476 ixgbe_vf_set_vlan(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5477 { 5478 struct ixgbe_hw *hw; 5479 int enable; 5480 uint16_t tag; 5481 5482 hw = &adapter->hw; 5483 enable = IXGBE_VT_MSGINFO(msg[0]); 5484 tag = msg[1] & IXGBE_VLVF_VLANID_MASK; 5485 5486 if (!(vf->flags & IXGBE_VF_CAP_VLAN)) { 5487 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5488 return; 5489 } 5490 5491 /* It is illegal to enable vlan tag 0. */ 5492 if (tag == 0 && enable != 0){ 5493 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5494 return; 5495 } 5496 5497 ixgbe_set_vfta(hw, tag, vf->pool, enable); 5498 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5499 } 5500 5501 5502 static void 5503 ixgbe_vf_set_lpe(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5504 { 5505 struct ixgbe_hw *hw; 5506 uint32_t vf_max_size, pf_max_size, mhadd; 5507 5508 hw = &adapter->hw; 5509 vf_max_size = msg[1]; 5510 5511 if (vf_max_size < ETHER_CRC_LEN) { 5512 /* We intentionally ACK invalid LPE requests. */ 5513 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5514 return; 5515 } 5516 5517 vf_max_size -= ETHER_CRC_LEN; 5518 5519 if (vf_max_size > IXGBE_MAX_FRAME_SIZE) { 5520 /* We intentionally ACK invalid LPE requests. */ 5521 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5522 return; 5523 } 5524 5525 vf->max_frame_size = vf_max_size; 5526 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5527 5528 /* 5529 * We might have to disable reception to this VF if the frame size is 5530 * not compatible with the config on the PF. 5531 */ 5532 ixgbe_vf_enable_receive(adapter, vf); 5533 5534 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 5535 pf_max_size = (mhadd & IXGBE_MHADD_MFS_MASK) >> IXGBE_MHADD_MFS_SHIFT; 5536 5537 if (pf_max_size < adapter->max_frame_size) { 5538 mhadd &= ~IXGBE_MHADD_MFS_MASK; 5539 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 5540 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 5541 } 5542 5543 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5544 } 5545 5546 5547 static void 5548 ixgbe_vf_set_macvlan(struct adapter *adapter, struct ixgbe_vf *vf, 5549 uint32_t *msg) 5550 { 5551 //XXX implement this 5552 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5553 } 5554 5555 5556 static void 5557 ixgbe_vf_api_negotiate(struct adapter *adapter, struct ixgbe_vf *vf, 5558 uint32_t *msg) 5559 { 5560 5561 switch (msg[1]) { 5562 case IXGBE_API_VER_1_0: 5563 case IXGBE_API_VER_1_1: 5564 vf->api_ver = msg[1]; 5565 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5566 break; 5567 default: 5568 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5569 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5570 break; 5571 } 5572 } 5573 5574 5575 static void 5576 ixgbe_vf_get_queues(struct adapter *adapter, struct ixgbe_vf *vf, 5577 uint32_t *msg) 5578 { 5579 struct ixgbe_hw *hw; 5580 uint32_t resp[IXGBE_VF_GET_QUEUES_RESP_LEN]; 5581 int num_queues; 5582 5583 hw = &adapter->hw; 5584 5585 /* GET_QUEUES is not supported on pre-1.1 APIs. */ 5586 switch (msg[0]) { 5587 case IXGBE_API_VER_1_0: 5588 case IXGBE_API_VER_UNKNOWN: 5589 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5590 return; 5591 } 5592 5593 resp[0] = IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK | 5594 IXGBE_VT_MSGTYPE_CTS; 5595 5596 num_queues = ixgbe_vf_queues(ixgbe_get_iov_mode(adapter)); 5597 resp[IXGBE_VF_TX_QUEUES] = num_queues; 5598 resp[IXGBE_VF_RX_QUEUES] = num_queues; 5599 resp[IXGBE_VF_TRANS_VLAN] = (vf->default_vlan != 0); 5600 resp[IXGBE_VF_DEF_QUEUE] = 0; 5601 5602 ixgbe_write_mbx(hw, resp, IXGBE_VF_GET_QUEUES_RESP_LEN, vf->pool); 5603 } 5604 5605 5606 static void 5607 ixgbe_process_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf) 5608 { 5609 struct ixgbe_hw *hw; 5610 uint32_t msg[IXGBE_VFMAILBOX_SIZE]; 5611 int error; 5612 5613 hw = &adapter->hw; 5614 5615 error = ixgbe_read_mbx(hw, msg, IXGBE_VFMAILBOX_SIZE, vf->pool); 5616 5617 if (error != 0) 5618 return; 5619 5620 CTR3(KTR_MALLOC, "%s: received msg %x from %d", 5621 adapter->ifp->if_xname, msg[0], vf->pool); 5622 if (msg[0] == IXGBE_VF_RESET) { 5623 ixgbe_vf_reset_msg(adapter, vf, msg); 5624 return; 5625 } 5626 5627 if (!(vf->flags & IXGBE_VF_CTS)) { 5628 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5629 return; 5630 } 5631 5632 switch (msg[0] & IXGBE_VT_MSG_MASK) { 5633 case IXGBE_VF_SET_MAC_ADDR: 5634 ixgbe_vf_set_mac(adapter, vf, msg); 5635 break; 5636 case IXGBE_VF_SET_MULTICAST: 5637 ixgbe_vf_set_mc_addr(adapter, vf, msg); 5638 break; 5639 case IXGBE_VF_SET_VLAN: 5640 ixgbe_vf_set_vlan(adapter, vf, msg); 5641 break; 5642 case IXGBE_VF_SET_LPE: 5643 ixgbe_vf_set_lpe(adapter, vf, msg); 5644 break; 5645 case IXGBE_VF_SET_MACVLAN: 5646 ixgbe_vf_set_macvlan(adapter, vf, msg); 5647 break; 5648 case IXGBE_VF_API_NEGOTIATE: 5649 ixgbe_vf_api_negotiate(adapter, vf, msg); 5650 break; 5651 case IXGBE_VF_GET_QUEUES: 5652 ixgbe_vf_get_queues(adapter, vf, msg); 5653 break; 5654 default: 5655 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5656 } 5657 } 5658 5659 5660 /* 5661 * Tasklet for handling VF -> PF mailbox messages. 5662 */ 5663 static void 5664 ixgbe_handle_mbx(void *context, int pending) 5665 { 5666 struct adapter *adapter; 5667 struct ixgbe_hw *hw; 5668 struct ixgbe_vf *vf; 5669 int i; 5670 5671 adapter = context; 5672 hw = &adapter->hw; 5673 5674 IXGBE_CORE_LOCK(adapter); 5675 for (i = 0; i < adapter->num_vfs; i++) { 5676 vf = &adapter->vfs[i]; 5677 5678 if (vf->flags & IXGBE_VF_ACTIVE) { 5679 if (ixgbe_check_for_rst(hw, vf->pool) == 0) 5680 ixgbe_process_vf_reset(adapter, vf); 5681 5682 if (ixgbe_check_for_msg(hw, vf->pool) == 0) 5683 ixgbe_process_vf_msg(adapter, vf); 5684 5685 if (ixgbe_check_for_ack(hw, vf->pool) == 0) 5686 ixgbe_process_vf_ack(adapter, vf); 5687 } 5688 } 5689 IXGBE_CORE_UNLOCK(adapter); 5690 } 5691 5692 5693 static int 5694 ixgbe_init_iov(device_t dev, u16 num_vfs, const nvlist_t *config) 5695 { 5696 struct adapter *adapter; 5697 enum ixgbe_iov_mode mode; 5698 5699 adapter = device_get_softc(dev); 5700 adapter->num_vfs = num_vfs; 5701 mode = ixgbe_get_iov_mode(adapter); 5702 5703 if (num_vfs > ixgbe_max_vfs(mode)) { 5704 adapter->num_vfs = 0; 5705 return (ENOSPC); 5706 } 5707 5708 IXGBE_CORE_LOCK(adapter); 5709 5710 adapter->vfs = malloc(sizeof(*adapter->vfs) * num_vfs, M_IXGBE, 5711 M_NOWAIT | M_ZERO); 5712 5713 if (adapter->vfs == NULL) { 5714 adapter->num_vfs = 0; 5715 IXGBE_CORE_UNLOCK(adapter); 5716 return (ENOMEM); 5717 } 5718 5719 ixgbe_init_locked(adapter); 5720 5721 IXGBE_CORE_UNLOCK(adapter); 5722 5723 return (0); 5724 } 5725 5726 5727 static void 5728 ixgbe_uninit_iov(device_t dev) 5729 { 5730 struct ixgbe_hw *hw; 5731 struct adapter *adapter; 5732 uint32_t pf_reg, vf_reg; 5733 5734 adapter = device_get_softc(dev); 5735 hw = &adapter->hw; 5736 5737 IXGBE_CORE_LOCK(adapter); 5738 5739 /* Enable rx/tx for the PF and disable it for all VFs. */ 5740 pf_reg = IXGBE_VF_INDEX(adapter->pool); 5741 IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), 5742 IXGBE_VF_BIT(adapter->pool)); 5743 IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), 5744 IXGBE_VF_BIT(adapter->pool)); 5745 5746 if (pf_reg == 0) 5747 vf_reg = 1; 5748 else 5749 vf_reg = 0; 5750 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 0); 5751 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 0); 5752 5753 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0); 5754 5755 free(adapter->vfs, M_IXGBE); 5756 adapter->vfs = NULL; 5757 adapter->num_vfs = 0; 5758 5759 IXGBE_CORE_UNLOCK(adapter); 5760 } 5761 5762 5763 static void 5764 ixgbe_initialize_iov(struct adapter *adapter) 5765 { 5766 struct ixgbe_hw *hw = &adapter->hw; 5767 uint32_t mrqc, mtqc, vt_ctl, vf_reg, gcr_ext, gpie; 5768 enum ixgbe_iov_mode mode; 5769 int i; 5770 5771 mode = ixgbe_get_iov_mode(adapter); 5772 if (mode == IXGBE_NO_VM) 5773 return; 5774 5775 IXGBE_CORE_LOCK_ASSERT(adapter); 5776 5777 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 5778 mrqc &= ~IXGBE_MRQC_MRQE_MASK; 5779 5780 switch (mode) { 5781 case IXGBE_64_VM: 5782 mrqc |= IXGBE_MRQC_VMDQRSS64EN; 5783 break; 5784 case IXGBE_32_VM: 5785 mrqc |= IXGBE_MRQC_VMDQRSS32EN; 5786 break; 5787 default: 5788 panic("Unexpected SR-IOV mode %d", mode); 5789 } 5790 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 5791 5792 mtqc = IXGBE_MTQC_VT_ENA; 5793 switch (mode) { 5794 case IXGBE_64_VM: 5795 mtqc |= IXGBE_MTQC_64VF; 5796 break; 5797 case IXGBE_32_VM: 5798 mtqc |= IXGBE_MTQC_32VF; 5799 break; 5800 default: 5801 panic("Unexpected SR-IOV mode %d", mode); 5802 } 5803 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); 5804 5805 5806 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); 5807 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN; 5808 gcr_ext &= ~IXGBE_GCR_EXT_VT_MODE_MASK; 5809 switch (mode) { 5810 case IXGBE_64_VM: 5811 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64; 5812 break; 5813 case IXGBE_32_VM: 5814 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_32; 5815 break; 5816 default: 5817 panic("Unexpected SR-IOV mode %d", mode); 5818 } 5819 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); 5820 5821 5822 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 5823 gcr_ext &= ~IXGBE_GPIE_VTMODE_MASK; 5824 switch (mode) { 5825 case IXGBE_64_VM: 5826 gpie |= IXGBE_GPIE_VTMODE_64; 5827 break; 5828 case IXGBE_32_VM: 5829 gpie |= IXGBE_GPIE_VTMODE_32; 5830 break; 5831 default: 5832 panic("Unexpected SR-IOV mode %d", mode); 5833 } 5834 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 5835 5836 /* Enable rx/tx for the PF. */ 5837 vf_reg = IXGBE_VF_INDEX(adapter->pool); 5838 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 5839 IXGBE_VF_BIT(adapter->pool)); 5840 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 5841 IXGBE_VF_BIT(adapter->pool)); 5842 5843 /* Allow VM-to-VM communication. */ 5844 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); 5845 5846 vt_ctl = IXGBE_VT_CTL_VT_ENABLE | IXGBE_VT_CTL_REPLEN; 5847 vt_ctl |= (adapter->pool << IXGBE_VT_CTL_POOL_SHIFT); 5848 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl); 5849 5850 for (i = 0; i < adapter->num_vfs; i++) 5851 ixgbe_init_vf(adapter, &adapter->vfs[i]); 5852 } 5853 5854 5855 /* 5856 ** Check the max frame setting of all active VF's 5857 */ 5858 static void 5859 ixgbe_recalculate_max_frame(struct adapter *adapter) 5860 { 5861 struct ixgbe_vf *vf; 5862 5863 IXGBE_CORE_LOCK_ASSERT(adapter); 5864 5865 for (int i = 0; i < adapter->num_vfs; i++) { 5866 vf = &adapter->vfs[i]; 5867 if (vf->flags & IXGBE_VF_ACTIVE) 5868 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5869 } 5870 } 5871 5872 5873 static void 5874 ixgbe_init_vf(struct adapter *adapter, struct ixgbe_vf *vf) 5875 { 5876 struct ixgbe_hw *hw; 5877 uint32_t vf_index, pfmbimr; 5878 5879 IXGBE_CORE_LOCK_ASSERT(adapter); 5880 5881 hw = &adapter->hw; 5882 5883 if (!(vf->flags & IXGBE_VF_ACTIVE)) 5884 return; 5885 5886 vf_index = IXGBE_VF_INDEX(vf->pool); 5887 pfmbimr = IXGBE_READ_REG(hw, IXGBE_PFMBIMR(vf_index)); 5888 pfmbimr |= IXGBE_VF_BIT(vf->pool); 5889 IXGBE_WRITE_REG(hw, IXGBE_PFMBIMR(vf_index), pfmbimr); 5890 5891 ixgbe_vf_set_default_vlan(adapter, vf, vf->vlan_tag); 5892 5893 // XXX multicast addresses 5894 5895 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5896 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5897 vf->ether_addr, vf->pool, TRUE); 5898 } 5899 5900 ixgbe_vf_enable_transmit(adapter, vf); 5901 ixgbe_vf_enable_receive(adapter, vf); 5902 5903 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5904 } 5905 5906 static int 5907 ixgbe_add_vf(device_t dev, u16 vfnum, const nvlist_t *config) 5908 { 5909 struct adapter *adapter; 5910 struct ixgbe_vf *vf; 5911 const void *mac; 5912 5913 adapter = device_get_softc(dev); 5914 5915 KASSERT(vfnum < adapter->num_vfs, ("VF index %d is out of range %d", 5916 vfnum, adapter->num_vfs)); 5917 5918 IXGBE_CORE_LOCK(adapter); 5919 vf = &adapter->vfs[vfnum]; 5920 vf->pool= vfnum; 5921 5922 /* RAR[0] is used by the PF so use vfnum + 1 for VF RAR. */ 5923 vf->rar_index = vfnum + 1; 5924 vf->default_vlan = 0; 5925 vf->max_frame_size = ETHER_MAX_LEN; 5926 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5927 5928 if (nvlist_exists_binary(config, "mac-addr")) { 5929 mac = nvlist_get_binary(config, "mac-addr", NULL); 5930 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5931 if (nvlist_get_bool(config, "allow-set-mac")) 5932 vf->flags |= IXGBE_VF_CAP_MAC; 5933 } else 5934 /* 5935 * If the administrator has not specified a MAC address then 5936 * we must allow the VF to choose one. 5937 */ 5938 vf->flags |= IXGBE_VF_CAP_MAC; 5939 5940 vf->flags = IXGBE_VF_ACTIVE; 5941 5942 ixgbe_init_vf(adapter, vf); 5943 IXGBE_CORE_UNLOCK(adapter); 5944 5945 return (0); 5946 } 5947 #endif /* PCI_IOV */ 5948 5949