1 /****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef IXGBE_STANDALONE_BUILD 37 #include "opt_inet.h" 38 #include "opt_inet6.h" 39 #include "opt_rss.h" 40 #endif 41 42 #include "ixgbe.h" 43 44 #ifdef RSS 45 #include <net/rss_config.h> 46 #include <netinet/in_rss.h> 47 #endif 48 49 /********************************************************************* 50 * Driver version 51 *********************************************************************/ 52 char ixgbe_driver_version[] = "3.1.13-k"; 53 54 55 /********************************************************************* 56 * PCI Device ID Table 57 * 58 * Used by probe to select devices to load on 59 * Last field stores an index into ixgbe_strings 60 * Last entry must be all 0s 61 * 62 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 63 *********************************************************************/ 64 65 static ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 66 { 67 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 68 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 69 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 70 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 71 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 72 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 73 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 74 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 75 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 76 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 77 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 78 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 79 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 80 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 81 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 82 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 83 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 84 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 85 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 86 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 87 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 88 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 89 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 90 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 91 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 92 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 93 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 94 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 95 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 96 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 97 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 98 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 99 /* required last entry */ 100 {0, 0, 0, 0, 0} 101 }; 102 103 /********************************************************************* 104 * Table of branding strings 105 *********************************************************************/ 106 107 static char *ixgbe_strings[] = { 108 "Intel(R) PRO/10GbE PCI-Express Network Driver" 109 }; 110 111 /********************************************************************* 112 * Function prototypes 113 *********************************************************************/ 114 static int ixgbe_probe(device_t); 115 static int ixgbe_attach(device_t); 116 static int ixgbe_detach(device_t); 117 static int ixgbe_shutdown(device_t); 118 static int ixgbe_suspend(device_t); 119 static int ixgbe_resume(device_t); 120 static int ixgbe_ioctl(struct ifnet *, u_long, caddr_t); 121 static void ixgbe_init(void *); 122 static void ixgbe_init_locked(struct adapter *); 123 static void ixgbe_stop(void *); 124 #if __FreeBSD_version >= 1100036 125 static uint64_t ixgbe_get_counter(struct ifnet *, ift_counter); 126 #endif 127 static void ixgbe_add_media_types(struct adapter *); 128 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 129 static int ixgbe_media_change(struct ifnet *); 130 static void ixgbe_identify_hardware(struct adapter *); 131 static int ixgbe_allocate_pci_resources(struct adapter *); 132 static void ixgbe_get_slot_info(struct adapter *); 133 static int ixgbe_allocate_msix(struct adapter *); 134 static int ixgbe_allocate_legacy(struct adapter *); 135 static int ixgbe_setup_msix(struct adapter *); 136 static void ixgbe_free_pci_resources(struct adapter *); 137 static void ixgbe_local_timer(void *); 138 static int ixgbe_setup_interface(device_t, struct adapter *); 139 static void ixgbe_config_gpie(struct adapter *); 140 static void ixgbe_config_dmac(struct adapter *); 141 static void ixgbe_config_delay_values(struct adapter *); 142 static void ixgbe_config_link(struct adapter *); 143 static void ixgbe_check_wol_support(struct adapter *); 144 static int ixgbe_setup_low_power_mode(struct adapter *); 145 static void ixgbe_rearm_queues(struct adapter *, u64); 146 147 static void ixgbe_initialize_transmit_units(struct adapter *); 148 static void ixgbe_initialize_receive_units(struct adapter *); 149 static void ixgbe_enable_rx_drop(struct adapter *); 150 static void ixgbe_disable_rx_drop(struct adapter *); 151 static void ixgbe_initialize_rss_mapping(struct adapter *); 152 153 static void ixgbe_enable_intr(struct adapter *); 154 static void ixgbe_disable_intr(struct adapter *); 155 static void ixgbe_update_stats_counters(struct adapter *); 156 static void ixgbe_set_promisc(struct adapter *); 157 static void ixgbe_set_multi(struct adapter *); 158 static void ixgbe_update_link_status(struct adapter *); 159 static void ixgbe_set_ivar(struct adapter *, u8, u8, s8); 160 static void ixgbe_configure_ivars(struct adapter *); 161 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 162 163 static void ixgbe_setup_vlan_hw_support(struct adapter *); 164 static void ixgbe_register_vlan(void *, struct ifnet *, u16); 165 static void ixgbe_unregister_vlan(void *, struct ifnet *, u16); 166 167 static void ixgbe_add_device_sysctls(struct adapter *); 168 static void ixgbe_add_hw_stats(struct adapter *); 169 static int ixgbe_set_flowcntl(struct adapter *, int); 170 static int ixgbe_set_advertise(struct adapter *, int); 171 172 /* Sysctl handlers */ 173 static void ixgbe_set_sysctl_value(struct adapter *, const char *, 174 const char *, int *, int); 175 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS); 176 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS); 177 static int ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS); 178 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 179 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 180 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 181 #ifdef IXGBE_DEBUG 182 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 183 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 184 #endif 185 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 186 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 187 static int ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS); 188 static int ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS); 189 static int ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS); 190 static int ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS); 191 static int ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS); 192 193 /* Support for pluggable optic modules */ 194 static bool ixgbe_sfp_probe(struct adapter *); 195 static void ixgbe_setup_optics(struct adapter *); 196 197 /* Legacy (single vector interrupt handler */ 198 static void ixgbe_legacy_irq(void *); 199 200 /* The MSI/X Interrupt handlers */ 201 static void ixgbe_msix_que(void *); 202 static void ixgbe_msix_link(void *); 203 204 /* Deferred interrupt tasklets */ 205 static void ixgbe_handle_que(void *, int); 206 static void ixgbe_handle_link(void *, int); 207 static void ixgbe_handle_msf(void *, int); 208 static void ixgbe_handle_mod(void *, int); 209 static void ixgbe_handle_phy(void *, int); 210 211 #ifdef IXGBE_FDIR 212 static void ixgbe_reinit_fdir(void *, int); 213 #endif 214 215 #ifdef PCI_IOV 216 static void ixgbe_ping_all_vfs(struct adapter *); 217 static void ixgbe_handle_mbx(void *, int); 218 static int ixgbe_init_iov(device_t, u16, const nvlist_t *); 219 static void ixgbe_uninit_iov(device_t); 220 static int ixgbe_add_vf(device_t, u16, const nvlist_t *); 221 static void ixgbe_initialize_iov(struct adapter *); 222 static void ixgbe_recalculate_max_frame(struct adapter *); 223 static void ixgbe_init_vf(struct adapter *, struct ixgbe_vf *); 224 #endif /* PCI_IOV */ 225 226 227 /********************************************************************* 228 * FreeBSD Device Interface Entry Points 229 *********************************************************************/ 230 231 static device_method_t ix_methods[] = { 232 /* Device interface */ 233 DEVMETHOD(device_probe, ixgbe_probe), 234 DEVMETHOD(device_attach, ixgbe_attach), 235 DEVMETHOD(device_detach, ixgbe_detach), 236 DEVMETHOD(device_shutdown, ixgbe_shutdown), 237 DEVMETHOD(device_suspend, ixgbe_suspend), 238 DEVMETHOD(device_resume, ixgbe_resume), 239 #ifdef PCI_IOV 240 DEVMETHOD(pci_iov_init, ixgbe_init_iov), 241 DEVMETHOD(pci_iov_uninit, ixgbe_uninit_iov), 242 DEVMETHOD(pci_iov_add_vf, ixgbe_add_vf), 243 #endif /* PCI_IOV */ 244 DEVMETHOD_END 245 }; 246 247 static driver_t ix_driver = { 248 "ix", ix_methods, sizeof(struct adapter), 249 }; 250 251 devclass_t ix_devclass; 252 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 253 254 MODULE_DEPEND(ix, pci, 1, 1, 1); 255 MODULE_DEPEND(ix, ether, 1, 1, 1); 256 #ifdef DEV_NETMAP 257 MODULE_DEPEND(ix, netmap, 1, 1, 1); 258 #endif /* DEV_NETMAP */ 259 260 /* 261 ** TUNEABLE PARAMETERS: 262 */ 263 264 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD, 0, 265 "IXGBE driver parameters"); 266 267 /* 268 ** AIM: Adaptive Interrupt Moderation 269 ** which means that the interrupt rate 270 ** is varied over time based on the 271 ** traffic for that interrupt vector 272 */ 273 static int ixgbe_enable_aim = TRUE; 274 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 0, 275 "Enable adaptive interrupt moderation"); 276 277 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 278 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 279 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 280 281 /* How many packets rxeof tries to clean at a time */ 282 static int ixgbe_rx_process_limit = 256; 283 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 284 &ixgbe_rx_process_limit, 0, 285 "Maximum number of received packets to process at a time," 286 "-1 means unlimited"); 287 288 /* How many packets txeof tries to clean at a time */ 289 static int ixgbe_tx_process_limit = 256; 290 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 291 &ixgbe_tx_process_limit, 0, 292 "Maximum number of sent packets to process at a time," 293 "-1 means unlimited"); 294 295 /* Flow control setting, default to full */ 296 static int ixgbe_flow_control = ixgbe_fc_full; 297 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 298 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 299 300 /* Advertise Speed, default to 0 (auto) */ 301 static int ixgbe_advertise_speed = 0; 302 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN, 303 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters"); 304 305 /* 306 ** Smart speed setting, default to on 307 ** this only works as a compile option 308 ** right now as its during attach, set 309 ** this to 'ixgbe_smart_speed_off' to 310 ** disable. 311 */ 312 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 313 314 /* 315 * MSIX should be the default for best performance, 316 * but this allows it to be forced off for testing. 317 */ 318 static int ixgbe_enable_msix = 1; 319 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 320 "Enable MSI-X interrupts"); 321 322 /* 323 * Number of Queues, can be set to 0, 324 * it then autoconfigures based on the 325 * number of cpus with a max of 8. This 326 * can be overriden manually here. 327 */ 328 static int ixgbe_num_queues = 0; 329 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 330 "Number of queues to configure, 0 indicates autoconfigure"); 331 332 /* 333 ** Number of TX descriptors per ring, 334 ** setting higher than RX as this seems 335 ** the better performing choice. 336 */ 337 static int ixgbe_txd = PERFORM_TXD; 338 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 339 "Number of transmit descriptors per queue"); 340 341 /* Number of RX descriptors per ring */ 342 static int ixgbe_rxd = PERFORM_RXD; 343 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 344 "Number of receive descriptors per queue"); 345 346 /* 347 ** Defining this on will allow the use 348 ** of unsupported SFP+ modules, note that 349 ** doing so you are on your own :) 350 */ 351 static int allow_unsupported_sfp = FALSE; 352 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 353 354 /* Keep running tab on them for sanity check */ 355 static int ixgbe_total_ports; 356 357 #ifdef IXGBE_FDIR 358 /* 359 ** Flow Director actually 'steals' 360 ** part of the packet buffer as its 361 ** filter pool, this variable controls 362 ** how much it uses: 363 ** 0 = 64K, 1 = 128K, 2 = 256K 364 */ 365 static int fdir_pballoc = 1; 366 #endif 367 368 #ifdef DEV_NETMAP 369 /* 370 * The #ifdef DEV_NETMAP / #endif blocks in this file are meant to 371 * be a reference on how to implement netmap support in a driver. 372 * Additional comments are in ixgbe_netmap.h . 373 * 374 * <dev/netmap/ixgbe_netmap.h> contains functions for netmap support 375 * that extend the standard driver. 376 */ 377 #include <dev/netmap/ixgbe_netmap.h> 378 #endif /* DEV_NETMAP */ 379 380 static MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 381 382 /********************************************************************* 383 * Device identification routine 384 * 385 * ixgbe_probe determines if the driver should be loaded on 386 * adapter based on PCI vendor/device id of the adapter. 387 * 388 * return BUS_PROBE_DEFAULT on success, positive on failure 389 *********************************************************************/ 390 391 static int 392 ixgbe_probe(device_t dev) 393 { 394 ixgbe_vendor_info_t *ent; 395 396 u16 pci_vendor_id = 0; 397 u16 pci_device_id = 0; 398 u16 pci_subvendor_id = 0; 399 u16 pci_subdevice_id = 0; 400 char adapter_name[256]; 401 402 INIT_DEBUGOUT("ixgbe_probe: begin"); 403 404 pci_vendor_id = pci_get_vendor(dev); 405 if (pci_vendor_id != IXGBE_INTEL_VENDOR_ID) 406 return (ENXIO); 407 408 pci_device_id = pci_get_device(dev); 409 pci_subvendor_id = pci_get_subvendor(dev); 410 pci_subdevice_id = pci_get_subdevice(dev); 411 412 ent = ixgbe_vendor_info_array; 413 while (ent->vendor_id != 0) { 414 if ((pci_vendor_id == ent->vendor_id) && 415 (pci_device_id == ent->device_id) && 416 417 ((pci_subvendor_id == ent->subvendor_id) || 418 (ent->subvendor_id == 0)) && 419 420 ((pci_subdevice_id == ent->subdevice_id) || 421 (ent->subdevice_id == 0))) { 422 sprintf(adapter_name, "%s, Version - %s", 423 ixgbe_strings[ent->index], 424 ixgbe_driver_version); 425 device_set_desc_copy(dev, adapter_name); 426 ++ixgbe_total_ports; 427 return (BUS_PROBE_DEFAULT); 428 } 429 ent++; 430 } 431 return (ENXIO); 432 } 433 434 /********************************************************************* 435 * Device initialization routine 436 * 437 * The attach entry point is called when the driver is being loaded. 438 * This routine identifies the type of hardware, allocates all resources 439 * and initializes the hardware. 440 * 441 * return 0 on success, positive on failure 442 *********************************************************************/ 443 444 static int 445 ixgbe_attach(device_t dev) 446 { 447 struct adapter *adapter; 448 struct ixgbe_hw *hw; 449 int error = 0; 450 u16 csum; 451 u32 ctrl_ext; 452 453 INIT_DEBUGOUT("ixgbe_attach: begin"); 454 455 /* Allocate, clear, and link in our adapter structure */ 456 adapter = device_get_softc(dev); 457 adapter->dev = dev; 458 hw = &adapter->hw; 459 460 #ifdef DEV_NETMAP 461 adapter->init_locked = ixgbe_init_locked; 462 adapter->stop_locked = ixgbe_stop; 463 #endif 464 465 /* Core Lock Init*/ 466 IXGBE_CORE_LOCK_INIT(adapter, device_get_nameunit(dev)); 467 468 /* Set up the timer callout */ 469 callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0); 470 471 /* Determine hardware revision */ 472 ixgbe_identify_hardware(adapter); 473 474 /* Do base PCI setup - map BAR0 */ 475 if (ixgbe_allocate_pci_resources(adapter)) { 476 device_printf(dev, "Allocation of PCI resources failed\n"); 477 error = ENXIO; 478 goto err_out; 479 } 480 481 /* Sysctls for limiting the amount of work done in the taskqueues */ 482 ixgbe_set_sysctl_value(adapter, "rx_processing_limit", 483 "max number of rx packets to process", 484 &adapter->rx_process_limit, ixgbe_rx_process_limit); 485 486 ixgbe_set_sysctl_value(adapter, "tx_processing_limit", 487 "max number of tx packets to process", 488 &adapter->tx_process_limit, ixgbe_tx_process_limit); 489 490 /* Do descriptor calc and sanity checks */ 491 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 492 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 493 device_printf(dev, "TXD config issue, using default!\n"); 494 adapter->num_tx_desc = DEFAULT_TXD; 495 } else 496 adapter->num_tx_desc = ixgbe_txd; 497 498 /* 499 ** With many RX rings it is easy to exceed the 500 ** system mbuf allocation. Tuning nmbclusters 501 ** can alleviate this. 502 */ 503 if (nmbclusters > 0) { 504 int s; 505 s = (ixgbe_rxd * adapter->num_queues) * ixgbe_total_ports; 506 if (s > nmbclusters) { 507 device_printf(dev, "RX Descriptors exceed " 508 "system mbuf max, using default instead!\n"); 509 ixgbe_rxd = DEFAULT_RXD; 510 } 511 } 512 513 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 514 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 515 device_printf(dev, "RXD config issue, using default!\n"); 516 adapter->num_rx_desc = DEFAULT_RXD; 517 } else 518 adapter->num_rx_desc = ixgbe_rxd; 519 520 /* Allocate our TX/RX Queues */ 521 if (ixgbe_allocate_queues(adapter)) { 522 error = ENOMEM; 523 goto err_out; 524 } 525 526 /* Allocate multicast array memory. */ 527 adapter->mta = malloc(sizeof(*adapter->mta) * 528 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT); 529 if (adapter->mta == NULL) { 530 device_printf(dev, "Can not allocate multicast setup array\n"); 531 error = ENOMEM; 532 goto err_late; 533 } 534 535 /* Initialize the shared code */ 536 hw->allow_unsupported_sfp = allow_unsupported_sfp; 537 error = ixgbe_init_shared_code(hw); 538 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 539 /* 540 ** No optics in this port, set up 541 ** so the timer routine will probe 542 ** for later insertion. 543 */ 544 adapter->sfp_probe = TRUE; 545 error = 0; 546 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 547 device_printf(dev, "Unsupported SFP+ module detected!\n"); 548 error = EIO; 549 goto err_late; 550 } else if (error) { 551 device_printf(dev, "Unable to initialize the shared code\n"); 552 error = EIO; 553 goto err_late; 554 } 555 556 /* Make sure we have a good EEPROM before we read from it */ 557 if (ixgbe_validate_eeprom_checksum(&adapter->hw, &csum) < 0) { 558 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 559 error = EIO; 560 goto err_late; 561 } 562 563 error = ixgbe_init_hw(hw); 564 switch (error) { 565 case IXGBE_ERR_EEPROM_VERSION: 566 device_printf(dev, "This device is a pre-production adapter/" 567 "LOM. Please be aware there may be issues associated " 568 "with your hardware.\nIf you are experiencing problems " 569 "please contact your Intel or hardware representative " 570 "who provided you with this hardware.\n"); 571 break; 572 case IXGBE_ERR_SFP_NOT_SUPPORTED: 573 device_printf(dev, "Unsupported SFP+ Module\n"); 574 error = EIO; 575 goto err_late; 576 case IXGBE_ERR_SFP_NOT_PRESENT: 577 device_printf(dev, "No SFP+ Module found\n"); 578 /* falls thru */ 579 default: 580 break; 581 } 582 583 /* hw.ix defaults init */ 584 ixgbe_set_advertise(adapter, ixgbe_advertise_speed); 585 ixgbe_set_flowcntl(adapter, ixgbe_flow_control); 586 adapter->enable_aim = ixgbe_enable_aim; 587 588 if ((adapter->msix > 1) && (ixgbe_enable_msix)) 589 error = ixgbe_allocate_msix(adapter); 590 else 591 error = ixgbe_allocate_legacy(adapter); 592 if (error) 593 goto err_late; 594 595 /* Setup OS specific network interface */ 596 if (ixgbe_setup_interface(dev, adapter) != 0) 597 goto err_late; 598 599 /* Initialize statistics */ 600 ixgbe_update_stats_counters(adapter); 601 602 /* Register for VLAN events */ 603 adapter->vlan_attach = EVENTHANDLER_REGISTER(vlan_config, 604 ixgbe_register_vlan, adapter, EVENTHANDLER_PRI_FIRST); 605 adapter->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig, 606 ixgbe_unregister_vlan, adapter, EVENTHANDLER_PRI_FIRST); 607 608 /* Check PCIE slot type/speed/width */ 609 ixgbe_get_slot_info(adapter); 610 611 /* Set an initial default flow control & dmac value */ 612 adapter->fc = ixgbe_fc_full; 613 adapter->dmac = 0; 614 adapter->eee_enabled = 0; 615 616 #ifdef PCI_IOV 617 if ((hw->mac.type != ixgbe_mac_82598EB) && (adapter->msix > 1)) { 618 nvlist_t *pf_schema, *vf_schema; 619 620 hw->mbx.ops.init_params(hw); 621 pf_schema = pci_iov_schema_alloc_node(); 622 vf_schema = pci_iov_schema_alloc_node(); 623 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); 624 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", 625 IOV_SCHEMA_HASDEFAULT, TRUE); 626 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", 627 IOV_SCHEMA_HASDEFAULT, FALSE); 628 pci_iov_schema_add_bool(vf_schema, "allow-promisc", 629 IOV_SCHEMA_HASDEFAULT, FALSE); 630 error = pci_iov_attach(dev, pf_schema, vf_schema); 631 if (error != 0) { 632 device_printf(dev, 633 "Error %d setting up SR-IOV\n", error); 634 } 635 } 636 #endif /* PCI_IOV */ 637 638 /* Check for certain supported features */ 639 ixgbe_check_wol_support(adapter); 640 641 /* Add sysctls */ 642 ixgbe_add_device_sysctls(adapter); 643 ixgbe_add_hw_stats(adapter); 644 645 /* let hardware know driver is loaded */ 646 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 647 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 648 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 649 650 #ifdef DEV_NETMAP 651 ixgbe_netmap_attach(adapter); 652 #endif /* DEV_NETMAP */ 653 INIT_DEBUGOUT("ixgbe_attach: end"); 654 return (0); 655 656 err_late: 657 ixgbe_free_transmit_structures(adapter); 658 ixgbe_free_receive_structures(adapter); 659 err_out: 660 if (adapter->ifp != NULL) 661 if_free(adapter->ifp); 662 ixgbe_free_pci_resources(adapter); 663 free(adapter->mta, M_DEVBUF); 664 return (error); 665 } 666 667 /********************************************************************* 668 * Device removal routine 669 * 670 * The detach entry point is called when the driver is being removed. 671 * This routine stops the adapter and deallocates all the resources 672 * that were allocated for driver operation. 673 * 674 * return 0 on success, positive on failure 675 *********************************************************************/ 676 677 static int 678 ixgbe_detach(device_t dev) 679 { 680 struct adapter *adapter = device_get_softc(dev); 681 struct ix_queue *que = adapter->queues; 682 struct tx_ring *txr = adapter->tx_rings; 683 u32 ctrl_ext; 684 685 INIT_DEBUGOUT("ixgbe_detach: begin"); 686 687 /* Make sure VLANS are not using driver */ 688 if (adapter->ifp->if_vlantrunk != NULL) { 689 device_printf(dev,"Vlan in use, detach first\n"); 690 return (EBUSY); 691 } 692 693 #ifdef PCI_IOV 694 if (pci_iov_detach(dev) != 0) { 695 device_printf(dev, "SR-IOV in use; detach first.\n"); 696 return (EBUSY); 697 } 698 #endif /* PCI_IOV */ 699 700 ether_ifdetach(adapter->ifp); 701 /* Stop the adapter */ 702 IXGBE_CORE_LOCK(adapter); 703 ixgbe_setup_low_power_mode(adapter); 704 IXGBE_CORE_UNLOCK(adapter); 705 706 for (int i = 0; i < adapter->num_queues; i++, que++, txr++) { 707 if (que->tq) { 708 #ifndef IXGBE_LEGACY_TX 709 taskqueue_drain(que->tq, &txr->txq_task); 710 #endif 711 taskqueue_drain(que->tq, &que->que_task); 712 taskqueue_free(que->tq); 713 } 714 } 715 716 /* Drain the Link queue */ 717 if (adapter->tq) { 718 taskqueue_drain(adapter->tq, &adapter->link_task); 719 taskqueue_drain(adapter->tq, &adapter->mod_task); 720 taskqueue_drain(adapter->tq, &adapter->msf_task); 721 #ifdef PCI_IOV 722 taskqueue_drain(adapter->tq, &adapter->mbx_task); 723 #endif 724 taskqueue_drain(adapter->tq, &adapter->phy_task); 725 #ifdef IXGBE_FDIR 726 taskqueue_drain(adapter->tq, &adapter->fdir_task); 727 #endif 728 taskqueue_free(adapter->tq); 729 } 730 731 /* let hardware know driver is unloading */ 732 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 733 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 734 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext); 735 736 /* Unregister VLAN events */ 737 if (adapter->vlan_attach != NULL) 738 EVENTHANDLER_DEREGISTER(vlan_config, adapter->vlan_attach); 739 if (adapter->vlan_detach != NULL) 740 EVENTHANDLER_DEREGISTER(vlan_unconfig, adapter->vlan_detach); 741 742 callout_drain(&adapter->timer); 743 #ifdef DEV_NETMAP 744 netmap_detach(adapter->ifp); 745 #endif /* DEV_NETMAP */ 746 ixgbe_free_pci_resources(adapter); 747 bus_generic_detach(dev); 748 if_free(adapter->ifp); 749 750 ixgbe_free_transmit_structures(adapter); 751 ixgbe_free_receive_structures(adapter); 752 free(adapter->mta, M_DEVBUF); 753 754 IXGBE_CORE_LOCK_DESTROY(adapter); 755 return (0); 756 } 757 758 /********************************************************************* 759 * 760 * Shutdown entry point 761 * 762 **********************************************************************/ 763 764 static int 765 ixgbe_shutdown(device_t dev) 766 { 767 struct adapter *adapter = device_get_softc(dev); 768 int error = 0; 769 770 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 771 772 IXGBE_CORE_LOCK(adapter); 773 error = ixgbe_setup_low_power_mode(adapter); 774 IXGBE_CORE_UNLOCK(adapter); 775 776 return (error); 777 } 778 779 /** 780 * Methods for going from: 781 * D0 -> D3: ixgbe_suspend 782 * D3 -> D0: ixgbe_resume 783 */ 784 static int 785 ixgbe_suspend(device_t dev) 786 { 787 struct adapter *adapter = device_get_softc(dev); 788 int error = 0; 789 790 INIT_DEBUGOUT("ixgbe_suspend: begin"); 791 792 IXGBE_CORE_LOCK(adapter); 793 794 error = ixgbe_setup_low_power_mode(adapter); 795 796 IXGBE_CORE_UNLOCK(adapter); 797 798 return (error); 799 } 800 801 static int 802 ixgbe_resume(device_t dev) 803 { 804 struct adapter *adapter = device_get_softc(dev); 805 struct ifnet *ifp = adapter->ifp; 806 struct ixgbe_hw *hw = &adapter->hw; 807 u32 wus; 808 809 INIT_DEBUGOUT("ixgbe_resume: begin"); 810 811 IXGBE_CORE_LOCK(adapter); 812 813 /* Read & clear WUS register */ 814 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 815 if (wus) 816 device_printf(dev, "Woken up by (WUS): %#010x\n", 817 IXGBE_READ_REG(hw, IXGBE_WUS)); 818 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 819 /* And clear WUFC until next low-power transition */ 820 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 821 822 /* 823 * Required after D3->D0 transition; 824 * will re-advertise all previous advertised speeds 825 */ 826 if (ifp->if_flags & IFF_UP) 827 ixgbe_init_locked(adapter); 828 829 IXGBE_CORE_UNLOCK(adapter); 830 831 return (0); 832 } 833 834 835 /********************************************************************* 836 * Ioctl entry point 837 * 838 * ixgbe_ioctl is called when the user wants to configure the 839 * interface. 840 * 841 * return 0 on success, positive on failure 842 **********************************************************************/ 843 844 static int 845 ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data) 846 { 847 struct adapter *adapter = ifp->if_softc; 848 struct ifreq *ifr = (struct ifreq *) data; 849 #if defined(INET) || defined(INET6) 850 struct ifaddr *ifa = (struct ifaddr *)data; 851 #endif 852 int error = 0; 853 bool avoid_reset = FALSE; 854 855 switch (command) { 856 857 case SIOCSIFADDR: 858 #ifdef INET 859 if (ifa->ifa_addr->sa_family == AF_INET) 860 avoid_reset = TRUE; 861 #endif 862 #ifdef INET6 863 if (ifa->ifa_addr->sa_family == AF_INET6) 864 avoid_reset = TRUE; 865 #endif 866 /* 867 ** Calling init results in link renegotiation, 868 ** so we avoid doing it when possible. 869 */ 870 if (avoid_reset) { 871 ifp->if_flags |= IFF_UP; 872 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 873 ixgbe_init(adapter); 874 #ifdef INET 875 if (!(ifp->if_flags & IFF_NOARP)) 876 arp_ifinit(ifp, ifa); 877 #endif 878 } else 879 error = ether_ioctl(ifp, command, data); 880 break; 881 case SIOCSIFMTU: 882 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 883 if (ifr->ifr_mtu > IXGBE_MAX_MTU) { 884 error = EINVAL; 885 } else { 886 IXGBE_CORE_LOCK(adapter); 887 ifp->if_mtu = ifr->ifr_mtu; 888 adapter->max_frame_size = 889 ifp->if_mtu + IXGBE_MTU_HDR; 890 ixgbe_init_locked(adapter); 891 #ifdef PCI_IOV 892 ixgbe_recalculate_max_frame(adapter); 893 #endif 894 IXGBE_CORE_UNLOCK(adapter); 895 } 896 break; 897 case SIOCSIFFLAGS: 898 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 899 IXGBE_CORE_LOCK(adapter); 900 if (ifp->if_flags & IFF_UP) { 901 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 902 if ((ifp->if_flags ^ adapter->if_flags) & 903 (IFF_PROMISC | IFF_ALLMULTI)) { 904 ixgbe_set_promisc(adapter); 905 } 906 } else 907 ixgbe_init_locked(adapter); 908 } else 909 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 910 ixgbe_stop(adapter); 911 adapter->if_flags = ifp->if_flags; 912 IXGBE_CORE_UNLOCK(adapter); 913 break; 914 case SIOCADDMULTI: 915 case SIOCDELMULTI: 916 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 917 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 918 IXGBE_CORE_LOCK(adapter); 919 ixgbe_disable_intr(adapter); 920 ixgbe_set_multi(adapter); 921 ixgbe_enable_intr(adapter); 922 IXGBE_CORE_UNLOCK(adapter); 923 } 924 break; 925 case SIOCSIFMEDIA: 926 case SIOCGIFMEDIA: 927 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 928 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 929 break; 930 case SIOCSIFCAP: 931 { 932 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 933 934 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 935 if (!mask) 936 break; 937 938 /* HW cannot turn these on/off separately */ 939 if (mask & (IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6)) { 940 ifp->if_capenable ^= IFCAP_RXCSUM; 941 ifp->if_capenable ^= IFCAP_RXCSUM_IPV6; 942 } 943 if (mask & IFCAP_TXCSUM) 944 ifp->if_capenable ^= IFCAP_TXCSUM; 945 if (mask & IFCAP_TXCSUM_IPV6) 946 ifp->if_capenable ^= IFCAP_TXCSUM_IPV6; 947 if (mask & IFCAP_TSO4) 948 ifp->if_capenable ^= IFCAP_TSO4; 949 if (mask & IFCAP_TSO6) 950 ifp->if_capenable ^= IFCAP_TSO6; 951 if (mask & IFCAP_LRO) 952 ifp->if_capenable ^= IFCAP_LRO; 953 if (mask & IFCAP_VLAN_HWTAGGING) 954 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 955 if (mask & IFCAP_VLAN_HWFILTER) 956 ifp->if_capenable ^= IFCAP_VLAN_HWFILTER; 957 if (mask & IFCAP_VLAN_HWTSO) 958 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 959 960 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 961 IXGBE_CORE_LOCK(adapter); 962 ixgbe_init_locked(adapter); 963 IXGBE_CORE_UNLOCK(adapter); 964 } 965 VLAN_CAPABILITIES(ifp); 966 break; 967 } 968 #if __FreeBSD_version >= 1100036 969 case SIOCGI2C: 970 { 971 struct ixgbe_hw *hw = &adapter->hw; 972 struct ifi2creq i2c; 973 int i; 974 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 975 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 976 if (error != 0) 977 break; 978 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 979 error = EINVAL; 980 break; 981 } 982 if (i2c.len > sizeof(i2c.data)) { 983 error = EINVAL; 984 break; 985 } 986 987 for (i = 0; i < i2c.len; i++) 988 hw->phy.ops.read_i2c_byte(hw, i2c.offset + i, 989 i2c.dev_addr, &i2c.data[i]); 990 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 991 break; 992 } 993 #endif 994 default: 995 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)\n", (int)command); 996 error = ether_ioctl(ifp, command, data); 997 break; 998 } 999 1000 return (error); 1001 } 1002 1003 /* 1004 * Set the various hardware offload abilities. 1005 * 1006 * This takes the ifnet's if_capenable flags (e.g. set by the user using 1007 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 1008 * mbuf offload flags the driver will understand. 1009 */ 1010 static void 1011 ixgbe_set_if_hwassist(struct adapter *adapter) 1012 { 1013 struct ifnet *ifp = adapter->ifp; 1014 1015 ifp->if_hwassist = 0; 1016 #if __FreeBSD_version >= 1000000 1017 if (ifp->if_capenable & IFCAP_TSO4) 1018 ifp->if_hwassist |= CSUM_IP_TSO; 1019 if (ifp->if_capenable & IFCAP_TSO6) 1020 ifp->if_hwassist |= CSUM_IP6_TSO; 1021 if (ifp->if_capenable & IFCAP_TXCSUM) 1022 ifp->if_hwassist |= (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | 1023 CSUM_IP_SCTP); 1024 if (ifp->if_capenable & IFCAP_TXCSUM_IPV6) 1025 ifp->if_hwassist |= (CSUM_IP6_UDP | CSUM_IP6_TCP | 1026 CSUM_IP6_SCTP); 1027 #else 1028 if (ifp->if_capenable & IFCAP_TSO) 1029 ifp->if_hwassist |= CSUM_TSO; 1030 if (ifp->if_capenable & IFCAP_TXCSUM) { 1031 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP); 1032 struct ixgbe_hw *hw = &adapter->hw; 1033 if (hw->mac.type != ixgbe_mac_82598EB) 1034 ifp->if_hwassist |= CSUM_SCTP; 1035 } 1036 #endif 1037 } 1038 1039 /********************************************************************* 1040 * Init entry point 1041 * 1042 * This routine is used in two ways. It is used by the stack as 1043 * init entry point in network interface structure. It is also used 1044 * by the driver as a hw/sw initialization routine to get to a 1045 * consistent state. 1046 * 1047 * return 0 on success, positive on failure 1048 **********************************************************************/ 1049 #define IXGBE_MHADD_MFS_SHIFT 16 1050 1051 static void 1052 ixgbe_init_locked(struct adapter *adapter) 1053 { 1054 struct ifnet *ifp = adapter->ifp; 1055 device_t dev = adapter->dev; 1056 struct ixgbe_hw *hw = &adapter->hw; 1057 struct tx_ring *txr; 1058 struct rx_ring *rxr; 1059 u32 txdctl, mhadd; 1060 u32 rxdctl, rxctrl; 1061 int err = 0; 1062 #ifdef PCI_IOV 1063 enum ixgbe_iov_mode mode; 1064 #endif 1065 1066 mtx_assert(&adapter->core_mtx, MA_OWNED); 1067 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 1068 1069 hw->adapter_stopped = FALSE; 1070 ixgbe_stop_adapter(hw); 1071 callout_stop(&adapter->timer); 1072 1073 #ifdef PCI_IOV 1074 mode = ixgbe_get_iov_mode(adapter); 1075 adapter->pool = ixgbe_max_vfs(mode); 1076 /* Queue indices may change with IOV mode */ 1077 for (int i = 0; i < adapter->num_queues; i++) { 1078 adapter->rx_rings[i].me = ixgbe_pf_que_index(mode, i); 1079 adapter->tx_rings[i].me = ixgbe_pf_que_index(mode, i); 1080 } 1081 #endif 1082 /* reprogram the RAR[0] in case user changed it. */ 1083 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV); 1084 1085 /* Get the latest mac address, User can use a LAA */ 1086 bcopy(IF_LLADDR(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 1087 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1); 1088 hw->addr_ctrl.rar_used_count = 1; 1089 1090 /* Set hardware offload abilities from ifnet flags */ 1091 ixgbe_set_if_hwassist(adapter); 1092 1093 /* Prepare transmit descriptors and buffers */ 1094 if (ixgbe_setup_transmit_structures(adapter)) { 1095 device_printf(dev, "Could not setup transmit structures\n"); 1096 ixgbe_stop(adapter); 1097 return; 1098 } 1099 1100 ixgbe_init_hw(hw); 1101 #ifdef PCI_IOV 1102 ixgbe_initialize_iov(adapter); 1103 #endif 1104 ixgbe_initialize_transmit_units(adapter); 1105 1106 /* Setup Multicast table */ 1107 ixgbe_set_multi(adapter); 1108 1109 /* Determine the correct mbuf pool, based on frame size */ 1110 if (adapter->max_frame_size <= MCLBYTES) 1111 adapter->rx_mbuf_sz = MCLBYTES; 1112 else 1113 adapter->rx_mbuf_sz = MJUMPAGESIZE; 1114 1115 /* Prepare receive descriptors and buffers */ 1116 if (ixgbe_setup_receive_structures(adapter)) { 1117 device_printf(dev, "Could not setup receive structures\n"); 1118 ixgbe_stop(adapter); 1119 return; 1120 } 1121 1122 /* Configure RX settings */ 1123 ixgbe_initialize_receive_units(adapter); 1124 1125 /* Enable SDP & MSIX interrupts based on adapter */ 1126 ixgbe_config_gpie(adapter); 1127 1128 /* Set MTU size */ 1129 if (ifp->if_mtu > ETHERMTU) { 1130 /* aka IXGBE_MAXFRS on 82599 and newer */ 1131 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 1132 mhadd &= ~IXGBE_MHADD_MFS_MASK; 1133 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 1134 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 1135 } 1136 1137 /* Now enable all the queues */ 1138 for (int i = 0; i < adapter->num_queues; i++) { 1139 txr = &adapter->tx_rings[i]; 1140 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 1141 txdctl |= IXGBE_TXDCTL_ENABLE; 1142 /* Set WTHRESH to 8, burst writeback */ 1143 txdctl |= (8 << 16); 1144 /* 1145 * When the internal queue falls below PTHRESH (32), 1146 * start prefetching as long as there are at least 1147 * HTHRESH (1) buffers ready. The values are taken 1148 * from the Intel linux driver 3.8.21. 1149 * Prefetching enables tx line rate even with 1 queue. 1150 */ 1151 txdctl |= (32 << 0) | (1 << 8); 1152 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 1153 } 1154 1155 for (int i = 0, j = 0; i < adapter->num_queues; i++) { 1156 rxr = &adapter->rx_rings[i]; 1157 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 1158 if (hw->mac.type == ixgbe_mac_82598EB) { 1159 /* 1160 ** PTHRESH = 21 1161 ** HTHRESH = 4 1162 ** WTHRESH = 8 1163 */ 1164 rxdctl &= ~0x3FFFFF; 1165 rxdctl |= 0x080420; 1166 } 1167 rxdctl |= IXGBE_RXDCTL_ENABLE; 1168 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 1169 for (; j < 10; j++) { 1170 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 1171 IXGBE_RXDCTL_ENABLE) 1172 break; 1173 else 1174 msec_delay(1); 1175 } 1176 wmb(); 1177 #ifdef DEV_NETMAP 1178 /* 1179 * In netmap mode, we must preserve the buffers made 1180 * available to userspace before the if_init() 1181 * (this is true by default on the TX side, because 1182 * init makes all buffers available to userspace). 1183 * 1184 * netmap_reset() and the device specific routines 1185 * (e.g. ixgbe_setup_receive_rings()) map these 1186 * buffers at the end of the NIC ring, so here we 1187 * must set the RDT (tail) register to make sure 1188 * they are not overwritten. 1189 * 1190 * In this driver the NIC ring starts at RDH = 0, 1191 * RDT points to the last slot available for reception (?), 1192 * so RDT = num_rx_desc - 1 means the whole ring is available. 1193 */ 1194 if (ifp->if_capenable & IFCAP_NETMAP) { 1195 struct netmap_adapter *na = NA(adapter->ifp); 1196 struct netmap_kring *kring = &na->rx_rings[i]; 1197 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 1198 1199 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 1200 } else 1201 #endif /* DEV_NETMAP */ 1202 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), adapter->num_rx_desc - 1); 1203 } 1204 1205 /* Enable Receive engine */ 1206 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 1207 if (hw->mac.type == ixgbe_mac_82598EB) 1208 rxctrl |= IXGBE_RXCTRL_DMBYPS; 1209 rxctrl |= IXGBE_RXCTRL_RXEN; 1210 ixgbe_enable_rx_dma(hw, rxctrl); 1211 1212 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 1213 1214 /* Set up MSI/X routing */ 1215 if (ixgbe_enable_msix) { 1216 ixgbe_configure_ivars(adapter); 1217 /* Set up auto-mask */ 1218 if (hw->mac.type == ixgbe_mac_82598EB) 1219 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1220 else { 1221 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 1222 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 1223 } 1224 } else { /* Simple settings for Legacy/MSI */ 1225 ixgbe_set_ivar(adapter, 0, 0, 0); 1226 ixgbe_set_ivar(adapter, 0, 0, 1); 1227 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1228 } 1229 1230 #ifdef IXGBE_FDIR 1231 /* Init Flow director */ 1232 if (hw->mac.type != ixgbe_mac_82598EB) { 1233 u32 hdrm = 32 << fdir_pballoc; 1234 1235 hw->mac.ops.setup_rxpba(hw, 0, hdrm, PBA_STRATEGY_EQUAL); 1236 ixgbe_init_fdir_signature_82599(&adapter->hw, fdir_pballoc); 1237 } 1238 #endif 1239 1240 /* 1241 * Check on any SFP devices that 1242 * need to be kick-started 1243 */ 1244 if (hw->phy.type == ixgbe_phy_none) { 1245 err = hw->phy.ops.identify(hw); 1246 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1247 device_printf(dev, 1248 "Unsupported SFP+ module type was detected.\n"); 1249 return; 1250 } 1251 } 1252 1253 /* Set moderation on the Link interrupt */ 1254 IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR); 1255 1256 /* Configure Energy Efficient Ethernet for supported devices */ 1257 if (hw->mac.ops.setup_eee) { 1258 err = hw->mac.ops.setup_eee(hw, adapter->eee_enabled); 1259 if (err) 1260 device_printf(dev, "Error setting up EEE: %d\n", err); 1261 } 1262 1263 /* Config/Enable Link */ 1264 ixgbe_config_link(adapter); 1265 1266 /* Hardware Packet Buffer & Flow Control setup */ 1267 ixgbe_config_delay_values(adapter); 1268 1269 /* Initialize the FC settings */ 1270 ixgbe_start_hw(hw); 1271 1272 /* Set up VLAN support and filter */ 1273 ixgbe_setup_vlan_hw_support(adapter); 1274 1275 /* Setup DMA Coalescing */ 1276 ixgbe_config_dmac(adapter); 1277 1278 /* And now turn on interrupts */ 1279 ixgbe_enable_intr(adapter); 1280 1281 #ifdef PCI_IOV 1282 /* Enable the use of the MBX by the VF's */ 1283 { 1284 u32 reg = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1285 reg |= IXGBE_CTRL_EXT_PFRSTD; 1286 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, reg); 1287 } 1288 #endif 1289 1290 /* Now inform the stack we're ready */ 1291 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1292 1293 return; 1294 } 1295 1296 static void 1297 ixgbe_init(void *arg) 1298 { 1299 struct adapter *adapter = arg; 1300 1301 IXGBE_CORE_LOCK(adapter); 1302 ixgbe_init_locked(adapter); 1303 IXGBE_CORE_UNLOCK(adapter); 1304 return; 1305 } 1306 1307 static void 1308 ixgbe_config_gpie(struct adapter *adapter) 1309 { 1310 struct ixgbe_hw *hw = &adapter->hw; 1311 u32 gpie; 1312 1313 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 1314 1315 /* Fan Failure Interrupt */ 1316 if (hw->device_id == IXGBE_DEV_ID_82598AT) 1317 gpie |= IXGBE_SDP1_GPIEN; 1318 1319 /* 1320 * Module detection (SDP2) 1321 * Media ready (SDP1) 1322 */ 1323 if (hw->mac.type == ixgbe_mac_82599EB) { 1324 gpie |= IXGBE_SDP2_GPIEN; 1325 if (hw->device_id != IXGBE_DEV_ID_82599_QSFP_SF_QP) 1326 gpie |= IXGBE_SDP1_GPIEN; 1327 } 1328 1329 /* 1330 * Thermal Failure Detection (X540) 1331 * Link Detection (X552 SFP+, X552/X557-AT) 1332 */ 1333 if (hw->mac.type == ixgbe_mac_X540 || 1334 hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 1335 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 1336 gpie |= IXGBE_SDP0_GPIEN_X540; 1337 1338 if (adapter->msix > 1) { 1339 /* Enable Enhanced MSIX mode */ 1340 gpie |= IXGBE_GPIE_MSIX_MODE; 1341 gpie |= IXGBE_GPIE_EIAME | IXGBE_GPIE_PBA_SUPPORT | 1342 IXGBE_GPIE_OCD; 1343 } 1344 1345 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 1346 return; 1347 } 1348 1349 /* 1350 * Requires adapter->max_frame_size to be set. 1351 */ 1352 static void 1353 ixgbe_config_delay_values(struct adapter *adapter) 1354 { 1355 struct ixgbe_hw *hw = &adapter->hw; 1356 u32 rxpb, frame, size, tmp; 1357 1358 frame = adapter->max_frame_size; 1359 1360 /* Calculate High Water */ 1361 switch (hw->mac.type) { 1362 case ixgbe_mac_X540: 1363 case ixgbe_mac_X550: 1364 case ixgbe_mac_X550EM_x: 1365 tmp = IXGBE_DV_X540(frame, frame); 1366 break; 1367 default: 1368 tmp = IXGBE_DV(frame, frame); 1369 break; 1370 } 1371 size = IXGBE_BT2KB(tmp); 1372 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 1373 hw->fc.high_water[0] = rxpb - size; 1374 1375 /* Now calculate Low Water */ 1376 switch (hw->mac.type) { 1377 case ixgbe_mac_X540: 1378 case ixgbe_mac_X550: 1379 case ixgbe_mac_X550EM_x: 1380 tmp = IXGBE_LOW_DV_X540(frame); 1381 break; 1382 default: 1383 tmp = IXGBE_LOW_DV(frame); 1384 break; 1385 } 1386 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 1387 1388 hw->fc.requested_mode = adapter->fc; 1389 hw->fc.pause_time = IXGBE_FC_PAUSE; 1390 hw->fc.send_xon = TRUE; 1391 } 1392 1393 /* 1394 ** 1395 ** MSIX Interrupt Handlers and Tasklets 1396 ** 1397 */ 1398 1399 static inline void 1400 ixgbe_enable_queue(struct adapter *adapter, u32 vector) 1401 { 1402 struct ixgbe_hw *hw = &adapter->hw; 1403 u64 queue = (u64)(1 << vector); 1404 u32 mask; 1405 1406 if (hw->mac.type == ixgbe_mac_82598EB) { 1407 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1408 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 1409 } else { 1410 mask = (queue & 0xFFFFFFFF); 1411 if (mask) 1412 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 1413 mask = (queue >> 32); 1414 if (mask) 1415 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 1416 } 1417 } 1418 1419 static inline void 1420 ixgbe_disable_queue(struct adapter *adapter, u32 vector) 1421 { 1422 struct ixgbe_hw *hw = &adapter->hw; 1423 u64 queue = (u64)(1 << vector); 1424 u32 mask; 1425 1426 if (hw->mac.type == ixgbe_mac_82598EB) { 1427 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1428 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 1429 } else { 1430 mask = (queue & 0xFFFFFFFF); 1431 if (mask) 1432 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 1433 mask = (queue >> 32); 1434 if (mask) 1435 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 1436 } 1437 } 1438 1439 static void 1440 ixgbe_handle_que(void *context, int pending) 1441 { 1442 struct ix_queue *que = context; 1443 struct adapter *adapter = que->adapter; 1444 struct tx_ring *txr = que->txr; 1445 struct ifnet *ifp = adapter->ifp; 1446 1447 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1448 ixgbe_rxeof(que); 1449 IXGBE_TX_LOCK(txr); 1450 ixgbe_txeof(txr); 1451 #ifndef IXGBE_LEGACY_TX 1452 if (!drbr_empty(ifp, txr->br)) 1453 ixgbe_mq_start_locked(ifp, txr); 1454 #else 1455 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1456 ixgbe_start_locked(txr, ifp); 1457 #endif 1458 IXGBE_TX_UNLOCK(txr); 1459 } 1460 1461 /* Reenable this interrupt */ 1462 if (que->res != NULL) 1463 ixgbe_enable_queue(adapter, que->msix); 1464 else 1465 ixgbe_enable_intr(adapter); 1466 return; 1467 } 1468 1469 1470 /********************************************************************* 1471 * 1472 * Legacy Interrupt Service routine 1473 * 1474 **********************************************************************/ 1475 1476 static void 1477 ixgbe_legacy_irq(void *arg) 1478 { 1479 struct ix_queue *que = arg; 1480 struct adapter *adapter = que->adapter; 1481 struct ixgbe_hw *hw = &adapter->hw; 1482 struct ifnet *ifp = adapter->ifp; 1483 struct tx_ring *txr = adapter->tx_rings; 1484 bool more; 1485 u32 reg_eicr; 1486 1487 1488 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 1489 1490 ++que->irqs; 1491 if (reg_eicr == 0) { 1492 ixgbe_enable_intr(adapter); 1493 return; 1494 } 1495 1496 more = ixgbe_rxeof(que); 1497 1498 IXGBE_TX_LOCK(txr); 1499 ixgbe_txeof(txr); 1500 #ifdef IXGBE_LEGACY_TX 1501 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1502 ixgbe_start_locked(txr, ifp); 1503 #else 1504 if (!drbr_empty(ifp, txr->br)) 1505 ixgbe_mq_start_locked(ifp, txr); 1506 #endif 1507 IXGBE_TX_UNLOCK(txr); 1508 1509 /* Check for fan failure */ 1510 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1511 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1512 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1513 "REPLACE IMMEDIATELY!!\n"); 1514 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1515 } 1516 1517 /* Link status change */ 1518 if (reg_eicr & IXGBE_EICR_LSC) 1519 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1520 1521 /* External PHY interrupt */ 1522 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1523 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) 1524 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1525 1526 if (more) 1527 taskqueue_enqueue(que->tq, &que->que_task); 1528 else 1529 ixgbe_enable_intr(adapter); 1530 return; 1531 } 1532 1533 1534 /********************************************************************* 1535 * 1536 * MSIX Queue Interrupt Service routine 1537 * 1538 **********************************************************************/ 1539 void 1540 ixgbe_msix_que(void *arg) 1541 { 1542 struct ix_queue *que = arg; 1543 struct adapter *adapter = que->adapter; 1544 struct ifnet *ifp = adapter->ifp; 1545 struct tx_ring *txr = que->txr; 1546 struct rx_ring *rxr = que->rxr; 1547 bool more; 1548 u32 newitr = 0; 1549 1550 1551 /* Protect against spurious interrupts */ 1552 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1553 return; 1554 1555 ixgbe_disable_queue(adapter, que->msix); 1556 ++que->irqs; 1557 1558 more = ixgbe_rxeof(que); 1559 1560 IXGBE_TX_LOCK(txr); 1561 ixgbe_txeof(txr); 1562 #ifdef IXGBE_LEGACY_TX 1563 if (!IFQ_DRV_IS_EMPTY(ifp->if_snd)) 1564 ixgbe_start_locked(txr, ifp); 1565 #else 1566 if (!drbr_empty(ifp, txr->br)) 1567 ixgbe_mq_start_locked(ifp, txr); 1568 #endif 1569 IXGBE_TX_UNLOCK(txr); 1570 1571 /* Do AIM now? */ 1572 1573 if (adapter->enable_aim == FALSE) 1574 goto no_calc; 1575 /* 1576 ** Do Adaptive Interrupt Moderation: 1577 ** - Write out last calculated setting 1578 ** - Calculate based on average size over 1579 ** the last interval. 1580 */ 1581 if (que->eitr_setting) 1582 IXGBE_WRITE_REG(&adapter->hw, 1583 IXGBE_EITR(que->msix), que->eitr_setting); 1584 1585 que->eitr_setting = 0; 1586 1587 /* Idle, do nothing */ 1588 if ((txr->bytes == 0) && (rxr->bytes == 0)) 1589 goto no_calc; 1590 1591 if ((txr->bytes) && (txr->packets)) 1592 newitr = txr->bytes/txr->packets; 1593 if ((rxr->bytes) && (rxr->packets)) 1594 newitr = max(newitr, 1595 (rxr->bytes / rxr->packets)); 1596 newitr += 24; /* account for hardware frame, crc */ 1597 1598 /* set an upper boundary */ 1599 newitr = min(newitr, 3000); 1600 1601 /* Be nice to the mid range */ 1602 if ((newitr > 300) && (newitr < 1200)) 1603 newitr = (newitr / 3); 1604 else 1605 newitr = (newitr / 2); 1606 1607 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 1608 newitr |= newitr << 16; 1609 else 1610 newitr |= IXGBE_EITR_CNT_WDIS; 1611 1612 /* save for next interrupt */ 1613 que->eitr_setting = newitr; 1614 1615 /* Reset state */ 1616 txr->bytes = 0; 1617 txr->packets = 0; 1618 rxr->bytes = 0; 1619 rxr->packets = 0; 1620 1621 no_calc: 1622 if (more) 1623 taskqueue_enqueue(que->tq, &que->que_task); 1624 else 1625 ixgbe_enable_queue(adapter, que->msix); 1626 return; 1627 } 1628 1629 1630 static void 1631 ixgbe_msix_link(void *arg) 1632 { 1633 struct adapter *adapter = arg; 1634 struct ixgbe_hw *hw = &adapter->hw; 1635 u32 reg_eicr, mod_mask; 1636 1637 ++adapter->link_irq; 1638 1639 /* Pause other interrupts */ 1640 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 1641 1642 /* First get the cause */ 1643 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 1644 /* Be sure the queue bits are not cleared */ 1645 reg_eicr &= ~IXGBE_EICR_RTX_QUEUE; 1646 /* Clear interrupt with write */ 1647 IXGBE_WRITE_REG(hw, IXGBE_EICR, reg_eicr); 1648 1649 /* Link status change */ 1650 if (reg_eicr & IXGBE_EICR_LSC) { 1651 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 1652 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1653 } 1654 1655 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 1656 #ifdef IXGBE_FDIR 1657 if (reg_eicr & IXGBE_EICR_FLOW_DIR) { 1658 /* This is probably overkill :) */ 1659 if (!atomic_cmpset_int(&adapter->fdir_reinit, 0, 1)) 1660 return; 1661 /* Disable the interrupt */ 1662 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR); 1663 taskqueue_enqueue(adapter->tq, &adapter->fdir_task); 1664 } else 1665 #endif 1666 if (reg_eicr & IXGBE_EICR_ECC) { 1667 device_printf(adapter->dev, "CRITICAL: ECC ERROR!! " 1668 "Please Reboot!!\n"); 1669 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 1670 } 1671 1672 /* Check for over temp condition */ 1673 if (reg_eicr & IXGBE_EICR_TS) { 1674 device_printf(adapter->dev, "CRITICAL: OVER TEMP!! " 1675 "PHY IS SHUT DOWN!!\n"); 1676 device_printf(adapter->dev, "System shutdown required!\n"); 1677 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS); 1678 } 1679 #ifdef PCI_IOV 1680 if (reg_eicr & IXGBE_EICR_MAILBOX) 1681 taskqueue_enqueue(adapter->tq, &adapter->mbx_task); 1682 #endif 1683 } 1684 1685 /* Pluggable optics-related interrupt */ 1686 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP) 1687 mod_mask = IXGBE_EICR_GPI_SDP0_X540; 1688 else 1689 mod_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 1690 1691 if (ixgbe_is_sfp(hw)) { 1692 if (reg_eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw)) { 1693 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1694 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 1695 } else if (reg_eicr & mod_mask) { 1696 IXGBE_WRITE_REG(hw, IXGBE_EICR, mod_mask); 1697 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 1698 } 1699 } 1700 1701 /* Check for fan failure */ 1702 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1703 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1704 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1); 1705 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1706 "REPLACE IMMEDIATELY!!\n"); 1707 } 1708 1709 /* External PHY interrupt */ 1710 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1711 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) { 1712 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 1713 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1714 } 1715 1716 /* Re-enable other interrupts */ 1717 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER); 1718 return; 1719 } 1720 1721 /********************************************************************* 1722 * 1723 * Media Ioctl callback 1724 * 1725 * This routine is called whenever the user queries the status of 1726 * the interface using ifconfig. 1727 * 1728 **********************************************************************/ 1729 static void 1730 ixgbe_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) 1731 { 1732 struct adapter *adapter = ifp->if_softc; 1733 struct ixgbe_hw *hw = &adapter->hw; 1734 int layer; 1735 1736 INIT_DEBUGOUT("ixgbe_media_status: begin"); 1737 IXGBE_CORE_LOCK(adapter); 1738 ixgbe_update_link_status(adapter); 1739 1740 ifmr->ifm_status = IFM_AVALID; 1741 ifmr->ifm_active = IFM_ETHER; 1742 1743 if (!adapter->link_active) { 1744 IXGBE_CORE_UNLOCK(adapter); 1745 return; 1746 } 1747 1748 ifmr->ifm_status |= IFM_ACTIVE; 1749 layer = adapter->phy_layer; 1750 1751 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 1752 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 1753 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1754 switch (adapter->link_speed) { 1755 case IXGBE_LINK_SPEED_10GB_FULL: 1756 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 1757 break; 1758 case IXGBE_LINK_SPEED_1GB_FULL: 1759 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 1760 break; 1761 case IXGBE_LINK_SPEED_100_FULL: 1762 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 1763 break; 1764 } 1765 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1766 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1767 switch (adapter->link_speed) { 1768 case IXGBE_LINK_SPEED_10GB_FULL: 1769 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 1770 break; 1771 } 1772 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 1773 switch (adapter->link_speed) { 1774 case IXGBE_LINK_SPEED_10GB_FULL: 1775 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 1776 break; 1777 case IXGBE_LINK_SPEED_1GB_FULL: 1778 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1779 break; 1780 } 1781 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 1782 switch (adapter->link_speed) { 1783 case IXGBE_LINK_SPEED_10GB_FULL: 1784 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 1785 break; 1786 case IXGBE_LINK_SPEED_1GB_FULL: 1787 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1788 break; 1789 } 1790 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 1791 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1792 switch (adapter->link_speed) { 1793 case IXGBE_LINK_SPEED_10GB_FULL: 1794 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1795 break; 1796 case IXGBE_LINK_SPEED_1GB_FULL: 1797 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1798 break; 1799 } 1800 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1801 switch (adapter->link_speed) { 1802 case IXGBE_LINK_SPEED_10GB_FULL: 1803 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1804 break; 1805 } 1806 /* 1807 ** XXX: These need to use the proper media types once 1808 ** they're added. 1809 */ 1810 #ifndef IFM_ETH_XTYPE 1811 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1812 switch (adapter->link_speed) { 1813 case IXGBE_LINK_SPEED_10GB_FULL: 1814 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1815 break; 1816 case IXGBE_LINK_SPEED_2_5GB_FULL: 1817 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1818 break; 1819 case IXGBE_LINK_SPEED_1GB_FULL: 1820 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1821 break; 1822 } 1823 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1824 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1825 switch (adapter->link_speed) { 1826 case IXGBE_LINK_SPEED_10GB_FULL: 1827 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1828 break; 1829 case IXGBE_LINK_SPEED_2_5GB_FULL: 1830 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1831 break; 1832 case IXGBE_LINK_SPEED_1GB_FULL: 1833 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1834 break; 1835 } 1836 #else 1837 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1838 switch (adapter->link_speed) { 1839 case IXGBE_LINK_SPEED_10GB_FULL: 1840 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 1841 break; 1842 case IXGBE_LINK_SPEED_2_5GB_FULL: 1843 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1844 break; 1845 case IXGBE_LINK_SPEED_1GB_FULL: 1846 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1847 break; 1848 } 1849 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1850 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1851 switch (adapter->link_speed) { 1852 case IXGBE_LINK_SPEED_10GB_FULL: 1853 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 1854 break; 1855 case IXGBE_LINK_SPEED_2_5GB_FULL: 1856 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1857 break; 1858 case IXGBE_LINK_SPEED_1GB_FULL: 1859 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1860 break; 1861 } 1862 #endif 1863 1864 /* If nothing is recognized... */ 1865 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 1866 ifmr->ifm_active |= IFM_UNKNOWN; 1867 1868 #if __FreeBSD_version >= 900025 1869 /* Display current flow control setting used on link */ 1870 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 1871 hw->fc.current_mode == ixgbe_fc_full) 1872 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 1873 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 1874 hw->fc.current_mode == ixgbe_fc_full) 1875 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 1876 #endif 1877 1878 IXGBE_CORE_UNLOCK(adapter); 1879 1880 return; 1881 } 1882 1883 /********************************************************************* 1884 * 1885 * Media Ioctl callback 1886 * 1887 * This routine is called when the user changes speed/duplex using 1888 * media/mediopt option with ifconfig. 1889 * 1890 **********************************************************************/ 1891 static int 1892 ixgbe_media_change(struct ifnet * ifp) 1893 { 1894 struct adapter *adapter = ifp->if_softc; 1895 struct ifmedia *ifm = &adapter->media; 1896 struct ixgbe_hw *hw = &adapter->hw; 1897 ixgbe_link_speed speed = 0; 1898 1899 INIT_DEBUGOUT("ixgbe_media_change: begin"); 1900 1901 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1902 return (EINVAL); 1903 1904 if (hw->phy.media_type == ixgbe_media_type_backplane) 1905 return (ENODEV); 1906 1907 /* 1908 ** We don't actually need to check against the supported 1909 ** media types of the adapter; ifmedia will take care of 1910 ** that for us. 1911 */ 1912 #ifndef IFM_ETH_XTYPE 1913 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1914 case IFM_AUTO: 1915 case IFM_10G_T: 1916 speed |= IXGBE_LINK_SPEED_100_FULL; 1917 case IFM_10G_LRM: 1918 case IFM_10G_SR: /* KR, too */ 1919 case IFM_10G_LR: 1920 case IFM_10G_CX4: /* KX4 */ 1921 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1922 case IFM_10G_TWINAX: 1923 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1924 break; 1925 case IFM_1000_T: 1926 speed |= IXGBE_LINK_SPEED_100_FULL; 1927 case IFM_1000_LX: 1928 case IFM_1000_SX: 1929 case IFM_1000_CX: /* KX */ 1930 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1931 break; 1932 case IFM_100_TX: 1933 speed |= IXGBE_LINK_SPEED_100_FULL; 1934 break; 1935 default: 1936 goto invalid; 1937 } 1938 #else 1939 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1940 case IFM_AUTO: 1941 case IFM_10G_T: 1942 speed |= IXGBE_LINK_SPEED_100_FULL; 1943 case IFM_10G_LRM: 1944 case IFM_10G_KR: 1945 case IFM_10G_LR: 1946 case IFM_10G_KX4: 1947 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1948 case IFM_10G_TWINAX: 1949 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1950 break; 1951 case IFM_1000_T: 1952 speed |= IXGBE_LINK_SPEED_100_FULL; 1953 case IFM_1000_LX: 1954 case IFM_1000_SX: 1955 case IFM_1000_KX: 1956 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1957 break; 1958 case IFM_100_TX: 1959 speed |= IXGBE_LINK_SPEED_100_FULL; 1960 break; 1961 default: 1962 goto invalid; 1963 } 1964 #endif 1965 1966 hw->mac.autotry_restart = TRUE; 1967 hw->mac.ops.setup_link(hw, speed, TRUE); 1968 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1969 adapter->advertise = 0; 1970 } else { 1971 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 1972 adapter->advertise |= 1 << 2; 1973 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 1974 adapter->advertise |= 1 << 1; 1975 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 1976 adapter->advertise |= 1 << 0; 1977 } 1978 1979 return (0); 1980 1981 invalid: 1982 device_printf(adapter->dev, "Invalid media type!\n"); 1983 return (EINVAL); 1984 } 1985 1986 static void 1987 ixgbe_set_promisc(struct adapter *adapter) 1988 { 1989 u_int32_t reg_rctl; 1990 struct ifnet *ifp = adapter->ifp; 1991 int mcnt = 0; 1992 1993 reg_rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 1994 reg_rctl &= (~IXGBE_FCTRL_UPE); 1995 if (ifp->if_flags & IFF_ALLMULTI) 1996 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 1997 else { 1998 struct ifmultiaddr *ifma; 1999 #if __FreeBSD_version < 800000 2000 IF_ADDR_LOCK(ifp); 2001 #else 2002 if_maddr_rlock(ifp); 2003 #endif 2004 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2005 if (ifma->ifma_addr->sa_family != AF_LINK) 2006 continue; 2007 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2008 break; 2009 mcnt++; 2010 } 2011 #if __FreeBSD_version < 800000 2012 IF_ADDR_UNLOCK(ifp); 2013 #else 2014 if_maddr_runlock(ifp); 2015 #endif 2016 } 2017 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 2018 reg_rctl &= (~IXGBE_FCTRL_MPE); 2019 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2020 2021 if (ifp->if_flags & IFF_PROMISC) { 2022 reg_rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2023 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2024 } else if (ifp->if_flags & IFF_ALLMULTI) { 2025 reg_rctl |= IXGBE_FCTRL_MPE; 2026 reg_rctl &= ~IXGBE_FCTRL_UPE; 2027 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2028 } 2029 return; 2030 } 2031 2032 2033 /********************************************************************* 2034 * Multicast Update 2035 * 2036 * This routine is called whenever multicast address list is updated. 2037 * 2038 **********************************************************************/ 2039 #define IXGBE_RAR_ENTRIES 16 2040 2041 static void 2042 ixgbe_set_multi(struct adapter *adapter) 2043 { 2044 u32 fctrl; 2045 u8 *update_ptr; 2046 struct ifmultiaddr *ifma; 2047 struct ixgbe_mc_addr *mta; 2048 int mcnt = 0; 2049 struct ifnet *ifp = adapter->ifp; 2050 2051 IOCTL_DEBUGOUT("ixgbe_set_multi: begin"); 2052 2053 mta = adapter->mta; 2054 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 2055 2056 #if __FreeBSD_version < 800000 2057 IF_ADDR_LOCK(ifp); 2058 #else 2059 if_maddr_rlock(ifp); 2060 #endif 2061 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2062 if (ifma->ifma_addr->sa_family != AF_LINK) 2063 continue; 2064 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2065 break; 2066 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 2067 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 2068 mta[mcnt].vmdq = adapter->pool; 2069 mcnt++; 2070 } 2071 #if __FreeBSD_version < 800000 2072 IF_ADDR_UNLOCK(ifp); 2073 #else 2074 if_maddr_runlock(ifp); 2075 #endif 2076 2077 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 2078 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2079 if (ifp->if_flags & IFF_PROMISC) 2080 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2081 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 2082 ifp->if_flags & IFF_ALLMULTI) { 2083 fctrl |= IXGBE_FCTRL_MPE; 2084 fctrl &= ~IXGBE_FCTRL_UPE; 2085 } else 2086 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2087 2088 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl); 2089 2090 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 2091 update_ptr = (u8 *)mta; 2092 ixgbe_update_mc_addr_list(&adapter->hw, 2093 update_ptr, mcnt, ixgbe_mc_array_itr, TRUE); 2094 } 2095 2096 return; 2097 } 2098 2099 /* 2100 * This is an iterator function now needed by the multicast 2101 * shared code. It simply feeds the shared code routine the 2102 * addresses in the array of ixgbe_set_multi() one by one. 2103 */ 2104 static u8 * 2105 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 2106 { 2107 struct ixgbe_mc_addr *mta; 2108 2109 mta = (struct ixgbe_mc_addr *)*update_ptr; 2110 *vmdq = mta->vmdq; 2111 2112 *update_ptr = (u8*)(mta + 1);; 2113 return (mta->addr); 2114 } 2115 2116 2117 /********************************************************************* 2118 * Timer routine 2119 * 2120 * This routine checks for link status,updates statistics, 2121 * and runs the watchdog check. 2122 * 2123 **********************************************************************/ 2124 2125 static void 2126 ixgbe_local_timer(void *arg) 2127 { 2128 struct adapter *adapter = arg; 2129 device_t dev = adapter->dev; 2130 struct ix_queue *que = adapter->queues; 2131 u64 queues = 0; 2132 int hung = 0; 2133 2134 mtx_assert(&adapter->core_mtx, MA_OWNED); 2135 2136 /* Check for pluggable optics */ 2137 if (adapter->sfp_probe) 2138 if (!ixgbe_sfp_probe(adapter)) 2139 goto out; /* Nothing to do */ 2140 2141 ixgbe_update_link_status(adapter); 2142 ixgbe_update_stats_counters(adapter); 2143 2144 /* 2145 ** Check the TX queues status 2146 ** - mark hung queues so we don't schedule on them 2147 ** - watchdog only if all queues show hung 2148 */ 2149 for (int i = 0; i < adapter->num_queues; i++, que++) { 2150 /* Keep track of queues with work for soft irq */ 2151 if (que->txr->busy) 2152 queues |= ((u64)1 << que->me); 2153 /* 2154 ** Each time txeof runs without cleaning, but there 2155 ** are uncleaned descriptors it increments busy. If 2156 ** we get to the MAX we declare it hung. 2157 */ 2158 if (que->busy == IXGBE_QUEUE_HUNG) { 2159 ++hung; 2160 /* Mark the queue as inactive */ 2161 adapter->active_queues &= ~((u64)1 << que->me); 2162 continue; 2163 } else { 2164 /* Check if we've come back from hung */ 2165 if ((adapter->active_queues & ((u64)1 << que->me)) == 0) 2166 adapter->active_queues |= ((u64)1 << que->me); 2167 } 2168 if (que->busy >= IXGBE_MAX_TX_BUSY) { 2169 device_printf(dev,"Warning queue %d " 2170 "appears to be hung!\n", i); 2171 que->txr->busy = IXGBE_QUEUE_HUNG; 2172 ++hung; 2173 } 2174 2175 } 2176 2177 /* Only truly watchdog if all queues show hung */ 2178 if (hung == adapter->num_queues) 2179 goto watchdog; 2180 else if (queues != 0) { /* Force an IRQ on queues with work */ 2181 ixgbe_rearm_queues(adapter, queues); 2182 } 2183 2184 out: 2185 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 2186 return; 2187 2188 watchdog: 2189 device_printf(adapter->dev, "Watchdog timeout -- resetting\n"); 2190 adapter->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2191 adapter->watchdog_events++; 2192 ixgbe_init_locked(adapter); 2193 } 2194 2195 2196 /* 2197 ** Note: this routine updates the OS on the link state 2198 ** the real check of the hardware only happens with 2199 ** a link interrupt. 2200 */ 2201 static void 2202 ixgbe_update_link_status(struct adapter *adapter) 2203 { 2204 struct ifnet *ifp = adapter->ifp; 2205 device_t dev = adapter->dev; 2206 2207 if (adapter->link_up){ 2208 if (adapter->link_active == FALSE) { 2209 if (bootverbose) 2210 device_printf(dev,"Link is up %d Gbps %s \n", 2211 ((adapter->link_speed == 128)? 10:1), 2212 "Full Duplex"); 2213 adapter->link_active = TRUE; 2214 /* Update any Flow Control changes */ 2215 ixgbe_fc_enable(&adapter->hw); 2216 /* Update DMA coalescing config */ 2217 ixgbe_config_dmac(adapter); 2218 if_link_state_change(ifp, LINK_STATE_UP); 2219 #ifdef PCI_IOV 2220 ixgbe_ping_all_vfs(adapter); 2221 #endif 2222 } 2223 } else { /* Link down */ 2224 if (adapter->link_active == TRUE) { 2225 if (bootverbose) 2226 device_printf(dev,"Link is Down\n"); 2227 if_link_state_change(ifp, LINK_STATE_DOWN); 2228 adapter->link_active = FALSE; 2229 #ifdef PCI_IOV 2230 ixgbe_ping_all_vfs(adapter); 2231 #endif 2232 } 2233 } 2234 2235 return; 2236 } 2237 2238 2239 /********************************************************************* 2240 * 2241 * This routine disables all traffic on the adapter by issuing a 2242 * global reset on the MAC and deallocates TX/RX buffers. 2243 * 2244 **********************************************************************/ 2245 2246 static void 2247 ixgbe_stop(void *arg) 2248 { 2249 struct ifnet *ifp; 2250 struct adapter *adapter = arg; 2251 struct ixgbe_hw *hw = &adapter->hw; 2252 ifp = adapter->ifp; 2253 2254 mtx_assert(&adapter->core_mtx, MA_OWNED); 2255 2256 INIT_DEBUGOUT("ixgbe_stop: begin\n"); 2257 ixgbe_disable_intr(adapter); 2258 callout_stop(&adapter->timer); 2259 2260 /* Let the stack know...*/ 2261 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2262 2263 ixgbe_reset_hw(hw); 2264 hw->adapter_stopped = FALSE; 2265 ixgbe_stop_adapter(hw); 2266 if (hw->mac.type == ixgbe_mac_82599EB) 2267 ixgbe_stop_mac_link_on_d3_82599(hw); 2268 /* Turn off the laser - noop with no optics */ 2269 ixgbe_disable_tx_laser(hw); 2270 2271 /* Update the stack */ 2272 adapter->link_up = FALSE; 2273 ixgbe_update_link_status(adapter); 2274 2275 /* reprogram the RAR[0] in case user changed it. */ 2276 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); 2277 2278 return; 2279 } 2280 2281 2282 /********************************************************************* 2283 * 2284 * Determine hardware revision. 2285 * 2286 **********************************************************************/ 2287 static void 2288 ixgbe_identify_hardware(struct adapter *adapter) 2289 { 2290 device_t dev = adapter->dev; 2291 struct ixgbe_hw *hw = &adapter->hw; 2292 2293 /* Save off the information about this board */ 2294 hw->vendor_id = pci_get_vendor(dev); 2295 hw->device_id = pci_get_device(dev); 2296 hw->revision_id = pci_read_config(dev, PCIR_REVID, 1); 2297 hw->subsystem_vendor_id = 2298 pci_read_config(dev, PCIR_SUBVEND_0, 2); 2299 hw->subsystem_device_id = 2300 pci_read_config(dev, PCIR_SUBDEV_0, 2); 2301 2302 /* 2303 ** Make sure BUSMASTER is set 2304 */ 2305 pci_enable_busmaster(dev); 2306 2307 /* We need this here to set the num_segs below */ 2308 ixgbe_set_mac_type(hw); 2309 2310 /* Pick up the 82599 settings */ 2311 if (hw->mac.type != ixgbe_mac_82598EB) { 2312 hw->phy.smart_speed = ixgbe_smart_speed; 2313 adapter->num_segs = IXGBE_82599_SCATTER; 2314 } else 2315 adapter->num_segs = IXGBE_82598_SCATTER; 2316 2317 return; 2318 } 2319 2320 /********************************************************************* 2321 * 2322 * Determine optic type 2323 * 2324 **********************************************************************/ 2325 static void 2326 ixgbe_setup_optics(struct adapter *adapter) 2327 { 2328 struct ixgbe_hw *hw = &adapter->hw; 2329 int layer; 2330 2331 layer = adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 2332 2333 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) { 2334 adapter->optics = IFM_10G_T; 2335 return; 2336 } 2337 2338 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) { 2339 adapter->optics = IFM_1000_T; 2340 return; 2341 } 2342 2343 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) { 2344 adapter->optics = IFM_1000_SX; 2345 return; 2346 } 2347 2348 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_LR | 2349 IXGBE_PHYSICAL_LAYER_10GBASE_LRM)) { 2350 adapter->optics = IFM_10G_LR; 2351 return; 2352 } 2353 2354 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2355 adapter->optics = IFM_10G_SR; 2356 return; 2357 } 2358 2359 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU) { 2360 adapter->optics = IFM_10G_TWINAX; 2361 return; 2362 } 2363 2364 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | 2365 IXGBE_PHYSICAL_LAYER_10GBASE_CX4)) { 2366 adapter->optics = IFM_10G_CX4; 2367 return; 2368 } 2369 2370 /* If we get here just set the default */ 2371 adapter->optics = IFM_ETHER | IFM_AUTO; 2372 return; 2373 } 2374 2375 /********************************************************************* 2376 * 2377 * Setup the Legacy or MSI Interrupt handler 2378 * 2379 **********************************************************************/ 2380 static int 2381 ixgbe_allocate_legacy(struct adapter *adapter) 2382 { 2383 device_t dev = adapter->dev; 2384 struct ix_queue *que = adapter->queues; 2385 #ifndef IXGBE_LEGACY_TX 2386 struct tx_ring *txr = adapter->tx_rings; 2387 #endif 2388 int error, rid = 0; 2389 2390 /* MSI RID at 1 */ 2391 if (adapter->msix == 1) 2392 rid = 1; 2393 2394 /* We allocate a single interrupt resource */ 2395 adapter->res = bus_alloc_resource_any(dev, 2396 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2397 if (adapter->res == NULL) { 2398 device_printf(dev, "Unable to allocate bus resource: " 2399 "interrupt\n"); 2400 return (ENXIO); 2401 } 2402 2403 /* 2404 * Try allocating a fast interrupt and the associated deferred 2405 * processing contexts. 2406 */ 2407 #ifndef IXGBE_LEGACY_TX 2408 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2409 #endif 2410 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2411 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2412 taskqueue_thread_enqueue, &que->tq); 2413 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s ixq", 2414 device_get_nameunit(adapter->dev)); 2415 2416 /* Tasklets for Link, SFP and Multispeed Fiber */ 2417 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2418 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2419 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2420 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2421 #ifdef IXGBE_FDIR 2422 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2423 #endif 2424 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2425 taskqueue_thread_enqueue, &adapter->tq); 2426 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2427 device_get_nameunit(adapter->dev)); 2428 2429 if ((error = bus_setup_intr(dev, adapter->res, 2430 INTR_TYPE_NET | INTR_MPSAFE, NULL, ixgbe_legacy_irq, 2431 que, &adapter->tag)) != 0) { 2432 device_printf(dev, "Failed to register fast interrupt " 2433 "handler: %d\n", error); 2434 taskqueue_free(que->tq); 2435 taskqueue_free(adapter->tq); 2436 que->tq = NULL; 2437 adapter->tq = NULL; 2438 return (error); 2439 } 2440 /* For simplicity in the handlers */ 2441 adapter->active_queues = IXGBE_EIMS_ENABLE_MASK; 2442 2443 return (0); 2444 } 2445 2446 2447 /********************************************************************* 2448 * 2449 * Setup MSIX Interrupt resources and handlers 2450 * 2451 **********************************************************************/ 2452 static int 2453 ixgbe_allocate_msix(struct adapter *adapter) 2454 { 2455 device_t dev = adapter->dev; 2456 struct ix_queue *que = adapter->queues; 2457 struct tx_ring *txr = adapter->tx_rings; 2458 int error, rid, vector = 0; 2459 int cpu_id = 0; 2460 #ifdef RSS 2461 cpuset_t cpu_mask; 2462 #endif 2463 2464 #ifdef RSS 2465 /* 2466 * If we're doing RSS, the number of queues needs to 2467 * match the number of RSS buckets that are configured. 2468 * 2469 * + If there's more queues than RSS buckets, we'll end 2470 * up with queues that get no traffic. 2471 * 2472 * + If there's more RSS buckets than queues, we'll end 2473 * up having multiple RSS buckets map to the same queue, 2474 * so there'll be some contention. 2475 */ 2476 if (adapter->num_queues != rss_getnumbuckets()) { 2477 device_printf(dev, 2478 "%s: number of queues (%d) != number of RSS buckets (%d)" 2479 "; performance will be impacted.\n", 2480 __func__, 2481 adapter->num_queues, 2482 rss_getnumbuckets()); 2483 } 2484 #endif 2485 2486 for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) { 2487 rid = vector + 1; 2488 que->res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 2489 RF_SHAREABLE | RF_ACTIVE); 2490 if (que->res == NULL) { 2491 device_printf(dev,"Unable to allocate" 2492 " bus resource: que interrupt [%d]\n", vector); 2493 return (ENXIO); 2494 } 2495 /* Set the handler function */ 2496 error = bus_setup_intr(dev, que->res, 2497 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2498 ixgbe_msix_que, que, &que->tag); 2499 if (error) { 2500 que->res = NULL; 2501 device_printf(dev, "Failed to register QUE handler"); 2502 return (error); 2503 } 2504 #if __FreeBSD_version >= 800504 2505 bus_describe_intr(dev, que->res, que->tag, "q%d", i); 2506 #endif 2507 que->msix = vector; 2508 adapter->active_queues |= (u64)(1 << que->msix); 2509 #ifdef RSS 2510 /* 2511 * The queue ID is used as the RSS layer bucket ID. 2512 * We look up the queue ID -> RSS CPU ID and select 2513 * that. 2514 */ 2515 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 2516 #else 2517 /* 2518 * Bind the msix vector, and thus the 2519 * rings to the corresponding cpu. 2520 * 2521 * This just happens to match the default RSS round-robin 2522 * bucket -> queue -> CPU allocation. 2523 */ 2524 if (adapter->num_queues > 1) 2525 cpu_id = i; 2526 #endif 2527 if (adapter->num_queues > 1) 2528 bus_bind_intr(dev, que->res, cpu_id); 2529 #ifdef IXGBE_DEBUG 2530 #ifdef RSS 2531 device_printf(dev, 2532 "Bound RSS bucket %d to CPU %d\n", 2533 i, cpu_id); 2534 #else 2535 device_printf(dev, 2536 "Bound queue %d to cpu %d\n", 2537 i, cpu_id); 2538 #endif 2539 #endif /* IXGBE_DEBUG */ 2540 2541 2542 #ifndef IXGBE_LEGACY_TX 2543 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2544 #endif 2545 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2546 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2547 taskqueue_thread_enqueue, &que->tq); 2548 #ifdef RSS 2549 CPU_SETOF(cpu_id, &cpu_mask); 2550 taskqueue_start_threads_cpuset(&que->tq, 1, PI_NET, 2551 &cpu_mask, 2552 "%s (bucket %d)", 2553 device_get_nameunit(adapter->dev), 2554 cpu_id); 2555 #else 2556 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s:q%d", 2557 device_get_nameunit(adapter->dev), i); 2558 #endif 2559 } 2560 2561 /* and Link */ 2562 rid = vector + 1; 2563 adapter->res = bus_alloc_resource_any(dev, 2564 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2565 if (!adapter->res) { 2566 device_printf(dev,"Unable to allocate" 2567 " bus resource: Link interrupt [%d]\n", rid); 2568 return (ENXIO); 2569 } 2570 /* Set the link handler function */ 2571 error = bus_setup_intr(dev, adapter->res, 2572 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2573 ixgbe_msix_link, adapter, &adapter->tag); 2574 if (error) { 2575 adapter->res = NULL; 2576 device_printf(dev, "Failed to register LINK handler"); 2577 return (error); 2578 } 2579 #if __FreeBSD_version >= 800504 2580 bus_describe_intr(dev, adapter->res, adapter->tag, "link"); 2581 #endif 2582 adapter->vector = vector; 2583 /* Tasklets for Link, SFP and Multispeed Fiber */ 2584 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2585 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2586 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2587 #ifdef PCI_IOV 2588 TASK_INIT(&adapter->mbx_task, 0, ixgbe_handle_mbx, adapter); 2589 #endif 2590 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2591 #ifdef IXGBE_FDIR 2592 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2593 #endif 2594 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2595 taskqueue_thread_enqueue, &adapter->tq); 2596 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2597 device_get_nameunit(adapter->dev)); 2598 2599 return (0); 2600 } 2601 2602 /* 2603 * Setup Either MSI/X or MSI 2604 */ 2605 static int 2606 ixgbe_setup_msix(struct adapter *adapter) 2607 { 2608 device_t dev = adapter->dev; 2609 int rid, want, queues, msgs; 2610 2611 /* Override by tuneable */ 2612 if (ixgbe_enable_msix == 0) 2613 goto msi; 2614 2615 /* First try MSI/X */ 2616 msgs = pci_msix_count(dev); 2617 if (msgs == 0) 2618 goto msi; 2619 rid = PCIR_BAR(MSIX_82598_BAR); 2620 adapter->msix_mem = bus_alloc_resource_any(dev, 2621 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2622 if (adapter->msix_mem == NULL) { 2623 rid += 4; /* 82599 maps in higher BAR */ 2624 adapter->msix_mem = bus_alloc_resource_any(dev, 2625 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2626 } 2627 if (adapter->msix_mem == NULL) { 2628 /* May not be enabled */ 2629 device_printf(adapter->dev, 2630 "Unable to map MSIX table \n"); 2631 goto msi; 2632 } 2633 2634 /* Figure out a reasonable auto config value */ 2635 queues = (mp_ncpus > (msgs - 1)) ? (msgs - 1) : mp_ncpus; 2636 2637 #ifdef RSS 2638 /* If we're doing RSS, clamp at the number of RSS buckets */ 2639 if (queues > rss_getnumbuckets()) 2640 queues = rss_getnumbuckets(); 2641 #endif 2642 2643 if (ixgbe_num_queues != 0) 2644 queues = ixgbe_num_queues; 2645 /* Set max queues to 8 when autoconfiguring */ 2646 else if ((ixgbe_num_queues == 0) && (queues > 8)) 2647 queues = 8; 2648 2649 /* reflect correct sysctl value */ 2650 ixgbe_num_queues = queues; 2651 2652 /* 2653 ** Want one vector (RX/TX pair) per queue 2654 ** plus an additional for Link. 2655 */ 2656 want = queues + 1; 2657 if (msgs >= want) 2658 msgs = want; 2659 else { 2660 device_printf(adapter->dev, 2661 "MSIX Configuration Problem, " 2662 "%d vectors but %d queues wanted!\n", 2663 msgs, want); 2664 goto msi; 2665 } 2666 if ((pci_alloc_msix(dev, &msgs) == 0) && (msgs == want)) { 2667 device_printf(adapter->dev, 2668 "Using MSIX interrupts with %d vectors\n", msgs); 2669 adapter->num_queues = queues; 2670 return (msgs); 2671 } 2672 /* 2673 ** If MSIX alloc failed or provided us with 2674 ** less than needed, free and fall through to MSI 2675 */ 2676 pci_release_msi(dev); 2677 2678 msi: 2679 if (adapter->msix_mem != NULL) { 2680 bus_release_resource(dev, SYS_RES_MEMORY, 2681 rid, adapter->msix_mem); 2682 adapter->msix_mem = NULL; 2683 } 2684 msgs = 1; 2685 if (pci_alloc_msi(dev, &msgs) == 0) { 2686 device_printf(adapter->dev, "Using an MSI interrupt\n"); 2687 return (msgs); 2688 } 2689 device_printf(adapter->dev, "Using a Legacy interrupt\n"); 2690 return (0); 2691 } 2692 2693 2694 static int 2695 ixgbe_allocate_pci_resources(struct adapter *adapter) 2696 { 2697 int rid; 2698 device_t dev = adapter->dev; 2699 2700 rid = PCIR_BAR(0); 2701 adapter->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2702 &rid, RF_ACTIVE); 2703 2704 if (!(adapter->pci_mem)) { 2705 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2706 return (ENXIO); 2707 } 2708 2709 /* Save bus_space values for READ/WRITE_REG macros */ 2710 adapter->osdep.mem_bus_space_tag = 2711 rman_get_bustag(adapter->pci_mem); 2712 adapter->osdep.mem_bus_space_handle = 2713 rman_get_bushandle(adapter->pci_mem); 2714 /* Set hw values for shared code */ 2715 adapter->hw.hw_addr = (u8 *) &adapter->osdep.mem_bus_space_handle; 2716 adapter->hw.back = adapter; 2717 2718 /* Default to 1 queue if MSI-X setup fails */ 2719 adapter->num_queues = 1; 2720 2721 /* 2722 ** Now setup MSI or MSI-X, should 2723 ** return us the number of supported 2724 ** vectors. (Will be 1 for MSI) 2725 */ 2726 adapter->msix = ixgbe_setup_msix(adapter); 2727 return (0); 2728 } 2729 2730 static void 2731 ixgbe_free_pci_resources(struct adapter * adapter) 2732 { 2733 struct ix_queue *que = adapter->queues; 2734 device_t dev = adapter->dev; 2735 int rid, memrid; 2736 2737 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 2738 memrid = PCIR_BAR(MSIX_82598_BAR); 2739 else 2740 memrid = PCIR_BAR(MSIX_82599_BAR); 2741 2742 /* 2743 ** There is a slight possibility of a failure mode 2744 ** in attach that will result in entering this function 2745 ** before interrupt resources have been initialized, and 2746 ** in that case we do not want to execute the loops below 2747 ** We can detect this reliably by the state of the adapter 2748 ** res pointer. 2749 */ 2750 if (adapter->res == NULL) 2751 goto mem; 2752 2753 /* 2754 ** Release all msix queue resources: 2755 */ 2756 for (int i = 0; i < adapter->num_queues; i++, que++) { 2757 rid = que->msix + 1; 2758 if (que->tag != NULL) { 2759 bus_teardown_intr(dev, que->res, que->tag); 2760 que->tag = NULL; 2761 } 2762 if (que->res != NULL) 2763 bus_release_resource(dev, SYS_RES_IRQ, rid, que->res); 2764 } 2765 2766 2767 /* Clean the Legacy or Link interrupt last */ 2768 if (adapter->vector) /* we are doing MSIX */ 2769 rid = adapter->vector + 1; 2770 else 2771 (adapter->msix != 0) ? (rid = 1):(rid = 0); 2772 2773 if (adapter->tag != NULL) { 2774 bus_teardown_intr(dev, adapter->res, adapter->tag); 2775 adapter->tag = NULL; 2776 } 2777 if (adapter->res != NULL) 2778 bus_release_resource(dev, SYS_RES_IRQ, rid, adapter->res); 2779 2780 mem: 2781 if (adapter->msix) 2782 pci_release_msi(dev); 2783 2784 if (adapter->msix_mem != NULL) 2785 bus_release_resource(dev, SYS_RES_MEMORY, 2786 memrid, adapter->msix_mem); 2787 2788 if (adapter->pci_mem != NULL) 2789 bus_release_resource(dev, SYS_RES_MEMORY, 2790 PCIR_BAR(0), adapter->pci_mem); 2791 2792 return; 2793 } 2794 2795 /********************************************************************* 2796 * 2797 * Setup networking device structure and register an interface. 2798 * 2799 **********************************************************************/ 2800 static int 2801 ixgbe_setup_interface(device_t dev, struct adapter *adapter) 2802 { 2803 struct ifnet *ifp; 2804 2805 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 2806 2807 ifp = adapter->ifp = if_alloc(IFT_ETHER); 2808 if (ifp == NULL) { 2809 device_printf(dev, "can not allocate ifnet structure\n"); 2810 return (-1); 2811 } 2812 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 2813 ifp->if_baudrate = IF_Gbps(10); 2814 ifp->if_init = ixgbe_init; 2815 ifp->if_softc = adapter; 2816 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2817 ifp->if_ioctl = ixgbe_ioctl; 2818 #if __FreeBSD_version >= 1100036 2819 if_setgetcounterfn(ifp, ixgbe_get_counter); 2820 #endif 2821 #if __FreeBSD_version >= 1100045 2822 /* TSO parameters */ 2823 ifp->if_hw_tsomax = 65518; 2824 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 2825 ifp->if_hw_tsomaxsegsize = 2048; 2826 #endif 2827 #ifndef IXGBE_LEGACY_TX 2828 ifp->if_transmit = ixgbe_mq_start; 2829 ifp->if_qflush = ixgbe_qflush; 2830 #else 2831 ifp->if_start = ixgbe_start; 2832 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2); 2833 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 2; 2834 IFQ_SET_READY(&ifp->if_snd); 2835 #endif 2836 2837 ether_ifattach(ifp, adapter->hw.mac.addr); 2838 2839 adapter->max_frame_size = 2840 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 2841 2842 /* 2843 * Tell the upper layer(s) we support long frames. 2844 */ 2845 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 2846 2847 /* Set capability flags */ 2848 ifp->if_capabilities |= IFCAP_RXCSUM 2849 | IFCAP_TXCSUM 2850 | IFCAP_RXCSUM_IPV6 2851 | IFCAP_TXCSUM_IPV6 2852 | IFCAP_TSO4 2853 | IFCAP_TSO6 2854 | IFCAP_LRO 2855 | IFCAP_VLAN_HWTAGGING 2856 | IFCAP_VLAN_HWTSO 2857 | IFCAP_VLAN_HWCSUM 2858 | IFCAP_JUMBO_MTU 2859 | IFCAP_VLAN_MTU 2860 | IFCAP_HWSTATS; 2861 2862 /* Enable the above capabilities by default */ 2863 ifp->if_capenable = ifp->if_capabilities; 2864 2865 /* 2866 ** Don't turn this on by default, if vlans are 2867 ** created on another pseudo device (eg. lagg) 2868 ** then vlan events are not passed thru, breaking 2869 ** operation, but with HW FILTER off it works. If 2870 ** using vlans directly on the ixgbe driver you can 2871 ** enable this and get full hardware tag filtering. 2872 */ 2873 ifp->if_capabilities |= IFCAP_VLAN_HWFILTER; 2874 2875 /* 2876 * Specify the media types supported by this adapter and register 2877 * callbacks to update media and link information 2878 */ 2879 ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change, 2880 ixgbe_media_status); 2881 2882 adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw); 2883 ixgbe_add_media_types(adapter); 2884 2885 /* Set autoselect media by default */ 2886 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2887 2888 return (0); 2889 } 2890 2891 static void 2892 ixgbe_add_media_types(struct adapter *adapter) 2893 { 2894 struct ixgbe_hw *hw = &adapter->hw; 2895 device_t dev = adapter->dev; 2896 int layer; 2897 2898 layer = adapter->phy_layer; 2899 2900 /* Media types with matching FreeBSD media defines */ 2901 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 2902 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_T, 0, NULL); 2903 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 2904 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); 2905 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 2906 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 0, NULL); 2907 2908 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2909 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2910 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_TWINAX, 0, NULL); 2911 2912 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 2913 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 2914 if (hw->phy.multispeed_fiber) 2915 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_LX, 0, NULL); 2916 } 2917 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2918 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2919 if (hw->phy.multispeed_fiber) 2920 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2921 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2922 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2923 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2924 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2925 2926 #ifdef IFM_ETH_XTYPE 2927 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2928 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 2929 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 2930 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 2931 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2932 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 2933 #else 2934 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 2935 device_printf(dev, "Media supported: 10GbaseKR\n"); 2936 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 2937 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2938 } 2939 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 2940 device_printf(dev, "Media supported: 10GbaseKX4\n"); 2941 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 2942 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2943 } 2944 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 2945 device_printf(dev, "Media supported: 1000baseKX\n"); 2946 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 2947 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 2948 } 2949 #endif 2950 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 2951 device_printf(dev, "Media supported: 1000baseBX\n"); 2952 2953 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 2954 ifmedia_add(&adapter->media, 2955 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 2956 ifmedia_add(&adapter->media, 2957 IFM_ETHER | IFM_1000_T, 0, NULL); 2958 } 2959 2960 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2961 } 2962 2963 static void 2964 ixgbe_config_link(struct adapter *adapter) 2965 { 2966 struct ixgbe_hw *hw = &adapter->hw; 2967 u32 autoneg, err = 0; 2968 bool sfp, negotiate; 2969 2970 sfp = ixgbe_is_sfp(hw); 2971 2972 if (sfp) { 2973 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 2974 } else { 2975 if (hw->mac.ops.check_link) 2976 err = ixgbe_check_link(hw, &adapter->link_speed, 2977 &adapter->link_up, FALSE); 2978 if (err) 2979 goto out; 2980 autoneg = hw->phy.autoneg_advertised; 2981 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 2982 err = hw->mac.ops.get_link_capabilities(hw, 2983 &autoneg, &negotiate); 2984 if (err) 2985 goto out; 2986 if (hw->mac.ops.setup_link) 2987 err = hw->mac.ops.setup_link(hw, 2988 autoneg, adapter->link_up); 2989 } 2990 out: 2991 return; 2992 } 2993 2994 2995 /********************************************************************* 2996 * 2997 * Enable transmit units. 2998 * 2999 **********************************************************************/ 3000 static void 3001 ixgbe_initialize_transmit_units(struct adapter *adapter) 3002 { 3003 struct tx_ring *txr = adapter->tx_rings; 3004 struct ixgbe_hw *hw = &adapter->hw; 3005 3006 /* Setup the Base and Length of the Tx Descriptor Ring */ 3007 for (int i = 0; i < adapter->num_queues; i++, txr++) { 3008 u64 tdba = txr->txdma.dma_paddr; 3009 u32 txctrl = 0; 3010 int j = txr->me; 3011 3012 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 3013 (tdba & 0x00000000ffffffffULL)); 3014 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 3015 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 3016 adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 3017 3018 /* Setup the HW Tx Head and Tail descriptor pointers */ 3019 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 3020 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 3021 3022 /* Cache the tail address */ 3023 txr->tail = IXGBE_TDT(j); 3024 3025 /* Disable Head Writeback */ 3026 /* 3027 * Note: for X550 series devices, these registers are actually 3028 * prefixed with TPH_ isntead of DCA_, but the addresses and 3029 * fields remain the same. 3030 */ 3031 switch (hw->mac.type) { 3032 case ixgbe_mac_82598EB: 3033 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 3034 break; 3035 default: 3036 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 3037 break; 3038 } 3039 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 3040 switch (hw->mac.type) { 3041 case ixgbe_mac_82598EB: 3042 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 3043 break; 3044 default: 3045 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 3046 break; 3047 } 3048 3049 } 3050 3051 if (hw->mac.type != ixgbe_mac_82598EB) { 3052 u32 dmatxctl, rttdcs; 3053 #ifdef PCI_IOV 3054 enum ixgbe_iov_mode mode = ixgbe_get_iov_mode(adapter); 3055 #endif 3056 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 3057 dmatxctl |= IXGBE_DMATXCTL_TE; 3058 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 3059 /* Disable arbiter to set MTQC */ 3060 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 3061 rttdcs |= IXGBE_RTTDCS_ARBDIS; 3062 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3063 #ifdef PCI_IOV 3064 IXGBE_WRITE_REG(hw, IXGBE_MTQC, ixgbe_get_mtqc(mode)); 3065 #else 3066 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB); 3067 #endif 3068 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 3069 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3070 } 3071 3072 return; 3073 } 3074 3075 static void 3076 ixgbe_initialize_rss_mapping(struct adapter *adapter) 3077 { 3078 struct ixgbe_hw *hw = &adapter->hw; 3079 u32 reta = 0, mrqc, rss_key[10]; 3080 int queue_id, table_size, index_mult; 3081 #ifdef RSS 3082 u32 rss_hash_config; 3083 #endif 3084 #ifdef PCI_IOV 3085 enum ixgbe_iov_mode mode; 3086 #endif 3087 3088 #ifdef RSS 3089 /* Fetch the configured RSS key */ 3090 rss_getkey((uint8_t *) &rss_key); 3091 #else 3092 /* set up random bits */ 3093 arc4rand(&rss_key, sizeof(rss_key), 0); 3094 #endif 3095 3096 /* Set multiplier for RETA setup and table size based on MAC */ 3097 index_mult = 0x1; 3098 table_size = 128; 3099 switch (adapter->hw.mac.type) { 3100 case ixgbe_mac_82598EB: 3101 index_mult = 0x11; 3102 break; 3103 case ixgbe_mac_X550: 3104 case ixgbe_mac_X550EM_x: 3105 table_size = 512; 3106 break; 3107 default: 3108 break; 3109 } 3110 3111 /* Set up the redirection table */ 3112 for (int i = 0, j = 0; i < table_size; i++, j++) { 3113 if (j == adapter->num_queues) j = 0; 3114 #ifdef RSS 3115 /* 3116 * Fetch the RSS bucket id for the given indirection entry. 3117 * Cap it at the number of configured buckets (which is 3118 * num_queues.) 3119 */ 3120 queue_id = rss_get_indirection_to_bucket(i); 3121 queue_id = queue_id % adapter->num_queues; 3122 #else 3123 queue_id = (j * index_mult); 3124 #endif 3125 /* 3126 * The low 8 bits are for hash value (n+0); 3127 * The next 8 bits are for hash value (n+1), etc. 3128 */ 3129 reta = reta >> 8; 3130 reta = reta | ( ((uint32_t) queue_id) << 24); 3131 if ((i & 3) == 3) { 3132 if (i < 128) 3133 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 3134 else 3135 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), reta); 3136 reta = 0; 3137 } 3138 } 3139 3140 /* Now fill our hash function seeds */ 3141 for (int i = 0; i < 10; i++) 3142 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 3143 3144 /* Perform hash on these packet types */ 3145 #ifdef RSS 3146 mrqc = IXGBE_MRQC_RSSEN; 3147 rss_hash_config = rss_gethashconfig(); 3148 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 3149 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 3150 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 3151 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 3152 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 3153 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 3154 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 3155 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3156 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 3157 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 3158 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 3159 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 3160 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 3161 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3162 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4_EX) 3163 device_printf(adapter->dev, 3164 "%s: RSS_HASHTYPE_RSS_UDP_IPV4_EX defined, " 3165 "but not supported\n", __func__); 3166 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 3167 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3168 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 3169 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 3170 #else 3171 /* 3172 * Disable UDP - IP fragments aren't currently being handled 3173 * and so we end up with a mix of 2-tuple and 4-tuple 3174 * traffic. 3175 */ 3176 mrqc = IXGBE_MRQC_RSSEN 3177 | IXGBE_MRQC_RSS_FIELD_IPV4 3178 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3179 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP 3180 | IXGBE_MRQC_RSS_FIELD_IPV6_EX 3181 | IXGBE_MRQC_RSS_FIELD_IPV6 3182 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP 3183 ; 3184 #endif /* RSS */ 3185 #ifdef PCI_IOV 3186 mode = ixgbe_get_iov_mode(adapter); 3187 mrqc |= ixgbe_get_mrqc(mode); 3188 #endif 3189 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3190 } 3191 3192 3193 /********************************************************************* 3194 * 3195 * Setup receive registers and features. 3196 * 3197 **********************************************************************/ 3198 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 3199 3200 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 3201 3202 static void 3203 ixgbe_initialize_receive_units(struct adapter *adapter) 3204 { 3205 struct rx_ring *rxr = adapter->rx_rings; 3206 struct ixgbe_hw *hw = &adapter->hw; 3207 struct ifnet *ifp = adapter->ifp; 3208 u32 bufsz, fctrl, srrctl, rxcsum; 3209 u32 hlreg; 3210 3211 /* 3212 * Make sure receives are disabled while 3213 * setting up the descriptor ring 3214 */ 3215 ixgbe_disable_rx(hw); 3216 3217 /* Enable broadcasts */ 3218 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 3219 fctrl |= IXGBE_FCTRL_BAM; 3220 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3221 fctrl |= IXGBE_FCTRL_DPF; 3222 fctrl |= IXGBE_FCTRL_PMCF; 3223 } 3224 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 3225 3226 /* Set for Jumbo Frames? */ 3227 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3228 if (ifp->if_mtu > ETHERMTU) 3229 hlreg |= IXGBE_HLREG0_JUMBOEN; 3230 else 3231 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 3232 #ifdef DEV_NETMAP 3233 /* crcstrip is conditional in netmap (in RDRXCTL too ?) */ 3234 if (ifp->if_capenable & IFCAP_NETMAP && !ix_crcstrip) 3235 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 3236 else 3237 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 3238 #endif /* DEV_NETMAP */ 3239 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 3240 3241 bufsz = (adapter->rx_mbuf_sz + 3242 BSIZEPKT_ROUNDUP) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 3243 3244 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 3245 u64 rdba = rxr->rxdma.dma_paddr; 3246 int j = rxr->me; 3247 3248 /* Setup the Base and Length of the Rx Descriptor Ring */ 3249 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 3250 (rdba & 0x00000000ffffffffULL)); 3251 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 3252 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 3253 adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 3254 3255 /* Set up the SRRCTL register */ 3256 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 3257 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 3258 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 3259 srrctl |= bufsz; 3260 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 3261 3262 /* 3263 * Set DROP_EN iff we have no flow control and >1 queue. 3264 * Note that srrctl was cleared shortly before during reset, 3265 * so we do not need to clear the bit, but do it just in case 3266 * this code is moved elsewhere. 3267 */ 3268 if (adapter->num_queues > 1 && 3269 adapter->hw.fc.requested_mode == ixgbe_fc_none) { 3270 srrctl |= IXGBE_SRRCTL_DROP_EN; 3271 } else { 3272 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 3273 } 3274 3275 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 3276 3277 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 3278 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 3279 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 3280 3281 /* Set the driver rx tail address */ 3282 rxr->tail = IXGBE_RDT(rxr->me); 3283 } 3284 3285 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 3286 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 3287 IXGBE_PSRTYPE_UDPHDR | 3288 IXGBE_PSRTYPE_IPV4HDR | 3289 IXGBE_PSRTYPE_IPV6HDR; 3290 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 3291 } 3292 3293 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 3294 3295 ixgbe_initialize_rss_mapping(adapter); 3296 3297 if (adapter->num_queues > 1) { 3298 /* RSS and RX IPP Checksum are mutually exclusive */ 3299 rxcsum |= IXGBE_RXCSUM_PCSD; 3300 } 3301 3302 if (ifp->if_capenable & IFCAP_RXCSUM) 3303 rxcsum |= IXGBE_RXCSUM_PCSD; 3304 3305 /* This is useful for calculating UDP/IP fragment checksums */ 3306 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 3307 rxcsum |= IXGBE_RXCSUM_IPPCSE; 3308 3309 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 3310 3311 return; 3312 } 3313 3314 3315 /* 3316 ** This routine is run via an vlan config EVENT, 3317 ** it enables us to use the HW Filter table since 3318 ** we can get the vlan id. This just creates the 3319 ** entry in the soft version of the VFTA, init will 3320 ** repopulate the real table. 3321 */ 3322 static void 3323 ixgbe_register_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3324 { 3325 struct adapter *adapter = ifp->if_softc; 3326 u16 index, bit; 3327 3328 if (ifp->if_softc != arg) /* Not our event */ 3329 return; 3330 3331 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3332 return; 3333 3334 IXGBE_CORE_LOCK(adapter); 3335 index = (vtag >> 5) & 0x7F; 3336 bit = vtag & 0x1F; 3337 adapter->shadow_vfta[index] |= (1 << bit); 3338 ++adapter->num_vlans; 3339 ixgbe_setup_vlan_hw_support(adapter); 3340 IXGBE_CORE_UNLOCK(adapter); 3341 } 3342 3343 /* 3344 ** This routine is run via an vlan 3345 ** unconfig EVENT, remove our entry 3346 ** in the soft vfta. 3347 */ 3348 static void 3349 ixgbe_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3350 { 3351 struct adapter *adapter = ifp->if_softc; 3352 u16 index, bit; 3353 3354 if (ifp->if_softc != arg) 3355 return; 3356 3357 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3358 return; 3359 3360 IXGBE_CORE_LOCK(adapter); 3361 index = (vtag >> 5) & 0x7F; 3362 bit = vtag & 0x1F; 3363 adapter->shadow_vfta[index] &= ~(1 << bit); 3364 --adapter->num_vlans; 3365 /* Re-init to load the changes */ 3366 ixgbe_setup_vlan_hw_support(adapter); 3367 IXGBE_CORE_UNLOCK(adapter); 3368 } 3369 3370 static void 3371 ixgbe_setup_vlan_hw_support(struct adapter *adapter) 3372 { 3373 struct ifnet *ifp = adapter->ifp; 3374 struct ixgbe_hw *hw = &adapter->hw; 3375 struct rx_ring *rxr; 3376 u32 ctrl; 3377 3378 3379 /* 3380 ** We get here thru init_locked, meaning 3381 ** a soft reset, this has already cleared 3382 ** the VFTA and other state, so if there 3383 ** have been no vlan's registered do nothing. 3384 */ 3385 if (adapter->num_vlans == 0) 3386 return; 3387 3388 /* Setup the queues for vlans */ 3389 for (int i = 0; i < adapter->num_queues; i++) { 3390 rxr = &adapter->rx_rings[i]; 3391 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 3392 if (hw->mac.type != ixgbe_mac_82598EB) { 3393 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 3394 ctrl |= IXGBE_RXDCTL_VME; 3395 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 3396 } 3397 rxr->vtag_strip = TRUE; 3398 } 3399 3400 if ((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0) 3401 return; 3402 /* 3403 ** A soft reset zero's out the VFTA, so 3404 ** we need to repopulate it now. 3405 */ 3406 for (int i = 0; i < IXGBE_VFTA_SIZE; i++) 3407 if (adapter->shadow_vfta[i] != 0) 3408 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 3409 adapter->shadow_vfta[i]); 3410 3411 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 3412 /* Enable the Filter Table if enabled */ 3413 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER) { 3414 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 3415 ctrl |= IXGBE_VLNCTRL_VFE; 3416 } 3417 if (hw->mac.type == ixgbe_mac_82598EB) 3418 ctrl |= IXGBE_VLNCTRL_VME; 3419 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 3420 } 3421 3422 static void 3423 ixgbe_enable_intr(struct adapter *adapter) 3424 { 3425 struct ixgbe_hw *hw = &adapter->hw; 3426 struct ix_queue *que = adapter->queues; 3427 u32 mask, fwsm; 3428 3429 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 3430 /* Enable Fan Failure detection */ 3431 if (hw->device_id == IXGBE_DEV_ID_82598AT) 3432 mask |= IXGBE_EIMS_GPI_SDP1; 3433 3434 switch (adapter->hw.mac.type) { 3435 case ixgbe_mac_82599EB: 3436 mask |= IXGBE_EIMS_ECC; 3437 /* Temperature sensor on some adapters */ 3438 mask |= IXGBE_EIMS_GPI_SDP0; 3439 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 3440 mask |= IXGBE_EIMS_GPI_SDP1; 3441 mask |= IXGBE_EIMS_GPI_SDP2; 3442 #ifdef IXGBE_FDIR 3443 mask |= IXGBE_EIMS_FLOW_DIR; 3444 #endif 3445 #ifdef PCI_IOV 3446 mask |= IXGBE_EIMS_MAILBOX; 3447 #endif 3448 break; 3449 case ixgbe_mac_X540: 3450 /* Detect if Thermal Sensor is enabled */ 3451 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 3452 if (fwsm & IXGBE_FWSM_TS_ENABLED) 3453 mask |= IXGBE_EIMS_TS; 3454 mask |= IXGBE_EIMS_ECC; 3455 #ifdef IXGBE_FDIR 3456 mask |= IXGBE_EIMS_FLOW_DIR; 3457 #endif 3458 break; 3459 case ixgbe_mac_X550: 3460 case ixgbe_mac_X550EM_x: 3461 /* MAC thermal sensor is automatically enabled */ 3462 mask |= IXGBE_EIMS_TS; 3463 /* Some devices use SDP0 for important information */ 3464 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 3465 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 3466 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 3467 mask |= IXGBE_EIMS_ECC; 3468 #ifdef IXGBE_FDIR 3469 mask |= IXGBE_EIMS_FLOW_DIR; 3470 #endif 3471 #ifdef PCI_IOV 3472 mask |= IXGBE_EIMS_MAILBOX; 3473 #endif 3474 /* falls through */ 3475 default: 3476 break; 3477 } 3478 3479 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3480 3481 /* With MSI-X we use auto clear */ 3482 if (adapter->msix_mem) { 3483 mask = IXGBE_EIMS_ENABLE_MASK; 3484 /* Don't autoclear Link */ 3485 mask &= ~IXGBE_EIMS_OTHER; 3486 mask &= ~IXGBE_EIMS_LSC; 3487 #ifdef PCI_IOV 3488 mask &= ~IXGBE_EIMS_MAILBOX; 3489 #endif 3490 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 3491 } 3492 3493 /* 3494 ** Now enable all queues, this is done separately to 3495 ** allow for handling the extended (beyond 32) MSIX 3496 ** vectors that can be used by 82599 3497 */ 3498 for (int i = 0; i < adapter->num_queues; i++, que++) 3499 ixgbe_enable_queue(adapter, que->msix); 3500 3501 IXGBE_WRITE_FLUSH(hw); 3502 3503 return; 3504 } 3505 3506 static void 3507 ixgbe_disable_intr(struct adapter *adapter) 3508 { 3509 if (adapter->msix_mem) 3510 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0); 3511 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3512 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); 3513 } else { 3514 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); 3515 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); 3516 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 3517 } 3518 IXGBE_WRITE_FLUSH(&adapter->hw); 3519 return; 3520 } 3521 3522 /* 3523 ** Get the width and transaction speed of 3524 ** the slot this adapter is plugged into. 3525 */ 3526 static void 3527 ixgbe_get_slot_info(struct adapter *adapter) 3528 { 3529 device_t dev = adapter->dev; 3530 struct ixgbe_hw *hw = &adapter->hw; 3531 struct ixgbe_mac_info *mac = &hw->mac; 3532 u16 link; 3533 u32 offset; 3534 3535 /* For most devices simply call the shared code routine */ 3536 if (hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) { 3537 ixgbe_get_bus_info(hw); 3538 /* These devices don't use PCI-E */ 3539 switch (hw->mac.type) { 3540 case ixgbe_mac_X550EM_x: 3541 return; 3542 default: 3543 goto display; 3544 } 3545 } 3546 3547 /* 3548 ** For the Quad port adapter we need to parse back 3549 ** up the PCI tree to find the speed of the expansion 3550 ** slot into which this adapter is plugged. A bit more work. 3551 */ 3552 dev = device_get_parent(device_get_parent(dev)); 3553 #ifdef IXGBE_DEBUG 3554 device_printf(dev, "parent pcib = %x,%x,%x\n", 3555 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3556 #endif 3557 dev = device_get_parent(device_get_parent(dev)); 3558 #ifdef IXGBE_DEBUG 3559 device_printf(dev, "slot pcib = %x,%x,%x\n", 3560 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3561 #endif 3562 /* Now get the PCI Express Capabilities offset */ 3563 pci_find_cap(dev, PCIY_EXPRESS, &offset); 3564 /* ...and read the Link Status Register */ 3565 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 3566 switch (link & IXGBE_PCI_LINK_WIDTH) { 3567 case IXGBE_PCI_LINK_WIDTH_1: 3568 hw->bus.width = ixgbe_bus_width_pcie_x1; 3569 break; 3570 case IXGBE_PCI_LINK_WIDTH_2: 3571 hw->bus.width = ixgbe_bus_width_pcie_x2; 3572 break; 3573 case IXGBE_PCI_LINK_WIDTH_4: 3574 hw->bus.width = ixgbe_bus_width_pcie_x4; 3575 break; 3576 case IXGBE_PCI_LINK_WIDTH_8: 3577 hw->bus.width = ixgbe_bus_width_pcie_x8; 3578 break; 3579 default: 3580 hw->bus.width = ixgbe_bus_width_unknown; 3581 break; 3582 } 3583 3584 switch (link & IXGBE_PCI_LINK_SPEED) { 3585 case IXGBE_PCI_LINK_SPEED_2500: 3586 hw->bus.speed = ixgbe_bus_speed_2500; 3587 break; 3588 case IXGBE_PCI_LINK_SPEED_5000: 3589 hw->bus.speed = ixgbe_bus_speed_5000; 3590 break; 3591 case IXGBE_PCI_LINK_SPEED_8000: 3592 hw->bus.speed = ixgbe_bus_speed_8000; 3593 break; 3594 default: 3595 hw->bus.speed = ixgbe_bus_speed_unknown; 3596 break; 3597 } 3598 3599 mac->ops.set_lan_id(hw); 3600 3601 display: 3602 device_printf(dev,"PCI Express Bus: Speed %s %s\n", 3603 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s": 3604 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s": 3605 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s":"Unknown"), 3606 (hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" : 3607 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" : 3608 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" : 3609 ("Unknown")); 3610 3611 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 3612 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 3613 (hw->bus.speed == ixgbe_bus_speed_2500))) { 3614 device_printf(dev, "PCI-Express bandwidth available" 3615 " for this card\n is not sufficient for" 3616 " optimal performance.\n"); 3617 device_printf(dev, "For optimal performance a x8 " 3618 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 3619 } 3620 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 3621 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 3622 (hw->bus.speed < ixgbe_bus_speed_8000))) { 3623 device_printf(dev, "PCI-Express bandwidth available" 3624 " for this card\n is not sufficient for" 3625 " optimal performance.\n"); 3626 device_printf(dev, "For optimal performance a x8 " 3627 "PCIE Gen3 slot is required.\n"); 3628 } 3629 3630 return; 3631 } 3632 3633 3634 /* 3635 ** Setup the correct IVAR register for a particular MSIX interrupt 3636 ** (yes this is all very magic and confusing :) 3637 ** - entry is the register array entry 3638 ** - vector is the MSIX vector for this queue 3639 ** - type is RX/TX/MISC 3640 */ 3641 static void 3642 ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type) 3643 { 3644 struct ixgbe_hw *hw = &adapter->hw; 3645 u32 ivar, index; 3646 3647 vector |= IXGBE_IVAR_ALLOC_VAL; 3648 3649 switch (hw->mac.type) { 3650 3651 case ixgbe_mac_82598EB: 3652 if (type == -1) 3653 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 3654 else 3655 entry += (type * 64); 3656 index = (entry >> 2) & 0x1F; 3657 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 3658 ivar &= ~(0xFF << (8 * (entry & 0x3))); 3659 ivar |= (vector << (8 * (entry & 0x3))); 3660 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar); 3661 break; 3662 3663 case ixgbe_mac_82599EB: 3664 case ixgbe_mac_X540: 3665 case ixgbe_mac_X550: 3666 case ixgbe_mac_X550EM_x: 3667 if (type == -1) { /* MISC IVAR */ 3668 index = (entry & 1) * 8; 3669 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 3670 ivar &= ~(0xFF << index); 3671 ivar |= (vector << index); 3672 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 3673 } else { /* RX/TX IVARS */ 3674 index = (16 * (entry & 1)) + (8 * type); 3675 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 3676 ivar &= ~(0xFF << index); 3677 ivar |= (vector << index); 3678 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 3679 } 3680 3681 default: 3682 break; 3683 } 3684 } 3685 3686 static void 3687 ixgbe_configure_ivars(struct adapter *adapter) 3688 { 3689 struct ix_queue *que = adapter->queues; 3690 u32 newitr; 3691 3692 if (ixgbe_max_interrupt_rate > 0) 3693 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 3694 else { 3695 /* 3696 ** Disable DMA coalescing if interrupt moderation is 3697 ** disabled. 3698 */ 3699 adapter->dmac = 0; 3700 newitr = 0; 3701 } 3702 3703 for (int i = 0; i < adapter->num_queues; i++, que++) { 3704 struct rx_ring *rxr = &adapter->rx_rings[i]; 3705 struct tx_ring *txr = &adapter->tx_rings[i]; 3706 /* First the RX queue entry */ 3707 ixgbe_set_ivar(adapter, rxr->me, que->msix, 0); 3708 /* ... and the TX */ 3709 ixgbe_set_ivar(adapter, txr->me, que->msix, 1); 3710 /* Set an Initial EITR value */ 3711 IXGBE_WRITE_REG(&adapter->hw, 3712 IXGBE_EITR(que->msix), newitr); 3713 } 3714 3715 /* For the Link interrupt */ 3716 ixgbe_set_ivar(adapter, 1, adapter->vector, -1); 3717 } 3718 3719 /* 3720 ** ixgbe_sfp_probe - called in the local timer to 3721 ** determine if a port had optics inserted. 3722 */ 3723 static bool 3724 ixgbe_sfp_probe(struct adapter *adapter) 3725 { 3726 struct ixgbe_hw *hw = &adapter->hw; 3727 device_t dev = adapter->dev; 3728 bool result = FALSE; 3729 3730 if ((hw->phy.type == ixgbe_phy_nl) && 3731 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 3732 s32 ret = hw->phy.ops.identify_sfp(hw); 3733 if (ret) 3734 goto out; 3735 ret = hw->phy.ops.reset(hw); 3736 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3737 device_printf(dev, "Unsupported SFP+ module detected!"); 3738 device_printf(dev, "Reload driver with supported module.\n"); 3739 adapter->sfp_probe = FALSE; 3740 goto out; 3741 } else 3742 device_printf(dev, "SFP+ module detected!\n"); 3743 /* We now have supported optics */ 3744 adapter->sfp_probe = FALSE; 3745 /* Set the optics type so system reports correctly */ 3746 ixgbe_setup_optics(adapter); 3747 result = TRUE; 3748 } 3749 out: 3750 return (result); 3751 } 3752 3753 /* 3754 ** Tasklet handler for MSIX Link interrupts 3755 ** - do outside interrupt since it might sleep 3756 */ 3757 static void 3758 ixgbe_handle_link(void *context, int pending) 3759 { 3760 struct adapter *adapter = context; 3761 struct ixgbe_hw *hw = &adapter->hw; 3762 3763 ixgbe_check_link(hw, 3764 &adapter->link_speed, &adapter->link_up, 0); 3765 ixgbe_update_link_status(adapter); 3766 3767 /* Re-enable link interrupts */ 3768 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 3769 } 3770 3771 /* 3772 ** Tasklet for handling SFP module interrupts 3773 */ 3774 static void 3775 ixgbe_handle_mod(void *context, int pending) 3776 { 3777 struct adapter *adapter = context; 3778 struct ixgbe_hw *hw = &adapter->hw; 3779 enum ixgbe_phy_type orig_type = hw->phy.type; 3780 device_t dev = adapter->dev; 3781 u32 err; 3782 3783 IXGBE_CORE_LOCK(adapter); 3784 3785 /* Check to see if the PHY type changed */ 3786 if (hw->phy.ops.identify) { 3787 hw->phy.type = ixgbe_phy_unknown; 3788 hw->phy.ops.identify(hw); 3789 } 3790 3791 if (hw->phy.type != orig_type) { 3792 device_printf(dev, "Detected phy_type %d\n", hw->phy.type); 3793 3794 if (hw->phy.type == ixgbe_phy_none) { 3795 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 3796 goto out; 3797 } 3798 3799 /* Try to do the initialization that was skipped before */ 3800 if (hw->phy.ops.init) 3801 hw->phy.ops.init(hw); 3802 if (hw->phy.ops.reset) 3803 hw->phy.ops.reset(hw); 3804 } 3805 3806 err = hw->phy.ops.identify_sfp(hw); 3807 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3808 device_printf(dev, 3809 "Unsupported SFP+ module type was detected.\n"); 3810 goto out; 3811 } 3812 3813 err = hw->mac.ops.setup_sfp(hw); 3814 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3815 device_printf(dev, 3816 "Setup failure - unsupported SFP+ module type.\n"); 3817 goto out; 3818 } 3819 if (hw->phy.multispeed_fiber) 3820 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 3821 out: 3822 /* Update media type */ 3823 switch (hw->mac.ops.get_media_type(hw)) { 3824 case ixgbe_media_type_fiber: 3825 adapter->optics = IFM_10G_SR; 3826 break; 3827 case ixgbe_media_type_copper: 3828 adapter->optics = IFM_10G_TWINAX; 3829 break; 3830 case ixgbe_media_type_cx4: 3831 adapter->optics = IFM_10G_CX4; 3832 break; 3833 default: 3834 adapter->optics = 0; 3835 break; 3836 } 3837 3838 IXGBE_CORE_UNLOCK(adapter); 3839 return; 3840 } 3841 3842 3843 /* 3844 ** Tasklet for handling MSF (multispeed fiber) interrupts 3845 */ 3846 static void 3847 ixgbe_handle_msf(void *context, int pending) 3848 { 3849 struct adapter *adapter = context; 3850 struct ixgbe_hw *hw = &adapter->hw; 3851 u32 autoneg; 3852 bool negotiate; 3853 3854 IXGBE_CORE_LOCK(adapter); 3855 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 3856 adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 3857 3858 autoneg = hw->phy.autoneg_advertised; 3859 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 3860 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 3861 if (hw->mac.ops.setup_link) 3862 hw->mac.ops.setup_link(hw, autoneg, TRUE); 3863 3864 /* Adjust media types shown in ifconfig */ 3865 ifmedia_removeall(&adapter->media); 3866 ixgbe_add_media_types(adapter); 3867 IXGBE_CORE_UNLOCK(adapter); 3868 return; 3869 } 3870 3871 /* 3872 ** Tasklet for handling interrupts from an external PHY 3873 */ 3874 static void 3875 ixgbe_handle_phy(void *context, int pending) 3876 { 3877 struct adapter *adapter = context; 3878 struct ixgbe_hw *hw = &adapter->hw; 3879 int error; 3880 3881 error = hw->phy.ops.handle_lasi(hw); 3882 if (error == IXGBE_ERR_OVERTEMP) 3883 device_printf(adapter->dev, 3884 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 3885 " PHY will downshift to lower power state!\n"); 3886 else if (error) 3887 device_printf(adapter->dev, 3888 "Error handling LASI interrupt: %d\n", 3889 error); 3890 return; 3891 } 3892 3893 #ifdef IXGBE_FDIR 3894 /* 3895 ** Tasklet for reinitializing the Flow Director filter table 3896 */ 3897 static void 3898 ixgbe_reinit_fdir(void *context, int pending) 3899 { 3900 struct adapter *adapter = context; 3901 struct ifnet *ifp = adapter->ifp; 3902 3903 if (adapter->fdir_reinit != 1) /* Shouldn't happen */ 3904 return; 3905 ixgbe_reinit_fdir_tables_82599(&adapter->hw); 3906 adapter->fdir_reinit = 0; 3907 /* re-enable flow director interrupts */ 3908 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 3909 /* Restart the interface */ 3910 ifp->if_drv_flags |= IFF_DRV_RUNNING; 3911 return; 3912 } 3913 #endif 3914 3915 /********************************************************************* 3916 * 3917 * Configure DMA Coalescing 3918 * 3919 **********************************************************************/ 3920 static void 3921 ixgbe_config_dmac(struct adapter *adapter) 3922 { 3923 struct ixgbe_hw *hw = &adapter->hw; 3924 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 3925 3926 if (hw->mac.type < ixgbe_mac_X550 || 3927 !hw->mac.ops.dmac_config) 3928 return; 3929 3930 if (dcfg->watchdog_timer ^ adapter->dmac || 3931 dcfg->link_speed ^ adapter->link_speed) { 3932 dcfg->watchdog_timer = adapter->dmac; 3933 dcfg->fcoe_en = false; 3934 dcfg->link_speed = adapter->link_speed; 3935 dcfg->num_tcs = 1; 3936 3937 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 3938 dcfg->watchdog_timer, dcfg->link_speed); 3939 3940 hw->mac.ops.dmac_config(hw); 3941 } 3942 } 3943 3944 /* 3945 * Checks whether the adapter's ports are capable of 3946 * Wake On LAN by reading the adapter's NVM. 3947 * 3948 * Sets each port's hw->wol_enabled value depending 3949 * on the value read here. 3950 */ 3951 static void 3952 ixgbe_check_wol_support(struct adapter *adapter) 3953 { 3954 struct ixgbe_hw *hw = &adapter->hw; 3955 u16 dev_caps = 0; 3956 3957 /* Find out WoL support for port */ 3958 adapter->wol_support = hw->wol_enabled = 0; 3959 ixgbe_get_device_caps(hw, &dev_caps); 3960 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 3961 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 3962 hw->bus.func == 0)) 3963 adapter->wol_support = hw->wol_enabled = 1; 3964 3965 /* Save initial wake up filter configuration */ 3966 adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 3967 3968 return; 3969 } 3970 3971 /* 3972 * Prepare the adapter/port for LPLU and/or WoL 3973 */ 3974 static int 3975 ixgbe_setup_low_power_mode(struct adapter *adapter) 3976 { 3977 struct ixgbe_hw *hw = &adapter->hw; 3978 device_t dev = adapter->dev; 3979 s32 error = 0; 3980 3981 mtx_assert(&adapter->core_mtx, MA_OWNED); 3982 3983 /* Limit power management flow to X550EM baseT */ 3984 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T 3985 && hw->phy.ops.enter_lplu) { 3986 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3987 IXGBE_WRITE_REG(hw, IXGBE_GRC, 3988 IXGBE_READ_REG(hw, IXGBE_GRC) & ~(u32)2); 3989 3990 /* 3991 * Clear Wake Up Status register to prevent any previous wakeup 3992 * events from waking us up immediately after we suspend. 3993 */ 3994 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3995 3996 /* 3997 * Program the Wakeup Filter Control register with user filter 3998 * settings 3999 */ 4000 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc); 4001 4002 /* Enable wakeups and power management in Wakeup Control */ 4003 IXGBE_WRITE_REG(hw, IXGBE_WUC, 4004 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 4005 4006 /* X550EM baseT adapters need a special LPLU flow */ 4007 hw->phy.reset_disable = true; 4008 ixgbe_stop(adapter); 4009 error = hw->phy.ops.enter_lplu(hw); 4010 if (error) 4011 device_printf(dev, 4012 "Error entering LPLU: %d\n", error); 4013 hw->phy.reset_disable = false; 4014 } else { 4015 /* Just stop for other adapters */ 4016 ixgbe_stop(adapter); 4017 } 4018 4019 return error; 4020 } 4021 4022 /********************************************************************** 4023 * 4024 * Update the board statistics counters. 4025 * 4026 **********************************************************************/ 4027 static void 4028 ixgbe_update_stats_counters(struct adapter *adapter) 4029 { 4030 struct ixgbe_hw *hw = &adapter->hw; 4031 u32 missed_rx = 0, bprc, lxon, lxoff, total; 4032 u64 total_missed_rx = 0; 4033 4034 adapter->stats.pf.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 4035 adapter->stats.pf.illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 4036 adapter->stats.pf.errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 4037 adapter->stats.pf.mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 4038 4039 for (int i = 0; i < 16; i++) { 4040 adapter->stats.pf.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 4041 adapter->stats.pf.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 4042 adapter->stats.pf.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 4043 } 4044 adapter->stats.pf.mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 4045 adapter->stats.pf.mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 4046 adapter->stats.pf.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 4047 4048 /* Hardware workaround, gprc counts missed packets */ 4049 adapter->stats.pf.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 4050 adapter->stats.pf.gprc -= missed_rx; 4051 4052 if (hw->mac.type != ixgbe_mac_82598EB) { 4053 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 4054 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 4055 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 4056 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 4057 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 4058 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 4059 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 4060 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 4061 } else { 4062 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 4063 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 4064 /* 82598 only has a counter in the high register */ 4065 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 4066 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 4067 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORH); 4068 } 4069 4070 /* 4071 * Workaround: mprc hardware is incorrectly counting 4072 * broadcasts, so for now we subtract those. 4073 */ 4074 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 4075 adapter->stats.pf.bprc += bprc; 4076 adapter->stats.pf.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 4077 if (hw->mac.type == ixgbe_mac_82598EB) 4078 adapter->stats.pf.mprc -= bprc; 4079 4080 adapter->stats.pf.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 4081 adapter->stats.pf.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 4082 adapter->stats.pf.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 4083 adapter->stats.pf.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 4084 adapter->stats.pf.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 4085 adapter->stats.pf.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 4086 4087 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 4088 adapter->stats.pf.lxontxc += lxon; 4089 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 4090 adapter->stats.pf.lxofftxc += lxoff; 4091 total = lxon + lxoff; 4092 4093 adapter->stats.pf.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 4094 adapter->stats.pf.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 4095 adapter->stats.pf.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 4096 adapter->stats.pf.gptc -= total; 4097 adapter->stats.pf.mptc -= total; 4098 adapter->stats.pf.ptc64 -= total; 4099 adapter->stats.pf.gotc -= total * ETHER_MIN_LEN; 4100 4101 adapter->stats.pf.ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 4102 adapter->stats.pf.rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 4103 adapter->stats.pf.roc += IXGBE_READ_REG(hw, IXGBE_ROC); 4104 adapter->stats.pf.rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 4105 adapter->stats.pf.mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 4106 adapter->stats.pf.mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 4107 adapter->stats.pf.mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 4108 adapter->stats.pf.tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 4109 adapter->stats.pf.tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 4110 adapter->stats.pf.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 4111 adapter->stats.pf.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 4112 adapter->stats.pf.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 4113 adapter->stats.pf.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 4114 adapter->stats.pf.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 4115 adapter->stats.pf.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 4116 adapter->stats.pf.xec += IXGBE_READ_REG(hw, IXGBE_XEC); 4117 adapter->stats.pf.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 4118 adapter->stats.pf.fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 4119 /* Only read FCOE on 82599 */ 4120 if (hw->mac.type != ixgbe_mac_82598EB) { 4121 adapter->stats.pf.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 4122 adapter->stats.pf.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 4123 adapter->stats.pf.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 4124 adapter->stats.pf.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 4125 adapter->stats.pf.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 4126 } 4127 4128 /* Fill out the OS statistics structure */ 4129 IXGBE_SET_IPACKETS(adapter, adapter->stats.pf.gprc); 4130 IXGBE_SET_OPACKETS(adapter, adapter->stats.pf.gptc); 4131 IXGBE_SET_IBYTES(adapter, adapter->stats.pf.gorc); 4132 IXGBE_SET_OBYTES(adapter, adapter->stats.pf.gotc); 4133 IXGBE_SET_IMCASTS(adapter, adapter->stats.pf.mprc); 4134 IXGBE_SET_OMCASTS(adapter, adapter->stats.pf.mptc); 4135 IXGBE_SET_COLLISIONS(adapter, 0); 4136 IXGBE_SET_IQDROPS(adapter, total_missed_rx); 4137 IXGBE_SET_IERRORS(adapter, adapter->stats.pf.crcerrs 4138 + adapter->stats.pf.rlec); 4139 } 4140 4141 #if __FreeBSD_version >= 1100036 4142 static uint64_t 4143 ixgbe_get_counter(struct ifnet *ifp, ift_counter cnt) 4144 { 4145 struct adapter *adapter; 4146 struct tx_ring *txr; 4147 uint64_t rv; 4148 4149 adapter = if_getsoftc(ifp); 4150 4151 switch (cnt) { 4152 case IFCOUNTER_IPACKETS: 4153 return (adapter->ipackets); 4154 case IFCOUNTER_OPACKETS: 4155 return (adapter->opackets); 4156 case IFCOUNTER_IBYTES: 4157 return (adapter->ibytes); 4158 case IFCOUNTER_OBYTES: 4159 return (adapter->obytes); 4160 case IFCOUNTER_IMCASTS: 4161 return (adapter->imcasts); 4162 case IFCOUNTER_OMCASTS: 4163 return (adapter->omcasts); 4164 case IFCOUNTER_COLLISIONS: 4165 return (0); 4166 case IFCOUNTER_IQDROPS: 4167 return (adapter->iqdrops); 4168 case IFCOUNTER_OQDROPS: 4169 rv = 0; 4170 txr = adapter->tx_rings; 4171 for (int i = 0; i < adapter->num_queues; i++, txr++) 4172 rv += txr->br->br_drops; 4173 return (rv); 4174 case IFCOUNTER_IERRORS: 4175 return (adapter->ierrors); 4176 default: 4177 return (if_get_counter_default(ifp, cnt)); 4178 } 4179 } 4180 #endif 4181 4182 /** ixgbe_sysctl_tdh_handler - Handler function 4183 * Retrieves the TDH value from the hardware 4184 */ 4185 static int 4186 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 4187 { 4188 int error; 4189 4190 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4191 if (!txr) return 0; 4192 4193 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDH(txr->me)); 4194 error = sysctl_handle_int(oidp, &val, 0, req); 4195 if (error || !req->newptr) 4196 return error; 4197 return 0; 4198 } 4199 4200 /** ixgbe_sysctl_tdt_handler - Handler function 4201 * Retrieves the TDT value from the hardware 4202 */ 4203 static int 4204 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 4205 { 4206 int error; 4207 4208 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4209 if (!txr) return 0; 4210 4211 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDT(txr->me)); 4212 error = sysctl_handle_int(oidp, &val, 0, req); 4213 if (error || !req->newptr) 4214 return error; 4215 return 0; 4216 } 4217 4218 /** ixgbe_sysctl_rdh_handler - Handler function 4219 * Retrieves the RDH value from the hardware 4220 */ 4221 static int 4222 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 4223 { 4224 int error; 4225 4226 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4227 if (!rxr) return 0; 4228 4229 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDH(rxr->me)); 4230 error = sysctl_handle_int(oidp, &val, 0, req); 4231 if (error || !req->newptr) 4232 return error; 4233 return 0; 4234 } 4235 4236 /** ixgbe_sysctl_rdt_handler - Handler function 4237 * Retrieves the RDT value from the hardware 4238 */ 4239 static int 4240 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 4241 { 4242 int error; 4243 4244 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4245 if (!rxr) return 0; 4246 4247 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDT(rxr->me)); 4248 error = sysctl_handle_int(oidp, &val, 0, req); 4249 if (error || !req->newptr) 4250 return error; 4251 return 0; 4252 } 4253 4254 static int 4255 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 4256 { 4257 int error; 4258 struct ix_queue *que = ((struct ix_queue *)oidp->oid_arg1); 4259 unsigned int reg, usec, rate; 4260 4261 reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_EITR(que->msix)); 4262 usec = ((reg & 0x0FF8) >> 3); 4263 if (usec > 0) 4264 rate = 500000 / usec; 4265 else 4266 rate = 0; 4267 error = sysctl_handle_int(oidp, &rate, 0, req); 4268 if (error || !req->newptr) 4269 return error; 4270 reg &= ~0xfff; /* default, no limitation */ 4271 ixgbe_max_interrupt_rate = 0; 4272 if (rate > 0 && rate < 500000) { 4273 if (rate < 1000) 4274 rate = 1000; 4275 ixgbe_max_interrupt_rate = rate; 4276 reg |= ((4000000/rate) & 0xff8 ); 4277 } 4278 IXGBE_WRITE_REG(&que->adapter->hw, IXGBE_EITR(que->msix), reg); 4279 return 0; 4280 } 4281 4282 static void 4283 ixgbe_add_device_sysctls(struct adapter *adapter) 4284 { 4285 device_t dev = adapter->dev; 4286 struct ixgbe_hw *hw = &adapter->hw; 4287 struct sysctl_oid_list *child; 4288 struct sysctl_ctx_list *ctx; 4289 4290 ctx = device_get_sysctl_ctx(dev); 4291 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 4292 4293 /* Sysctls for all devices */ 4294 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "fc", 4295 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4296 ixgbe_sysctl_flowcntl, "I", IXGBE_SYSCTL_DESC_SET_FC); 4297 4298 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "enable_aim", 4299 CTLFLAG_RW, 4300 &ixgbe_enable_aim, 1, "Interrupt Moderation"); 4301 4302 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "advertise_speed", 4303 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4304 ixgbe_sysctl_advertise, "I", IXGBE_SYSCTL_DESC_ADV_SPEED); 4305 4306 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "thermal_test", 4307 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4308 ixgbe_sysctl_thermal_test, "I", "Thermal Test"); 4309 4310 #ifdef IXGBE_DEBUG 4311 /* testing sysctls (for all devices) */ 4312 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "power_state", 4313 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4314 ixgbe_sysctl_power_state, "I", "PCI Power State"); 4315 4316 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "print_rss_config", 4317 CTLTYPE_STRING | CTLFLAG_RD, adapter, 0, 4318 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 4319 #endif 4320 /* for X550 series devices */ 4321 if (hw->mac.type >= ixgbe_mac_X550) 4322 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "dmac", 4323 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4324 ixgbe_sysctl_dmac, "I", "DMA Coalesce"); 4325 4326 /* for X552 backplane devices */ 4327 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) { 4328 struct sysctl_oid *eee_node; 4329 struct sysctl_oid_list *eee_list; 4330 4331 eee_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "eee", 4332 CTLFLAG_RD, NULL, 4333 "Energy Efficient Ethernet sysctls"); 4334 eee_list = SYSCTL_CHILDREN(eee_node); 4335 4336 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "enable", 4337 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4338 ixgbe_sysctl_eee_enable, "I", 4339 "Enable or Disable EEE"); 4340 4341 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "negotiated", 4342 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4343 ixgbe_sysctl_eee_negotiated, "I", 4344 "EEE negotiated on link"); 4345 4346 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_status", 4347 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4348 ixgbe_sysctl_eee_tx_lpi_status, "I", 4349 "Whether or not TX link is in LPI state"); 4350 4351 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "rx_lpi_status", 4352 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4353 ixgbe_sysctl_eee_rx_lpi_status, "I", 4354 "Whether or not RX link is in LPI state"); 4355 4356 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_delay", 4357 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4358 ixgbe_sysctl_eee_tx_lpi_delay, "I", 4359 "TX LPI entry delay in microseconds"); 4360 } 4361 4362 /* for WoL-capable devices */ 4363 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4364 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wol_enable", 4365 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4366 ixgbe_sysctl_wol_enable, "I", 4367 "Enable/Disable Wake on LAN"); 4368 4369 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wufc", 4370 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4371 ixgbe_sysctl_wufc, "I", 4372 "Enable/Disable Wake Up Filters"); 4373 } 4374 4375 /* for X552/X557-AT devices */ 4376 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4377 struct sysctl_oid *phy_node; 4378 struct sysctl_oid_list *phy_list; 4379 4380 phy_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "phy", 4381 CTLFLAG_RD, NULL, 4382 "External PHY sysctls"); 4383 phy_list = SYSCTL_CHILDREN(phy_node); 4384 4385 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "temp", 4386 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4387 ixgbe_sysctl_phy_temp, "I", 4388 "Current External PHY Temperature (Celsius)"); 4389 4390 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "overtemp_occurred", 4391 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4392 ixgbe_sysctl_phy_overtemp_occurred, "I", 4393 "External PHY High Temperature Event Occurred"); 4394 } 4395 } 4396 4397 /* 4398 * Add sysctl variables, one per statistic, to the system. 4399 */ 4400 static void 4401 ixgbe_add_hw_stats(struct adapter *adapter) 4402 { 4403 device_t dev = adapter->dev; 4404 4405 struct tx_ring *txr = adapter->tx_rings; 4406 struct rx_ring *rxr = adapter->rx_rings; 4407 4408 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 4409 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 4410 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 4411 struct ixgbe_hw_stats *stats = &adapter->stats.pf; 4412 4413 struct sysctl_oid *stat_node, *queue_node; 4414 struct sysctl_oid_list *stat_list, *queue_list; 4415 4416 #define QUEUE_NAME_LEN 32 4417 char namebuf[QUEUE_NAME_LEN]; 4418 4419 /* Driver Statistics */ 4420 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 4421 CTLFLAG_RD, &adapter->dropped_pkts, 4422 "Driver dropped packets"); 4423 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "mbuf_defrag_failed", 4424 CTLFLAG_RD, &adapter->mbuf_defrag_failed, 4425 "m_defrag() failed"); 4426 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events", 4427 CTLFLAG_RD, &adapter->watchdog_events, 4428 "Watchdog timeouts"); 4429 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 4430 CTLFLAG_RD, &adapter->link_irq, 4431 "Link MSIX IRQ Handled"); 4432 4433 for (int i = 0; i < adapter->num_queues; i++, txr++) { 4434 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4435 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4436 CTLFLAG_RD, NULL, "Queue Name"); 4437 queue_list = SYSCTL_CHILDREN(queue_node); 4438 4439 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 4440 CTLTYPE_UINT | CTLFLAG_RW, &adapter->queues[i], 4441 sizeof(&adapter->queues[i]), 4442 ixgbe_sysctl_interrupt_rate_handler, "IU", 4443 "Interrupt Rate"); 4444 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 4445 CTLFLAG_RD, &(adapter->queues[i].irqs), 4446 "irqs on this queue"); 4447 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 4448 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4449 ixgbe_sysctl_tdh_handler, "IU", 4450 "Transmit Descriptor Head"); 4451 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 4452 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4453 ixgbe_sysctl_tdt_handler, "IU", 4454 "Transmit Descriptor Tail"); 4455 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "tso_tx", 4456 CTLFLAG_RD, &txr->tso_tx, 4457 "TSO"); 4458 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "no_tx_dma_setup", 4459 CTLFLAG_RD, &txr->no_tx_dma_setup, 4460 "Driver tx dma failure in xmit"); 4461 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "no_desc_avail", 4462 CTLFLAG_RD, &txr->no_desc_avail, 4463 "Queue No Descriptor Available"); 4464 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 4465 CTLFLAG_RD, &txr->total_packets, 4466 "Queue Packets Transmitted"); 4467 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "br_drops", 4468 CTLFLAG_RD, &txr->br->br_drops, 4469 "Packets dropped in buf_ring"); 4470 } 4471 4472 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 4473 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4474 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4475 CTLFLAG_RD, NULL, "Queue Name"); 4476 queue_list = SYSCTL_CHILDREN(queue_node); 4477 4478 struct lro_ctrl *lro = &rxr->lro; 4479 4480 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4481 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4482 CTLFLAG_RD, NULL, "Queue Name"); 4483 queue_list = SYSCTL_CHILDREN(queue_node); 4484 4485 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 4486 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4487 ixgbe_sysctl_rdh_handler, "IU", 4488 "Receive Descriptor Head"); 4489 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 4490 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4491 ixgbe_sysctl_rdt_handler, "IU", 4492 "Receive Descriptor Tail"); 4493 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 4494 CTLFLAG_RD, &rxr->rx_packets, 4495 "Queue Packets Received"); 4496 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 4497 CTLFLAG_RD, &rxr->rx_bytes, 4498 "Queue Bytes Received"); 4499 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 4500 CTLFLAG_RD, &rxr->rx_copies, 4501 "Copied RX Frames"); 4502 SYSCTL_ADD_U64(ctx, queue_list, OID_AUTO, "lro_queued", 4503 CTLFLAG_RD, &lro->lro_queued, 0, 4504 "LRO Queued"); 4505 SYSCTL_ADD_U64(ctx, queue_list, OID_AUTO, "lro_flushed", 4506 CTLFLAG_RD, &lro->lro_flushed, 0, 4507 "LRO Flushed"); 4508 } 4509 4510 /* MAC stats get the own sub node */ 4511 4512 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 4513 CTLFLAG_RD, NULL, "MAC Statistics"); 4514 stat_list = SYSCTL_CHILDREN(stat_node); 4515 4516 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 4517 CTLFLAG_RD, &stats->crcerrs, 4518 "CRC Errors"); 4519 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 4520 CTLFLAG_RD, &stats->illerrc, 4521 "Illegal Byte Errors"); 4522 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 4523 CTLFLAG_RD, &stats->errbc, 4524 "Byte Errors"); 4525 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 4526 CTLFLAG_RD, &stats->mspdc, 4527 "MAC Short Packets Discarded"); 4528 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 4529 CTLFLAG_RD, &stats->mlfc, 4530 "MAC Local Faults"); 4531 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 4532 CTLFLAG_RD, &stats->mrfc, 4533 "MAC Remote Faults"); 4534 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 4535 CTLFLAG_RD, &stats->rlec, 4536 "Receive Length Errors"); 4537 4538 /* Flow Control stats */ 4539 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 4540 CTLFLAG_RD, &stats->lxontxc, 4541 "Link XON Transmitted"); 4542 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 4543 CTLFLAG_RD, &stats->lxonrxc, 4544 "Link XON Received"); 4545 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 4546 CTLFLAG_RD, &stats->lxofftxc, 4547 "Link XOFF Transmitted"); 4548 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 4549 CTLFLAG_RD, &stats->lxoffrxc, 4550 "Link XOFF Received"); 4551 4552 /* Packet Reception Stats */ 4553 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 4554 CTLFLAG_RD, &stats->tor, 4555 "Total Octets Received"); 4556 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 4557 CTLFLAG_RD, &stats->gorc, 4558 "Good Octets Received"); 4559 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 4560 CTLFLAG_RD, &stats->tpr, 4561 "Total Packets Received"); 4562 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 4563 CTLFLAG_RD, &stats->gprc, 4564 "Good Packets Received"); 4565 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 4566 CTLFLAG_RD, &stats->mprc, 4567 "Multicast Packets Received"); 4568 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 4569 CTLFLAG_RD, &stats->bprc, 4570 "Broadcast Packets Received"); 4571 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 4572 CTLFLAG_RD, &stats->prc64, 4573 "64 byte frames received "); 4574 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 4575 CTLFLAG_RD, &stats->prc127, 4576 "65-127 byte frames received"); 4577 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 4578 CTLFLAG_RD, &stats->prc255, 4579 "128-255 byte frames received"); 4580 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 4581 CTLFLAG_RD, &stats->prc511, 4582 "256-511 byte frames received"); 4583 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 4584 CTLFLAG_RD, &stats->prc1023, 4585 "512-1023 byte frames received"); 4586 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 4587 CTLFLAG_RD, &stats->prc1522, 4588 "1023-1522 byte frames received"); 4589 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 4590 CTLFLAG_RD, &stats->ruc, 4591 "Receive Undersized"); 4592 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 4593 CTLFLAG_RD, &stats->rfc, 4594 "Fragmented Packets Received "); 4595 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 4596 CTLFLAG_RD, &stats->roc, 4597 "Oversized Packets Received"); 4598 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 4599 CTLFLAG_RD, &stats->rjc, 4600 "Received Jabber"); 4601 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 4602 CTLFLAG_RD, &stats->mngprc, 4603 "Management Packets Received"); 4604 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 4605 CTLFLAG_RD, &stats->mngptc, 4606 "Management Packets Dropped"); 4607 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 4608 CTLFLAG_RD, &stats->xec, 4609 "Checksum Errors"); 4610 4611 /* Packet Transmission Stats */ 4612 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 4613 CTLFLAG_RD, &stats->gotc, 4614 "Good Octets Transmitted"); 4615 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 4616 CTLFLAG_RD, &stats->tpt, 4617 "Total Packets Transmitted"); 4618 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 4619 CTLFLAG_RD, &stats->gptc, 4620 "Good Packets Transmitted"); 4621 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 4622 CTLFLAG_RD, &stats->bptc, 4623 "Broadcast Packets Transmitted"); 4624 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 4625 CTLFLAG_RD, &stats->mptc, 4626 "Multicast Packets Transmitted"); 4627 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 4628 CTLFLAG_RD, &stats->mngptc, 4629 "Management Packets Transmitted"); 4630 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 4631 CTLFLAG_RD, &stats->ptc64, 4632 "64 byte frames transmitted "); 4633 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 4634 CTLFLAG_RD, &stats->ptc127, 4635 "65-127 byte frames transmitted"); 4636 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 4637 CTLFLAG_RD, &stats->ptc255, 4638 "128-255 byte frames transmitted"); 4639 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 4640 CTLFLAG_RD, &stats->ptc511, 4641 "256-511 byte frames transmitted"); 4642 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 4643 CTLFLAG_RD, &stats->ptc1023, 4644 "512-1023 byte frames transmitted"); 4645 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 4646 CTLFLAG_RD, &stats->ptc1522, 4647 "1024-1522 byte frames transmitted"); 4648 } 4649 4650 static void 4651 ixgbe_set_sysctl_value(struct adapter *adapter, const char *name, 4652 const char *description, int *limit, int value) 4653 { 4654 *limit = value; 4655 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), 4656 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 4657 OID_AUTO, name, CTLFLAG_RW, limit, value, description); 4658 } 4659 4660 /* 4661 ** Set flow control using sysctl: 4662 ** Flow control values: 4663 ** 0 - off 4664 ** 1 - rx pause 4665 ** 2 - tx pause 4666 ** 3 - full 4667 */ 4668 static int 4669 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS) 4670 { 4671 int error, fc; 4672 struct adapter *adapter; 4673 4674 adapter = (struct adapter *) arg1; 4675 fc = adapter->fc; 4676 4677 error = sysctl_handle_int(oidp, &fc, 0, req); 4678 if ((error) || (req->newptr == NULL)) 4679 return (error); 4680 4681 /* Don't bother if it's not changed */ 4682 if (adapter->fc == fc) 4683 return (0); 4684 4685 return ixgbe_set_flowcntl(adapter, fc); 4686 } 4687 4688 4689 static int 4690 ixgbe_set_flowcntl(struct adapter *adapter, int fc) 4691 { 4692 4693 switch (fc) { 4694 case ixgbe_fc_rx_pause: 4695 case ixgbe_fc_tx_pause: 4696 case ixgbe_fc_full: 4697 adapter->hw.fc.requested_mode = adapter->fc; 4698 if (adapter->num_queues > 1) 4699 ixgbe_disable_rx_drop(adapter); 4700 break; 4701 case ixgbe_fc_none: 4702 adapter->hw.fc.requested_mode = ixgbe_fc_none; 4703 if (adapter->num_queues > 1) 4704 ixgbe_enable_rx_drop(adapter); 4705 break; 4706 default: 4707 return (EINVAL); 4708 } 4709 adapter->fc = fc; 4710 /* Don't autoneg if forcing a value */ 4711 adapter->hw.fc.disable_fc_autoneg = TRUE; 4712 ixgbe_fc_enable(&adapter->hw); 4713 return (0); 4714 } 4715 4716 /* 4717 ** Control advertised link speed: 4718 ** Flags: 4719 ** 0x1 - advertise 100 Mb 4720 ** 0x2 - advertise 1G 4721 ** 0x4 - advertise 10G 4722 */ 4723 static int 4724 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS) 4725 { 4726 int error, advertise; 4727 struct adapter *adapter; 4728 4729 adapter = (struct adapter *) arg1; 4730 advertise = adapter->advertise; 4731 4732 error = sysctl_handle_int(oidp, &advertise, 0, req); 4733 if ((error) || (req->newptr == NULL)) 4734 return (error); 4735 4736 /* Checks to validate new value */ 4737 if (adapter->advertise == advertise) /* no change */ 4738 return (0); 4739 4740 return ixgbe_set_advertise(adapter, advertise); 4741 } 4742 4743 static int 4744 ixgbe_set_advertise(struct adapter *adapter, int advertise) 4745 { 4746 device_t dev; 4747 struct ixgbe_hw *hw; 4748 ixgbe_link_speed speed; 4749 4750 hw = &adapter->hw; 4751 dev = adapter->dev; 4752 4753 /* No speed changes for backplane media */ 4754 if (hw->phy.media_type == ixgbe_media_type_backplane) 4755 return (ENODEV); 4756 4757 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 4758 (hw->phy.multispeed_fiber))) { 4759 device_printf(dev, 4760 "Advertised speed can only be set on copper or " 4761 "multispeed fiber media types.\n"); 4762 return (EINVAL); 4763 } 4764 4765 if (advertise < 0x1 || advertise > 0x7) { 4766 device_printf(dev, 4767 "Invalid advertised speed; valid modes are 0x1 through 0x7\n"); 4768 return (EINVAL); 4769 } 4770 4771 if ((advertise & 0x1) 4772 && (hw->mac.type != ixgbe_mac_X540) 4773 && (hw->mac.type != ixgbe_mac_X550)) { 4774 device_printf(dev, "Set Advertise: 100Mb on X540/X550 only\n"); 4775 return (EINVAL); 4776 } 4777 4778 /* Set new value and report new advertised mode */ 4779 speed = 0; 4780 if (advertise & 0x1) 4781 speed |= IXGBE_LINK_SPEED_100_FULL; 4782 if (advertise & 0x2) 4783 speed |= IXGBE_LINK_SPEED_1GB_FULL; 4784 if (advertise & 0x4) 4785 speed |= IXGBE_LINK_SPEED_10GB_FULL; 4786 adapter->advertise = advertise; 4787 4788 hw->mac.autotry_restart = TRUE; 4789 hw->mac.ops.setup_link(hw, speed, TRUE); 4790 4791 return (0); 4792 } 4793 4794 /* 4795 * The following two sysctls are for X552/X557-AT devices; 4796 * they deal with the external PHY used in them. 4797 */ 4798 static int 4799 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 4800 { 4801 struct adapter *adapter = (struct adapter *) arg1; 4802 struct ixgbe_hw *hw = &adapter->hw; 4803 u16 reg; 4804 4805 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4806 device_printf(adapter->dev, 4807 "Device has no supported external thermal sensor.\n"); 4808 return (ENODEV); 4809 } 4810 4811 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 4812 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4813 ®)) { 4814 device_printf(adapter->dev, 4815 "Error reading from PHY's current temperature register\n"); 4816 return (EAGAIN); 4817 } 4818 4819 /* Shift temp for output */ 4820 reg = reg >> 8; 4821 4822 return (sysctl_handle_int(oidp, NULL, reg, req)); 4823 } 4824 4825 /* 4826 * Reports whether the current PHY temperature is over 4827 * the overtemp threshold. 4828 * - This is reported directly from the PHY 4829 */ 4830 static int 4831 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 4832 { 4833 struct adapter *adapter = (struct adapter *) arg1; 4834 struct ixgbe_hw *hw = &adapter->hw; 4835 u16 reg; 4836 4837 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4838 device_printf(adapter->dev, 4839 "Device has no supported external thermal sensor.\n"); 4840 return (ENODEV); 4841 } 4842 4843 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 4844 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4845 ®)) { 4846 device_printf(adapter->dev, 4847 "Error reading from PHY's temperature status register\n"); 4848 return (EAGAIN); 4849 } 4850 4851 /* Get occurrence bit */ 4852 reg = !!(reg & 0x4000); 4853 return (sysctl_handle_int(oidp, 0, reg, req)); 4854 } 4855 4856 /* 4857 ** Thermal Shutdown Trigger (internal MAC) 4858 ** - Set this to 1 to cause an overtemp event to occur 4859 */ 4860 static int 4861 ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS) 4862 { 4863 struct adapter *adapter = (struct adapter *) arg1; 4864 struct ixgbe_hw *hw = &adapter->hw; 4865 int error, fire = 0; 4866 4867 error = sysctl_handle_int(oidp, &fire, 0, req); 4868 if ((error) || (req->newptr == NULL)) 4869 return (error); 4870 4871 if (fire) { 4872 u32 reg = IXGBE_READ_REG(hw, IXGBE_EICS); 4873 reg |= IXGBE_EICR_TS; 4874 IXGBE_WRITE_REG(hw, IXGBE_EICS, reg); 4875 } 4876 4877 return (0); 4878 } 4879 4880 /* 4881 ** Manage DMA Coalescing. 4882 ** Control values: 4883 ** 0/1 - off / on (use default value of 1000) 4884 ** 4885 ** Legal timer values are: 4886 ** 50,100,250,500,1000,2000,5000,10000 4887 ** 4888 ** Turning off interrupt moderation will also turn this off. 4889 */ 4890 static int 4891 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 4892 { 4893 struct adapter *adapter = (struct adapter *) arg1; 4894 struct ifnet *ifp = adapter->ifp; 4895 int error; 4896 u32 newval; 4897 4898 newval = adapter->dmac; 4899 error = sysctl_handle_int(oidp, &newval, 0, req); 4900 if ((error) || (req->newptr == NULL)) 4901 return (error); 4902 4903 switch (newval) { 4904 case 0: 4905 /* Disabled */ 4906 adapter->dmac = 0; 4907 break; 4908 case 1: 4909 /* Enable and use default */ 4910 adapter->dmac = 1000; 4911 break; 4912 case 50: 4913 case 100: 4914 case 250: 4915 case 500: 4916 case 1000: 4917 case 2000: 4918 case 5000: 4919 case 10000: 4920 /* Legal values - allow */ 4921 adapter->dmac = newval; 4922 break; 4923 default: 4924 /* Do nothing, illegal value */ 4925 return (EINVAL); 4926 } 4927 4928 /* Re-initialize hardware if it's already running */ 4929 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 4930 ixgbe_init(adapter); 4931 4932 return (0); 4933 } 4934 4935 #ifdef IXGBE_DEBUG 4936 /** 4937 * Sysctl to test power states 4938 * Values: 4939 * 0 - set device to D0 4940 * 3 - set device to D3 4941 * (none) - get current device power state 4942 */ 4943 static int 4944 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 4945 { 4946 struct adapter *adapter = (struct adapter *) arg1; 4947 device_t dev = adapter->dev; 4948 int curr_ps, new_ps, error = 0; 4949 4950 curr_ps = new_ps = pci_get_powerstate(dev); 4951 4952 error = sysctl_handle_int(oidp, &new_ps, 0, req); 4953 if ((error) || (req->newptr == NULL)) 4954 return (error); 4955 4956 if (new_ps == curr_ps) 4957 return (0); 4958 4959 if (new_ps == 3 && curr_ps == 0) 4960 error = DEVICE_SUSPEND(dev); 4961 else if (new_ps == 0 && curr_ps == 3) 4962 error = DEVICE_RESUME(dev); 4963 else 4964 return (EINVAL); 4965 4966 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 4967 4968 return (error); 4969 } 4970 #endif 4971 /* 4972 * Sysctl to enable/disable the WoL capability, if supported by the adapter. 4973 * Values: 4974 * 0 - disabled 4975 * 1 - enabled 4976 */ 4977 static int 4978 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 4979 { 4980 struct adapter *adapter = (struct adapter *) arg1; 4981 struct ixgbe_hw *hw = &adapter->hw; 4982 int new_wol_enabled; 4983 int error = 0; 4984 4985 new_wol_enabled = hw->wol_enabled; 4986 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 4987 if ((error) || (req->newptr == NULL)) 4988 return (error); 4989 new_wol_enabled = !!(new_wol_enabled); 4990 if (new_wol_enabled == hw->wol_enabled) 4991 return (0); 4992 4993 if (new_wol_enabled > 0 && !adapter->wol_support) 4994 return (ENODEV); 4995 else 4996 hw->wol_enabled = new_wol_enabled; 4997 4998 return (0); 4999 } 5000 5001 /* 5002 * Sysctl to enable/disable the Energy Efficient Ethernet capability, 5003 * if supported by the adapter. 5004 * Values: 5005 * 0 - disabled 5006 * 1 - enabled 5007 */ 5008 static int 5009 ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS) 5010 { 5011 struct adapter *adapter = (struct adapter *) arg1; 5012 struct ixgbe_hw *hw = &adapter->hw; 5013 struct ifnet *ifp = adapter->ifp; 5014 int new_eee_enabled, error = 0; 5015 5016 new_eee_enabled = adapter->eee_enabled; 5017 error = sysctl_handle_int(oidp, &new_eee_enabled, 0, req); 5018 if ((error) || (req->newptr == NULL)) 5019 return (error); 5020 new_eee_enabled = !!(new_eee_enabled); 5021 if (new_eee_enabled == adapter->eee_enabled) 5022 return (0); 5023 5024 if (new_eee_enabled > 0 && !hw->mac.ops.setup_eee) 5025 return (ENODEV); 5026 else 5027 adapter->eee_enabled = new_eee_enabled; 5028 5029 /* Re-initialize hardware if it's already running */ 5030 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 5031 ixgbe_init(adapter); 5032 5033 return (0); 5034 } 5035 5036 /* 5037 * Read-only sysctl indicating whether EEE support was negotiated 5038 * on the link. 5039 */ 5040 static int 5041 ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS) 5042 { 5043 struct adapter *adapter = (struct adapter *) arg1; 5044 struct ixgbe_hw *hw = &adapter->hw; 5045 bool status; 5046 5047 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & IXGBE_EEE_STAT_NEG); 5048 5049 return (sysctl_handle_int(oidp, 0, status, req)); 5050 } 5051 5052 /* 5053 * Read-only sysctl indicating whether RX Link is in LPI state. 5054 */ 5055 static int 5056 ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS) 5057 { 5058 struct adapter *adapter = (struct adapter *) arg1; 5059 struct ixgbe_hw *hw = &adapter->hw; 5060 bool status; 5061 5062 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5063 IXGBE_EEE_RX_LPI_STATUS); 5064 5065 return (sysctl_handle_int(oidp, 0, status, req)); 5066 } 5067 5068 /* 5069 * Read-only sysctl indicating whether TX Link is in LPI state. 5070 */ 5071 static int 5072 ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS) 5073 { 5074 struct adapter *adapter = (struct adapter *) arg1; 5075 struct ixgbe_hw *hw = &adapter->hw; 5076 bool status; 5077 5078 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5079 IXGBE_EEE_TX_LPI_STATUS); 5080 5081 return (sysctl_handle_int(oidp, 0, status, req)); 5082 } 5083 5084 /* 5085 * Read-only sysctl indicating TX Link LPI delay 5086 */ 5087 static int 5088 ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS) 5089 { 5090 struct adapter *adapter = (struct adapter *) arg1; 5091 struct ixgbe_hw *hw = &adapter->hw; 5092 u32 reg; 5093 5094 reg = IXGBE_READ_REG(hw, IXGBE_EEE_SU); 5095 5096 return (sysctl_handle_int(oidp, 0, reg >> 26, req)); 5097 } 5098 5099 /* 5100 * Sysctl to enable/disable the types of packets that the 5101 * adapter will wake up on upon receipt. 5102 * WUFC - Wake Up Filter Control 5103 * Flags: 5104 * 0x1 - Link Status Change 5105 * 0x2 - Magic Packet 5106 * 0x4 - Direct Exact 5107 * 0x8 - Directed Multicast 5108 * 0x10 - Broadcast 5109 * 0x20 - ARP/IPv4 Request Packet 5110 * 0x40 - Direct IPv4 Packet 5111 * 0x80 - Direct IPv6 Packet 5112 * 5113 * Setting another flag will cause the sysctl to return an 5114 * error. 5115 */ 5116 static int 5117 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 5118 { 5119 struct adapter *adapter = (struct adapter *) arg1; 5120 int error = 0; 5121 u32 new_wufc; 5122 5123 new_wufc = adapter->wufc; 5124 5125 error = sysctl_handle_int(oidp, &new_wufc, 0, req); 5126 if ((error) || (req->newptr == NULL)) 5127 return (error); 5128 if (new_wufc == adapter->wufc) 5129 return (0); 5130 5131 if (new_wufc & 0xffffff00) 5132 return (EINVAL); 5133 else { 5134 new_wufc &= 0xff; 5135 new_wufc |= (0xffffff & adapter->wufc); 5136 adapter->wufc = new_wufc; 5137 } 5138 5139 return (0); 5140 } 5141 5142 #ifdef IXGBE_DEBUG 5143 static int 5144 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 5145 { 5146 struct adapter *adapter = (struct adapter *)arg1; 5147 struct ixgbe_hw *hw = &adapter->hw; 5148 device_t dev = adapter->dev; 5149 int error = 0, reta_size; 5150 struct sbuf *buf; 5151 u32 reg; 5152 5153 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5154 if (!buf) { 5155 device_printf(dev, "Could not allocate sbuf for output.\n"); 5156 return (ENOMEM); 5157 } 5158 5159 // TODO: use sbufs to make a string to print out 5160 /* Set multiplier for RETA setup and table size based on MAC */ 5161 switch (adapter->hw.mac.type) { 5162 case ixgbe_mac_X550: 5163 case ixgbe_mac_X550EM_x: 5164 reta_size = 128; 5165 break; 5166 default: 5167 reta_size = 32; 5168 break; 5169 } 5170 5171 /* Print out the redirection table */ 5172 sbuf_cat(buf, "\n"); 5173 for (int i = 0; i < reta_size; i++) { 5174 if (i < 32) { 5175 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5176 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5177 } else { 5178 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5179 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5180 } 5181 } 5182 5183 // TODO: print more config 5184 5185 error = sbuf_finish(buf); 5186 if (error) 5187 device_printf(dev, "Error finishing sbuf: %d\n", error); 5188 5189 sbuf_delete(buf); 5190 return (0); 5191 } 5192 #endif /* IXGBE_DEBUG */ 5193 5194 /* 5195 ** Enable the hardware to drop packets when the buffer is 5196 ** full. This is useful when multiqueue,so that no single 5197 ** queue being full stalls the entire RX engine. We only 5198 ** enable this when Multiqueue AND when Flow Control is 5199 ** disabled. 5200 */ 5201 static void 5202 ixgbe_enable_rx_drop(struct adapter *adapter) 5203 { 5204 struct ixgbe_hw *hw = &adapter->hw; 5205 5206 for (int i = 0; i < adapter->num_queues; i++) { 5207 struct rx_ring *rxr = &adapter->rx_rings[i]; 5208 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5209 srrctl |= IXGBE_SRRCTL_DROP_EN; 5210 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5211 } 5212 #ifdef PCI_IOV 5213 /* enable drop for each vf */ 5214 for (int i = 0; i < adapter->num_vfs; i++) { 5215 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5216 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5217 IXGBE_QDE_ENABLE)); 5218 } 5219 #endif 5220 } 5221 5222 static void 5223 ixgbe_disable_rx_drop(struct adapter *adapter) 5224 { 5225 struct ixgbe_hw *hw = &adapter->hw; 5226 5227 for (int i = 0; i < adapter->num_queues; i++) { 5228 struct rx_ring *rxr = &adapter->rx_rings[i]; 5229 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5230 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5231 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5232 } 5233 #ifdef PCI_IOV 5234 /* disable drop for each vf */ 5235 for (int i = 0; i < adapter->num_vfs; i++) { 5236 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5237 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5238 } 5239 #endif 5240 } 5241 5242 static void 5243 ixgbe_rearm_queues(struct adapter *adapter, u64 queues) 5244 { 5245 u32 mask; 5246 5247 switch (adapter->hw.mac.type) { 5248 case ixgbe_mac_82598EB: 5249 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 5250 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 5251 break; 5252 case ixgbe_mac_82599EB: 5253 case ixgbe_mac_X540: 5254 case ixgbe_mac_X550: 5255 case ixgbe_mac_X550EM_x: 5256 mask = (queues & 0xFFFFFFFF); 5257 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); 5258 mask = (queues >> 32); 5259 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask); 5260 break; 5261 default: 5262 break; 5263 } 5264 } 5265 5266 #ifdef PCI_IOV 5267 5268 /* 5269 ** Support functions for SRIOV/VF management 5270 */ 5271 5272 static void 5273 ixgbe_ping_all_vfs(struct adapter *adapter) 5274 { 5275 struct ixgbe_vf *vf; 5276 5277 for (int i = 0; i < adapter->num_vfs; i++) { 5278 vf = &adapter->vfs[i]; 5279 if (vf->flags & IXGBE_VF_ACTIVE) 5280 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5281 } 5282 } 5283 5284 5285 static void 5286 ixgbe_vf_set_default_vlan(struct adapter *adapter, struct ixgbe_vf *vf, 5287 uint16_t tag) 5288 { 5289 struct ixgbe_hw *hw; 5290 uint32_t vmolr, vmvir; 5291 5292 hw = &adapter->hw; 5293 5294 vf->vlan_tag = tag; 5295 5296 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf->pool)); 5297 5298 /* Do not receive packets that pass inexact filters. */ 5299 vmolr &= ~(IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_ROPE); 5300 5301 /* Disable Multicast Promicuous Mode. */ 5302 vmolr &= ~IXGBE_VMOLR_MPE; 5303 5304 /* Accept broadcasts. */ 5305 vmolr |= IXGBE_VMOLR_BAM; 5306 5307 if (tag == 0) { 5308 /* Accept non-vlan tagged traffic. */ 5309 //vmolr |= IXGBE_VMOLR_AUPE; 5310 5311 /* Allow VM to tag outgoing traffic; no default tag. */ 5312 vmvir = 0; 5313 } else { 5314 /* Require vlan-tagged traffic. */ 5315 vmolr &= ~IXGBE_VMOLR_AUPE; 5316 5317 /* Tag all traffic with provided vlan tag. */ 5318 vmvir = (tag | IXGBE_VMVIR_VLANA_DEFAULT); 5319 } 5320 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr); 5321 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir); 5322 } 5323 5324 5325 static boolean_t 5326 ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf) 5327 { 5328 5329 /* 5330 * Frame size compatibility between PF and VF is only a problem on 5331 * 82599-based cards. X540 and later support any combination of jumbo 5332 * frames on PFs and VFs. 5333 */ 5334 if (adapter->hw.mac.type != ixgbe_mac_82599EB) 5335 return (TRUE); 5336 5337 switch (vf->api_ver) { 5338 case IXGBE_API_VER_1_0: 5339 case IXGBE_API_VER_UNKNOWN: 5340 /* 5341 * On legacy (1.0 and older) VF versions, we don't support jumbo 5342 * frames on either the PF or the VF. 5343 */ 5344 if (adapter->max_frame_size > ETHER_MAX_LEN || 5345 vf->max_frame_size > ETHER_MAX_LEN) 5346 return (FALSE); 5347 5348 return (TRUE); 5349 5350 break; 5351 case IXGBE_API_VER_1_1: 5352 default: 5353 /* 5354 * 1.1 or later VF versions always work if they aren't using 5355 * jumbo frames. 5356 */ 5357 if (vf->max_frame_size <= ETHER_MAX_LEN) 5358 return (TRUE); 5359 5360 /* 5361 * Jumbo frames only work with VFs if the PF is also using jumbo 5362 * frames. 5363 */ 5364 if (adapter->max_frame_size <= ETHER_MAX_LEN) 5365 return (TRUE); 5366 5367 return (FALSE); 5368 5369 } 5370 } 5371 5372 5373 static void 5374 ixgbe_process_vf_reset(struct adapter *adapter, struct ixgbe_vf *vf) 5375 { 5376 ixgbe_vf_set_default_vlan(adapter, vf, vf->default_vlan); 5377 5378 // XXX clear multicast addresses 5379 5380 ixgbe_clear_rar(&adapter->hw, vf->rar_index); 5381 5382 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5383 } 5384 5385 5386 static void 5387 ixgbe_vf_enable_transmit(struct adapter *adapter, struct ixgbe_vf *vf) 5388 { 5389 struct ixgbe_hw *hw; 5390 uint32_t vf_index, vfte; 5391 5392 hw = &adapter->hw; 5393 5394 vf_index = IXGBE_VF_INDEX(vf->pool); 5395 vfte = IXGBE_READ_REG(hw, IXGBE_VFTE(vf_index)); 5396 vfte |= IXGBE_VF_BIT(vf->pool); 5397 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte); 5398 } 5399 5400 5401 static void 5402 ixgbe_vf_enable_receive(struct adapter *adapter, struct ixgbe_vf *vf) 5403 { 5404 struct ixgbe_hw *hw; 5405 uint32_t vf_index, vfre; 5406 5407 hw = &adapter->hw; 5408 5409 vf_index = IXGBE_VF_INDEX(vf->pool); 5410 vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(vf_index)); 5411 if (ixgbe_vf_frame_size_compatible(adapter, vf)) 5412 vfre |= IXGBE_VF_BIT(vf->pool); 5413 else 5414 vfre &= ~IXGBE_VF_BIT(vf->pool); 5415 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre); 5416 } 5417 5418 5419 static void 5420 ixgbe_vf_reset_msg(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5421 { 5422 struct ixgbe_hw *hw; 5423 uint32_t ack; 5424 uint32_t resp[IXGBE_VF_PERMADDR_MSG_LEN]; 5425 5426 hw = &adapter->hw; 5427 5428 ixgbe_process_vf_reset(adapter, vf); 5429 5430 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5431 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5432 vf->ether_addr, vf->pool, TRUE); 5433 ack = IXGBE_VT_MSGTYPE_ACK; 5434 } else 5435 ack = IXGBE_VT_MSGTYPE_NACK; 5436 5437 ixgbe_vf_enable_transmit(adapter, vf); 5438 ixgbe_vf_enable_receive(adapter, vf); 5439 5440 vf->flags |= IXGBE_VF_CTS; 5441 5442 resp[0] = IXGBE_VF_RESET | ack | IXGBE_VT_MSGTYPE_CTS; 5443 bcopy(vf->ether_addr, &resp[1], ETHER_ADDR_LEN); 5444 resp[3] = hw->mac.mc_filter_type; 5445 ixgbe_write_mbx(hw, resp, IXGBE_VF_PERMADDR_MSG_LEN, vf->pool); 5446 } 5447 5448 5449 static void 5450 ixgbe_vf_set_mac(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5451 { 5452 uint8_t *mac; 5453 5454 mac = (uint8_t*)&msg[1]; 5455 5456 /* Check that the VF has permission to change the MAC address. */ 5457 if (!(vf->flags & IXGBE_VF_CAP_MAC) && ixgbe_vf_mac_changed(vf, mac)) { 5458 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5459 return; 5460 } 5461 5462 if (ixgbe_validate_mac_addr(mac) != 0) { 5463 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5464 return; 5465 } 5466 5467 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5468 5469 ixgbe_set_rar(&adapter->hw, vf->rar_index, vf->ether_addr, 5470 vf->pool, TRUE); 5471 5472 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5473 } 5474 5475 5476 /* 5477 ** VF multicast addresses are set by using the appropriate bit in 5478 ** 1 of 128 32 bit addresses (4096 possible). 5479 */ 5480 static void 5481 ixgbe_vf_set_mc_addr(struct adapter *adapter, struct ixgbe_vf *vf, u32 *msg) 5482 { 5483 u16 *list = (u16*)&msg[1]; 5484 int entries; 5485 u32 vmolr, vec_bit, vec_reg, mta_reg; 5486 5487 entries = (msg[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; 5488 entries = min(entries, IXGBE_MAX_VF_MC); 5489 5490 vmolr = IXGBE_READ_REG(&adapter->hw, IXGBE_VMOLR(vf->pool)); 5491 5492 vf->num_mc_hashes = entries; 5493 5494 /* Set the appropriate MTA bit */ 5495 for (int i = 0; i < entries; i++) { 5496 vf->mc_hash[i] = list[i]; 5497 vec_reg = (vf->mc_hash[i] >> 5) & 0x7F; 5498 vec_bit = vf->mc_hash[i] & 0x1F; 5499 mta_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_MTA(vec_reg)); 5500 mta_reg |= (1 << vec_bit); 5501 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MTA(vec_reg), mta_reg); 5502 } 5503 5504 vmolr |= IXGBE_VMOLR_ROMPE; 5505 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(vf->pool), vmolr); 5506 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5507 return; 5508 } 5509 5510 5511 static void 5512 ixgbe_vf_set_vlan(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5513 { 5514 struct ixgbe_hw *hw; 5515 int enable; 5516 uint16_t tag; 5517 5518 hw = &adapter->hw; 5519 enable = IXGBE_VT_MSGINFO(msg[0]); 5520 tag = msg[1] & IXGBE_VLVF_VLANID_MASK; 5521 5522 if (!(vf->flags & IXGBE_VF_CAP_VLAN)) { 5523 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5524 return; 5525 } 5526 5527 /* It is illegal to enable vlan tag 0. */ 5528 if (tag == 0 && enable != 0){ 5529 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5530 return; 5531 } 5532 5533 ixgbe_set_vfta(hw, tag, vf->pool, enable); 5534 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5535 } 5536 5537 5538 static void 5539 ixgbe_vf_set_lpe(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5540 { 5541 struct ixgbe_hw *hw; 5542 uint32_t vf_max_size, pf_max_size, mhadd; 5543 5544 hw = &adapter->hw; 5545 vf_max_size = msg[1]; 5546 5547 if (vf_max_size < ETHER_CRC_LEN) { 5548 /* We intentionally ACK invalid LPE requests. */ 5549 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5550 return; 5551 } 5552 5553 vf_max_size -= ETHER_CRC_LEN; 5554 5555 if (vf_max_size > IXGBE_MAX_FRAME_SIZE) { 5556 /* We intentionally ACK invalid LPE requests. */ 5557 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5558 return; 5559 } 5560 5561 vf->max_frame_size = vf_max_size; 5562 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5563 5564 /* 5565 * We might have to disable reception to this VF if the frame size is 5566 * not compatible with the config on the PF. 5567 */ 5568 ixgbe_vf_enable_receive(adapter, vf); 5569 5570 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 5571 pf_max_size = (mhadd & IXGBE_MHADD_MFS_MASK) >> IXGBE_MHADD_MFS_SHIFT; 5572 5573 if (pf_max_size < adapter->max_frame_size) { 5574 mhadd &= ~IXGBE_MHADD_MFS_MASK; 5575 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 5576 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 5577 } 5578 5579 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5580 } 5581 5582 5583 static void 5584 ixgbe_vf_set_macvlan(struct adapter *adapter, struct ixgbe_vf *vf, 5585 uint32_t *msg) 5586 { 5587 //XXX implement this 5588 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5589 } 5590 5591 5592 static void 5593 ixgbe_vf_api_negotiate(struct adapter *adapter, struct ixgbe_vf *vf, 5594 uint32_t *msg) 5595 { 5596 5597 switch (msg[1]) { 5598 case IXGBE_API_VER_1_0: 5599 case IXGBE_API_VER_1_1: 5600 vf->api_ver = msg[1]; 5601 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5602 break; 5603 default: 5604 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5605 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5606 break; 5607 } 5608 } 5609 5610 5611 static void 5612 ixgbe_vf_get_queues(struct adapter *adapter, struct ixgbe_vf *vf, 5613 uint32_t *msg) 5614 { 5615 struct ixgbe_hw *hw; 5616 uint32_t resp[IXGBE_VF_GET_QUEUES_RESP_LEN]; 5617 int num_queues; 5618 5619 hw = &adapter->hw; 5620 5621 /* GET_QUEUES is not supported on pre-1.1 APIs. */ 5622 switch (msg[0]) { 5623 case IXGBE_API_VER_1_0: 5624 case IXGBE_API_VER_UNKNOWN: 5625 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5626 return; 5627 } 5628 5629 resp[0] = IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK | 5630 IXGBE_VT_MSGTYPE_CTS; 5631 5632 num_queues = ixgbe_vf_queues(ixgbe_get_iov_mode(adapter)); 5633 resp[IXGBE_VF_TX_QUEUES] = num_queues; 5634 resp[IXGBE_VF_RX_QUEUES] = num_queues; 5635 resp[IXGBE_VF_TRANS_VLAN] = (vf->default_vlan != 0); 5636 resp[IXGBE_VF_DEF_QUEUE] = 0; 5637 5638 ixgbe_write_mbx(hw, resp, IXGBE_VF_GET_QUEUES_RESP_LEN, vf->pool); 5639 } 5640 5641 5642 static void 5643 ixgbe_process_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf) 5644 { 5645 struct ixgbe_hw *hw; 5646 uint32_t msg[IXGBE_VFMAILBOX_SIZE]; 5647 int error; 5648 5649 hw = &adapter->hw; 5650 5651 error = ixgbe_read_mbx(hw, msg, IXGBE_VFMAILBOX_SIZE, vf->pool); 5652 5653 if (error != 0) 5654 return; 5655 5656 CTR3(KTR_MALLOC, "%s: received msg %x from %d", 5657 adapter->ifp->if_xname, msg[0], vf->pool); 5658 if (msg[0] == IXGBE_VF_RESET) { 5659 ixgbe_vf_reset_msg(adapter, vf, msg); 5660 return; 5661 } 5662 5663 if (!(vf->flags & IXGBE_VF_CTS)) { 5664 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5665 return; 5666 } 5667 5668 switch (msg[0] & IXGBE_VT_MSG_MASK) { 5669 case IXGBE_VF_SET_MAC_ADDR: 5670 ixgbe_vf_set_mac(adapter, vf, msg); 5671 break; 5672 case IXGBE_VF_SET_MULTICAST: 5673 ixgbe_vf_set_mc_addr(adapter, vf, msg); 5674 break; 5675 case IXGBE_VF_SET_VLAN: 5676 ixgbe_vf_set_vlan(adapter, vf, msg); 5677 break; 5678 case IXGBE_VF_SET_LPE: 5679 ixgbe_vf_set_lpe(adapter, vf, msg); 5680 break; 5681 case IXGBE_VF_SET_MACVLAN: 5682 ixgbe_vf_set_macvlan(adapter, vf, msg); 5683 break; 5684 case IXGBE_VF_API_NEGOTIATE: 5685 ixgbe_vf_api_negotiate(adapter, vf, msg); 5686 break; 5687 case IXGBE_VF_GET_QUEUES: 5688 ixgbe_vf_get_queues(adapter, vf, msg); 5689 break; 5690 default: 5691 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5692 } 5693 } 5694 5695 5696 /* 5697 * Tasklet for handling VF -> PF mailbox messages. 5698 */ 5699 static void 5700 ixgbe_handle_mbx(void *context, int pending) 5701 { 5702 struct adapter *adapter; 5703 struct ixgbe_hw *hw; 5704 struct ixgbe_vf *vf; 5705 int i; 5706 5707 adapter = context; 5708 hw = &adapter->hw; 5709 5710 IXGBE_CORE_LOCK(adapter); 5711 for (i = 0; i < adapter->num_vfs; i++) { 5712 vf = &adapter->vfs[i]; 5713 5714 if (vf->flags & IXGBE_VF_ACTIVE) { 5715 if (ixgbe_check_for_rst(hw, vf->pool) == 0) 5716 ixgbe_process_vf_reset(adapter, vf); 5717 5718 if (ixgbe_check_for_msg(hw, vf->pool) == 0) 5719 ixgbe_process_vf_msg(adapter, vf); 5720 5721 if (ixgbe_check_for_ack(hw, vf->pool) == 0) 5722 ixgbe_process_vf_ack(adapter, vf); 5723 } 5724 } 5725 IXGBE_CORE_UNLOCK(adapter); 5726 } 5727 5728 5729 static int 5730 ixgbe_init_iov(device_t dev, u16 num_vfs, const nvlist_t *config) 5731 { 5732 struct adapter *adapter; 5733 enum ixgbe_iov_mode mode; 5734 5735 adapter = device_get_softc(dev); 5736 adapter->num_vfs = num_vfs; 5737 mode = ixgbe_get_iov_mode(adapter); 5738 5739 if (num_vfs > ixgbe_max_vfs(mode)) { 5740 adapter->num_vfs = 0; 5741 return (ENOSPC); 5742 } 5743 5744 IXGBE_CORE_LOCK(adapter); 5745 5746 adapter->vfs = malloc(sizeof(*adapter->vfs) * num_vfs, M_IXGBE, 5747 M_NOWAIT | M_ZERO); 5748 5749 if (adapter->vfs == NULL) { 5750 adapter->num_vfs = 0; 5751 IXGBE_CORE_UNLOCK(adapter); 5752 return (ENOMEM); 5753 } 5754 5755 ixgbe_init_locked(adapter); 5756 5757 IXGBE_CORE_UNLOCK(adapter); 5758 5759 return (0); 5760 } 5761 5762 5763 static void 5764 ixgbe_uninit_iov(device_t dev) 5765 { 5766 struct ixgbe_hw *hw; 5767 struct adapter *adapter; 5768 uint32_t pf_reg, vf_reg; 5769 5770 adapter = device_get_softc(dev); 5771 hw = &adapter->hw; 5772 5773 IXGBE_CORE_LOCK(adapter); 5774 5775 /* Enable rx/tx for the PF and disable it for all VFs. */ 5776 pf_reg = IXGBE_VF_INDEX(adapter->pool); 5777 IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), 5778 IXGBE_VF_BIT(adapter->pool)); 5779 IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), 5780 IXGBE_VF_BIT(adapter->pool)); 5781 5782 if (pf_reg == 0) 5783 vf_reg = 1; 5784 else 5785 vf_reg = 0; 5786 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 0); 5787 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 0); 5788 5789 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0); 5790 5791 free(adapter->vfs, M_IXGBE); 5792 adapter->vfs = NULL; 5793 adapter->num_vfs = 0; 5794 5795 IXGBE_CORE_UNLOCK(adapter); 5796 } 5797 5798 5799 static void 5800 ixgbe_initialize_iov(struct adapter *adapter) 5801 { 5802 struct ixgbe_hw *hw = &adapter->hw; 5803 uint32_t mrqc, mtqc, vt_ctl, vf_reg, gcr_ext, gpie; 5804 enum ixgbe_iov_mode mode; 5805 int i; 5806 5807 mode = ixgbe_get_iov_mode(adapter); 5808 if (mode == IXGBE_NO_VM) 5809 return; 5810 5811 IXGBE_CORE_LOCK_ASSERT(adapter); 5812 5813 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 5814 mrqc &= ~IXGBE_MRQC_MRQE_MASK; 5815 5816 switch (mode) { 5817 case IXGBE_64_VM: 5818 mrqc |= IXGBE_MRQC_VMDQRSS64EN; 5819 break; 5820 case IXGBE_32_VM: 5821 mrqc |= IXGBE_MRQC_VMDQRSS32EN; 5822 break; 5823 default: 5824 panic("Unexpected SR-IOV mode %d", mode); 5825 } 5826 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 5827 5828 mtqc = IXGBE_MTQC_VT_ENA; 5829 switch (mode) { 5830 case IXGBE_64_VM: 5831 mtqc |= IXGBE_MTQC_64VF; 5832 break; 5833 case IXGBE_32_VM: 5834 mtqc |= IXGBE_MTQC_32VF; 5835 break; 5836 default: 5837 panic("Unexpected SR-IOV mode %d", mode); 5838 } 5839 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); 5840 5841 5842 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); 5843 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN; 5844 gcr_ext &= ~IXGBE_GCR_EXT_VT_MODE_MASK; 5845 switch (mode) { 5846 case IXGBE_64_VM: 5847 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64; 5848 break; 5849 case IXGBE_32_VM: 5850 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_32; 5851 break; 5852 default: 5853 panic("Unexpected SR-IOV mode %d", mode); 5854 } 5855 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); 5856 5857 5858 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 5859 gcr_ext &= ~IXGBE_GPIE_VTMODE_MASK; 5860 switch (mode) { 5861 case IXGBE_64_VM: 5862 gpie |= IXGBE_GPIE_VTMODE_64; 5863 break; 5864 case IXGBE_32_VM: 5865 gpie |= IXGBE_GPIE_VTMODE_32; 5866 break; 5867 default: 5868 panic("Unexpected SR-IOV mode %d", mode); 5869 } 5870 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 5871 5872 /* Enable rx/tx for the PF. */ 5873 vf_reg = IXGBE_VF_INDEX(adapter->pool); 5874 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 5875 IXGBE_VF_BIT(adapter->pool)); 5876 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 5877 IXGBE_VF_BIT(adapter->pool)); 5878 5879 /* Allow VM-to-VM communication. */ 5880 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); 5881 5882 vt_ctl = IXGBE_VT_CTL_VT_ENABLE | IXGBE_VT_CTL_REPLEN; 5883 vt_ctl |= (adapter->pool << IXGBE_VT_CTL_POOL_SHIFT); 5884 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl); 5885 5886 for (i = 0; i < adapter->num_vfs; i++) 5887 ixgbe_init_vf(adapter, &adapter->vfs[i]); 5888 } 5889 5890 5891 /* 5892 ** Check the max frame setting of all active VF's 5893 */ 5894 static void 5895 ixgbe_recalculate_max_frame(struct adapter *adapter) 5896 { 5897 struct ixgbe_vf *vf; 5898 5899 IXGBE_CORE_LOCK_ASSERT(adapter); 5900 5901 for (int i = 0; i < adapter->num_vfs; i++) { 5902 vf = &adapter->vfs[i]; 5903 if (vf->flags & IXGBE_VF_ACTIVE) 5904 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5905 } 5906 } 5907 5908 5909 static void 5910 ixgbe_init_vf(struct adapter *adapter, struct ixgbe_vf *vf) 5911 { 5912 struct ixgbe_hw *hw; 5913 uint32_t vf_index, pfmbimr; 5914 5915 IXGBE_CORE_LOCK_ASSERT(adapter); 5916 5917 hw = &adapter->hw; 5918 5919 if (!(vf->flags & IXGBE_VF_ACTIVE)) 5920 return; 5921 5922 vf_index = IXGBE_VF_INDEX(vf->pool); 5923 pfmbimr = IXGBE_READ_REG(hw, IXGBE_PFMBIMR(vf_index)); 5924 pfmbimr |= IXGBE_VF_BIT(vf->pool); 5925 IXGBE_WRITE_REG(hw, IXGBE_PFMBIMR(vf_index), pfmbimr); 5926 5927 ixgbe_vf_set_default_vlan(adapter, vf, vf->vlan_tag); 5928 5929 // XXX multicast addresses 5930 5931 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5932 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5933 vf->ether_addr, vf->pool, TRUE); 5934 } 5935 5936 ixgbe_vf_enable_transmit(adapter, vf); 5937 ixgbe_vf_enable_receive(adapter, vf); 5938 5939 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5940 } 5941 5942 static int 5943 ixgbe_add_vf(device_t dev, u16 vfnum, const nvlist_t *config) 5944 { 5945 struct adapter *adapter; 5946 struct ixgbe_vf *vf; 5947 const void *mac; 5948 5949 adapter = device_get_softc(dev); 5950 5951 KASSERT(vfnum < adapter->num_vfs, ("VF index %d is out of range %d", 5952 vfnum, adapter->num_vfs)); 5953 5954 IXGBE_CORE_LOCK(adapter); 5955 vf = &adapter->vfs[vfnum]; 5956 vf->pool= vfnum; 5957 5958 /* RAR[0] is used by the PF so use vfnum + 1 for VF RAR. */ 5959 vf->rar_index = vfnum + 1; 5960 vf->default_vlan = 0; 5961 vf->max_frame_size = ETHER_MAX_LEN; 5962 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5963 5964 if (nvlist_exists_binary(config, "mac-addr")) { 5965 mac = nvlist_get_binary(config, "mac-addr", NULL); 5966 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5967 if (nvlist_get_bool(config, "allow-set-mac")) 5968 vf->flags |= IXGBE_VF_CAP_MAC; 5969 } else 5970 /* 5971 * If the administrator has not specified a MAC address then 5972 * we must allow the VF to choose one. 5973 */ 5974 vf->flags |= IXGBE_VF_CAP_MAC; 5975 5976 vf->flags = IXGBE_VF_ACTIVE; 5977 5978 ixgbe_init_vf(adapter, vf); 5979 IXGBE_CORE_UNLOCK(adapter); 5980 5981 return (0); 5982 } 5983 #endif /* PCI_IOV */ 5984 5985