1 /****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef IXGBE_STANDALONE_BUILD 37 #include "opt_inet.h" 38 #include "opt_inet6.h" 39 #include "opt_rss.h" 40 #endif 41 42 #include "ixgbe.h" 43 44 #ifdef RSS 45 #include <net/rss_config.h> 46 #include <netinet/in_rss.h> 47 #endif 48 49 /********************************************************************* 50 * Driver version 51 *********************************************************************/ 52 char ixgbe_driver_version[] = "3.1.13-k"; 53 54 55 /********************************************************************* 56 * PCI Device ID Table 57 * 58 * Used by probe to select devices to load on 59 * Last field stores an index into ixgbe_strings 60 * Last entry must be all 0s 61 * 62 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 63 *********************************************************************/ 64 65 static ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 66 { 67 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 68 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 69 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 70 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 71 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 72 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 73 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 74 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 75 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 76 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 77 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 78 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 79 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 80 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 81 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 82 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 83 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 84 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 85 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 86 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 87 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 88 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 89 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 90 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 91 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 92 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 93 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 94 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 95 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 96 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 97 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 98 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 99 /* required last entry */ 100 {0, 0, 0, 0, 0} 101 }; 102 103 /********************************************************************* 104 * Table of branding strings 105 *********************************************************************/ 106 107 static char *ixgbe_strings[] = { 108 "Intel(R) PRO/10GbE PCI-Express Network Driver" 109 }; 110 111 /********************************************************************* 112 * Function prototypes 113 *********************************************************************/ 114 static int ixgbe_probe(device_t); 115 static int ixgbe_attach(device_t); 116 static int ixgbe_detach(device_t); 117 static int ixgbe_shutdown(device_t); 118 static int ixgbe_suspend(device_t); 119 static int ixgbe_resume(device_t); 120 static int ixgbe_ioctl(struct ifnet *, u_long, caddr_t); 121 static void ixgbe_init(void *); 122 static void ixgbe_init_locked(struct adapter *); 123 static void ixgbe_stop(void *); 124 #if __FreeBSD_version >= 1100036 125 static uint64_t ixgbe_get_counter(struct ifnet *, ift_counter); 126 #endif 127 static void ixgbe_add_media_types(struct adapter *); 128 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 129 static int ixgbe_media_change(struct ifnet *); 130 static void ixgbe_identify_hardware(struct adapter *); 131 static int ixgbe_allocate_pci_resources(struct adapter *); 132 static void ixgbe_get_slot_info(struct adapter *); 133 static int ixgbe_allocate_msix(struct adapter *); 134 static int ixgbe_allocate_legacy(struct adapter *); 135 static int ixgbe_setup_msix(struct adapter *); 136 static void ixgbe_free_pci_resources(struct adapter *); 137 static void ixgbe_local_timer(void *); 138 static int ixgbe_setup_interface(device_t, struct adapter *); 139 static void ixgbe_config_gpie(struct adapter *); 140 static void ixgbe_config_dmac(struct adapter *); 141 static void ixgbe_config_delay_values(struct adapter *); 142 static void ixgbe_config_link(struct adapter *); 143 static void ixgbe_check_wol_support(struct adapter *); 144 static int ixgbe_setup_low_power_mode(struct adapter *); 145 static void ixgbe_rearm_queues(struct adapter *, u64); 146 147 static void ixgbe_initialize_transmit_units(struct adapter *); 148 static void ixgbe_initialize_receive_units(struct adapter *); 149 static void ixgbe_enable_rx_drop(struct adapter *); 150 static void ixgbe_disable_rx_drop(struct adapter *); 151 static void ixgbe_initialize_rss_mapping(struct adapter *); 152 153 static void ixgbe_enable_intr(struct adapter *); 154 static void ixgbe_disable_intr(struct adapter *); 155 static void ixgbe_update_stats_counters(struct adapter *); 156 static void ixgbe_set_promisc(struct adapter *); 157 static void ixgbe_set_multi(struct adapter *); 158 static void ixgbe_update_link_status(struct adapter *); 159 static void ixgbe_set_ivar(struct adapter *, u8, u8, s8); 160 static void ixgbe_configure_ivars(struct adapter *); 161 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 162 163 static void ixgbe_setup_vlan_hw_support(struct adapter *); 164 static void ixgbe_register_vlan(void *, struct ifnet *, u16); 165 static void ixgbe_unregister_vlan(void *, struct ifnet *, u16); 166 167 static void ixgbe_add_device_sysctls(struct adapter *); 168 static void ixgbe_add_hw_stats(struct adapter *); 169 static int ixgbe_set_flowcntl(struct adapter *, int); 170 static int ixgbe_set_advertise(struct adapter *, int); 171 172 /* Sysctl handlers */ 173 static void ixgbe_set_sysctl_value(struct adapter *, const char *, 174 const char *, int *, int); 175 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS); 176 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS); 177 static int ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS); 178 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 179 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 180 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 181 #ifdef IXGBE_DEBUG 182 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 183 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 184 #endif 185 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 186 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 187 static int ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS); 188 static int ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS); 189 static int ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS); 190 static int ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS); 191 static int ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS); 192 193 /* Support for pluggable optic modules */ 194 static bool ixgbe_sfp_probe(struct adapter *); 195 static void ixgbe_setup_optics(struct adapter *); 196 197 /* Legacy (single vector interrupt handler */ 198 static void ixgbe_legacy_irq(void *); 199 200 /* The MSI/X Interrupt handlers */ 201 static void ixgbe_msix_que(void *); 202 static void ixgbe_msix_link(void *); 203 204 /* Deferred interrupt tasklets */ 205 static void ixgbe_handle_que(void *, int); 206 static void ixgbe_handle_link(void *, int); 207 static void ixgbe_handle_msf(void *, int); 208 static void ixgbe_handle_mod(void *, int); 209 static void ixgbe_handle_phy(void *, int); 210 211 #ifdef IXGBE_FDIR 212 static void ixgbe_reinit_fdir(void *, int); 213 #endif 214 215 #ifdef PCI_IOV 216 static void ixgbe_ping_all_vfs(struct adapter *); 217 static void ixgbe_handle_mbx(void *, int); 218 static int ixgbe_init_iov(device_t, u16, const nvlist_t *); 219 static void ixgbe_uninit_iov(device_t); 220 static int ixgbe_add_vf(device_t, u16, const nvlist_t *); 221 static void ixgbe_initialize_iov(struct adapter *); 222 static void ixgbe_recalculate_max_frame(struct adapter *); 223 static void ixgbe_init_vf(struct adapter *, struct ixgbe_vf *); 224 #endif /* PCI_IOV */ 225 226 227 /********************************************************************* 228 * FreeBSD Device Interface Entry Points 229 *********************************************************************/ 230 231 static device_method_t ix_methods[] = { 232 /* Device interface */ 233 DEVMETHOD(device_probe, ixgbe_probe), 234 DEVMETHOD(device_attach, ixgbe_attach), 235 DEVMETHOD(device_detach, ixgbe_detach), 236 DEVMETHOD(device_shutdown, ixgbe_shutdown), 237 DEVMETHOD(device_suspend, ixgbe_suspend), 238 DEVMETHOD(device_resume, ixgbe_resume), 239 #ifdef PCI_IOV 240 DEVMETHOD(pci_iov_init, ixgbe_init_iov), 241 DEVMETHOD(pci_iov_uninit, ixgbe_uninit_iov), 242 DEVMETHOD(pci_iov_add_vf, ixgbe_add_vf), 243 #endif /* PCI_IOV */ 244 DEVMETHOD_END 245 }; 246 247 static driver_t ix_driver = { 248 "ix", ix_methods, sizeof(struct adapter), 249 }; 250 251 devclass_t ix_devclass; 252 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 253 254 MODULE_DEPEND(ix, pci, 1, 1, 1); 255 MODULE_DEPEND(ix, ether, 1, 1, 1); 256 #ifdef DEV_NETMAP 257 MODULE_DEPEND(ix, netmap, 1, 1, 1); 258 #endif /* DEV_NETMAP */ 259 260 /* 261 ** TUNEABLE PARAMETERS: 262 */ 263 264 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD, 0, 265 "IXGBE driver parameters"); 266 267 /* 268 ** AIM: Adaptive Interrupt Moderation 269 ** which means that the interrupt rate 270 ** is varied over time based on the 271 ** traffic for that interrupt vector 272 */ 273 static int ixgbe_enable_aim = TRUE; 274 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 0, 275 "Enable adaptive interrupt moderation"); 276 277 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 278 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 279 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 280 281 /* How many packets rxeof tries to clean at a time */ 282 static int ixgbe_rx_process_limit = 256; 283 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 284 &ixgbe_rx_process_limit, 0, 285 "Maximum number of received packets to process at a time," 286 "-1 means unlimited"); 287 288 /* How many packets txeof tries to clean at a time */ 289 static int ixgbe_tx_process_limit = 256; 290 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 291 &ixgbe_tx_process_limit, 0, 292 "Maximum number of sent packets to process at a time," 293 "-1 means unlimited"); 294 295 /* Flow control setting, default to full */ 296 static int ixgbe_flow_control = ixgbe_fc_full; 297 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 298 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 299 300 /* Advertise Speed, default to 0 (auto) */ 301 static int ixgbe_advertise_speed = 0; 302 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN, 303 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters"); 304 305 /* 306 ** Smart speed setting, default to on 307 ** this only works as a compile option 308 ** right now as its during attach, set 309 ** this to 'ixgbe_smart_speed_off' to 310 ** disable. 311 */ 312 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 313 314 /* 315 * MSIX should be the default for best performance, 316 * but this allows it to be forced off for testing. 317 */ 318 static int ixgbe_enable_msix = 1; 319 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 320 "Enable MSI-X interrupts"); 321 322 /* 323 * Number of Queues, can be set to 0, 324 * it then autoconfigures based on the 325 * number of cpus with a max of 8. This 326 * can be overriden manually here. 327 */ 328 static int ixgbe_num_queues = 0; 329 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 330 "Number of queues to configure, 0 indicates autoconfigure"); 331 332 /* 333 ** Number of TX descriptors per ring, 334 ** setting higher than RX as this seems 335 ** the better performing choice. 336 */ 337 static int ixgbe_txd = PERFORM_TXD; 338 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 339 "Number of transmit descriptors per queue"); 340 341 /* Number of RX descriptors per ring */ 342 static int ixgbe_rxd = PERFORM_RXD; 343 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 344 "Number of receive descriptors per queue"); 345 346 /* 347 ** Defining this on will allow the use 348 ** of unsupported SFP+ modules, note that 349 ** doing so you are on your own :) 350 */ 351 static int allow_unsupported_sfp = FALSE; 352 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 353 354 /* Keep running tab on them for sanity check */ 355 static int ixgbe_total_ports; 356 357 #ifdef IXGBE_FDIR 358 /* 359 ** Flow Director actually 'steals' 360 ** part of the packet buffer as its 361 ** filter pool, this variable controls 362 ** how much it uses: 363 ** 0 = 64K, 1 = 128K, 2 = 256K 364 */ 365 static int fdir_pballoc = 1; 366 #endif 367 368 #ifdef DEV_NETMAP 369 /* 370 * The #ifdef DEV_NETMAP / #endif blocks in this file are meant to 371 * be a reference on how to implement netmap support in a driver. 372 * Additional comments are in ixgbe_netmap.h . 373 * 374 * <dev/netmap/ixgbe_netmap.h> contains functions for netmap support 375 * that extend the standard driver. 376 */ 377 #include <dev/netmap/ixgbe_netmap.h> 378 #endif /* DEV_NETMAP */ 379 380 static MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 381 382 /********************************************************************* 383 * Device identification routine 384 * 385 * ixgbe_probe determines if the driver should be loaded on 386 * adapter based on PCI vendor/device id of the adapter. 387 * 388 * return BUS_PROBE_DEFAULT on success, positive on failure 389 *********************************************************************/ 390 391 static int 392 ixgbe_probe(device_t dev) 393 { 394 ixgbe_vendor_info_t *ent; 395 396 u16 pci_vendor_id = 0; 397 u16 pci_device_id = 0; 398 u16 pci_subvendor_id = 0; 399 u16 pci_subdevice_id = 0; 400 char adapter_name[256]; 401 402 INIT_DEBUGOUT("ixgbe_probe: begin"); 403 404 pci_vendor_id = pci_get_vendor(dev); 405 if (pci_vendor_id != IXGBE_INTEL_VENDOR_ID) 406 return (ENXIO); 407 408 pci_device_id = pci_get_device(dev); 409 pci_subvendor_id = pci_get_subvendor(dev); 410 pci_subdevice_id = pci_get_subdevice(dev); 411 412 ent = ixgbe_vendor_info_array; 413 while (ent->vendor_id != 0) { 414 if ((pci_vendor_id == ent->vendor_id) && 415 (pci_device_id == ent->device_id) && 416 417 ((pci_subvendor_id == ent->subvendor_id) || 418 (ent->subvendor_id == 0)) && 419 420 ((pci_subdevice_id == ent->subdevice_id) || 421 (ent->subdevice_id == 0))) { 422 sprintf(adapter_name, "%s, Version - %s", 423 ixgbe_strings[ent->index], 424 ixgbe_driver_version); 425 device_set_desc_copy(dev, adapter_name); 426 ++ixgbe_total_ports; 427 return (BUS_PROBE_DEFAULT); 428 } 429 ent++; 430 } 431 return (ENXIO); 432 } 433 434 /********************************************************************* 435 * Device initialization routine 436 * 437 * The attach entry point is called when the driver is being loaded. 438 * This routine identifies the type of hardware, allocates all resources 439 * and initializes the hardware. 440 * 441 * return 0 on success, positive on failure 442 *********************************************************************/ 443 444 static int 445 ixgbe_attach(device_t dev) 446 { 447 struct adapter *adapter; 448 struct ixgbe_hw *hw; 449 int error = 0; 450 u16 csum; 451 u32 ctrl_ext; 452 453 INIT_DEBUGOUT("ixgbe_attach: begin"); 454 455 /* Allocate, clear, and link in our adapter structure */ 456 adapter = device_get_softc(dev); 457 adapter->dev = dev; 458 hw = &adapter->hw; 459 460 #ifdef DEV_NETMAP 461 adapter->init_locked = ixgbe_init_locked; 462 adapter->stop_locked = ixgbe_stop; 463 #endif 464 465 /* Core Lock Init*/ 466 IXGBE_CORE_LOCK_INIT(adapter, device_get_nameunit(dev)); 467 468 /* Set up the timer callout */ 469 callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0); 470 471 /* Determine hardware revision */ 472 ixgbe_identify_hardware(adapter); 473 474 /* Do base PCI setup - map BAR0 */ 475 if (ixgbe_allocate_pci_resources(adapter)) { 476 device_printf(dev, "Allocation of PCI resources failed\n"); 477 error = ENXIO; 478 goto err_out; 479 } 480 481 /* Sysctls for limiting the amount of work done in the taskqueues */ 482 ixgbe_set_sysctl_value(adapter, "rx_processing_limit", 483 "max number of rx packets to process", 484 &adapter->rx_process_limit, ixgbe_rx_process_limit); 485 486 ixgbe_set_sysctl_value(adapter, "tx_processing_limit", 487 "max number of tx packets to process", 488 &adapter->tx_process_limit, ixgbe_tx_process_limit); 489 490 /* Do descriptor calc and sanity checks */ 491 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 492 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 493 device_printf(dev, "TXD config issue, using default!\n"); 494 adapter->num_tx_desc = DEFAULT_TXD; 495 } else 496 adapter->num_tx_desc = ixgbe_txd; 497 498 /* 499 ** With many RX rings it is easy to exceed the 500 ** system mbuf allocation. Tuning nmbclusters 501 ** can alleviate this. 502 */ 503 if (nmbclusters > 0) { 504 int s; 505 s = (ixgbe_rxd * adapter->num_queues) * ixgbe_total_ports; 506 if (s > nmbclusters) { 507 device_printf(dev, "RX Descriptors exceed " 508 "system mbuf max, using default instead!\n"); 509 ixgbe_rxd = DEFAULT_RXD; 510 } 511 } 512 513 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 514 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 515 device_printf(dev, "RXD config issue, using default!\n"); 516 adapter->num_rx_desc = DEFAULT_RXD; 517 } else 518 adapter->num_rx_desc = ixgbe_rxd; 519 520 /* Allocate our TX/RX Queues */ 521 if (ixgbe_allocate_queues(adapter)) { 522 error = ENOMEM; 523 goto err_out; 524 } 525 526 /* Allocate multicast array memory. */ 527 adapter->mta = malloc(sizeof(*adapter->mta) * 528 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT); 529 if (adapter->mta == NULL) { 530 device_printf(dev, "Can not allocate multicast setup array\n"); 531 error = ENOMEM; 532 goto err_late; 533 } 534 535 /* Initialize the shared code */ 536 hw->allow_unsupported_sfp = allow_unsupported_sfp; 537 error = ixgbe_init_shared_code(hw); 538 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 539 /* 540 ** No optics in this port, set up 541 ** so the timer routine will probe 542 ** for later insertion. 543 */ 544 adapter->sfp_probe = TRUE; 545 error = 0; 546 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 547 device_printf(dev, "Unsupported SFP+ module detected!\n"); 548 error = EIO; 549 goto err_late; 550 } else if (error) { 551 device_printf(dev, "Unable to initialize the shared code\n"); 552 error = EIO; 553 goto err_late; 554 } 555 556 /* Make sure we have a good EEPROM before we read from it */ 557 if (ixgbe_validate_eeprom_checksum(&adapter->hw, &csum) < 0) { 558 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 559 error = EIO; 560 goto err_late; 561 } 562 563 error = ixgbe_init_hw(hw); 564 switch (error) { 565 case IXGBE_ERR_EEPROM_VERSION: 566 device_printf(dev, "This device is a pre-production adapter/" 567 "LOM. Please be aware there may be issues associated " 568 "with your hardware.\nIf you are experiencing problems " 569 "please contact your Intel or hardware representative " 570 "who provided you with this hardware.\n"); 571 break; 572 case IXGBE_ERR_SFP_NOT_SUPPORTED: 573 device_printf(dev, "Unsupported SFP+ Module\n"); 574 error = EIO; 575 goto err_late; 576 case IXGBE_ERR_SFP_NOT_PRESENT: 577 device_printf(dev, "No SFP+ Module found\n"); 578 /* falls thru */ 579 default: 580 break; 581 } 582 583 /* hw.ix defaults init */ 584 ixgbe_set_advertise(adapter, ixgbe_advertise_speed); 585 ixgbe_set_flowcntl(adapter, ixgbe_flow_control); 586 adapter->enable_aim = ixgbe_enable_aim; 587 588 if ((adapter->msix > 1) && (ixgbe_enable_msix)) 589 error = ixgbe_allocate_msix(adapter); 590 else 591 error = ixgbe_allocate_legacy(adapter); 592 if (error) 593 goto err_late; 594 595 /* Enable the optics for 82599 SFP+ fiber */ 596 ixgbe_enable_tx_laser(hw); 597 598 /* Enable power to the phy. */ 599 ixgbe_set_phy_power(hw, TRUE); 600 601 /* Setup OS specific network interface */ 602 if (ixgbe_setup_interface(dev, adapter) != 0) 603 goto err_late; 604 605 /* Initialize statistics */ 606 ixgbe_update_stats_counters(adapter); 607 608 /* Register for VLAN events */ 609 adapter->vlan_attach = EVENTHANDLER_REGISTER(vlan_config, 610 ixgbe_register_vlan, adapter, EVENTHANDLER_PRI_FIRST); 611 adapter->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig, 612 ixgbe_unregister_vlan, adapter, EVENTHANDLER_PRI_FIRST); 613 614 /* Check PCIE slot type/speed/width */ 615 ixgbe_get_slot_info(adapter); 616 617 /* Set an initial default flow control & dmac value */ 618 adapter->fc = ixgbe_fc_full; 619 adapter->dmac = 0; 620 adapter->eee_enabled = 0; 621 622 #ifdef PCI_IOV 623 if ((hw->mac.type != ixgbe_mac_82598EB) && (adapter->msix > 1)) { 624 nvlist_t *pf_schema, *vf_schema; 625 626 hw->mbx.ops.init_params(hw); 627 pf_schema = pci_iov_schema_alloc_node(); 628 vf_schema = pci_iov_schema_alloc_node(); 629 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); 630 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", 631 IOV_SCHEMA_HASDEFAULT, TRUE); 632 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", 633 IOV_SCHEMA_HASDEFAULT, FALSE); 634 pci_iov_schema_add_bool(vf_schema, "allow-promisc", 635 IOV_SCHEMA_HASDEFAULT, FALSE); 636 error = pci_iov_attach(dev, pf_schema, vf_schema); 637 if (error != 0) { 638 device_printf(dev, 639 "Error %d setting up SR-IOV\n", error); 640 } 641 } 642 #endif /* PCI_IOV */ 643 644 /* Check for certain supported features */ 645 ixgbe_check_wol_support(adapter); 646 647 /* Add sysctls */ 648 ixgbe_add_device_sysctls(adapter); 649 ixgbe_add_hw_stats(adapter); 650 651 /* let hardware know driver is loaded */ 652 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 653 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 654 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 655 656 #ifdef DEV_NETMAP 657 ixgbe_netmap_attach(adapter); 658 #endif /* DEV_NETMAP */ 659 INIT_DEBUGOUT("ixgbe_attach: end"); 660 return (0); 661 662 err_late: 663 ixgbe_free_transmit_structures(adapter); 664 ixgbe_free_receive_structures(adapter); 665 err_out: 666 if (adapter->ifp != NULL) 667 if_free(adapter->ifp); 668 ixgbe_free_pci_resources(adapter); 669 free(adapter->mta, M_DEVBUF); 670 return (error); 671 } 672 673 /********************************************************************* 674 * Device removal routine 675 * 676 * The detach entry point is called when the driver is being removed. 677 * This routine stops the adapter and deallocates all the resources 678 * that were allocated for driver operation. 679 * 680 * return 0 on success, positive on failure 681 *********************************************************************/ 682 683 static int 684 ixgbe_detach(device_t dev) 685 { 686 struct adapter *adapter = device_get_softc(dev); 687 struct ix_queue *que = adapter->queues; 688 struct tx_ring *txr = adapter->tx_rings; 689 u32 ctrl_ext; 690 691 INIT_DEBUGOUT("ixgbe_detach: begin"); 692 693 /* Make sure VLANS are not using driver */ 694 if (adapter->ifp->if_vlantrunk != NULL) { 695 device_printf(dev,"Vlan in use, detach first\n"); 696 return (EBUSY); 697 } 698 699 #ifdef PCI_IOV 700 if (pci_iov_detach(dev) != 0) { 701 device_printf(dev, "SR-IOV in use; detach first.\n"); 702 return (EBUSY); 703 } 704 #endif /* PCI_IOV */ 705 706 ether_ifdetach(adapter->ifp); 707 /* Stop the adapter */ 708 IXGBE_CORE_LOCK(adapter); 709 ixgbe_setup_low_power_mode(adapter); 710 IXGBE_CORE_UNLOCK(adapter); 711 712 for (int i = 0; i < adapter->num_queues; i++, que++, txr++) { 713 if (que->tq) { 714 #ifndef IXGBE_LEGACY_TX 715 taskqueue_drain(que->tq, &txr->txq_task); 716 #endif 717 taskqueue_drain(que->tq, &que->que_task); 718 taskqueue_free(que->tq); 719 } 720 } 721 722 /* Drain the Link queue */ 723 if (adapter->tq) { 724 taskqueue_drain(adapter->tq, &adapter->link_task); 725 taskqueue_drain(adapter->tq, &adapter->mod_task); 726 taskqueue_drain(adapter->tq, &adapter->msf_task); 727 #ifdef PCI_IOV 728 taskqueue_drain(adapter->tq, &adapter->mbx_task); 729 #endif 730 taskqueue_drain(adapter->tq, &adapter->phy_task); 731 #ifdef IXGBE_FDIR 732 taskqueue_drain(adapter->tq, &adapter->fdir_task); 733 #endif 734 taskqueue_free(adapter->tq); 735 } 736 737 /* let hardware know driver is unloading */ 738 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 739 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 740 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext); 741 742 /* Unregister VLAN events */ 743 if (adapter->vlan_attach != NULL) 744 EVENTHANDLER_DEREGISTER(vlan_config, adapter->vlan_attach); 745 if (adapter->vlan_detach != NULL) 746 EVENTHANDLER_DEREGISTER(vlan_unconfig, adapter->vlan_detach); 747 748 callout_drain(&adapter->timer); 749 #ifdef DEV_NETMAP 750 netmap_detach(adapter->ifp); 751 #endif /* DEV_NETMAP */ 752 ixgbe_free_pci_resources(adapter); 753 bus_generic_detach(dev); 754 if_free(adapter->ifp); 755 756 ixgbe_free_transmit_structures(adapter); 757 ixgbe_free_receive_structures(adapter); 758 free(adapter->mta, M_DEVBUF); 759 760 IXGBE_CORE_LOCK_DESTROY(adapter); 761 return (0); 762 } 763 764 /********************************************************************* 765 * 766 * Shutdown entry point 767 * 768 **********************************************************************/ 769 770 static int 771 ixgbe_shutdown(device_t dev) 772 { 773 struct adapter *adapter = device_get_softc(dev); 774 int error = 0; 775 776 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 777 778 IXGBE_CORE_LOCK(adapter); 779 error = ixgbe_setup_low_power_mode(adapter); 780 IXGBE_CORE_UNLOCK(adapter); 781 782 return (error); 783 } 784 785 /** 786 * Methods for going from: 787 * D0 -> D3: ixgbe_suspend 788 * D3 -> D0: ixgbe_resume 789 */ 790 static int 791 ixgbe_suspend(device_t dev) 792 { 793 struct adapter *adapter = device_get_softc(dev); 794 int error = 0; 795 796 INIT_DEBUGOUT("ixgbe_suspend: begin"); 797 798 IXGBE_CORE_LOCK(adapter); 799 800 error = ixgbe_setup_low_power_mode(adapter); 801 802 IXGBE_CORE_UNLOCK(adapter); 803 804 return (error); 805 } 806 807 static int 808 ixgbe_resume(device_t dev) 809 { 810 struct adapter *adapter = device_get_softc(dev); 811 struct ifnet *ifp = adapter->ifp; 812 struct ixgbe_hw *hw = &adapter->hw; 813 u32 wus; 814 815 INIT_DEBUGOUT("ixgbe_resume: begin"); 816 817 IXGBE_CORE_LOCK(adapter); 818 819 /* Read & clear WUS register */ 820 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 821 if (wus) 822 device_printf(dev, "Woken up by (WUS): %#010x\n", 823 IXGBE_READ_REG(hw, IXGBE_WUS)); 824 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 825 /* And clear WUFC until next low-power transition */ 826 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 827 828 /* 829 * Required after D3->D0 transition; 830 * will re-advertise all previous advertised speeds 831 */ 832 if (ifp->if_flags & IFF_UP) 833 ixgbe_init_locked(adapter); 834 835 IXGBE_CORE_UNLOCK(adapter); 836 837 return (0); 838 } 839 840 841 /********************************************************************* 842 * Ioctl entry point 843 * 844 * ixgbe_ioctl is called when the user wants to configure the 845 * interface. 846 * 847 * return 0 on success, positive on failure 848 **********************************************************************/ 849 850 static int 851 ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data) 852 { 853 struct adapter *adapter = ifp->if_softc; 854 struct ifreq *ifr = (struct ifreq *) data; 855 #if defined(INET) || defined(INET6) 856 struct ifaddr *ifa = (struct ifaddr *)data; 857 #endif 858 int error = 0; 859 bool avoid_reset = FALSE; 860 861 switch (command) { 862 863 case SIOCSIFADDR: 864 #ifdef INET 865 if (ifa->ifa_addr->sa_family == AF_INET) 866 avoid_reset = TRUE; 867 #endif 868 #ifdef INET6 869 if (ifa->ifa_addr->sa_family == AF_INET6) 870 avoid_reset = TRUE; 871 #endif 872 /* 873 ** Calling init results in link renegotiation, 874 ** so we avoid doing it when possible. 875 */ 876 if (avoid_reset) { 877 ifp->if_flags |= IFF_UP; 878 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 879 ixgbe_init(adapter); 880 #ifdef INET 881 if (!(ifp->if_flags & IFF_NOARP)) 882 arp_ifinit(ifp, ifa); 883 #endif 884 } else 885 error = ether_ioctl(ifp, command, data); 886 break; 887 case SIOCSIFMTU: 888 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 889 if (ifr->ifr_mtu > IXGBE_MAX_MTU) { 890 error = EINVAL; 891 } else { 892 IXGBE_CORE_LOCK(adapter); 893 ifp->if_mtu = ifr->ifr_mtu; 894 adapter->max_frame_size = 895 ifp->if_mtu + IXGBE_MTU_HDR; 896 ixgbe_init_locked(adapter); 897 #ifdef PCI_IOV 898 ixgbe_recalculate_max_frame(adapter); 899 #endif 900 IXGBE_CORE_UNLOCK(adapter); 901 } 902 break; 903 case SIOCSIFFLAGS: 904 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 905 IXGBE_CORE_LOCK(adapter); 906 if (ifp->if_flags & IFF_UP) { 907 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 908 if ((ifp->if_flags ^ adapter->if_flags) & 909 (IFF_PROMISC | IFF_ALLMULTI)) { 910 ixgbe_set_promisc(adapter); 911 } 912 } else 913 ixgbe_init_locked(adapter); 914 } else 915 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 916 ixgbe_stop(adapter); 917 adapter->if_flags = ifp->if_flags; 918 IXGBE_CORE_UNLOCK(adapter); 919 break; 920 case SIOCADDMULTI: 921 case SIOCDELMULTI: 922 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 923 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 924 IXGBE_CORE_LOCK(adapter); 925 ixgbe_disable_intr(adapter); 926 ixgbe_set_multi(adapter); 927 ixgbe_enable_intr(adapter); 928 IXGBE_CORE_UNLOCK(adapter); 929 } 930 break; 931 case SIOCSIFMEDIA: 932 case SIOCGIFMEDIA: 933 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 934 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 935 break; 936 case SIOCSIFCAP: 937 { 938 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 939 940 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 941 if (!mask) 942 break; 943 944 /* HW cannot turn these on/off separately */ 945 if (mask & (IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6)) { 946 ifp->if_capenable ^= IFCAP_RXCSUM; 947 ifp->if_capenable ^= IFCAP_RXCSUM_IPV6; 948 } 949 if (mask & IFCAP_TXCSUM) 950 ifp->if_capenable ^= IFCAP_TXCSUM; 951 if (mask & IFCAP_TXCSUM_IPV6) 952 ifp->if_capenable ^= IFCAP_TXCSUM_IPV6; 953 if (mask & IFCAP_TSO4) 954 ifp->if_capenable ^= IFCAP_TSO4; 955 if (mask & IFCAP_TSO6) 956 ifp->if_capenable ^= IFCAP_TSO6; 957 if (mask & IFCAP_LRO) 958 ifp->if_capenable ^= IFCAP_LRO; 959 if (mask & IFCAP_VLAN_HWTAGGING) 960 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 961 if (mask & IFCAP_VLAN_HWFILTER) 962 ifp->if_capenable ^= IFCAP_VLAN_HWFILTER; 963 if (mask & IFCAP_VLAN_HWTSO) 964 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 965 966 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 967 IXGBE_CORE_LOCK(adapter); 968 ixgbe_init_locked(adapter); 969 IXGBE_CORE_UNLOCK(adapter); 970 } 971 VLAN_CAPABILITIES(ifp); 972 break; 973 } 974 #if __FreeBSD_version >= 1100036 975 case SIOCGI2C: 976 { 977 struct ixgbe_hw *hw = &adapter->hw; 978 struct ifi2creq i2c; 979 int i; 980 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 981 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 982 if (error != 0) 983 break; 984 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 985 error = EINVAL; 986 break; 987 } 988 if (i2c.len > sizeof(i2c.data)) { 989 error = EINVAL; 990 break; 991 } 992 993 for (i = 0; i < i2c.len; i++) 994 hw->phy.ops.read_i2c_byte(hw, i2c.offset + i, 995 i2c.dev_addr, &i2c.data[i]); 996 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 997 break; 998 } 999 #endif 1000 default: 1001 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)\n", (int)command); 1002 error = ether_ioctl(ifp, command, data); 1003 break; 1004 } 1005 1006 return (error); 1007 } 1008 1009 /* 1010 * Set the various hardware offload abilities. 1011 * 1012 * This takes the ifnet's if_capenable flags (e.g. set by the user using 1013 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 1014 * mbuf offload flags the driver will understand. 1015 */ 1016 static void 1017 ixgbe_set_if_hwassist(struct adapter *adapter) 1018 { 1019 struct ifnet *ifp = adapter->ifp; 1020 1021 ifp->if_hwassist = 0; 1022 #if __FreeBSD_version >= 1000000 1023 if (ifp->if_capenable & IFCAP_TSO4) 1024 ifp->if_hwassist |= CSUM_IP_TSO; 1025 if (ifp->if_capenable & IFCAP_TSO6) 1026 ifp->if_hwassist |= CSUM_IP6_TSO; 1027 if (ifp->if_capenable & IFCAP_TXCSUM) 1028 ifp->if_hwassist |= (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | 1029 CSUM_IP_SCTP); 1030 if (ifp->if_capenable & IFCAP_TXCSUM_IPV6) 1031 ifp->if_hwassist |= (CSUM_IP6_UDP | CSUM_IP6_TCP | 1032 CSUM_IP6_SCTP); 1033 #else 1034 if (ifp->if_capenable & IFCAP_TSO) 1035 ifp->if_hwassist |= CSUM_TSO; 1036 if (ifp->if_capenable & IFCAP_TXCSUM) { 1037 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP); 1038 struct ixgbe_hw *hw = &adapter->hw; 1039 if (hw->mac.type != ixgbe_mac_82598EB) 1040 ifp->if_hwassist |= CSUM_SCTP; 1041 } 1042 #endif 1043 } 1044 1045 /********************************************************************* 1046 * Init entry point 1047 * 1048 * This routine is used in two ways. It is used by the stack as 1049 * init entry point in network interface structure. It is also used 1050 * by the driver as a hw/sw initialization routine to get to a 1051 * consistent state. 1052 * 1053 * return 0 on success, positive on failure 1054 **********************************************************************/ 1055 #define IXGBE_MHADD_MFS_SHIFT 16 1056 1057 static void 1058 ixgbe_init_locked(struct adapter *adapter) 1059 { 1060 struct ifnet *ifp = adapter->ifp; 1061 device_t dev = adapter->dev; 1062 struct ixgbe_hw *hw = &adapter->hw; 1063 struct tx_ring *txr; 1064 struct rx_ring *rxr; 1065 u32 txdctl, mhadd; 1066 u32 rxdctl, rxctrl; 1067 int err = 0; 1068 #ifdef PCI_IOV 1069 enum ixgbe_iov_mode mode; 1070 #endif 1071 1072 mtx_assert(&adapter->core_mtx, MA_OWNED); 1073 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 1074 1075 hw->adapter_stopped = FALSE; 1076 ixgbe_stop_adapter(hw); 1077 callout_stop(&adapter->timer); 1078 1079 #ifdef PCI_IOV 1080 mode = ixgbe_get_iov_mode(adapter); 1081 adapter->pool = ixgbe_max_vfs(mode); 1082 /* Queue indices may change with IOV mode */ 1083 for (int i = 0; i < adapter->num_queues; i++) { 1084 adapter->rx_rings[i].me = ixgbe_pf_que_index(mode, i); 1085 adapter->tx_rings[i].me = ixgbe_pf_que_index(mode, i); 1086 } 1087 #endif 1088 /* reprogram the RAR[0] in case user changed it. */ 1089 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV); 1090 1091 /* Get the latest mac address, User can use a LAA */ 1092 bcopy(IF_LLADDR(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 1093 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1); 1094 hw->addr_ctrl.rar_used_count = 1; 1095 1096 /* Set hardware offload abilities from ifnet flags */ 1097 ixgbe_set_if_hwassist(adapter); 1098 1099 /* Prepare transmit descriptors and buffers */ 1100 if (ixgbe_setup_transmit_structures(adapter)) { 1101 device_printf(dev, "Could not setup transmit structures\n"); 1102 ixgbe_stop(adapter); 1103 return; 1104 } 1105 1106 ixgbe_init_hw(hw); 1107 #ifdef PCI_IOV 1108 ixgbe_initialize_iov(adapter); 1109 #endif 1110 ixgbe_initialize_transmit_units(adapter); 1111 1112 /* Setup Multicast table */ 1113 ixgbe_set_multi(adapter); 1114 1115 /* Determine the correct mbuf pool, based on frame size */ 1116 if (adapter->max_frame_size <= MCLBYTES) 1117 adapter->rx_mbuf_sz = MCLBYTES; 1118 else 1119 adapter->rx_mbuf_sz = MJUMPAGESIZE; 1120 1121 /* Prepare receive descriptors and buffers */ 1122 if (ixgbe_setup_receive_structures(adapter)) { 1123 device_printf(dev, "Could not setup receive structures\n"); 1124 ixgbe_stop(adapter); 1125 return; 1126 } 1127 1128 /* Configure RX settings */ 1129 ixgbe_initialize_receive_units(adapter); 1130 1131 /* Enable SDP & MSIX interrupts based on adapter */ 1132 ixgbe_config_gpie(adapter); 1133 1134 /* Set MTU size */ 1135 if (ifp->if_mtu > ETHERMTU) { 1136 /* aka IXGBE_MAXFRS on 82599 and newer */ 1137 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 1138 mhadd &= ~IXGBE_MHADD_MFS_MASK; 1139 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 1140 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 1141 } 1142 1143 /* Now enable all the queues */ 1144 for (int i = 0; i < adapter->num_queues; i++) { 1145 txr = &adapter->tx_rings[i]; 1146 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 1147 txdctl |= IXGBE_TXDCTL_ENABLE; 1148 /* Set WTHRESH to 8, burst writeback */ 1149 txdctl |= (8 << 16); 1150 /* 1151 * When the internal queue falls below PTHRESH (32), 1152 * start prefetching as long as there are at least 1153 * HTHRESH (1) buffers ready. The values are taken 1154 * from the Intel linux driver 3.8.21. 1155 * Prefetching enables tx line rate even with 1 queue. 1156 */ 1157 txdctl |= (32 << 0) | (1 << 8); 1158 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 1159 } 1160 1161 for (int i = 0, j = 0; i < adapter->num_queues; i++) { 1162 rxr = &adapter->rx_rings[i]; 1163 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 1164 if (hw->mac.type == ixgbe_mac_82598EB) { 1165 /* 1166 ** PTHRESH = 21 1167 ** HTHRESH = 4 1168 ** WTHRESH = 8 1169 */ 1170 rxdctl &= ~0x3FFFFF; 1171 rxdctl |= 0x080420; 1172 } 1173 rxdctl |= IXGBE_RXDCTL_ENABLE; 1174 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 1175 for (; j < 10; j++) { 1176 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 1177 IXGBE_RXDCTL_ENABLE) 1178 break; 1179 else 1180 msec_delay(1); 1181 } 1182 wmb(); 1183 #ifdef DEV_NETMAP 1184 /* 1185 * In netmap mode, we must preserve the buffers made 1186 * available to userspace before the if_init() 1187 * (this is true by default on the TX side, because 1188 * init makes all buffers available to userspace). 1189 * 1190 * netmap_reset() and the device specific routines 1191 * (e.g. ixgbe_setup_receive_rings()) map these 1192 * buffers at the end of the NIC ring, so here we 1193 * must set the RDT (tail) register to make sure 1194 * they are not overwritten. 1195 * 1196 * In this driver the NIC ring starts at RDH = 0, 1197 * RDT points to the last slot available for reception (?), 1198 * so RDT = num_rx_desc - 1 means the whole ring is available. 1199 */ 1200 if (ifp->if_capenable & IFCAP_NETMAP) { 1201 struct netmap_adapter *na = NA(adapter->ifp); 1202 struct netmap_kring *kring = &na->rx_rings[i]; 1203 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 1204 1205 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 1206 } else 1207 #endif /* DEV_NETMAP */ 1208 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), adapter->num_rx_desc - 1); 1209 } 1210 1211 /* Enable Receive engine */ 1212 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 1213 if (hw->mac.type == ixgbe_mac_82598EB) 1214 rxctrl |= IXGBE_RXCTRL_DMBYPS; 1215 rxctrl |= IXGBE_RXCTRL_RXEN; 1216 ixgbe_enable_rx_dma(hw, rxctrl); 1217 1218 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 1219 1220 /* Set up MSI/X routing */ 1221 if (ixgbe_enable_msix) { 1222 ixgbe_configure_ivars(adapter); 1223 /* Set up auto-mask */ 1224 if (hw->mac.type == ixgbe_mac_82598EB) 1225 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1226 else { 1227 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 1228 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 1229 } 1230 } else { /* Simple settings for Legacy/MSI */ 1231 ixgbe_set_ivar(adapter, 0, 0, 0); 1232 ixgbe_set_ivar(adapter, 0, 0, 1); 1233 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1234 } 1235 1236 #ifdef IXGBE_FDIR 1237 /* Init Flow director */ 1238 if (hw->mac.type != ixgbe_mac_82598EB) { 1239 u32 hdrm = 32 << fdir_pballoc; 1240 1241 hw->mac.ops.setup_rxpba(hw, 0, hdrm, PBA_STRATEGY_EQUAL); 1242 ixgbe_init_fdir_signature_82599(&adapter->hw, fdir_pballoc); 1243 } 1244 #endif 1245 1246 /* 1247 * Check on any SFP devices that 1248 * need to be kick-started 1249 */ 1250 if (hw->phy.type == ixgbe_phy_none) { 1251 err = hw->phy.ops.identify(hw); 1252 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1253 device_printf(dev, 1254 "Unsupported SFP+ module type was detected.\n"); 1255 return; 1256 } 1257 } 1258 1259 /* Set moderation on the Link interrupt */ 1260 IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR); 1261 1262 /* Configure Energy Efficient Ethernet for supported devices */ 1263 if (hw->mac.ops.setup_eee) { 1264 err = hw->mac.ops.setup_eee(hw, adapter->eee_enabled); 1265 if (err) 1266 device_printf(dev, "Error setting up EEE: %d\n", err); 1267 } 1268 1269 /* Enable power to the phy. */ 1270 ixgbe_set_phy_power(hw, TRUE); 1271 1272 /* Config/Enable Link */ 1273 ixgbe_config_link(adapter); 1274 1275 /* Hardware Packet Buffer & Flow Control setup */ 1276 ixgbe_config_delay_values(adapter); 1277 1278 /* Initialize the FC settings */ 1279 ixgbe_start_hw(hw); 1280 1281 /* Set up VLAN support and filter */ 1282 ixgbe_setup_vlan_hw_support(adapter); 1283 1284 /* Setup DMA Coalescing */ 1285 ixgbe_config_dmac(adapter); 1286 1287 /* And now turn on interrupts */ 1288 ixgbe_enable_intr(adapter); 1289 1290 #ifdef PCI_IOV 1291 /* Enable the use of the MBX by the VF's */ 1292 { 1293 u32 reg = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1294 reg |= IXGBE_CTRL_EXT_PFRSTD; 1295 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, reg); 1296 } 1297 #endif 1298 1299 /* Now inform the stack we're ready */ 1300 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1301 1302 return; 1303 } 1304 1305 static void 1306 ixgbe_init(void *arg) 1307 { 1308 struct adapter *adapter = arg; 1309 1310 IXGBE_CORE_LOCK(adapter); 1311 ixgbe_init_locked(adapter); 1312 IXGBE_CORE_UNLOCK(adapter); 1313 return; 1314 } 1315 1316 static void 1317 ixgbe_config_gpie(struct adapter *adapter) 1318 { 1319 struct ixgbe_hw *hw = &adapter->hw; 1320 u32 gpie; 1321 1322 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 1323 1324 /* Fan Failure Interrupt */ 1325 if (hw->device_id == IXGBE_DEV_ID_82598AT) 1326 gpie |= IXGBE_SDP1_GPIEN; 1327 1328 /* 1329 * Module detection (SDP2) 1330 * Media ready (SDP1) 1331 */ 1332 if (hw->mac.type == ixgbe_mac_82599EB) { 1333 gpie |= IXGBE_SDP2_GPIEN; 1334 if (hw->device_id != IXGBE_DEV_ID_82599_QSFP_SF_QP) 1335 gpie |= IXGBE_SDP1_GPIEN; 1336 } 1337 1338 /* 1339 * Thermal Failure Detection (X540) 1340 * Link Detection (X552 SFP+, X552/X557-AT) 1341 */ 1342 if (hw->mac.type == ixgbe_mac_X540 || 1343 hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 1344 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 1345 gpie |= IXGBE_SDP0_GPIEN_X540; 1346 1347 if (adapter->msix > 1) { 1348 /* Enable Enhanced MSIX mode */ 1349 gpie |= IXGBE_GPIE_MSIX_MODE; 1350 gpie |= IXGBE_GPIE_EIAME | IXGBE_GPIE_PBA_SUPPORT | 1351 IXGBE_GPIE_OCD; 1352 } 1353 1354 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 1355 return; 1356 } 1357 1358 /* 1359 * Requires adapter->max_frame_size to be set. 1360 */ 1361 static void 1362 ixgbe_config_delay_values(struct adapter *adapter) 1363 { 1364 struct ixgbe_hw *hw = &adapter->hw; 1365 u32 rxpb, frame, size, tmp; 1366 1367 frame = adapter->max_frame_size; 1368 1369 /* Calculate High Water */ 1370 switch (hw->mac.type) { 1371 case ixgbe_mac_X540: 1372 case ixgbe_mac_X550: 1373 case ixgbe_mac_X550EM_x: 1374 tmp = IXGBE_DV_X540(frame, frame); 1375 break; 1376 default: 1377 tmp = IXGBE_DV(frame, frame); 1378 break; 1379 } 1380 size = IXGBE_BT2KB(tmp); 1381 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 1382 hw->fc.high_water[0] = rxpb - size; 1383 1384 /* Now calculate Low Water */ 1385 switch (hw->mac.type) { 1386 case ixgbe_mac_X540: 1387 case ixgbe_mac_X550: 1388 case ixgbe_mac_X550EM_x: 1389 tmp = IXGBE_LOW_DV_X540(frame); 1390 break; 1391 default: 1392 tmp = IXGBE_LOW_DV(frame); 1393 break; 1394 } 1395 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 1396 1397 hw->fc.requested_mode = adapter->fc; 1398 hw->fc.pause_time = IXGBE_FC_PAUSE; 1399 hw->fc.send_xon = TRUE; 1400 } 1401 1402 /* 1403 ** 1404 ** MSIX Interrupt Handlers and Tasklets 1405 ** 1406 */ 1407 1408 static inline void 1409 ixgbe_enable_queue(struct adapter *adapter, u32 vector) 1410 { 1411 struct ixgbe_hw *hw = &adapter->hw; 1412 u64 queue = (u64)(1 << vector); 1413 u32 mask; 1414 1415 if (hw->mac.type == ixgbe_mac_82598EB) { 1416 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1417 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 1418 } else { 1419 mask = (queue & 0xFFFFFFFF); 1420 if (mask) 1421 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 1422 mask = (queue >> 32); 1423 if (mask) 1424 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 1425 } 1426 } 1427 1428 static inline void 1429 ixgbe_disable_queue(struct adapter *adapter, u32 vector) 1430 { 1431 struct ixgbe_hw *hw = &adapter->hw; 1432 u64 queue = (u64)(1 << vector); 1433 u32 mask; 1434 1435 if (hw->mac.type == ixgbe_mac_82598EB) { 1436 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1437 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 1438 } else { 1439 mask = (queue & 0xFFFFFFFF); 1440 if (mask) 1441 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 1442 mask = (queue >> 32); 1443 if (mask) 1444 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 1445 } 1446 } 1447 1448 static void 1449 ixgbe_handle_que(void *context, int pending) 1450 { 1451 struct ix_queue *que = context; 1452 struct adapter *adapter = que->adapter; 1453 struct tx_ring *txr = que->txr; 1454 struct ifnet *ifp = adapter->ifp; 1455 1456 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1457 ixgbe_rxeof(que); 1458 IXGBE_TX_LOCK(txr); 1459 ixgbe_txeof(txr); 1460 #ifndef IXGBE_LEGACY_TX 1461 if (!drbr_empty(ifp, txr->br)) 1462 ixgbe_mq_start_locked(ifp, txr); 1463 #else 1464 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1465 ixgbe_start_locked(txr, ifp); 1466 #endif 1467 IXGBE_TX_UNLOCK(txr); 1468 } 1469 1470 /* Reenable this interrupt */ 1471 if (que->res != NULL) 1472 ixgbe_enable_queue(adapter, que->msix); 1473 else 1474 ixgbe_enable_intr(adapter); 1475 return; 1476 } 1477 1478 1479 /********************************************************************* 1480 * 1481 * Legacy Interrupt Service routine 1482 * 1483 **********************************************************************/ 1484 1485 static void 1486 ixgbe_legacy_irq(void *arg) 1487 { 1488 struct ix_queue *que = arg; 1489 struct adapter *adapter = que->adapter; 1490 struct ixgbe_hw *hw = &adapter->hw; 1491 struct ifnet *ifp = adapter->ifp; 1492 struct tx_ring *txr = adapter->tx_rings; 1493 bool more; 1494 u32 reg_eicr; 1495 1496 1497 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 1498 1499 ++que->irqs; 1500 if (reg_eicr == 0) { 1501 ixgbe_enable_intr(adapter); 1502 return; 1503 } 1504 1505 more = ixgbe_rxeof(que); 1506 1507 IXGBE_TX_LOCK(txr); 1508 ixgbe_txeof(txr); 1509 #ifdef IXGBE_LEGACY_TX 1510 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1511 ixgbe_start_locked(txr, ifp); 1512 #else 1513 if (!drbr_empty(ifp, txr->br)) 1514 ixgbe_mq_start_locked(ifp, txr); 1515 #endif 1516 IXGBE_TX_UNLOCK(txr); 1517 1518 /* Check for fan failure */ 1519 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1520 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1521 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1522 "REPLACE IMMEDIATELY!!\n"); 1523 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1524 } 1525 1526 /* Link status change */ 1527 if (reg_eicr & IXGBE_EICR_LSC) 1528 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1529 1530 /* External PHY interrupt */ 1531 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1532 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) 1533 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1534 1535 if (more) 1536 taskqueue_enqueue(que->tq, &que->que_task); 1537 else 1538 ixgbe_enable_intr(adapter); 1539 return; 1540 } 1541 1542 1543 /********************************************************************* 1544 * 1545 * MSIX Queue Interrupt Service routine 1546 * 1547 **********************************************************************/ 1548 void 1549 ixgbe_msix_que(void *arg) 1550 { 1551 struct ix_queue *que = arg; 1552 struct adapter *adapter = que->adapter; 1553 struct ifnet *ifp = adapter->ifp; 1554 struct tx_ring *txr = que->txr; 1555 struct rx_ring *rxr = que->rxr; 1556 bool more; 1557 u32 newitr = 0; 1558 1559 1560 /* Protect against spurious interrupts */ 1561 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1562 return; 1563 1564 ixgbe_disable_queue(adapter, que->msix); 1565 ++que->irqs; 1566 1567 more = ixgbe_rxeof(que); 1568 1569 IXGBE_TX_LOCK(txr); 1570 ixgbe_txeof(txr); 1571 #ifdef IXGBE_LEGACY_TX 1572 if (!IFQ_DRV_IS_EMPTY(ifp->if_snd)) 1573 ixgbe_start_locked(txr, ifp); 1574 #else 1575 if (!drbr_empty(ifp, txr->br)) 1576 ixgbe_mq_start_locked(ifp, txr); 1577 #endif 1578 IXGBE_TX_UNLOCK(txr); 1579 1580 /* Do AIM now? */ 1581 1582 if (adapter->enable_aim == FALSE) 1583 goto no_calc; 1584 /* 1585 ** Do Adaptive Interrupt Moderation: 1586 ** - Write out last calculated setting 1587 ** - Calculate based on average size over 1588 ** the last interval. 1589 */ 1590 if (que->eitr_setting) 1591 IXGBE_WRITE_REG(&adapter->hw, 1592 IXGBE_EITR(que->msix), que->eitr_setting); 1593 1594 que->eitr_setting = 0; 1595 1596 /* Idle, do nothing */ 1597 if ((txr->bytes == 0) && (rxr->bytes == 0)) 1598 goto no_calc; 1599 1600 if ((txr->bytes) && (txr->packets)) 1601 newitr = txr->bytes/txr->packets; 1602 if ((rxr->bytes) && (rxr->packets)) 1603 newitr = max(newitr, 1604 (rxr->bytes / rxr->packets)); 1605 newitr += 24; /* account for hardware frame, crc */ 1606 1607 /* set an upper boundary */ 1608 newitr = min(newitr, 3000); 1609 1610 /* Be nice to the mid range */ 1611 if ((newitr > 300) && (newitr < 1200)) 1612 newitr = (newitr / 3); 1613 else 1614 newitr = (newitr / 2); 1615 1616 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 1617 newitr |= newitr << 16; 1618 else 1619 newitr |= IXGBE_EITR_CNT_WDIS; 1620 1621 /* save for next interrupt */ 1622 que->eitr_setting = newitr; 1623 1624 /* Reset state */ 1625 txr->bytes = 0; 1626 txr->packets = 0; 1627 rxr->bytes = 0; 1628 rxr->packets = 0; 1629 1630 no_calc: 1631 if (more) 1632 taskqueue_enqueue(que->tq, &que->que_task); 1633 else 1634 ixgbe_enable_queue(adapter, que->msix); 1635 return; 1636 } 1637 1638 1639 static void 1640 ixgbe_msix_link(void *arg) 1641 { 1642 struct adapter *adapter = arg; 1643 struct ixgbe_hw *hw = &adapter->hw; 1644 u32 reg_eicr, mod_mask; 1645 1646 ++adapter->link_irq; 1647 1648 /* Pause other interrupts */ 1649 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 1650 1651 /* First get the cause */ 1652 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 1653 /* Be sure the queue bits are not cleared */ 1654 reg_eicr &= ~IXGBE_EICR_RTX_QUEUE; 1655 /* Clear interrupt with write */ 1656 IXGBE_WRITE_REG(hw, IXGBE_EICR, reg_eicr); 1657 1658 /* Link status change */ 1659 if (reg_eicr & IXGBE_EICR_LSC) { 1660 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 1661 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1662 } 1663 1664 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 1665 #ifdef IXGBE_FDIR 1666 if (reg_eicr & IXGBE_EICR_FLOW_DIR) { 1667 /* This is probably overkill :) */ 1668 if (!atomic_cmpset_int(&adapter->fdir_reinit, 0, 1)) 1669 return; 1670 /* Disable the interrupt */ 1671 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR); 1672 taskqueue_enqueue(adapter->tq, &adapter->fdir_task); 1673 } else 1674 #endif 1675 if (reg_eicr & IXGBE_EICR_ECC) { 1676 device_printf(adapter->dev, "CRITICAL: ECC ERROR!! " 1677 "Please Reboot!!\n"); 1678 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 1679 } 1680 1681 /* Check for over temp condition */ 1682 if (reg_eicr & IXGBE_EICR_TS) { 1683 device_printf(adapter->dev, "CRITICAL: OVER TEMP!! " 1684 "PHY IS SHUT DOWN!!\n"); 1685 device_printf(adapter->dev, "System shutdown required!\n"); 1686 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS); 1687 } 1688 #ifdef PCI_IOV 1689 if (reg_eicr & IXGBE_EICR_MAILBOX) 1690 taskqueue_enqueue(adapter->tq, &adapter->mbx_task); 1691 #endif 1692 } 1693 1694 /* Pluggable optics-related interrupt */ 1695 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP) 1696 mod_mask = IXGBE_EICR_GPI_SDP0_X540; 1697 else 1698 mod_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 1699 1700 if (ixgbe_is_sfp(hw)) { 1701 if (reg_eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw)) { 1702 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1703 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 1704 } else if (reg_eicr & mod_mask) { 1705 IXGBE_WRITE_REG(hw, IXGBE_EICR, mod_mask); 1706 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 1707 } 1708 } 1709 1710 /* Check for fan failure */ 1711 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1712 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1713 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1); 1714 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1715 "REPLACE IMMEDIATELY!!\n"); 1716 } 1717 1718 /* External PHY interrupt */ 1719 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1720 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) { 1721 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 1722 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1723 } 1724 1725 /* Re-enable other interrupts */ 1726 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER); 1727 return; 1728 } 1729 1730 /********************************************************************* 1731 * 1732 * Media Ioctl callback 1733 * 1734 * This routine is called whenever the user queries the status of 1735 * the interface using ifconfig. 1736 * 1737 **********************************************************************/ 1738 static void 1739 ixgbe_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) 1740 { 1741 struct adapter *adapter = ifp->if_softc; 1742 struct ixgbe_hw *hw = &adapter->hw; 1743 int layer; 1744 1745 INIT_DEBUGOUT("ixgbe_media_status: begin"); 1746 IXGBE_CORE_LOCK(adapter); 1747 ixgbe_update_link_status(adapter); 1748 1749 ifmr->ifm_status = IFM_AVALID; 1750 ifmr->ifm_active = IFM_ETHER; 1751 1752 if (!adapter->link_active) { 1753 IXGBE_CORE_UNLOCK(adapter); 1754 return; 1755 } 1756 1757 ifmr->ifm_status |= IFM_ACTIVE; 1758 layer = adapter->phy_layer; 1759 1760 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 1761 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 1762 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1763 switch (adapter->link_speed) { 1764 case IXGBE_LINK_SPEED_10GB_FULL: 1765 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 1766 break; 1767 case IXGBE_LINK_SPEED_1GB_FULL: 1768 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 1769 break; 1770 case IXGBE_LINK_SPEED_100_FULL: 1771 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 1772 break; 1773 } 1774 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1775 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1776 switch (adapter->link_speed) { 1777 case IXGBE_LINK_SPEED_10GB_FULL: 1778 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 1779 break; 1780 } 1781 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 1782 switch (adapter->link_speed) { 1783 case IXGBE_LINK_SPEED_10GB_FULL: 1784 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 1785 break; 1786 case IXGBE_LINK_SPEED_1GB_FULL: 1787 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1788 break; 1789 } 1790 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 1791 switch (adapter->link_speed) { 1792 case IXGBE_LINK_SPEED_10GB_FULL: 1793 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 1794 break; 1795 case IXGBE_LINK_SPEED_1GB_FULL: 1796 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1797 break; 1798 } 1799 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 1800 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1801 switch (adapter->link_speed) { 1802 case IXGBE_LINK_SPEED_10GB_FULL: 1803 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1804 break; 1805 case IXGBE_LINK_SPEED_1GB_FULL: 1806 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1807 break; 1808 } 1809 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1810 switch (adapter->link_speed) { 1811 case IXGBE_LINK_SPEED_10GB_FULL: 1812 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1813 break; 1814 } 1815 /* 1816 ** XXX: These need to use the proper media types once 1817 ** they're added. 1818 */ 1819 #ifndef IFM_ETH_XTYPE 1820 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1821 switch (adapter->link_speed) { 1822 case IXGBE_LINK_SPEED_10GB_FULL: 1823 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1824 break; 1825 case IXGBE_LINK_SPEED_2_5GB_FULL: 1826 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1827 break; 1828 case IXGBE_LINK_SPEED_1GB_FULL: 1829 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1830 break; 1831 } 1832 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1833 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1834 switch (adapter->link_speed) { 1835 case IXGBE_LINK_SPEED_10GB_FULL: 1836 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1837 break; 1838 case IXGBE_LINK_SPEED_2_5GB_FULL: 1839 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1840 break; 1841 case IXGBE_LINK_SPEED_1GB_FULL: 1842 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1843 break; 1844 } 1845 #else 1846 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1847 switch (adapter->link_speed) { 1848 case IXGBE_LINK_SPEED_10GB_FULL: 1849 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 1850 break; 1851 case IXGBE_LINK_SPEED_2_5GB_FULL: 1852 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1853 break; 1854 case IXGBE_LINK_SPEED_1GB_FULL: 1855 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1856 break; 1857 } 1858 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1859 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1860 switch (adapter->link_speed) { 1861 case IXGBE_LINK_SPEED_10GB_FULL: 1862 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 1863 break; 1864 case IXGBE_LINK_SPEED_2_5GB_FULL: 1865 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1866 break; 1867 case IXGBE_LINK_SPEED_1GB_FULL: 1868 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1869 break; 1870 } 1871 #endif 1872 1873 /* If nothing is recognized... */ 1874 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 1875 ifmr->ifm_active |= IFM_UNKNOWN; 1876 1877 #if __FreeBSD_version >= 900025 1878 /* Display current flow control setting used on link */ 1879 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 1880 hw->fc.current_mode == ixgbe_fc_full) 1881 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 1882 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 1883 hw->fc.current_mode == ixgbe_fc_full) 1884 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 1885 #endif 1886 1887 IXGBE_CORE_UNLOCK(adapter); 1888 1889 return; 1890 } 1891 1892 /********************************************************************* 1893 * 1894 * Media Ioctl callback 1895 * 1896 * This routine is called when the user changes speed/duplex using 1897 * media/mediopt option with ifconfig. 1898 * 1899 **********************************************************************/ 1900 static int 1901 ixgbe_media_change(struct ifnet * ifp) 1902 { 1903 struct adapter *adapter = ifp->if_softc; 1904 struct ifmedia *ifm = &adapter->media; 1905 struct ixgbe_hw *hw = &adapter->hw; 1906 ixgbe_link_speed speed = 0; 1907 1908 INIT_DEBUGOUT("ixgbe_media_change: begin"); 1909 1910 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1911 return (EINVAL); 1912 1913 if (hw->phy.media_type == ixgbe_media_type_backplane) 1914 return (ENODEV); 1915 1916 /* 1917 ** We don't actually need to check against the supported 1918 ** media types of the adapter; ifmedia will take care of 1919 ** that for us. 1920 */ 1921 #ifndef IFM_ETH_XTYPE 1922 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1923 case IFM_AUTO: 1924 case IFM_10G_T: 1925 speed |= IXGBE_LINK_SPEED_100_FULL; 1926 case IFM_10G_LRM: 1927 case IFM_10G_SR: /* KR, too */ 1928 case IFM_10G_LR: 1929 case IFM_10G_CX4: /* KX4 */ 1930 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1931 case IFM_10G_TWINAX: 1932 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1933 break; 1934 case IFM_1000_T: 1935 speed |= IXGBE_LINK_SPEED_100_FULL; 1936 case IFM_1000_LX: 1937 case IFM_1000_SX: 1938 case IFM_1000_CX: /* KX */ 1939 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1940 break; 1941 case IFM_100_TX: 1942 speed |= IXGBE_LINK_SPEED_100_FULL; 1943 break; 1944 default: 1945 goto invalid; 1946 } 1947 #else 1948 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1949 case IFM_AUTO: 1950 case IFM_10G_T: 1951 speed |= IXGBE_LINK_SPEED_100_FULL; 1952 case IFM_10G_LRM: 1953 case IFM_10G_KR: 1954 case IFM_10G_LR: 1955 case IFM_10G_KX4: 1956 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1957 case IFM_10G_TWINAX: 1958 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1959 break; 1960 case IFM_1000_T: 1961 speed |= IXGBE_LINK_SPEED_100_FULL; 1962 case IFM_1000_LX: 1963 case IFM_1000_SX: 1964 case IFM_1000_KX: 1965 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1966 break; 1967 case IFM_100_TX: 1968 speed |= IXGBE_LINK_SPEED_100_FULL; 1969 break; 1970 default: 1971 goto invalid; 1972 } 1973 #endif 1974 1975 hw->mac.autotry_restart = TRUE; 1976 hw->mac.ops.setup_link(hw, speed, TRUE); 1977 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1978 adapter->advertise = 0; 1979 } else { 1980 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 1981 adapter->advertise |= 1 << 2; 1982 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 1983 adapter->advertise |= 1 << 1; 1984 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 1985 adapter->advertise |= 1 << 0; 1986 } 1987 1988 return (0); 1989 1990 invalid: 1991 device_printf(adapter->dev, "Invalid media type!\n"); 1992 return (EINVAL); 1993 } 1994 1995 static void 1996 ixgbe_set_promisc(struct adapter *adapter) 1997 { 1998 u_int32_t reg_rctl; 1999 struct ifnet *ifp = adapter->ifp; 2000 int mcnt = 0; 2001 2002 reg_rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 2003 reg_rctl &= (~IXGBE_FCTRL_UPE); 2004 if (ifp->if_flags & IFF_ALLMULTI) 2005 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 2006 else { 2007 struct ifmultiaddr *ifma; 2008 #if __FreeBSD_version < 800000 2009 IF_ADDR_LOCK(ifp); 2010 #else 2011 if_maddr_rlock(ifp); 2012 #endif 2013 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2014 if (ifma->ifma_addr->sa_family != AF_LINK) 2015 continue; 2016 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2017 break; 2018 mcnt++; 2019 } 2020 #if __FreeBSD_version < 800000 2021 IF_ADDR_UNLOCK(ifp); 2022 #else 2023 if_maddr_runlock(ifp); 2024 #endif 2025 } 2026 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 2027 reg_rctl &= (~IXGBE_FCTRL_MPE); 2028 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2029 2030 if (ifp->if_flags & IFF_PROMISC) { 2031 reg_rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2032 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2033 } else if (ifp->if_flags & IFF_ALLMULTI) { 2034 reg_rctl |= IXGBE_FCTRL_MPE; 2035 reg_rctl &= ~IXGBE_FCTRL_UPE; 2036 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2037 } 2038 return; 2039 } 2040 2041 2042 /********************************************************************* 2043 * Multicast Update 2044 * 2045 * This routine is called whenever multicast address list is updated. 2046 * 2047 **********************************************************************/ 2048 #define IXGBE_RAR_ENTRIES 16 2049 2050 static void 2051 ixgbe_set_multi(struct adapter *adapter) 2052 { 2053 u32 fctrl; 2054 u8 *update_ptr; 2055 struct ifmultiaddr *ifma; 2056 struct ixgbe_mc_addr *mta; 2057 int mcnt = 0; 2058 struct ifnet *ifp = adapter->ifp; 2059 2060 IOCTL_DEBUGOUT("ixgbe_set_multi: begin"); 2061 2062 mta = adapter->mta; 2063 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 2064 2065 #if __FreeBSD_version < 800000 2066 IF_ADDR_LOCK(ifp); 2067 #else 2068 if_maddr_rlock(ifp); 2069 #endif 2070 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2071 if (ifma->ifma_addr->sa_family != AF_LINK) 2072 continue; 2073 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2074 break; 2075 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 2076 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 2077 mta[mcnt].vmdq = adapter->pool; 2078 mcnt++; 2079 } 2080 #if __FreeBSD_version < 800000 2081 IF_ADDR_UNLOCK(ifp); 2082 #else 2083 if_maddr_runlock(ifp); 2084 #endif 2085 2086 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 2087 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2088 if (ifp->if_flags & IFF_PROMISC) 2089 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2090 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 2091 ifp->if_flags & IFF_ALLMULTI) { 2092 fctrl |= IXGBE_FCTRL_MPE; 2093 fctrl &= ~IXGBE_FCTRL_UPE; 2094 } else 2095 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2096 2097 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl); 2098 2099 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 2100 update_ptr = (u8 *)mta; 2101 ixgbe_update_mc_addr_list(&adapter->hw, 2102 update_ptr, mcnt, ixgbe_mc_array_itr, TRUE); 2103 } 2104 2105 return; 2106 } 2107 2108 /* 2109 * This is an iterator function now needed by the multicast 2110 * shared code. It simply feeds the shared code routine the 2111 * addresses in the array of ixgbe_set_multi() one by one. 2112 */ 2113 static u8 * 2114 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 2115 { 2116 struct ixgbe_mc_addr *mta; 2117 2118 mta = (struct ixgbe_mc_addr *)*update_ptr; 2119 *vmdq = mta->vmdq; 2120 2121 *update_ptr = (u8*)(mta + 1);; 2122 return (mta->addr); 2123 } 2124 2125 2126 /********************************************************************* 2127 * Timer routine 2128 * 2129 * This routine checks for link status,updates statistics, 2130 * and runs the watchdog check. 2131 * 2132 **********************************************************************/ 2133 2134 static void 2135 ixgbe_local_timer(void *arg) 2136 { 2137 struct adapter *adapter = arg; 2138 device_t dev = adapter->dev; 2139 struct ix_queue *que = adapter->queues; 2140 u64 queues = 0; 2141 int hung = 0; 2142 2143 mtx_assert(&adapter->core_mtx, MA_OWNED); 2144 2145 /* Check for pluggable optics */ 2146 if (adapter->sfp_probe) 2147 if (!ixgbe_sfp_probe(adapter)) 2148 goto out; /* Nothing to do */ 2149 2150 ixgbe_update_link_status(adapter); 2151 ixgbe_update_stats_counters(adapter); 2152 2153 /* 2154 ** Check the TX queues status 2155 ** - mark hung queues so we don't schedule on them 2156 ** - watchdog only if all queues show hung 2157 */ 2158 for (int i = 0; i < adapter->num_queues; i++, que++) { 2159 /* Keep track of queues with work for soft irq */ 2160 if (que->txr->busy) 2161 queues |= ((u64)1 << que->me); 2162 /* 2163 ** Each time txeof runs without cleaning, but there 2164 ** are uncleaned descriptors it increments busy. If 2165 ** we get to the MAX we declare it hung. 2166 */ 2167 if (que->busy == IXGBE_QUEUE_HUNG) { 2168 ++hung; 2169 /* Mark the queue as inactive */ 2170 adapter->active_queues &= ~((u64)1 << que->me); 2171 continue; 2172 } else { 2173 /* Check if we've come back from hung */ 2174 if ((adapter->active_queues & ((u64)1 << que->me)) == 0) 2175 adapter->active_queues |= ((u64)1 << que->me); 2176 } 2177 if (que->busy >= IXGBE_MAX_TX_BUSY) { 2178 device_printf(dev,"Warning queue %d " 2179 "appears to be hung!\n", i); 2180 que->txr->busy = IXGBE_QUEUE_HUNG; 2181 ++hung; 2182 } 2183 2184 } 2185 2186 /* Only truly watchdog if all queues show hung */ 2187 if (hung == adapter->num_queues) 2188 goto watchdog; 2189 else if (queues != 0) { /* Force an IRQ on queues with work */ 2190 ixgbe_rearm_queues(adapter, queues); 2191 } 2192 2193 out: 2194 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 2195 return; 2196 2197 watchdog: 2198 device_printf(adapter->dev, "Watchdog timeout -- resetting\n"); 2199 adapter->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2200 adapter->watchdog_events++; 2201 ixgbe_init_locked(adapter); 2202 } 2203 2204 2205 /* 2206 ** Note: this routine updates the OS on the link state 2207 ** the real check of the hardware only happens with 2208 ** a link interrupt. 2209 */ 2210 static void 2211 ixgbe_update_link_status(struct adapter *adapter) 2212 { 2213 struct ifnet *ifp = adapter->ifp; 2214 device_t dev = adapter->dev; 2215 2216 if (adapter->link_up){ 2217 if (adapter->link_active == FALSE) { 2218 if (bootverbose) 2219 device_printf(dev,"Link is up %d Gbps %s \n", 2220 ((adapter->link_speed == 128)? 10:1), 2221 "Full Duplex"); 2222 adapter->link_active = TRUE; 2223 /* Update any Flow Control changes */ 2224 ixgbe_fc_enable(&adapter->hw); 2225 /* Update DMA coalescing config */ 2226 ixgbe_config_dmac(adapter); 2227 if_link_state_change(ifp, LINK_STATE_UP); 2228 #ifdef PCI_IOV 2229 ixgbe_ping_all_vfs(adapter); 2230 #endif 2231 } 2232 } else { /* Link down */ 2233 if (adapter->link_active == TRUE) { 2234 if (bootverbose) 2235 device_printf(dev,"Link is Down\n"); 2236 if_link_state_change(ifp, LINK_STATE_DOWN); 2237 adapter->link_active = FALSE; 2238 #ifdef PCI_IOV 2239 ixgbe_ping_all_vfs(adapter); 2240 #endif 2241 } 2242 } 2243 2244 return; 2245 } 2246 2247 2248 /********************************************************************* 2249 * 2250 * This routine disables all traffic on the adapter by issuing a 2251 * global reset on the MAC and deallocates TX/RX buffers. 2252 * 2253 **********************************************************************/ 2254 2255 static void 2256 ixgbe_stop(void *arg) 2257 { 2258 struct ifnet *ifp; 2259 struct adapter *adapter = arg; 2260 struct ixgbe_hw *hw = &adapter->hw; 2261 ifp = adapter->ifp; 2262 2263 mtx_assert(&adapter->core_mtx, MA_OWNED); 2264 2265 INIT_DEBUGOUT("ixgbe_stop: begin\n"); 2266 ixgbe_disable_intr(adapter); 2267 callout_stop(&adapter->timer); 2268 2269 /* Let the stack know...*/ 2270 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2271 2272 ixgbe_reset_hw(hw); 2273 hw->adapter_stopped = FALSE; 2274 ixgbe_stop_adapter(hw); 2275 if (hw->mac.type == ixgbe_mac_82599EB) 2276 ixgbe_stop_mac_link_on_d3_82599(hw); 2277 /* Turn off the laser - noop with no optics */ 2278 ixgbe_disable_tx_laser(hw); 2279 2280 /* Update the stack */ 2281 adapter->link_up = FALSE; 2282 ixgbe_update_link_status(adapter); 2283 2284 /* reprogram the RAR[0] in case user changed it. */ 2285 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); 2286 2287 return; 2288 } 2289 2290 2291 /********************************************************************* 2292 * 2293 * Determine hardware revision. 2294 * 2295 **********************************************************************/ 2296 static void 2297 ixgbe_identify_hardware(struct adapter *adapter) 2298 { 2299 device_t dev = adapter->dev; 2300 struct ixgbe_hw *hw = &adapter->hw; 2301 2302 /* Save off the information about this board */ 2303 hw->vendor_id = pci_get_vendor(dev); 2304 hw->device_id = pci_get_device(dev); 2305 hw->revision_id = pci_read_config(dev, PCIR_REVID, 1); 2306 hw->subsystem_vendor_id = 2307 pci_read_config(dev, PCIR_SUBVEND_0, 2); 2308 hw->subsystem_device_id = 2309 pci_read_config(dev, PCIR_SUBDEV_0, 2); 2310 2311 /* 2312 ** Make sure BUSMASTER is set 2313 */ 2314 pci_enable_busmaster(dev); 2315 2316 /* We need this here to set the num_segs below */ 2317 ixgbe_set_mac_type(hw); 2318 2319 /* Pick up the 82599 settings */ 2320 if (hw->mac.type != ixgbe_mac_82598EB) { 2321 hw->phy.smart_speed = ixgbe_smart_speed; 2322 adapter->num_segs = IXGBE_82599_SCATTER; 2323 } else 2324 adapter->num_segs = IXGBE_82598_SCATTER; 2325 2326 return; 2327 } 2328 2329 /********************************************************************* 2330 * 2331 * Determine optic type 2332 * 2333 **********************************************************************/ 2334 static void 2335 ixgbe_setup_optics(struct adapter *adapter) 2336 { 2337 struct ixgbe_hw *hw = &adapter->hw; 2338 int layer; 2339 2340 layer = adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 2341 2342 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) { 2343 adapter->optics = IFM_10G_T; 2344 return; 2345 } 2346 2347 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) { 2348 adapter->optics = IFM_1000_T; 2349 return; 2350 } 2351 2352 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) { 2353 adapter->optics = IFM_1000_SX; 2354 return; 2355 } 2356 2357 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_LR | 2358 IXGBE_PHYSICAL_LAYER_10GBASE_LRM)) { 2359 adapter->optics = IFM_10G_LR; 2360 return; 2361 } 2362 2363 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2364 adapter->optics = IFM_10G_SR; 2365 return; 2366 } 2367 2368 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU) { 2369 adapter->optics = IFM_10G_TWINAX; 2370 return; 2371 } 2372 2373 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | 2374 IXGBE_PHYSICAL_LAYER_10GBASE_CX4)) { 2375 adapter->optics = IFM_10G_CX4; 2376 return; 2377 } 2378 2379 /* If we get here just set the default */ 2380 adapter->optics = IFM_ETHER | IFM_AUTO; 2381 return; 2382 } 2383 2384 /********************************************************************* 2385 * 2386 * Setup the Legacy or MSI Interrupt handler 2387 * 2388 **********************************************************************/ 2389 static int 2390 ixgbe_allocate_legacy(struct adapter *adapter) 2391 { 2392 device_t dev = adapter->dev; 2393 struct ix_queue *que = adapter->queues; 2394 #ifndef IXGBE_LEGACY_TX 2395 struct tx_ring *txr = adapter->tx_rings; 2396 #endif 2397 int error, rid = 0; 2398 2399 /* MSI RID at 1 */ 2400 if (adapter->msix == 1) 2401 rid = 1; 2402 2403 /* We allocate a single interrupt resource */ 2404 adapter->res = bus_alloc_resource_any(dev, 2405 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2406 if (adapter->res == NULL) { 2407 device_printf(dev, "Unable to allocate bus resource: " 2408 "interrupt\n"); 2409 return (ENXIO); 2410 } 2411 2412 /* 2413 * Try allocating a fast interrupt and the associated deferred 2414 * processing contexts. 2415 */ 2416 #ifndef IXGBE_LEGACY_TX 2417 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2418 #endif 2419 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2420 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2421 taskqueue_thread_enqueue, &que->tq); 2422 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s ixq", 2423 device_get_nameunit(adapter->dev)); 2424 2425 /* Tasklets for Link, SFP and Multispeed Fiber */ 2426 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2427 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2428 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2429 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2430 #ifdef IXGBE_FDIR 2431 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2432 #endif 2433 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2434 taskqueue_thread_enqueue, &adapter->tq); 2435 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2436 device_get_nameunit(adapter->dev)); 2437 2438 if ((error = bus_setup_intr(dev, adapter->res, 2439 INTR_TYPE_NET | INTR_MPSAFE, NULL, ixgbe_legacy_irq, 2440 que, &adapter->tag)) != 0) { 2441 device_printf(dev, "Failed to register fast interrupt " 2442 "handler: %d\n", error); 2443 taskqueue_free(que->tq); 2444 taskqueue_free(adapter->tq); 2445 que->tq = NULL; 2446 adapter->tq = NULL; 2447 return (error); 2448 } 2449 /* For simplicity in the handlers */ 2450 adapter->active_queues = IXGBE_EIMS_ENABLE_MASK; 2451 2452 return (0); 2453 } 2454 2455 2456 /********************************************************************* 2457 * 2458 * Setup MSIX Interrupt resources and handlers 2459 * 2460 **********************************************************************/ 2461 static int 2462 ixgbe_allocate_msix(struct adapter *adapter) 2463 { 2464 device_t dev = adapter->dev; 2465 struct ix_queue *que = adapter->queues; 2466 struct tx_ring *txr = adapter->tx_rings; 2467 int error, rid, vector = 0; 2468 int cpu_id = 0; 2469 #ifdef RSS 2470 cpuset_t cpu_mask; 2471 #endif 2472 2473 #ifdef RSS 2474 /* 2475 * If we're doing RSS, the number of queues needs to 2476 * match the number of RSS buckets that are configured. 2477 * 2478 * + If there's more queues than RSS buckets, we'll end 2479 * up with queues that get no traffic. 2480 * 2481 * + If there's more RSS buckets than queues, we'll end 2482 * up having multiple RSS buckets map to the same queue, 2483 * so there'll be some contention. 2484 */ 2485 if (adapter->num_queues != rss_getnumbuckets()) { 2486 device_printf(dev, 2487 "%s: number of queues (%d) != number of RSS buckets (%d)" 2488 "; performance will be impacted.\n", 2489 __func__, 2490 adapter->num_queues, 2491 rss_getnumbuckets()); 2492 } 2493 #endif 2494 2495 for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) { 2496 rid = vector + 1; 2497 que->res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 2498 RF_SHAREABLE | RF_ACTIVE); 2499 if (que->res == NULL) { 2500 device_printf(dev,"Unable to allocate" 2501 " bus resource: que interrupt [%d]\n", vector); 2502 return (ENXIO); 2503 } 2504 /* Set the handler function */ 2505 error = bus_setup_intr(dev, que->res, 2506 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2507 ixgbe_msix_que, que, &que->tag); 2508 if (error) { 2509 que->res = NULL; 2510 device_printf(dev, "Failed to register QUE handler"); 2511 return (error); 2512 } 2513 #if __FreeBSD_version >= 800504 2514 bus_describe_intr(dev, que->res, que->tag, "q%d", i); 2515 #endif 2516 que->msix = vector; 2517 adapter->active_queues |= (u64)(1 << que->msix); 2518 #ifdef RSS 2519 /* 2520 * The queue ID is used as the RSS layer bucket ID. 2521 * We look up the queue ID -> RSS CPU ID and select 2522 * that. 2523 */ 2524 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 2525 #else 2526 /* 2527 * Bind the msix vector, and thus the 2528 * rings to the corresponding cpu. 2529 * 2530 * This just happens to match the default RSS round-robin 2531 * bucket -> queue -> CPU allocation. 2532 */ 2533 if (adapter->num_queues > 1) 2534 cpu_id = i; 2535 #endif 2536 if (adapter->num_queues > 1) 2537 bus_bind_intr(dev, que->res, cpu_id); 2538 #ifdef IXGBE_DEBUG 2539 #ifdef RSS 2540 device_printf(dev, 2541 "Bound RSS bucket %d to CPU %d\n", 2542 i, cpu_id); 2543 #else 2544 device_printf(dev, 2545 "Bound queue %d to cpu %d\n", 2546 i, cpu_id); 2547 #endif 2548 #endif /* IXGBE_DEBUG */ 2549 2550 2551 #ifndef IXGBE_LEGACY_TX 2552 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2553 #endif 2554 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2555 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2556 taskqueue_thread_enqueue, &que->tq); 2557 #ifdef RSS 2558 CPU_SETOF(cpu_id, &cpu_mask); 2559 taskqueue_start_threads_cpuset(&que->tq, 1, PI_NET, 2560 &cpu_mask, 2561 "%s (bucket %d)", 2562 device_get_nameunit(adapter->dev), 2563 cpu_id); 2564 #else 2565 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s:q%d", 2566 device_get_nameunit(adapter->dev), i); 2567 #endif 2568 } 2569 2570 /* and Link */ 2571 rid = vector + 1; 2572 adapter->res = bus_alloc_resource_any(dev, 2573 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2574 if (!adapter->res) { 2575 device_printf(dev,"Unable to allocate" 2576 " bus resource: Link interrupt [%d]\n", rid); 2577 return (ENXIO); 2578 } 2579 /* Set the link handler function */ 2580 error = bus_setup_intr(dev, adapter->res, 2581 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2582 ixgbe_msix_link, adapter, &adapter->tag); 2583 if (error) { 2584 adapter->res = NULL; 2585 device_printf(dev, "Failed to register LINK handler"); 2586 return (error); 2587 } 2588 #if __FreeBSD_version >= 800504 2589 bus_describe_intr(dev, adapter->res, adapter->tag, "link"); 2590 #endif 2591 adapter->vector = vector; 2592 /* Tasklets for Link, SFP and Multispeed Fiber */ 2593 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2594 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2595 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2596 #ifdef PCI_IOV 2597 TASK_INIT(&adapter->mbx_task, 0, ixgbe_handle_mbx, adapter); 2598 #endif 2599 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2600 #ifdef IXGBE_FDIR 2601 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2602 #endif 2603 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2604 taskqueue_thread_enqueue, &adapter->tq); 2605 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2606 device_get_nameunit(adapter->dev)); 2607 2608 return (0); 2609 } 2610 2611 /* 2612 * Setup Either MSI/X or MSI 2613 */ 2614 static int 2615 ixgbe_setup_msix(struct adapter *adapter) 2616 { 2617 device_t dev = adapter->dev; 2618 int rid, want, queues, msgs; 2619 2620 /* Override by tuneable */ 2621 if (ixgbe_enable_msix == 0) 2622 goto msi; 2623 2624 /* First try MSI/X */ 2625 msgs = pci_msix_count(dev); 2626 if (msgs == 0) 2627 goto msi; 2628 rid = PCIR_BAR(MSIX_82598_BAR); 2629 adapter->msix_mem = bus_alloc_resource_any(dev, 2630 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2631 if (adapter->msix_mem == NULL) { 2632 rid += 4; /* 82599 maps in higher BAR */ 2633 adapter->msix_mem = bus_alloc_resource_any(dev, 2634 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2635 } 2636 if (adapter->msix_mem == NULL) { 2637 /* May not be enabled */ 2638 device_printf(adapter->dev, 2639 "Unable to map MSIX table \n"); 2640 goto msi; 2641 } 2642 2643 /* Figure out a reasonable auto config value */ 2644 queues = (mp_ncpus > (msgs - 1)) ? (msgs - 1) : mp_ncpus; 2645 2646 #ifdef RSS 2647 /* If we're doing RSS, clamp at the number of RSS buckets */ 2648 if (queues > rss_getnumbuckets()) 2649 queues = rss_getnumbuckets(); 2650 #endif 2651 2652 if (ixgbe_num_queues != 0) 2653 queues = ixgbe_num_queues; 2654 /* Set max queues to 8 when autoconfiguring */ 2655 else if ((ixgbe_num_queues == 0) && (queues > 8)) 2656 queues = 8; 2657 2658 /* reflect correct sysctl value */ 2659 ixgbe_num_queues = queues; 2660 2661 /* 2662 ** Want one vector (RX/TX pair) per queue 2663 ** plus an additional for Link. 2664 */ 2665 want = queues + 1; 2666 if (msgs >= want) 2667 msgs = want; 2668 else { 2669 device_printf(adapter->dev, 2670 "MSIX Configuration Problem, " 2671 "%d vectors but %d queues wanted!\n", 2672 msgs, want); 2673 goto msi; 2674 } 2675 if ((pci_alloc_msix(dev, &msgs) == 0) && (msgs == want)) { 2676 device_printf(adapter->dev, 2677 "Using MSIX interrupts with %d vectors\n", msgs); 2678 adapter->num_queues = queues; 2679 return (msgs); 2680 } 2681 /* 2682 ** If MSIX alloc failed or provided us with 2683 ** less than needed, free and fall through to MSI 2684 */ 2685 pci_release_msi(dev); 2686 2687 msi: 2688 if (adapter->msix_mem != NULL) { 2689 bus_release_resource(dev, SYS_RES_MEMORY, 2690 rid, adapter->msix_mem); 2691 adapter->msix_mem = NULL; 2692 } 2693 msgs = 1; 2694 if (pci_alloc_msi(dev, &msgs) == 0) { 2695 device_printf(adapter->dev, "Using an MSI interrupt\n"); 2696 return (msgs); 2697 } 2698 device_printf(adapter->dev, "Using a Legacy interrupt\n"); 2699 return (0); 2700 } 2701 2702 2703 static int 2704 ixgbe_allocate_pci_resources(struct adapter *adapter) 2705 { 2706 int rid; 2707 device_t dev = adapter->dev; 2708 2709 rid = PCIR_BAR(0); 2710 adapter->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2711 &rid, RF_ACTIVE); 2712 2713 if (!(adapter->pci_mem)) { 2714 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2715 return (ENXIO); 2716 } 2717 2718 /* Save bus_space values for READ/WRITE_REG macros */ 2719 adapter->osdep.mem_bus_space_tag = 2720 rman_get_bustag(adapter->pci_mem); 2721 adapter->osdep.mem_bus_space_handle = 2722 rman_get_bushandle(adapter->pci_mem); 2723 /* Set hw values for shared code */ 2724 adapter->hw.hw_addr = (u8 *) &adapter->osdep.mem_bus_space_handle; 2725 adapter->hw.back = adapter; 2726 2727 /* Default to 1 queue if MSI-X setup fails */ 2728 adapter->num_queues = 1; 2729 2730 /* 2731 ** Now setup MSI or MSI-X, should 2732 ** return us the number of supported 2733 ** vectors. (Will be 1 for MSI) 2734 */ 2735 adapter->msix = ixgbe_setup_msix(adapter); 2736 return (0); 2737 } 2738 2739 static void 2740 ixgbe_free_pci_resources(struct adapter * adapter) 2741 { 2742 struct ix_queue *que = adapter->queues; 2743 device_t dev = adapter->dev; 2744 int rid, memrid; 2745 2746 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 2747 memrid = PCIR_BAR(MSIX_82598_BAR); 2748 else 2749 memrid = PCIR_BAR(MSIX_82599_BAR); 2750 2751 /* 2752 ** There is a slight possibility of a failure mode 2753 ** in attach that will result in entering this function 2754 ** before interrupt resources have been initialized, and 2755 ** in that case we do not want to execute the loops below 2756 ** We can detect this reliably by the state of the adapter 2757 ** res pointer. 2758 */ 2759 if (adapter->res == NULL) 2760 goto mem; 2761 2762 /* 2763 ** Release all msix queue resources: 2764 */ 2765 for (int i = 0; i < adapter->num_queues; i++, que++) { 2766 rid = que->msix + 1; 2767 if (que->tag != NULL) { 2768 bus_teardown_intr(dev, que->res, que->tag); 2769 que->tag = NULL; 2770 } 2771 if (que->res != NULL) 2772 bus_release_resource(dev, SYS_RES_IRQ, rid, que->res); 2773 } 2774 2775 2776 /* Clean the Legacy or Link interrupt last */ 2777 if (adapter->vector) /* we are doing MSIX */ 2778 rid = adapter->vector + 1; 2779 else 2780 (adapter->msix != 0) ? (rid = 1):(rid = 0); 2781 2782 if (adapter->tag != NULL) { 2783 bus_teardown_intr(dev, adapter->res, adapter->tag); 2784 adapter->tag = NULL; 2785 } 2786 if (adapter->res != NULL) 2787 bus_release_resource(dev, SYS_RES_IRQ, rid, adapter->res); 2788 2789 mem: 2790 if (adapter->msix) 2791 pci_release_msi(dev); 2792 2793 if (adapter->msix_mem != NULL) 2794 bus_release_resource(dev, SYS_RES_MEMORY, 2795 memrid, adapter->msix_mem); 2796 2797 if (adapter->pci_mem != NULL) 2798 bus_release_resource(dev, SYS_RES_MEMORY, 2799 PCIR_BAR(0), adapter->pci_mem); 2800 2801 return; 2802 } 2803 2804 /********************************************************************* 2805 * 2806 * Setup networking device structure and register an interface. 2807 * 2808 **********************************************************************/ 2809 static int 2810 ixgbe_setup_interface(device_t dev, struct adapter *adapter) 2811 { 2812 struct ifnet *ifp; 2813 2814 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 2815 2816 ifp = adapter->ifp = if_alloc(IFT_ETHER); 2817 if (ifp == NULL) { 2818 device_printf(dev, "can not allocate ifnet structure\n"); 2819 return (-1); 2820 } 2821 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 2822 ifp->if_baudrate = IF_Gbps(10); 2823 ifp->if_init = ixgbe_init; 2824 ifp->if_softc = adapter; 2825 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2826 ifp->if_ioctl = ixgbe_ioctl; 2827 #if __FreeBSD_version >= 1100036 2828 if_setgetcounterfn(ifp, ixgbe_get_counter); 2829 #endif 2830 #if __FreeBSD_version >= 1100045 2831 /* TSO parameters */ 2832 ifp->if_hw_tsomax = 65518; 2833 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 2834 ifp->if_hw_tsomaxsegsize = 2048; 2835 #endif 2836 #ifndef IXGBE_LEGACY_TX 2837 ifp->if_transmit = ixgbe_mq_start; 2838 ifp->if_qflush = ixgbe_qflush; 2839 #else 2840 ifp->if_start = ixgbe_start; 2841 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2); 2842 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 2; 2843 IFQ_SET_READY(&ifp->if_snd); 2844 #endif 2845 2846 ether_ifattach(ifp, adapter->hw.mac.addr); 2847 2848 adapter->max_frame_size = 2849 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 2850 2851 /* 2852 * Tell the upper layer(s) we support long frames. 2853 */ 2854 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 2855 2856 /* Set capability flags */ 2857 ifp->if_capabilities |= IFCAP_RXCSUM 2858 | IFCAP_TXCSUM 2859 | IFCAP_RXCSUM_IPV6 2860 | IFCAP_TXCSUM_IPV6 2861 | IFCAP_TSO4 2862 | IFCAP_TSO6 2863 | IFCAP_LRO 2864 | IFCAP_VLAN_HWTAGGING 2865 | IFCAP_VLAN_HWTSO 2866 | IFCAP_VLAN_HWCSUM 2867 | IFCAP_JUMBO_MTU 2868 | IFCAP_VLAN_MTU 2869 | IFCAP_HWSTATS; 2870 2871 /* Enable the above capabilities by default */ 2872 ifp->if_capenable = ifp->if_capabilities; 2873 2874 /* 2875 ** Don't turn this on by default, if vlans are 2876 ** created on another pseudo device (eg. lagg) 2877 ** then vlan events are not passed thru, breaking 2878 ** operation, but with HW FILTER off it works. If 2879 ** using vlans directly on the ixgbe driver you can 2880 ** enable this and get full hardware tag filtering. 2881 */ 2882 ifp->if_capabilities |= IFCAP_VLAN_HWFILTER; 2883 2884 /* 2885 * Specify the media types supported by this adapter and register 2886 * callbacks to update media and link information 2887 */ 2888 ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change, 2889 ixgbe_media_status); 2890 2891 adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw); 2892 ixgbe_add_media_types(adapter); 2893 2894 /* Set autoselect media by default */ 2895 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2896 2897 return (0); 2898 } 2899 2900 static void 2901 ixgbe_add_media_types(struct adapter *adapter) 2902 { 2903 struct ixgbe_hw *hw = &adapter->hw; 2904 device_t dev = adapter->dev; 2905 int layer; 2906 2907 layer = adapter->phy_layer; 2908 2909 /* Media types with matching FreeBSD media defines */ 2910 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 2911 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_T, 0, NULL); 2912 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 2913 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); 2914 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 2915 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 0, NULL); 2916 2917 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2918 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2919 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_TWINAX, 0, NULL); 2920 2921 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 2922 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 2923 if (hw->phy.multispeed_fiber) 2924 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_LX, 0, NULL); 2925 } 2926 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2927 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2928 if (hw->phy.multispeed_fiber) 2929 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2930 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2931 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2932 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2933 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2934 2935 #ifdef IFM_ETH_XTYPE 2936 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2937 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 2938 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 2939 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 2940 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2941 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 2942 #else 2943 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 2944 device_printf(dev, "Media supported: 10GbaseKR\n"); 2945 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 2946 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2947 } 2948 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 2949 device_printf(dev, "Media supported: 10GbaseKX4\n"); 2950 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 2951 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2952 } 2953 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 2954 device_printf(dev, "Media supported: 1000baseKX\n"); 2955 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 2956 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 2957 } 2958 #endif 2959 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 2960 device_printf(dev, "Media supported: 1000baseBX\n"); 2961 2962 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 2963 ifmedia_add(&adapter->media, 2964 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 2965 ifmedia_add(&adapter->media, 2966 IFM_ETHER | IFM_1000_T, 0, NULL); 2967 } 2968 2969 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2970 } 2971 2972 static void 2973 ixgbe_config_link(struct adapter *adapter) 2974 { 2975 struct ixgbe_hw *hw = &adapter->hw; 2976 u32 autoneg, err = 0; 2977 bool sfp, negotiate; 2978 2979 sfp = ixgbe_is_sfp(hw); 2980 2981 if (sfp) { 2982 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 2983 } else { 2984 if (hw->mac.ops.check_link) 2985 err = ixgbe_check_link(hw, &adapter->link_speed, 2986 &adapter->link_up, FALSE); 2987 if (err) 2988 goto out; 2989 autoneg = hw->phy.autoneg_advertised; 2990 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 2991 err = hw->mac.ops.get_link_capabilities(hw, 2992 &autoneg, &negotiate); 2993 if (err) 2994 goto out; 2995 if (hw->mac.ops.setup_link) 2996 err = hw->mac.ops.setup_link(hw, 2997 autoneg, adapter->link_up); 2998 } 2999 out: 3000 return; 3001 } 3002 3003 3004 /********************************************************************* 3005 * 3006 * Enable transmit units. 3007 * 3008 **********************************************************************/ 3009 static void 3010 ixgbe_initialize_transmit_units(struct adapter *adapter) 3011 { 3012 struct tx_ring *txr = adapter->tx_rings; 3013 struct ixgbe_hw *hw = &adapter->hw; 3014 3015 /* Setup the Base and Length of the Tx Descriptor Ring */ 3016 for (int i = 0; i < adapter->num_queues; i++, txr++) { 3017 u64 tdba = txr->txdma.dma_paddr; 3018 u32 txctrl = 0; 3019 int j = txr->me; 3020 3021 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 3022 (tdba & 0x00000000ffffffffULL)); 3023 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 3024 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 3025 adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 3026 3027 /* Setup the HW Tx Head and Tail descriptor pointers */ 3028 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 3029 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 3030 3031 /* Cache the tail address */ 3032 txr->tail = IXGBE_TDT(j); 3033 3034 /* Disable Head Writeback */ 3035 /* 3036 * Note: for X550 series devices, these registers are actually 3037 * prefixed with TPH_ isntead of DCA_, but the addresses and 3038 * fields remain the same. 3039 */ 3040 switch (hw->mac.type) { 3041 case ixgbe_mac_82598EB: 3042 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 3043 break; 3044 default: 3045 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 3046 break; 3047 } 3048 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 3049 switch (hw->mac.type) { 3050 case ixgbe_mac_82598EB: 3051 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 3052 break; 3053 default: 3054 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 3055 break; 3056 } 3057 3058 } 3059 3060 if (hw->mac.type != ixgbe_mac_82598EB) { 3061 u32 dmatxctl, rttdcs; 3062 #ifdef PCI_IOV 3063 enum ixgbe_iov_mode mode = ixgbe_get_iov_mode(adapter); 3064 #endif 3065 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 3066 dmatxctl |= IXGBE_DMATXCTL_TE; 3067 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 3068 /* Disable arbiter to set MTQC */ 3069 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 3070 rttdcs |= IXGBE_RTTDCS_ARBDIS; 3071 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3072 #ifdef PCI_IOV 3073 IXGBE_WRITE_REG(hw, IXGBE_MTQC, ixgbe_get_mtqc(mode)); 3074 #else 3075 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB); 3076 #endif 3077 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 3078 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3079 } 3080 3081 return; 3082 } 3083 3084 static void 3085 ixgbe_initialize_rss_mapping(struct adapter *adapter) 3086 { 3087 struct ixgbe_hw *hw = &adapter->hw; 3088 u32 reta = 0, mrqc, rss_key[10]; 3089 int queue_id, table_size, index_mult; 3090 #ifdef RSS 3091 u32 rss_hash_config; 3092 #endif 3093 #ifdef PCI_IOV 3094 enum ixgbe_iov_mode mode; 3095 #endif 3096 3097 #ifdef RSS 3098 /* Fetch the configured RSS key */ 3099 rss_getkey((uint8_t *) &rss_key); 3100 #else 3101 /* set up random bits */ 3102 arc4rand(&rss_key, sizeof(rss_key), 0); 3103 #endif 3104 3105 /* Set multiplier for RETA setup and table size based on MAC */ 3106 index_mult = 0x1; 3107 table_size = 128; 3108 switch (adapter->hw.mac.type) { 3109 case ixgbe_mac_82598EB: 3110 index_mult = 0x11; 3111 break; 3112 case ixgbe_mac_X550: 3113 case ixgbe_mac_X550EM_x: 3114 table_size = 512; 3115 break; 3116 default: 3117 break; 3118 } 3119 3120 /* Set up the redirection table */ 3121 for (int i = 0, j = 0; i < table_size; i++, j++) { 3122 if (j == adapter->num_queues) j = 0; 3123 #ifdef RSS 3124 /* 3125 * Fetch the RSS bucket id for the given indirection entry. 3126 * Cap it at the number of configured buckets (which is 3127 * num_queues.) 3128 */ 3129 queue_id = rss_get_indirection_to_bucket(i); 3130 queue_id = queue_id % adapter->num_queues; 3131 #else 3132 queue_id = (j * index_mult); 3133 #endif 3134 /* 3135 * The low 8 bits are for hash value (n+0); 3136 * The next 8 bits are for hash value (n+1), etc. 3137 */ 3138 reta = reta >> 8; 3139 reta = reta | ( ((uint32_t) queue_id) << 24); 3140 if ((i & 3) == 3) { 3141 if (i < 128) 3142 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 3143 else 3144 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), reta); 3145 reta = 0; 3146 } 3147 } 3148 3149 /* Now fill our hash function seeds */ 3150 for (int i = 0; i < 10; i++) 3151 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 3152 3153 /* Perform hash on these packet types */ 3154 #ifdef RSS 3155 mrqc = IXGBE_MRQC_RSSEN; 3156 rss_hash_config = rss_gethashconfig(); 3157 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 3158 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 3159 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 3160 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 3161 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 3162 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 3163 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 3164 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3165 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 3166 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 3167 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 3168 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 3169 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 3170 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3171 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4_EX) 3172 device_printf(adapter->dev, 3173 "%s: RSS_HASHTYPE_RSS_UDP_IPV4_EX defined, " 3174 "but not supported\n", __func__); 3175 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 3176 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3177 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 3178 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 3179 #else 3180 /* 3181 * Disable UDP - IP fragments aren't currently being handled 3182 * and so we end up with a mix of 2-tuple and 4-tuple 3183 * traffic. 3184 */ 3185 mrqc = IXGBE_MRQC_RSSEN 3186 | IXGBE_MRQC_RSS_FIELD_IPV4 3187 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3188 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP 3189 | IXGBE_MRQC_RSS_FIELD_IPV6_EX 3190 | IXGBE_MRQC_RSS_FIELD_IPV6 3191 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP 3192 ; 3193 #endif /* RSS */ 3194 #ifdef PCI_IOV 3195 mode = ixgbe_get_iov_mode(adapter); 3196 mrqc |= ixgbe_get_mrqc(mode); 3197 #endif 3198 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3199 } 3200 3201 3202 /********************************************************************* 3203 * 3204 * Setup receive registers and features. 3205 * 3206 **********************************************************************/ 3207 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 3208 3209 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 3210 3211 static void 3212 ixgbe_initialize_receive_units(struct adapter *adapter) 3213 { 3214 struct rx_ring *rxr = adapter->rx_rings; 3215 struct ixgbe_hw *hw = &adapter->hw; 3216 struct ifnet *ifp = adapter->ifp; 3217 u32 bufsz, fctrl, srrctl, rxcsum; 3218 u32 hlreg; 3219 3220 /* 3221 * Make sure receives are disabled while 3222 * setting up the descriptor ring 3223 */ 3224 ixgbe_disable_rx(hw); 3225 3226 /* Enable broadcasts */ 3227 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 3228 fctrl |= IXGBE_FCTRL_BAM; 3229 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3230 fctrl |= IXGBE_FCTRL_DPF; 3231 fctrl |= IXGBE_FCTRL_PMCF; 3232 } 3233 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 3234 3235 /* Set for Jumbo Frames? */ 3236 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3237 if (ifp->if_mtu > ETHERMTU) 3238 hlreg |= IXGBE_HLREG0_JUMBOEN; 3239 else 3240 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 3241 #ifdef DEV_NETMAP 3242 /* crcstrip is conditional in netmap (in RDRXCTL too ?) */ 3243 if (ifp->if_capenable & IFCAP_NETMAP && !ix_crcstrip) 3244 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 3245 else 3246 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 3247 #endif /* DEV_NETMAP */ 3248 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 3249 3250 bufsz = (adapter->rx_mbuf_sz + 3251 BSIZEPKT_ROUNDUP) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 3252 3253 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 3254 u64 rdba = rxr->rxdma.dma_paddr; 3255 int j = rxr->me; 3256 3257 /* Setup the Base and Length of the Rx Descriptor Ring */ 3258 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 3259 (rdba & 0x00000000ffffffffULL)); 3260 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 3261 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 3262 adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 3263 3264 /* Set up the SRRCTL register */ 3265 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 3266 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 3267 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 3268 srrctl |= bufsz; 3269 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 3270 3271 /* 3272 * Set DROP_EN iff we have no flow control and >1 queue. 3273 * Note that srrctl was cleared shortly before during reset, 3274 * so we do not need to clear the bit, but do it just in case 3275 * this code is moved elsewhere. 3276 */ 3277 if (adapter->num_queues > 1 && 3278 adapter->hw.fc.requested_mode == ixgbe_fc_none) { 3279 srrctl |= IXGBE_SRRCTL_DROP_EN; 3280 } else { 3281 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 3282 } 3283 3284 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 3285 3286 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 3287 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 3288 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 3289 3290 /* Set the driver rx tail address */ 3291 rxr->tail = IXGBE_RDT(rxr->me); 3292 } 3293 3294 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 3295 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 3296 IXGBE_PSRTYPE_UDPHDR | 3297 IXGBE_PSRTYPE_IPV4HDR | 3298 IXGBE_PSRTYPE_IPV6HDR; 3299 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 3300 } 3301 3302 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 3303 3304 ixgbe_initialize_rss_mapping(adapter); 3305 3306 if (adapter->num_queues > 1) { 3307 /* RSS and RX IPP Checksum are mutually exclusive */ 3308 rxcsum |= IXGBE_RXCSUM_PCSD; 3309 } 3310 3311 if (ifp->if_capenable & IFCAP_RXCSUM) 3312 rxcsum |= IXGBE_RXCSUM_PCSD; 3313 3314 /* This is useful for calculating UDP/IP fragment checksums */ 3315 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 3316 rxcsum |= IXGBE_RXCSUM_IPPCSE; 3317 3318 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 3319 3320 return; 3321 } 3322 3323 3324 /* 3325 ** This routine is run via an vlan config EVENT, 3326 ** it enables us to use the HW Filter table since 3327 ** we can get the vlan id. This just creates the 3328 ** entry in the soft version of the VFTA, init will 3329 ** repopulate the real table. 3330 */ 3331 static void 3332 ixgbe_register_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3333 { 3334 struct adapter *adapter = ifp->if_softc; 3335 u16 index, bit; 3336 3337 if (ifp->if_softc != arg) /* Not our event */ 3338 return; 3339 3340 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3341 return; 3342 3343 IXGBE_CORE_LOCK(adapter); 3344 index = (vtag >> 5) & 0x7F; 3345 bit = vtag & 0x1F; 3346 adapter->shadow_vfta[index] |= (1 << bit); 3347 ++adapter->num_vlans; 3348 ixgbe_setup_vlan_hw_support(adapter); 3349 IXGBE_CORE_UNLOCK(adapter); 3350 } 3351 3352 /* 3353 ** This routine is run via an vlan 3354 ** unconfig EVENT, remove our entry 3355 ** in the soft vfta. 3356 */ 3357 static void 3358 ixgbe_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3359 { 3360 struct adapter *adapter = ifp->if_softc; 3361 u16 index, bit; 3362 3363 if (ifp->if_softc != arg) 3364 return; 3365 3366 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3367 return; 3368 3369 IXGBE_CORE_LOCK(adapter); 3370 index = (vtag >> 5) & 0x7F; 3371 bit = vtag & 0x1F; 3372 adapter->shadow_vfta[index] &= ~(1 << bit); 3373 --adapter->num_vlans; 3374 /* Re-init to load the changes */ 3375 ixgbe_setup_vlan_hw_support(adapter); 3376 IXGBE_CORE_UNLOCK(adapter); 3377 } 3378 3379 static void 3380 ixgbe_setup_vlan_hw_support(struct adapter *adapter) 3381 { 3382 struct ifnet *ifp = adapter->ifp; 3383 struct ixgbe_hw *hw = &adapter->hw; 3384 struct rx_ring *rxr; 3385 u32 ctrl; 3386 3387 3388 /* 3389 ** We get here thru init_locked, meaning 3390 ** a soft reset, this has already cleared 3391 ** the VFTA and other state, so if there 3392 ** have been no vlan's registered do nothing. 3393 */ 3394 if (adapter->num_vlans == 0) 3395 return; 3396 3397 /* Setup the queues for vlans */ 3398 for (int i = 0; i < adapter->num_queues; i++) { 3399 rxr = &adapter->rx_rings[i]; 3400 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 3401 if (hw->mac.type != ixgbe_mac_82598EB) { 3402 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 3403 ctrl |= IXGBE_RXDCTL_VME; 3404 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 3405 } 3406 rxr->vtag_strip = TRUE; 3407 } 3408 3409 if ((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0) 3410 return; 3411 /* 3412 ** A soft reset zero's out the VFTA, so 3413 ** we need to repopulate it now. 3414 */ 3415 for (int i = 0; i < IXGBE_VFTA_SIZE; i++) 3416 if (adapter->shadow_vfta[i] != 0) 3417 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 3418 adapter->shadow_vfta[i]); 3419 3420 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 3421 /* Enable the Filter Table if enabled */ 3422 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER) { 3423 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 3424 ctrl |= IXGBE_VLNCTRL_VFE; 3425 } 3426 if (hw->mac.type == ixgbe_mac_82598EB) 3427 ctrl |= IXGBE_VLNCTRL_VME; 3428 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 3429 } 3430 3431 static void 3432 ixgbe_enable_intr(struct adapter *adapter) 3433 { 3434 struct ixgbe_hw *hw = &adapter->hw; 3435 struct ix_queue *que = adapter->queues; 3436 u32 mask, fwsm; 3437 3438 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 3439 /* Enable Fan Failure detection */ 3440 if (hw->device_id == IXGBE_DEV_ID_82598AT) 3441 mask |= IXGBE_EIMS_GPI_SDP1; 3442 3443 switch (adapter->hw.mac.type) { 3444 case ixgbe_mac_82599EB: 3445 mask |= IXGBE_EIMS_ECC; 3446 /* Temperature sensor on some adapters */ 3447 mask |= IXGBE_EIMS_GPI_SDP0; 3448 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 3449 mask |= IXGBE_EIMS_GPI_SDP1; 3450 mask |= IXGBE_EIMS_GPI_SDP2; 3451 #ifdef IXGBE_FDIR 3452 mask |= IXGBE_EIMS_FLOW_DIR; 3453 #endif 3454 #ifdef PCI_IOV 3455 mask |= IXGBE_EIMS_MAILBOX; 3456 #endif 3457 break; 3458 case ixgbe_mac_X540: 3459 /* Detect if Thermal Sensor is enabled */ 3460 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 3461 if (fwsm & IXGBE_FWSM_TS_ENABLED) 3462 mask |= IXGBE_EIMS_TS; 3463 mask |= IXGBE_EIMS_ECC; 3464 #ifdef IXGBE_FDIR 3465 mask |= IXGBE_EIMS_FLOW_DIR; 3466 #endif 3467 break; 3468 case ixgbe_mac_X550: 3469 case ixgbe_mac_X550EM_x: 3470 /* MAC thermal sensor is automatically enabled */ 3471 mask |= IXGBE_EIMS_TS; 3472 /* Some devices use SDP0 for important information */ 3473 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 3474 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 3475 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 3476 mask |= IXGBE_EIMS_ECC; 3477 #ifdef IXGBE_FDIR 3478 mask |= IXGBE_EIMS_FLOW_DIR; 3479 #endif 3480 #ifdef PCI_IOV 3481 mask |= IXGBE_EIMS_MAILBOX; 3482 #endif 3483 /* falls through */ 3484 default: 3485 break; 3486 } 3487 3488 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3489 3490 /* With MSI-X we use auto clear */ 3491 if (adapter->msix_mem) { 3492 mask = IXGBE_EIMS_ENABLE_MASK; 3493 /* Don't autoclear Link */ 3494 mask &= ~IXGBE_EIMS_OTHER; 3495 mask &= ~IXGBE_EIMS_LSC; 3496 #ifdef PCI_IOV 3497 mask &= ~IXGBE_EIMS_MAILBOX; 3498 #endif 3499 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 3500 } 3501 3502 /* 3503 ** Now enable all queues, this is done separately to 3504 ** allow for handling the extended (beyond 32) MSIX 3505 ** vectors that can be used by 82599 3506 */ 3507 for (int i = 0; i < adapter->num_queues; i++, que++) 3508 ixgbe_enable_queue(adapter, que->msix); 3509 3510 IXGBE_WRITE_FLUSH(hw); 3511 3512 return; 3513 } 3514 3515 static void 3516 ixgbe_disable_intr(struct adapter *adapter) 3517 { 3518 if (adapter->msix_mem) 3519 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0); 3520 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3521 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); 3522 } else { 3523 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); 3524 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); 3525 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 3526 } 3527 IXGBE_WRITE_FLUSH(&adapter->hw); 3528 return; 3529 } 3530 3531 /* 3532 ** Get the width and transaction speed of 3533 ** the slot this adapter is plugged into. 3534 */ 3535 static void 3536 ixgbe_get_slot_info(struct adapter *adapter) 3537 { 3538 device_t dev = adapter->dev; 3539 struct ixgbe_hw *hw = &adapter->hw; 3540 struct ixgbe_mac_info *mac = &hw->mac; 3541 u16 link; 3542 u32 offset; 3543 3544 /* For most devices simply call the shared code routine */ 3545 if (hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) { 3546 ixgbe_get_bus_info(hw); 3547 /* These devices don't use PCI-E */ 3548 switch (hw->mac.type) { 3549 case ixgbe_mac_X550EM_x: 3550 return; 3551 default: 3552 goto display; 3553 } 3554 } 3555 3556 /* 3557 ** For the Quad port adapter we need to parse back 3558 ** up the PCI tree to find the speed of the expansion 3559 ** slot into which this adapter is plugged. A bit more work. 3560 */ 3561 dev = device_get_parent(device_get_parent(dev)); 3562 #ifdef IXGBE_DEBUG 3563 device_printf(dev, "parent pcib = %x,%x,%x\n", 3564 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3565 #endif 3566 dev = device_get_parent(device_get_parent(dev)); 3567 #ifdef IXGBE_DEBUG 3568 device_printf(dev, "slot pcib = %x,%x,%x\n", 3569 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3570 #endif 3571 /* Now get the PCI Express Capabilities offset */ 3572 pci_find_cap(dev, PCIY_EXPRESS, &offset); 3573 /* ...and read the Link Status Register */ 3574 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 3575 switch (link & IXGBE_PCI_LINK_WIDTH) { 3576 case IXGBE_PCI_LINK_WIDTH_1: 3577 hw->bus.width = ixgbe_bus_width_pcie_x1; 3578 break; 3579 case IXGBE_PCI_LINK_WIDTH_2: 3580 hw->bus.width = ixgbe_bus_width_pcie_x2; 3581 break; 3582 case IXGBE_PCI_LINK_WIDTH_4: 3583 hw->bus.width = ixgbe_bus_width_pcie_x4; 3584 break; 3585 case IXGBE_PCI_LINK_WIDTH_8: 3586 hw->bus.width = ixgbe_bus_width_pcie_x8; 3587 break; 3588 default: 3589 hw->bus.width = ixgbe_bus_width_unknown; 3590 break; 3591 } 3592 3593 switch (link & IXGBE_PCI_LINK_SPEED) { 3594 case IXGBE_PCI_LINK_SPEED_2500: 3595 hw->bus.speed = ixgbe_bus_speed_2500; 3596 break; 3597 case IXGBE_PCI_LINK_SPEED_5000: 3598 hw->bus.speed = ixgbe_bus_speed_5000; 3599 break; 3600 case IXGBE_PCI_LINK_SPEED_8000: 3601 hw->bus.speed = ixgbe_bus_speed_8000; 3602 break; 3603 default: 3604 hw->bus.speed = ixgbe_bus_speed_unknown; 3605 break; 3606 } 3607 3608 mac->ops.set_lan_id(hw); 3609 3610 display: 3611 device_printf(dev,"PCI Express Bus: Speed %s %s\n", 3612 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s": 3613 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s": 3614 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s":"Unknown"), 3615 (hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" : 3616 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" : 3617 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" : 3618 ("Unknown")); 3619 3620 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 3621 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 3622 (hw->bus.speed == ixgbe_bus_speed_2500))) { 3623 device_printf(dev, "PCI-Express bandwidth available" 3624 " for this card\n is not sufficient for" 3625 " optimal performance.\n"); 3626 device_printf(dev, "For optimal performance a x8 " 3627 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 3628 } 3629 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 3630 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 3631 (hw->bus.speed < ixgbe_bus_speed_8000))) { 3632 device_printf(dev, "PCI-Express bandwidth available" 3633 " for this card\n is not sufficient for" 3634 " optimal performance.\n"); 3635 device_printf(dev, "For optimal performance a x8 " 3636 "PCIE Gen3 slot is required.\n"); 3637 } 3638 3639 return; 3640 } 3641 3642 3643 /* 3644 ** Setup the correct IVAR register for a particular MSIX interrupt 3645 ** (yes this is all very magic and confusing :) 3646 ** - entry is the register array entry 3647 ** - vector is the MSIX vector for this queue 3648 ** - type is RX/TX/MISC 3649 */ 3650 static void 3651 ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type) 3652 { 3653 struct ixgbe_hw *hw = &adapter->hw; 3654 u32 ivar, index; 3655 3656 vector |= IXGBE_IVAR_ALLOC_VAL; 3657 3658 switch (hw->mac.type) { 3659 3660 case ixgbe_mac_82598EB: 3661 if (type == -1) 3662 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 3663 else 3664 entry += (type * 64); 3665 index = (entry >> 2) & 0x1F; 3666 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 3667 ivar &= ~(0xFF << (8 * (entry & 0x3))); 3668 ivar |= (vector << (8 * (entry & 0x3))); 3669 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar); 3670 break; 3671 3672 case ixgbe_mac_82599EB: 3673 case ixgbe_mac_X540: 3674 case ixgbe_mac_X550: 3675 case ixgbe_mac_X550EM_x: 3676 if (type == -1) { /* MISC IVAR */ 3677 index = (entry & 1) * 8; 3678 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 3679 ivar &= ~(0xFF << index); 3680 ivar |= (vector << index); 3681 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 3682 } else { /* RX/TX IVARS */ 3683 index = (16 * (entry & 1)) + (8 * type); 3684 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 3685 ivar &= ~(0xFF << index); 3686 ivar |= (vector << index); 3687 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 3688 } 3689 3690 default: 3691 break; 3692 } 3693 } 3694 3695 static void 3696 ixgbe_configure_ivars(struct adapter *adapter) 3697 { 3698 struct ix_queue *que = adapter->queues; 3699 u32 newitr; 3700 3701 if (ixgbe_max_interrupt_rate > 0) 3702 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 3703 else { 3704 /* 3705 ** Disable DMA coalescing if interrupt moderation is 3706 ** disabled. 3707 */ 3708 adapter->dmac = 0; 3709 newitr = 0; 3710 } 3711 3712 for (int i = 0; i < adapter->num_queues; i++, que++) { 3713 struct rx_ring *rxr = &adapter->rx_rings[i]; 3714 struct tx_ring *txr = &adapter->tx_rings[i]; 3715 /* First the RX queue entry */ 3716 ixgbe_set_ivar(adapter, rxr->me, que->msix, 0); 3717 /* ... and the TX */ 3718 ixgbe_set_ivar(adapter, txr->me, que->msix, 1); 3719 /* Set an Initial EITR value */ 3720 IXGBE_WRITE_REG(&adapter->hw, 3721 IXGBE_EITR(que->msix), newitr); 3722 } 3723 3724 /* For the Link interrupt */ 3725 ixgbe_set_ivar(adapter, 1, adapter->vector, -1); 3726 } 3727 3728 /* 3729 ** ixgbe_sfp_probe - called in the local timer to 3730 ** determine if a port had optics inserted. 3731 */ 3732 static bool 3733 ixgbe_sfp_probe(struct adapter *adapter) 3734 { 3735 struct ixgbe_hw *hw = &adapter->hw; 3736 device_t dev = adapter->dev; 3737 bool result = FALSE; 3738 3739 if ((hw->phy.type == ixgbe_phy_nl) && 3740 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 3741 s32 ret = hw->phy.ops.identify_sfp(hw); 3742 if (ret) 3743 goto out; 3744 ret = hw->phy.ops.reset(hw); 3745 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3746 device_printf(dev, "Unsupported SFP+ module detected!"); 3747 device_printf(dev, "Reload driver with supported module.\n"); 3748 adapter->sfp_probe = FALSE; 3749 goto out; 3750 } else 3751 device_printf(dev, "SFP+ module detected!\n"); 3752 /* We now have supported optics */ 3753 adapter->sfp_probe = FALSE; 3754 /* Set the optics type so system reports correctly */ 3755 ixgbe_setup_optics(adapter); 3756 result = TRUE; 3757 } 3758 out: 3759 return (result); 3760 } 3761 3762 /* 3763 ** Tasklet handler for MSIX Link interrupts 3764 ** - do outside interrupt since it might sleep 3765 */ 3766 static void 3767 ixgbe_handle_link(void *context, int pending) 3768 { 3769 struct adapter *adapter = context; 3770 struct ixgbe_hw *hw = &adapter->hw; 3771 3772 ixgbe_check_link(hw, 3773 &adapter->link_speed, &adapter->link_up, 0); 3774 ixgbe_update_link_status(adapter); 3775 3776 /* Re-enable link interrupts */ 3777 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 3778 } 3779 3780 /* 3781 ** Tasklet for handling SFP module interrupts 3782 */ 3783 static void 3784 ixgbe_handle_mod(void *context, int pending) 3785 { 3786 struct adapter *adapter = context; 3787 struct ixgbe_hw *hw = &adapter->hw; 3788 enum ixgbe_phy_type orig_type = hw->phy.type; 3789 device_t dev = adapter->dev; 3790 u32 err; 3791 3792 IXGBE_CORE_LOCK(adapter); 3793 3794 /* Check to see if the PHY type changed */ 3795 if (hw->phy.ops.identify) { 3796 hw->phy.type = ixgbe_phy_unknown; 3797 hw->phy.ops.identify(hw); 3798 } 3799 3800 if (hw->phy.type != orig_type) { 3801 device_printf(dev, "Detected phy_type %d\n", hw->phy.type); 3802 3803 if (hw->phy.type == ixgbe_phy_none) { 3804 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 3805 goto out; 3806 } 3807 3808 /* Try to do the initialization that was skipped before */ 3809 if (hw->phy.ops.init) 3810 hw->phy.ops.init(hw); 3811 if (hw->phy.ops.reset) 3812 hw->phy.ops.reset(hw); 3813 } 3814 3815 err = hw->phy.ops.identify_sfp(hw); 3816 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3817 device_printf(dev, 3818 "Unsupported SFP+ module type was detected.\n"); 3819 goto out; 3820 } 3821 3822 err = hw->mac.ops.setup_sfp(hw); 3823 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3824 device_printf(dev, 3825 "Setup failure - unsupported SFP+ module type.\n"); 3826 goto out; 3827 } 3828 if (hw->phy.multispeed_fiber) 3829 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 3830 out: 3831 /* Update media type */ 3832 switch (hw->mac.ops.get_media_type(hw)) { 3833 case ixgbe_media_type_fiber: 3834 adapter->optics = IFM_10G_SR; 3835 break; 3836 case ixgbe_media_type_copper: 3837 adapter->optics = IFM_10G_TWINAX; 3838 break; 3839 case ixgbe_media_type_cx4: 3840 adapter->optics = IFM_10G_CX4; 3841 break; 3842 default: 3843 adapter->optics = 0; 3844 break; 3845 } 3846 3847 IXGBE_CORE_UNLOCK(adapter); 3848 return; 3849 } 3850 3851 3852 /* 3853 ** Tasklet for handling MSF (multispeed fiber) interrupts 3854 */ 3855 static void 3856 ixgbe_handle_msf(void *context, int pending) 3857 { 3858 struct adapter *adapter = context; 3859 struct ixgbe_hw *hw = &adapter->hw; 3860 u32 autoneg; 3861 bool negotiate; 3862 3863 IXGBE_CORE_LOCK(adapter); 3864 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 3865 adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 3866 3867 autoneg = hw->phy.autoneg_advertised; 3868 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 3869 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 3870 if (hw->mac.ops.setup_link) 3871 hw->mac.ops.setup_link(hw, autoneg, TRUE); 3872 3873 /* Adjust media types shown in ifconfig */ 3874 ifmedia_removeall(&adapter->media); 3875 ixgbe_add_media_types(adapter); 3876 IXGBE_CORE_UNLOCK(adapter); 3877 return; 3878 } 3879 3880 /* 3881 ** Tasklet for handling interrupts from an external PHY 3882 */ 3883 static void 3884 ixgbe_handle_phy(void *context, int pending) 3885 { 3886 struct adapter *adapter = context; 3887 struct ixgbe_hw *hw = &adapter->hw; 3888 int error; 3889 3890 error = hw->phy.ops.handle_lasi(hw); 3891 if (error == IXGBE_ERR_OVERTEMP) 3892 device_printf(adapter->dev, 3893 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 3894 " PHY will downshift to lower power state!\n"); 3895 else if (error) 3896 device_printf(adapter->dev, 3897 "Error handling LASI interrupt: %d\n", 3898 error); 3899 return; 3900 } 3901 3902 #ifdef IXGBE_FDIR 3903 /* 3904 ** Tasklet for reinitializing the Flow Director filter table 3905 */ 3906 static void 3907 ixgbe_reinit_fdir(void *context, int pending) 3908 { 3909 struct adapter *adapter = context; 3910 struct ifnet *ifp = adapter->ifp; 3911 3912 if (adapter->fdir_reinit != 1) /* Shouldn't happen */ 3913 return; 3914 ixgbe_reinit_fdir_tables_82599(&adapter->hw); 3915 adapter->fdir_reinit = 0; 3916 /* re-enable flow director interrupts */ 3917 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 3918 /* Restart the interface */ 3919 ifp->if_drv_flags |= IFF_DRV_RUNNING; 3920 return; 3921 } 3922 #endif 3923 3924 /********************************************************************* 3925 * 3926 * Configure DMA Coalescing 3927 * 3928 **********************************************************************/ 3929 static void 3930 ixgbe_config_dmac(struct adapter *adapter) 3931 { 3932 struct ixgbe_hw *hw = &adapter->hw; 3933 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 3934 3935 if (hw->mac.type < ixgbe_mac_X550 || 3936 !hw->mac.ops.dmac_config) 3937 return; 3938 3939 if (dcfg->watchdog_timer ^ adapter->dmac || 3940 dcfg->link_speed ^ adapter->link_speed) { 3941 dcfg->watchdog_timer = adapter->dmac; 3942 dcfg->fcoe_en = false; 3943 dcfg->link_speed = adapter->link_speed; 3944 dcfg->num_tcs = 1; 3945 3946 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 3947 dcfg->watchdog_timer, dcfg->link_speed); 3948 3949 hw->mac.ops.dmac_config(hw); 3950 } 3951 } 3952 3953 /* 3954 * Checks whether the adapter's ports are capable of 3955 * Wake On LAN by reading the adapter's NVM. 3956 * 3957 * Sets each port's hw->wol_enabled value depending 3958 * on the value read here. 3959 */ 3960 static void 3961 ixgbe_check_wol_support(struct adapter *adapter) 3962 { 3963 struct ixgbe_hw *hw = &adapter->hw; 3964 u16 dev_caps = 0; 3965 3966 /* Find out WoL support for port */ 3967 adapter->wol_support = hw->wol_enabled = 0; 3968 ixgbe_get_device_caps(hw, &dev_caps); 3969 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 3970 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 3971 hw->bus.func == 0)) 3972 adapter->wol_support = hw->wol_enabled = 1; 3973 3974 /* Save initial wake up filter configuration */ 3975 adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 3976 3977 return; 3978 } 3979 3980 /* 3981 * Prepare the adapter/port for LPLU and/or WoL 3982 */ 3983 static int 3984 ixgbe_setup_low_power_mode(struct adapter *adapter) 3985 { 3986 struct ixgbe_hw *hw = &adapter->hw; 3987 device_t dev = adapter->dev; 3988 s32 error = 0; 3989 3990 mtx_assert(&adapter->core_mtx, MA_OWNED); 3991 3992 if (!hw->wol_enabled) 3993 ixgbe_set_phy_power(hw, FALSE); 3994 3995 /* Limit power management flow to X550EM baseT */ 3996 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T 3997 && hw->phy.ops.enter_lplu) { 3998 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3999 IXGBE_WRITE_REG(hw, IXGBE_GRC, 4000 IXGBE_READ_REG(hw, IXGBE_GRC) & ~(u32)2); 4001 4002 /* 4003 * Clear Wake Up Status register to prevent any previous wakeup 4004 * events from waking us up immediately after we suspend. 4005 */ 4006 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4007 4008 /* 4009 * Program the Wakeup Filter Control register with user filter 4010 * settings 4011 */ 4012 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc); 4013 4014 /* Enable wakeups and power management in Wakeup Control */ 4015 IXGBE_WRITE_REG(hw, IXGBE_WUC, 4016 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 4017 4018 /* X550EM baseT adapters need a special LPLU flow */ 4019 hw->phy.reset_disable = true; 4020 ixgbe_stop(adapter); 4021 error = hw->phy.ops.enter_lplu(hw); 4022 if (error) 4023 device_printf(dev, 4024 "Error entering LPLU: %d\n", error); 4025 hw->phy.reset_disable = false; 4026 } else { 4027 /* Just stop for other adapters */ 4028 ixgbe_stop(adapter); 4029 } 4030 4031 return error; 4032 } 4033 4034 /********************************************************************** 4035 * 4036 * Update the board statistics counters. 4037 * 4038 **********************************************************************/ 4039 static void 4040 ixgbe_update_stats_counters(struct adapter *adapter) 4041 { 4042 struct ixgbe_hw *hw = &adapter->hw; 4043 u32 missed_rx = 0, bprc, lxon, lxoff, total; 4044 u64 total_missed_rx = 0; 4045 4046 adapter->stats.pf.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 4047 adapter->stats.pf.illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 4048 adapter->stats.pf.errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 4049 adapter->stats.pf.mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 4050 4051 for (int i = 0; i < 16; i++) { 4052 adapter->stats.pf.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 4053 adapter->stats.pf.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 4054 adapter->stats.pf.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 4055 } 4056 adapter->stats.pf.mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 4057 adapter->stats.pf.mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 4058 adapter->stats.pf.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 4059 4060 /* Hardware workaround, gprc counts missed packets */ 4061 adapter->stats.pf.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 4062 adapter->stats.pf.gprc -= missed_rx; 4063 4064 if (hw->mac.type != ixgbe_mac_82598EB) { 4065 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 4066 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 4067 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 4068 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 4069 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 4070 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 4071 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 4072 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 4073 } else { 4074 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 4075 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 4076 /* 82598 only has a counter in the high register */ 4077 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 4078 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 4079 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORH); 4080 } 4081 4082 /* 4083 * Workaround: mprc hardware is incorrectly counting 4084 * broadcasts, so for now we subtract those. 4085 */ 4086 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 4087 adapter->stats.pf.bprc += bprc; 4088 adapter->stats.pf.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 4089 if (hw->mac.type == ixgbe_mac_82598EB) 4090 adapter->stats.pf.mprc -= bprc; 4091 4092 adapter->stats.pf.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 4093 adapter->stats.pf.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 4094 adapter->stats.pf.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 4095 adapter->stats.pf.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 4096 adapter->stats.pf.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 4097 adapter->stats.pf.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 4098 4099 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 4100 adapter->stats.pf.lxontxc += lxon; 4101 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 4102 adapter->stats.pf.lxofftxc += lxoff; 4103 total = lxon + lxoff; 4104 4105 adapter->stats.pf.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 4106 adapter->stats.pf.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 4107 adapter->stats.pf.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 4108 adapter->stats.pf.gptc -= total; 4109 adapter->stats.pf.mptc -= total; 4110 adapter->stats.pf.ptc64 -= total; 4111 adapter->stats.pf.gotc -= total * ETHER_MIN_LEN; 4112 4113 adapter->stats.pf.ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 4114 adapter->stats.pf.rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 4115 adapter->stats.pf.roc += IXGBE_READ_REG(hw, IXGBE_ROC); 4116 adapter->stats.pf.rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 4117 adapter->stats.pf.mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 4118 adapter->stats.pf.mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 4119 adapter->stats.pf.mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 4120 adapter->stats.pf.tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 4121 adapter->stats.pf.tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 4122 adapter->stats.pf.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 4123 adapter->stats.pf.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 4124 adapter->stats.pf.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 4125 adapter->stats.pf.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 4126 adapter->stats.pf.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 4127 adapter->stats.pf.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 4128 adapter->stats.pf.xec += IXGBE_READ_REG(hw, IXGBE_XEC); 4129 adapter->stats.pf.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 4130 adapter->stats.pf.fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 4131 /* Only read FCOE on 82599 */ 4132 if (hw->mac.type != ixgbe_mac_82598EB) { 4133 adapter->stats.pf.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 4134 adapter->stats.pf.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 4135 adapter->stats.pf.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 4136 adapter->stats.pf.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 4137 adapter->stats.pf.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 4138 } 4139 4140 /* Fill out the OS statistics structure */ 4141 IXGBE_SET_IPACKETS(adapter, adapter->stats.pf.gprc); 4142 IXGBE_SET_OPACKETS(adapter, adapter->stats.pf.gptc); 4143 IXGBE_SET_IBYTES(adapter, adapter->stats.pf.gorc); 4144 IXGBE_SET_OBYTES(adapter, adapter->stats.pf.gotc); 4145 IXGBE_SET_IMCASTS(adapter, adapter->stats.pf.mprc); 4146 IXGBE_SET_OMCASTS(adapter, adapter->stats.pf.mptc); 4147 IXGBE_SET_COLLISIONS(adapter, 0); 4148 IXGBE_SET_IQDROPS(adapter, total_missed_rx); 4149 IXGBE_SET_IERRORS(adapter, adapter->stats.pf.crcerrs 4150 + adapter->stats.pf.rlec); 4151 } 4152 4153 #if __FreeBSD_version >= 1100036 4154 static uint64_t 4155 ixgbe_get_counter(struct ifnet *ifp, ift_counter cnt) 4156 { 4157 struct adapter *adapter; 4158 struct tx_ring *txr; 4159 uint64_t rv; 4160 4161 adapter = if_getsoftc(ifp); 4162 4163 switch (cnt) { 4164 case IFCOUNTER_IPACKETS: 4165 return (adapter->ipackets); 4166 case IFCOUNTER_OPACKETS: 4167 return (adapter->opackets); 4168 case IFCOUNTER_IBYTES: 4169 return (adapter->ibytes); 4170 case IFCOUNTER_OBYTES: 4171 return (adapter->obytes); 4172 case IFCOUNTER_IMCASTS: 4173 return (adapter->imcasts); 4174 case IFCOUNTER_OMCASTS: 4175 return (adapter->omcasts); 4176 case IFCOUNTER_COLLISIONS: 4177 return (0); 4178 case IFCOUNTER_IQDROPS: 4179 return (adapter->iqdrops); 4180 case IFCOUNTER_OQDROPS: 4181 rv = 0; 4182 txr = adapter->tx_rings; 4183 for (int i = 0; i < adapter->num_queues; i++, txr++) 4184 rv += txr->br->br_drops; 4185 return (rv); 4186 case IFCOUNTER_IERRORS: 4187 return (adapter->ierrors); 4188 default: 4189 return (if_get_counter_default(ifp, cnt)); 4190 } 4191 } 4192 #endif 4193 4194 /** ixgbe_sysctl_tdh_handler - Handler function 4195 * Retrieves the TDH value from the hardware 4196 */ 4197 static int 4198 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 4199 { 4200 int error; 4201 4202 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4203 if (!txr) return 0; 4204 4205 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDH(txr->me)); 4206 error = sysctl_handle_int(oidp, &val, 0, req); 4207 if (error || !req->newptr) 4208 return error; 4209 return 0; 4210 } 4211 4212 /** ixgbe_sysctl_tdt_handler - Handler function 4213 * Retrieves the TDT value from the hardware 4214 */ 4215 static int 4216 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 4217 { 4218 int error; 4219 4220 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4221 if (!txr) return 0; 4222 4223 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDT(txr->me)); 4224 error = sysctl_handle_int(oidp, &val, 0, req); 4225 if (error || !req->newptr) 4226 return error; 4227 return 0; 4228 } 4229 4230 /** ixgbe_sysctl_rdh_handler - Handler function 4231 * Retrieves the RDH value from the hardware 4232 */ 4233 static int 4234 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 4235 { 4236 int error; 4237 4238 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4239 if (!rxr) return 0; 4240 4241 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDH(rxr->me)); 4242 error = sysctl_handle_int(oidp, &val, 0, req); 4243 if (error || !req->newptr) 4244 return error; 4245 return 0; 4246 } 4247 4248 /** ixgbe_sysctl_rdt_handler - Handler function 4249 * Retrieves the RDT value from the hardware 4250 */ 4251 static int 4252 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 4253 { 4254 int error; 4255 4256 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4257 if (!rxr) return 0; 4258 4259 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDT(rxr->me)); 4260 error = sysctl_handle_int(oidp, &val, 0, req); 4261 if (error || !req->newptr) 4262 return error; 4263 return 0; 4264 } 4265 4266 static int 4267 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 4268 { 4269 int error; 4270 struct ix_queue *que = ((struct ix_queue *)oidp->oid_arg1); 4271 unsigned int reg, usec, rate; 4272 4273 reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_EITR(que->msix)); 4274 usec = ((reg & 0x0FF8) >> 3); 4275 if (usec > 0) 4276 rate = 500000 / usec; 4277 else 4278 rate = 0; 4279 error = sysctl_handle_int(oidp, &rate, 0, req); 4280 if (error || !req->newptr) 4281 return error; 4282 reg &= ~0xfff; /* default, no limitation */ 4283 ixgbe_max_interrupt_rate = 0; 4284 if (rate > 0 && rate < 500000) { 4285 if (rate < 1000) 4286 rate = 1000; 4287 ixgbe_max_interrupt_rate = rate; 4288 reg |= ((4000000/rate) & 0xff8 ); 4289 } 4290 IXGBE_WRITE_REG(&que->adapter->hw, IXGBE_EITR(que->msix), reg); 4291 return 0; 4292 } 4293 4294 static void 4295 ixgbe_add_device_sysctls(struct adapter *adapter) 4296 { 4297 device_t dev = adapter->dev; 4298 struct ixgbe_hw *hw = &adapter->hw; 4299 struct sysctl_oid_list *child; 4300 struct sysctl_ctx_list *ctx; 4301 4302 ctx = device_get_sysctl_ctx(dev); 4303 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 4304 4305 /* Sysctls for all devices */ 4306 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "fc", 4307 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4308 ixgbe_sysctl_flowcntl, "I", IXGBE_SYSCTL_DESC_SET_FC); 4309 4310 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "enable_aim", 4311 CTLFLAG_RW, 4312 &ixgbe_enable_aim, 1, "Interrupt Moderation"); 4313 4314 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "advertise_speed", 4315 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4316 ixgbe_sysctl_advertise, "I", IXGBE_SYSCTL_DESC_ADV_SPEED); 4317 4318 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "thermal_test", 4319 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4320 ixgbe_sysctl_thermal_test, "I", "Thermal Test"); 4321 4322 #ifdef IXGBE_DEBUG 4323 /* testing sysctls (for all devices) */ 4324 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "power_state", 4325 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4326 ixgbe_sysctl_power_state, "I", "PCI Power State"); 4327 4328 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "print_rss_config", 4329 CTLTYPE_STRING | CTLFLAG_RD, adapter, 0, 4330 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 4331 #endif 4332 /* for X550 series devices */ 4333 if (hw->mac.type >= ixgbe_mac_X550) 4334 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "dmac", 4335 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4336 ixgbe_sysctl_dmac, "I", "DMA Coalesce"); 4337 4338 /* for X552 backplane devices */ 4339 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) { 4340 struct sysctl_oid *eee_node; 4341 struct sysctl_oid_list *eee_list; 4342 4343 eee_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "eee", 4344 CTLFLAG_RD, NULL, 4345 "Energy Efficient Ethernet sysctls"); 4346 eee_list = SYSCTL_CHILDREN(eee_node); 4347 4348 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "enable", 4349 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4350 ixgbe_sysctl_eee_enable, "I", 4351 "Enable or Disable EEE"); 4352 4353 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "negotiated", 4354 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4355 ixgbe_sysctl_eee_negotiated, "I", 4356 "EEE negotiated on link"); 4357 4358 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_status", 4359 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4360 ixgbe_sysctl_eee_tx_lpi_status, "I", 4361 "Whether or not TX link is in LPI state"); 4362 4363 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "rx_lpi_status", 4364 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4365 ixgbe_sysctl_eee_rx_lpi_status, "I", 4366 "Whether or not RX link is in LPI state"); 4367 4368 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_delay", 4369 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4370 ixgbe_sysctl_eee_tx_lpi_delay, "I", 4371 "TX LPI entry delay in microseconds"); 4372 } 4373 4374 /* for WoL-capable devices */ 4375 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4376 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wol_enable", 4377 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4378 ixgbe_sysctl_wol_enable, "I", 4379 "Enable/Disable Wake on LAN"); 4380 4381 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wufc", 4382 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4383 ixgbe_sysctl_wufc, "I", 4384 "Enable/Disable Wake Up Filters"); 4385 } 4386 4387 /* for X552/X557-AT devices */ 4388 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4389 struct sysctl_oid *phy_node; 4390 struct sysctl_oid_list *phy_list; 4391 4392 phy_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "phy", 4393 CTLFLAG_RD, NULL, 4394 "External PHY sysctls"); 4395 phy_list = SYSCTL_CHILDREN(phy_node); 4396 4397 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "temp", 4398 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4399 ixgbe_sysctl_phy_temp, "I", 4400 "Current External PHY Temperature (Celsius)"); 4401 4402 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "overtemp_occurred", 4403 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4404 ixgbe_sysctl_phy_overtemp_occurred, "I", 4405 "External PHY High Temperature Event Occurred"); 4406 } 4407 } 4408 4409 /* 4410 * Add sysctl variables, one per statistic, to the system. 4411 */ 4412 static void 4413 ixgbe_add_hw_stats(struct adapter *adapter) 4414 { 4415 device_t dev = adapter->dev; 4416 4417 struct tx_ring *txr = adapter->tx_rings; 4418 struct rx_ring *rxr = adapter->rx_rings; 4419 4420 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 4421 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 4422 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 4423 struct ixgbe_hw_stats *stats = &adapter->stats.pf; 4424 4425 struct sysctl_oid *stat_node, *queue_node; 4426 struct sysctl_oid_list *stat_list, *queue_list; 4427 4428 #define QUEUE_NAME_LEN 32 4429 char namebuf[QUEUE_NAME_LEN]; 4430 4431 /* Driver Statistics */ 4432 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 4433 CTLFLAG_RD, &adapter->dropped_pkts, 4434 "Driver dropped packets"); 4435 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "mbuf_defrag_failed", 4436 CTLFLAG_RD, &adapter->mbuf_defrag_failed, 4437 "m_defrag() failed"); 4438 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events", 4439 CTLFLAG_RD, &adapter->watchdog_events, 4440 "Watchdog timeouts"); 4441 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 4442 CTLFLAG_RD, &adapter->link_irq, 4443 "Link MSIX IRQ Handled"); 4444 4445 for (int i = 0; i < adapter->num_queues; i++, txr++) { 4446 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4447 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4448 CTLFLAG_RD, NULL, "Queue Name"); 4449 queue_list = SYSCTL_CHILDREN(queue_node); 4450 4451 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 4452 CTLTYPE_UINT | CTLFLAG_RW, &adapter->queues[i], 4453 sizeof(&adapter->queues[i]), 4454 ixgbe_sysctl_interrupt_rate_handler, "IU", 4455 "Interrupt Rate"); 4456 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 4457 CTLFLAG_RD, &(adapter->queues[i].irqs), 4458 "irqs on this queue"); 4459 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 4460 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4461 ixgbe_sysctl_tdh_handler, "IU", 4462 "Transmit Descriptor Head"); 4463 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 4464 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4465 ixgbe_sysctl_tdt_handler, "IU", 4466 "Transmit Descriptor Tail"); 4467 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "tso_tx", 4468 CTLFLAG_RD, &txr->tso_tx, 4469 "TSO"); 4470 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "no_tx_dma_setup", 4471 CTLFLAG_RD, &txr->no_tx_dma_setup, 4472 "Driver tx dma failure in xmit"); 4473 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "no_desc_avail", 4474 CTLFLAG_RD, &txr->no_desc_avail, 4475 "Queue No Descriptor Available"); 4476 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 4477 CTLFLAG_RD, &txr->total_packets, 4478 "Queue Packets Transmitted"); 4479 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "br_drops", 4480 CTLFLAG_RD, &txr->br->br_drops, 4481 "Packets dropped in buf_ring"); 4482 } 4483 4484 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 4485 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4486 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4487 CTLFLAG_RD, NULL, "Queue Name"); 4488 queue_list = SYSCTL_CHILDREN(queue_node); 4489 4490 struct lro_ctrl *lro = &rxr->lro; 4491 4492 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4493 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4494 CTLFLAG_RD, NULL, "Queue Name"); 4495 queue_list = SYSCTL_CHILDREN(queue_node); 4496 4497 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 4498 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4499 ixgbe_sysctl_rdh_handler, "IU", 4500 "Receive Descriptor Head"); 4501 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 4502 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4503 ixgbe_sysctl_rdt_handler, "IU", 4504 "Receive Descriptor Tail"); 4505 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 4506 CTLFLAG_RD, &rxr->rx_packets, 4507 "Queue Packets Received"); 4508 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 4509 CTLFLAG_RD, &rxr->rx_bytes, 4510 "Queue Bytes Received"); 4511 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 4512 CTLFLAG_RD, &rxr->rx_copies, 4513 "Copied RX Frames"); 4514 SYSCTL_ADD_U64(ctx, queue_list, OID_AUTO, "lro_queued", 4515 CTLFLAG_RD, &lro->lro_queued, 0, 4516 "LRO Queued"); 4517 SYSCTL_ADD_U64(ctx, queue_list, OID_AUTO, "lro_flushed", 4518 CTLFLAG_RD, &lro->lro_flushed, 0, 4519 "LRO Flushed"); 4520 } 4521 4522 /* MAC stats get the own sub node */ 4523 4524 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 4525 CTLFLAG_RD, NULL, "MAC Statistics"); 4526 stat_list = SYSCTL_CHILDREN(stat_node); 4527 4528 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 4529 CTLFLAG_RD, &stats->crcerrs, 4530 "CRC Errors"); 4531 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 4532 CTLFLAG_RD, &stats->illerrc, 4533 "Illegal Byte Errors"); 4534 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 4535 CTLFLAG_RD, &stats->errbc, 4536 "Byte Errors"); 4537 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 4538 CTLFLAG_RD, &stats->mspdc, 4539 "MAC Short Packets Discarded"); 4540 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 4541 CTLFLAG_RD, &stats->mlfc, 4542 "MAC Local Faults"); 4543 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 4544 CTLFLAG_RD, &stats->mrfc, 4545 "MAC Remote Faults"); 4546 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 4547 CTLFLAG_RD, &stats->rlec, 4548 "Receive Length Errors"); 4549 4550 /* Flow Control stats */ 4551 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 4552 CTLFLAG_RD, &stats->lxontxc, 4553 "Link XON Transmitted"); 4554 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 4555 CTLFLAG_RD, &stats->lxonrxc, 4556 "Link XON Received"); 4557 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 4558 CTLFLAG_RD, &stats->lxofftxc, 4559 "Link XOFF Transmitted"); 4560 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 4561 CTLFLAG_RD, &stats->lxoffrxc, 4562 "Link XOFF Received"); 4563 4564 /* Packet Reception Stats */ 4565 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 4566 CTLFLAG_RD, &stats->tor, 4567 "Total Octets Received"); 4568 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 4569 CTLFLAG_RD, &stats->gorc, 4570 "Good Octets Received"); 4571 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 4572 CTLFLAG_RD, &stats->tpr, 4573 "Total Packets Received"); 4574 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 4575 CTLFLAG_RD, &stats->gprc, 4576 "Good Packets Received"); 4577 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 4578 CTLFLAG_RD, &stats->mprc, 4579 "Multicast Packets Received"); 4580 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 4581 CTLFLAG_RD, &stats->bprc, 4582 "Broadcast Packets Received"); 4583 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 4584 CTLFLAG_RD, &stats->prc64, 4585 "64 byte frames received "); 4586 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 4587 CTLFLAG_RD, &stats->prc127, 4588 "65-127 byte frames received"); 4589 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 4590 CTLFLAG_RD, &stats->prc255, 4591 "128-255 byte frames received"); 4592 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 4593 CTLFLAG_RD, &stats->prc511, 4594 "256-511 byte frames received"); 4595 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 4596 CTLFLAG_RD, &stats->prc1023, 4597 "512-1023 byte frames received"); 4598 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 4599 CTLFLAG_RD, &stats->prc1522, 4600 "1023-1522 byte frames received"); 4601 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 4602 CTLFLAG_RD, &stats->ruc, 4603 "Receive Undersized"); 4604 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 4605 CTLFLAG_RD, &stats->rfc, 4606 "Fragmented Packets Received "); 4607 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 4608 CTLFLAG_RD, &stats->roc, 4609 "Oversized Packets Received"); 4610 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 4611 CTLFLAG_RD, &stats->rjc, 4612 "Received Jabber"); 4613 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 4614 CTLFLAG_RD, &stats->mngprc, 4615 "Management Packets Received"); 4616 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 4617 CTLFLAG_RD, &stats->mngptc, 4618 "Management Packets Dropped"); 4619 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 4620 CTLFLAG_RD, &stats->xec, 4621 "Checksum Errors"); 4622 4623 /* Packet Transmission Stats */ 4624 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 4625 CTLFLAG_RD, &stats->gotc, 4626 "Good Octets Transmitted"); 4627 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 4628 CTLFLAG_RD, &stats->tpt, 4629 "Total Packets Transmitted"); 4630 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 4631 CTLFLAG_RD, &stats->gptc, 4632 "Good Packets Transmitted"); 4633 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 4634 CTLFLAG_RD, &stats->bptc, 4635 "Broadcast Packets Transmitted"); 4636 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 4637 CTLFLAG_RD, &stats->mptc, 4638 "Multicast Packets Transmitted"); 4639 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 4640 CTLFLAG_RD, &stats->mngptc, 4641 "Management Packets Transmitted"); 4642 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 4643 CTLFLAG_RD, &stats->ptc64, 4644 "64 byte frames transmitted "); 4645 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 4646 CTLFLAG_RD, &stats->ptc127, 4647 "65-127 byte frames transmitted"); 4648 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 4649 CTLFLAG_RD, &stats->ptc255, 4650 "128-255 byte frames transmitted"); 4651 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 4652 CTLFLAG_RD, &stats->ptc511, 4653 "256-511 byte frames transmitted"); 4654 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 4655 CTLFLAG_RD, &stats->ptc1023, 4656 "512-1023 byte frames transmitted"); 4657 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 4658 CTLFLAG_RD, &stats->ptc1522, 4659 "1024-1522 byte frames transmitted"); 4660 } 4661 4662 static void 4663 ixgbe_set_sysctl_value(struct adapter *adapter, const char *name, 4664 const char *description, int *limit, int value) 4665 { 4666 *limit = value; 4667 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), 4668 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 4669 OID_AUTO, name, CTLFLAG_RW, limit, value, description); 4670 } 4671 4672 /* 4673 ** Set flow control using sysctl: 4674 ** Flow control values: 4675 ** 0 - off 4676 ** 1 - rx pause 4677 ** 2 - tx pause 4678 ** 3 - full 4679 */ 4680 static int 4681 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS) 4682 { 4683 int error, fc; 4684 struct adapter *adapter; 4685 4686 adapter = (struct adapter *) arg1; 4687 fc = adapter->fc; 4688 4689 error = sysctl_handle_int(oidp, &fc, 0, req); 4690 if ((error) || (req->newptr == NULL)) 4691 return (error); 4692 4693 /* Don't bother if it's not changed */ 4694 if (adapter->fc == fc) 4695 return (0); 4696 4697 return ixgbe_set_flowcntl(adapter, fc); 4698 } 4699 4700 4701 static int 4702 ixgbe_set_flowcntl(struct adapter *adapter, int fc) 4703 { 4704 4705 switch (fc) { 4706 case ixgbe_fc_rx_pause: 4707 case ixgbe_fc_tx_pause: 4708 case ixgbe_fc_full: 4709 adapter->hw.fc.requested_mode = adapter->fc; 4710 if (adapter->num_queues > 1) 4711 ixgbe_disable_rx_drop(adapter); 4712 break; 4713 case ixgbe_fc_none: 4714 adapter->hw.fc.requested_mode = ixgbe_fc_none; 4715 if (adapter->num_queues > 1) 4716 ixgbe_enable_rx_drop(adapter); 4717 break; 4718 default: 4719 return (EINVAL); 4720 } 4721 adapter->fc = fc; 4722 /* Don't autoneg if forcing a value */ 4723 adapter->hw.fc.disable_fc_autoneg = TRUE; 4724 ixgbe_fc_enable(&adapter->hw); 4725 return (0); 4726 } 4727 4728 /* 4729 ** Control advertised link speed: 4730 ** Flags: 4731 ** 0x1 - advertise 100 Mb 4732 ** 0x2 - advertise 1G 4733 ** 0x4 - advertise 10G 4734 */ 4735 static int 4736 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS) 4737 { 4738 int error, advertise; 4739 struct adapter *adapter; 4740 4741 adapter = (struct adapter *) arg1; 4742 advertise = adapter->advertise; 4743 4744 error = sysctl_handle_int(oidp, &advertise, 0, req); 4745 if ((error) || (req->newptr == NULL)) 4746 return (error); 4747 4748 /* Checks to validate new value */ 4749 if (adapter->advertise == advertise) /* no change */ 4750 return (0); 4751 4752 return ixgbe_set_advertise(adapter, advertise); 4753 } 4754 4755 static int 4756 ixgbe_set_advertise(struct adapter *adapter, int advertise) 4757 { 4758 device_t dev; 4759 struct ixgbe_hw *hw; 4760 ixgbe_link_speed speed; 4761 4762 hw = &adapter->hw; 4763 dev = adapter->dev; 4764 4765 /* No speed changes for backplane media */ 4766 if (hw->phy.media_type == ixgbe_media_type_backplane) 4767 return (ENODEV); 4768 4769 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 4770 (hw->phy.multispeed_fiber))) { 4771 device_printf(dev, 4772 "Advertised speed can only be set on copper or " 4773 "multispeed fiber media types.\n"); 4774 return (EINVAL); 4775 } 4776 4777 if (advertise < 0x1 || advertise > 0x7) { 4778 device_printf(dev, 4779 "Invalid advertised speed; valid modes are 0x1 through 0x7\n"); 4780 return (EINVAL); 4781 } 4782 4783 if ((advertise & 0x1) 4784 && (hw->mac.type != ixgbe_mac_X540) 4785 && (hw->mac.type != ixgbe_mac_X550)) { 4786 device_printf(dev, "Set Advertise: 100Mb on X540/X550 only\n"); 4787 return (EINVAL); 4788 } 4789 4790 /* Set new value and report new advertised mode */ 4791 speed = 0; 4792 if (advertise & 0x1) 4793 speed |= IXGBE_LINK_SPEED_100_FULL; 4794 if (advertise & 0x2) 4795 speed |= IXGBE_LINK_SPEED_1GB_FULL; 4796 if (advertise & 0x4) 4797 speed |= IXGBE_LINK_SPEED_10GB_FULL; 4798 adapter->advertise = advertise; 4799 4800 hw->mac.autotry_restart = TRUE; 4801 hw->mac.ops.setup_link(hw, speed, TRUE); 4802 4803 return (0); 4804 } 4805 4806 /* 4807 * The following two sysctls are for X552/X557-AT devices; 4808 * they deal with the external PHY used in them. 4809 */ 4810 static int 4811 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 4812 { 4813 struct adapter *adapter = (struct adapter *) arg1; 4814 struct ixgbe_hw *hw = &adapter->hw; 4815 u16 reg; 4816 4817 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4818 device_printf(adapter->dev, 4819 "Device has no supported external thermal sensor.\n"); 4820 return (ENODEV); 4821 } 4822 4823 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 4824 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4825 ®)) { 4826 device_printf(adapter->dev, 4827 "Error reading from PHY's current temperature register\n"); 4828 return (EAGAIN); 4829 } 4830 4831 /* Shift temp for output */ 4832 reg = reg >> 8; 4833 4834 return (sysctl_handle_int(oidp, NULL, reg, req)); 4835 } 4836 4837 /* 4838 * Reports whether the current PHY temperature is over 4839 * the overtemp threshold. 4840 * - This is reported directly from the PHY 4841 */ 4842 static int 4843 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 4844 { 4845 struct adapter *adapter = (struct adapter *) arg1; 4846 struct ixgbe_hw *hw = &adapter->hw; 4847 u16 reg; 4848 4849 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4850 device_printf(adapter->dev, 4851 "Device has no supported external thermal sensor.\n"); 4852 return (ENODEV); 4853 } 4854 4855 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 4856 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4857 ®)) { 4858 device_printf(adapter->dev, 4859 "Error reading from PHY's temperature status register\n"); 4860 return (EAGAIN); 4861 } 4862 4863 /* Get occurrence bit */ 4864 reg = !!(reg & 0x4000); 4865 return (sysctl_handle_int(oidp, 0, reg, req)); 4866 } 4867 4868 /* 4869 ** Thermal Shutdown Trigger (internal MAC) 4870 ** - Set this to 1 to cause an overtemp event to occur 4871 */ 4872 static int 4873 ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS) 4874 { 4875 struct adapter *adapter = (struct adapter *) arg1; 4876 struct ixgbe_hw *hw = &adapter->hw; 4877 int error, fire = 0; 4878 4879 error = sysctl_handle_int(oidp, &fire, 0, req); 4880 if ((error) || (req->newptr == NULL)) 4881 return (error); 4882 4883 if (fire) { 4884 u32 reg = IXGBE_READ_REG(hw, IXGBE_EICS); 4885 reg |= IXGBE_EICR_TS; 4886 IXGBE_WRITE_REG(hw, IXGBE_EICS, reg); 4887 } 4888 4889 return (0); 4890 } 4891 4892 /* 4893 ** Manage DMA Coalescing. 4894 ** Control values: 4895 ** 0/1 - off / on (use default value of 1000) 4896 ** 4897 ** Legal timer values are: 4898 ** 50,100,250,500,1000,2000,5000,10000 4899 ** 4900 ** Turning off interrupt moderation will also turn this off. 4901 */ 4902 static int 4903 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 4904 { 4905 struct adapter *adapter = (struct adapter *) arg1; 4906 struct ifnet *ifp = adapter->ifp; 4907 int error; 4908 u32 newval; 4909 4910 newval = adapter->dmac; 4911 error = sysctl_handle_int(oidp, &newval, 0, req); 4912 if ((error) || (req->newptr == NULL)) 4913 return (error); 4914 4915 switch (newval) { 4916 case 0: 4917 /* Disabled */ 4918 adapter->dmac = 0; 4919 break; 4920 case 1: 4921 /* Enable and use default */ 4922 adapter->dmac = 1000; 4923 break; 4924 case 50: 4925 case 100: 4926 case 250: 4927 case 500: 4928 case 1000: 4929 case 2000: 4930 case 5000: 4931 case 10000: 4932 /* Legal values - allow */ 4933 adapter->dmac = newval; 4934 break; 4935 default: 4936 /* Do nothing, illegal value */ 4937 return (EINVAL); 4938 } 4939 4940 /* Re-initialize hardware if it's already running */ 4941 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 4942 ixgbe_init(adapter); 4943 4944 return (0); 4945 } 4946 4947 #ifdef IXGBE_DEBUG 4948 /** 4949 * Sysctl to test power states 4950 * Values: 4951 * 0 - set device to D0 4952 * 3 - set device to D3 4953 * (none) - get current device power state 4954 */ 4955 static int 4956 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 4957 { 4958 struct adapter *adapter = (struct adapter *) arg1; 4959 device_t dev = adapter->dev; 4960 int curr_ps, new_ps, error = 0; 4961 4962 curr_ps = new_ps = pci_get_powerstate(dev); 4963 4964 error = sysctl_handle_int(oidp, &new_ps, 0, req); 4965 if ((error) || (req->newptr == NULL)) 4966 return (error); 4967 4968 if (new_ps == curr_ps) 4969 return (0); 4970 4971 if (new_ps == 3 && curr_ps == 0) 4972 error = DEVICE_SUSPEND(dev); 4973 else if (new_ps == 0 && curr_ps == 3) 4974 error = DEVICE_RESUME(dev); 4975 else 4976 return (EINVAL); 4977 4978 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 4979 4980 return (error); 4981 } 4982 #endif 4983 /* 4984 * Sysctl to enable/disable the WoL capability, if supported by the adapter. 4985 * Values: 4986 * 0 - disabled 4987 * 1 - enabled 4988 */ 4989 static int 4990 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 4991 { 4992 struct adapter *adapter = (struct adapter *) arg1; 4993 struct ixgbe_hw *hw = &adapter->hw; 4994 int new_wol_enabled; 4995 int error = 0; 4996 4997 new_wol_enabled = hw->wol_enabled; 4998 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 4999 if ((error) || (req->newptr == NULL)) 5000 return (error); 5001 new_wol_enabled = !!(new_wol_enabled); 5002 if (new_wol_enabled == hw->wol_enabled) 5003 return (0); 5004 5005 if (new_wol_enabled > 0 && !adapter->wol_support) 5006 return (ENODEV); 5007 else 5008 hw->wol_enabled = new_wol_enabled; 5009 5010 return (0); 5011 } 5012 5013 /* 5014 * Sysctl to enable/disable the Energy Efficient Ethernet capability, 5015 * if supported by the adapter. 5016 * Values: 5017 * 0 - disabled 5018 * 1 - enabled 5019 */ 5020 static int 5021 ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS) 5022 { 5023 struct adapter *adapter = (struct adapter *) arg1; 5024 struct ixgbe_hw *hw = &adapter->hw; 5025 struct ifnet *ifp = adapter->ifp; 5026 int new_eee_enabled, error = 0; 5027 5028 new_eee_enabled = adapter->eee_enabled; 5029 error = sysctl_handle_int(oidp, &new_eee_enabled, 0, req); 5030 if ((error) || (req->newptr == NULL)) 5031 return (error); 5032 new_eee_enabled = !!(new_eee_enabled); 5033 if (new_eee_enabled == adapter->eee_enabled) 5034 return (0); 5035 5036 if (new_eee_enabled > 0 && !hw->mac.ops.setup_eee) 5037 return (ENODEV); 5038 else 5039 adapter->eee_enabled = new_eee_enabled; 5040 5041 /* Re-initialize hardware if it's already running */ 5042 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 5043 ixgbe_init(adapter); 5044 5045 return (0); 5046 } 5047 5048 /* 5049 * Read-only sysctl indicating whether EEE support was negotiated 5050 * on the link. 5051 */ 5052 static int 5053 ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS) 5054 { 5055 struct adapter *adapter = (struct adapter *) arg1; 5056 struct ixgbe_hw *hw = &adapter->hw; 5057 bool status; 5058 5059 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & IXGBE_EEE_STAT_NEG); 5060 5061 return (sysctl_handle_int(oidp, 0, status, req)); 5062 } 5063 5064 /* 5065 * Read-only sysctl indicating whether RX Link is in LPI state. 5066 */ 5067 static int 5068 ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS) 5069 { 5070 struct adapter *adapter = (struct adapter *) arg1; 5071 struct ixgbe_hw *hw = &adapter->hw; 5072 bool status; 5073 5074 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5075 IXGBE_EEE_RX_LPI_STATUS); 5076 5077 return (sysctl_handle_int(oidp, 0, status, req)); 5078 } 5079 5080 /* 5081 * Read-only sysctl indicating whether TX Link is in LPI state. 5082 */ 5083 static int 5084 ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS) 5085 { 5086 struct adapter *adapter = (struct adapter *) arg1; 5087 struct ixgbe_hw *hw = &adapter->hw; 5088 bool status; 5089 5090 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5091 IXGBE_EEE_TX_LPI_STATUS); 5092 5093 return (sysctl_handle_int(oidp, 0, status, req)); 5094 } 5095 5096 /* 5097 * Read-only sysctl indicating TX Link LPI delay 5098 */ 5099 static int 5100 ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS) 5101 { 5102 struct adapter *adapter = (struct adapter *) arg1; 5103 struct ixgbe_hw *hw = &adapter->hw; 5104 u32 reg; 5105 5106 reg = IXGBE_READ_REG(hw, IXGBE_EEE_SU); 5107 5108 return (sysctl_handle_int(oidp, 0, reg >> 26, req)); 5109 } 5110 5111 /* 5112 * Sysctl to enable/disable the types of packets that the 5113 * adapter will wake up on upon receipt. 5114 * WUFC - Wake Up Filter Control 5115 * Flags: 5116 * 0x1 - Link Status Change 5117 * 0x2 - Magic Packet 5118 * 0x4 - Direct Exact 5119 * 0x8 - Directed Multicast 5120 * 0x10 - Broadcast 5121 * 0x20 - ARP/IPv4 Request Packet 5122 * 0x40 - Direct IPv4 Packet 5123 * 0x80 - Direct IPv6 Packet 5124 * 5125 * Setting another flag will cause the sysctl to return an 5126 * error. 5127 */ 5128 static int 5129 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 5130 { 5131 struct adapter *adapter = (struct adapter *) arg1; 5132 int error = 0; 5133 u32 new_wufc; 5134 5135 new_wufc = adapter->wufc; 5136 5137 error = sysctl_handle_int(oidp, &new_wufc, 0, req); 5138 if ((error) || (req->newptr == NULL)) 5139 return (error); 5140 if (new_wufc == adapter->wufc) 5141 return (0); 5142 5143 if (new_wufc & 0xffffff00) 5144 return (EINVAL); 5145 else { 5146 new_wufc &= 0xff; 5147 new_wufc |= (0xffffff & adapter->wufc); 5148 adapter->wufc = new_wufc; 5149 } 5150 5151 return (0); 5152 } 5153 5154 #ifdef IXGBE_DEBUG 5155 static int 5156 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 5157 { 5158 struct adapter *adapter = (struct adapter *)arg1; 5159 struct ixgbe_hw *hw = &adapter->hw; 5160 device_t dev = adapter->dev; 5161 int error = 0, reta_size; 5162 struct sbuf *buf; 5163 u32 reg; 5164 5165 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5166 if (!buf) { 5167 device_printf(dev, "Could not allocate sbuf for output.\n"); 5168 return (ENOMEM); 5169 } 5170 5171 // TODO: use sbufs to make a string to print out 5172 /* Set multiplier for RETA setup and table size based on MAC */ 5173 switch (adapter->hw.mac.type) { 5174 case ixgbe_mac_X550: 5175 case ixgbe_mac_X550EM_x: 5176 reta_size = 128; 5177 break; 5178 default: 5179 reta_size = 32; 5180 break; 5181 } 5182 5183 /* Print out the redirection table */ 5184 sbuf_cat(buf, "\n"); 5185 for (int i = 0; i < reta_size; i++) { 5186 if (i < 32) { 5187 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5188 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5189 } else { 5190 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5191 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5192 } 5193 } 5194 5195 // TODO: print more config 5196 5197 error = sbuf_finish(buf); 5198 if (error) 5199 device_printf(dev, "Error finishing sbuf: %d\n", error); 5200 5201 sbuf_delete(buf); 5202 return (0); 5203 } 5204 #endif /* IXGBE_DEBUG */ 5205 5206 /* 5207 ** Enable the hardware to drop packets when the buffer is 5208 ** full. This is useful when multiqueue,so that no single 5209 ** queue being full stalls the entire RX engine. We only 5210 ** enable this when Multiqueue AND when Flow Control is 5211 ** disabled. 5212 */ 5213 static void 5214 ixgbe_enable_rx_drop(struct adapter *adapter) 5215 { 5216 struct ixgbe_hw *hw = &adapter->hw; 5217 5218 for (int i = 0; i < adapter->num_queues; i++) { 5219 struct rx_ring *rxr = &adapter->rx_rings[i]; 5220 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5221 srrctl |= IXGBE_SRRCTL_DROP_EN; 5222 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5223 } 5224 #ifdef PCI_IOV 5225 /* enable drop for each vf */ 5226 for (int i = 0; i < adapter->num_vfs; i++) { 5227 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5228 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5229 IXGBE_QDE_ENABLE)); 5230 } 5231 #endif 5232 } 5233 5234 static void 5235 ixgbe_disable_rx_drop(struct adapter *adapter) 5236 { 5237 struct ixgbe_hw *hw = &adapter->hw; 5238 5239 for (int i = 0; i < adapter->num_queues; i++) { 5240 struct rx_ring *rxr = &adapter->rx_rings[i]; 5241 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5242 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5243 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5244 } 5245 #ifdef PCI_IOV 5246 /* disable drop for each vf */ 5247 for (int i = 0; i < adapter->num_vfs; i++) { 5248 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5249 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5250 } 5251 #endif 5252 } 5253 5254 static void 5255 ixgbe_rearm_queues(struct adapter *adapter, u64 queues) 5256 { 5257 u32 mask; 5258 5259 switch (adapter->hw.mac.type) { 5260 case ixgbe_mac_82598EB: 5261 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 5262 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 5263 break; 5264 case ixgbe_mac_82599EB: 5265 case ixgbe_mac_X540: 5266 case ixgbe_mac_X550: 5267 case ixgbe_mac_X550EM_x: 5268 mask = (queues & 0xFFFFFFFF); 5269 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); 5270 mask = (queues >> 32); 5271 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask); 5272 break; 5273 default: 5274 break; 5275 } 5276 } 5277 5278 #ifdef PCI_IOV 5279 5280 /* 5281 ** Support functions for SRIOV/VF management 5282 */ 5283 5284 static void 5285 ixgbe_ping_all_vfs(struct adapter *adapter) 5286 { 5287 struct ixgbe_vf *vf; 5288 5289 for (int i = 0; i < adapter->num_vfs; i++) { 5290 vf = &adapter->vfs[i]; 5291 if (vf->flags & IXGBE_VF_ACTIVE) 5292 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5293 } 5294 } 5295 5296 5297 static void 5298 ixgbe_vf_set_default_vlan(struct adapter *adapter, struct ixgbe_vf *vf, 5299 uint16_t tag) 5300 { 5301 struct ixgbe_hw *hw; 5302 uint32_t vmolr, vmvir; 5303 5304 hw = &adapter->hw; 5305 5306 vf->vlan_tag = tag; 5307 5308 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf->pool)); 5309 5310 /* Do not receive packets that pass inexact filters. */ 5311 vmolr &= ~(IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_ROPE); 5312 5313 /* Disable Multicast Promicuous Mode. */ 5314 vmolr &= ~IXGBE_VMOLR_MPE; 5315 5316 /* Accept broadcasts. */ 5317 vmolr |= IXGBE_VMOLR_BAM; 5318 5319 if (tag == 0) { 5320 /* Accept non-vlan tagged traffic. */ 5321 //vmolr |= IXGBE_VMOLR_AUPE; 5322 5323 /* Allow VM to tag outgoing traffic; no default tag. */ 5324 vmvir = 0; 5325 } else { 5326 /* Require vlan-tagged traffic. */ 5327 vmolr &= ~IXGBE_VMOLR_AUPE; 5328 5329 /* Tag all traffic with provided vlan tag. */ 5330 vmvir = (tag | IXGBE_VMVIR_VLANA_DEFAULT); 5331 } 5332 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr); 5333 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir); 5334 } 5335 5336 5337 static boolean_t 5338 ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf) 5339 { 5340 5341 /* 5342 * Frame size compatibility between PF and VF is only a problem on 5343 * 82599-based cards. X540 and later support any combination of jumbo 5344 * frames on PFs and VFs. 5345 */ 5346 if (adapter->hw.mac.type != ixgbe_mac_82599EB) 5347 return (TRUE); 5348 5349 switch (vf->api_ver) { 5350 case IXGBE_API_VER_1_0: 5351 case IXGBE_API_VER_UNKNOWN: 5352 /* 5353 * On legacy (1.0 and older) VF versions, we don't support jumbo 5354 * frames on either the PF or the VF. 5355 */ 5356 if (adapter->max_frame_size > ETHER_MAX_LEN || 5357 vf->max_frame_size > ETHER_MAX_LEN) 5358 return (FALSE); 5359 5360 return (TRUE); 5361 5362 break; 5363 case IXGBE_API_VER_1_1: 5364 default: 5365 /* 5366 * 1.1 or later VF versions always work if they aren't using 5367 * jumbo frames. 5368 */ 5369 if (vf->max_frame_size <= ETHER_MAX_LEN) 5370 return (TRUE); 5371 5372 /* 5373 * Jumbo frames only work with VFs if the PF is also using jumbo 5374 * frames. 5375 */ 5376 if (adapter->max_frame_size <= ETHER_MAX_LEN) 5377 return (TRUE); 5378 5379 return (FALSE); 5380 5381 } 5382 } 5383 5384 5385 static void 5386 ixgbe_process_vf_reset(struct adapter *adapter, struct ixgbe_vf *vf) 5387 { 5388 ixgbe_vf_set_default_vlan(adapter, vf, vf->default_vlan); 5389 5390 // XXX clear multicast addresses 5391 5392 ixgbe_clear_rar(&adapter->hw, vf->rar_index); 5393 5394 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5395 } 5396 5397 5398 static void 5399 ixgbe_vf_enable_transmit(struct adapter *adapter, struct ixgbe_vf *vf) 5400 { 5401 struct ixgbe_hw *hw; 5402 uint32_t vf_index, vfte; 5403 5404 hw = &adapter->hw; 5405 5406 vf_index = IXGBE_VF_INDEX(vf->pool); 5407 vfte = IXGBE_READ_REG(hw, IXGBE_VFTE(vf_index)); 5408 vfte |= IXGBE_VF_BIT(vf->pool); 5409 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte); 5410 } 5411 5412 5413 static void 5414 ixgbe_vf_enable_receive(struct adapter *adapter, struct ixgbe_vf *vf) 5415 { 5416 struct ixgbe_hw *hw; 5417 uint32_t vf_index, vfre; 5418 5419 hw = &adapter->hw; 5420 5421 vf_index = IXGBE_VF_INDEX(vf->pool); 5422 vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(vf_index)); 5423 if (ixgbe_vf_frame_size_compatible(adapter, vf)) 5424 vfre |= IXGBE_VF_BIT(vf->pool); 5425 else 5426 vfre &= ~IXGBE_VF_BIT(vf->pool); 5427 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre); 5428 } 5429 5430 5431 static void 5432 ixgbe_vf_reset_msg(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5433 { 5434 struct ixgbe_hw *hw; 5435 uint32_t ack; 5436 uint32_t resp[IXGBE_VF_PERMADDR_MSG_LEN]; 5437 5438 hw = &adapter->hw; 5439 5440 ixgbe_process_vf_reset(adapter, vf); 5441 5442 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5443 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5444 vf->ether_addr, vf->pool, TRUE); 5445 ack = IXGBE_VT_MSGTYPE_ACK; 5446 } else 5447 ack = IXGBE_VT_MSGTYPE_NACK; 5448 5449 ixgbe_vf_enable_transmit(adapter, vf); 5450 ixgbe_vf_enable_receive(adapter, vf); 5451 5452 vf->flags |= IXGBE_VF_CTS; 5453 5454 resp[0] = IXGBE_VF_RESET | ack | IXGBE_VT_MSGTYPE_CTS; 5455 bcopy(vf->ether_addr, &resp[1], ETHER_ADDR_LEN); 5456 resp[3] = hw->mac.mc_filter_type; 5457 ixgbe_write_mbx(hw, resp, IXGBE_VF_PERMADDR_MSG_LEN, vf->pool); 5458 } 5459 5460 5461 static void 5462 ixgbe_vf_set_mac(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5463 { 5464 uint8_t *mac; 5465 5466 mac = (uint8_t*)&msg[1]; 5467 5468 /* Check that the VF has permission to change the MAC address. */ 5469 if (!(vf->flags & IXGBE_VF_CAP_MAC) && ixgbe_vf_mac_changed(vf, mac)) { 5470 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5471 return; 5472 } 5473 5474 if (ixgbe_validate_mac_addr(mac) != 0) { 5475 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5476 return; 5477 } 5478 5479 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5480 5481 ixgbe_set_rar(&adapter->hw, vf->rar_index, vf->ether_addr, 5482 vf->pool, TRUE); 5483 5484 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5485 } 5486 5487 5488 /* 5489 ** VF multicast addresses are set by using the appropriate bit in 5490 ** 1 of 128 32 bit addresses (4096 possible). 5491 */ 5492 static void 5493 ixgbe_vf_set_mc_addr(struct adapter *adapter, struct ixgbe_vf *vf, u32 *msg) 5494 { 5495 u16 *list = (u16*)&msg[1]; 5496 int entries; 5497 u32 vmolr, vec_bit, vec_reg, mta_reg; 5498 5499 entries = (msg[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; 5500 entries = min(entries, IXGBE_MAX_VF_MC); 5501 5502 vmolr = IXGBE_READ_REG(&adapter->hw, IXGBE_VMOLR(vf->pool)); 5503 5504 vf->num_mc_hashes = entries; 5505 5506 /* Set the appropriate MTA bit */ 5507 for (int i = 0; i < entries; i++) { 5508 vf->mc_hash[i] = list[i]; 5509 vec_reg = (vf->mc_hash[i] >> 5) & 0x7F; 5510 vec_bit = vf->mc_hash[i] & 0x1F; 5511 mta_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_MTA(vec_reg)); 5512 mta_reg |= (1 << vec_bit); 5513 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MTA(vec_reg), mta_reg); 5514 } 5515 5516 vmolr |= IXGBE_VMOLR_ROMPE; 5517 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(vf->pool), vmolr); 5518 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5519 return; 5520 } 5521 5522 5523 static void 5524 ixgbe_vf_set_vlan(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5525 { 5526 struct ixgbe_hw *hw; 5527 int enable; 5528 uint16_t tag; 5529 5530 hw = &adapter->hw; 5531 enable = IXGBE_VT_MSGINFO(msg[0]); 5532 tag = msg[1] & IXGBE_VLVF_VLANID_MASK; 5533 5534 if (!(vf->flags & IXGBE_VF_CAP_VLAN)) { 5535 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5536 return; 5537 } 5538 5539 /* It is illegal to enable vlan tag 0. */ 5540 if (tag == 0 && enable != 0){ 5541 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5542 return; 5543 } 5544 5545 ixgbe_set_vfta(hw, tag, vf->pool, enable); 5546 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5547 } 5548 5549 5550 static void 5551 ixgbe_vf_set_lpe(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5552 { 5553 struct ixgbe_hw *hw; 5554 uint32_t vf_max_size, pf_max_size, mhadd; 5555 5556 hw = &adapter->hw; 5557 vf_max_size = msg[1]; 5558 5559 if (vf_max_size < ETHER_CRC_LEN) { 5560 /* We intentionally ACK invalid LPE requests. */ 5561 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5562 return; 5563 } 5564 5565 vf_max_size -= ETHER_CRC_LEN; 5566 5567 if (vf_max_size > IXGBE_MAX_FRAME_SIZE) { 5568 /* We intentionally ACK invalid LPE requests. */ 5569 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5570 return; 5571 } 5572 5573 vf->max_frame_size = vf_max_size; 5574 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5575 5576 /* 5577 * We might have to disable reception to this VF if the frame size is 5578 * not compatible with the config on the PF. 5579 */ 5580 ixgbe_vf_enable_receive(adapter, vf); 5581 5582 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 5583 pf_max_size = (mhadd & IXGBE_MHADD_MFS_MASK) >> IXGBE_MHADD_MFS_SHIFT; 5584 5585 if (pf_max_size < adapter->max_frame_size) { 5586 mhadd &= ~IXGBE_MHADD_MFS_MASK; 5587 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 5588 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 5589 } 5590 5591 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5592 } 5593 5594 5595 static void 5596 ixgbe_vf_set_macvlan(struct adapter *adapter, struct ixgbe_vf *vf, 5597 uint32_t *msg) 5598 { 5599 //XXX implement this 5600 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5601 } 5602 5603 5604 static void 5605 ixgbe_vf_api_negotiate(struct adapter *adapter, struct ixgbe_vf *vf, 5606 uint32_t *msg) 5607 { 5608 5609 switch (msg[1]) { 5610 case IXGBE_API_VER_1_0: 5611 case IXGBE_API_VER_1_1: 5612 vf->api_ver = msg[1]; 5613 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5614 break; 5615 default: 5616 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5617 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5618 break; 5619 } 5620 } 5621 5622 5623 static void 5624 ixgbe_vf_get_queues(struct adapter *adapter, struct ixgbe_vf *vf, 5625 uint32_t *msg) 5626 { 5627 struct ixgbe_hw *hw; 5628 uint32_t resp[IXGBE_VF_GET_QUEUES_RESP_LEN]; 5629 int num_queues; 5630 5631 hw = &adapter->hw; 5632 5633 /* GET_QUEUES is not supported on pre-1.1 APIs. */ 5634 switch (msg[0]) { 5635 case IXGBE_API_VER_1_0: 5636 case IXGBE_API_VER_UNKNOWN: 5637 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5638 return; 5639 } 5640 5641 resp[0] = IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK | 5642 IXGBE_VT_MSGTYPE_CTS; 5643 5644 num_queues = ixgbe_vf_queues(ixgbe_get_iov_mode(adapter)); 5645 resp[IXGBE_VF_TX_QUEUES] = num_queues; 5646 resp[IXGBE_VF_RX_QUEUES] = num_queues; 5647 resp[IXGBE_VF_TRANS_VLAN] = (vf->default_vlan != 0); 5648 resp[IXGBE_VF_DEF_QUEUE] = 0; 5649 5650 ixgbe_write_mbx(hw, resp, IXGBE_VF_GET_QUEUES_RESP_LEN, vf->pool); 5651 } 5652 5653 5654 static void 5655 ixgbe_process_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf) 5656 { 5657 struct ixgbe_hw *hw; 5658 uint32_t msg[IXGBE_VFMAILBOX_SIZE]; 5659 int error; 5660 5661 hw = &adapter->hw; 5662 5663 error = ixgbe_read_mbx(hw, msg, IXGBE_VFMAILBOX_SIZE, vf->pool); 5664 5665 if (error != 0) 5666 return; 5667 5668 CTR3(KTR_MALLOC, "%s: received msg %x from %d", 5669 adapter->ifp->if_xname, msg[0], vf->pool); 5670 if (msg[0] == IXGBE_VF_RESET) { 5671 ixgbe_vf_reset_msg(adapter, vf, msg); 5672 return; 5673 } 5674 5675 if (!(vf->flags & IXGBE_VF_CTS)) { 5676 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5677 return; 5678 } 5679 5680 switch (msg[0] & IXGBE_VT_MSG_MASK) { 5681 case IXGBE_VF_SET_MAC_ADDR: 5682 ixgbe_vf_set_mac(adapter, vf, msg); 5683 break; 5684 case IXGBE_VF_SET_MULTICAST: 5685 ixgbe_vf_set_mc_addr(adapter, vf, msg); 5686 break; 5687 case IXGBE_VF_SET_VLAN: 5688 ixgbe_vf_set_vlan(adapter, vf, msg); 5689 break; 5690 case IXGBE_VF_SET_LPE: 5691 ixgbe_vf_set_lpe(adapter, vf, msg); 5692 break; 5693 case IXGBE_VF_SET_MACVLAN: 5694 ixgbe_vf_set_macvlan(adapter, vf, msg); 5695 break; 5696 case IXGBE_VF_API_NEGOTIATE: 5697 ixgbe_vf_api_negotiate(adapter, vf, msg); 5698 break; 5699 case IXGBE_VF_GET_QUEUES: 5700 ixgbe_vf_get_queues(adapter, vf, msg); 5701 break; 5702 default: 5703 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5704 } 5705 } 5706 5707 5708 /* 5709 * Tasklet for handling VF -> PF mailbox messages. 5710 */ 5711 static void 5712 ixgbe_handle_mbx(void *context, int pending) 5713 { 5714 struct adapter *adapter; 5715 struct ixgbe_hw *hw; 5716 struct ixgbe_vf *vf; 5717 int i; 5718 5719 adapter = context; 5720 hw = &adapter->hw; 5721 5722 IXGBE_CORE_LOCK(adapter); 5723 for (i = 0; i < adapter->num_vfs; i++) { 5724 vf = &adapter->vfs[i]; 5725 5726 if (vf->flags & IXGBE_VF_ACTIVE) { 5727 if (ixgbe_check_for_rst(hw, vf->pool) == 0) 5728 ixgbe_process_vf_reset(adapter, vf); 5729 5730 if (ixgbe_check_for_msg(hw, vf->pool) == 0) 5731 ixgbe_process_vf_msg(adapter, vf); 5732 5733 if (ixgbe_check_for_ack(hw, vf->pool) == 0) 5734 ixgbe_process_vf_ack(adapter, vf); 5735 } 5736 } 5737 IXGBE_CORE_UNLOCK(adapter); 5738 } 5739 5740 5741 static int 5742 ixgbe_init_iov(device_t dev, u16 num_vfs, const nvlist_t *config) 5743 { 5744 struct adapter *adapter; 5745 enum ixgbe_iov_mode mode; 5746 5747 adapter = device_get_softc(dev); 5748 adapter->num_vfs = num_vfs; 5749 mode = ixgbe_get_iov_mode(adapter); 5750 5751 if (num_vfs > ixgbe_max_vfs(mode)) { 5752 adapter->num_vfs = 0; 5753 return (ENOSPC); 5754 } 5755 5756 IXGBE_CORE_LOCK(adapter); 5757 5758 adapter->vfs = malloc(sizeof(*adapter->vfs) * num_vfs, M_IXGBE, 5759 M_NOWAIT | M_ZERO); 5760 5761 if (adapter->vfs == NULL) { 5762 adapter->num_vfs = 0; 5763 IXGBE_CORE_UNLOCK(adapter); 5764 return (ENOMEM); 5765 } 5766 5767 ixgbe_init_locked(adapter); 5768 5769 IXGBE_CORE_UNLOCK(adapter); 5770 5771 return (0); 5772 } 5773 5774 5775 static void 5776 ixgbe_uninit_iov(device_t dev) 5777 { 5778 struct ixgbe_hw *hw; 5779 struct adapter *adapter; 5780 uint32_t pf_reg, vf_reg; 5781 5782 adapter = device_get_softc(dev); 5783 hw = &adapter->hw; 5784 5785 IXGBE_CORE_LOCK(adapter); 5786 5787 /* Enable rx/tx for the PF and disable it for all VFs. */ 5788 pf_reg = IXGBE_VF_INDEX(adapter->pool); 5789 IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), 5790 IXGBE_VF_BIT(adapter->pool)); 5791 IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), 5792 IXGBE_VF_BIT(adapter->pool)); 5793 5794 if (pf_reg == 0) 5795 vf_reg = 1; 5796 else 5797 vf_reg = 0; 5798 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 0); 5799 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 0); 5800 5801 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0); 5802 5803 free(adapter->vfs, M_IXGBE); 5804 adapter->vfs = NULL; 5805 adapter->num_vfs = 0; 5806 5807 IXGBE_CORE_UNLOCK(adapter); 5808 } 5809 5810 5811 static void 5812 ixgbe_initialize_iov(struct adapter *adapter) 5813 { 5814 struct ixgbe_hw *hw = &adapter->hw; 5815 uint32_t mrqc, mtqc, vt_ctl, vf_reg, gcr_ext, gpie; 5816 enum ixgbe_iov_mode mode; 5817 int i; 5818 5819 mode = ixgbe_get_iov_mode(adapter); 5820 if (mode == IXGBE_NO_VM) 5821 return; 5822 5823 IXGBE_CORE_LOCK_ASSERT(adapter); 5824 5825 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 5826 mrqc &= ~IXGBE_MRQC_MRQE_MASK; 5827 5828 switch (mode) { 5829 case IXGBE_64_VM: 5830 mrqc |= IXGBE_MRQC_VMDQRSS64EN; 5831 break; 5832 case IXGBE_32_VM: 5833 mrqc |= IXGBE_MRQC_VMDQRSS32EN; 5834 break; 5835 default: 5836 panic("Unexpected SR-IOV mode %d", mode); 5837 } 5838 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 5839 5840 mtqc = IXGBE_MTQC_VT_ENA; 5841 switch (mode) { 5842 case IXGBE_64_VM: 5843 mtqc |= IXGBE_MTQC_64VF; 5844 break; 5845 case IXGBE_32_VM: 5846 mtqc |= IXGBE_MTQC_32VF; 5847 break; 5848 default: 5849 panic("Unexpected SR-IOV mode %d", mode); 5850 } 5851 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); 5852 5853 5854 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); 5855 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN; 5856 gcr_ext &= ~IXGBE_GCR_EXT_VT_MODE_MASK; 5857 switch (mode) { 5858 case IXGBE_64_VM: 5859 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64; 5860 break; 5861 case IXGBE_32_VM: 5862 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_32; 5863 break; 5864 default: 5865 panic("Unexpected SR-IOV mode %d", mode); 5866 } 5867 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); 5868 5869 5870 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 5871 gcr_ext &= ~IXGBE_GPIE_VTMODE_MASK; 5872 switch (mode) { 5873 case IXGBE_64_VM: 5874 gpie |= IXGBE_GPIE_VTMODE_64; 5875 break; 5876 case IXGBE_32_VM: 5877 gpie |= IXGBE_GPIE_VTMODE_32; 5878 break; 5879 default: 5880 panic("Unexpected SR-IOV mode %d", mode); 5881 } 5882 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 5883 5884 /* Enable rx/tx for the PF. */ 5885 vf_reg = IXGBE_VF_INDEX(adapter->pool); 5886 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 5887 IXGBE_VF_BIT(adapter->pool)); 5888 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 5889 IXGBE_VF_BIT(adapter->pool)); 5890 5891 /* Allow VM-to-VM communication. */ 5892 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); 5893 5894 vt_ctl = IXGBE_VT_CTL_VT_ENABLE | IXGBE_VT_CTL_REPLEN; 5895 vt_ctl |= (adapter->pool << IXGBE_VT_CTL_POOL_SHIFT); 5896 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl); 5897 5898 for (i = 0; i < adapter->num_vfs; i++) 5899 ixgbe_init_vf(adapter, &adapter->vfs[i]); 5900 } 5901 5902 5903 /* 5904 ** Check the max frame setting of all active VF's 5905 */ 5906 static void 5907 ixgbe_recalculate_max_frame(struct adapter *adapter) 5908 { 5909 struct ixgbe_vf *vf; 5910 5911 IXGBE_CORE_LOCK_ASSERT(adapter); 5912 5913 for (int i = 0; i < adapter->num_vfs; i++) { 5914 vf = &adapter->vfs[i]; 5915 if (vf->flags & IXGBE_VF_ACTIVE) 5916 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5917 } 5918 } 5919 5920 5921 static void 5922 ixgbe_init_vf(struct adapter *adapter, struct ixgbe_vf *vf) 5923 { 5924 struct ixgbe_hw *hw; 5925 uint32_t vf_index, pfmbimr; 5926 5927 IXGBE_CORE_LOCK_ASSERT(adapter); 5928 5929 hw = &adapter->hw; 5930 5931 if (!(vf->flags & IXGBE_VF_ACTIVE)) 5932 return; 5933 5934 vf_index = IXGBE_VF_INDEX(vf->pool); 5935 pfmbimr = IXGBE_READ_REG(hw, IXGBE_PFMBIMR(vf_index)); 5936 pfmbimr |= IXGBE_VF_BIT(vf->pool); 5937 IXGBE_WRITE_REG(hw, IXGBE_PFMBIMR(vf_index), pfmbimr); 5938 5939 ixgbe_vf_set_default_vlan(adapter, vf, vf->vlan_tag); 5940 5941 // XXX multicast addresses 5942 5943 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5944 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5945 vf->ether_addr, vf->pool, TRUE); 5946 } 5947 5948 ixgbe_vf_enable_transmit(adapter, vf); 5949 ixgbe_vf_enable_receive(adapter, vf); 5950 5951 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5952 } 5953 5954 static int 5955 ixgbe_add_vf(device_t dev, u16 vfnum, const nvlist_t *config) 5956 { 5957 struct adapter *adapter; 5958 struct ixgbe_vf *vf; 5959 const void *mac; 5960 5961 adapter = device_get_softc(dev); 5962 5963 KASSERT(vfnum < adapter->num_vfs, ("VF index %d is out of range %d", 5964 vfnum, adapter->num_vfs)); 5965 5966 IXGBE_CORE_LOCK(adapter); 5967 vf = &adapter->vfs[vfnum]; 5968 vf->pool= vfnum; 5969 5970 /* RAR[0] is used by the PF so use vfnum + 1 for VF RAR. */ 5971 vf->rar_index = vfnum + 1; 5972 vf->default_vlan = 0; 5973 vf->max_frame_size = ETHER_MAX_LEN; 5974 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5975 5976 if (nvlist_exists_binary(config, "mac-addr")) { 5977 mac = nvlist_get_binary(config, "mac-addr", NULL); 5978 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5979 if (nvlist_get_bool(config, "allow-set-mac")) 5980 vf->flags |= IXGBE_VF_CAP_MAC; 5981 } else 5982 /* 5983 * If the administrator has not specified a MAC address then 5984 * we must allow the VF to choose one. 5985 */ 5986 vf->flags |= IXGBE_VF_CAP_MAC; 5987 5988 vf->flags = IXGBE_VF_ACTIVE; 5989 5990 ixgbe_init_vf(adapter, vf); 5991 IXGBE_CORE_UNLOCK(adapter); 5992 5993 return (0); 5994 } 5995 #endif /* PCI_IOV */ 5996 5997