1 /***************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *****************************************************************************/ 33 34 #include "ixgbe.h" 35 36 #ifdef IXGBE_FDIR 37 38 void 39 ixgbe_init_fdir(struct ixgbe_softc *sc) 40 { 41 u32 hdrm = 32 << fdir_pballoc; 42 43 if (!(sc->feat_en & IXGBE_FEATURE_FDIR)) 44 return; 45 46 sc->hw.mac.ops.setup_rxpba(&sc->hw, 0, hdrm, 47 PBA_STRATEGY_EQUAL); 48 ixgbe_init_fdir_signature_82599(&sc->hw, fdir_pballoc); 49 } /* ixgbe_init_fdir */ 50 51 void 52 ixgbe_reinit_fdir(void *context) 53 { 54 if_ctx_t ctx = context; 55 struct ixgbe_softc *sc = iflib_get_softc(ctx); 56 57 if (!(sc->feat_en & IXGBE_FEATURE_FDIR)) 58 return; 59 if (sc->fdir_reinit != 1) /* Shouldn't happen */ 60 return; 61 ixgbe_reinit_fdir_tables_82599(&sc->hw); 62 sc->fdir_reinit = 0; 63 /* re-enable flow director interrupts */ 64 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 65 } /* ixgbe_reinit_fdir */ 66 67 /************************************************************************ 68 * ixgbe_atr 69 * 70 * Parse packet headers so that Flow Director can make 71 * a hashed filter table entry allowing traffic flows 72 * to be identified and kept on the same cpu. This 73 * would be a performance hit, but we only do it at 74 * IXGBE_FDIR_RATE of packets. 75 ************************************************************************/ 76 void 77 ixgbe_atr(struct tx_ring *txr, struct mbuf *mp) 78 { 79 struct ixgbe_softc *sc = txr->sc; 80 struct ix_queue *que; 81 struct ip *ip; 82 struct tcphdr *th; 83 struct udphdr *uh; 84 struct ether_vlan_header *eh; 85 union ixgbe_atr_hash_dword input = {.dword = 0}; 86 union ixgbe_atr_hash_dword common = {.dword = 0}; 87 int ehdrlen, ip_hlen; 88 u16 etype; 89 90 eh = mtod(mp, struct ether_vlan_header *); 91 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 92 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 93 etype = eh->evl_proto; 94 } else { 95 ehdrlen = ETHER_HDR_LEN; 96 etype = eh->evl_encap_proto; 97 } 98 99 /* Only handling IPv4 */ 100 if (etype != htons(ETHERTYPE_IP)) 101 return; 102 103 ip = (struct ip *)(mp->m_data + ehdrlen); 104 ip_hlen = ip->ip_hl << 2; 105 106 /* check if we're UDP or TCP */ 107 switch (ip->ip_p) { 108 case IPPROTO_TCP: 109 th = (struct tcphdr *)((caddr_t)ip + ip_hlen); 110 /* src and dst are inverted */ 111 common.port.dst ^= th->th_sport; 112 common.port.src ^= th->th_dport; 113 input.formatted.flow_type ^= IXGBE_ATR_FLOW_TYPE_TCPV4; 114 break; 115 case IPPROTO_UDP: 116 uh = (struct udphdr *)((caddr_t)ip + ip_hlen); 117 /* src and dst are inverted */ 118 common.port.dst ^= uh->uh_sport; 119 common.port.src ^= uh->uh_dport; 120 input.formatted.flow_type ^= IXGBE_ATR_FLOW_TYPE_UDPV4; 121 break; 122 default: 123 return; 124 } 125 126 input.formatted.vlan_id = htobe16(mp->m_pkthdr.ether_vtag); 127 if (mp->m_pkthdr.ether_vtag) 128 common.flex_bytes ^= htons(ETHERTYPE_VLAN); 129 else 130 common.flex_bytes ^= etype; 131 common.ip ^= ip->ip_src.s_addr ^ ip->ip_dst.s_addr; 132 133 que = &sc->queues[txr->me]; 134 /* 135 * This assumes the Rx queue and Tx 136 * queue are bound to the same CPU 137 */ 138 ixgbe_fdir_add_signature_filter_82599(&sc->hw, 139 input, common, que->msix); 140 } /* ixgbe_atr */ 141 142 #else 143 144 /* TASK_INIT needs this function defined regardless if it's enabled */ 145 void 146 ixgbe_reinit_fdir(void *context) 147 { 148 UNREFERENCED_PARAMETER(context); 149 } /* ixgbe_reinit_fdir */ 150 151 void 152 ixgbe_atr(struct tx_ring *txr, struct mbuf *mp) 153 { 154 UNREFERENCED_2PARAMETER(txr, mp); 155 } /* ixgbe_atr */ 156 157 #endif 158