1*2ad0f7e9STom Jones /*-
2*2ad0f7e9STom Jones * SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) AND ISC
3*2ad0f7e9STom Jones */
4*2ad0f7e9STom Jones
5*2ad0f7e9STom Jones /* $OpenBSD: if_iwxvar.h,v 1.41 2023/03/06 11:53:24 stsp Exp $ */
6*2ad0f7e9STom Jones
7*2ad0f7e9STom Jones /*
8*2ad0f7e9STom Jones * Copyright (c) 2014 genua mbh <info@genua.de>
9*2ad0f7e9STom Jones * Copyright (c) 2014 Fixup Software Ltd.
10*2ad0f7e9STom Jones *
11*2ad0f7e9STom Jones * Permission to use, copy, modify, and distribute this software for any
12*2ad0f7e9STom Jones * purpose with or without fee is hereby granted, provided that the above
13*2ad0f7e9STom Jones * copyright notice and this permission notice appear in all copies.
14*2ad0f7e9STom Jones *
15*2ad0f7e9STom Jones * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16*2ad0f7e9STom Jones * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17*2ad0f7e9STom Jones * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18*2ad0f7e9STom Jones * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19*2ad0f7e9STom Jones * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20*2ad0f7e9STom Jones * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21*2ad0f7e9STom Jones * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22*2ad0f7e9STom Jones */
23*2ad0f7e9STom Jones
24*2ad0f7e9STom Jones /*-
25*2ad0f7e9STom Jones * Based on BSD-licensed source modules in the Linux iwlwifi driver,
26*2ad0f7e9STom Jones * which were used as the reference documentation for this implementation.
27*2ad0f7e9STom Jones *
28*2ad0f7e9STom Jones ******************************************************************************
29*2ad0f7e9STom Jones *
30*2ad0f7e9STom Jones * This file is provided under a dual BSD/GPLv2 license. When using or
31*2ad0f7e9STom Jones * redistributing this file, you may do so under either license.
32*2ad0f7e9STom Jones *
33*2ad0f7e9STom Jones * GPL LICENSE SUMMARY
34*2ad0f7e9STom Jones *
35*2ad0f7e9STom Jones * Copyright(c) 2017 Intel Deutschland GmbH
36*2ad0f7e9STom Jones * Copyright(c) 2018 - 2019 Intel Corporation
37*2ad0f7e9STom Jones *
38*2ad0f7e9STom Jones * This program is free software; you can redistribute it and/or modify
39*2ad0f7e9STom Jones * it under the terms of version 2 of the GNU General Public License as
40*2ad0f7e9STom Jones * published by the Free Software Foundation.
41*2ad0f7e9STom Jones *
42*2ad0f7e9STom Jones * This program is distributed in the hope that it will be useful, but
43*2ad0f7e9STom Jones * WITHOUT ANY WARRANTY; without even the implied warranty of
44*2ad0f7e9STom Jones * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
45*2ad0f7e9STom Jones * General Public License for more details.
46*2ad0f7e9STom Jones *
47*2ad0f7e9STom Jones * BSD LICENSE
48*2ad0f7e9STom Jones *
49*2ad0f7e9STom Jones * Copyright(c) 2017 Intel Deutschland GmbH
50*2ad0f7e9STom Jones * Copyright(c) 2018 - 2019 Intel Corporation
51*2ad0f7e9STom Jones * All rights reserved.
52*2ad0f7e9STom Jones *
53*2ad0f7e9STom Jones * Redistribution and use in source and binary forms, with or without
54*2ad0f7e9STom Jones * modification, are permitted provided that the following conditions
55*2ad0f7e9STom Jones * are met:
56*2ad0f7e9STom Jones *
57*2ad0f7e9STom Jones * * Redistributions of source code must retain the above copyright
58*2ad0f7e9STom Jones * notice, this list of conditions and the following disclaimer.
59*2ad0f7e9STom Jones * * Redistributions in binary form must reproduce the above copyright
60*2ad0f7e9STom Jones * notice, this list of conditions and the following disclaimer in
61*2ad0f7e9STom Jones * the documentation and/or other materials provided with the
62*2ad0f7e9STom Jones * distribution.
63*2ad0f7e9STom Jones * * Neither the name Intel Corporation nor the names of its
64*2ad0f7e9STom Jones * contributors may be used to endorse or promote products derived
65*2ad0f7e9STom Jones * from this software without specific prior written permission.
66*2ad0f7e9STom Jones *
67*2ad0f7e9STom Jones * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
68*2ad0f7e9STom Jones * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
69*2ad0f7e9STom Jones * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
70*2ad0f7e9STom Jones * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
71*2ad0f7e9STom Jones * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
72*2ad0f7e9STom Jones * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
73*2ad0f7e9STom Jones * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
74*2ad0f7e9STom Jones * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
75*2ad0f7e9STom Jones * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
76*2ad0f7e9STom Jones * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
77*2ad0f7e9STom Jones * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78*2ad0f7e9STom Jones *
79*2ad0f7e9STom Jones *****************************************************************************
80*2ad0f7e9STom Jones */
81*2ad0f7e9STom Jones
82*2ad0f7e9STom Jones /*-
83*2ad0f7e9STom Jones * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
84*2ad0f7e9STom Jones *
85*2ad0f7e9STom Jones * Permission to use, copy, modify, and distribute this software for any
86*2ad0f7e9STom Jones * purpose with or without fee is hereby granted, provided that the above
87*2ad0f7e9STom Jones * copyright notice and this permission notice appear in all copies.
88*2ad0f7e9STom Jones *
89*2ad0f7e9STom Jones * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
90*2ad0f7e9STom Jones * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
91*2ad0f7e9STom Jones * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
92*2ad0f7e9STom Jones * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
93*2ad0f7e9STom Jones * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
94*2ad0f7e9STom Jones * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
95*2ad0f7e9STom Jones * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
96*2ad0f7e9STom Jones */
97*2ad0f7e9STom Jones
98*2ad0f7e9STom Jones struct iwx_rx_radiotap_header {
99*2ad0f7e9STom Jones struct ieee80211_radiotap_header wr_ihdr;
100*2ad0f7e9STom Jones uint64_t wr_tsft;
101*2ad0f7e9STom Jones uint8_t wr_flags;
102*2ad0f7e9STom Jones uint8_t wr_rate;
103*2ad0f7e9STom Jones uint16_t wr_chan_freq;
104*2ad0f7e9STom Jones uint16_t wr_chan_flags;
105*2ad0f7e9STom Jones int8_t wr_dbm_antsignal;
106*2ad0f7e9STom Jones int8_t wr_dbm_antnoise;
107*2ad0f7e9STom Jones } __packed;
108*2ad0f7e9STom Jones
109*2ad0f7e9STom Jones #define IWX_RX_RADIOTAP_PRESENT \
110*2ad0f7e9STom Jones ((1 << IEEE80211_RADIOTAP_TSFT) | \
111*2ad0f7e9STom Jones (1 << IEEE80211_RADIOTAP_FLAGS) | \
112*2ad0f7e9STom Jones (1 << IEEE80211_RADIOTAP_RATE) | \
113*2ad0f7e9STom Jones (1 << IEEE80211_RADIOTAP_CHANNEL) | \
114*2ad0f7e9STom Jones (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
115*2ad0f7e9STom Jones (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
116*2ad0f7e9STom Jones
117*2ad0f7e9STom Jones struct iwx_tx_radiotap_header {
118*2ad0f7e9STom Jones struct ieee80211_radiotap_header wt_ihdr;
119*2ad0f7e9STom Jones uint8_t wt_flags;
120*2ad0f7e9STom Jones uint8_t wt_rate;
121*2ad0f7e9STom Jones uint16_t wt_chan_freq;
122*2ad0f7e9STom Jones uint16_t wt_chan_flags;
123*2ad0f7e9STom Jones } __packed;
124*2ad0f7e9STom Jones
125*2ad0f7e9STom Jones #define IWX_TX_RADIOTAP_PRESENT \
126*2ad0f7e9STom Jones ((1 << IEEE80211_RADIOTAP_FLAGS) | \
127*2ad0f7e9STom Jones (1 << IEEE80211_RADIOTAP_RATE) | \
128*2ad0f7e9STom Jones (1 << IEEE80211_RADIOTAP_CHANNEL))
129*2ad0f7e9STom Jones
130*2ad0f7e9STom Jones #define IWX_UCODE_SECT_MAX 57
131*2ad0f7e9STom Jones
132*2ad0f7e9STom Jones /*
133*2ad0f7e9STom Jones * fw_status is used to determine if we've already parsed the firmware file
134*2ad0f7e9STom Jones *
135*2ad0f7e9STom Jones * In addition to the following, status < 0 ==> -error
136*2ad0f7e9STom Jones */
137*2ad0f7e9STom Jones #define IWX_FW_STATUS_NONE 0
138*2ad0f7e9STom Jones #define IWX_FW_STATUS_INPROGRESS 1
139*2ad0f7e9STom Jones #define IWX_FW_STATUS_DONE 2
140*2ad0f7e9STom Jones
141*2ad0f7e9STom Jones enum iwx_ucode_type {
142*2ad0f7e9STom Jones IWX_UCODE_TYPE_REGULAR,
143*2ad0f7e9STom Jones IWX_UCODE_TYPE_INIT,
144*2ad0f7e9STom Jones IWX_UCODE_TYPE_WOW,
145*2ad0f7e9STom Jones IWX_UCODE_TYPE_REGULAR_USNIFFER,
146*2ad0f7e9STom Jones IWX_UCODE_TYPE_MAX
147*2ad0f7e9STom Jones };
148*2ad0f7e9STom Jones
149*2ad0f7e9STom Jones struct iwx_fw_info {
150*2ad0f7e9STom Jones void *fw_rawdata;
151*2ad0f7e9STom Jones size_t fw_rawsize;
152*2ad0f7e9STom Jones int fw_status;
153*2ad0f7e9STom Jones
154*2ad0f7e9STom Jones struct iwx_fw_sects {
155*2ad0f7e9STom Jones struct iwx_fw_onesect {
156*2ad0f7e9STom Jones const void *fws_data;
157*2ad0f7e9STom Jones uint32_t fws_len;
158*2ad0f7e9STom Jones uint32_t fws_devoff;
159*2ad0f7e9STom Jones } fw_sect[IWX_UCODE_SECT_MAX];
160*2ad0f7e9STom Jones size_t fw_totlen;
161*2ad0f7e9STom Jones int fw_count;
162*2ad0f7e9STom Jones } fw_sects[IWX_UCODE_TYPE_MAX];
163*2ad0f7e9STom Jones
164*2ad0f7e9STom Jones /* FW debug data parsed for driver usage */
165*2ad0f7e9STom Jones int dbg_dest_tlv_init;
166*2ad0f7e9STom Jones const uint8_t *dbg_dest_ver;
167*2ad0f7e9STom Jones uint8_t n_dest_reg;
168*2ad0f7e9STom Jones const struct iwx_fw_dbg_dest_tlv_v1 *dbg_dest_tlv_v1;
169*2ad0f7e9STom Jones
170*2ad0f7e9STom Jones const struct iwx_fw_dbg_conf_tlv *dbg_conf_tlv[IWX_FW_DBG_CONF_MAX];
171*2ad0f7e9STom Jones size_t dbg_conf_tlv_len[IWX_FW_DBG_CONF_MAX];
172*2ad0f7e9STom Jones struct iwx_fw_dbg_trigger_tlv *dbg_trigger_tlv[IWX_FW_DBG_TRIGGER_MAX];
173*2ad0f7e9STom Jones size_t dbg_trigger_tlv_len[IWX_FW_DBG_TRIGGER_MAX];
174*2ad0f7e9STom Jones struct iwx_fw_dbg_mem_seg_tlv *dbg_mem_tlv;
175*2ad0f7e9STom Jones size_t n_mem_tlv;
176*2ad0f7e9STom Jones
177*2ad0f7e9STom Jones /* Copy of firmware image loader found in file. */
178*2ad0f7e9STom Jones uint8_t *iml;
179*2ad0f7e9STom Jones size_t iml_len;
180*2ad0f7e9STom Jones };
181*2ad0f7e9STom Jones
182*2ad0f7e9STom Jones struct iwx_nvm_data {
183*2ad0f7e9STom Jones int n_hw_addrs;
184*2ad0f7e9STom Jones uint8_t hw_addr[ETHER_ADDR_LEN];
185*2ad0f7e9STom Jones
186*2ad0f7e9STom Jones int sku_cap_band_24GHz_enable;
187*2ad0f7e9STom Jones int sku_cap_band_52GHz_enable;
188*2ad0f7e9STom Jones int sku_cap_11n_enable;
189*2ad0f7e9STom Jones int sku_cap_11ac_enable;
190*2ad0f7e9STom Jones int sku_cap_11ax_enable;
191*2ad0f7e9STom Jones int sku_cap_amt_enable;
192*2ad0f7e9STom Jones int sku_cap_ipan_enable;
193*2ad0f7e9STom Jones int sku_cap_mimo_disable;
194*2ad0f7e9STom Jones int lar_enabled;
195*2ad0f7e9STom Jones
196*2ad0f7e9STom Jones uint8_t valid_tx_ant, valid_rx_ant;
197*2ad0f7e9STom Jones
198*2ad0f7e9STom Jones uint16_t nvm_version;
199*2ad0f7e9STom Jones };
200*2ad0f7e9STom Jones
201*2ad0f7e9STom Jones /* max bufs per tfd the driver will use */
202*2ad0f7e9STom Jones #define IWX_MAX_CMD_TBS_PER_TFD 2
203*2ad0f7e9STom Jones
204*2ad0f7e9STom Jones struct iwx_host_cmd {
205*2ad0f7e9STom Jones const void *data[IWX_MAX_CMD_TBS_PER_TFD];
206*2ad0f7e9STom Jones struct iwx_rx_packet *resp_pkt;
207*2ad0f7e9STom Jones size_t resp_pkt_len;
208*2ad0f7e9STom Jones unsigned long _rx_page_addr;
209*2ad0f7e9STom Jones uint32_t _rx_page_order;
210*2ad0f7e9STom Jones int handler_status;
211*2ad0f7e9STom Jones
212*2ad0f7e9STom Jones uint32_t flags;
213*2ad0f7e9STom Jones uint16_t len[IWX_MAX_CMD_TBS_PER_TFD];
214*2ad0f7e9STom Jones uint8_t dataflags[IWX_MAX_CMD_TBS_PER_TFD];
215*2ad0f7e9STom Jones uint32_t id;
216*2ad0f7e9STom Jones };
217*2ad0f7e9STom Jones
218*2ad0f7e9STom Jones /*
219*2ad0f7e9STom Jones * DMA glue is from iwn
220*2ad0f7e9STom Jones */
221*2ad0f7e9STom Jones
222*2ad0f7e9STom Jones struct iwx_dma_info {
223*2ad0f7e9STom Jones bus_dma_tag_t tag;
224*2ad0f7e9STom Jones bus_dmamap_t map;
225*2ad0f7e9STom Jones bus_dma_segment_t seg;
226*2ad0f7e9STom Jones bus_addr_t paddr;
227*2ad0f7e9STom Jones void *vaddr;
228*2ad0f7e9STom Jones bus_size_t size;
229*2ad0f7e9STom Jones };
230*2ad0f7e9STom Jones
231*2ad0f7e9STom Jones #define IWX_TX_RING_COUNT IWX_DEFAULT_QUEUE_SIZE
232*2ad0f7e9STom Jones #define IWX_TX_RING_LOMARK 192
233*2ad0f7e9STom Jones #define IWX_TX_RING_HIMARK 224
234*2ad0f7e9STom Jones
235*2ad0f7e9STom Jones struct iwx_tx_data {
236*2ad0f7e9STom Jones bus_dmamap_t map;
237*2ad0f7e9STom Jones bus_addr_t cmd_paddr;
238*2ad0f7e9STom Jones struct mbuf *m;
239*2ad0f7e9STom Jones struct iwx_node *in;
240*2ad0f7e9STom Jones int flags;
241*2ad0f7e9STom Jones #define IWX_TXDATA_FLAG_CMD_IS_NARROW 0x01
242*2ad0f7e9STom Jones };
243*2ad0f7e9STom Jones
244*2ad0f7e9STom Jones struct iwx_tx_ring {
245*2ad0f7e9STom Jones struct iwx_dma_info desc_dma;
246*2ad0f7e9STom Jones struct iwx_dma_info cmd_dma;
247*2ad0f7e9STom Jones struct iwx_dma_info bc_tbl;
248*2ad0f7e9STom Jones struct iwx_tfh_tfd *desc;
249*2ad0f7e9STom Jones struct iwx_device_cmd *cmd;
250*2ad0f7e9STom Jones struct iwx_tx_data data[IWX_TX_RING_COUNT];
251*2ad0f7e9STom Jones int qid;
252*2ad0f7e9STom Jones int queued;
253*2ad0f7e9STom Jones int cur;
254*2ad0f7e9STom Jones int cur_hw;
255*2ad0f7e9STom Jones int tail;
256*2ad0f7e9STom Jones int tail_hw;
257*2ad0f7e9STom Jones int tid;
258*2ad0f7e9STom Jones bus_dma_tag_t data_dmat;
259*2ad0f7e9STom Jones };
260*2ad0f7e9STom Jones
261*2ad0f7e9STom Jones #define IWX_RX_MQ_RING_COUNT 512
262*2ad0f7e9STom Jones /* Linux driver optionally uses 8k buffer */
263*2ad0f7e9STom Jones #define IWX_RBUF_SIZE 4096
264*2ad0f7e9STom Jones
265*2ad0f7e9STom Jones struct iwx_rx_data {
266*2ad0f7e9STom Jones struct mbuf *m;
267*2ad0f7e9STom Jones bus_dmamap_t map;
268*2ad0f7e9STom Jones };
269*2ad0f7e9STom Jones
270*2ad0f7e9STom Jones struct iwx_rx_ring {
271*2ad0f7e9STom Jones struct iwx_dma_info free_desc_dma;
272*2ad0f7e9STom Jones struct iwx_dma_info stat_dma;
273*2ad0f7e9STom Jones struct iwx_dma_info used_desc_dma;
274*2ad0f7e9STom Jones void *desc;
275*2ad0f7e9STom Jones struct iwx_rb_status *stat;
276*2ad0f7e9STom Jones struct iwx_rx_data data[IWX_RX_MQ_RING_COUNT];
277*2ad0f7e9STom Jones int cur;
278*2ad0f7e9STom Jones bus_dma_tag_t data_dmat;
279*2ad0f7e9STom Jones };
280*2ad0f7e9STom Jones
281*2ad0f7e9STom Jones #define IWX_FLAG_USE_ICT 0x01 /* using Interrupt Cause Table */
282*2ad0f7e9STom Jones #define IWX_FLAG_RFKILL 0x02 /* radio kill switch is set */
283*2ad0f7e9STom Jones #define IWX_FLAG_SCANNING 0x04 /* scan in progress */
284*2ad0f7e9STom Jones #define IWX_FLAG_MAC_ACTIVE 0x08 /* MAC context added to firmware */
285*2ad0f7e9STom Jones #define IWX_FLAG_BINDING_ACTIVE 0x10 /* MAC->PHY binding added to firmware */
286*2ad0f7e9STom Jones #define IWX_FLAG_STA_ACTIVE 0x20 /* AP added to firmware station table */
287*2ad0f7e9STom Jones #define IWX_FLAG_TE_ACTIVE 0x40 /* time event is scheduled */
288*2ad0f7e9STom Jones #define IWX_FLAG_HW_ERR 0x80 /* hardware error occurred */
289*2ad0f7e9STom Jones #define IWX_FLAG_SHUTDOWN 0x100 /* shutting down; new tasks forbidden */
290*2ad0f7e9STom Jones #define IWX_FLAG_BGSCAN 0x200 /* background scan in progress */
291*2ad0f7e9STom Jones #define IWX_FLAG_TXFLUSH 0x400 /* Tx queue flushing in progress */
292*2ad0f7e9STom Jones #define IWX_FLAG_HW_INITED 0x800 /* Hardware initialized */
293*2ad0f7e9STom Jones #define IWX_FLAG_AMPDUTX 0x1000
294*2ad0f7e9STom Jones
295*2ad0f7e9STom Jones struct iwx_ucode_status {
296*2ad0f7e9STom Jones uint32_t uc_lmac_error_event_table[2];
297*2ad0f7e9STom Jones uint32_t uc_umac_error_event_table;
298*2ad0f7e9STom Jones uint32_t uc_log_event_table;
299*2ad0f7e9STom Jones unsigned int error_event_table_tlv_status;
300*2ad0f7e9STom Jones
301*2ad0f7e9STom Jones int uc_ok;
302*2ad0f7e9STom Jones int uc_intr;
303*2ad0f7e9STom Jones };
304*2ad0f7e9STom Jones
305*2ad0f7e9STom Jones #define IWX_ERROR_EVENT_TABLE_LMAC1 (1 << 0)
306*2ad0f7e9STom Jones #define IWX_ERROR_EVENT_TABLE_LMAC2 (1 << 1)
307*2ad0f7e9STom Jones #define IWX_ERROR_EVENT_TABLE_UMAC (1 << 2)
308*2ad0f7e9STom Jones
309*2ad0f7e9STom Jones #define IWX_CMD_RESP_MAX PAGE_SIZE
310*2ad0f7e9STom Jones
311*2ad0f7e9STom Jones /* lower blocks contain EEPROM image and calibration data */
312*2ad0f7e9STom Jones #define IWX_OTP_LOW_IMAGE_SIZE_FAMILY_7000 16384
313*2ad0f7e9STom Jones #define IWX_OTP_LOW_IMAGE_SIZE_FAMILY_8000 32768
314*2ad0f7e9STom Jones
315*2ad0f7e9STom Jones #define IWX_TE_SESSION_PROTECTION_MAX_TIME_MS 1000
316*2ad0f7e9STom Jones #define IWX_TE_SESSION_PROTECTION_MIN_TIME_MS 400
317*2ad0f7e9STom Jones
318*2ad0f7e9STom Jones enum IWX_CMD_MODE {
319*2ad0f7e9STom Jones IWX_CMD_ASYNC = (1 << 0),
320*2ad0f7e9STom Jones IWX_CMD_WANT_RESP = (1 << 1),
321*2ad0f7e9STom Jones IWX_CMD_SEND_IN_RFKILL = (1 << 2),
322*2ad0f7e9STom Jones };
323*2ad0f7e9STom Jones enum iwx_hcmd_dataflag {
324*2ad0f7e9STom Jones IWX_HCMD_DFL_NOCOPY = (1 << 0),
325*2ad0f7e9STom Jones IWX_HCMD_DFL_DUP = (1 << 1),
326*2ad0f7e9STom Jones };
327*2ad0f7e9STom Jones
328*2ad0f7e9STom Jones #define IWX_NUM_PAPD_CH_GROUPS 9
329*2ad0f7e9STom Jones #define IWX_NUM_TXP_CH_GROUPS 9
330*2ad0f7e9STom Jones
331*2ad0f7e9STom Jones struct iwx_phy_ctxt {
332*2ad0f7e9STom Jones uint16_t id;
333*2ad0f7e9STom Jones uint16_t color;
334*2ad0f7e9STom Jones uint32_t ref;
335*2ad0f7e9STom Jones struct ieee80211_channel *channel;
336*2ad0f7e9STom Jones uint8_t sco; /* 40 MHz secondary channel offset */
337*2ad0f7e9STom Jones uint8_t vht_chan_width;
338*2ad0f7e9STom Jones };
339*2ad0f7e9STom Jones
340*2ad0f7e9STom Jones struct iwx_bf_data {
341*2ad0f7e9STom Jones int bf_enabled; /* filtering */
342*2ad0f7e9STom Jones int ba_enabled; /* abort */
343*2ad0f7e9STom Jones int ave_beacon_signal;
344*2ad0f7e9STom Jones int last_cqm_event;
345*2ad0f7e9STom Jones };
346*2ad0f7e9STom Jones
347*2ad0f7e9STom Jones /**
348*2ad0f7e9STom Jones * struct iwx_self_init_dram - dram data used by self init process
349*2ad0f7e9STom Jones * @fw: lmac and umac dram data
350*2ad0f7e9STom Jones * @lmac_cnt: number of lmac sections in fw image
351*2ad0f7e9STom Jones * @umac_cnt: number of umac sections in fw image
352*2ad0f7e9STom Jones * @paging: paging dram data
353*2ad0f7e9STom Jones * @paging_cnt: number of paging sections needed by fw image
354*2ad0f7e9STom Jones */
355*2ad0f7e9STom Jones struct iwx_self_init_dram {
356*2ad0f7e9STom Jones struct iwx_dma_info *fw;
357*2ad0f7e9STom Jones int lmac_cnt;
358*2ad0f7e9STom Jones int umac_cnt;
359*2ad0f7e9STom Jones struct iwx_dma_info *paging;
360*2ad0f7e9STom Jones int paging_cnt;
361*2ad0f7e9STom Jones };
362*2ad0f7e9STom Jones
363*2ad0f7e9STom Jones /**
364*2ad0f7e9STom Jones * struct iwx_reorder_buffer - per ra/tid/queue reorder buffer
365*2ad0f7e9STom Jones * @head_sn: reorder window head sn
366*2ad0f7e9STom Jones * @num_stored: number of mpdus stored in the buffer
367*2ad0f7e9STom Jones * @buf_size: the reorder buffer size as set by the last addba request
368*2ad0f7e9STom Jones * @queue: queue of this reorder buffer
369*2ad0f7e9STom Jones * @last_amsdu: track last ASMDU SN for duplication detection
370*2ad0f7e9STom Jones * @last_sub_index: track ASMDU sub frame index for duplication detection
371*2ad0f7e9STom Jones * @reorder_timer: timer for frames are in the reorder buffer. For AMSDU
372*2ad0f7e9STom Jones * it is the time of last received sub-frame
373*2ad0f7e9STom Jones * @removed: prevent timer re-arming
374*2ad0f7e9STom Jones * @valid: reordering is valid for this queue
375*2ad0f7e9STom Jones * @consec_oldsn_drops: consecutive drops due to old SN
376*2ad0f7e9STom Jones * @consec_oldsn_ampdu_gp2: A-MPDU GP2 timestamp to track
377*2ad0f7e9STom Jones * when to apply old SN consecutive drop workaround
378*2ad0f7e9STom Jones * @consec_oldsn_prev_drop: track whether or not an MPDU
379*2ad0f7e9STom Jones * that was single/part of the previous A-MPDU was
380*2ad0f7e9STom Jones * dropped due to old SN
381*2ad0f7e9STom Jones */
382*2ad0f7e9STom Jones struct iwx_reorder_buffer {
383*2ad0f7e9STom Jones uint16_t head_sn;
384*2ad0f7e9STom Jones uint16_t num_stored;
385*2ad0f7e9STom Jones uint16_t buf_size;
386*2ad0f7e9STom Jones uint16_t last_amsdu;
387*2ad0f7e9STom Jones uint8_t last_sub_index;
388*2ad0f7e9STom Jones struct callout reorder_timer;
389*2ad0f7e9STom Jones int removed;
390*2ad0f7e9STom Jones int valid;
391*2ad0f7e9STom Jones unsigned int consec_oldsn_drops;
392*2ad0f7e9STom Jones uint32_t consec_oldsn_ampdu_gp2;
393*2ad0f7e9STom Jones unsigned int consec_oldsn_prev_drop;
394*2ad0f7e9STom Jones #define IWX_AMPDU_CONSEC_DROPS_DELBA 10
395*2ad0f7e9STom Jones };
396*2ad0f7e9STom Jones
397*2ad0f7e9STom Jones /**
398*2ad0f7e9STom Jones * struct iwx_reorder_buf_entry - reorder buffer entry per frame sequence number
399*2ad0f7e9STom Jones * @frames: list of mbufs stored (A-MSDU subframes share a sequence number)
400*2ad0f7e9STom Jones * @reorder_time: time the packet was stored in the reorder buffer
401*2ad0f7e9STom Jones */
402*2ad0f7e9STom Jones struct iwx_reorder_buf_entry {
403*2ad0f7e9STom Jones struct mbufq frames;
404*2ad0f7e9STom Jones struct timeval reorder_time;
405*2ad0f7e9STom Jones uint32_t rx_pkt_status;
406*2ad0f7e9STom Jones int chanidx;
407*2ad0f7e9STom Jones int is_shortpre;
408*2ad0f7e9STom Jones uint32_t rate_n_flags;
409*2ad0f7e9STom Jones uint32_t device_timestamp;
410*2ad0f7e9STom Jones struct ieee80211_rx_stats rxi;
411*2ad0f7e9STom Jones };
412*2ad0f7e9STom Jones
413*2ad0f7e9STom Jones /**
414*2ad0f7e9STom Jones * struct iwx_rxba_data - BA session data
415*2ad0f7e9STom Jones * @sta_id: station id
416*2ad0f7e9STom Jones * @tid: tid of the session
417*2ad0f7e9STom Jones * @baid: baid of the session
418*2ad0f7e9STom Jones * @timeout: the timeout set in the addba request
419*2ad0f7e9STom Jones * @entries_per_queue: # of buffers per queue
420*2ad0f7e9STom Jones * @last_rx: last rx timestamp, updated only if timeout passed from last update
421*2ad0f7e9STom Jones * @session_timer: timer to check if BA session expired, runs at 2 * timeout
422*2ad0f7e9STom Jones * @sc: softc pointer, needed for timer context
423*2ad0f7e9STom Jones * @reorder_buf: reorder buffer
424*2ad0f7e9STom Jones * @reorder_buf_data: buffered frames, one entry per sequence number
425*2ad0f7e9STom Jones */
426*2ad0f7e9STom Jones struct iwx_rxba_data {
427*2ad0f7e9STom Jones uint8_t sta_id;
428*2ad0f7e9STom Jones uint8_t tid;
429*2ad0f7e9STom Jones uint8_t baid;
430*2ad0f7e9STom Jones uint16_t timeout;
431*2ad0f7e9STom Jones uint16_t entries_per_queue;
432*2ad0f7e9STom Jones struct timeval last_rx;
433*2ad0f7e9STom Jones struct callout session_timer;
434*2ad0f7e9STom Jones struct iwx_softc *sc;
435*2ad0f7e9STom Jones struct iwx_reorder_buffer reorder_buf;
436*2ad0f7e9STom Jones struct iwx_reorder_buf_entry entries[IEEE80211_AGGR_BAWMAX];
437*2ad0f7e9STom Jones };
438*2ad0f7e9STom Jones
439*2ad0f7e9STom Jones static inline struct iwx_rxba_data *
iwx_rxba_data_from_reorder_buf(struct iwx_reorder_buffer * buf)440*2ad0f7e9STom Jones iwx_rxba_data_from_reorder_buf(struct iwx_reorder_buffer *buf)
441*2ad0f7e9STom Jones {
442*2ad0f7e9STom Jones return (void *)((uint8_t *)buf -
443*2ad0f7e9STom Jones offsetof(struct iwx_rxba_data, reorder_buf));
444*2ad0f7e9STom Jones }
445*2ad0f7e9STom Jones
446*2ad0f7e9STom Jones /**
447*2ad0f7e9STom Jones * struct iwx_rxq_dup_data - per station per rx queue data
448*2ad0f7e9STom Jones * @last_seq: last sequence per tid for duplicate packet detection
449*2ad0f7e9STom Jones * @last_sub_frame: last subframe packet
450*2ad0f7e9STom Jones */
451*2ad0f7e9STom Jones struct iwx_rxq_dup_data {
452*2ad0f7e9STom Jones uint16_t last_seq[IWX_MAX_TID_COUNT + 1];
453*2ad0f7e9STom Jones uint8_t last_sub_frame[IWX_MAX_TID_COUNT + 1];
454*2ad0f7e9STom Jones };
455*2ad0f7e9STom Jones
456*2ad0f7e9STom Jones struct iwx_setkey_task_arg {
457*2ad0f7e9STom Jones int sta_id;
458*2ad0f7e9STom Jones struct ieee80211_node *ni;
459*2ad0f7e9STom Jones struct ieee80211_key *k;
460*2ad0f7e9STom Jones };
461*2ad0f7e9STom Jones
462*2ad0f7e9STom Jones struct iwx_ba_task_data {
463*2ad0f7e9STom Jones uint32_t start_tidmask;
464*2ad0f7e9STom Jones uint32_t stop_tidmask;
465*2ad0f7e9STom Jones };
466*2ad0f7e9STom Jones
467*2ad0f7e9STom Jones
468*2ad0f7e9STom Jones /*
469*2ad0f7e9STom Jones * Device configuration parameters which cannot be detected based on
470*2ad0f7e9STom Jones * PCI vendor/product ID alone.
471*2ad0f7e9STom Jones */
472*2ad0f7e9STom Jones struct iwx_device_cfg {
473*2ad0f7e9STom Jones const char *fw_name;
474*2ad0f7e9STom Jones const char *pnvm_name;
475*2ad0f7e9STom Jones int tx_with_siso_diversity;
476*2ad0f7e9STom Jones int uhb_supported;
477*2ad0f7e9STom Jones int xtal_latency;
478*2ad0f7e9STom Jones int low_latency_xtal;
479*2ad0f7e9STom Jones };
480*2ad0f7e9STom Jones
481*2ad0f7e9STom Jones /* Firmware listed here must be available in fw_update(8). */
482*2ad0f7e9STom Jones #define IWX_CC_A_FW "iwlwifi-cc-a0-77.ucode"
483*2ad0f7e9STom Jones #define IWX_TY_A_GF_A_FW "iwlwifi-ty-a0-gf-a0-77.ucode"
484*2ad0f7e9STom Jones #define IWX_TY_A_GF_A_PNVM "iwlwifi-ty-a0-gf-a0.pnvm"
485*2ad0f7e9STom Jones #define IWX_QU_B_HR_B_FW "iwlwifi-Qu-b0-hr-b0-77.ucode"
486*2ad0f7e9STom Jones #define IWX_QU_B_JF_B_FW "iwlwifi-Qu-b0-jf-b0-77.ucode"
487*2ad0f7e9STom Jones #define IWX_QU_C_HR_B_FW "iwlwifi-Qu-c0-hr-b0-77.ucode"
488*2ad0f7e9STom Jones #define IWX_QU_C_JF_B_FW "iwlwifi-Qu-c0-jf-b0-77.ucode"
489*2ad0f7e9STom Jones #define IWX_QUZ_A_HR_B_FW "iwlwifi-QuZ-a0-hr-b0-77.ucode"
490*2ad0f7e9STom Jones #define IWX_QUZ_A_JF_B_FW "iwlwifi-QuZ-a0-jf-b0-77.ucode"
491*2ad0f7e9STom Jones #define IWX_SO_A_GF_A_FW "iwlwifi-so-a0-gf-a0-77.ucode"
492*2ad0f7e9STom Jones #define IWX_SO_A_GF_A_PNVM "iwlwifi-so-a0-gf-a0.pnvm"
493*2ad0f7e9STom Jones #define IWX_SO_A_GF4_A_FW "iwlwifi-so-a0-gf4-a0-77.ucode"
494*2ad0f7e9STom Jones #define IWX_SO_A_GF4_A_PNVM "iwlwifi-so-a0-gf4-a0.pnvm"
495*2ad0f7e9STom Jones #define IWX_SO_A_HR_B_FW "iwlwifi-so-a0-hr-b0-77.ucode"
496*2ad0f7e9STom Jones #define IWX_SO_A_JF_B_FW "iwlwifi-so-a0-jf-b0-77.ucode"
497*2ad0f7e9STom Jones
498*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_9560_quz_a0_jf_b0_cfg = {
499*2ad0f7e9STom Jones .fw_name = IWX_QUZ_A_JF_B_FW,
500*2ad0f7e9STom Jones };
501*2ad0f7e9STom Jones
502*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_9560_qu_c0_jf_b0_cfg = {
503*2ad0f7e9STom Jones .fw_name = IWX_QU_C_JF_B_FW,
504*2ad0f7e9STom Jones };
505*2ad0f7e9STom Jones
506*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_qu_b0_hr1_b0 = {
507*2ad0f7e9STom Jones .fw_name = IWX_QU_B_HR_B_FW,
508*2ad0f7e9STom Jones .tx_with_siso_diversity = true,
509*2ad0f7e9STom Jones };
510*2ad0f7e9STom Jones
511*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_qu_b0_hr_b0 = {
512*2ad0f7e9STom Jones .fw_name = IWX_QU_B_HR_B_FW,
513*2ad0f7e9STom Jones };
514*2ad0f7e9STom Jones
515*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_ax201_cfg_qu_hr = {
516*2ad0f7e9STom Jones .fw_name = IWX_QU_B_HR_B_FW,
517*2ad0f7e9STom Jones };
518*2ad0f7e9STom Jones
519*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_qu_c0_hr1_b0 = {
520*2ad0f7e9STom Jones .fw_name = IWX_QU_C_HR_B_FW,
521*2ad0f7e9STom Jones .tx_with_siso_diversity = true,
522*2ad0f7e9STom Jones };
523*2ad0f7e9STom Jones
524*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_qu_c0_hr_b0 = {
525*2ad0f7e9STom Jones .fw_name = IWX_QU_C_HR_B_FW,
526*2ad0f7e9STom Jones };
527*2ad0f7e9STom Jones
528*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_ax201_cfg_qu_c0_hr_b0 = {
529*2ad0f7e9STom Jones .fw_name = IWX_QU_C_HR_B_FW,
530*2ad0f7e9STom Jones };
531*2ad0f7e9STom Jones
532*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_quz_a0_hr1_b0 = {
533*2ad0f7e9STom Jones .fw_name = IWX_QUZ_A_HR_B_FW,
534*2ad0f7e9STom Jones };
535*2ad0f7e9STom Jones
536*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_ax201_cfg_quz_hr = {
537*2ad0f7e9STom Jones .fw_name = IWX_QUZ_A_HR_B_FW,
538*2ad0f7e9STom Jones };
539*2ad0f7e9STom Jones
540*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_cfg_so_a0_hr_b0 = {
541*2ad0f7e9STom Jones .fw_name = IWX_SO_A_HR_B_FW,
542*2ad0f7e9STom Jones };
543*2ad0f7e9STom Jones
544*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_cfg_quz_a0_hr_b0 = {
545*2ad0f7e9STom Jones .fw_name = IWX_QUZ_A_HR_B_FW,
546*2ad0f7e9STom Jones };
547*2ad0f7e9STom Jones
548*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_2ax_cfg_so_gf_a0 = {
549*2ad0f7e9STom Jones .fw_name = IWX_SO_A_GF_A_FW,
550*2ad0f7e9STom Jones .pnvm_name = IWX_SO_A_GF_A_PNVM,
551*2ad0f7e9STom Jones .uhb_supported = 1,
552*2ad0f7e9STom Jones };
553*2ad0f7e9STom Jones
554*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_2ax_cfg_so_gf_a0_long = {
555*2ad0f7e9STom Jones .fw_name = IWX_SO_A_GF_A_FW,
556*2ad0f7e9STom Jones .pnvm_name = IWX_SO_A_GF_A_PNVM,
557*2ad0f7e9STom Jones .uhb_supported = 1,
558*2ad0f7e9STom Jones .xtal_latency = 12000,
559*2ad0f7e9STom Jones .low_latency_xtal = 1,
560*2ad0f7e9STom Jones };
561*2ad0f7e9STom Jones
562*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_2ax_cfg_so_gf4_a0 = {
563*2ad0f7e9STom Jones .fw_name = IWX_SO_A_GF4_A_FW,
564*2ad0f7e9STom Jones .pnvm_name = IWX_SO_A_GF4_A_PNVM,
565*2ad0f7e9STom Jones .uhb_supported = 1,
566*2ad0f7e9STom Jones .xtal_latency = 12000,
567*2ad0f7e9STom Jones .low_latency_xtal = 1,
568*2ad0f7e9STom Jones };
569*2ad0f7e9STom Jones
570*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_2ax_cfg_so_gf4_a0_long = {
571*2ad0f7e9STom Jones .fw_name = IWX_SO_A_GF4_A_FW,
572*2ad0f7e9STom Jones .pnvm_name = IWX_SO_A_GF4_A_PNVM,
573*2ad0f7e9STom Jones .uhb_supported = 1,
574*2ad0f7e9STom Jones };
575*2ad0f7e9STom Jones
576*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_2ax_cfg_ty_gf_a0 = {
577*2ad0f7e9STom Jones .fw_name = IWX_TY_A_GF_A_FW,
578*2ad0f7e9STom Jones .pnvm_name = IWX_TY_A_GF_A_PNVM,
579*2ad0f7e9STom Jones };
580*2ad0f7e9STom Jones
581*2ad0f7e9STom Jones const struct iwx_device_cfg iwx_2ax_cfg_so_jf_b0 = {
582*2ad0f7e9STom Jones .fw_name = IWX_SO_A_JF_B_FW,
583*2ad0f7e9STom Jones };
584*2ad0f7e9STom Jones
585*2ad0f7e9STom Jones #define IWX_CFG_ANY (~0)
586*2ad0f7e9STom Jones
587*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_QU 0x33
588*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_QUZ 0x35
589*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_QNJ 0x36
590*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_SO 0x37
591*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_SNJ 0x42
592*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_SOF 0x43
593*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_MA 0x44
594*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_BZ 0x46
595*2ad0f7e9STom Jones #define IWX_CFG_MAC_TYPE_GL 0x47
596*2ad0f7e9STom Jones
597*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_JF2 0x105
598*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_JF1 0x108
599*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_HR2 0x10a
600*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_HR1 0x10c
601*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_GF 0x10d
602*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_MR 0x110
603*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_MS 0x111
604*2ad0f7e9STom Jones #define IWX_CFG_RF_TYPE_FM 0x112
605*2ad0f7e9STom Jones
606*2ad0f7e9STom Jones #define IWX_CFG_RF_ID_JF 0x3
607*2ad0f7e9STom Jones #define IWX_CFG_RF_ID_JF1 0x6
608*2ad0f7e9STom Jones #define IWX_CFG_RF_ID_JF1_DIV 0xa
609*2ad0f7e9STom Jones
610*2ad0f7e9STom Jones #define IWX_CFG_NO_160 0x1
611*2ad0f7e9STom Jones #define IWX_CFG_160 0x0
612*2ad0f7e9STom Jones
613*2ad0f7e9STom Jones #define IWX_CFG_CORES_BT 0x0
614*2ad0f7e9STom Jones
615*2ad0f7e9STom Jones #define IWX_CFG_NO_CDB 0x0
616*2ad0f7e9STom Jones #define IWX_CFG_CDB 0x1
617*2ad0f7e9STom Jones
618*2ad0f7e9STom Jones #define IWX_SUBDEVICE_RF_ID(subdevice) ((uint16_t)((subdevice) & 0x00f0) >> 4)
619*2ad0f7e9STom Jones #define IWX_SUBDEVICE_NO_160(subdevice) ((uint16_t)((subdevice) & 0x0200) >> 9)
620*2ad0f7e9STom Jones #define IWX_SUBDEVICE_CORES(subdevice) ((uint16_t)((subdevice) & 0x1c00) >> 10)
621*2ad0f7e9STom Jones
622*2ad0f7e9STom Jones struct iwx_rx_ba {
623*2ad0f7e9STom Jones int ba_timeout_val;
624*2ad0f7e9STom Jones u_int16_t ba_params;
625*2ad0f7e9STom Jones u_int16_t ba_winstart;
626*2ad0f7e9STom Jones u_int16_t ba_winend;
627*2ad0f7e9STom Jones u_int16_t ba_winsize;
628*2ad0f7e9STom Jones #define IWX_BA_DONE 1
629*2ad0f7e9STom Jones int ba_flags;
630*2ad0f7e9STom Jones };
631*2ad0f7e9STom Jones
632*2ad0f7e9STom Jones struct iwx_softc {
633*2ad0f7e9STom Jones device_t sc_dev;
634*2ad0f7e9STom Jones struct ieee80211com sc_ic;
635*2ad0f7e9STom Jones int (*sc_newstate)(struct ieee80211com *, enum ieee80211_state, int);
636*2ad0f7e9STom Jones int sc_newstate_pending;
637*2ad0f7e9STom Jones int attached;
638*2ad0f7e9STom Jones
639*2ad0f7e9STom Jones struct task init_task; /* NB: not reference-counted */
640*2ad0f7e9STom Jones struct task newstate_task;
641*2ad0f7e9STom Jones enum ieee80211_state ns_nstate;
642*2ad0f7e9STom Jones int ns_arg;
643*2ad0f7e9STom Jones
644*2ad0f7e9STom Jones /* Task for firmware BlockAck setup/teardown and its arguments. */
645*2ad0f7e9STom Jones struct task ba_rx_task;
646*2ad0f7e9STom Jones struct task ba_tx_task;
647*2ad0f7e9STom Jones struct iwx_ba_task_data ba_rx;
648*2ad0f7e9STom Jones struct iwx_ba_task_data ba_tx;
649*2ad0f7e9STom Jones
650*2ad0f7e9STom Jones /* Task for setting encryption keys and its arguments. */
651*2ad0f7e9STom Jones struct task setkey_task;
652*2ad0f7e9STom Jones /*
653*2ad0f7e9STom Jones * At present we need to process at most two keys at once:
654*2ad0f7e9STom Jones * Our pairwise key and a group key.
655*2ad0f7e9STom Jones * When hostap mode is implemented this array needs to grow or
656*2ad0f7e9STom Jones * it might become a bottleneck for associations that occur at
657*2ad0f7e9STom Jones * roughly the same time.
658*2ad0f7e9STom Jones */
659*2ad0f7e9STom Jones struct iwx_setkey_task_arg setkey_arg[2];
660*2ad0f7e9STom Jones int setkey_cur;
661*2ad0f7e9STom Jones int setkey_tail;
662*2ad0f7e9STom Jones int setkey_nkeys;
663*2ad0f7e9STom Jones
664*2ad0f7e9STom Jones /* Task for ERP/HT prot/slot-time/EDCA updates. */
665*2ad0f7e9STom Jones struct task mac_ctxt_task;
666*2ad0f7e9STom Jones
667*2ad0f7e9STom Jones /* Task for HT 20/40 MHz channel width updates. */
668*2ad0f7e9STom Jones struct task phy_ctxt_task;
669*2ad0f7e9STom Jones
670*2ad0f7e9STom Jones bus_space_tag_t sc_st;
671*2ad0f7e9STom Jones bus_space_handle_t sc_sh;
672*2ad0f7e9STom Jones bus_size_t sc_sz;
673*2ad0f7e9STom Jones bus_dma_tag_t sc_dmat;
674*2ad0f7e9STom Jones
675*2ad0f7e9STom Jones u_int16_t sc_pid;
676*2ad0f7e9STom Jones void *sc_pct;
677*2ad0f7e9STom Jones u_int32_t sc_pcitag;
678*2ad0f7e9STom Jones
679*2ad0f7e9STom Jones void *sc_ih;
680*2ad0f7e9STom Jones int sc_msix;
681*2ad0f7e9STom Jones
682*2ad0f7e9STom Jones /* TX/RX rings. */
683*2ad0f7e9STom Jones struct iwx_tx_ring txq[IWX_NUM_TX_QUEUES];
684*2ad0f7e9STom Jones struct iwx_rx_ring rxq;
685*2ad0f7e9STom Jones int qfullmsk;
686*2ad0f7e9STom Jones int qenablemsk;
687*2ad0f7e9STom Jones int first_data_qid;
688*2ad0f7e9STom Jones int aggqid[WME_NUM_TID];
689*2ad0f7e9STom Jones int max_tfd_queue_size;
690*2ad0f7e9STom Jones
691*2ad0f7e9STom Jones int sc_sf_state;
692*2ad0f7e9STom Jones
693*2ad0f7e9STom Jones /* ICT table. */
694*2ad0f7e9STom Jones struct iwx_dma_info ict_dma;
695*2ad0f7e9STom Jones int ict_cur;
696*2ad0f7e9STom Jones
697*2ad0f7e9STom Jones int sc_hw_rev;
698*2ad0f7e9STom Jones #define IWX_SILICON_A_STEP 0
699*2ad0f7e9STom Jones #define IWX_SILICON_B_STEP 1
700*2ad0f7e9STom Jones #define IWX_SILICON_C_STEP 2
701*2ad0f7e9STom Jones #define IWX_SILICON_Z_STEP 0xf
702*2ad0f7e9STom Jones int sc_hw_id;
703*2ad0f7e9STom Jones int sc_hw_rf_id;
704*2ad0f7e9STom Jones int sc_device_family;
705*2ad0f7e9STom Jones #define IWX_DEVICE_FAMILY_22000 1
706*2ad0f7e9STom Jones #define IWX_DEVICE_FAMILY_AX210 2
707*2ad0f7e9STom Jones uint32_t sc_sku_id[3];
708*2ad0f7e9STom Jones uint32_t mac_addr_from_csr;
709*2ad0f7e9STom Jones
710*2ad0f7e9STom Jones struct iwx_dma_info ctxt_info_dma;
711*2ad0f7e9STom Jones struct iwx_self_init_dram init_dram;
712*2ad0f7e9STom Jones struct iwx_dma_info prph_scratch_dma;
713*2ad0f7e9STom Jones struct iwx_dma_info prph_info_dma;
714*2ad0f7e9STom Jones struct iwx_dma_info iml_dma;
715*2ad0f7e9STom Jones struct iwx_dma_info pnvm_dma;
716*2ad0f7e9STom Jones uint32_t sc_pnvm_ver;
717*2ad0f7e9STom Jones
718*2ad0f7e9STom Jones int sc_fw_chunk_done;
719*2ad0f7e9STom Jones int sc_init_complete;
720*2ad0f7e9STom Jones #define IWX_INIT_COMPLETE 0x01
721*2ad0f7e9STom Jones #define IWX_CALIB_COMPLETE 0x02
722*2ad0f7e9STom Jones #define IWX_PNVM_COMPLETE 0x04
723*2ad0f7e9STom Jones
724*2ad0f7e9STom Jones struct iwx_ucode_status sc_uc;
725*2ad0f7e9STom Jones char sc_fwver[32];
726*2ad0f7e9STom Jones
727*2ad0f7e9STom Jones int sc_capaflags;
728*2ad0f7e9STom Jones int sc_capa_max_probe_len;
729*2ad0f7e9STom Jones int sc_capa_n_scan_channels;
730*2ad0f7e9STom Jones uint8_t sc_ucode_api[howmany(IWX_NUM_UCODE_TLV_API, NBBY)];
731*2ad0f7e9STom Jones uint8_t sc_enabled_capa[howmany(IWX_NUM_UCODE_TLV_CAPA, NBBY)];
732*2ad0f7e9STom Jones #define IWX_MAX_FW_CMD_VERSIONS 704
733*2ad0f7e9STom Jones struct iwx_fw_cmd_version cmd_versions[IWX_MAX_FW_CMD_VERSIONS];
734*2ad0f7e9STom Jones int n_cmd_versions;
735*2ad0f7e9STom Jones int sc_rate_n_flags_version;
736*2ad0f7e9STom Jones
737*2ad0f7e9STom Jones int sc_intmask;
738*2ad0f7e9STom Jones int sc_flags;
739*2ad0f7e9STom Jones
740*2ad0f7e9STom Jones uint32_t sc_fh_init_mask;
741*2ad0f7e9STom Jones uint32_t sc_hw_init_mask;
742*2ad0f7e9STom Jones uint32_t sc_fh_mask;
743*2ad0f7e9STom Jones uint32_t sc_hw_mask;
744*2ad0f7e9STom Jones
745*2ad0f7e9STom Jones int sc_generation;
746*2ad0f7e9STom Jones
747*2ad0f7e9STom Jones struct rwlock ioctl_rwl;
748*2ad0f7e9STom Jones
749*2ad0f7e9STom Jones int sc_cap_off; /* PCIe caps */
750*2ad0f7e9STom Jones
751*2ad0f7e9STom Jones const char *sc_fwname;
752*2ad0f7e9STom Jones struct iwx_fw_info sc_fw;
753*2ad0f7e9STom Jones struct iwx_dma_info fw_mon;
754*2ad0f7e9STom Jones int sc_fw_phy_config;
755*2ad0f7e9STom Jones struct iwx_tlv_calib_ctrl sc_default_calib[IWX_UCODE_TYPE_MAX];
756*2ad0f7e9STom Jones
757*2ad0f7e9STom Jones struct iwx_nvm_data sc_nvm;
758*2ad0f7e9STom Jones struct iwx_bf_data sc_bf;
759*2ad0f7e9STom Jones const char *sc_pnvm_name;
760*2ad0f7e9STom Jones
761*2ad0f7e9STom Jones int sc_tx_timer[IWX_NUM_TX_QUEUES];
762*2ad0f7e9STom Jones int sc_rx_ba_sessions;
763*2ad0f7e9STom Jones
764*2ad0f7e9STom Jones struct task bgscan_done_task;
765*2ad0f7e9STom Jones struct ieee80211_node_switch_bss_arg *bgscan_unref_arg;
766*2ad0f7e9STom Jones size_t bgscan_unref_arg_size;
767*2ad0f7e9STom Jones
768*2ad0f7e9STom Jones int sc_scan_last_antenna;
769*2ad0f7e9STom Jones
770*2ad0f7e9STom Jones int sc_staid;
771*2ad0f7e9STom Jones int sc_nodecolor;
772*2ad0f7e9STom Jones
773*2ad0f7e9STom Jones uint8_t *sc_cmd_resp_pkt[IWX_TX_RING_COUNT];
774*2ad0f7e9STom Jones size_t sc_cmd_resp_len[IWX_TX_RING_COUNT];
775*2ad0f7e9STom Jones int sc_nic_locks;
776*2ad0f7e9STom Jones
777*2ad0f7e9STom Jones struct taskq *sc_nswq;
778*2ad0f7e9STom Jones
779*2ad0f7e9STom Jones struct iwx_rx_phy_info sc_last_phy_info;
780*2ad0f7e9STom Jones int sc_ampdu_ref;
781*2ad0f7e9STom Jones struct iwx_rxba_data sc_rxba_data[IWX_MAX_BAID];
782*2ad0f7e9STom Jones
783*2ad0f7e9STom Jones uint32_t sc_time_event_uid;
784*2ad0f7e9STom Jones
785*2ad0f7e9STom Jones /* phy contexts. we only use the first one */
786*2ad0f7e9STom Jones struct iwx_phy_ctxt sc_phyctxt[IWX_NUM_PHY_CTX];
787*2ad0f7e9STom Jones
788*2ad0f7e9STom Jones struct iwx_notif_statistics sc_stats;
789*2ad0f7e9STom Jones int sc_noise;
790*2ad0f7e9STom Jones
791*2ad0f7e9STom Jones int sc_pm_support;
792*2ad0f7e9STom Jones int sc_ltr_enabled;
793*2ad0f7e9STom Jones
794*2ad0f7e9STom Jones int sc_integrated;
795*2ad0f7e9STom Jones int sc_tx_with_siso_diversity;
796*2ad0f7e9STom Jones int sc_max_tfd_queue_size;
797*2ad0f7e9STom Jones int sc_ltr_delay;
798*2ad0f7e9STom Jones int sc_xtal_latency;
799*2ad0f7e9STom Jones int sc_low_latency_xtal;
800*2ad0f7e9STom Jones int sc_uhb_supported;
801*2ad0f7e9STom Jones int sc_umac_prph_offset;
802*2ad0f7e9STom Jones int sc_imr_enabled;
803*2ad0f7e9STom Jones
804*2ad0f7e9STom Jones caddr_t sc_drvbpf;
805*2ad0f7e9STom Jones
806*2ad0f7e9STom Jones union {
807*2ad0f7e9STom Jones struct iwx_rx_radiotap_header th;
808*2ad0f7e9STom Jones uint8_t pad[IEEE80211_RADIOTAP_HDRLEN];
809*2ad0f7e9STom Jones } sc_rxtapu;
810*2ad0f7e9STom Jones #define sc_rxtap sc_rxtapu.th
811*2ad0f7e9STom Jones int sc_rxtap_len;
812*2ad0f7e9STom Jones
813*2ad0f7e9STom Jones union {
814*2ad0f7e9STom Jones struct iwx_tx_radiotap_header th;
815*2ad0f7e9STom Jones uint8_t pad[IEEE80211_RADIOTAP_HDRLEN];
816*2ad0f7e9STom Jones } sc_txtapu;
817*2ad0f7e9STom Jones #define sc_txtap sc_txtapu.th
818*2ad0f7e9STom Jones int sc_txtap_len;
819*2ad0f7e9STom Jones
820*2ad0f7e9STom Jones /* XXX: FreeBSD specific */
821*2ad0f7e9STom Jones struct mtx sc_mtx;
822*2ad0f7e9STom Jones struct resource *sc_mem;
823*2ad0f7e9STom Jones struct resource *sc_irq;
824*2ad0f7e9STom Jones struct intr_config_hook sc_preinit_hook;
825*2ad0f7e9STom Jones struct task sc_es_task;
826*2ad0f7e9STom Jones struct mbufq sc_snd;
827*2ad0f7e9STom Jones struct iwx_rx_ba ni_rx_ba[WME_NUM_TID];
828*2ad0f7e9STom Jones struct taskqueue *sc_tq;
829*2ad0f7e9STom Jones int (*sc_ampdu_rx_start)(struct ieee80211_node *,
830*2ad0f7e9STom Jones struct ieee80211_rx_ampdu *, int, int, int);
831*2ad0f7e9STom Jones void (*sc_ampdu_rx_stop)(struct ieee80211_node *,
832*2ad0f7e9STom Jones struct ieee80211_rx_ampdu *);
833*2ad0f7e9STom Jones int (*sc_addba_request)(struct ieee80211_node *,
834*2ad0f7e9STom Jones struct ieee80211_tx_ampdu *, int, int, int);
835*2ad0f7e9STom Jones int (*sc_addba_response)(struct ieee80211_node *,
836*2ad0f7e9STom Jones struct ieee80211_tx_ampdu *, int, int, int);
837*2ad0f7e9STom Jones struct callout watchdog_to;
838*2ad0f7e9STom Jones const struct firmware *sc_fwp;
839*2ad0f7e9STom Jones const struct firmware *sc_pnvm;
840*2ad0f7e9STom Jones
841*2ad0f7e9STom Jones struct iwx_scan_req_umac_v14 sc_umac_v14_cmd;
842*2ad0f7e9STom Jones
843*2ad0f7e9STom Jones /* This is needed to support older firmware versions */
844*2ad0f7e9STom Jones int sc_rsp_vers;
845*2ad0f7e9STom Jones union {
846*2ad0f7e9STom Jones struct iwx_nvm_get_info_rsp rsp_v4;
847*2ad0f7e9STom Jones struct iwx_nvm_get_info_rsp_v3 rsp_v3;
848*2ad0f7e9STom Jones
849*2ad0f7e9STom Jones } sc_rsp_info;
850*2ad0f7e9STom Jones uint32_t sc_debug;
851*2ad0f7e9STom Jones
852*2ad0f7e9STom Jones /* XXX-TODO addba_stop? */
853*2ad0f7e9STom Jones };
854*2ad0f7e9STom Jones
855*2ad0f7e9STom Jones #define IWX_LOCK_INIT(_sc) \
856*2ad0f7e9STom Jones mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
857*2ad0f7e9STom Jones MTX_NETWORK_LOCK, MTX_DEF);
858*2ad0f7e9STom Jones #define IWX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
859*2ad0f7e9STom Jones #define IWX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
860*2ad0f7e9STom Jones #define IWX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
861*2ad0f7e9STom Jones #define IWX_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
862*2ad0f7e9STom Jones
863*2ad0f7e9STom Jones struct iwx_vap {
864*2ad0f7e9STom Jones struct ieee80211vap iv_vap;
865*2ad0f7e9STom Jones int is_uploaded;
866*2ad0f7e9STom Jones int iv_auth;
867*2ad0f7e9STom Jones
868*2ad0f7e9STom Jones int (*iv_newstate)(struct ieee80211vap *,
869*2ad0f7e9STom Jones enum ieee80211_state, int);
870*2ad0f7e9STom Jones
871*2ad0f7e9STom Jones struct iwx_phy_ctxt *phy_ctxt;
872*2ad0f7e9STom Jones
873*2ad0f7e9STom Jones uint16_t id;
874*2ad0f7e9STom Jones uint16_t color;
875*2ad0f7e9STom Jones
876*2ad0f7e9STom Jones boolean_t have_wme;
877*2ad0f7e9STom Jones /*
878*2ad0f7e9STom Jones * QoS data from net80211, need to store this here
879*2ad0f7e9STom Jones * as net80211 has a separate callback but we need
880*2ad0f7e9STom Jones * to have the data for the MAC context
881*2ad0f7e9STom Jones */
882*2ad0f7e9STom Jones struct {
883*2ad0f7e9STom Jones uint16_t cw_min;
884*2ad0f7e9STom Jones uint16_t cw_max;
885*2ad0f7e9STom Jones uint16_t edca_txop;
886*2ad0f7e9STom Jones uint8_t aifsn;
887*2ad0f7e9STom Jones } queue_params[WME_NUM_AC];
888*2ad0f7e9STom Jones
889*2ad0f7e9STom Jones /* indicates that this interface requires PS to be disabled */
890*2ad0f7e9STom Jones boolean_t ps_disabled;
891*2ad0f7e9STom Jones };
892*2ad0f7e9STom Jones #define IWX_VAP(_vap) ((struct iwx_vap *)(_vap))
893*2ad0f7e9STom Jones
894*2ad0f7e9STom Jones struct iwx_node {
895*2ad0f7e9STom Jones struct ieee80211_node in_ni;
896*2ad0f7e9STom Jones struct iwx_phy_ctxt *in_phyctxt;
897*2ad0f7e9STom Jones uint8_t in_macaddr[ETHER_ADDR_LEN];
898*2ad0f7e9STom Jones
899*2ad0f7e9STom Jones uint16_t in_id;
900*2ad0f7e9STom Jones uint16_t in_color;
901*2ad0f7e9STom Jones
902*2ad0f7e9STom Jones struct iwx_rxq_dup_data dup_data;
903*2ad0f7e9STom Jones
904*2ad0f7e9STom Jones int in_flags;
905*2ad0f7e9STom Jones #define IWX_NODE_FLAG_HAVE_PAIRWISE_KEY 0x01
906*2ad0f7e9STom Jones #define IWX_NODE_FLAG_HAVE_GROUP_KEY 0x02
907*2ad0f7e9STom Jones };
908*2ad0f7e9STom Jones
909*2ad0f7e9STom Jones #define IWX_NODE(_ni) ((struct iwx_node *)(_ni))
910*2ad0f7e9STom Jones
911*2ad0f7e9STom Jones #define IWX_STATION_ID 0
912*2ad0f7e9STom Jones #define IWX_AUX_STA_ID 1
913*2ad0f7e9STom Jones
914*2ad0f7e9STom Jones #define IWX_DEFAULT_MACID 0
915*2ad0f7e9STom Jones #define IWX_DEFAULT_COLOR 0
916*2ad0f7e9STom Jones #define IWX_DEFAULT_TSFID 0
917*2ad0f7e9STom Jones
918*2ad0f7e9STom Jones #define IWX_STATION_ID 0
919*2ad0f7e9STom Jones #define IWX_AUX_STA_ID 1
920*2ad0f7e9STom Jones #define IWX_MONITOR_STA_ID 2
921*2ad0f7e9STom Jones
922*2ad0f7e9STom Jones #define IWX_ICT_SIZE 4096
923*2ad0f7e9STom Jones #define IWX_ICT_COUNT (IWX_ICT_SIZE / sizeof (uint32_t))
924*2ad0f7e9STom Jones #define IWX_ICT_PADDR_SHIFT 12
925