1 /* $OpenBSD: if_iwm.c,v 1.39 2015/03/23 00:35:19 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2014 genua mbh <info@genua.de> 5 * Copyright (c) 2014 Fixup Software Ltd. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Based on BSD-licensed source modules in the Linux iwlwifi driver, 22 * which were used as the reference documentation for this implementation. 23 * 24 * Driver version we are currently based off of is 25 * Linux 3.14.3 (tag id a2df521e42b1d9a23f620ac79dbfe8655a8391dd) 26 * 27 *********************************************************************** 28 * 29 * This file is provided under a dual BSD/GPLv2 license. When using or 30 * redistributing this file, you may do so under either license. 31 * 32 * GPL LICENSE SUMMARY 33 * 34 * Copyright(c) 2007 - 2013 Intel Corporation. All rights reserved. 35 * 36 * This program is free software; you can redistribute it and/or modify 37 * it under the terms of version 2 of the GNU General Public License as 38 * published by the Free Software Foundation. 39 * 40 * This program is distributed in the hope that it will be useful, but 41 * WITHOUT ANY WARRANTY; without even the implied warranty of 42 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 43 * General Public License for more details. 44 * 45 * You should have received a copy of the GNU General Public License 46 * along with this program; if not, write to the Free Software 47 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 48 * USA 49 * 50 * The full GNU General Public License is included in this distribution 51 * in the file called COPYING. 52 * 53 * Contact Information: 54 * Intel Linux Wireless <ilw@linux.intel.com> 55 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 56 * 57 * 58 * BSD LICENSE 59 * 60 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 67 * * Redistributions of source code must retain the above copyright 68 * notice, this list of conditions and the following disclaimer. 69 * * Redistributions in binary form must reproduce the above copyright 70 * notice, this list of conditions and the following disclaimer in 71 * the documentation and/or other materials provided with the 72 * distribution. 73 * * Neither the name Intel Corporation nor the names of its 74 * contributors may be used to endorse or promote products derived 75 * from this software without specific prior written permission. 76 * 77 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 78 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 79 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 80 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 81 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 82 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 83 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 84 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 85 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 86 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 87 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 88 */ 89 90 /*- 91 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr> 92 * 93 * Permission to use, copy, modify, and distribute this software for any 94 * purpose with or without fee is hereby granted, provided that the above 95 * copyright notice and this permission notice appear in all copies. 96 * 97 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 98 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 99 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 100 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 101 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 102 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 103 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 104 */ 105 #include <sys/cdefs.h> 106 __FBSDID("$FreeBSD$"); 107 108 #include <sys/param.h> 109 #include <sys/bus.h> 110 #include <sys/conf.h> 111 #include <sys/endian.h> 112 #include <sys/firmware.h> 113 #include <sys/kernel.h> 114 #include <sys/malloc.h> 115 #include <sys/mbuf.h> 116 #include <sys/mutex.h> 117 #include <sys/module.h> 118 #include <sys/proc.h> 119 #include <sys/rman.h> 120 #include <sys/socket.h> 121 #include <sys/sockio.h> 122 #include <sys/sysctl.h> 123 #include <sys/linker.h> 124 125 #include <machine/bus.h> 126 #include <machine/endian.h> 127 #include <machine/resource.h> 128 129 #include <dev/pci/pcivar.h> 130 #include <dev/pci/pcireg.h> 131 132 #include <net/bpf.h> 133 134 #include <net/if.h> 135 #include <net/if_var.h> 136 #include <net/if_arp.h> 137 #include <net/if_dl.h> 138 #include <net/if_media.h> 139 #include <net/if_types.h> 140 141 #include <netinet/in.h> 142 #include <netinet/in_systm.h> 143 #include <netinet/if_ether.h> 144 #include <netinet/ip.h> 145 146 #include <net80211/ieee80211_var.h> 147 #include <net80211/ieee80211_regdomain.h> 148 #include <net80211/ieee80211_ratectl.h> 149 #include <net80211/ieee80211_radiotap.h> 150 151 #include <dev/iwm/if_iwmreg.h> 152 #include <dev/iwm/if_iwmvar.h> 153 #include <dev/iwm/if_iwm_debug.h> 154 #include <dev/iwm/if_iwm_util.h> 155 #include <dev/iwm/if_iwm_binding.h> 156 #include <dev/iwm/if_iwm_phy_db.h> 157 #include <dev/iwm/if_iwm_mac_ctxt.h> 158 #include <dev/iwm/if_iwm_phy_ctxt.h> 159 #include <dev/iwm/if_iwm_time_event.h> 160 #include <dev/iwm/if_iwm_power.h> 161 #include <dev/iwm/if_iwm_scan.h> 162 163 #include <dev/iwm/if_iwm_pcie_trans.h> 164 165 const uint8_t iwm_nvm_channels[] = { 166 /* 2.4 GHz */ 167 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 168 /* 5 GHz */ 169 36, 40, 44 , 48, 52, 56, 60, 64, 170 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 171 149, 153, 157, 161, 165 172 }; 173 #define IWM_NUM_2GHZ_CHANNELS 14 174 175 /* 176 * XXX For now, there's simply a fixed set of rate table entries 177 * that are populated. 178 */ 179 const struct iwm_rate { 180 uint8_t rate; 181 uint8_t plcp; 182 } iwm_rates[] = { 183 { 2, IWM_RATE_1M_PLCP }, 184 { 4, IWM_RATE_2M_PLCP }, 185 { 11, IWM_RATE_5M_PLCP }, 186 { 22, IWM_RATE_11M_PLCP }, 187 { 12, IWM_RATE_6M_PLCP }, 188 { 18, IWM_RATE_9M_PLCP }, 189 { 24, IWM_RATE_12M_PLCP }, 190 { 36, IWM_RATE_18M_PLCP }, 191 { 48, IWM_RATE_24M_PLCP }, 192 { 72, IWM_RATE_36M_PLCP }, 193 { 96, IWM_RATE_48M_PLCP }, 194 { 108, IWM_RATE_54M_PLCP }, 195 }; 196 #define IWM_RIDX_CCK 0 197 #define IWM_RIDX_OFDM 4 198 #define IWM_RIDX_MAX (nitems(iwm_rates)-1) 199 #define IWM_RIDX_IS_CCK(_i_) ((_i_) < IWM_RIDX_OFDM) 200 #define IWM_RIDX_IS_OFDM(_i_) ((_i_) >= IWM_RIDX_OFDM) 201 202 static int iwm_store_cscheme(struct iwm_softc *, const uint8_t *, size_t); 203 static int iwm_firmware_store_section(struct iwm_softc *, 204 enum iwm_ucode_type, 205 const uint8_t *, size_t); 206 static int iwm_set_default_calib(struct iwm_softc *, const void *); 207 static void iwm_fw_info_free(struct iwm_fw_info *); 208 static int iwm_read_firmware(struct iwm_softc *, enum iwm_ucode_type); 209 static void iwm_dma_map_addr(void *, bus_dma_segment_t *, int, int); 210 static int iwm_dma_contig_alloc(bus_dma_tag_t, struct iwm_dma_info *, 211 bus_size_t, bus_size_t); 212 static void iwm_dma_contig_free(struct iwm_dma_info *); 213 static int iwm_alloc_fwmem(struct iwm_softc *); 214 static void iwm_free_fwmem(struct iwm_softc *); 215 static int iwm_alloc_sched(struct iwm_softc *); 216 static void iwm_free_sched(struct iwm_softc *); 217 static int iwm_alloc_kw(struct iwm_softc *); 218 static void iwm_free_kw(struct iwm_softc *); 219 static int iwm_alloc_ict(struct iwm_softc *); 220 static void iwm_free_ict(struct iwm_softc *); 221 static int iwm_alloc_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 222 static void iwm_reset_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 223 static void iwm_free_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 224 static int iwm_alloc_tx_ring(struct iwm_softc *, struct iwm_tx_ring *, 225 int); 226 static void iwm_reset_tx_ring(struct iwm_softc *, struct iwm_tx_ring *); 227 static void iwm_free_tx_ring(struct iwm_softc *, struct iwm_tx_ring *); 228 static void iwm_enable_interrupts(struct iwm_softc *); 229 static void iwm_restore_interrupts(struct iwm_softc *); 230 static void iwm_disable_interrupts(struct iwm_softc *); 231 static void iwm_ict_reset(struct iwm_softc *); 232 static int iwm_allow_mcast(struct ieee80211vap *, struct iwm_softc *); 233 static void iwm_stop_device(struct iwm_softc *); 234 static void iwm_mvm_nic_config(struct iwm_softc *); 235 static int iwm_nic_rx_init(struct iwm_softc *); 236 static int iwm_nic_tx_init(struct iwm_softc *); 237 static int iwm_nic_init(struct iwm_softc *); 238 static void iwm_enable_txq(struct iwm_softc *, int, int); 239 static int iwm_post_alive(struct iwm_softc *); 240 static int iwm_nvm_read_chunk(struct iwm_softc *, uint16_t, uint16_t, 241 uint16_t, uint8_t *, uint16_t *); 242 static int iwm_nvm_read_section(struct iwm_softc *, uint16_t, uint8_t *, 243 uint16_t *); 244 static void iwm_init_channel_map(struct iwm_softc *, 245 const uint16_t * const); 246 static int iwm_parse_nvm_data(struct iwm_softc *, const uint16_t *, 247 const uint16_t *, const uint16_t *, uint8_t, 248 uint8_t); 249 struct iwm_nvm_section; 250 static int iwm_parse_nvm_sections(struct iwm_softc *, 251 struct iwm_nvm_section *); 252 static int iwm_nvm_init(struct iwm_softc *); 253 static int iwm_firmware_load_chunk(struct iwm_softc *, uint32_t, 254 const uint8_t *, uint32_t); 255 static int iwm_load_firmware(struct iwm_softc *, enum iwm_ucode_type); 256 static int iwm_start_fw(struct iwm_softc *, enum iwm_ucode_type); 257 static int iwm_fw_alive(struct iwm_softc *, uint32_t); 258 static int iwm_send_tx_ant_cfg(struct iwm_softc *, uint8_t); 259 static int iwm_send_phy_cfg_cmd(struct iwm_softc *); 260 static int iwm_mvm_load_ucode_wait_alive(struct iwm_softc *, 261 enum iwm_ucode_type); 262 static int iwm_run_init_mvm_ucode(struct iwm_softc *, int); 263 static int iwm_rx_addbuf(struct iwm_softc *, int, int); 264 static int iwm_mvm_calc_rssi(struct iwm_softc *, struct iwm_rx_phy_info *); 265 static int iwm_mvm_get_signal_strength(struct iwm_softc *, 266 struct iwm_rx_phy_info *); 267 static void iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *, 268 struct iwm_rx_packet *, 269 struct iwm_rx_data *); 270 static int iwm_get_noise(const struct iwm_mvm_statistics_rx_non_phy *); 271 static void iwm_mvm_rx_rx_mpdu(struct iwm_softc *, struct iwm_rx_packet *, 272 struct iwm_rx_data *); 273 static void iwm_mvm_rx_tx_cmd_single(struct iwm_softc *, 274 struct iwm_rx_packet *, 275 struct iwm_node *); 276 static void iwm_mvm_rx_tx_cmd(struct iwm_softc *, struct iwm_rx_packet *, 277 struct iwm_rx_data *); 278 static void iwm_cmd_done(struct iwm_softc *, struct iwm_rx_packet *); 279 #if 0 280 static void iwm_update_sched(struct iwm_softc *, int, int, uint8_t, 281 uint16_t); 282 #endif 283 static const struct iwm_rate * 284 iwm_tx_fill_cmd(struct iwm_softc *, struct iwm_node *, 285 struct ieee80211_frame *, struct iwm_tx_cmd *); 286 static int iwm_tx(struct iwm_softc *, struct mbuf *, 287 struct ieee80211_node *, int); 288 static int iwm_raw_xmit(struct ieee80211_node *, struct mbuf *, 289 const struct ieee80211_bpf_params *); 290 static void iwm_mvm_add_sta_cmd_v6_to_v5(struct iwm_mvm_add_sta_cmd_v6 *, 291 struct iwm_mvm_add_sta_cmd_v5 *); 292 static int iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *, 293 struct iwm_mvm_add_sta_cmd_v6 *, 294 int *); 295 static int iwm_mvm_sta_send_to_fw(struct iwm_softc *, struct iwm_node *, 296 int); 297 static int iwm_mvm_add_sta(struct iwm_softc *, struct iwm_node *); 298 static int iwm_mvm_update_sta(struct iwm_softc *, struct iwm_node *); 299 static int iwm_mvm_add_int_sta_common(struct iwm_softc *, 300 struct iwm_int_sta *, 301 const uint8_t *, uint16_t, uint16_t); 302 static int iwm_mvm_add_aux_sta(struct iwm_softc *); 303 static int iwm_mvm_update_quotas(struct iwm_softc *, struct iwm_node *); 304 static int iwm_auth(struct ieee80211vap *, struct iwm_softc *); 305 static int iwm_assoc(struct ieee80211vap *, struct iwm_softc *); 306 static int iwm_release(struct iwm_softc *, struct iwm_node *); 307 static struct ieee80211_node * 308 iwm_node_alloc(struct ieee80211vap *, 309 const uint8_t[IEEE80211_ADDR_LEN]); 310 static void iwm_setrates(struct iwm_softc *, struct iwm_node *); 311 static int iwm_media_change(struct ifnet *); 312 static int iwm_newstate(struct ieee80211vap *, enum ieee80211_state, int); 313 static void iwm_endscan_cb(void *, int); 314 static int iwm_init_hw(struct iwm_softc *); 315 static void iwm_init(void *); 316 static void iwm_init_locked(struct iwm_softc *); 317 static void iwm_start(struct ifnet *); 318 static void iwm_start_locked(struct ifnet *); 319 static void iwm_stop(struct ifnet *, int); 320 static void iwm_stop_locked(struct ifnet *); 321 static void iwm_watchdog(void *); 322 static int iwm_ioctl(struct ifnet *, u_long, iwm_caddr_t); 323 #ifdef IWM_DEBUG 324 static const char * 325 iwm_desc_lookup(uint32_t); 326 static void iwm_nic_error(struct iwm_softc *); 327 #endif 328 static void iwm_notif_intr(struct iwm_softc *); 329 static void iwm_intr(void *); 330 static int iwm_attach(device_t); 331 static void iwm_preinit(void *); 332 static int iwm_detach_local(struct iwm_softc *sc, int); 333 static void iwm_init_task(void *); 334 static void iwm_radiotap_attach(struct iwm_softc *); 335 static struct ieee80211vap * 336 iwm_vap_create(struct ieee80211com *, 337 const char [IFNAMSIZ], int, 338 enum ieee80211_opmode, int, 339 const uint8_t [IEEE80211_ADDR_LEN], 340 const uint8_t [IEEE80211_ADDR_LEN]); 341 static void iwm_vap_delete(struct ieee80211vap *); 342 static void iwm_scan_start(struct ieee80211com *); 343 static void iwm_scan_end(struct ieee80211com *); 344 static void iwm_update_mcast(struct ieee80211com *); 345 static void iwm_set_channel(struct ieee80211com *); 346 static void iwm_scan_curchan(struct ieee80211_scan_state *, unsigned long); 347 static void iwm_scan_mindwell(struct ieee80211_scan_state *); 348 static int iwm_detach(device_t); 349 350 /* 351 * Firmware parser. 352 */ 353 354 static int 355 iwm_store_cscheme(struct iwm_softc *sc, const uint8_t *data, size_t dlen) 356 { 357 const struct iwm_fw_cscheme_list *l = (const void *)data; 358 359 if (dlen < sizeof(*l) || 360 dlen < sizeof(l->size) + l->size * sizeof(*l->cs)) 361 return EINVAL; 362 363 /* we don't actually store anything for now, always use s/w crypto */ 364 365 return 0; 366 } 367 368 static int 369 iwm_firmware_store_section(struct iwm_softc *sc, 370 enum iwm_ucode_type type, const uint8_t *data, size_t dlen) 371 { 372 struct iwm_fw_sects *fws; 373 struct iwm_fw_onesect *fwone; 374 375 if (type >= IWM_UCODE_TYPE_MAX) 376 return EINVAL; 377 if (dlen < sizeof(uint32_t)) 378 return EINVAL; 379 380 fws = &sc->sc_fw.fw_sects[type]; 381 if (fws->fw_count >= IWM_UCODE_SECT_MAX) 382 return EINVAL; 383 384 fwone = &fws->fw_sect[fws->fw_count]; 385 386 /* first 32bit are device load offset */ 387 memcpy(&fwone->fws_devoff, data, sizeof(uint32_t)); 388 389 /* rest is data */ 390 fwone->fws_data = data + sizeof(uint32_t); 391 fwone->fws_len = dlen - sizeof(uint32_t); 392 393 fws->fw_count++; 394 fws->fw_totlen += fwone->fws_len; 395 396 return 0; 397 } 398 399 /* iwlwifi: iwl-drv.c */ 400 struct iwm_tlv_calib_data { 401 uint32_t ucode_type; 402 struct iwm_tlv_calib_ctrl calib; 403 } __packed; 404 405 static int 406 iwm_set_default_calib(struct iwm_softc *sc, const void *data) 407 { 408 const struct iwm_tlv_calib_data *def_calib = data; 409 uint32_t ucode_type = le32toh(def_calib->ucode_type); 410 411 if (ucode_type >= IWM_UCODE_TYPE_MAX) { 412 device_printf(sc->sc_dev, 413 "Wrong ucode_type %u for default " 414 "calibration.\n", ucode_type); 415 return EINVAL; 416 } 417 418 sc->sc_default_calib[ucode_type].flow_trigger = 419 def_calib->calib.flow_trigger; 420 sc->sc_default_calib[ucode_type].event_trigger = 421 def_calib->calib.event_trigger; 422 423 return 0; 424 } 425 426 static void 427 iwm_fw_info_free(struct iwm_fw_info *fw) 428 { 429 firmware_put(fw->fw_rawdata, FIRMWARE_UNLOAD); 430 fw->fw_rawdata = NULL; 431 fw->fw_rawsize = 0; 432 /* don't touch fw->fw_status */ 433 memset(fw->fw_sects, 0, sizeof(fw->fw_sects)); 434 } 435 436 static int 437 iwm_read_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 438 { 439 struct iwm_fw_info *fw = &sc->sc_fw; 440 const struct iwm_tlv_ucode_header *uhdr; 441 struct iwm_ucode_tlv tlv; 442 enum iwm_ucode_tlv_type tlv_type; 443 const struct firmware *fwp; 444 const uint8_t *data; 445 int error = 0; 446 size_t len; 447 448 if (fw->fw_status == IWM_FW_STATUS_DONE && 449 ucode_type != IWM_UCODE_TYPE_INIT) 450 return 0; 451 452 while (fw->fw_status == IWM_FW_STATUS_INPROGRESS) 453 msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfwp", 0); 454 fw->fw_status = IWM_FW_STATUS_INPROGRESS; 455 456 if (fw->fw_rawdata != NULL) 457 iwm_fw_info_free(fw); 458 459 /* 460 * Load firmware into driver memory. 461 * fw_rawdata and fw_rawsize will be set. 462 */ 463 IWM_UNLOCK(sc); 464 fwp = firmware_get(sc->sc_fwname); 465 if (fwp == NULL) { 466 device_printf(sc->sc_dev, 467 "could not read firmware %s (error %d)\n", 468 sc->sc_fwname, error); 469 IWM_LOCK(sc); 470 goto out; 471 } 472 IWM_LOCK(sc); 473 fw->fw_rawdata = fwp->data; 474 fw->fw_rawsize = fwp->datasize; 475 476 /* 477 * Parse firmware contents 478 */ 479 480 uhdr = (const void *)fw->fw_rawdata; 481 if (*(const uint32_t *)fw->fw_rawdata != 0 482 || le32toh(uhdr->magic) != IWM_TLV_UCODE_MAGIC) { 483 device_printf(sc->sc_dev, "invalid firmware %s\n", 484 sc->sc_fwname); 485 error = EINVAL; 486 goto out; 487 } 488 489 sc->sc_fwver = le32toh(uhdr->ver); 490 data = uhdr->data; 491 len = fw->fw_rawsize - sizeof(*uhdr); 492 493 while (len >= sizeof(tlv)) { 494 size_t tlv_len; 495 const void *tlv_data; 496 497 memcpy(&tlv, data, sizeof(tlv)); 498 tlv_len = le32toh(tlv.length); 499 tlv_type = le32toh(tlv.type); 500 501 len -= sizeof(tlv); 502 data += sizeof(tlv); 503 tlv_data = data; 504 505 if (len < tlv_len) { 506 device_printf(sc->sc_dev, 507 "firmware too short: %zu bytes\n", 508 len); 509 error = EINVAL; 510 goto parse_out; 511 } 512 513 switch ((int)tlv_type) { 514 case IWM_UCODE_TLV_PROBE_MAX_LEN: 515 if (tlv_len < sizeof(uint32_t)) { 516 device_printf(sc->sc_dev, 517 "%s: PROBE_MAX_LEN (%d) < sizeof(uint32_t)\n", 518 __func__, 519 (int) tlv_len); 520 error = EINVAL; 521 goto parse_out; 522 } 523 sc->sc_capa_max_probe_len 524 = le32toh(*(const uint32_t *)tlv_data); 525 /* limit it to something sensible */ 526 if (sc->sc_capa_max_probe_len > (1<<16)) { 527 IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV, 528 "%s: IWM_UCODE_TLV_PROBE_MAX_LEN " 529 "ridiculous\n", __func__); 530 error = EINVAL; 531 goto parse_out; 532 } 533 break; 534 case IWM_UCODE_TLV_PAN: 535 if (tlv_len) { 536 device_printf(sc->sc_dev, 537 "%s: IWM_UCODE_TLV_PAN: tlv_len (%d) > 0\n", 538 __func__, 539 (int) tlv_len); 540 error = EINVAL; 541 goto parse_out; 542 } 543 sc->sc_capaflags |= IWM_UCODE_TLV_FLAGS_PAN; 544 break; 545 case IWM_UCODE_TLV_FLAGS: 546 if (tlv_len < sizeof(uint32_t)) { 547 device_printf(sc->sc_dev, 548 "%s: IWM_UCODE_TLV_FLAGS: tlv_len (%d) < sizeof(uint32_t)\n", 549 __func__, 550 (int) tlv_len); 551 error = EINVAL; 552 goto parse_out; 553 } 554 /* 555 * Apparently there can be many flags, but Linux driver 556 * parses only the first one, and so do we. 557 * 558 * XXX: why does this override IWM_UCODE_TLV_PAN? 559 * Intentional or a bug? Observations from 560 * current firmware file: 561 * 1) TLV_PAN is parsed first 562 * 2) TLV_FLAGS contains TLV_FLAGS_PAN 563 * ==> this resets TLV_PAN to itself... hnnnk 564 */ 565 sc->sc_capaflags = le32toh(*(const uint32_t *)tlv_data); 566 break; 567 case IWM_UCODE_TLV_CSCHEME: 568 if ((error = iwm_store_cscheme(sc, 569 tlv_data, tlv_len)) != 0) { 570 device_printf(sc->sc_dev, 571 "%s: iwm_store_cscheme(): returned %d\n", 572 __func__, 573 error); 574 goto parse_out; 575 } 576 break; 577 case IWM_UCODE_TLV_NUM_OF_CPU: 578 if (tlv_len != sizeof(uint32_t)) { 579 device_printf(sc->sc_dev, 580 "%s: IWM_UCODE_TLV_NUM_OF_CPU: tlv_len (%d) < sizeof(uint32_t)\n", 581 __func__, 582 (int) tlv_len); 583 error = EINVAL; 584 goto parse_out; 585 } 586 if (le32toh(*(const uint32_t*)tlv_data) != 1) { 587 device_printf(sc->sc_dev, 588 "%s: driver supports " 589 "only TLV_NUM_OF_CPU == 1", 590 __func__); 591 error = EINVAL; 592 goto parse_out; 593 } 594 break; 595 case IWM_UCODE_TLV_SEC_RT: 596 if ((error = iwm_firmware_store_section(sc, 597 IWM_UCODE_TYPE_REGULAR, tlv_data, tlv_len)) != 0) { 598 device_printf(sc->sc_dev, 599 "%s: IWM_UCODE_TYPE_REGULAR: iwm_firmware_store_section() failed; %d\n", 600 __func__, 601 error); 602 goto parse_out; 603 } 604 break; 605 case IWM_UCODE_TLV_SEC_INIT: 606 if ((error = iwm_firmware_store_section(sc, 607 IWM_UCODE_TYPE_INIT, tlv_data, tlv_len)) != 0) { 608 device_printf(sc->sc_dev, 609 "%s: IWM_UCODE_TYPE_INIT: iwm_firmware_store_section() failed; %d\n", 610 __func__, 611 error); 612 goto parse_out; 613 } 614 break; 615 case IWM_UCODE_TLV_SEC_WOWLAN: 616 if ((error = iwm_firmware_store_section(sc, 617 IWM_UCODE_TYPE_WOW, tlv_data, tlv_len)) != 0) { 618 device_printf(sc->sc_dev, 619 "%s: IWM_UCODE_TYPE_WOW: iwm_firmware_store_section() failed; %d\n", 620 __func__, 621 error); 622 goto parse_out; 623 } 624 break; 625 case IWM_UCODE_TLV_DEF_CALIB: 626 if (tlv_len != sizeof(struct iwm_tlv_calib_data)) { 627 device_printf(sc->sc_dev, 628 "%s: IWM_UCODE_TLV_DEV_CALIB: tlv_len (%d) < sizeof(iwm_tlv_calib_data) (%d)\n", 629 __func__, 630 (int) tlv_len, 631 (int) sizeof(struct iwm_tlv_calib_data)); 632 error = EINVAL; 633 goto parse_out; 634 } 635 if ((error = iwm_set_default_calib(sc, tlv_data)) != 0) { 636 device_printf(sc->sc_dev, 637 "%s: iwm_set_default_calib() failed: %d\n", 638 __func__, 639 error); 640 goto parse_out; 641 } 642 break; 643 case IWM_UCODE_TLV_PHY_SKU: 644 if (tlv_len != sizeof(uint32_t)) { 645 error = EINVAL; 646 device_printf(sc->sc_dev, 647 "%s: IWM_UCODE_TLV_PHY_SKU: tlv_len (%d) < sizeof(uint32_t)\n", 648 __func__, 649 (int) tlv_len); 650 goto parse_out; 651 } 652 sc->sc_fw_phy_config = 653 le32toh(*(const uint32_t *)tlv_data); 654 break; 655 656 case IWM_UCODE_TLV_API_CHANGES_SET: 657 case IWM_UCODE_TLV_ENABLED_CAPABILITIES: 658 /* ignore, not used by current driver */ 659 break; 660 661 default: 662 device_printf(sc->sc_dev, 663 "%s: unknown firmware section %d, abort\n", 664 __func__, tlv_type); 665 error = EINVAL; 666 goto parse_out; 667 } 668 669 len -= roundup(tlv_len, 4); 670 data += roundup(tlv_len, 4); 671 } 672 673 KASSERT(error == 0, ("unhandled error")); 674 675 parse_out: 676 if (error) { 677 device_printf(sc->sc_dev, "firmware parse error %d, " 678 "section type %d\n", error, tlv_type); 679 } 680 681 if (!(sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_PM_CMD_SUPPORT)) { 682 device_printf(sc->sc_dev, 683 "device uses unsupported power ops\n"); 684 error = ENOTSUP; 685 } 686 687 out: 688 if (error) { 689 fw->fw_status = IWM_FW_STATUS_NONE; 690 if (fw->fw_rawdata != NULL) 691 iwm_fw_info_free(fw); 692 } else 693 fw->fw_status = IWM_FW_STATUS_DONE; 694 wakeup(&sc->sc_fw); 695 696 return error; 697 } 698 699 /* 700 * DMA resource routines 701 */ 702 703 static void 704 iwm_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 705 { 706 if (error != 0) 707 return; 708 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs)); 709 *(bus_addr_t *)arg = segs[0].ds_addr; 710 } 711 712 static int 713 iwm_dma_contig_alloc(bus_dma_tag_t tag, struct iwm_dma_info *dma, 714 bus_size_t size, bus_size_t alignment) 715 { 716 int error; 717 718 dma->tag = NULL; 719 dma->size = size; 720 721 error = bus_dma_tag_create(tag, alignment, 722 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size, 723 1, size, BUS_DMA_NOWAIT, NULL, NULL, &dma->tag); 724 if (error != 0) 725 goto fail; 726 727 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, 728 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map); 729 if (error != 0) 730 goto fail; 731 732 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size, 733 iwm_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT); 734 if (error != 0) 735 goto fail; 736 737 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 738 739 return 0; 740 741 fail: iwm_dma_contig_free(dma); 742 return error; 743 } 744 745 static void 746 iwm_dma_contig_free(struct iwm_dma_info *dma) 747 { 748 if (dma->map != NULL) { 749 if (dma->vaddr != NULL) { 750 bus_dmamap_sync(dma->tag, dma->map, 751 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 752 bus_dmamap_unload(dma->tag, dma->map); 753 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 754 dma->vaddr = NULL; 755 } 756 bus_dmamap_destroy(dma->tag, dma->map); 757 dma->map = NULL; 758 } 759 if (dma->tag != NULL) { 760 bus_dma_tag_destroy(dma->tag); 761 dma->tag = NULL; 762 } 763 764 } 765 766 /* fwmem is used to load firmware onto the card */ 767 static int 768 iwm_alloc_fwmem(struct iwm_softc *sc) 769 { 770 /* Must be aligned on a 16-byte boundary. */ 771 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, 772 sc->sc_fwdmasegsz, 16); 773 } 774 775 static void 776 iwm_free_fwmem(struct iwm_softc *sc) 777 { 778 iwm_dma_contig_free(&sc->fw_dma); 779 } 780 781 /* tx scheduler rings. not used? */ 782 static int 783 iwm_alloc_sched(struct iwm_softc *sc) 784 { 785 int rv; 786 787 /* TX scheduler rings must be aligned on a 1KB boundary. */ 788 rv = iwm_dma_contig_alloc(sc->sc_dmat, &sc->sched_dma, 789 nitems(sc->txq) * sizeof(struct iwm_agn_scd_bc_tbl), 1024); 790 return rv; 791 } 792 793 static void 794 iwm_free_sched(struct iwm_softc *sc) 795 { 796 iwm_dma_contig_free(&sc->sched_dma); 797 } 798 799 /* keep-warm page is used internally by the card. see iwl-fh.h for more info */ 800 static int 801 iwm_alloc_kw(struct iwm_softc *sc) 802 { 803 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, 4096, 4096); 804 } 805 806 static void 807 iwm_free_kw(struct iwm_softc *sc) 808 { 809 iwm_dma_contig_free(&sc->kw_dma); 810 } 811 812 /* interrupt cause table */ 813 static int 814 iwm_alloc_ict(struct iwm_softc *sc) 815 { 816 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma, 817 IWM_ICT_SIZE, 1<<IWM_ICT_PADDR_SHIFT); 818 } 819 820 static void 821 iwm_free_ict(struct iwm_softc *sc) 822 { 823 iwm_dma_contig_free(&sc->ict_dma); 824 } 825 826 static int 827 iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 828 { 829 bus_size_t size; 830 int i, error; 831 832 ring->cur = 0; 833 834 /* Allocate RX descriptors (256-byte aligned). */ 835 size = IWM_RX_RING_COUNT * sizeof(uint32_t); 836 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256); 837 if (error != 0) { 838 device_printf(sc->sc_dev, 839 "could not allocate RX ring DMA memory\n"); 840 goto fail; 841 } 842 ring->desc = ring->desc_dma.vaddr; 843 844 /* Allocate RX status area (16-byte aligned). */ 845 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma, 846 sizeof(*ring->stat), 16); 847 if (error != 0) { 848 device_printf(sc->sc_dev, 849 "could not allocate RX status DMA memory\n"); 850 goto fail; 851 } 852 ring->stat = ring->stat_dma.vaddr; 853 854 /* Create RX buffer DMA tag. */ 855 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 856 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 857 IWM_RBUF_SIZE, 1, IWM_RBUF_SIZE, BUS_DMA_NOWAIT, NULL, NULL, 858 &ring->data_dmat); 859 if (error != 0) { 860 device_printf(sc->sc_dev, 861 "%s: could not create RX buf DMA tag, error %d\n", 862 __func__, error); 863 goto fail; 864 } 865 866 /* 867 * Allocate and map RX buffers. 868 */ 869 for (i = 0; i < IWM_RX_RING_COUNT; i++) { 870 if ((error = iwm_rx_addbuf(sc, IWM_RBUF_SIZE, i)) != 0) { 871 goto fail; 872 } 873 } 874 return 0; 875 876 fail: iwm_free_rx_ring(sc, ring); 877 return error; 878 } 879 880 static void 881 iwm_reset_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 882 { 883 884 /* XXX print out if we can't lock the NIC? */ 885 if (iwm_nic_lock(sc)) { 886 /* XXX handle if RX stop doesn't finish? */ 887 (void) iwm_pcie_rx_stop(sc); 888 iwm_nic_unlock(sc); 889 } 890 ring->cur = 0; 891 } 892 893 static void 894 iwm_free_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 895 { 896 int i; 897 898 iwm_dma_contig_free(&ring->desc_dma); 899 iwm_dma_contig_free(&ring->stat_dma); 900 901 for (i = 0; i < IWM_RX_RING_COUNT; i++) { 902 struct iwm_rx_data *data = &ring->data[i]; 903 904 if (data->m != NULL) { 905 bus_dmamap_sync(ring->data_dmat, data->map, 906 BUS_DMASYNC_POSTREAD); 907 bus_dmamap_unload(ring->data_dmat, data->map); 908 m_freem(data->m); 909 data->m = NULL; 910 } 911 if (data->map != NULL) { 912 bus_dmamap_destroy(ring->data_dmat, data->map); 913 data->map = NULL; 914 } 915 } 916 if (ring->data_dmat != NULL) { 917 bus_dma_tag_destroy(ring->data_dmat); 918 ring->data_dmat = NULL; 919 } 920 } 921 922 static int 923 iwm_alloc_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring, int qid) 924 { 925 bus_addr_t paddr; 926 bus_size_t size; 927 int i, error; 928 929 ring->qid = qid; 930 ring->queued = 0; 931 ring->cur = 0; 932 933 /* Allocate TX descriptors (256-byte aligned). */ 934 size = IWM_TX_RING_COUNT * sizeof (struct iwm_tfd); 935 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256); 936 if (error != 0) { 937 device_printf(sc->sc_dev, 938 "could not allocate TX ring DMA memory\n"); 939 goto fail; 940 } 941 ring->desc = ring->desc_dma.vaddr; 942 943 /* 944 * We only use rings 0 through 9 (4 EDCA + cmd) so there is no need 945 * to allocate commands space for other rings. 946 */ 947 if (qid > IWM_MVM_CMD_QUEUE) 948 return 0; 949 950 size = IWM_TX_RING_COUNT * sizeof(struct iwm_device_cmd); 951 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma, size, 4); 952 if (error != 0) { 953 device_printf(sc->sc_dev, 954 "could not allocate TX cmd DMA memory\n"); 955 goto fail; 956 } 957 ring->cmd = ring->cmd_dma.vaddr; 958 959 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 960 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 961 IWM_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, NULL, NULL, 962 &ring->data_dmat); 963 if (error != 0) { 964 device_printf(sc->sc_dev, "could not create TX buf DMA tag\n"); 965 goto fail; 966 } 967 968 paddr = ring->cmd_dma.paddr; 969 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 970 struct iwm_tx_data *data = &ring->data[i]; 971 972 data->cmd_paddr = paddr; 973 data->scratch_paddr = paddr + sizeof(struct iwm_cmd_header) 974 + offsetof(struct iwm_tx_cmd, scratch); 975 paddr += sizeof(struct iwm_device_cmd); 976 977 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 978 if (error != 0) { 979 device_printf(sc->sc_dev, 980 "could not create TX buf DMA map\n"); 981 goto fail; 982 } 983 } 984 KASSERT(paddr == ring->cmd_dma.paddr + size, 985 ("invalid physical address")); 986 return 0; 987 988 fail: iwm_free_tx_ring(sc, ring); 989 return error; 990 } 991 992 static void 993 iwm_reset_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring) 994 { 995 int i; 996 997 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 998 struct iwm_tx_data *data = &ring->data[i]; 999 1000 if (data->m != NULL) { 1001 bus_dmamap_sync(ring->data_dmat, data->map, 1002 BUS_DMASYNC_POSTWRITE); 1003 bus_dmamap_unload(ring->data_dmat, data->map); 1004 m_freem(data->m); 1005 data->m = NULL; 1006 } 1007 } 1008 /* Clear TX descriptors. */ 1009 memset(ring->desc, 0, ring->desc_dma.size); 1010 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 1011 BUS_DMASYNC_PREWRITE); 1012 sc->qfullmsk &= ~(1 << ring->qid); 1013 ring->queued = 0; 1014 ring->cur = 0; 1015 } 1016 1017 static void 1018 iwm_free_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring) 1019 { 1020 int i; 1021 1022 iwm_dma_contig_free(&ring->desc_dma); 1023 iwm_dma_contig_free(&ring->cmd_dma); 1024 1025 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 1026 struct iwm_tx_data *data = &ring->data[i]; 1027 1028 if (data->m != NULL) { 1029 bus_dmamap_sync(ring->data_dmat, data->map, 1030 BUS_DMASYNC_POSTWRITE); 1031 bus_dmamap_unload(ring->data_dmat, data->map); 1032 m_freem(data->m); 1033 data->m = NULL; 1034 } 1035 if (data->map != NULL) { 1036 bus_dmamap_destroy(ring->data_dmat, data->map); 1037 data->map = NULL; 1038 } 1039 } 1040 if (ring->data_dmat != NULL) { 1041 bus_dma_tag_destroy(ring->data_dmat); 1042 ring->data_dmat = NULL; 1043 } 1044 } 1045 1046 /* 1047 * High-level hardware frobbing routines 1048 */ 1049 1050 static void 1051 iwm_enable_interrupts(struct iwm_softc *sc) 1052 { 1053 sc->sc_intmask = IWM_CSR_INI_SET_MASK; 1054 IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask); 1055 } 1056 1057 static void 1058 iwm_restore_interrupts(struct iwm_softc *sc) 1059 { 1060 IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask); 1061 } 1062 1063 static void 1064 iwm_disable_interrupts(struct iwm_softc *sc) 1065 { 1066 /* disable interrupts */ 1067 IWM_WRITE(sc, IWM_CSR_INT_MASK, 0); 1068 1069 /* acknowledge all interrupts */ 1070 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1071 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, ~0); 1072 } 1073 1074 static void 1075 iwm_ict_reset(struct iwm_softc *sc) 1076 { 1077 iwm_disable_interrupts(sc); 1078 1079 /* Reset ICT table. */ 1080 memset(sc->ict_dma.vaddr, 0, IWM_ICT_SIZE); 1081 sc->ict_cur = 0; 1082 1083 /* Set physical address of ICT table (4KB aligned). */ 1084 IWM_WRITE(sc, IWM_CSR_DRAM_INT_TBL_REG, 1085 IWM_CSR_DRAM_INT_TBL_ENABLE 1086 | IWM_CSR_DRAM_INIT_TBL_WRAP_CHECK 1087 | sc->ict_dma.paddr >> IWM_ICT_PADDR_SHIFT); 1088 1089 /* Switch to ICT interrupt mode in driver. */ 1090 sc->sc_flags |= IWM_FLAG_USE_ICT; 1091 1092 /* Re-enable interrupts. */ 1093 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1094 iwm_enable_interrupts(sc); 1095 } 1096 1097 /* iwlwifi pcie/trans.c */ 1098 1099 /* 1100 * Since this .. hard-resets things, it's time to actually 1101 * mark the first vap (if any) as having no mac context. 1102 * It's annoying, but since the driver is potentially being 1103 * stop/start'ed whilst active (thanks openbsd port!) we 1104 * have to correctly track this. 1105 */ 1106 static void 1107 iwm_stop_device(struct iwm_softc *sc) 1108 { 1109 struct ieee80211com *ic = sc->sc_ic; 1110 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1111 int chnl, ntries; 1112 int qid; 1113 1114 /* tell the device to stop sending interrupts */ 1115 iwm_disable_interrupts(sc); 1116 1117 /* 1118 * FreeBSD-local: mark the first vap as not-uploaded, 1119 * so the next transition through auth/assoc 1120 * will correctly populate the MAC context. 1121 */ 1122 if (vap) { 1123 struct iwm_vap *iv = IWM_VAP(vap); 1124 iv->is_uploaded = 0; 1125 } 1126 1127 /* device going down, Stop using ICT table */ 1128 sc->sc_flags &= ~IWM_FLAG_USE_ICT; 1129 1130 /* stop tx and rx. tx and rx bits, as usual, are from if_iwn */ 1131 1132 iwm_write_prph(sc, IWM_SCD_TXFACT, 0); 1133 1134 /* Stop all DMA channels. */ 1135 if (iwm_nic_lock(sc)) { 1136 for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) { 1137 IWM_WRITE(sc, 1138 IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 0); 1139 for (ntries = 0; ntries < 200; ntries++) { 1140 uint32_t r; 1141 1142 r = IWM_READ(sc, IWM_FH_TSSR_TX_STATUS_REG); 1143 if (r & IWM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE( 1144 chnl)) 1145 break; 1146 DELAY(20); 1147 } 1148 } 1149 iwm_nic_unlock(sc); 1150 } 1151 1152 /* Stop RX ring. */ 1153 iwm_reset_rx_ring(sc, &sc->rxq); 1154 1155 /* Reset all TX rings. */ 1156 for (qid = 0; qid < nitems(sc->txq); qid++) 1157 iwm_reset_tx_ring(sc, &sc->txq[qid]); 1158 1159 /* 1160 * Power-down device's busmaster DMA clocks 1161 */ 1162 iwm_write_prph(sc, IWM_APMG_CLK_DIS_REG, IWM_APMG_CLK_VAL_DMA_CLK_RQT); 1163 DELAY(5); 1164 1165 /* Make sure (redundant) we've released our request to stay awake */ 1166 IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL, 1167 IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 1168 1169 /* Stop the device, and put it in low power state */ 1170 iwm_apm_stop(sc); 1171 1172 /* Upon stop, the APM issues an interrupt if HW RF kill is set. 1173 * Clean again the interrupt here 1174 */ 1175 iwm_disable_interrupts(sc); 1176 /* stop and reset the on-board processor */ 1177 IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_NEVO_RESET); 1178 1179 /* 1180 * Even if we stop the HW, we still want the RF kill 1181 * interrupt 1182 */ 1183 iwm_enable_rfkill_int(sc); 1184 iwm_check_rfkill(sc); 1185 } 1186 1187 /* iwlwifi: mvm/ops.c */ 1188 static void 1189 iwm_mvm_nic_config(struct iwm_softc *sc) 1190 { 1191 uint8_t radio_cfg_type, radio_cfg_step, radio_cfg_dash; 1192 uint32_t reg_val = 0; 1193 1194 radio_cfg_type = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_TYPE) >> 1195 IWM_FW_PHY_CFG_RADIO_TYPE_POS; 1196 radio_cfg_step = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_STEP) >> 1197 IWM_FW_PHY_CFG_RADIO_STEP_POS; 1198 radio_cfg_dash = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_DASH) >> 1199 IWM_FW_PHY_CFG_RADIO_DASH_POS; 1200 1201 /* SKU control */ 1202 reg_val |= IWM_CSR_HW_REV_STEP(sc->sc_hw_rev) << 1203 IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; 1204 reg_val |= IWM_CSR_HW_REV_DASH(sc->sc_hw_rev) << 1205 IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; 1206 1207 /* radio configuration */ 1208 reg_val |= radio_cfg_type << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; 1209 reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; 1210 reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; 1211 1212 IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, reg_val); 1213 1214 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1215 "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, 1216 radio_cfg_step, radio_cfg_dash); 1217 1218 /* 1219 * W/A : NIC is stuck in a reset state after Early PCIe power off 1220 * (PCIe power is lost before PERST# is asserted), causing ME FW 1221 * to lose ownership and not being able to obtain it back. 1222 */ 1223 iwm_set_bits_mask_prph(sc, IWM_APMG_PS_CTRL_REG, 1224 IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, 1225 ~IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); 1226 } 1227 1228 static int 1229 iwm_nic_rx_init(struct iwm_softc *sc) 1230 { 1231 if (!iwm_nic_lock(sc)) 1232 return EBUSY; 1233 1234 /* 1235 * Initialize RX ring. This is from the iwn driver. 1236 */ 1237 memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat)); 1238 1239 /* stop DMA */ 1240 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 1241 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_RBDCB_WPTR, 0); 1242 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_FLUSH_RB_REQ, 0); 1243 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RDPTR, 0); 1244 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); 1245 1246 /* Set physical address of RX ring (256-byte aligned). */ 1247 IWM_WRITE(sc, 1248 IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG, sc->rxq.desc_dma.paddr >> 8); 1249 1250 /* Set physical address of RX status (16-byte aligned). */ 1251 IWM_WRITE(sc, 1252 IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG, sc->rxq.stat_dma.paddr >> 4); 1253 1254 /* Enable RX. */ 1255 /* 1256 * Note: Linux driver also sets this: 1257 * (IWM_RX_RB_TIMEOUT << IWM_FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) | 1258 * 1259 * It causes weird behavior. YMMV. 1260 */ 1261 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 1262 IWM_FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | 1263 IWM_FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY | /* HW bug */ 1264 IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | 1265 IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K | 1266 IWM_RX_QUEUE_SIZE_LOG << IWM_FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS); 1267 1268 IWM_WRITE_1(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_TIMEOUT_DEF); 1269 1270 /* W/A for interrupt coalescing bug in 7260 and 3160 */ 1271 if (sc->host_interrupt_operation_mode) 1272 IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE); 1273 1274 /* 1275 * Thus sayeth el jefe (iwlwifi) via a comment: 1276 * 1277 * This value should initially be 0 (before preparing any 1278 * RBs), should be 8 after preparing the first 8 RBs (for example) 1279 */ 1280 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, 8); 1281 1282 iwm_nic_unlock(sc); 1283 1284 return 0; 1285 } 1286 1287 static int 1288 iwm_nic_tx_init(struct iwm_softc *sc) 1289 { 1290 int qid; 1291 1292 if (!iwm_nic_lock(sc)) 1293 return EBUSY; 1294 1295 /* Deactivate TX scheduler. */ 1296 iwm_write_prph(sc, IWM_SCD_TXFACT, 0); 1297 1298 /* Set physical address of "keep warm" page (16-byte aligned). */ 1299 IWM_WRITE(sc, IWM_FH_KW_MEM_ADDR_REG, sc->kw_dma.paddr >> 4); 1300 1301 /* Initialize TX rings. */ 1302 for (qid = 0; qid < nitems(sc->txq); qid++) { 1303 struct iwm_tx_ring *txq = &sc->txq[qid]; 1304 1305 /* Set physical address of TX ring (256-byte aligned). */ 1306 IWM_WRITE(sc, IWM_FH_MEM_CBBC_QUEUE(qid), 1307 txq->desc_dma.paddr >> 8); 1308 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 1309 "%s: loading ring %d descriptors (%p) at %lx\n", 1310 __func__, 1311 qid, txq->desc, 1312 (unsigned long) (txq->desc_dma.paddr >> 8)); 1313 } 1314 iwm_nic_unlock(sc); 1315 1316 return 0; 1317 } 1318 1319 static int 1320 iwm_nic_init(struct iwm_softc *sc) 1321 { 1322 int error; 1323 1324 iwm_apm_init(sc); 1325 iwm_set_pwr(sc); 1326 1327 iwm_mvm_nic_config(sc); 1328 1329 if ((error = iwm_nic_rx_init(sc)) != 0) 1330 return error; 1331 1332 /* 1333 * Ditto for TX, from iwn 1334 */ 1335 if ((error = iwm_nic_tx_init(sc)) != 0) 1336 return error; 1337 1338 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1339 "%s: shadow registers enabled\n", __func__); 1340 IWM_SETBITS(sc, IWM_CSR_MAC_SHADOW_REG_CTRL, 0x800fffff); 1341 1342 return 0; 1343 } 1344 1345 enum iwm_mvm_tx_fifo { 1346 IWM_MVM_TX_FIFO_BK = 0, 1347 IWM_MVM_TX_FIFO_BE, 1348 IWM_MVM_TX_FIFO_VI, 1349 IWM_MVM_TX_FIFO_VO, 1350 IWM_MVM_TX_FIFO_MCAST = 5, 1351 }; 1352 1353 const uint8_t iwm_mvm_ac_to_tx_fifo[] = { 1354 IWM_MVM_TX_FIFO_VO, 1355 IWM_MVM_TX_FIFO_VI, 1356 IWM_MVM_TX_FIFO_BE, 1357 IWM_MVM_TX_FIFO_BK, 1358 }; 1359 1360 static void 1361 iwm_enable_txq(struct iwm_softc *sc, int qid, int fifo) 1362 { 1363 if (!iwm_nic_lock(sc)) { 1364 device_printf(sc->sc_dev, 1365 "%s: cannot enable txq %d\n", 1366 __func__, 1367 qid); 1368 return; /* XXX return EBUSY */ 1369 } 1370 1371 /* unactivate before configuration */ 1372 iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid), 1373 (0 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) 1374 | (1 << IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); 1375 1376 if (qid != IWM_MVM_CMD_QUEUE) { 1377 iwm_set_bits_prph(sc, IWM_SCD_QUEUECHAIN_SEL, (1 << qid)); 1378 } 1379 1380 iwm_clear_bits_prph(sc, IWM_SCD_AGGR_SEL, (1 << qid)); 1381 1382 IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, qid << 8 | 0); 1383 iwm_write_prph(sc, IWM_SCD_QUEUE_RDPTR(qid), 0); 1384 1385 iwm_write_mem32(sc, sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0); 1386 /* Set scheduler window size and frame limit. */ 1387 iwm_write_mem32(sc, 1388 sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) + 1389 sizeof(uint32_t), 1390 ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) & 1391 IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) | 1392 ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & 1393 IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK)); 1394 1395 iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid), 1396 (1 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) | 1397 (fifo << IWM_SCD_QUEUE_STTS_REG_POS_TXF) | 1398 (1 << IWM_SCD_QUEUE_STTS_REG_POS_WSL) | 1399 IWM_SCD_QUEUE_STTS_REG_MSK); 1400 1401 iwm_nic_unlock(sc); 1402 1403 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 1404 "%s: enabled txq %d FIFO %d\n", 1405 __func__, qid, fifo); 1406 } 1407 1408 static int 1409 iwm_post_alive(struct iwm_softc *sc) 1410 { 1411 int nwords; 1412 int error, chnl; 1413 1414 if (!iwm_nic_lock(sc)) 1415 return EBUSY; 1416 1417 if (sc->sched_base != iwm_read_prph(sc, IWM_SCD_SRAM_BASE_ADDR)) { 1418 device_printf(sc->sc_dev, 1419 "%s: sched addr mismatch", 1420 __func__); 1421 error = EINVAL; 1422 goto out; 1423 } 1424 1425 iwm_ict_reset(sc); 1426 1427 /* Clear TX scheduler state in SRAM. */ 1428 nwords = (IWM_SCD_TRANS_TBL_MEM_UPPER_BOUND - 1429 IWM_SCD_CONTEXT_MEM_LOWER_BOUND) 1430 / sizeof(uint32_t); 1431 error = iwm_write_mem(sc, 1432 sc->sched_base + IWM_SCD_CONTEXT_MEM_LOWER_BOUND, 1433 NULL, nwords); 1434 if (error) 1435 goto out; 1436 1437 /* Set physical address of TX scheduler rings (1KB aligned). */ 1438 iwm_write_prph(sc, IWM_SCD_DRAM_BASE_ADDR, sc->sched_dma.paddr >> 10); 1439 1440 iwm_write_prph(sc, IWM_SCD_CHAINEXT_EN, 0); 1441 1442 /* enable command channel */ 1443 iwm_enable_txq(sc, IWM_MVM_CMD_QUEUE, 7); 1444 1445 iwm_write_prph(sc, IWM_SCD_TXFACT, 0xff); 1446 1447 /* Enable DMA channels. */ 1448 for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) { 1449 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 1450 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 1451 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE); 1452 } 1453 1454 IWM_SETBITS(sc, IWM_FH_TX_CHICKEN_BITS_REG, 1455 IWM_FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); 1456 1457 /* Enable L1-Active */ 1458 iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG, 1459 IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 1460 1461 out: 1462 iwm_nic_unlock(sc); 1463 return error; 1464 } 1465 1466 /* 1467 * NVM read access and content parsing. We do not support 1468 * external NVM or writing NVM. 1469 * iwlwifi/mvm/nvm.c 1470 */ 1471 1472 /* list of NVM sections we are allowed/need to read */ 1473 const int nvm_to_read[] = { 1474 IWM_NVM_SECTION_TYPE_HW, 1475 IWM_NVM_SECTION_TYPE_SW, 1476 IWM_NVM_SECTION_TYPE_CALIBRATION, 1477 IWM_NVM_SECTION_TYPE_PRODUCTION, 1478 }; 1479 1480 /* Default NVM size to read */ 1481 #define IWM_NVM_DEFAULT_CHUNK_SIZE (2*1024) 1482 #define IWM_MAX_NVM_SECTION_SIZE 7000 1483 1484 #define IWM_NVM_WRITE_OPCODE 1 1485 #define IWM_NVM_READ_OPCODE 0 1486 1487 static int 1488 iwm_nvm_read_chunk(struct iwm_softc *sc, uint16_t section, 1489 uint16_t offset, uint16_t length, uint8_t *data, uint16_t *len) 1490 { 1491 offset = 0; 1492 struct iwm_nvm_access_cmd nvm_access_cmd = { 1493 .offset = htole16(offset), 1494 .length = htole16(length), 1495 .type = htole16(section), 1496 .op_code = IWM_NVM_READ_OPCODE, 1497 }; 1498 struct iwm_nvm_access_resp *nvm_resp; 1499 struct iwm_rx_packet *pkt; 1500 struct iwm_host_cmd cmd = { 1501 .id = IWM_NVM_ACCESS_CMD, 1502 .flags = IWM_CMD_SYNC | IWM_CMD_WANT_SKB | 1503 IWM_CMD_SEND_IN_RFKILL, 1504 .data = { &nvm_access_cmd, }, 1505 }; 1506 int ret, bytes_read, offset_read; 1507 uint8_t *resp_data; 1508 1509 cmd.len[0] = sizeof(struct iwm_nvm_access_cmd); 1510 1511 ret = iwm_send_cmd(sc, &cmd); 1512 if (ret) 1513 return ret; 1514 1515 pkt = cmd.resp_pkt; 1516 if (pkt->hdr.flags & IWM_CMD_FAILED_MSK) { 1517 device_printf(sc->sc_dev, 1518 "%s: Bad return from IWM_NVM_ACCES_COMMAND (0x%08X)\n", 1519 __func__, pkt->hdr.flags); 1520 ret = EIO; 1521 goto exit; 1522 } 1523 1524 /* Extract NVM response */ 1525 nvm_resp = (void *)pkt->data; 1526 1527 ret = le16toh(nvm_resp->status); 1528 bytes_read = le16toh(nvm_resp->length); 1529 offset_read = le16toh(nvm_resp->offset); 1530 resp_data = nvm_resp->data; 1531 if (ret) { 1532 device_printf(sc->sc_dev, 1533 "%s: NVM access command failed with status %d\n", 1534 __func__, ret); 1535 ret = EINVAL; 1536 goto exit; 1537 } 1538 1539 if (offset_read != offset) { 1540 device_printf(sc->sc_dev, 1541 "%s: NVM ACCESS response with invalid offset %d\n", 1542 __func__, offset_read); 1543 ret = EINVAL; 1544 goto exit; 1545 } 1546 1547 memcpy(data + offset, resp_data, bytes_read); 1548 *len = bytes_read; 1549 1550 exit: 1551 iwm_free_resp(sc, &cmd); 1552 return ret; 1553 } 1554 1555 /* 1556 * Reads an NVM section completely. 1557 * NICs prior to 7000 family doesn't have a real NVM, but just read 1558 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited 1559 * by uCode, we need to manually check in this case that we don't 1560 * overflow and try to read more than the EEPROM size. 1561 * For 7000 family NICs, we supply the maximal size we can read, and 1562 * the uCode fills the response with as much data as we can, 1563 * without overflowing, so no check is needed. 1564 */ 1565 static int 1566 iwm_nvm_read_section(struct iwm_softc *sc, 1567 uint16_t section, uint8_t *data, uint16_t *len) 1568 { 1569 uint16_t length, seglen; 1570 int error; 1571 1572 /* Set nvm section read length */ 1573 length = seglen = IWM_NVM_DEFAULT_CHUNK_SIZE; 1574 *len = 0; 1575 1576 /* Read the NVM until exhausted (reading less than requested) */ 1577 while (seglen == length) { 1578 error = iwm_nvm_read_chunk(sc, 1579 section, *len, length, data, &seglen); 1580 if (error) { 1581 device_printf(sc->sc_dev, 1582 "Cannot read NVM from section " 1583 "%d offset %d, length %d\n", 1584 section, *len, length); 1585 return error; 1586 } 1587 *len += seglen; 1588 } 1589 1590 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1591 "NVM section %d read completed\n", section); 1592 return 0; 1593 } 1594 1595 /* 1596 * BEGIN IWM_NVM_PARSE 1597 */ 1598 1599 /* iwlwifi/iwl-nvm-parse.c */ 1600 1601 /* NVM offsets (in words) definitions */ 1602 enum wkp_nvm_offsets { 1603 /* NVM HW-Section offset (in words) definitions */ 1604 IWM_HW_ADDR = 0x15, 1605 1606 /* NVM SW-Section offset (in words) definitions */ 1607 IWM_NVM_SW_SECTION = 0x1C0, 1608 IWM_NVM_VERSION = 0, 1609 IWM_RADIO_CFG = 1, 1610 IWM_SKU = 2, 1611 IWM_N_HW_ADDRS = 3, 1612 IWM_NVM_CHANNELS = 0x1E0 - IWM_NVM_SW_SECTION, 1613 1614 /* NVM calibration section offset (in words) definitions */ 1615 IWM_NVM_CALIB_SECTION = 0x2B8, 1616 IWM_XTAL_CALIB = 0x316 - IWM_NVM_CALIB_SECTION 1617 }; 1618 1619 /* SKU Capabilities (actual values from NVM definition) */ 1620 enum nvm_sku_bits { 1621 IWM_NVM_SKU_CAP_BAND_24GHZ = (1 << 0), 1622 IWM_NVM_SKU_CAP_BAND_52GHZ = (1 << 1), 1623 IWM_NVM_SKU_CAP_11N_ENABLE = (1 << 2), 1624 IWM_NVM_SKU_CAP_11AC_ENABLE = (1 << 3), 1625 }; 1626 1627 /* radio config bits (actual values from NVM definition) */ 1628 #define IWM_NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */ 1629 #define IWM_NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ 1630 #define IWM_NVM_RF_CFG_TYPE_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ 1631 #define IWM_NVM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ 1632 #define IWM_NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ 1633 #define IWM_NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ 1634 1635 #define DEFAULT_MAX_TX_POWER 16 1636 1637 /** 1638 * enum iwm_nvm_channel_flags - channel flags in NVM 1639 * @IWM_NVM_CHANNEL_VALID: channel is usable for this SKU/geo 1640 * @IWM_NVM_CHANNEL_IBSS: usable as an IBSS channel 1641 * @IWM_NVM_CHANNEL_ACTIVE: active scanning allowed 1642 * @IWM_NVM_CHANNEL_RADAR: radar detection required 1643 * @IWM_NVM_CHANNEL_DFS: dynamic freq selection candidate 1644 * @IWM_NVM_CHANNEL_WIDE: 20 MHz channel okay (?) 1645 * @IWM_NVM_CHANNEL_40MHZ: 40 MHz channel okay (?) 1646 * @IWM_NVM_CHANNEL_80MHZ: 80 MHz channel okay (?) 1647 * @IWM_NVM_CHANNEL_160MHZ: 160 MHz channel okay (?) 1648 */ 1649 enum iwm_nvm_channel_flags { 1650 IWM_NVM_CHANNEL_VALID = (1 << 0), 1651 IWM_NVM_CHANNEL_IBSS = (1 << 1), 1652 IWM_NVM_CHANNEL_ACTIVE = (1 << 3), 1653 IWM_NVM_CHANNEL_RADAR = (1 << 4), 1654 IWM_NVM_CHANNEL_DFS = (1 << 7), 1655 IWM_NVM_CHANNEL_WIDE = (1 << 8), 1656 IWM_NVM_CHANNEL_40MHZ = (1 << 9), 1657 IWM_NVM_CHANNEL_80MHZ = (1 << 10), 1658 IWM_NVM_CHANNEL_160MHZ = (1 << 11), 1659 }; 1660 1661 /* 1662 * Add a channel to the net80211 channel list. 1663 * 1664 * ieee is the ieee channel number 1665 * ch_idx is channel index. 1666 * mode is the channel mode - CHAN_A, CHAN_B, CHAN_G. 1667 * ch_flags is the iwm channel flags. 1668 * 1669 * Return 0 on OK, < 0 on error. 1670 */ 1671 static int 1672 iwm_init_net80211_channel(struct iwm_softc *sc, int ieee, int ch_idx, 1673 int mode, uint16_t ch_flags) 1674 { 1675 /* XXX for now, no overflow checking! */ 1676 struct ieee80211com *ic = sc->sc_ic; 1677 int is_5ghz, flags; 1678 struct ieee80211_channel *channel; 1679 1680 channel = &ic->ic_channels[ic->ic_nchans++]; 1681 channel->ic_ieee = ieee; 1682 1683 is_5ghz = ch_idx >= IWM_NUM_2GHZ_CHANNELS; 1684 if (!is_5ghz) { 1685 flags = IEEE80211_CHAN_2GHZ; 1686 channel->ic_flags = mode; 1687 } else { 1688 flags = IEEE80211_CHAN_5GHZ; 1689 channel->ic_flags = mode; 1690 } 1691 channel->ic_freq = ieee80211_ieee2mhz(ieee, flags); 1692 1693 if (!(ch_flags & IWM_NVM_CHANNEL_ACTIVE)) 1694 channel->ic_flags |= IEEE80211_CHAN_PASSIVE; 1695 return (0); 1696 } 1697 1698 static void 1699 iwm_init_channel_map(struct iwm_softc *sc, const uint16_t * const nvm_ch_flags) 1700 { 1701 struct ieee80211com *ic = sc->sc_ic; 1702 struct iwm_nvm_data *data = &sc->sc_nvm; 1703 int ch_idx; 1704 uint16_t ch_flags; 1705 int hw_value; 1706 1707 for (ch_idx = 0; ch_idx < nitems(iwm_nvm_channels); ch_idx++) { 1708 ch_flags = le16_to_cpup(nvm_ch_flags + ch_idx); 1709 1710 if (ch_idx >= IWM_NUM_2GHZ_CHANNELS && 1711 !data->sku_cap_band_52GHz_enable) 1712 ch_flags &= ~IWM_NVM_CHANNEL_VALID; 1713 1714 if (!(ch_flags & IWM_NVM_CHANNEL_VALID)) { 1715 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1716 "Ch. %d Flags %x [%sGHz] - No traffic\n", 1717 iwm_nvm_channels[ch_idx], 1718 ch_flags, 1719 (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ? 1720 "5.2" : "2.4"); 1721 continue; 1722 } 1723 1724 hw_value = iwm_nvm_channels[ch_idx]; 1725 1726 /* 5GHz? */ 1727 if (ch_idx >= IWM_NUM_2GHZ_CHANNELS) { 1728 (void) iwm_init_net80211_channel(sc, hw_value, 1729 ch_idx, 1730 IEEE80211_CHAN_A, 1731 ch_flags); 1732 } else { 1733 (void) iwm_init_net80211_channel(sc, hw_value, 1734 ch_idx, 1735 IEEE80211_CHAN_B, 1736 ch_flags); 1737 /* If it's not channel 13, also add 11g */ 1738 if (hw_value != 13) 1739 (void) iwm_init_net80211_channel(sc, hw_value, 1740 ch_idx, 1741 IEEE80211_CHAN_G, 1742 ch_flags); 1743 } 1744 1745 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1746 "Ch. %d Flags %x [%sGHz] - Added\n", 1747 iwm_nvm_channels[ch_idx], 1748 ch_flags, 1749 (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ? 1750 "5.2" : "2.4"); 1751 } 1752 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans); 1753 } 1754 1755 static int 1756 iwm_parse_nvm_data(struct iwm_softc *sc, 1757 const uint16_t *nvm_hw, const uint16_t *nvm_sw, 1758 const uint16_t *nvm_calib, uint8_t tx_chains, uint8_t rx_chains) 1759 { 1760 struct iwm_nvm_data *data = &sc->sc_nvm; 1761 uint8_t hw_addr[IEEE80211_ADDR_LEN]; 1762 uint16_t radio_cfg, sku; 1763 1764 data->nvm_version = le16_to_cpup(nvm_sw + IWM_NVM_VERSION); 1765 1766 radio_cfg = le16_to_cpup(nvm_sw + IWM_RADIO_CFG); 1767 data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg); 1768 data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg); 1769 data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg); 1770 data->radio_cfg_pnum = IWM_NVM_RF_CFG_PNUM_MSK(radio_cfg); 1771 data->valid_tx_ant = IWM_NVM_RF_CFG_TX_ANT_MSK(radio_cfg); 1772 data->valid_rx_ant = IWM_NVM_RF_CFG_RX_ANT_MSK(radio_cfg); 1773 1774 sku = le16_to_cpup(nvm_sw + IWM_SKU); 1775 data->sku_cap_band_24GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_24GHZ; 1776 data->sku_cap_band_52GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_52GHZ; 1777 data->sku_cap_11n_enable = 0; 1778 1779 if (!data->valid_tx_ant || !data->valid_rx_ant) { 1780 device_printf(sc->sc_dev, 1781 "%s: invalid antennas (0x%x, 0x%x)\n", 1782 __func__, data->valid_tx_ant, 1783 data->valid_rx_ant); 1784 return EINVAL; 1785 } 1786 1787 data->n_hw_addrs = le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS); 1788 1789 data->xtal_calib[0] = *(nvm_calib + IWM_XTAL_CALIB); 1790 data->xtal_calib[1] = *(nvm_calib + IWM_XTAL_CALIB + 1); 1791 1792 /* The byte order is little endian 16 bit, meaning 214365 */ 1793 IEEE80211_ADDR_COPY(hw_addr, nvm_hw + IWM_HW_ADDR); 1794 data->hw_addr[0] = hw_addr[1]; 1795 data->hw_addr[1] = hw_addr[0]; 1796 data->hw_addr[2] = hw_addr[3]; 1797 data->hw_addr[3] = hw_addr[2]; 1798 data->hw_addr[4] = hw_addr[5]; 1799 data->hw_addr[5] = hw_addr[4]; 1800 1801 iwm_init_channel_map(sc, &nvm_sw[IWM_NVM_CHANNELS]); 1802 data->calib_version = 255; /* TODO: 1803 this value will prevent some checks from 1804 failing, we need to check if this 1805 field is still needed, and if it does, 1806 where is it in the NVM */ 1807 1808 return 0; 1809 } 1810 1811 /* 1812 * END NVM PARSE 1813 */ 1814 1815 struct iwm_nvm_section { 1816 uint16_t length; 1817 const uint8_t *data; 1818 }; 1819 1820 static int 1821 iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections) 1822 { 1823 const uint16_t *hw, *sw, *calib; 1824 1825 /* Checking for required sections */ 1826 if (!sections[IWM_NVM_SECTION_TYPE_SW].data || 1827 !sections[IWM_NVM_SECTION_TYPE_HW].data) { 1828 device_printf(sc->sc_dev, 1829 "%s: Can't parse empty NVM sections\n", 1830 __func__); 1831 return ENOENT; 1832 } 1833 1834 hw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_HW].data; 1835 sw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_SW].data; 1836 calib = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_CALIBRATION].data; 1837 return iwm_parse_nvm_data(sc, hw, sw, calib, 1838 IWM_FW_VALID_TX_ANT(sc), IWM_FW_VALID_RX_ANT(sc)); 1839 } 1840 1841 static int 1842 iwm_nvm_init(struct iwm_softc *sc) 1843 { 1844 struct iwm_nvm_section nvm_sections[IWM_NVM_NUM_OF_SECTIONS]; 1845 int i, section, error; 1846 uint16_t len; 1847 uint8_t *nvm_buffer, *temp; 1848 1849 /* Read From FW NVM */ 1850 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1851 "%s: Read NVM\n", 1852 __func__); 1853 1854 /* TODO: find correct NVM max size for a section */ 1855 nvm_buffer = malloc(IWM_OTP_LOW_IMAGE_SIZE, M_DEVBUF, M_NOWAIT); 1856 if (nvm_buffer == NULL) 1857 return (ENOMEM); 1858 for (i = 0; i < nitems(nvm_to_read); i++) { 1859 section = nvm_to_read[i]; 1860 KASSERT(section <= nitems(nvm_sections), 1861 ("too many sections")); 1862 1863 error = iwm_nvm_read_section(sc, section, nvm_buffer, &len); 1864 if (error) 1865 break; 1866 1867 temp = malloc(len, M_DEVBUF, M_NOWAIT); 1868 if (temp == NULL) { 1869 error = ENOMEM; 1870 break; 1871 } 1872 memcpy(temp, nvm_buffer, len); 1873 nvm_sections[section].data = temp; 1874 nvm_sections[section].length = len; 1875 } 1876 free(nvm_buffer, M_DEVBUF); 1877 if (error) 1878 return error; 1879 1880 return iwm_parse_nvm_sections(sc, nvm_sections); 1881 } 1882 1883 /* 1884 * Firmware loading gunk. This is kind of a weird hybrid between the 1885 * iwn driver and the Linux iwlwifi driver. 1886 */ 1887 1888 static int 1889 iwm_firmware_load_chunk(struct iwm_softc *sc, uint32_t dst_addr, 1890 const uint8_t *section, uint32_t byte_cnt) 1891 { 1892 struct iwm_dma_info *dma = &sc->fw_dma; 1893 int error; 1894 1895 /* Copy firmware section into pre-allocated DMA-safe memory. */ 1896 memcpy(dma->vaddr, section, byte_cnt); 1897 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 1898 1899 if (!iwm_nic_lock(sc)) 1900 return EBUSY; 1901 1902 sc->sc_fw_chunk_done = 0; 1903 1904 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL), 1905 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE); 1906 IWM_WRITE(sc, IWM_FH_SRVC_CHNL_SRAM_ADDR_REG(IWM_FH_SRVC_CHNL), 1907 dst_addr); 1908 IWM_WRITE(sc, IWM_FH_TFDIB_CTRL0_REG(IWM_FH_SRVC_CHNL), 1909 dma->paddr & IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK); 1910 IWM_WRITE(sc, IWM_FH_TFDIB_CTRL1_REG(IWM_FH_SRVC_CHNL), 1911 (iwm_get_dma_hi_addr(dma->paddr) 1912 << IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt); 1913 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_BUF_STS_REG(IWM_FH_SRVC_CHNL), 1914 1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM | 1915 1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX | 1916 IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID); 1917 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL), 1918 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 1919 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE | 1920 IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD); 1921 1922 iwm_nic_unlock(sc); 1923 1924 /* wait 1s for this segment to load */ 1925 while (!sc->sc_fw_chunk_done) 1926 if ((error = msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfw", hz)) != 0) 1927 break; 1928 1929 return error; 1930 } 1931 1932 static int 1933 iwm_load_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 1934 { 1935 struct iwm_fw_sects *fws; 1936 int error, i, w; 1937 const void *data; 1938 uint32_t dlen; 1939 uint32_t offset; 1940 1941 sc->sc_uc.uc_intr = 0; 1942 1943 fws = &sc->sc_fw.fw_sects[ucode_type]; 1944 for (i = 0; i < fws->fw_count; i++) { 1945 data = fws->fw_sect[i].fws_data; 1946 dlen = fws->fw_sect[i].fws_len; 1947 offset = fws->fw_sect[i].fws_devoff; 1948 IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV, 1949 "LOAD FIRMWARE type %d offset %u len %d\n", 1950 ucode_type, offset, dlen); 1951 error = iwm_firmware_load_chunk(sc, offset, data, dlen); 1952 if (error) { 1953 device_printf(sc->sc_dev, 1954 "%s: chunk %u of %u returned error %02d\n", 1955 __func__, i, fws->fw_count, error); 1956 return error; 1957 } 1958 } 1959 1960 /* wait for the firmware to load */ 1961 IWM_WRITE(sc, IWM_CSR_RESET, 0); 1962 1963 for (w = 0; !sc->sc_uc.uc_intr && w < 10; w++) { 1964 error = msleep(&sc->sc_uc, &sc->sc_mtx, 0, "iwmuc", hz/10); 1965 } 1966 1967 return error; 1968 } 1969 1970 /* iwlwifi: pcie/trans.c */ 1971 static int 1972 iwm_start_fw(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 1973 { 1974 int error; 1975 1976 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1977 1978 if ((error = iwm_nic_init(sc)) != 0) { 1979 device_printf(sc->sc_dev, "unable to init nic\n"); 1980 return error; 1981 } 1982 1983 /* make sure rfkill handshake bits are cleared */ 1984 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 1985 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, 1986 IWM_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 1987 1988 /* clear (again), then enable host interrupts */ 1989 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1990 iwm_enable_interrupts(sc); 1991 1992 /* really make sure rfkill handshake bits are cleared */ 1993 /* maybe we should write a few times more? just to make sure */ 1994 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 1995 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 1996 1997 /* Load the given image to the HW */ 1998 return iwm_load_firmware(sc, ucode_type); 1999 } 2000 2001 static int 2002 iwm_fw_alive(struct iwm_softc *sc, uint32_t sched_base) 2003 { 2004 return iwm_post_alive(sc); 2005 } 2006 2007 static int 2008 iwm_send_tx_ant_cfg(struct iwm_softc *sc, uint8_t valid_tx_ant) 2009 { 2010 struct iwm_tx_ant_cfg_cmd tx_ant_cmd = { 2011 .valid = htole32(valid_tx_ant), 2012 }; 2013 2014 return iwm_mvm_send_cmd_pdu(sc, IWM_TX_ANT_CONFIGURATION_CMD, 2015 IWM_CMD_SYNC, sizeof(tx_ant_cmd), &tx_ant_cmd); 2016 } 2017 2018 /* iwlwifi: mvm/fw.c */ 2019 static int 2020 iwm_send_phy_cfg_cmd(struct iwm_softc *sc) 2021 { 2022 struct iwm_phy_cfg_cmd phy_cfg_cmd; 2023 enum iwm_ucode_type ucode_type = sc->sc_uc_current; 2024 2025 /* Set parameters */ 2026 phy_cfg_cmd.phy_cfg = htole32(sc->sc_fw_phy_config); 2027 phy_cfg_cmd.calib_control.event_trigger = 2028 sc->sc_default_calib[ucode_type].event_trigger; 2029 phy_cfg_cmd.calib_control.flow_trigger = 2030 sc->sc_default_calib[ucode_type].flow_trigger; 2031 2032 IWM_DPRINTF(sc, IWM_DEBUG_CMD | IWM_DEBUG_RESET, 2033 "Sending Phy CFG command: 0x%x\n", phy_cfg_cmd.phy_cfg); 2034 return iwm_mvm_send_cmd_pdu(sc, IWM_PHY_CONFIGURATION_CMD, IWM_CMD_SYNC, 2035 sizeof(phy_cfg_cmd), &phy_cfg_cmd); 2036 } 2037 2038 static int 2039 iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc, 2040 enum iwm_ucode_type ucode_type) 2041 { 2042 enum iwm_ucode_type old_type = sc->sc_uc_current; 2043 int error; 2044 2045 if ((error = iwm_read_firmware(sc, ucode_type)) != 0) 2046 return error; 2047 2048 sc->sc_uc_current = ucode_type; 2049 error = iwm_start_fw(sc, ucode_type); 2050 if (error) { 2051 sc->sc_uc_current = old_type; 2052 return error; 2053 } 2054 2055 return iwm_fw_alive(sc, sc->sched_base); 2056 } 2057 2058 /* 2059 * mvm misc bits 2060 */ 2061 2062 /* 2063 * follows iwlwifi/fw.c 2064 */ 2065 static int 2066 iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm) 2067 { 2068 int error; 2069 2070 /* do not operate with rfkill switch turned on */ 2071 if ((sc->sc_flags & IWM_FLAG_RFKILL) && !justnvm) { 2072 device_printf(sc->sc_dev, 2073 "radio is disabled by hardware switch\n"); 2074 return EPERM; 2075 } 2076 2077 sc->sc_init_complete = 0; 2078 if ((error = iwm_mvm_load_ucode_wait_alive(sc, 2079 IWM_UCODE_TYPE_INIT)) != 0) 2080 return error; 2081 2082 if (justnvm) { 2083 if ((error = iwm_nvm_init(sc)) != 0) { 2084 device_printf(sc->sc_dev, "failed to read nvm\n"); 2085 return error; 2086 } 2087 IEEE80211_ADDR_COPY(sc->sc_bssid, &sc->sc_nvm.hw_addr); 2088 2089 sc->sc_scan_cmd_len = sizeof(struct iwm_scan_cmd) 2090 + sc->sc_capa_max_probe_len 2091 + IWM_MAX_NUM_SCAN_CHANNELS 2092 * sizeof(struct iwm_scan_channel); 2093 sc->sc_scan_cmd = malloc(sc->sc_scan_cmd_len, M_DEVBUF, 2094 M_NOWAIT); 2095 if (sc->sc_scan_cmd == NULL) 2096 return (ENOMEM); 2097 2098 return 0; 2099 } 2100 2101 /* Send TX valid antennas before triggering calibrations */ 2102 if ((error = iwm_send_tx_ant_cfg(sc, IWM_FW_VALID_TX_ANT(sc))) != 0) 2103 return error; 2104 2105 /* 2106 * Send phy configurations command to init uCode 2107 * to start the 16.0 uCode init image internal calibrations. 2108 */ 2109 if ((error = iwm_send_phy_cfg_cmd(sc)) != 0 ) { 2110 device_printf(sc->sc_dev, 2111 "%s: failed to run internal calibration: %d\n", 2112 __func__, error); 2113 return error; 2114 } 2115 2116 /* 2117 * Nothing to do but wait for the init complete notification 2118 * from the firmware 2119 */ 2120 while (!sc->sc_init_complete) 2121 if ((error = msleep(&sc->sc_init_complete, &sc->sc_mtx, 2122 0, "iwminit", 2*hz)) != 0) 2123 break; 2124 2125 return error; 2126 } 2127 2128 /* 2129 * receive side 2130 */ 2131 2132 /* (re)stock rx ring, called at init-time and at runtime */ 2133 static int 2134 iwm_rx_addbuf(struct iwm_softc *sc, int size, int idx) 2135 { 2136 struct iwm_rx_ring *ring = &sc->rxq; 2137 struct iwm_rx_data *data = &ring->data[idx]; 2138 struct mbuf *m; 2139 int error; 2140 bus_addr_t paddr; 2141 2142 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWM_RBUF_SIZE); 2143 if (m == NULL) 2144 return ENOBUFS; 2145 2146 if (data->m != NULL) 2147 bus_dmamap_unload(ring->data_dmat, data->map); 2148 2149 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 2150 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 2151 if (error != 0) { 2152 device_printf(sc->sc_dev, 2153 "%s: could not create RX buf DMA map, error %d\n", 2154 __func__, error); 2155 goto fail; 2156 } 2157 data->m = m; 2158 error = bus_dmamap_load(ring->data_dmat, data->map, 2159 mtod(data->m, void *), IWM_RBUF_SIZE, iwm_dma_map_addr, 2160 &paddr, BUS_DMA_NOWAIT); 2161 if (error != 0 && error != EFBIG) { 2162 device_printf(sc->sc_dev, 2163 "%s: can't not map mbuf, error %d\n", __func__, 2164 error); 2165 goto fail; 2166 } 2167 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREREAD); 2168 2169 /* Update RX descriptor. */ 2170 ring->desc[idx] = htole32(paddr >> 8); 2171 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 2172 BUS_DMASYNC_PREWRITE); 2173 2174 return 0; 2175 fail: 2176 return error; 2177 } 2178 2179 /* iwlwifi: mvm/rx.c */ 2180 #define IWM_RSSI_OFFSET 50 2181 static int 2182 iwm_mvm_calc_rssi(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info) 2183 { 2184 int rssi_a, rssi_b, rssi_a_dbm, rssi_b_dbm, max_rssi_dbm; 2185 uint32_t agc_a, agc_b; 2186 uint32_t val; 2187 2188 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_AGC_IDX]); 2189 agc_a = (val & IWM_OFDM_AGC_A_MSK) >> IWM_OFDM_AGC_A_POS; 2190 agc_b = (val & IWM_OFDM_AGC_B_MSK) >> IWM_OFDM_AGC_B_POS; 2191 2192 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_RSSI_AB_IDX]); 2193 rssi_a = (val & IWM_OFDM_RSSI_INBAND_A_MSK) >> IWM_OFDM_RSSI_A_POS; 2194 rssi_b = (val & IWM_OFDM_RSSI_INBAND_B_MSK) >> IWM_OFDM_RSSI_B_POS; 2195 2196 /* 2197 * dBm = rssi dB - agc dB - constant. 2198 * Higher AGC (higher radio gain) means lower signal. 2199 */ 2200 rssi_a_dbm = rssi_a - IWM_RSSI_OFFSET - agc_a; 2201 rssi_b_dbm = rssi_b - IWM_RSSI_OFFSET - agc_b; 2202 max_rssi_dbm = MAX(rssi_a_dbm, rssi_b_dbm); 2203 2204 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2205 "Rssi In A %d B %d Max %d AGCA %d AGCB %d\n", 2206 rssi_a_dbm, rssi_b_dbm, max_rssi_dbm, agc_a, agc_b); 2207 2208 return max_rssi_dbm; 2209 } 2210 2211 /* iwlwifi: mvm/rx.c */ 2212 /* 2213 * iwm_mvm_get_signal_strength - use new rx PHY INFO API 2214 * values are reported by the fw as positive values - need to negate 2215 * to obtain their dBM. Account for missing antennas by replacing 0 2216 * values by -256dBm: practically 0 power and a non-feasible 8 bit value. 2217 */ 2218 static int 2219 iwm_mvm_get_signal_strength(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info) 2220 { 2221 int energy_a, energy_b, energy_c, max_energy; 2222 uint32_t val; 2223 2224 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]); 2225 energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >> 2226 IWM_RX_INFO_ENERGY_ANT_A_POS; 2227 energy_a = energy_a ? -energy_a : -256; 2228 energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >> 2229 IWM_RX_INFO_ENERGY_ANT_B_POS; 2230 energy_b = energy_b ? -energy_b : -256; 2231 energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >> 2232 IWM_RX_INFO_ENERGY_ANT_C_POS; 2233 energy_c = energy_c ? -energy_c : -256; 2234 max_energy = MAX(energy_a, energy_b); 2235 max_energy = MAX(max_energy, energy_c); 2236 2237 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2238 "energy In A %d B %d C %d , and max %d\n", 2239 energy_a, energy_b, energy_c, max_energy); 2240 2241 return max_energy; 2242 } 2243 2244 static void 2245 iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *sc, 2246 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2247 { 2248 struct iwm_rx_phy_info *phy_info = (void *)pkt->data; 2249 2250 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "received PHY stats\n"); 2251 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2252 2253 memcpy(&sc->sc_last_phy_info, phy_info, sizeof(sc->sc_last_phy_info)); 2254 } 2255 2256 /* 2257 * Retrieve the average noise (in dBm) among receivers. 2258 */ 2259 static int 2260 iwm_get_noise(const struct iwm_mvm_statistics_rx_non_phy *stats) 2261 { 2262 int i, total, nbant, noise; 2263 2264 total = nbant = noise = 0; 2265 for (i = 0; i < 3; i++) { 2266 noise = le32toh(stats->beacon_silence_rssi[i]) & 0xff; 2267 if (noise) { 2268 total += noise; 2269 nbant++; 2270 } 2271 } 2272 2273 /* There should be at least one antenna but check anyway. */ 2274 return (nbant == 0) ? -127 : (total / nbant) - 107; 2275 } 2276 2277 /* 2278 * iwm_mvm_rx_rx_mpdu - IWM_REPLY_RX_MPDU_CMD handler 2279 * 2280 * Handles the actual data of the Rx packet from the fw 2281 */ 2282 static void 2283 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, 2284 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2285 { 2286 struct ieee80211com *ic = sc->sc_ic; 2287 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2288 struct ieee80211_frame *wh; 2289 struct ieee80211_node *ni; 2290 struct ieee80211_rx_stats rxs; 2291 struct mbuf *m; 2292 struct iwm_rx_phy_info *phy_info; 2293 struct iwm_rx_mpdu_res_start *rx_res; 2294 uint32_t len; 2295 uint32_t rx_pkt_status; 2296 int rssi; 2297 2298 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2299 2300 phy_info = &sc->sc_last_phy_info; 2301 rx_res = (struct iwm_rx_mpdu_res_start *)pkt->data; 2302 wh = (struct ieee80211_frame *)(pkt->data + sizeof(*rx_res)); 2303 len = le16toh(rx_res->byte_count); 2304 rx_pkt_status = le32toh(*(uint32_t *)(pkt->data + sizeof(*rx_res) + len)); 2305 2306 m = data->m; 2307 m->m_data = pkt->data + sizeof(*rx_res); 2308 m->m_pkthdr.len = m->m_len = len; 2309 2310 if (__predict_false(phy_info->cfg_phy_cnt > 20)) { 2311 device_printf(sc->sc_dev, 2312 "dsp size out of range [0,20]: %d\n", 2313 phy_info->cfg_phy_cnt); 2314 return; 2315 } 2316 2317 if (!(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_CRC_OK) || 2318 !(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_OVERRUN_OK)) { 2319 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2320 "Bad CRC or FIFO: 0x%08X.\n", rx_pkt_status); 2321 return; /* drop */ 2322 } 2323 2324 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_RX_ENERGY_API) { 2325 rssi = iwm_mvm_get_signal_strength(sc, phy_info); 2326 } else { 2327 rssi = iwm_mvm_calc_rssi(sc, phy_info); 2328 } 2329 rssi = (0 - IWM_MIN_DBM) + rssi; /* normalize */ 2330 rssi = MIN(rssi, sc->sc_max_rssi); /* clip to max. 100% */ 2331 2332 /* replenish ring for the buffer we're going to feed to the sharks */ 2333 if (iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0) { 2334 device_printf(sc->sc_dev, "%s: unable to add more buffers\n", 2335 __func__); 2336 return; 2337 } 2338 2339 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2340 2341 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2342 "%s: phy_info: channel=%d, flags=0x%08x\n", 2343 __func__, 2344 le16toh(phy_info->channel), 2345 le16toh(phy_info->phy_flags)); 2346 2347 /* 2348 * Populate an RX state struct with the provided information. 2349 */ 2350 bzero(&rxs, sizeof(rxs)); 2351 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 2352 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 2353 rxs.c_ieee = le16toh(phy_info->channel); 2354 if (le16toh(phy_info->phy_flags & IWM_RX_RES_PHY_FLAGS_BAND_24)) { 2355 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 2356 } else { 2357 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_5GHZ); 2358 } 2359 rxs.rssi = rssi - sc->sc_noise; 2360 rxs.nf = sc->sc_noise; 2361 2362 if (ieee80211_radiotap_active_vap(vap)) { 2363 struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap; 2364 2365 tap->wr_flags = 0; 2366 if (phy_info->phy_flags & htole16(IWM_PHY_INFO_FLAG_SHPREAMBLE)) 2367 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2368 tap->wr_chan_freq = htole16(rxs.c_freq); 2369 /* XXX only if ic->ic_curchan->ic_ieee == rxs.c_ieee */ 2370 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2371 tap->wr_dbm_antsignal = (int8_t)rssi; 2372 tap->wr_dbm_antnoise = (int8_t)sc->sc_noise; 2373 tap->wr_tsft = phy_info->system_timestamp; 2374 switch (phy_info->rate) { 2375 /* CCK rates. */ 2376 case 10: tap->wr_rate = 2; break; 2377 case 20: tap->wr_rate = 4; break; 2378 case 55: tap->wr_rate = 11; break; 2379 case 110: tap->wr_rate = 22; break; 2380 /* OFDM rates. */ 2381 case 0xd: tap->wr_rate = 12; break; 2382 case 0xf: tap->wr_rate = 18; break; 2383 case 0x5: tap->wr_rate = 24; break; 2384 case 0x7: tap->wr_rate = 36; break; 2385 case 0x9: tap->wr_rate = 48; break; 2386 case 0xb: tap->wr_rate = 72; break; 2387 case 0x1: tap->wr_rate = 96; break; 2388 case 0x3: tap->wr_rate = 108; break; 2389 /* Unknown rate: should not happen. */ 2390 default: tap->wr_rate = 0; 2391 } 2392 } 2393 2394 IWM_UNLOCK(sc); 2395 if (ni != NULL) { 2396 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "input m %p\n", m); 2397 ieee80211_input_mimo(ni, m, &rxs); 2398 ieee80211_free_node(ni); 2399 } else { 2400 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "inputall m %p\n", m); 2401 ieee80211_input_mimo_all(ic, m, &rxs); 2402 } 2403 IWM_LOCK(sc); 2404 } 2405 2406 static void 2407 iwm_mvm_rx_tx_cmd_single(struct iwm_softc *sc, struct iwm_rx_packet *pkt, 2408 struct iwm_node *in) 2409 { 2410 struct ifnet *ifp = sc->sc_ifp; 2411 struct iwm_mvm_tx_resp *tx_resp = (void *)pkt->data; 2412 int status = le16toh(tx_resp->status.status) & IWM_TX_STATUS_MSK; 2413 int failack = tx_resp->failure_frame; 2414 2415 KASSERT(tx_resp->frame_count == 1, ("too many frames")); 2416 2417 /* Update rate control statistics. */ 2418 if (status != IWM_TX_STATUS_SUCCESS && 2419 status != IWM_TX_STATUS_DIRECT_DONE) { 2420 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 2421 ieee80211_ratectl_tx_complete(in->in_ni.ni_vap, &in->in_ni, 2422 IEEE80211_RATECTL_TX_FAILURE, &failack, NULL); 2423 } else { 2424 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 2425 ieee80211_ratectl_tx_complete(in->in_ni.ni_vap, &in->in_ni, 2426 IEEE80211_RATECTL_TX_SUCCESS, &failack, NULL); 2427 2428 } 2429 } 2430 2431 static void 2432 iwm_mvm_rx_tx_cmd(struct iwm_softc *sc, 2433 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2434 { 2435 struct ifnet *ifp = sc->sc_ifp; 2436 struct iwm_cmd_header *cmd_hdr = &pkt->hdr; 2437 int idx = cmd_hdr->idx; 2438 int qid = cmd_hdr->qid; 2439 struct iwm_tx_ring *ring = &sc->txq[qid]; 2440 struct iwm_tx_data *txd = &ring->data[idx]; 2441 struct iwm_node *in = txd->in; 2442 2443 if (txd->done) { 2444 device_printf(sc->sc_dev, 2445 "%s: got tx interrupt that's already been handled!\n", 2446 __func__); 2447 return; 2448 } 2449 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2450 2451 sc->sc_tx_timer = 0; 2452 2453 iwm_mvm_rx_tx_cmd_single(sc, pkt, in); 2454 2455 /* Unmap and free mbuf. */ 2456 bus_dmamap_sync(ring->data_dmat, txd->map, BUS_DMASYNC_POSTWRITE); 2457 bus_dmamap_unload(ring->data_dmat, txd->map); 2458 m_freem(txd->m); 2459 2460 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2461 "free txd %p, in %p\n", txd, txd->in); 2462 KASSERT(txd->done == 0, ("txd not done")); 2463 txd->done = 1; 2464 KASSERT(txd->in, ("txd without node")); 2465 2466 txd->m = NULL; 2467 txd->in = NULL; 2468 ieee80211_free_node((struct ieee80211_node *)in); 2469 2470 if (--ring->queued < IWM_TX_RING_LOMARK) { 2471 sc->qfullmsk &= ~(1 << ring->qid); 2472 if (sc->qfullmsk == 0 && (ifp->if_flags & IFF_DRV_OACTIVE)) { 2473 ifp->if_flags &= ~IFF_DRV_OACTIVE; 2474 /* 2475 * Well, we're in interrupt context, but then again 2476 * I guess net80211 does all sorts of stunts in 2477 * interrupt context, so maybe this is no biggie. 2478 */ 2479 iwm_start_locked(ifp); 2480 } 2481 } 2482 } 2483 2484 /* 2485 * transmit side 2486 */ 2487 2488 /* 2489 * Process a "command done" firmware notification. This is where we wakeup 2490 * processes waiting for a synchronous command completion. 2491 * from if_iwn 2492 */ 2493 static void 2494 iwm_cmd_done(struct iwm_softc *sc, struct iwm_rx_packet *pkt) 2495 { 2496 struct iwm_tx_ring *ring = &sc->txq[IWM_MVM_CMD_QUEUE]; 2497 struct iwm_tx_data *data; 2498 2499 if (pkt->hdr.qid != IWM_MVM_CMD_QUEUE) { 2500 return; /* Not a command ack. */ 2501 } 2502 2503 data = &ring->data[pkt->hdr.idx]; 2504 2505 /* If the command was mapped in an mbuf, free it. */ 2506 if (data->m != NULL) { 2507 bus_dmamap_sync(ring->data_dmat, data->map, 2508 BUS_DMASYNC_POSTWRITE); 2509 bus_dmamap_unload(ring->data_dmat, data->map); 2510 m_freem(data->m); 2511 data->m = NULL; 2512 } 2513 wakeup(&ring->desc[pkt->hdr.idx]); 2514 } 2515 2516 #if 0 2517 /* 2518 * necessary only for block ack mode 2519 */ 2520 void 2521 iwm_update_sched(struct iwm_softc *sc, int qid, int idx, uint8_t sta_id, 2522 uint16_t len) 2523 { 2524 struct iwm_agn_scd_bc_tbl *scd_bc_tbl; 2525 uint16_t w_val; 2526 2527 scd_bc_tbl = sc->sched_dma.vaddr; 2528 2529 len += 8; /* magic numbers came naturally from paris */ 2530 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_DW_BC_TABLE) 2531 len = roundup(len, 4) / 4; 2532 2533 w_val = htole16(sta_id << 12 | len); 2534 2535 /* Update TX scheduler. */ 2536 scd_bc_tbl[qid].tfd_offset[idx] = w_val; 2537 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 2538 BUS_DMASYNC_PREWRITE); 2539 2540 /* I really wonder what this is ?!? */ 2541 if (idx < IWM_TFD_QUEUE_SIZE_BC_DUP) { 2542 scd_bc_tbl[qid].tfd_offset[IWM_TFD_QUEUE_SIZE_MAX + idx] = w_val; 2543 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 2544 BUS_DMASYNC_PREWRITE); 2545 } 2546 } 2547 #endif 2548 2549 /* 2550 * Take an 802.11 (non-n) rate, find the relevant rate 2551 * table entry. return the index into in_ridx[]. 2552 * 2553 * The caller then uses that index back into in_ridx 2554 * to figure out the rate index programmed /into/ 2555 * the firmware for this given node. 2556 */ 2557 static int 2558 iwm_tx_rateidx_lookup(struct iwm_softc *sc, struct iwm_node *in, 2559 uint8_t rate) 2560 { 2561 int i; 2562 uint8_t r; 2563 2564 for (i = 0; i < nitems(in->in_ridx); i++) { 2565 r = iwm_rates[in->in_ridx[i]].rate; 2566 if (rate == r) 2567 return (i); 2568 } 2569 /* XXX Return the first */ 2570 /* XXX TODO: have it return the /lowest/ */ 2571 return (0); 2572 } 2573 2574 /* 2575 * Fill in various bit for management frames, and leave them 2576 * unfilled for data frames (firmware takes care of that). 2577 * Return the selected TX rate. 2578 */ 2579 static const struct iwm_rate * 2580 iwm_tx_fill_cmd(struct iwm_softc *sc, struct iwm_node *in, 2581 struct ieee80211_frame *wh, struct iwm_tx_cmd *tx) 2582 { 2583 struct ieee80211com *ic = sc->sc_ic; 2584 struct ieee80211_node *ni = &in->in_ni; 2585 const struct iwm_rate *rinfo; 2586 int type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2587 int ridx, rate_flags; 2588 2589 tx->rts_retry_limit = IWM_RTS_DFAULT_RETRY_LIMIT; 2590 tx->data_retry_limit = IWM_DEFAULT_TX_RETRY; 2591 2592 /* 2593 * XXX TODO: everything about the rate selection here is terrible! 2594 */ 2595 2596 if (type == IEEE80211_FC0_TYPE_DATA) { 2597 int i; 2598 /* for data frames, use RS table */ 2599 (void) ieee80211_ratectl_rate(ni, NULL, 0); 2600 i = iwm_tx_rateidx_lookup(sc, in, ni->ni_txrate); 2601 ridx = in->in_ridx[i]; 2602 2603 /* This is the index into the programmed table */ 2604 tx->initial_rate_index = i; 2605 tx->tx_flags |= htole32(IWM_TX_CMD_FLG_STA_RATE); 2606 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE, 2607 "%s: start with i=%d, txrate %d\n", 2608 __func__, i, iwm_rates[ridx].rate); 2609 /* XXX no rate_n_flags? */ 2610 return &iwm_rates[ridx]; 2611 } 2612 2613 /* 2614 * For non-data, use the lowest supported rate for the given 2615 * operational mode. 2616 * 2617 * Note: there may not be any rate control information available. 2618 * This driver currently assumes if we're transmitting data 2619 * frames, use the rate control table. Grr. 2620 * 2621 * XXX TODO: use the configured rate for the traffic type! 2622 */ 2623 if (ic->ic_curmode == IEEE80211_MODE_11A) { 2624 /* 2625 * XXX this assumes the mode is either 11a or not 11a; 2626 * definitely won't work for 11n. 2627 */ 2628 ridx = IWM_RIDX_OFDM; 2629 } else { 2630 ridx = IWM_RIDX_CCK; 2631 } 2632 2633 rinfo = &iwm_rates[ridx]; 2634 2635 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: ridx=%d; rate=%d, CCK=%d\n", 2636 __func__, ridx, 2637 rinfo->rate, 2638 !! (IWM_RIDX_IS_CCK(ridx)) 2639 ); 2640 2641 /* XXX TODO: hard-coded TX antenna? */ 2642 rate_flags = 1 << IWM_RATE_MCS_ANT_POS; 2643 if (IWM_RIDX_IS_CCK(ridx)) 2644 rate_flags |= IWM_RATE_MCS_CCK_MSK; 2645 /* XXX hard-coded tx rate */ 2646 tx->rate_n_flags = htole32(rate_flags | rinfo->plcp); 2647 2648 return rinfo; 2649 } 2650 2651 #define TB0_SIZE 16 2652 static int 2653 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) 2654 { 2655 struct ieee80211com *ic = sc->sc_ic; 2656 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2657 struct iwm_node *in = (struct iwm_node *)ni; 2658 struct iwm_tx_ring *ring; 2659 struct iwm_tx_data *data; 2660 struct iwm_tfd *desc; 2661 struct iwm_device_cmd *cmd; 2662 struct iwm_tx_cmd *tx; 2663 struct ieee80211_frame *wh; 2664 struct ieee80211_key *k = NULL; 2665 struct mbuf *m1; 2666 const struct iwm_rate *rinfo; 2667 uint32_t flags; 2668 u_int hdrlen; 2669 bus_dma_segment_t *seg, segs[IWM_MAX_SCATTER]; 2670 int nsegs; 2671 uint8_t tid, type; 2672 int i, totlen, error, pad; 2673 2674 wh = mtod(m, struct ieee80211_frame *); 2675 hdrlen = ieee80211_anyhdrsize(wh); 2676 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2677 tid = 0; 2678 ring = &sc->txq[ac]; 2679 desc = &ring->desc[ring->cur]; 2680 memset(desc, 0, sizeof(*desc)); 2681 data = &ring->data[ring->cur]; 2682 2683 /* Fill out iwm_tx_cmd to send to the firmware */ 2684 cmd = &ring->cmd[ring->cur]; 2685 cmd->hdr.code = IWM_TX_CMD; 2686 cmd->hdr.flags = 0; 2687 cmd->hdr.qid = ring->qid; 2688 cmd->hdr.idx = ring->cur; 2689 2690 tx = (void *)cmd->data; 2691 memset(tx, 0, sizeof(*tx)); 2692 2693 rinfo = iwm_tx_fill_cmd(sc, in, wh, tx); 2694 2695 /* Encrypt the frame if need be. */ 2696 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2697 /* Retrieve key for TX && do software encryption. */ 2698 k = ieee80211_crypto_encap(ni, m); 2699 if (k == NULL) { 2700 m_freem(m); 2701 return (ENOBUFS); 2702 } 2703 /* 802.11 header may have moved. */ 2704 wh = mtod(m, struct ieee80211_frame *); 2705 } 2706 2707 if (ieee80211_radiotap_active_vap(vap)) { 2708 struct iwm_tx_radiotap_header *tap = &sc->sc_txtap; 2709 2710 tap->wt_flags = 0; 2711 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 2712 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 2713 tap->wt_rate = rinfo->rate; 2714 tap->wt_hwqueue = ac; 2715 if (k != NULL) 2716 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2717 ieee80211_radiotap_tx(vap, m); 2718 } 2719 2720 2721 totlen = m->m_pkthdr.len; 2722 2723 flags = 0; 2724 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2725 flags |= IWM_TX_CMD_FLG_ACK; 2726 } 2727 2728 if (type != IEEE80211_FC0_TYPE_DATA 2729 && (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 2730 && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2731 flags |= IWM_TX_CMD_FLG_PROT_REQUIRE; 2732 } 2733 2734 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2735 type != IEEE80211_FC0_TYPE_DATA) 2736 tx->sta_id = sc->sc_aux_sta.sta_id; 2737 else 2738 tx->sta_id = IWM_STATION_ID; 2739 2740 if (type == IEEE80211_FC0_TYPE_MGT) { 2741 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2742 2743 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ || 2744 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ) 2745 tx->pm_frame_timeout = htole16(3); 2746 else 2747 tx->pm_frame_timeout = htole16(2); 2748 } else { 2749 tx->pm_frame_timeout = htole16(0); 2750 } 2751 2752 if (hdrlen & 3) { 2753 /* First segment length must be a multiple of 4. */ 2754 flags |= IWM_TX_CMD_FLG_MH_PAD; 2755 pad = 4 - (hdrlen & 3); 2756 } else 2757 pad = 0; 2758 2759 tx->driver_txop = 0; 2760 tx->next_frame_len = 0; 2761 2762 tx->len = htole16(totlen); 2763 tx->tid_tspec = tid; 2764 tx->life_time = htole32(IWM_TX_CMD_LIFE_TIME_INFINITE); 2765 2766 /* Set physical address of "scratch area". */ 2767 tx->dram_lsb_ptr = htole32(data->scratch_paddr); 2768 tx->dram_msb_ptr = iwm_get_dma_hi_addr(data->scratch_paddr); 2769 2770 /* Copy 802.11 header in TX command. */ 2771 memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen); 2772 2773 flags |= IWM_TX_CMD_FLG_BT_DIS | IWM_TX_CMD_FLG_SEQ_CTL; 2774 2775 tx->sec_ctl = 0; 2776 tx->tx_flags |= htole32(flags); 2777 2778 /* Trim 802.11 header. */ 2779 m_adj(m, hdrlen); 2780 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, 2781 segs, &nsegs, BUS_DMA_NOWAIT); 2782 if (error != 0) { 2783 if (error != EFBIG) { 2784 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n", 2785 error); 2786 m_freem(m); 2787 return error; 2788 } 2789 /* Too many DMA segments, linearize mbuf. */ 2790 MGETHDR(m1, M_NOWAIT, MT_DATA); 2791 if (m1 == NULL) { 2792 m_freem(m); 2793 return ENOBUFS; 2794 } 2795 if (m->m_pkthdr.len > MHLEN) { 2796 MCLGET(m1, M_NOWAIT); 2797 if (!(m1->m_flags & M_EXT)) { 2798 m_freem(m); 2799 m_freem(m1); 2800 return ENOBUFS; 2801 } 2802 } 2803 m_copydata(m, 0, m->m_pkthdr.len, mtod(m1, void *)); 2804 m1->m_pkthdr.len = m1->m_len = m->m_pkthdr.len; 2805 m_freem(m); 2806 m = m1; 2807 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, 2808 segs, &nsegs, BUS_DMA_NOWAIT); 2809 if (error != 0) { 2810 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n", 2811 error); 2812 m_freem(m); 2813 return error; 2814 } 2815 } 2816 data->m = m; 2817 data->in = in; 2818 data->done = 0; 2819 2820 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2821 "sending txd %p, in %p\n", data, data->in); 2822 KASSERT(data->in != NULL, ("node is NULL")); 2823 2824 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2825 "sending data: qid=%d idx=%d len=%d nsegs=%d\n", 2826 ring->qid, ring->cur, totlen, nsegs); 2827 2828 /* Fill TX descriptor. */ 2829 desc->num_tbs = 2 + nsegs; 2830 2831 desc->tbs[0].lo = htole32(data->cmd_paddr); 2832 desc->tbs[0].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) | 2833 (TB0_SIZE << 4); 2834 desc->tbs[1].lo = htole32(data->cmd_paddr + TB0_SIZE); 2835 desc->tbs[1].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) | 2836 ((sizeof(struct iwm_cmd_header) + sizeof(*tx) 2837 + hdrlen + pad - TB0_SIZE) << 4); 2838 2839 /* Other DMA segments are for data payload. */ 2840 for (i = 0; i < nsegs; i++) { 2841 seg = &segs[i]; 2842 desc->tbs[i+2].lo = htole32(seg->ds_addr); 2843 desc->tbs[i+2].hi_n_len = \ 2844 htole16(iwm_get_dma_hi_addr(seg->ds_addr)) 2845 | ((seg->ds_len) << 4); 2846 } 2847 2848 bus_dmamap_sync(ring->data_dmat, data->map, 2849 BUS_DMASYNC_PREWRITE); 2850 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, 2851 BUS_DMASYNC_PREWRITE); 2852 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 2853 BUS_DMASYNC_PREWRITE); 2854 2855 #if 0 2856 iwm_update_sched(sc, ring->qid, ring->cur, tx->sta_id, le16toh(tx->len)); 2857 #endif 2858 2859 /* Kick TX ring. */ 2860 ring->cur = (ring->cur + 1) % IWM_TX_RING_COUNT; 2861 IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); 2862 2863 /* Mark TX ring as full if we reach a certain threshold. */ 2864 if (++ring->queued > IWM_TX_RING_HIMARK) { 2865 sc->qfullmsk |= 1 << ring->qid; 2866 } 2867 2868 return 0; 2869 } 2870 2871 static int 2872 iwm_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2873 const struct ieee80211_bpf_params *params) 2874 { 2875 struct ieee80211com *ic = ni->ni_ic; 2876 struct ifnet *ifp = ic->ic_ifp; 2877 struct iwm_softc *sc = ifp->if_softc; 2878 int error = 0; 2879 2880 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2881 "->%s begin\n", __func__); 2882 2883 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 2884 ieee80211_free_node(ni); 2885 m_freem(m); 2886 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2887 "<-%s not RUNNING\n", __func__); 2888 return (ENETDOWN); 2889 } 2890 2891 IWM_LOCK(sc); 2892 /* XXX fix this */ 2893 if (params == NULL) { 2894 error = iwm_tx(sc, m, ni, 0); 2895 } else { 2896 error = iwm_tx(sc, m, ni, 0); 2897 } 2898 if (error != 0) { 2899 /* NB: m is reclaimed on tx failure */ 2900 ieee80211_free_node(ni); 2901 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 2902 } 2903 sc->sc_tx_timer = 5; 2904 IWM_UNLOCK(sc); 2905 2906 return (error); 2907 } 2908 2909 /* 2910 * mvm/tx.c 2911 */ 2912 2913 #if 0 2914 /* 2915 * Note that there are transports that buffer frames before they reach 2916 * the firmware. This means that after flush_tx_path is called, the 2917 * queue might not be empty. The race-free way to handle this is to: 2918 * 1) set the station as draining 2919 * 2) flush the Tx path 2920 * 3) wait for the transport queues to be empty 2921 */ 2922 int 2923 iwm_mvm_flush_tx_path(struct iwm_softc *sc, int tfd_msk, int sync) 2924 { 2925 struct iwm_tx_path_flush_cmd flush_cmd = { 2926 .queues_ctl = htole32(tfd_msk), 2927 .flush_ctl = htole16(IWM_DUMP_TX_FIFO_FLUSH), 2928 }; 2929 int ret; 2930 2931 ret = iwm_mvm_send_cmd_pdu(sc, IWM_TXPATH_FLUSH, 2932 sync ? IWM_CMD_SYNC : IWM_CMD_ASYNC, 2933 sizeof(flush_cmd), &flush_cmd); 2934 if (ret) 2935 device_printf(sc->sc_dev, 2936 "Flushing tx queue failed: %d\n", ret); 2937 return ret; 2938 } 2939 #endif 2940 2941 /* 2942 * BEGIN mvm/sta.c 2943 */ 2944 2945 static void 2946 iwm_mvm_add_sta_cmd_v6_to_v5(struct iwm_mvm_add_sta_cmd_v6 *cmd_v6, 2947 struct iwm_mvm_add_sta_cmd_v5 *cmd_v5) 2948 { 2949 memset(cmd_v5, 0, sizeof(*cmd_v5)); 2950 2951 cmd_v5->add_modify = cmd_v6->add_modify; 2952 cmd_v5->tid_disable_tx = cmd_v6->tid_disable_tx; 2953 cmd_v5->mac_id_n_color = cmd_v6->mac_id_n_color; 2954 IEEE80211_ADDR_COPY(cmd_v5->addr, cmd_v6->addr); 2955 cmd_v5->sta_id = cmd_v6->sta_id; 2956 cmd_v5->modify_mask = cmd_v6->modify_mask; 2957 cmd_v5->station_flags = cmd_v6->station_flags; 2958 cmd_v5->station_flags_msk = cmd_v6->station_flags_msk; 2959 cmd_v5->add_immediate_ba_tid = cmd_v6->add_immediate_ba_tid; 2960 cmd_v5->remove_immediate_ba_tid = cmd_v6->remove_immediate_ba_tid; 2961 cmd_v5->add_immediate_ba_ssn = cmd_v6->add_immediate_ba_ssn; 2962 cmd_v5->sleep_tx_count = cmd_v6->sleep_tx_count; 2963 cmd_v5->sleep_state_flags = cmd_v6->sleep_state_flags; 2964 cmd_v5->assoc_id = cmd_v6->assoc_id; 2965 cmd_v5->beamform_flags = cmd_v6->beamform_flags; 2966 cmd_v5->tfd_queue_msk = cmd_v6->tfd_queue_msk; 2967 } 2968 2969 static int 2970 iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *sc, 2971 struct iwm_mvm_add_sta_cmd_v6 *cmd, int *status) 2972 { 2973 struct iwm_mvm_add_sta_cmd_v5 cmd_v5; 2974 2975 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_STA_KEY_CMD) { 2976 return iwm_mvm_send_cmd_pdu_status(sc, IWM_ADD_STA, 2977 sizeof(*cmd), cmd, status); 2978 } 2979 2980 iwm_mvm_add_sta_cmd_v6_to_v5(cmd, &cmd_v5); 2981 2982 return iwm_mvm_send_cmd_pdu_status(sc, IWM_ADD_STA, sizeof(cmd_v5), 2983 &cmd_v5, status); 2984 } 2985 2986 /* send station add/update command to firmware */ 2987 static int 2988 iwm_mvm_sta_send_to_fw(struct iwm_softc *sc, struct iwm_node *in, int update) 2989 { 2990 struct iwm_mvm_add_sta_cmd_v6 add_sta_cmd; 2991 int ret; 2992 uint32_t status; 2993 2994 memset(&add_sta_cmd, 0, sizeof(add_sta_cmd)); 2995 2996 add_sta_cmd.sta_id = IWM_STATION_ID; 2997 add_sta_cmd.mac_id_n_color 2998 = htole32(IWM_FW_CMD_ID_AND_COLOR(IWM_DEFAULT_MACID, 2999 IWM_DEFAULT_COLOR)); 3000 if (!update) { 3001 add_sta_cmd.tfd_queue_msk = htole32(0xf); 3002 IEEE80211_ADDR_COPY(&add_sta_cmd.addr, in->in_ni.ni_bssid); 3003 } 3004 add_sta_cmd.add_modify = update ? 1 : 0; 3005 add_sta_cmd.station_flags_msk 3006 |= htole32(IWM_STA_FLG_FAT_EN_MSK | IWM_STA_FLG_MIMO_EN_MSK); 3007 3008 status = IWM_ADD_STA_SUCCESS; 3009 ret = iwm_mvm_send_add_sta_cmd_status(sc, &add_sta_cmd, &status); 3010 if (ret) 3011 return ret; 3012 3013 switch (status) { 3014 case IWM_ADD_STA_SUCCESS: 3015 break; 3016 default: 3017 ret = EIO; 3018 device_printf(sc->sc_dev, "IWM_ADD_STA failed\n"); 3019 break; 3020 } 3021 3022 return ret; 3023 } 3024 3025 static int 3026 iwm_mvm_add_sta(struct iwm_softc *sc, struct iwm_node *in) 3027 { 3028 int ret; 3029 3030 ret = iwm_mvm_sta_send_to_fw(sc, in, 0); 3031 if (ret) 3032 return ret; 3033 3034 return 0; 3035 } 3036 3037 static int 3038 iwm_mvm_update_sta(struct iwm_softc *sc, struct iwm_node *in) 3039 { 3040 return iwm_mvm_sta_send_to_fw(sc, in, 1); 3041 } 3042 3043 static int 3044 iwm_mvm_add_int_sta_common(struct iwm_softc *sc, struct iwm_int_sta *sta, 3045 const uint8_t *addr, uint16_t mac_id, uint16_t color) 3046 { 3047 struct iwm_mvm_add_sta_cmd_v6 cmd; 3048 int ret; 3049 uint32_t status; 3050 3051 memset(&cmd, 0, sizeof(cmd)); 3052 cmd.sta_id = sta->sta_id; 3053 cmd.mac_id_n_color = htole32(IWM_FW_CMD_ID_AND_COLOR(mac_id, color)); 3054 3055 cmd.tfd_queue_msk = htole32(sta->tfd_queue_msk); 3056 3057 if (addr) 3058 IEEE80211_ADDR_COPY(cmd.addr, addr); 3059 3060 ret = iwm_mvm_send_add_sta_cmd_status(sc, &cmd, &status); 3061 if (ret) 3062 return ret; 3063 3064 switch (status) { 3065 case IWM_ADD_STA_SUCCESS: 3066 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 3067 "%s: Internal station added.\n", __func__); 3068 return 0; 3069 default: 3070 device_printf(sc->sc_dev, 3071 "%s: Add internal station failed, status=0x%x\n", 3072 __func__, status); 3073 ret = EIO; 3074 break; 3075 } 3076 return ret; 3077 } 3078 3079 static int 3080 iwm_mvm_add_aux_sta(struct iwm_softc *sc) 3081 { 3082 int ret; 3083 3084 sc->sc_aux_sta.sta_id = 3; 3085 sc->sc_aux_sta.tfd_queue_msk = 0; 3086 3087 ret = iwm_mvm_add_int_sta_common(sc, 3088 &sc->sc_aux_sta, NULL, IWM_MAC_INDEX_AUX, 0); 3089 3090 if (ret) 3091 memset(&sc->sc_aux_sta, 0, sizeof(sc->sc_aux_sta)); 3092 return ret; 3093 } 3094 3095 /* 3096 * END mvm/sta.c 3097 */ 3098 3099 /* 3100 * BEGIN mvm/quota.c 3101 */ 3102 3103 static int 3104 iwm_mvm_update_quotas(struct iwm_softc *sc, struct iwm_node *in) 3105 { 3106 struct iwm_time_quota_cmd cmd; 3107 int i, idx, ret, num_active_macs, quota, quota_rem; 3108 int colors[IWM_MAX_BINDINGS] = { -1, -1, -1, -1, }; 3109 int n_ifs[IWM_MAX_BINDINGS] = {0, }; 3110 uint16_t id; 3111 3112 memset(&cmd, 0, sizeof(cmd)); 3113 3114 /* currently, PHY ID == binding ID */ 3115 if (in) { 3116 id = in->in_phyctxt->id; 3117 KASSERT(id < IWM_MAX_BINDINGS, ("invalid id")); 3118 colors[id] = in->in_phyctxt->color; 3119 3120 if (1) 3121 n_ifs[id] = 1; 3122 } 3123 3124 /* 3125 * The FW's scheduling session consists of 3126 * IWM_MVM_MAX_QUOTA fragments. Divide these fragments 3127 * equally between all the bindings that require quota 3128 */ 3129 num_active_macs = 0; 3130 for (i = 0; i < IWM_MAX_BINDINGS; i++) { 3131 cmd.quotas[i].id_and_color = htole32(IWM_FW_CTXT_INVALID); 3132 num_active_macs += n_ifs[i]; 3133 } 3134 3135 quota = 0; 3136 quota_rem = 0; 3137 if (num_active_macs) { 3138 quota = IWM_MVM_MAX_QUOTA / num_active_macs; 3139 quota_rem = IWM_MVM_MAX_QUOTA % num_active_macs; 3140 } 3141 3142 for (idx = 0, i = 0; i < IWM_MAX_BINDINGS; i++) { 3143 if (colors[i] < 0) 3144 continue; 3145 3146 cmd.quotas[idx].id_and_color = 3147 htole32(IWM_FW_CMD_ID_AND_COLOR(i, colors[i])); 3148 3149 if (n_ifs[i] <= 0) { 3150 cmd.quotas[idx].quota = htole32(0); 3151 cmd.quotas[idx].max_duration = htole32(0); 3152 } else { 3153 cmd.quotas[idx].quota = htole32(quota * n_ifs[i]); 3154 cmd.quotas[idx].max_duration = htole32(0); 3155 } 3156 idx++; 3157 } 3158 3159 /* Give the remainder of the session to the first binding */ 3160 cmd.quotas[0].quota = htole32(le32toh(cmd.quotas[0].quota) + quota_rem); 3161 3162 ret = iwm_mvm_send_cmd_pdu(sc, IWM_TIME_QUOTA_CMD, IWM_CMD_SYNC, 3163 sizeof(cmd), &cmd); 3164 if (ret) 3165 device_printf(sc->sc_dev, 3166 "%s: Failed to send quota: %d\n", __func__, ret); 3167 return ret; 3168 } 3169 3170 /* 3171 * END mvm/quota.c 3172 */ 3173 3174 /* 3175 * ieee80211 routines 3176 */ 3177 3178 /* 3179 * Change to AUTH state in 80211 state machine. Roughly matches what 3180 * Linux does in bss_info_changed(). 3181 */ 3182 static int 3183 iwm_auth(struct ieee80211vap *vap, struct iwm_softc *sc) 3184 { 3185 struct ieee80211_node *ni; 3186 struct iwm_node *in; 3187 struct iwm_vap *iv = IWM_VAP(vap); 3188 uint32_t duration; 3189 uint32_t min_duration; 3190 int error; 3191 3192 /* 3193 * XXX i have a feeling that the vap node is being 3194 * freed from underneath us. Grr. 3195 */ 3196 ni = ieee80211_ref_node(vap->iv_bss); 3197 in = (struct iwm_node *) ni; 3198 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_STATE, 3199 "%s: called; vap=%p, bss ni=%p\n", 3200 __func__, 3201 vap, 3202 ni); 3203 3204 in->in_assoc = 0; 3205 3206 error = iwm_allow_mcast(vap, sc); 3207 if (error) { 3208 device_printf(sc->sc_dev, 3209 "%s: failed to set multicast\n", __func__); 3210 goto out; 3211 } 3212 3213 /* 3214 * This is where it deviates from what Linux does. 3215 * 3216 * Linux iwlwifi doesn't reset the nic each time, nor does it 3217 * call ctxt_add() here. Instead, it adds it during vap creation, 3218 * and always does does a mac_ctx_changed(). 3219 * 3220 * The openbsd port doesn't attempt to do that - it reset things 3221 * at odd states and does the add here. 3222 * 3223 * So, until the state handling is fixed (ie, we never reset 3224 * the NIC except for a firmware failure, which should drag 3225 * the NIC back to IDLE, re-setup and re-add all the mac/phy 3226 * contexts that are required), let's do a dirty hack here. 3227 */ 3228 if (iv->is_uploaded) { 3229 if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) { 3230 device_printf(sc->sc_dev, 3231 "%s: failed to add MAC\n", __func__); 3232 goto out; 3233 } 3234 } else { 3235 if ((error = iwm_mvm_mac_ctxt_add(sc, vap)) != 0) { 3236 device_printf(sc->sc_dev, 3237 "%s: failed to add MAC\n", __func__); 3238 goto out; 3239 } 3240 } 3241 3242 if ((error = iwm_mvm_phy_ctxt_changed(sc, &sc->sc_phyctxt[0], 3243 in->in_ni.ni_chan, 1, 1)) != 0) { 3244 device_printf(sc->sc_dev, 3245 "%s: failed add phy ctxt\n", __func__); 3246 goto out; 3247 } 3248 in->in_phyctxt = &sc->sc_phyctxt[0]; 3249 3250 if ((error = iwm_mvm_binding_add_vif(sc, in)) != 0) { 3251 device_printf(sc->sc_dev, 3252 "%s: binding cmd\n", __func__); 3253 goto out; 3254 } 3255 3256 if ((error = iwm_mvm_add_sta(sc, in)) != 0) { 3257 device_printf(sc->sc_dev, 3258 "%s: failed to add MAC\n", __func__); 3259 goto out; 3260 } 3261 3262 /* a bit superfluous? */ 3263 while (sc->sc_auth_prot) 3264 msleep(&sc->sc_auth_prot, &sc->sc_mtx, 0, "iwmauth", 0); 3265 sc->sc_auth_prot = 1; 3266 3267 duration = min(IWM_MVM_TE_SESSION_PROTECTION_MAX_TIME_MS, 3268 200 + in->in_ni.ni_intval); 3269 min_duration = min(IWM_MVM_TE_SESSION_PROTECTION_MIN_TIME_MS, 3270 100 + in->in_ni.ni_intval); 3271 iwm_mvm_protect_session(sc, in, duration, min_duration, 500); 3272 3273 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 3274 "%s: waiting for auth_prot\n", __func__); 3275 while (sc->sc_auth_prot != 2) { 3276 /* 3277 * well, meh, but if the kernel is sleeping for half a 3278 * second, we have bigger problems 3279 */ 3280 if (sc->sc_auth_prot == 0) { 3281 device_printf(sc->sc_dev, 3282 "%s: missed auth window!\n", __func__); 3283 error = ETIMEDOUT; 3284 goto out; 3285 } else if (sc->sc_auth_prot == -1) { 3286 device_printf(sc->sc_dev, 3287 "%s: no time event, denied!\n", __func__); 3288 sc->sc_auth_prot = 0; 3289 error = EAUTH; 3290 goto out; 3291 } 3292 msleep(&sc->sc_auth_prot, &sc->sc_mtx, 0, "iwmau2", 0); 3293 } 3294 IWM_DPRINTF(sc, IWM_DEBUG_RESET, "<-%s\n", __func__); 3295 error = 0; 3296 out: 3297 ieee80211_free_node(ni); 3298 return (error); 3299 } 3300 3301 static int 3302 iwm_assoc(struct ieee80211vap *vap, struct iwm_softc *sc) 3303 { 3304 struct iwm_node *in = (struct iwm_node *)vap->iv_bss; 3305 int error; 3306 3307 if ((error = iwm_mvm_update_sta(sc, in)) != 0) { 3308 device_printf(sc->sc_dev, 3309 "%s: failed to update STA\n", __func__); 3310 return error; 3311 } 3312 3313 in->in_assoc = 1; 3314 if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) { 3315 device_printf(sc->sc_dev, 3316 "%s: failed to update MAC\n", __func__); 3317 return error; 3318 } 3319 3320 return 0; 3321 } 3322 3323 static int 3324 iwm_release(struct iwm_softc *sc, struct iwm_node *in) 3325 { 3326 /* 3327 * Ok, so *technically* the proper set of calls for going 3328 * from RUN back to SCAN is: 3329 * 3330 * iwm_mvm_power_mac_disable(sc, in); 3331 * iwm_mvm_mac_ctxt_changed(sc, in); 3332 * iwm_mvm_rm_sta(sc, in); 3333 * iwm_mvm_update_quotas(sc, NULL); 3334 * iwm_mvm_mac_ctxt_changed(sc, in); 3335 * iwm_mvm_binding_remove_vif(sc, in); 3336 * iwm_mvm_mac_ctxt_remove(sc, in); 3337 * 3338 * However, that freezes the device not matter which permutations 3339 * and modifications are attempted. Obviously, this driver is missing 3340 * something since it works in the Linux driver, but figuring out what 3341 * is missing is a little more complicated. Now, since we're going 3342 * back to nothing anyway, we'll just do a complete device reset. 3343 * Up your's, device! 3344 */ 3345 //iwm_mvm_flush_tx_path(sc, 0xf, 1); 3346 iwm_stop_device(sc); 3347 iwm_init_hw(sc); 3348 if (in) 3349 in->in_assoc = 0; 3350 return 0; 3351 3352 #if 0 3353 int error; 3354 3355 iwm_mvm_power_mac_disable(sc, in); 3356 3357 if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) { 3358 device_printf(sc->sc_dev, "mac ctxt change fail 1 %d\n", error); 3359 return error; 3360 } 3361 3362 if ((error = iwm_mvm_rm_sta(sc, in)) != 0) { 3363 device_printf(sc->sc_dev, "sta remove fail %d\n", error); 3364 return error; 3365 } 3366 error = iwm_mvm_rm_sta(sc, in); 3367 in->in_assoc = 0; 3368 iwm_mvm_update_quotas(sc, NULL); 3369 if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) { 3370 device_printf(sc->sc_dev, "mac ctxt change fail 2 %d\n", error); 3371 return error; 3372 } 3373 iwm_mvm_binding_remove_vif(sc, in); 3374 3375 iwm_mvm_mac_ctxt_remove(sc, in); 3376 3377 return error; 3378 #endif 3379 } 3380 3381 static struct ieee80211_node * 3382 iwm_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 3383 { 3384 return malloc(sizeof (struct iwm_node), M_80211_NODE, 3385 M_NOWAIT | M_ZERO); 3386 } 3387 3388 static void 3389 iwm_setrates(struct iwm_softc *sc, struct iwm_node *in) 3390 { 3391 struct ieee80211_node *ni = &in->in_ni; 3392 struct iwm_lq_cmd *lq = &in->in_lq; 3393 int nrates = ni->ni_rates.rs_nrates; 3394 int i, ridx, tab = 0; 3395 int txant = 0; 3396 3397 if (nrates > nitems(lq->rs_table)) { 3398 device_printf(sc->sc_dev, 3399 "%s: node supports %d rates, driver handles " 3400 "only %zu\n", __func__, nrates, nitems(lq->rs_table)); 3401 return; 3402 } 3403 3404 /* 3405 * XXX .. and most of iwm_node is not initialised explicitly; 3406 * it's all just 0x0 passed to the firmware. 3407 */ 3408 3409 /* first figure out which rates we should support */ 3410 /* XXX TODO: this isn't 11n aware /at all/ */ 3411 memset(&in->in_ridx, -1, sizeof(in->in_ridx)); 3412 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3413 "%s: nrates=%d\n", __func__, nrates); 3414 for (i = 0; i < nrates; i++) { 3415 int rate = ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL; 3416 3417 /* Map 802.11 rate to HW rate index. */ 3418 for (ridx = 0; ridx <= IWM_RIDX_MAX; ridx++) 3419 if (iwm_rates[ridx].rate == rate) 3420 break; 3421 if (ridx > IWM_RIDX_MAX) { 3422 device_printf(sc->sc_dev, 3423 "%s: WARNING: device rate for %d not found!\n", 3424 __func__, rate); 3425 } else { 3426 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3427 "%s: rate: i: %d, rate=%d, ridx=%d\n", 3428 __func__, 3429 i, 3430 rate, 3431 ridx); 3432 in->in_ridx[i] = ridx; 3433 } 3434 } 3435 3436 /* then construct a lq_cmd based on those */ 3437 memset(lq, 0, sizeof(*lq)); 3438 lq->sta_id = IWM_STATION_ID; 3439 3440 /* 3441 * are these used? (we don't do SISO or MIMO) 3442 * need to set them to non-zero, though, or we get an error. 3443 */ 3444 lq->single_stream_ant_msk = 1; 3445 lq->dual_stream_ant_msk = 1; 3446 3447 /* 3448 * Build the actual rate selection table. 3449 * The lowest bits are the rates. Additionally, 3450 * CCK needs bit 9 to be set. The rest of the bits 3451 * we add to the table select the tx antenna 3452 * Note that we add the rates in the highest rate first 3453 * (opposite of ni_rates). 3454 */ 3455 /* 3456 * XXX TODO: this should be looping over the min of nrates 3457 * and LQ_MAX_RETRY_NUM. Sigh. 3458 */ 3459 for (i = 0; i < nrates; i++) { 3460 int nextant; 3461 3462 if (txant == 0) 3463 txant = IWM_FW_VALID_TX_ANT(sc); 3464 nextant = 1<<(ffs(txant)-1); 3465 txant &= ~nextant; 3466 3467 /* 3468 * Map the rate id into a rate index into 3469 * our hardware table containing the 3470 * configuration to use for this rate. 3471 */ 3472 ridx = in->in_ridx[(nrates-1)-i]; 3473 tab = iwm_rates[ridx].plcp; 3474 tab |= nextant << IWM_RATE_MCS_ANT_POS; 3475 if (IWM_RIDX_IS_CCK(ridx)) 3476 tab |= IWM_RATE_MCS_CCK_MSK; 3477 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3478 "station rate i=%d, rate=%d, hw=%x\n", 3479 i, iwm_rates[ridx].rate, tab); 3480 lq->rs_table[i] = htole32(tab); 3481 } 3482 /* then fill the rest with the lowest possible rate */ 3483 for (i = nrates; i < nitems(lq->rs_table); i++) { 3484 KASSERT(tab != 0, ("invalid tab")); 3485 lq->rs_table[i] = htole32(tab); 3486 } 3487 } 3488 3489 static int 3490 iwm_media_change(struct ifnet *ifp) 3491 { 3492 struct iwm_softc *sc = ifp->if_softc; 3493 int error; 3494 3495 error = ieee80211_media_change(ifp); 3496 if (error != ENETRESET) 3497 return error; 3498 3499 if ((ifp->if_flags & IFF_UP) && 3500 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 3501 iwm_stop(ifp, 0); 3502 iwm_init(sc); 3503 } 3504 return error; 3505 } 3506 3507 3508 static int 3509 iwm_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 3510 { 3511 struct iwm_vap *ivp = IWM_VAP(vap); 3512 struct ieee80211com *ic = vap->iv_ic; 3513 struct ifnet *ifp = ic->ic_ifp; 3514 struct iwm_softc *sc = ifp->if_softc; 3515 struct iwm_node *in; 3516 int error; 3517 3518 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3519 "switching state %s -> %s\n", 3520 ieee80211_state_name[vap->iv_state], 3521 ieee80211_state_name[nstate]); 3522 IEEE80211_UNLOCK(ic); 3523 IWM_LOCK(sc); 3524 /* disable beacon filtering if we're hopping out of RUN */ 3525 if (vap->iv_state == IEEE80211_S_RUN && nstate != vap->iv_state) { 3526 iwm_mvm_disable_beacon_filter(sc); 3527 3528 if (((in = (void *)vap->iv_bss) != NULL)) 3529 in->in_assoc = 0; 3530 3531 iwm_release(sc, NULL); 3532 3533 /* 3534 * It's impossible to directly go RUN->SCAN. If we iwm_release() 3535 * above then the card will be completely reinitialized, 3536 * so the driver must do everything necessary to bring the card 3537 * from INIT to SCAN. 3538 * 3539 * Additionally, upon receiving deauth frame from AP, 3540 * OpenBSD 802.11 stack puts the driver in IEEE80211_S_AUTH 3541 * state. This will also fail with this driver, so bring the FSM 3542 * from IEEE80211_S_RUN to IEEE80211_S_SCAN in this case as well. 3543 * 3544 * XXX TODO: fix this for FreeBSD! 3545 */ 3546 if (nstate == IEEE80211_S_SCAN || 3547 nstate == IEEE80211_S_AUTH || 3548 nstate == IEEE80211_S_ASSOC) { 3549 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3550 "Force transition to INIT; MGT=%d\n", arg); 3551 IWM_UNLOCK(sc); 3552 IEEE80211_LOCK(ic); 3553 vap->iv_newstate(vap, IEEE80211_S_INIT, arg); 3554 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3555 "Going INIT->SCAN\n"); 3556 nstate = IEEE80211_S_SCAN; 3557 IEEE80211_UNLOCK(ic); 3558 IWM_LOCK(sc); 3559 } 3560 } 3561 3562 switch (nstate) { 3563 case IEEE80211_S_INIT: 3564 sc->sc_scanband = 0; 3565 break; 3566 3567 case IEEE80211_S_AUTH: 3568 if ((error = iwm_auth(vap, sc)) != 0) { 3569 device_printf(sc->sc_dev, 3570 "%s: could not move to auth state: %d\n", 3571 __func__, error); 3572 break; 3573 } 3574 break; 3575 3576 case IEEE80211_S_ASSOC: 3577 if ((error = iwm_assoc(vap, sc)) != 0) { 3578 device_printf(sc->sc_dev, 3579 "%s: failed to associate: %d\n", __func__, 3580 error); 3581 break; 3582 } 3583 break; 3584 3585 case IEEE80211_S_RUN: 3586 { 3587 struct iwm_host_cmd cmd = { 3588 .id = IWM_LQ_CMD, 3589 .len = { sizeof(in->in_lq), }, 3590 .flags = IWM_CMD_SYNC, 3591 }; 3592 3593 /* Update the association state, now we have it all */ 3594 /* (eg associd comes in at this point */ 3595 error = iwm_assoc(vap, sc); 3596 if (error != 0) { 3597 device_printf(sc->sc_dev, 3598 "%s: failed to update association state: %d\n", 3599 __func__, 3600 error); 3601 break; 3602 } 3603 3604 in = (struct iwm_node *)vap->iv_bss; 3605 iwm_mvm_power_mac_update_mode(sc, in); 3606 iwm_mvm_enable_beacon_filter(sc, in); 3607 iwm_mvm_update_quotas(sc, in); 3608 iwm_setrates(sc, in); 3609 3610 cmd.data[0] = &in->in_lq; 3611 if ((error = iwm_send_cmd(sc, &cmd)) != 0) { 3612 device_printf(sc->sc_dev, 3613 "%s: IWM_LQ_CMD failed\n", __func__); 3614 } 3615 3616 break; 3617 } 3618 3619 default: 3620 break; 3621 } 3622 IWM_UNLOCK(sc); 3623 IEEE80211_LOCK(ic); 3624 3625 return (ivp->iv_newstate(vap, nstate, arg)); 3626 } 3627 3628 void 3629 iwm_endscan_cb(void *arg, int pending) 3630 { 3631 struct iwm_softc *sc = arg; 3632 struct ieee80211com *ic = sc->sc_ic; 3633 int done; 3634 int error; 3635 3636 IWM_DPRINTF(sc, IWM_DEBUG_SCAN | IWM_DEBUG_TRACE, 3637 "%s: scan ended\n", 3638 __func__); 3639 3640 IWM_LOCK(sc); 3641 if (sc->sc_scanband == IEEE80211_CHAN_2GHZ && 3642 sc->sc_nvm.sku_cap_band_52GHz_enable) { 3643 done = 0; 3644 if ((error = iwm_mvm_scan_request(sc, 3645 IEEE80211_CHAN_5GHZ, 0, NULL, 0)) != 0) { 3646 device_printf(sc->sc_dev, "could not initiate scan\n"); 3647 done = 1; 3648 } 3649 } else { 3650 done = 1; 3651 } 3652 3653 if (done) { 3654 IWM_UNLOCK(sc); 3655 ieee80211_scan_done(TAILQ_FIRST(&ic->ic_vaps)); 3656 IWM_LOCK(sc); 3657 sc->sc_scanband = 0; 3658 } 3659 IWM_UNLOCK(sc); 3660 } 3661 3662 static int 3663 iwm_init_hw(struct iwm_softc *sc) 3664 { 3665 struct ieee80211com *ic = sc->sc_ic; 3666 int error, i, qid; 3667 3668 if ((error = iwm_start_hw(sc)) != 0) 3669 return error; 3670 3671 if ((error = iwm_run_init_mvm_ucode(sc, 0)) != 0) { 3672 return error; 3673 } 3674 3675 /* 3676 * should stop and start HW since that INIT 3677 * image just loaded 3678 */ 3679 iwm_stop_device(sc); 3680 if ((error = iwm_start_hw(sc)) != 0) { 3681 device_printf(sc->sc_dev, "could not initialize hardware\n"); 3682 return error; 3683 } 3684 3685 /* omstart, this time with the regular firmware */ 3686 error = iwm_mvm_load_ucode_wait_alive(sc, IWM_UCODE_TYPE_REGULAR); 3687 if (error) { 3688 device_printf(sc->sc_dev, "could not load firmware\n"); 3689 goto error; 3690 } 3691 3692 if ((error = iwm_send_tx_ant_cfg(sc, IWM_FW_VALID_TX_ANT(sc))) != 0) 3693 goto error; 3694 3695 /* Send phy db control command and then phy db calibration*/ 3696 if ((error = iwm_send_phy_db_data(sc)) != 0) 3697 goto error; 3698 3699 if ((error = iwm_send_phy_cfg_cmd(sc)) != 0) 3700 goto error; 3701 3702 /* Add auxiliary station for scanning */ 3703 if ((error = iwm_mvm_add_aux_sta(sc)) != 0) 3704 goto error; 3705 3706 for (i = 0; i < IWM_NUM_PHY_CTX; i++) { 3707 /* 3708 * The channel used here isn't relevant as it's 3709 * going to be overwritten in the other flows. 3710 * For now use the first channel we have. 3711 */ 3712 if ((error = iwm_mvm_phy_ctxt_add(sc, 3713 &sc->sc_phyctxt[i], &ic->ic_channels[1], 1, 1)) != 0) 3714 goto error; 3715 } 3716 3717 error = iwm_mvm_power_update_device(sc); 3718 if (error) 3719 goto error; 3720 3721 /* Mark TX rings as active. */ 3722 for (qid = 0; qid < 4; qid++) { 3723 iwm_enable_txq(sc, qid, qid); 3724 } 3725 3726 return 0; 3727 3728 error: 3729 iwm_stop_device(sc); 3730 return error; 3731 } 3732 3733 /* Allow multicast from our BSSID. */ 3734 static int 3735 iwm_allow_mcast(struct ieee80211vap *vap, struct iwm_softc *sc) 3736 { 3737 struct ieee80211_node *ni = vap->iv_bss; 3738 struct iwm_mcast_filter_cmd *cmd; 3739 size_t size; 3740 int error; 3741 3742 size = roundup(sizeof(*cmd), 4); 3743 cmd = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 3744 if (cmd == NULL) 3745 return ENOMEM; 3746 cmd->filter_own = 1; 3747 cmd->port_id = 0; 3748 cmd->count = 0; 3749 cmd->pass_all = 1; 3750 IEEE80211_ADDR_COPY(cmd->bssid, ni->ni_bssid); 3751 3752 error = iwm_mvm_send_cmd_pdu(sc, IWM_MCAST_FILTER_CMD, 3753 IWM_CMD_SYNC, size, cmd); 3754 free(cmd, M_DEVBUF); 3755 3756 return (error); 3757 } 3758 3759 /* 3760 * ifnet interfaces 3761 */ 3762 3763 static void 3764 iwm_init(void *arg) 3765 { 3766 struct iwm_softc *sc = arg; 3767 3768 IWM_LOCK(sc); 3769 iwm_init_locked(sc); 3770 IWM_UNLOCK(sc); 3771 } 3772 3773 static void 3774 iwm_init_locked(struct iwm_softc *sc) 3775 { 3776 struct ifnet *ifp = sc->sc_ifp; 3777 int error; 3778 3779 if (sc->sc_flags & IWM_FLAG_HW_INITED) { 3780 return; 3781 } 3782 sc->sc_generation++; 3783 sc->sc_flags &= ~IWM_FLAG_STOPPED; 3784 3785 if ((error = iwm_init_hw(sc)) != 0) { 3786 iwm_stop_locked(ifp); 3787 return; 3788 } 3789 3790 /* 3791 * Ok, firmware loaded and we are jogging 3792 */ 3793 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 3794 ifp->if_drv_flags |= IFF_DRV_RUNNING; 3795 sc->sc_flags |= IWM_FLAG_HW_INITED; 3796 callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc); 3797 } 3798 3799 /* 3800 * Dequeue packets from sendq and call send. 3801 * mostly from iwn 3802 */ 3803 static void 3804 iwm_start(struct ifnet *ifp) 3805 { 3806 struct iwm_softc *sc = ifp->if_softc; 3807 3808 IWM_LOCK(sc); 3809 iwm_start_locked(ifp); 3810 IWM_UNLOCK(sc); 3811 } 3812 3813 static void 3814 iwm_start_locked(struct ifnet *ifp) 3815 { 3816 struct iwm_softc *sc = ifp->if_softc; 3817 struct ieee80211_node *ni; 3818 struct mbuf *m; 3819 int ac = 0; 3820 3821 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING) 3822 return; 3823 3824 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "->%s\n", __func__); 3825 for (;;) { 3826 /* why isn't this done per-queue? */ 3827 if (sc->qfullmsk != 0) { 3828 ifp->if_flags |= IFF_DRV_OACTIVE; 3829 break; 3830 } 3831 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 3832 if (!m) 3833 break; 3834 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3835 if (iwm_tx(sc, m, ni, ac) != 0) { 3836 ieee80211_free_node(ni); 3837 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 3838 continue; 3839 } 3840 3841 if (ifp->if_flags & IFF_UP) { 3842 sc->sc_tx_timer = 15; 3843 } 3844 } 3845 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "<-%s\n", __func__); 3846 3847 return; 3848 } 3849 3850 static void 3851 iwm_stop(struct ifnet *ifp, int disable) 3852 { 3853 struct iwm_softc *sc = ifp->if_softc; 3854 3855 IWM_LOCK(sc); 3856 iwm_stop_locked(ifp); 3857 IWM_UNLOCK(sc); 3858 } 3859 3860 static void 3861 iwm_stop_locked(struct ifnet *ifp) 3862 { 3863 struct iwm_softc *sc = ifp->if_softc; 3864 3865 sc->sc_flags &= ~IWM_FLAG_HW_INITED; 3866 sc->sc_flags |= IWM_FLAG_STOPPED; 3867 sc->sc_generation++; 3868 sc->sc_scanband = 0; 3869 sc->sc_auth_prot = 0; 3870 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 3871 sc->sc_tx_timer = 0; 3872 iwm_stop_device(sc); 3873 } 3874 3875 static void 3876 iwm_watchdog(void *arg) 3877 { 3878 struct iwm_softc *sc = arg; 3879 struct ifnet *ifp = sc->sc_ifp; 3880 3881 KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running")); 3882 if (sc->sc_tx_timer > 0) { 3883 if (--sc->sc_tx_timer == 0) { 3884 device_printf(sc->sc_dev, "device timeout\n"); 3885 #ifdef IWM_DEBUG 3886 iwm_nic_error(sc); 3887 #endif 3888 ifp->if_flags &= ~IFF_UP; 3889 iwm_stop_locked(ifp); 3890 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 3891 return; 3892 } 3893 } 3894 callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc); 3895 } 3896 3897 static int 3898 iwm_ioctl(struct ifnet *ifp, u_long cmd, iwm_caddr_t data) 3899 { 3900 struct iwm_softc *sc = ifp->if_softc; 3901 struct ieee80211com *ic = sc->sc_ic; 3902 struct ifreq *ifr = (struct ifreq *) data; 3903 int error = 0, startall = 0; 3904 3905 switch (cmd) { 3906 case SIOCGIFADDR: 3907 error = ether_ioctl(ifp, cmd, data); 3908 break; 3909 case SIOCGIFMEDIA: 3910 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 3911 break; 3912 case SIOCSIFFLAGS: 3913 IWM_LOCK(sc); 3914 if (ifp->if_flags & IFF_UP) { 3915 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 3916 iwm_init_locked(sc); 3917 startall = 1; 3918 } 3919 } else { 3920 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 3921 iwm_stop_locked(ifp); 3922 } 3923 IWM_UNLOCK(sc); 3924 if (startall) 3925 ieee80211_start_all(ic); 3926 3927 break; 3928 default: 3929 error = EINVAL; 3930 break; 3931 } 3932 3933 return error; 3934 } 3935 3936 /* 3937 * The interrupt side of things 3938 */ 3939 3940 /* 3941 * error dumping routines are from iwlwifi/mvm/utils.c 3942 */ 3943 3944 /* 3945 * Note: This structure is read from the device with IO accesses, 3946 * and the reading already does the endian conversion. As it is 3947 * read with uint32_t-sized accesses, any members with a different size 3948 * need to be ordered correctly though! 3949 */ 3950 struct iwm_error_event_table { 3951 uint32_t valid; /* (nonzero) valid, (0) log is empty */ 3952 uint32_t error_id; /* type of error */ 3953 uint32_t pc; /* program counter */ 3954 uint32_t blink1; /* branch link */ 3955 uint32_t blink2; /* branch link */ 3956 uint32_t ilink1; /* interrupt link */ 3957 uint32_t ilink2; /* interrupt link */ 3958 uint32_t data1; /* error-specific data */ 3959 uint32_t data2; /* error-specific data */ 3960 uint32_t data3; /* error-specific data */ 3961 uint32_t bcon_time; /* beacon timer */ 3962 uint32_t tsf_low; /* network timestamp function timer */ 3963 uint32_t tsf_hi; /* network timestamp function timer */ 3964 uint32_t gp1; /* GP1 timer register */ 3965 uint32_t gp2; /* GP2 timer register */ 3966 uint32_t gp3; /* GP3 timer register */ 3967 uint32_t ucode_ver; /* uCode version */ 3968 uint32_t hw_ver; /* HW Silicon version */ 3969 uint32_t brd_ver; /* HW board version */ 3970 uint32_t log_pc; /* log program counter */ 3971 uint32_t frame_ptr; /* frame pointer */ 3972 uint32_t stack_ptr; /* stack pointer */ 3973 uint32_t hcmd; /* last host command header */ 3974 uint32_t isr0; /* isr status register LMPM_NIC_ISR0: 3975 * rxtx_flag */ 3976 uint32_t isr1; /* isr status register LMPM_NIC_ISR1: 3977 * host_flag */ 3978 uint32_t isr2; /* isr status register LMPM_NIC_ISR2: 3979 * enc_flag */ 3980 uint32_t isr3; /* isr status register LMPM_NIC_ISR3: 3981 * time_flag */ 3982 uint32_t isr4; /* isr status register LMPM_NIC_ISR4: 3983 * wico interrupt */ 3984 uint32_t isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 3985 uint32_t wait_event; /* wait event() caller address */ 3986 uint32_t l2p_control; /* L2pControlField */ 3987 uint32_t l2p_duration; /* L2pDurationField */ 3988 uint32_t l2p_mhvalid; /* L2pMhValidBits */ 3989 uint32_t l2p_addr_match; /* L2pAddrMatchStat */ 3990 uint32_t lmpm_pmg_sel; /* indicate which clocks are turned on 3991 * (LMPM_PMG_SEL) */ 3992 uint32_t u_timestamp; /* indicate when the date and time of the 3993 * compilation */ 3994 uint32_t flow_handler; /* FH read/write pointers, RX credit */ 3995 } __packed; 3996 3997 #define ERROR_START_OFFSET (1 * sizeof(uint32_t)) 3998 #define ERROR_ELEM_SIZE (7 * sizeof(uint32_t)) 3999 4000 #ifdef IWM_DEBUG 4001 struct { 4002 const char *name; 4003 uint8_t num; 4004 } advanced_lookup[] = { 4005 { "NMI_INTERRUPT_WDG", 0x34 }, 4006 { "SYSASSERT", 0x35 }, 4007 { "UCODE_VERSION_MISMATCH", 0x37 }, 4008 { "BAD_COMMAND", 0x38 }, 4009 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, 4010 { "FATAL_ERROR", 0x3D }, 4011 { "NMI_TRM_HW_ERR", 0x46 }, 4012 { "NMI_INTERRUPT_TRM", 0x4C }, 4013 { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, 4014 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, 4015 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, 4016 { "NMI_INTERRUPT_HOST", 0x66 }, 4017 { "NMI_INTERRUPT_ACTION_PT", 0x7C }, 4018 { "NMI_INTERRUPT_UNKNOWN", 0x84 }, 4019 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, 4020 { "ADVANCED_SYSASSERT", 0 }, 4021 }; 4022 4023 static const char * 4024 iwm_desc_lookup(uint32_t num) 4025 { 4026 int i; 4027 4028 for (i = 0; i < nitems(advanced_lookup) - 1; i++) 4029 if (advanced_lookup[i].num == num) 4030 return advanced_lookup[i].name; 4031 4032 /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */ 4033 return advanced_lookup[i].name; 4034 } 4035 4036 /* 4037 * Support for dumping the error log seemed like a good idea ... 4038 * but it's mostly hex junk and the only sensible thing is the 4039 * hw/ucode revision (which we know anyway). Since it's here, 4040 * I'll just leave it in, just in case e.g. the Intel guys want to 4041 * help us decipher some "ADVANCED_SYSASSERT" later. 4042 */ 4043 static void 4044 iwm_nic_error(struct iwm_softc *sc) 4045 { 4046 struct iwm_error_event_table table; 4047 uint32_t base; 4048 4049 device_printf(sc->sc_dev, "dumping device error log\n"); 4050 base = sc->sc_uc.uc_error_event_table; 4051 if (base < 0x800000 || base >= 0x80C000) { 4052 device_printf(sc->sc_dev, 4053 "Not valid error log pointer 0x%08x\n", base); 4054 return; 4055 } 4056 4057 if (iwm_read_mem(sc, base, &table, sizeof(table)/sizeof(uint32_t)) != 0) { 4058 device_printf(sc->sc_dev, "reading errlog failed\n"); 4059 return; 4060 } 4061 4062 if (!table.valid) { 4063 device_printf(sc->sc_dev, "errlog not found, skipping\n"); 4064 return; 4065 } 4066 4067 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { 4068 device_printf(sc->sc_dev, "Start IWL Error Log Dump:\n"); 4069 device_printf(sc->sc_dev, "Status: 0x%x, count: %d\n", 4070 sc->sc_flags, table.valid); 4071 } 4072 4073 device_printf(sc->sc_dev, "0x%08X | %-28s\n", table.error_id, 4074 iwm_desc_lookup(table.error_id)); 4075 device_printf(sc->sc_dev, "%08X | uPc\n", table.pc); 4076 device_printf(sc->sc_dev, "%08X | branchlink1\n", table.blink1); 4077 device_printf(sc->sc_dev, "%08X | branchlink2\n", table.blink2); 4078 device_printf(sc->sc_dev, "%08X | interruptlink1\n", table.ilink1); 4079 device_printf(sc->sc_dev, "%08X | interruptlink2\n", table.ilink2); 4080 device_printf(sc->sc_dev, "%08X | data1\n", table.data1); 4081 device_printf(sc->sc_dev, "%08X | data2\n", table.data2); 4082 device_printf(sc->sc_dev, "%08X | data3\n", table.data3); 4083 device_printf(sc->sc_dev, "%08X | beacon time\n", table.bcon_time); 4084 device_printf(sc->sc_dev, "%08X | tsf low\n", table.tsf_low); 4085 device_printf(sc->sc_dev, "%08X | tsf hi\n", table.tsf_hi); 4086 device_printf(sc->sc_dev, "%08X | time gp1\n", table.gp1); 4087 device_printf(sc->sc_dev, "%08X | time gp2\n", table.gp2); 4088 device_printf(sc->sc_dev, "%08X | time gp3\n", table.gp3); 4089 device_printf(sc->sc_dev, "%08X | uCode version\n", table.ucode_ver); 4090 device_printf(sc->sc_dev, "%08X | hw version\n", table.hw_ver); 4091 device_printf(sc->sc_dev, "%08X | board version\n", table.brd_ver); 4092 device_printf(sc->sc_dev, "%08X | hcmd\n", table.hcmd); 4093 device_printf(sc->sc_dev, "%08X | isr0\n", table.isr0); 4094 device_printf(sc->sc_dev, "%08X | isr1\n", table.isr1); 4095 device_printf(sc->sc_dev, "%08X | isr2\n", table.isr2); 4096 device_printf(sc->sc_dev, "%08X | isr3\n", table.isr3); 4097 device_printf(sc->sc_dev, "%08X | isr4\n", table.isr4); 4098 device_printf(sc->sc_dev, "%08X | isr_pref\n", table.isr_pref); 4099 device_printf(sc->sc_dev, "%08X | wait_event\n", table.wait_event); 4100 device_printf(sc->sc_dev, "%08X | l2p_control\n", table.l2p_control); 4101 device_printf(sc->sc_dev, "%08X | l2p_duration\n", table.l2p_duration); 4102 device_printf(sc->sc_dev, "%08X | l2p_mhvalid\n", table.l2p_mhvalid); 4103 device_printf(sc->sc_dev, "%08X | l2p_addr_match\n", table.l2p_addr_match); 4104 device_printf(sc->sc_dev, "%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel); 4105 device_printf(sc->sc_dev, "%08X | timestamp\n", table.u_timestamp); 4106 device_printf(sc->sc_dev, "%08X | flow_handler\n", table.flow_handler); 4107 } 4108 #endif 4109 4110 #define SYNC_RESP_STRUCT(_var_, _pkt_) \ 4111 do { \ 4112 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);\ 4113 _var_ = (void *)((_pkt_)+1); \ 4114 } while (/*CONSTCOND*/0) 4115 4116 #define SYNC_RESP_PTR(_ptr_, _len_, _pkt_) \ 4117 do { \ 4118 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);\ 4119 _ptr_ = (void *)((_pkt_)+1); \ 4120 } while (/*CONSTCOND*/0) 4121 4122 #define ADVANCE_RXQ(sc) (sc->rxq.cur = (sc->rxq.cur + 1) % IWM_RX_RING_COUNT); 4123 4124 /* 4125 * Process an IWM_CSR_INT_BIT_FH_RX or IWM_CSR_INT_BIT_SW_RX interrupt. 4126 * Basic structure from if_iwn 4127 */ 4128 static void 4129 iwm_notif_intr(struct iwm_softc *sc) 4130 { 4131 uint16_t hw; 4132 4133 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map, 4134 BUS_DMASYNC_POSTREAD); 4135 4136 hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff; 4137 while (sc->rxq.cur != hw) { 4138 struct iwm_rx_ring *ring = &sc->rxq; 4139 struct iwm_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 4140 struct iwm_rx_packet *pkt; 4141 struct iwm_cmd_response *cresp; 4142 int qid, idx; 4143 4144 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 4145 BUS_DMASYNC_POSTREAD); 4146 pkt = mtod(data->m, struct iwm_rx_packet *); 4147 4148 qid = pkt->hdr.qid & ~0x80; 4149 idx = pkt->hdr.idx; 4150 4151 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4152 "rx packet qid=%d idx=%d flags=%x type=%x %d %d\n", 4153 pkt->hdr.qid & ~0x80, pkt->hdr.idx, pkt->hdr.flags, 4154 pkt->hdr.code, sc->rxq.cur, hw); 4155 4156 /* 4157 * randomly get these from the firmware, no idea why. 4158 * they at least seem harmless, so just ignore them for now 4159 */ 4160 if (__predict_false((pkt->hdr.code == 0 && qid == 0 && idx == 0) 4161 || pkt->len_n_flags == htole32(0x55550000))) { 4162 ADVANCE_RXQ(sc); 4163 continue; 4164 } 4165 4166 switch (pkt->hdr.code) { 4167 case IWM_REPLY_RX_PHY_CMD: 4168 iwm_mvm_rx_rx_phy_cmd(sc, pkt, data); 4169 break; 4170 4171 case IWM_REPLY_RX_MPDU_CMD: 4172 iwm_mvm_rx_rx_mpdu(sc, pkt, data); 4173 break; 4174 4175 case IWM_TX_CMD: 4176 iwm_mvm_rx_tx_cmd(sc, pkt, data); 4177 break; 4178 4179 case IWM_MISSED_BEACONS_NOTIFICATION: { 4180 struct iwm_missed_beacons_notif *resp; 4181 int missed; 4182 4183 /* XXX look at mac_id to determine interface ID */ 4184 struct ieee80211com *ic = sc->sc_ic; 4185 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4186 4187 SYNC_RESP_STRUCT(resp, pkt); 4188 missed = le32toh(resp->consec_missed_beacons); 4189 4190 IWM_DPRINTF(sc, IWM_DEBUG_BEACON | IWM_DEBUG_STATE, 4191 "%s: MISSED_BEACON: mac_id=%d, " 4192 "consec_since_last_rx=%d, consec=%d, num_expect=%d " 4193 "num_rx=%d\n", 4194 __func__, 4195 le32toh(resp->mac_id), 4196 le32toh(resp->consec_missed_beacons_since_last_rx), 4197 le32toh(resp->consec_missed_beacons), 4198 le32toh(resp->num_expected_beacons), 4199 le32toh(resp->num_recvd_beacons)); 4200 4201 /* Be paranoid */ 4202 if (vap == NULL) 4203 break; 4204 4205 /* XXX no net80211 locking? */ 4206 if (vap->iv_state == IEEE80211_S_RUN && 4207 (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 4208 if (missed > vap->iv_bmissthreshold) { 4209 /* XXX bad locking; turn into task */ 4210 IWM_UNLOCK(sc); 4211 ieee80211_beacon_miss(ic); 4212 IWM_LOCK(sc); 4213 } 4214 } 4215 4216 break; } 4217 4218 case IWM_MVM_ALIVE: { 4219 struct iwm_mvm_alive_resp *resp; 4220 SYNC_RESP_STRUCT(resp, pkt); 4221 4222 sc->sc_uc.uc_error_event_table 4223 = le32toh(resp->error_event_table_ptr); 4224 sc->sc_uc.uc_log_event_table 4225 = le32toh(resp->log_event_table_ptr); 4226 sc->sched_base = le32toh(resp->scd_base_ptr); 4227 sc->sc_uc.uc_ok = resp->status == IWM_ALIVE_STATUS_OK; 4228 4229 sc->sc_uc.uc_intr = 1; 4230 wakeup(&sc->sc_uc); 4231 break; } 4232 4233 case IWM_CALIB_RES_NOTIF_PHY_DB: { 4234 struct iwm_calib_res_notif_phy_db *phy_db_notif; 4235 SYNC_RESP_STRUCT(phy_db_notif, pkt); 4236 4237 iwm_phy_db_set_section(sc, phy_db_notif); 4238 4239 break; } 4240 4241 case IWM_STATISTICS_NOTIFICATION: { 4242 struct iwm_notif_statistics *stats; 4243 SYNC_RESP_STRUCT(stats, pkt); 4244 memcpy(&sc->sc_stats, stats, sizeof(sc->sc_stats)); 4245 sc->sc_noise = iwm_get_noise(&stats->rx.general); 4246 break; } 4247 4248 case IWM_NVM_ACCESS_CMD: 4249 if (sc->sc_wantresp == ((qid << 16) | idx)) { 4250 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 4251 BUS_DMASYNC_POSTREAD); 4252 memcpy(sc->sc_cmd_resp, 4253 pkt, sizeof(sc->sc_cmd_resp)); 4254 } 4255 break; 4256 4257 case IWM_PHY_CONFIGURATION_CMD: 4258 case IWM_TX_ANT_CONFIGURATION_CMD: 4259 case IWM_ADD_STA: 4260 case IWM_MAC_CONTEXT_CMD: 4261 case IWM_REPLY_SF_CFG_CMD: 4262 case IWM_POWER_TABLE_CMD: 4263 case IWM_PHY_CONTEXT_CMD: 4264 case IWM_BINDING_CONTEXT_CMD: 4265 case IWM_TIME_EVENT_CMD: 4266 case IWM_SCAN_REQUEST_CMD: 4267 case IWM_REPLY_BEACON_FILTERING_CMD: 4268 case IWM_MAC_PM_POWER_TABLE: 4269 case IWM_TIME_QUOTA_CMD: 4270 case IWM_REMOVE_STA: 4271 case IWM_TXPATH_FLUSH: 4272 case IWM_LQ_CMD: 4273 SYNC_RESP_STRUCT(cresp, pkt); 4274 if (sc->sc_wantresp == ((qid << 16) | idx)) { 4275 memcpy(sc->sc_cmd_resp, 4276 pkt, sizeof(*pkt)+sizeof(*cresp)); 4277 } 4278 break; 4279 4280 /* ignore */ 4281 case 0x6c: /* IWM_PHY_DB_CMD, no idea why it's not in fw-api.h */ 4282 break; 4283 4284 case IWM_INIT_COMPLETE_NOTIF: 4285 sc->sc_init_complete = 1; 4286 wakeup(&sc->sc_init_complete); 4287 break; 4288 4289 case IWM_SCAN_COMPLETE_NOTIFICATION: { 4290 struct iwm_scan_complete_notif *notif; 4291 SYNC_RESP_STRUCT(notif, pkt); 4292 taskqueue_enqueue(sc->sc_tq, &sc->sc_es_task); 4293 break; } 4294 4295 case IWM_REPLY_ERROR: { 4296 struct iwm_error_resp *resp; 4297 SYNC_RESP_STRUCT(resp, pkt); 4298 4299 device_printf(sc->sc_dev, 4300 "firmware error 0x%x, cmd 0x%x\n", 4301 le32toh(resp->error_type), 4302 resp->cmd_id); 4303 break; } 4304 4305 case IWM_TIME_EVENT_NOTIFICATION: { 4306 struct iwm_time_event_notif *notif; 4307 SYNC_RESP_STRUCT(notif, pkt); 4308 4309 if (notif->status) { 4310 if (le32toh(notif->action) & 4311 IWM_TE_V2_NOTIF_HOST_EVENT_START) 4312 sc->sc_auth_prot = 2; 4313 else 4314 sc->sc_auth_prot = 0; 4315 } else { 4316 sc->sc_auth_prot = -1; 4317 } 4318 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4319 "%s: time event notification auth_prot=%d\n", 4320 __func__, sc->sc_auth_prot); 4321 4322 wakeup(&sc->sc_auth_prot); 4323 break; } 4324 4325 case IWM_MCAST_FILTER_CMD: 4326 break; 4327 4328 default: 4329 device_printf(sc->sc_dev, 4330 "frame %d/%d %x UNHANDLED (this should " 4331 "not happen)\n", qid, idx, 4332 pkt->len_n_flags); 4333 break; 4334 } 4335 4336 /* 4337 * Why test bit 0x80? The Linux driver: 4338 * 4339 * There is one exception: uCode sets bit 15 when it 4340 * originates the response/notification, i.e. when the 4341 * response/notification is not a direct response to a 4342 * command sent by the driver. For example, uCode issues 4343 * IWM_REPLY_RX when it sends a received frame to the driver; 4344 * it is not a direct response to any driver command. 4345 * 4346 * Ok, so since when is 7 == 15? Well, the Linux driver 4347 * uses a slightly different format for pkt->hdr, and "qid" 4348 * is actually the upper byte of a two-byte field. 4349 */ 4350 if (!(pkt->hdr.qid & (1 << 7))) { 4351 iwm_cmd_done(sc, pkt); 4352 } 4353 4354 ADVANCE_RXQ(sc); 4355 } 4356 4357 IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL, 4358 IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 4359 4360 /* 4361 * Tell the firmware what we have processed. 4362 * Seems like the hardware gets upset unless we align 4363 * the write by 8?? 4364 */ 4365 hw = (hw == 0) ? IWM_RX_RING_COUNT - 1 : hw - 1; 4366 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, hw & ~7); 4367 } 4368 4369 static void 4370 iwm_intr(void *arg) 4371 { 4372 struct iwm_softc *sc = arg; 4373 struct ifnet *ifp = sc->sc_ifp; 4374 int handled = 0; 4375 int r1, r2, rv = 0; 4376 int isperiodic = 0; 4377 4378 IWM_LOCK(sc); 4379 IWM_WRITE(sc, IWM_CSR_INT_MASK, 0); 4380 4381 if (sc->sc_flags & IWM_FLAG_USE_ICT) { 4382 uint32_t *ict = sc->ict_dma.vaddr; 4383 int tmp; 4384 4385 tmp = htole32(ict[sc->ict_cur]); 4386 if (!tmp) 4387 goto out_ena; 4388 4389 /* 4390 * ok, there was something. keep plowing until we have all. 4391 */ 4392 r1 = r2 = 0; 4393 while (tmp) { 4394 r1 |= tmp; 4395 ict[sc->ict_cur] = 0; 4396 sc->ict_cur = (sc->ict_cur+1) % IWM_ICT_COUNT; 4397 tmp = htole32(ict[sc->ict_cur]); 4398 } 4399 4400 /* this is where the fun begins. don't ask */ 4401 if (r1 == 0xffffffff) 4402 r1 = 0; 4403 4404 /* i am not expected to understand this */ 4405 if (r1 & 0xc0000) 4406 r1 |= 0x8000; 4407 r1 = (0xff & r1) | ((0xff00 & r1) << 16); 4408 } else { 4409 r1 = IWM_READ(sc, IWM_CSR_INT); 4410 /* "hardware gone" (where, fishing?) */ 4411 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) 4412 goto out; 4413 r2 = IWM_READ(sc, IWM_CSR_FH_INT_STATUS); 4414 } 4415 if (r1 == 0 && r2 == 0) { 4416 goto out_ena; 4417 } 4418 4419 IWM_WRITE(sc, IWM_CSR_INT, r1 | ~sc->sc_intmask); 4420 4421 /* ignored */ 4422 handled |= (r1 & (IWM_CSR_INT_BIT_ALIVE /*| IWM_CSR_INT_BIT_SCD*/)); 4423 4424 if (r1 & IWM_CSR_INT_BIT_SW_ERR) { 4425 #ifdef IWM_DEBUG 4426 int i; 4427 struct ieee80211com *ic = sc->sc_ic; 4428 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4429 4430 iwm_nic_error(sc); 4431 4432 /* Dump driver status (TX and RX rings) while we're here. */ 4433 device_printf(sc->sc_dev, "driver status:\n"); 4434 for (i = 0; i < IWM_MVM_MAX_QUEUES; i++) { 4435 struct iwm_tx_ring *ring = &sc->txq[i]; 4436 device_printf(sc->sc_dev, 4437 " tx ring %2d: qid=%-2d cur=%-3d " 4438 "queued=%-3d\n", 4439 i, ring->qid, ring->cur, ring->queued); 4440 } 4441 device_printf(sc->sc_dev, 4442 " rx ring: cur=%d\n", sc->rxq.cur); 4443 device_printf(sc->sc_dev, 4444 " 802.11 state %d\n", vap->iv_state); 4445 #endif 4446 4447 device_printf(sc->sc_dev, "fatal firmware error\n"); 4448 ifp->if_flags &= ~IFF_UP; 4449 iwm_stop_locked(ifp); 4450 rv = 1; 4451 goto out; 4452 4453 } 4454 4455 if (r1 & IWM_CSR_INT_BIT_HW_ERR) { 4456 handled |= IWM_CSR_INT_BIT_HW_ERR; 4457 device_printf(sc->sc_dev, "hardware error, stopping device\n"); 4458 ifp->if_flags &= ~IFF_UP; 4459 iwm_stop_locked(ifp); 4460 rv = 1; 4461 goto out; 4462 } 4463 4464 /* firmware chunk loaded */ 4465 if (r1 & IWM_CSR_INT_BIT_FH_TX) { 4466 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_TX_MASK); 4467 handled |= IWM_CSR_INT_BIT_FH_TX; 4468 sc->sc_fw_chunk_done = 1; 4469 wakeup(&sc->sc_fw); 4470 } 4471 4472 if (r1 & IWM_CSR_INT_BIT_RF_KILL) { 4473 handled |= IWM_CSR_INT_BIT_RF_KILL; 4474 if (iwm_check_rfkill(sc) && (ifp->if_flags & IFF_UP)) { 4475 device_printf(sc->sc_dev, 4476 "%s: rfkill switch, disabling interface\n", 4477 __func__); 4478 ifp->if_flags &= ~IFF_UP; 4479 iwm_stop_locked(ifp); 4480 } 4481 } 4482 4483 /* 4484 * The Linux driver uses periodic interrupts to avoid races. 4485 * We cargo-cult like it's going out of fashion. 4486 */ 4487 if (r1 & IWM_CSR_INT_BIT_RX_PERIODIC) { 4488 handled |= IWM_CSR_INT_BIT_RX_PERIODIC; 4489 IWM_WRITE(sc, IWM_CSR_INT, IWM_CSR_INT_BIT_RX_PERIODIC); 4490 if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) == 0) 4491 IWM_WRITE_1(sc, 4492 IWM_CSR_INT_PERIODIC_REG, IWM_CSR_INT_PERIODIC_DIS); 4493 isperiodic = 1; 4494 } 4495 4496 if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) || isperiodic) { 4497 handled |= (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX); 4498 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_RX_MASK); 4499 4500 iwm_notif_intr(sc); 4501 4502 /* enable periodic interrupt, see above */ 4503 if (r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX) && !isperiodic) 4504 IWM_WRITE_1(sc, IWM_CSR_INT_PERIODIC_REG, 4505 IWM_CSR_INT_PERIODIC_ENA); 4506 } 4507 4508 if (__predict_false(r1 & ~handled)) 4509 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4510 "%s: unhandled interrupts: %x\n", __func__, r1); 4511 rv = 1; 4512 4513 out_ena: 4514 iwm_restore_interrupts(sc); 4515 out: 4516 IWM_UNLOCK(sc); 4517 return; 4518 } 4519 4520 /* 4521 * Autoconf glue-sniffing 4522 */ 4523 #define PCI_VENDOR_INTEL 0x8086 4524 #define PCI_PRODUCT_INTEL_WL_3160_1 0x08b3 4525 #define PCI_PRODUCT_INTEL_WL_3160_2 0x08b4 4526 #define PCI_PRODUCT_INTEL_WL_7260_1 0x08b1 4527 #define PCI_PRODUCT_INTEL_WL_7260_2 0x08b2 4528 #define PCI_PRODUCT_INTEL_WL_7265_1 0x095a 4529 #define PCI_PRODUCT_INTEL_WL_7265_2 0x095b 4530 4531 static const struct iwm_devices { 4532 uint16_t device; 4533 const char *name; 4534 } iwm_devices[] = { 4535 { PCI_PRODUCT_INTEL_WL_3160_1, "Intel Dual Band Wireless AC 3160" }, 4536 { PCI_PRODUCT_INTEL_WL_3160_2, "Intel Dual Band Wireless AC 3160" }, 4537 { PCI_PRODUCT_INTEL_WL_7260_1, "Intel Dual Band Wireless AC 7260" }, 4538 { PCI_PRODUCT_INTEL_WL_7260_2, "Intel Dual Band Wireless AC 7260" }, 4539 { PCI_PRODUCT_INTEL_WL_7265_1, "Intel Dual Band Wireless AC 7265" }, 4540 { PCI_PRODUCT_INTEL_WL_7265_2, "Intel Dual Band Wireless AC 7265" }, 4541 }; 4542 4543 static int 4544 iwm_probe(device_t dev) 4545 { 4546 int i; 4547 4548 for (i = 0; i < nitems(iwm_devices); i++) 4549 if (pci_get_vendor(dev) == PCI_VENDOR_INTEL && 4550 pci_get_device(dev) == iwm_devices[i].device) { 4551 device_set_desc(dev, iwm_devices[i].name); 4552 return (BUS_PROBE_DEFAULT); 4553 } 4554 4555 return (ENXIO); 4556 } 4557 4558 static int 4559 iwm_dev_check(device_t dev) 4560 { 4561 struct iwm_softc *sc; 4562 4563 sc = device_get_softc(dev); 4564 4565 switch (pci_get_device(dev)) { 4566 case PCI_PRODUCT_INTEL_WL_3160_1: 4567 case PCI_PRODUCT_INTEL_WL_3160_2: 4568 sc->sc_fwname = "iwm3160fw"; 4569 sc->host_interrupt_operation_mode = 1; 4570 return (0); 4571 case PCI_PRODUCT_INTEL_WL_7260_1: 4572 case PCI_PRODUCT_INTEL_WL_7260_2: 4573 sc->sc_fwname = "iwm7260fw"; 4574 sc->host_interrupt_operation_mode = 1; 4575 return (0); 4576 case PCI_PRODUCT_INTEL_WL_7265_1: 4577 case PCI_PRODUCT_INTEL_WL_7265_2: 4578 sc->sc_fwname = "iwm7265fw"; 4579 sc->host_interrupt_operation_mode = 0; 4580 return (0); 4581 default: 4582 device_printf(dev, "unknown adapter type\n"); 4583 return ENXIO; 4584 } 4585 } 4586 4587 static int 4588 iwm_pci_attach(device_t dev) 4589 { 4590 struct iwm_softc *sc; 4591 int count, error, rid; 4592 uint16_t reg; 4593 4594 sc = device_get_softc(dev); 4595 4596 /* Clear device-specific "PCI retry timeout" register (41h). */ 4597 reg = pci_read_config(dev, 0x40, sizeof(reg)); 4598 pci_write_config(dev, 0x40, reg & ~0xff00, sizeof(reg)); 4599 4600 /* Enable bus-mastering and hardware bug workaround. */ 4601 pci_enable_busmaster(dev); 4602 reg = pci_read_config(dev, PCIR_STATUS, sizeof(reg)); 4603 /* if !MSI */ 4604 if (reg & PCIM_STATUS_INTxSTATE) { 4605 reg &= ~PCIM_STATUS_INTxSTATE; 4606 } 4607 pci_write_config(dev, PCIR_STATUS, reg, sizeof(reg)); 4608 4609 rid = PCIR_BAR(0); 4610 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 4611 RF_ACTIVE); 4612 if (sc->sc_mem == NULL) { 4613 device_printf(sc->sc_dev, "can't map mem space\n"); 4614 return (ENXIO); 4615 } 4616 sc->sc_st = rman_get_bustag(sc->sc_mem); 4617 sc->sc_sh = rman_get_bushandle(sc->sc_mem); 4618 4619 /* Install interrupt handler. */ 4620 count = 1; 4621 rid = 0; 4622 if (pci_alloc_msi(dev, &count) == 0) 4623 rid = 1; 4624 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | 4625 (rid != 0 ? 0 : RF_SHAREABLE)); 4626 if (sc->sc_irq == NULL) { 4627 device_printf(dev, "can't map interrupt\n"); 4628 return (ENXIO); 4629 } 4630 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, 4631 NULL, iwm_intr, sc, &sc->sc_ih); 4632 if (sc->sc_ih == NULL) { 4633 device_printf(dev, "can't establish interrupt"); 4634 return (ENXIO); 4635 } 4636 sc->sc_dmat = bus_get_dma_tag(sc->sc_dev); 4637 4638 return (0); 4639 } 4640 4641 static void 4642 iwm_pci_detach(device_t dev) 4643 { 4644 struct iwm_softc *sc = device_get_softc(dev); 4645 4646 if (sc->sc_irq != NULL) { 4647 bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih); 4648 bus_release_resource(dev, SYS_RES_IRQ, 4649 rman_get_rid(sc->sc_irq), sc->sc_irq); 4650 pci_release_msi(dev); 4651 } 4652 if (sc->sc_mem != NULL) 4653 bus_release_resource(dev, SYS_RES_MEMORY, 4654 rman_get_rid(sc->sc_mem), sc->sc_mem); 4655 } 4656 4657 4658 4659 static int 4660 iwm_attach(device_t dev) 4661 { 4662 struct iwm_softc *sc; 4663 struct ieee80211com *ic; 4664 struct ifnet *ifp; 4665 int error; 4666 int txq_i, i; 4667 4668 sc = device_get_softc(dev); 4669 sc->sc_dev = dev; 4670 mtx_init(&sc->sc_mtx, "iwm_mtx", MTX_DEF, 0); 4671 4672 callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0); 4673 TASK_INIT(&sc->sc_es_task, 0, iwm_endscan_cb, sc); 4674 sc->sc_tq = taskqueue_create("iwm_taskq", M_WAITOK, 4675 taskqueue_thread_enqueue, &sc->sc_tq); 4676 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwm_taskq"); 4677 if (error != 0) { 4678 device_printf(dev, "can't start threads, error %d\n", 4679 error); 4680 goto fail; 4681 } 4682 4683 /* PCI attach */ 4684 error = iwm_pci_attach(dev); 4685 if (error != 0) 4686 goto fail; 4687 4688 sc->sc_wantresp = -1; 4689 4690 /* Check device type */ 4691 error = iwm_dev_check(dev); 4692 if (error != 0) 4693 goto fail; 4694 4695 sc->sc_fwdmasegsz = IWM_FWDMASEGSZ; 4696 4697 /* 4698 * We now start fiddling with the hardware 4699 */ 4700 sc->sc_hw_rev = IWM_READ(sc, IWM_CSR_HW_REV); 4701 if (iwm_prepare_card_hw(sc) != 0) { 4702 device_printf(dev, "could not initialize hardware\n"); 4703 goto fail; 4704 } 4705 4706 /* Allocate DMA memory for firmware transfers. */ 4707 if ((error = iwm_alloc_fwmem(sc)) != 0) { 4708 device_printf(dev, "could not allocate memory for firmware\n"); 4709 goto fail; 4710 } 4711 4712 /* Allocate "Keep Warm" page. */ 4713 if ((error = iwm_alloc_kw(sc)) != 0) { 4714 device_printf(dev, "could not allocate keep warm page\n"); 4715 goto fail; 4716 } 4717 4718 /* We use ICT interrupts */ 4719 if ((error = iwm_alloc_ict(sc)) != 0) { 4720 device_printf(dev, "could not allocate ICT table\n"); 4721 goto fail; 4722 } 4723 4724 /* Allocate TX scheduler "rings". */ 4725 if ((error = iwm_alloc_sched(sc)) != 0) { 4726 device_printf(dev, "could not allocate TX scheduler rings\n"); 4727 goto fail; 4728 } 4729 4730 /* Allocate TX rings */ 4731 for (txq_i = 0; txq_i < nitems(sc->txq); txq_i++) { 4732 if ((error = iwm_alloc_tx_ring(sc, 4733 &sc->txq[txq_i], txq_i)) != 0) { 4734 device_printf(dev, 4735 "could not allocate TX ring %d\n", 4736 txq_i); 4737 goto fail; 4738 } 4739 } 4740 4741 /* Allocate RX ring. */ 4742 if ((error = iwm_alloc_rx_ring(sc, &sc->rxq)) != 0) { 4743 device_printf(dev, "could not allocate RX ring\n"); 4744 goto fail; 4745 } 4746 4747 /* Clear pending interrupts. */ 4748 IWM_WRITE(sc, IWM_CSR_INT, 0xffffffff); 4749 4750 sc->sc_ifp = ifp = if_alloc(IFT_IEEE80211); 4751 if (ifp == NULL) { 4752 goto fail; 4753 } 4754 ifp->if_softc = sc; 4755 if_initname(ifp, "iwm", device_get_unit(dev)); 4756 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 4757 ifp->if_init = iwm_init; 4758 ifp->if_ioctl = iwm_ioctl; 4759 ifp->if_start = iwm_start; 4760 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 4761 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 4762 IFQ_SET_READY(&ifp->if_snd); 4763 4764 /* 4765 * Set it here so we can initialise net80211. 4766 * But, if we fail before we call net80211_ifattach(), 4767 * we can't just call iwm_detach() or it'll free 4768 * net80211 without it having been setup. 4769 */ 4770 sc->sc_ic = ic = ifp->if_l2com; 4771 ic->ic_ifp = ifp; 4772 ic->ic_softc = sc; 4773 ic->ic_name = device_get_nameunit(sc->sc_dev); 4774 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 4775 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 4776 4777 /* Set device capabilities. */ 4778 ic->ic_caps = 4779 IEEE80211_C_STA | 4780 IEEE80211_C_WPA | /* WPA/RSN */ 4781 IEEE80211_C_WME | 4782 IEEE80211_C_SHSLOT | /* short slot time supported */ 4783 IEEE80211_C_SHPREAMBLE /* short preamble supported */ 4784 // IEEE80211_C_BGSCAN /* capable of bg scanning */ 4785 ; 4786 for (i = 0; i < nitems(sc->sc_phyctxt); i++) { 4787 sc->sc_phyctxt[i].id = i; 4788 sc->sc_phyctxt[i].color = 0; 4789 sc->sc_phyctxt[i].ref = 0; 4790 sc->sc_phyctxt[i].channel = NULL; 4791 } 4792 4793 /* Max RSSI */ 4794 sc->sc_max_rssi = IWM_MAX_DBM - IWM_MIN_DBM; 4795 sc->sc_preinit_hook.ich_func = iwm_preinit; 4796 sc->sc_preinit_hook.ich_arg = sc; 4797 if (config_intrhook_establish(&sc->sc_preinit_hook) != 0) { 4798 device_printf(dev, "config_intrhook_establish failed\n"); 4799 goto fail; 4800 } 4801 4802 #ifdef IWM_DEBUG 4803 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 4804 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "debug", 4805 CTLFLAG_RW, &sc->sc_debug, 0, "control debugging"); 4806 #endif 4807 4808 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4809 "<-%s\n", __func__); 4810 4811 return 0; 4812 4813 /* Free allocated memory if something failed during attachment. */ 4814 fail: 4815 iwm_detach_local(sc, 0); 4816 4817 return ENXIO; 4818 } 4819 4820 static int 4821 iwm_update_edca(struct ieee80211com *ic) 4822 { 4823 struct iwm_softc *sc = ic->ic_ifp->if_softc; 4824 4825 device_printf(sc->sc_dev, "%s: called\n", __func__); 4826 return (0); 4827 } 4828 4829 static void 4830 iwm_preinit(void *arg) 4831 { 4832 struct iwm_softc *sc = arg; 4833 device_t dev = sc->sc_dev; 4834 struct ieee80211com *ic = sc->sc_ic; 4835 int error; 4836 4837 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4838 "->%s\n", __func__); 4839 4840 IWM_LOCK(sc); 4841 if ((error = iwm_start_hw(sc)) != 0) { 4842 device_printf(dev, "could not initialize hardware\n"); 4843 IWM_UNLOCK(sc); 4844 goto fail; 4845 } 4846 4847 error = iwm_run_init_mvm_ucode(sc, 1); 4848 iwm_stop_device(sc); 4849 if (error) { 4850 IWM_UNLOCK(sc); 4851 goto fail; 4852 } 4853 device_printf(dev, 4854 "revision: 0x%x, firmware %d.%d (API ver. %d)\n", 4855 sc->sc_hw_rev & IWM_CSR_HW_REV_TYPE_MSK, 4856 IWM_UCODE_MAJOR(sc->sc_fwver), 4857 IWM_UCODE_MINOR(sc->sc_fwver), 4858 IWM_UCODE_API(sc->sc_fwver)); 4859 4860 /* not all hardware can do 5GHz band */ 4861 if (!sc->sc_nvm.sku_cap_band_52GHz_enable) 4862 memset(&ic->ic_sup_rates[IEEE80211_MODE_11A], 0, 4863 sizeof(ic->ic_sup_rates[IEEE80211_MODE_11A])); 4864 IWM_UNLOCK(sc); 4865 4866 /* 4867 * At this point we've committed - if we fail to do setup, 4868 * we now also have to tear down the net80211 state. 4869 */ 4870 ieee80211_ifattach(ic, sc->sc_bssid); 4871 ic->ic_vap_create = iwm_vap_create; 4872 ic->ic_vap_delete = iwm_vap_delete; 4873 ic->ic_raw_xmit = iwm_raw_xmit; 4874 ic->ic_node_alloc = iwm_node_alloc; 4875 ic->ic_scan_start = iwm_scan_start; 4876 ic->ic_scan_end = iwm_scan_end; 4877 ic->ic_update_mcast = iwm_update_mcast; 4878 ic->ic_set_channel = iwm_set_channel; 4879 ic->ic_scan_curchan = iwm_scan_curchan; 4880 ic->ic_scan_mindwell = iwm_scan_mindwell; 4881 ic->ic_wme.wme_update = iwm_update_edca; 4882 iwm_radiotap_attach(sc); 4883 if (bootverbose) 4884 ieee80211_announce(ic); 4885 4886 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4887 "<-%s\n", __func__); 4888 config_intrhook_disestablish(&sc->sc_preinit_hook); 4889 4890 return; 4891 fail: 4892 config_intrhook_disestablish(&sc->sc_preinit_hook); 4893 iwm_detach_local(sc, 0); 4894 } 4895 4896 /* 4897 * Attach the interface to 802.11 radiotap. 4898 */ 4899 static void 4900 iwm_radiotap_attach(struct iwm_softc *sc) 4901 { 4902 struct ifnet *ifp = sc->sc_ifp; 4903 struct ieee80211com *ic = ifp->if_l2com; 4904 4905 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4906 "->%s begin\n", __func__); 4907 ieee80211_radiotap_attach(ic, 4908 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 4909 IWM_TX_RADIOTAP_PRESENT, 4910 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 4911 IWM_RX_RADIOTAP_PRESENT); 4912 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4913 "->%s end\n", __func__); 4914 } 4915 4916 static struct ieee80211vap * 4917 iwm_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 4918 enum ieee80211_opmode opmode, int flags, 4919 const uint8_t bssid[IEEE80211_ADDR_LEN], 4920 const uint8_t mac[IEEE80211_ADDR_LEN]) 4921 { 4922 struct iwm_vap *ivp; 4923 struct ieee80211vap *vap; 4924 uint8_t mac1[IEEE80211_ADDR_LEN]; 4925 4926 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 4927 return NULL; 4928 IEEE80211_ADDR_COPY(mac1, mac); 4929 ivp = (struct iwm_vap *) malloc(sizeof(struct iwm_vap), 4930 M_80211_VAP, M_NOWAIT | M_ZERO); 4931 if (ivp == NULL) 4932 return NULL; 4933 vap = &ivp->iv_vap; 4934 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac1); 4935 IEEE80211_ADDR_COPY(ivp->macaddr, mac1); 4936 vap->iv_bmissthreshold = 10; /* override default */ 4937 /* Override with driver methods. */ 4938 ivp->iv_newstate = vap->iv_newstate; 4939 vap->iv_newstate = iwm_newstate; 4940 4941 ieee80211_ratectl_init(vap); 4942 /* Complete setup. */ 4943 ieee80211_vap_attach(vap, iwm_media_change, ieee80211_media_status); 4944 ic->ic_opmode = opmode; 4945 4946 return vap; 4947 } 4948 4949 static void 4950 iwm_vap_delete(struct ieee80211vap *vap) 4951 { 4952 struct iwm_vap *ivp = IWM_VAP(vap); 4953 4954 ieee80211_ratectl_deinit(vap); 4955 ieee80211_vap_detach(vap); 4956 free(ivp, M_80211_VAP); 4957 } 4958 4959 static void 4960 iwm_scan_start(struct ieee80211com *ic) 4961 { 4962 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4963 struct iwm_softc *sc = ic->ic_ifp->if_softc; 4964 int error; 4965 4966 if (sc->sc_scanband) 4967 return; 4968 IWM_LOCK(sc); 4969 error = iwm_mvm_scan_request(sc, IEEE80211_CHAN_2GHZ, 0, NULL, 0); 4970 if (error) { 4971 device_printf(sc->sc_dev, "could not initiate scan\n"); 4972 IWM_UNLOCK(sc); 4973 ieee80211_cancel_scan(vap); 4974 } else 4975 IWM_UNLOCK(sc); 4976 } 4977 4978 static void 4979 iwm_scan_end(struct ieee80211com *ic) 4980 { 4981 } 4982 4983 static void 4984 iwm_update_mcast(struct ieee80211com *ic) 4985 { 4986 } 4987 4988 static void 4989 iwm_set_channel(struct ieee80211com *ic) 4990 { 4991 } 4992 4993 static void 4994 iwm_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell) 4995 { 4996 } 4997 4998 static void 4999 iwm_scan_mindwell(struct ieee80211_scan_state *ss) 5000 { 5001 return; 5002 } 5003 5004 void 5005 iwm_init_task(void *arg1) 5006 { 5007 struct iwm_softc *sc = arg1; 5008 struct ifnet *ifp = sc->sc_ifp; 5009 5010 IWM_LOCK(sc); 5011 while (sc->sc_flags & IWM_FLAG_BUSY) 5012 msleep(&sc->sc_flags, &sc->sc_mtx, 0, "iwmpwr", 0); 5013 sc->sc_flags |= IWM_FLAG_BUSY; 5014 iwm_stop_locked(ifp); 5015 if ((ifp->if_flags & IFF_UP) && 5016 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 5017 iwm_init(sc); 5018 sc->sc_flags &= ~IWM_FLAG_BUSY; 5019 wakeup(&sc->sc_flags); 5020 IWM_UNLOCK(sc); 5021 } 5022 5023 static int 5024 iwm_resume(device_t dev) 5025 { 5026 uint16_t reg; 5027 5028 /* Clear device-specific "PCI retry timeout" register (41h). */ 5029 reg = pci_read_config(dev, 0x40, sizeof(reg)); 5030 pci_write_config(dev, 0x40, reg & ~0xff00, sizeof(reg)); 5031 iwm_init_task(device_get_softc(dev)); 5032 5033 return 0; 5034 } 5035 5036 static int 5037 iwm_suspend(device_t dev) 5038 { 5039 struct iwm_softc *sc = device_get_softc(dev); 5040 struct ifnet *ifp = sc->sc_ifp; 5041 5042 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 5043 iwm_stop(ifp, 0); 5044 5045 return (0); 5046 } 5047 5048 static int 5049 iwm_detach_local(struct iwm_softc *sc, int do_net80211) 5050 { 5051 struct ifnet *ifp = sc->sc_ifp; 5052 struct ieee80211com *ic; 5053 struct iwm_fw_info *fw = &sc->sc_fw; 5054 device_t dev = sc->sc_dev; 5055 int i; 5056 5057 if (sc->sc_tq) { 5058 taskqueue_drain_all(sc->sc_tq); 5059 taskqueue_free(sc->sc_tq); 5060 } 5061 if (ifp) { 5062 callout_drain(&sc->sc_watchdog_to); 5063 ic = sc->sc_ic; 5064 iwm_stop_device(sc); 5065 if (ic && do_net80211) 5066 ieee80211_ifdetach(ic); 5067 if_free(ifp); 5068 } 5069 5070 /* Free descriptor rings */ 5071 for (i = 0; i < nitems(sc->txq); i++) 5072 iwm_free_tx_ring(sc, &sc->txq[i]); 5073 5074 /* Free firmware */ 5075 if (fw->fw_rawdata != NULL) 5076 iwm_fw_info_free(fw); 5077 5078 /* free scheduler */ 5079 iwm_free_sched(sc); 5080 if (sc->ict_dma.vaddr != NULL) 5081 iwm_free_ict(sc); 5082 if (sc->kw_dma.vaddr != NULL) 5083 iwm_free_kw(sc); 5084 if (sc->fw_dma.vaddr != NULL) 5085 iwm_free_fwmem(sc); 5086 5087 /* Finished with the hardware - detach things */ 5088 iwm_pci_detach(dev); 5089 5090 mtx_destroy(&sc->sc_mtx); 5091 5092 return (0); 5093 } 5094 5095 static int 5096 iwm_detach(device_t dev) 5097 { 5098 struct iwm_softc *sc = device_get_softc(dev); 5099 5100 return (iwm_detach_local(sc, 1)); 5101 } 5102 5103 static device_method_t iwm_pci_methods[] = { 5104 /* Device interface */ 5105 DEVMETHOD(device_probe, iwm_probe), 5106 DEVMETHOD(device_attach, iwm_attach), 5107 DEVMETHOD(device_detach, iwm_detach), 5108 DEVMETHOD(device_suspend, iwm_suspend), 5109 DEVMETHOD(device_resume, iwm_resume), 5110 5111 DEVMETHOD_END 5112 }; 5113 5114 static driver_t iwm_pci_driver = { 5115 "iwm", 5116 iwm_pci_methods, 5117 sizeof (struct iwm_softc) 5118 }; 5119 5120 static devclass_t iwm_devclass; 5121 5122 DRIVER_MODULE(iwm, pci, iwm_pci_driver, iwm_devclass, NULL, NULL); 5123 MODULE_DEPEND(iwm, firmware, 1, 1, 1); 5124 MODULE_DEPEND(iwm, pci, 1, 1, 1); 5125 MODULE_DEPEND(iwm, wlan, 1, 1, 1); 5126