1 /* $OpenBSD: if_iwm.c,v 1.39 2015/03/23 00:35:19 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2014 genua mbh <info@genua.de> 5 * Copyright (c) 2014 Fixup Software Ltd. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Based on BSD-licensed source modules in the Linux iwlwifi driver, 22 * which were used as the reference documentation for this implementation. 23 * 24 * Driver version we are currently based off of is 25 * Linux 3.14.3 (tag id a2df521e42b1d9a23f620ac79dbfe8655a8391dd) 26 * 27 *********************************************************************** 28 * 29 * This file is provided under a dual BSD/GPLv2 license. When using or 30 * redistributing this file, you may do so under either license. 31 * 32 * GPL LICENSE SUMMARY 33 * 34 * Copyright(c) 2007 - 2013 Intel Corporation. All rights reserved. 35 * 36 * This program is free software; you can redistribute it and/or modify 37 * it under the terms of version 2 of the GNU General Public License as 38 * published by the Free Software Foundation. 39 * 40 * This program is distributed in the hope that it will be useful, but 41 * WITHOUT ANY WARRANTY; without even the implied warranty of 42 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 43 * General Public License for more details. 44 * 45 * You should have received a copy of the GNU General Public License 46 * along with this program; if not, write to the Free Software 47 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 48 * USA 49 * 50 * The full GNU General Public License is included in this distribution 51 * in the file called COPYING. 52 * 53 * Contact Information: 54 * Intel Linux Wireless <ilw@linux.intel.com> 55 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 56 * 57 * 58 * BSD LICENSE 59 * 60 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 67 * * Redistributions of source code must retain the above copyright 68 * notice, this list of conditions and the following disclaimer. 69 * * Redistributions in binary form must reproduce the above copyright 70 * notice, this list of conditions and the following disclaimer in 71 * the documentation and/or other materials provided with the 72 * distribution. 73 * * Neither the name Intel Corporation nor the names of its 74 * contributors may be used to endorse or promote products derived 75 * from this software without specific prior written permission. 76 * 77 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 78 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 79 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 80 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 81 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 82 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 83 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 84 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 85 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 86 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 87 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 88 */ 89 90 /*- 91 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr> 92 * 93 * Permission to use, copy, modify, and distribute this software for any 94 * purpose with or without fee is hereby granted, provided that the above 95 * copyright notice and this permission notice appear in all copies. 96 * 97 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 98 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 99 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 100 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 101 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 102 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 103 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 104 */ 105 #include <sys/cdefs.h> 106 __FBSDID("$FreeBSD$"); 107 108 #include <sys/param.h> 109 #include <sys/bus.h> 110 #include <sys/conf.h> 111 #include <sys/endian.h> 112 #include <sys/firmware.h> 113 #include <sys/kernel.h> 114 #include <sys/malloc.h> 115 #include <sys/mbuf.h> 116 #include <sys/mutex.h> 117 #include <sys/module.h> 118 #include <sys/proc.h> 119 #include <sys/rman.h> 120 #include <sys/socket.h> 121 #include <sys/sockio.h> 122 #include <sys/sysctl.h> 123 #include <sys/linker.h> 124 125 #include <machine/bus.h> 126 #include <machine/endian.h> 127 #include <machine/resource.h> 128 129 #include <dev/pci/pcivar.h> 130 #include <dev/pci/pcireg.h> 131 132 #include <net/bpf.h> 133 134 #include <net/if.h> 135 #include <net/if_var.h> 136 #include <net/if_arp.h> 137 #include <net/if_dl.h> 138 #include <net/if_media.h> 139 #include <net/if_types.h> 140 141 #include <netinet/in.h> 142 #include <netinet/in_systm.h> 143 #include <netinet/if_ether.h> 144 #include <netinet/ip.h> 145 146 #include <net80211/ieee80211_var.h> 147 #include <net80211/ieee80211_regdomain.h> 148 #include <net80211/ieee80211_ratectl.h> 149 #include <net80211/ieee80211_radiotap.h> 150 151 #include <dev/iwm/if_iwmreg.h> 152 #include <dev/iwm/if_iwmvar.h> 153 #include <dev/iwm/if_iwm_debug.h> 154 #include <dev/iwm/if_iwm_util.h> 155 #include <dev/iwm/if_iwm_binding.h> 156 #include <dev/iwm/if_iwm_phy_db.h> 157 #include <dev/iwm/if_iwm_mac_ctxt.h> 158 #include <dev/iwm/if_iwm_phy_ctxt.h> 159 #include <dev/iwm/if_iwm_time_event.h> 160 #include <dev/iwm/if_iwm_power.h> 161 #include <dev/iwm/if_iwm_scan.h> 162 163 #include <dev/iwm/if_iwm_pcie_trans.h> 164 165 const uint8_t iwm_nvm_channels[] = { 166 /* 2.4 GHz */ 167 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 168 /* 5 GHz */ 169 36, 40, 44, 48, 52, 56, 60, 64, 170 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 171 149, 153, 157, 161, 165 172 }; 173 #define IWM_NUM_2GHZ_CHANNELS 14 174 175 _Static_assert(nitems(iwm_nvm_channels) <= IWM_NUM_CHANNELS, 176 "IWM_NUM_CHANNELS is too small"); 177 178 /* 179 * XXX For now, there's simply a fixed set of rate table entries 180 * that are populated. 181 */ 182 const struct iwm_rate { 183 uint8_t rate; 184 uint8_t plcp; 185 } iwm_rates[] = { 186 { 2, IWM_RATE_1M_PLCP }, 187 { 4, IWM_RATE_2M_PLCP }, 188 { 11, IWM_RATE_5M_PLCP }, 189 { 22, IWM_RATE_11M_PLCP }, 190 { 12, IWM_RATE_6M_PLCP }, 191 { 18, IWM_RATE_9M_PLCP }, 192 { 24, IWM_RATE_12M_PLCP }, 193 { 36, IWM_RATE_18M_PLCP }, 194 { 48, IWM_RATE_24M_PLCP }, 195 { 72, IWM_RATE_36M_PLCP }, 196 { 96, IWM_RATE_48M_PLCP }, 197 { 108, IWM_RATE_54M_PLCP }, 198 }; 199 #define IWM_RIDX_CCK 0 200 #define IWM_RIDX_OFDM 4 201 #define IWM_RIDX_MAX (nitems(iwm_rates)-1) 202 #define IWM_RIDX_IS_CCK(_i_) ((_i_) < IWM_RIDX_OFDM) 203 #define IWM_RIDX_IS_OFDM(_i_) ((_i_) >= IWM_RIDX_OFDM) 204 205 static int iwm_store_cscheme(struct iwm_softc *, const uint8_t *, size_t); 206 static int iwm_firmware_store_section(struct iwm_softc *, 207 enum iwm_ucode_type, 208 const uint8_t *, size_t); 209 static int iwm_set_default_calib(struct iwm_softc *, const void *); 210 static void iwm_fw_info_free(struct iwm_fw_info *); 211 static int iwm_read_firmware(struct iwm_softc *, enum iwm_ucode_type); 212 static void iwm_dma_map_addr(void *, bus_dma_segment_t *, int, int); 213 static int iwm_dma_contig_alloc(bus_dma_tag_t, struct iwm_dma_info *, 214 bus_size_t, bus_size_t); 215 static void iwm_dma_contig_free(struct iwm_dma_info *); 216 static int iwm_alloc_fwmem(struct iwm_softc *); 217 static void iwm_free_fwmem(struct iwm_softc *); 218 static int iwm_alloc_sched(struct iwm_softc *); 219 static void iwm_free_sched(struct iwm_softc *); 220 static int iwm_alloc_kw(struct iwm_softc *); 221 static void iwm_free_kw(struct iwm_softc *); 222 static int iwm_alloc_ict(struct iwm_softc *); 223 static void iwm_free_ict(struct iwm_softc *); 224 static int iwm_alloc_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 225 static void iwm_reset_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 226 static void iwm_free_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 227 static int iwm_alloc_tx_ring(struct iwm_softc *, struct iwm_tx_ring *, 228 int); 229 static void iwm_reset_tx_ring(struct iwm_softc *, struct iwm_tx_ring *); 230 static void iwm_free_tx_ring(struct iwm_softc *, struct iwm_tx_ring *); 231 static void iwm_enable_interrupts(struct iwm_softc *); 232 static void iwm_restore_interrupts(struct iwm_softc *); 233 static void iwm_disable_interrupts(struct iwm_softc *); 234 static void iwm_ict_reset(struct iwm_softc *); 235 static int iwm_allow_mcast(struct ieee80211vap *, struct iwm_softc *); 236 static void iwm_stop_device(struct iwm_softc *); 237 static void iwm_mvm_nic_config(struct iwm_softc *); 238 static int iwm_nic_rx_init(struct iwm_softc *); 239 static int iwm_nic_tx_init(struct iwm_softc *); 240 static int iwm_nic_init(struct iwm_softc *); 241 static void iwm_enable_txq(struct iwm_softc *, int, int); 242 static int iwm_post_alive(struct iwm_softc *); 243 static int iwm_nvm_read_chunk(struct iwm_softc *, uint16_t, uint16_t, 244 uint16_t, uint8_t *, uint16_t *); 245 static int iwm_nvm_read_section(struct iwm_softc *, uint16_t, uint8_t *, 246 uint16_t *); 247 static uint32_t iwm_eeprom_channel_flags(uint16_t); 248 static void iwm_add_channel_band(struct iwm_softc *, 249 struct ieee80211_channel[], int, int *, int, int, 250 const uint8_t[]); 251 static void iwm_init_channel_map(struct ieee80211com *, int, int *, 252 struct ieee80211_channel[]); 253 static int iwm_parse_nvm_data(struct iwm_softc *, const uint16_t *, 254 const uint16_t *, const uint16_t *, uint8_t, 255 uint8_t); 256 struct iwm_nvm_section; 257 static int iwm_parse_nvm_sections(struct iwm_softc *, 258 struct iwm_nvm_section *); 259 static int iwm_nvm_init(struct iwm_softc *); 260 static int iwm_firmware_load_chunk(struct iwm_softc *, uint32_t, 261 const uint8_t *, uint32_t); 262 static int iwm_load_firmware(struct iwm_softc *, enum iwm_ucode_type); 263 static int iwm_start_fw(struct iwm_softc *, enum iwm_ucode_type); 264 static int iwm_fw_alive(struct iwm_softc *, uint32_t); 265 static int iwm_send_tx_ant_cfg(struct iwm_softc *, uint8_t); 266 static int iwm_send_phy_cfg_cmd(struct iwm_softc *); 267 static int iwm_mvm_load_ucode_wait_alive(struct iwm_softc *, 268 enum iwm_ucode_type); 269 static int iwm_run_init_mvm_ucode(struct iwm_softc *, int); 270 static int iwm_rx_addbuf(struct iwm_softc *, int, int); 271 static int iwm_mvm_calc_rssi(struct iwm_softc *, struct iwm_rx_phy_info *); 272 static int iwm_mvm_get_signal_strength(struct iwm_softc *, 273 struct iwm_rx_phy_info *); 274 static void iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *, 275 struct iwm_rx_packet *, 276 struct iwm_rx_data *); 277 static int iwm_get_noise(const struct iwm_mvm_statistics_rx_non_phy *); 278 static void iwm_mvm_rx_rx_mpdu(struct iwm_softc *, struct iwm_rx_packet *, 279 struct iwm_rx_data *); 280 static int iwm_mvm_rx_tx_cmd_single(struct iwm_softc *, 281 struct iwm_rx_packet *, 282 struct iwm_node *); 283 static void iwm_mvm_rx_tx_cmd(struct iwm_softc *, struct iwm_rx_packet *, 284 struct iwm_rx_data *); 285 static void iwm_cmd_done(struct iwm_softc *, struct iwm_rx_packet *); 286 #if 0 287 static void iwm_update_sched(struct iwm_softc *, int, int, uint8_t, 288 uint16_t); 289 #endif 290 static const struct iwm_rate * 291 iwm_tx_fill_cmd(struct iwm_softc *, struct iwm_node *, 292 struct ieee80211_frame *, struct iwm_tx_cmd *); 293 static int iwm_tx(struct iwm_softc *, struct mbuf *, 294 struct ieee80211_node *, int); 295 static int iwm_raw_xmit(struct ieee80211_node *, struct mbuf *, 296 const struct ieee80211_bpf_params *); 297 static void iwm_mvm_add_sta_cmd_v6_to_v5(struct iwm_mvm_add_sta_cmd_v6 *, 298 struct iwm_mvm_add_sta_cmd_v5 *); 299 static int iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *, 300 struct iwm_mvm_add_sta_cmd_v6 *, 301 int *); 302 static int iwm_mvm_sta_send_to_fw(struct iwm_softc *, struct iwm_node *, 303 int); 304 static int iwm_mvm_add_sta(struct iwm_softc *, struct iwm_node *); 305 static int iwm_mvm_update_sta(struct iwm_softc *, struct iwm_node *); 306 static int iwm_mvm_add_int_sta_common(struct iwm_softc *, 307 struct iwm_int_sta *, 308 const uint8_t *, uint16_t, uint16_t); 309 static int iwm_mvm_add_aux_sta(struct iwm_softc *); 310 static int iwm_mvm_update_quotas(struct iwm_softc *, struct iwm_node *); 311 static int iwm_auth(struct ieee80211vap *, struct iwm_softc *); 312 static int iwm_assoc(struct ieee80211vap *, struct iwm_softc *); 313 static int iwm_release(struct iwm_softc *, struct iwm_node *); 314 static struct ieee80211_node * 315 iwm_node_alloc(struct ieee80211vap *, 316 const uint8_t[IEEE80211_ADDR_LEN]); 317 static void iwm_setrates(struct iwm_softc *, struct iwm_node *); 318 static int iwm_media_change(struct ifnet *); 319 static int iwm_newstate(struct ieee80211vap *, enum ieee80211_state, int); 320 static void iwm_endscan_cb(void *, int); 321 static int iwm_init_hw(struct iwm_softc *); 322 static void iwm_init(struct iwm_softc *); 323 static void iwm_start(struct iwm_softc *); 324 static void iwm_stop(struct iwm_softc *); 325 static void iwm_watchdog(void *); 326 static void iwm_parent(struct ieee80211com *); 327 #ifdef IWM_DEBUG 328 static const char * 329 iwm_desc_lookup(uint32_t); 330 static void iwm_nic_error(struct iwm_softc *); 331 #endif 332 static void iwm_notif_intr(struct iwm_softc *); 333 static void iwm_intr(void *); 334 static int iwm_attach(device_t); 335 static void iwm_preinit(void *); 336 static int iwm_detach_local(struct iwm_softc *sc, int); 337 static void iwm_init_task(void *); 338 static void iwm_radiotap_attach(struct iwm_softc *); 339 static struct ieee80211vap * 340 iwm_vap_create(struct ieee80211com *, 341 const char [IFNAMSIZ], int, 342 enum ieee80211_opmode, int, 343 const uint8_t [IEEE80211_ADDR_LEN], 344 const uint8_t [IEEE80211_ADDR_LEN]); 345 static void iwm_vap_delete(struct ieee80211vap *); 346 static void iwm_scan_start(struct ieee80211com *); 347 static void iwm_scan_end(struct ieee80211com *); 348 static void iwm_update_mcast(struct ieee80211com *); 349 static void iwm_set_channel(struct ieee80211com *); 350 static void iwm_scan_curchan(struct ieee80211_scan_state *, unsigned long); 351 static void iwm_scan_mindwell(struct ieee80211_scan_state *); 352 static int iwm_detach(device_t); 353 354 /* 355 * Firmware parser. 356 */ 357 358 static int 359 iwm_store_cscheme(struct iwm_softc *sc, const uint8_t *data, size_t dlen) 360 { 361 const struct iwm_fw_cscheme_list *l = (const void *)data; 362 363 if (dlen < sizeof(*l) || 364 dlen < sizeof(l->size) + l->size * sizeof(*l->cs)) 365 return EINVAL; 366 367 /* we don't actually store anything for now, always use s/w crypto */ 368 369 return 0; 370 } 371 372 static int 373 iwm_firmware_store_section(struct iwm_softc *sc, 374 enum iwm_ucode_type type, const uint8_t *data, size_t dlen) 375 { 376 struct iwm_fw_sects *fws; 377 struct iwm_fw_onesect *fwone; 378 379 if (type >= IWM_UCODE_TYPE_MAX) 380 return EINVAL; 381 if (dlen < sizeof(uint32_t)) 382 return EINVAL; 383 384 fws = &sc->sc_fw.fw_sects[type]; 385 if (fws->fw_count >= IWM_UCODE_SECT_MAX) 386 return EINVAL; 387 388 fwone = &fws->fw_sect[fws->fw_count]; 389 390 /* first 32bit are device load offset */ 391 memcpy(&fwone->fws_devoff, data, sizeof(uint32_t)); 392 393 /* rest is data */ 394 fwone->fws_data = data + sizeof(uint32_t); 395 fwone->fws_len = dlen - sizeof(uint32_t); 396 397 fws->fw_count++; 398 fws->fw_totlen += fwone->fws_len; 399 400 return 0; 401 } 402 403 /* iwlwifi: iwl-drv.c */ 404 struct iwm_tlv_calib_data { 405 uint32_t ucode_type; 406 struct iwm_tlv_calib_ctrl calib; 407 } __packed; 408 409 static int 410 iwm_set_default_calib(struct iwm_softc *sc, const void *data) 411 { 412 const struct iwm_tlv_calib_data *def_calib = data; 413 uint32_t ucode_type = le32toh(def_calib->ucode_type); 414 415 if (ucode_type >= IWM_UCODE_TYPE_MAX) { 416 device_printf(sc->sc_dev, 417 "Wrong ucode_type %u for default " 418 "calibration.\n", ucode_type); 419 return EINVAL; 420 } 421 422 sc->sc_default_calib[ucode_type].flow_trigger = 423 def_calib->calib.flow_trigger; 424 sc->sc_default_calib[ucode_type].event_trigger = 425 def_calib->calib.event_trigger; 426 427 return 0; 428 } 429 430 static void 431 iwm_fw_info_free(struct iwm_fw_info *fw) 432 { 433 firmware_put(fw->fw_fp, FIRMWARE_UNLOAD); 434 fw->fw_fp = NULL; 435 /* don't touch fw->fw_status */ 436 memset(fw->fw_sects, 0, sizeof(fw->fw_sects)); 437 } 438 439 static int 440 iwm_read_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 441 { 442 struct iwm_fw_info *fw = &sc->sc_fw; 443 const struct iwm_tlv_ucode_header *uhdr; 444 struct iwm_ucode_tlv tlv; 445 enum iwm_ucode_tlv_type tlv_type; 446 const struct firmware *fwp; 447 const uint8_t *data; 448 int error = 0; 449 size_t len; 450 451 if (fw->fw_status == IWM_FW_STATUS_DONE && 452 ucode_type != IWM_UCODE_TYPE_INIT) 453 return 0; 454 455 while (fw->fw_status == IWM_FW_STATUS_INPROGRESS) 456 msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfwp", 0); 457 fw->fw_status = IWM_FW_STATUS_INPROGRESS; 458 459 if (fw->fw_fp != NULL) 460 iwm_fw_info_free(fw); 461 462 /* 463 * Load firmware into driver memory. 464 * fw_fp will be set. 465 */ 466 IWM_UNLOCK(sc); 467 fwp = firmware_get(sc->sc_fwname); 468 IWM_LOCK(sc); 469 if (fwp == NULL) { 470 device_printf(sc->sc_dev, 471 "could not read firmware %s (error %d)\n", 472 sc->sc_fwname, error); 473 goto out; 474 } 475 fw->fw_fp = fwp; 476 477 /* 478 * Parse firmware contents 479 */ 480 481 uhdr = (const void *)fw->fw_fp->data; 482 if (*(const uint32_t *)fw->fw_fp->data != 0 483 || le32toh(uhdr->magic) != IWM_TLV_UCODE_MAGIC) { 484 device_printf(sc->sc_dev, "invalid firmware %s\n", 485 sc->sc_fwname); 486 error = EINVAL; 487 goto out; 488 } 489 490 sc->sc_fwver = le32toh(uhdr->ver); 491 data = uhdr->data; 492 len = fw->fw_fp->datasize - sizeof(*uhdr); 493 494 while (len >= sizeof(tlv)) { 495 size_t tlv_len; 496 const void *tlv_data; 497 498 memcpy(&tlv, data, sizeof(tlv)); 499 tlv_len = le32toh(tlv.length); 500 tlv_type = le32toh(tlv.type); 501 502 len -= sizeof(tlv); 503 data += sizeof(tlv); 504 tlv_data = data; 505 506 if (len < tlv_len) { 507 device_printf(sc->sc_dev, 508 "firmware too short: %zu bytes\n", 509 len); 510 error = EINVAL; 511 goto parse_out; 512 } 513 514 switch ((int)tlv_type) { 515 case IWM_UCODE_TLV_PROBE_MAX_LEN: 516 if (tlv_len < sizeof(uint32_t)) { 517 device_printf(sc->sc_dev, 518 "%s: PROBE_MAX_LEN (%d) < sizeof(uint32_t)\n", 519 __func__, 520 (int) tlv_len); 521 error = EINVAL; 522 goto parse_out; 523 } 524 sc->sc_capa_max_probe_len 525 = le32toh(*(const uint32_t *)tlv_data); 526 /* limit it to something sensible */ 527 if (sc->sc_capa_max_probe_len > (1<<16)) { 528 IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV, 529 "%s: IWM_UCODE_TLV_PROBE_MAX_LEN " 530 "ridiculous\n", __func__); 531 error = EINVAL; 532 goto parse_out; 533 } 534 break; 535 case IWM_UCODE_TLV_PAN: 536 if (tlv_len) { 537 device_printf(sc->sc_dev, 538 "%s: IWM_UCODE_TLV_PAN: tlv_len (%d) > 0\n", 539 __func__, 540 (int) tlv_len); 541 error = EINVAL; 542 goto parse_out; 543 } 544 sc->sc_capaflags |= IWM_UCODE_TLV_FLAGS_PAN; 545 break; 546 case IWM_UCODE_TLV_FLAGS: 547 if (tlv_len < sizeof(uint32_t)) { 548 device_printf(sc->sc_dev, 549 "%s: IWM_UCODE_TLV_FLAGS: tlv_len (%d) < sizeof(uint32_t)\n", 550 __func__, 551 (int) tlv_len); 552 error = EINVAL; 553 goto parse_out; 554 } 555 /* 556 * Apparently there can be many flags, but Linux driver 557 * parses only the first one, and so do we. 558 * 559 * XXX: why does this override IWM_UCODE_TLV_PAN? 560 * Intentional or a bug? Observations from 561 * current firmware file: 562 * 1) TLV_PAN is parsed first 563 * 2) TLV_FLAGS contains TLV_FLAGS_PAN 564 * ==> this resets TLV_PAN to itself... hnnnk 565 */ 566 sc->sc_capaflags = le32toh(*(const uint32_t *)tlv_data); 567 break; 568 case IWM_UCODE_TLV_CSCHEME: 569 if ((error = iwm_store_cscheme(sc, 570 tlv_data, tlv_len)) != 0) { 571 device_printf(sc->sc_dev, 572 "%s: iwm_store_cscheme(): returned %d\n", 573 __func__, 574 error); 575 goto parse_out; 576 } 577 break; 578 case IWM_UCODE_TLV_NUM_OF_CPU: 579 if (tlv_len != sizeof(uint32_t)) { 580 device_printf(sc->sc_dev, 581 "%s: IWM_UCODE_TLV_NUM_OF_CPU: tlv_len (%d) < sizeof(uint32_t)\n", 582 __func__, 583 (int) tlv_len); 584 error = EINVAL; 585 goto parse_out; 586 } 587 if (le32toh(*(const uint32_t*)tlv_data) != 1) { 588 device_printf(sc->sc_dev, 589 "%s: driver supports " 590 "only TLV_NUM_OF_CPU == 1", 591 __func__); 592 error = EINVAL; 593 goto parse_out; 594 } 595 break; 596 case IWM_UCODE_TLV_SEC_RT: 597 if ((error = iwm_firmware_store_section(sc, 598 IWM_UCODE_TYPE_REGULAR, tlv_data, tlv_len)) != 0) { 599 device_printf(sc->sc_dev, 600 "%s: IWM_UCODE_TYPE_REGULAR: iwm_firmware_store_section() failed; %d\n", 601 __func__, 602 error); 603 goto parse_out; 604 } 605 break; 606 case IWM_UCODE_TLV_SEC_INIT: 607 if ((error = iwm_firmware_store_section(sc, 608 IWM_UCODE_TYPE_INIT, tlv_data, tlv_len)) != 0) { 609 device_printf(sc->sc_dev, 610 "%s: IWM_UCODE_TYPE_INIT: iwm_firmware_store_section() failed; %d\n", 611 __func__, 612 error); 613 goto parse_out; 614 } 615 break; 616 case IWM_UCODE_TLV_SEC_WOWLAN: 617 if ((error = iwm_firmware_store_section(sc, 618 IWM_UCODE_TYPE_WOW, tlv_data, tlv_len)) != 0) { 619 device_printf(sc->sc_dev, 620 "%s: IWM_UCODE_TYPE_WOW: iwm_firmware_store_section() failed; %d\n", 621 __func__, 622 error); 623 goto parse_out; 624 } 625 break; 626 case IWM_UCODE_TLV_DEF_CALIB: 627 if (tlv_len != sizeof(struct iwm_tlv_calib_data)) { 628 device_printf(sc->sc_dev, 629 "%s: IWM_UCODE_TLV_DEV_CALIB: tlv_len (%d) < sizeof(iwm_tlv_calib_data) (%d)\n", 630 __func__, 631 (int) tlv_len, 632 (int) sizeof(struct iwm_tlv_calib_data)); 633 error = EINVAL; 634 goto parse_out; 635 } 636 if ((error = iwm_set_default_calib(sc, tlv_data)) != 0) { 637 device_printf(sc->sc_dev, 638 "%s: iwm_set_default_calib() failed: %d\n", 639 __func__, 640 error); 641 goto parse_out; 642 } 643 break; 644 case IWM_UCODE_TLV_PHY_SKU: 645 if (tlv_len != sizeof(uint32_t)) { 646 error = EINVAL; 647 device_printf(sc->sc_dev, 648 "%s: IWM_UCODE_TLV_PHY_SKU: tlv_len (%d) < sizeof(uint32_t)\n", 649 __func__, 650 (int) tlv_len); 651 goto parse_out; 652 } 653 sc->sc_fw_phy_config = 654 le32toh(*(const uint32_t *)tlv_data); 655 break; 656 657 case IWM_UCODE_TLV_API_CHANGES_SET: 658 case IWM_UCODE_TLV_ENABLED_CAPABILITIES: 659 /* ignore, not used by current driver */ 660 break; 661 662 default: 663 device_printf(sc->sc_dev, 664 "%s: unknown firmware section %d, abort\n", 665 __func__, tlv_type); 666 error = EINVAL; 667 goto parse_out; 668 } 669 670 len -= roundup(tlv_len, 4); 671 data += roundup(tlv_len, 4); 672 } 673 674 KASSERT(error == 0, ("unhandled error")); 675 676 parse_out: 677 if (error) { 678 device_printf(sc->sc_dev, "firmware parse error %d, " 679 "section type %d\n", error, tlv_type); 680 } 681 682 if (!(sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_PM_CMD_SUPPORT)) { 683 device_printf(sc->sc_dev, 684 "device uses unsupported power ops\n"); 685 error = ENOTSUP; 686 } 687 688 out: 689 if (error) { 690 fw->fw_status = IWM_FW_STATUS_NONE; 691 if (fw->fw_fp != NULL) 692 iwm_fw_info_free(fw); 693 } else 694 fw->fw_status = IWM_FW_STATUS_DONE; 695 wakeup(&sc->sc_fw); 696 697 return error; 698 } 699 700 /* 701 * DMA resource routines 702 */ 703 704 static void 705 iwm_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 706 { 707 if (error != 0) 708 return; 709 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs)); 710 *(bus_addr_t *)arg = segs[0].ds_addr; 711 } 712 713 static int 714 iwm_dma_contig_alloc(bus_dma_tag_t tag, struct iwm_dma_info *dma, 715 bus_size_t size, bus_size_t alignment) 716 { 717 int error; 718 719 dma->tag = NULL; 720 dma->size = size; 721 722 error = bus_dma_tag_create(tag, alignment, 723 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size, 724 1, size, 0, NULL, NULL, &dma->tag); 725 if (error != 0) 726 goto fail; 727 728 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, 729 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map); 730 if (error != 0) 731 goto fail; 732 733 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size, 734 iwm_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT); 735 if (error != 0) 736 goto fail; 737 738 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 739 740 return 0; 741 742 fail: iwm_dma_contig_free(dma); 743 return error; 744 } 745 746 static void 747 iwm_dma_contig_free(struct iwm_dma_info *dma) 748 { 749 if (dma->map != NULL) { 750 if (dma->vaddr != NULL) { 751 bus_dmamap_sync(dma->tag, dma->map, 752 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 753 bus_dmamap_unload(dma->tag, dma->map); 754 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 755 dma->vaddr = NULL; 756 } 757 bus_dmamap_destroy(dma->tag, dma->map); 758 dma->map = NULL; 759 } 760 if (dma->tag != NULL) { 761 bus_dma_tag_destroy(dma->tag); 762 dma->tag = NULL; 763 } 764 765 } 766 767 /* fwmem is used to load firmware onto the card */ 768 static int 769 iwm_alloc_fwmem(struct iwm_softc *sc) 770 { 771 /* Must be aligned on a 16-byte boundary. */ 772 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, 773 sc->sc_fwdmasegsz, 16); 774 } 775 776 static void 777 iwm_free_fwmem(struct iwm_softc *sc) 778 { 779 iwm_dma_contig_free(&sc->fw_dma); 780 } 781 782 /* tx scheduler rings. not used? */ 783 static int 784 iwm_alloc_sched(struct iwm_softc *sc) 785 { 786 int rv; 787 788 /* TX scheduler rings must be aligned on a 1KB boundary. */ 789 rv = iwm_dma_contig_alloc(sc->sc_dmat, &sc->sched_dma, 790 nitems(sc->txq) * sizeof(struct iwm_agn_scd_bc_tbl), 1024); 791 return rv; 792 } 793 794 static void 795 iwm_free_sched(struct iwm_softc *sc) 796 { 797 iwm_dma_contig_free(&sc->sched_dma); 798 } 799 800 /* keep-warm page is used internally by the card. see iwl-fh.h for more info */ 801 static int 802 iwm_alloc_kw(struct iwm_softc *sc) 803 { 804 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, 4096, 4096); 805 } 806 807 static void 808 iwm_free_kw(struct iwm_softc *sc) 809 { 810 iwm_dma_contig_free(&sc->kw_dma); 811 } 812 813 /* interrupt cause table */ 814 static int 815 iwm_alloc_ict(struct iwm_softc *sc) 816 { 817 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma, 818 IWM_ICT_SIZE, 1<<IWM_ICT_PADDR_SHIFT); 819 } 820 821 static void 822 iwm_free_ict(struct iwm_softc *sc) 823 { 824 iwm_dma_contig_free(&sc->ict_dma); 825 } 826 827 static int 828 iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 829 { 830 bus_size_t size; 831 int i, error; 832 833 ring->cur = 0; 834 835 /* Allocate RX descriptors (256-byte aligned). */ 836 size = IWM_RX_RING_COUNT * sizeof(uint32_t); 837 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256); 838 if (error != 0) { 839 device_printf(sc->sc_dev, 840 "could not allocate RX ring DMA memory\n"); 841 goto fail; 842 } 843 ring->desc = ring->desc_dma.vaddr; 844 845 /* Allocate RX status area (16-byte aligned). */ 846 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma, 847 sizeof(*ring->stat), 16); 848 if (error != 0) { 849 device_printf(sc->sc_dev, 850 "could not allocate RX status DMA memory\n"); 851 goto fail; 852 } 853 ring->stat = ring->stat_dma.vaddr; 854 855 /* Create RX buffer DMA tag. */ 856 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 857 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 858 IWM_RBUF_SIZE, 1, IWM_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat); 859 if (error != 0) { 860 device_printf(sc->sc_dev, 861 "%s: could not create RX buf DMA tag, error %d\n", 862 __func__, error); 863 goto fail; 864 } 865 866 /* 867 * Allocate and map RX buffers. 868 */ 869 for (i = 0; i < IWM_RX_RING_COUNT; i++) { 870 if ((error = iwm_rx_addbuf(sc, IWM_RBUF_SIZE, i)) != 0) { 871 goto fail; 872 } 873 } 874 return 0; 875 876 fail: iwm_free_rx_ring(sc, ring); 877 return error; 878 } 879 880 static void 881 iwm_reset_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 882 { 883 884 /* XXX print out if we can't lock the NIC? */ 885 if (iwm_nic_lock(sc)) { 886 /* XXX handle if RX stop doesn't finish? */ 887 (void) iwm_pcie_rx_stop(sc); 888 iwm_nic_unlock(sc); 889 } 890 /* Reset the ring state */ 891 ring->cur = 0; 892 memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat)); 893 } 894 895 static void 896 iwm_free_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 897 { 898 int i; 899 900 iwm_dma_contig_free(&ring->desc_dma); 901 iwm_dma_contig_free(&ring->stat_dma); 902 903 for (i = 0; i < IWM_RX_RING_COUNT; i++) { 904 struct iwm_rx_data *data = &ring->data[i]; 905 906 if (data->m != NULL) { 907 bus_dmamap_sync(ring->data_dmat, data->map, 908 BUS_DMASYNC_POSTREAD); 909 bus_dmamap_unload(ring->data_dmat, data->map); 910 m_freem(data->m); 911 data->m = NULL; 912 } 913 if (data->map != NULL) { 914 bus_dmamap_destroy(ring->data_dmat, data->map); 915 data->map = NULL; 916 } 917 } 918 if (ring->data_dmat != NULL) { 919 bus_dma_tag_destroy(ring->data_dmat); 920 ring->data_dmat = NULL; 921 } 922 } 923 924 static int 925 iwm_alloc_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring, int qid) 926 { 927 bus_addr_t paddr; 928 bus_size_t size; 929 int i, error; 930 931 ring->qid = qid; 932 ring->queued = 0; 933 ring->cur = 0; 934 935 /* Allocate TX descriptors (256-byte aligned). */ 936 size = IWM_TX_RING_COUNT * sizeof (struct iwm_tfd); 937 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256); 938 if (error != 0) { 939 device_printf(sc->sc_dev, 940 "could not allocate TX ring DMA memory\n"); 941 goto fail; 942 } 943 ring->desc = ring->desc_dma.vaddr; 944 945 /* 946 * We only use rings 0 through 9 (4 EDCA + cmd) so there is no need 947 * to allocate commands space for other rings. 948 */ 949 if (qid > IWM_MVM_CMD_QUEUE) 950 return 0; 951 952 size = IWM_TX_RING_COUNT * sizeof(struct iwm_device_cmd); 953 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma, size, 4); 954 if (error != 0) { 955 device_printf(sc->sc_dev, 956 "could not allocate TX cmd DMA memory\n"); 957 goto fail; 958 } 959 ring->cmd = ring->cmd_dma.vaddr; 960 961 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 962 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 963 IWM_MAX_SCATTER - 2, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 964 if (error != 0) { 965 device_printf(sc->sc_dev, "could not create TX buf DMA tag\n"); 966 goto fail; 967 } 968 969 paddr = ring->cmd_dma.paddr; 970 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 971 struct iwm_tx_data *data = &ring->data[i]; 972 973 data->cmd_paddr = paddr; 974 data->scratch_paddr = paddr + sizeof(struct iwm_cmd_header) 975 + offsetof(struct iwm_tx_cmd, scratch); 976 paddr += sizeof(struct iwm_device_cmd); 977 978 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 979 if (error != 0) { 980 device_printf(sc->sc_dev, 981 "could not create TX buf DMA map\n"); 982 goto fail; 983 } 984 } 985 KASSERT(paddr == ring->cmd_dma.paddr + size, 986 ("invalid physical address")); 987 return 0; 988 989 fail: iwm_free_tx_ring(sc, ring); 990 return error; 991 } 992 993 static void 994 iwm_reset_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring) 995 { 996 int i; 997 998 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 999 struct iwm_tx_data *data = &ring->data[i]; 1000 1001 if (data->m != NULL) { 1002 bus_dmamap_sync(ring->data_dmat, data->map, 1003 BUS_DMASYNC_POSTWRITE); 1004 bus_dmamap_unload(ring->data_dmat, data->map); 1005 m_freem(data->m); 1006 data->m = NULL; 1007 } 1008 } 1009 /* Clear TX descriptors. */ 1010 memset(ring->desc, 0, ring->desc_dma.size); 1011 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 1012 BUS_DMASYNC_PREWRITE); 1013 sc->qfullmsk &= ~(1 << ring->qid); 1014 ring->queued = 0; 1015 ring->cur = 0; 1016 } 1017 1018 static void 1019 iwm_free_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring) 1020 { 1021 int i; 1022 1023 iwm_dma_contig_free(&ring->desc_dma); 1024 iwm_dma_contig_free(&ring->cmd_dma); 1025 1026 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 1027 struct iwm_tx_data *data = &ring->data[i]; 1028 1029 if (data->m != NULL) { 1030 bus_dmamap_sync(ring->data_dmat, data->map, 1031 BUS_DMASYNC_POSTWRITE); 1032 bus_dmamap_unload(ring->data_dmat, data->map); 1033 m_freem(data->m); 1034 data->m = NULL; 1035 } 1036 if (data->map != NULL) { 1037 bus_dmamap_destroy(ring->data_dmat, data->map); 1038 data->map = NULL; 1039 } 1040 } 1041 if (ring->data_dmat != NULL) { 1042 bus_dma_tag_destroy(ring->data_dmat); 1043 ring->data_dmat = NULL; 1044 } 1045 } 1046 1047 /* 1048 * High-level hardware frobbing routines 1049 */ 1050 1051 static void 1052 iwm_enable_interrupts(struct iwm_softc *sc) 1053 { 1054 sc->sc_intmask = IWM_CSR_INI_SET_MASK; 1055 IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask); 1056 } 1057 1058 static void 1059 iwm_restore_interrupts(struct iwm_softc *sc) 1060 { 1061 IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask); 1062 } 1063 1064 static void 1065 iwm_disable_interrupts(struct iwm_softc *sc) 1066 { 1067 /* disable interrupts */ 1068 IWM_WRITE(sc, IWM_CSR_INT_MASK, 0); 1069 1070 /* acknowledge all interrupts */ 1071 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1072 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, ~0); 1073 } 1074 1075 static void 1076 iwm_ict_reset(struct iwm_softc *sc) 1077 { 1078 iwm_disable_interrupts(sc); 1079 1080 /* Reset ICT table. */ 1081 memset(sc->ict_dma.vaddr, 0, IWM_ICT_SIZE); 1082 sc->ict_cur = 0; 1083 1084 /* Set physical address of ICT table (4KB aligned). */ 1085 IWM_WRITE(sc, IWM_CSR_DRAM_INT_TBL_REG, 1086 IWM_CSR_DRAM_INT_TBL_ENABLE 1087 | IWM_CSR_DRAM_INIT_TBL_WRAP_CHECK 1088 | sc->ict_dma.paddr >> IWM_ICT_PADDR_SHIFT); 1089 1090 /* Switch to ICT interrupt mode in driver. */ 1091 sc->sc_flags |= IWM_FLAG_USE_ICT; 1092 1093 /* Re-enable interrupts. */ 1094 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1095 iwm_enable_interrupts(sc); 1096 } 1097 1098 /* iwlwifi pcie/trans.c */ 1099 1100 /* 1101 * Since this .. hard-resets things, it's time to actually 1102 * mark the first vap (if any) as having no mac context. 1103 * It's annoying, but since the driver is potentially being 1104 * stop/start'ed whilst active (thanks openbsd port!) we 1105 * have to correctly track this. 1106 */ 1107 static void 1108 iwm_stop_device(struct iwm_softc *sc) 1109 { 1110 struct ieee80211com *ic = &sc->sc_ic; 1111 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1112 int chnl, ntries; 1113 int qid; 1114 1115 /* tell the device to stop sending interrupts */ 1116 iwm_disable_interrupts(sc); 1117 1118 /* 1119 * FreeBSD-local: mark the first vap as not-uploaded, 1120 * so the next transition through auth/assoc 1121 * will correctly populate the MAC context. 1122 */ 1123 if (vap) { 1124 struct iwm_vap *iv = IWM_VAP(vap); 1125 iv->is_uploaded = 0; 1126 } 1127 1128 /* device going down, Stop using ICT table */ 1129 sc->sc_flags &= ~IWM_FLAG_USE_ICT; 1130 1131 /* stop tx and rx. tx and rx bits, as usual, are from if_iwn */ 1132 1133 iwm_write_prph(sc, IWM_SCD_TXFACT, 0); 1134 1135 /* Stop all DMA channels. */ 1136 if (iwm_nic_lock(sc)) { 1137 for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) { 1138 IWM_WRITE(sc, 1139 IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 0); 1140 for (ntries = 0; ntries < 200; ntries++) { 1141 uint32_t r; 1142 1143 r = IWM_READ(sc, IWM_FH_TSSR_TX_STATUS_REG); 1144 if (r & IWM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE( 1145 chnl)) 1146 break; 1147 DELAY(20); 1148 } 1149 } 1150 iwm_nic_unlock(sc); 1151 } 1152 1153 /* Stop RX ring. */ 1154 iwm_reset_rx_ring(sc, &sc->rxq); 1155 1156 /* Reset all TX rings. */ 1157 for (qid = 0; qid < nitems(sc->txq); qid++) 1158 iwm_reset_tx_ring(sc, &sc->txq[qid]); 1159 1160 /* 1161 * Power-down device's busmaster DMA clocks 1162 */ 1163 iwm_write_prph(sc, IWM_APMG_CLK_DIS_REG, IWM_APMG_CLK_VAL_DMA_CLK_RQT); 1164 DELAY(5); 1165 1166 /* Make sure (redundant) we've released our request to stay awake */ 1167 IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL, 1168 IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 1169 1170 /* Stop the device, and put it in low power state */ 1171 iwm_apm_stop(sc); 1172 1173 /* Upon stop, the APM issues an interrupt if HW RF kill is set. 1174 * Clean again the interrupt here 1175 */ 1176 iwm_disable_interrupts(sc); 1177 /* stop and reset the on-board processor */ 1178 IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_NEVO_RESET); 1179 1180 /* 1181 * Even if we stop the HW, we still want the RF kill 1182 * interrupt 1183 */ 1184 iwm_enable_rfkill_int(sc); 1185 iwm_check_rfkill(sc); 1186 } 1187 1188 /* iwlwifi: mvm/ops.c */ 1189 static void 1190 iwm_mvm_nic_config(struct iwm_softc *sc) 1191 { 1192 uint8_t radio_cfg_type, radio_cfg_step, radio_cfg_dash; 1193 uint32_t reg_val = 0; 1194 1195 radio_cfg_type = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_TYPE) >> 1196 IWM_FW_PHY_CFG_RADIO_TYPE_POS; 1197 radio_cfg_step = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_STEP) >> 1198 IWM_FW_PHY_CFG_RADIO_STEP_POS; 1199 radio_cfg_dash = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_DASH) >> 1200 IWM_FW_PHY_CFG_RADIO_DASH_POS; 1201 1202 /* SKU control */ 1203 reg_val |= IWM_CSR_HW_REV_STEP(sc->sc_hw_rev) << 1204 IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; 1205 reg_val |= IWM_CSR_HW_REV_DASH(sc->sc_hw_rev) << 1206 IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; 1207 1208 /* radio configuration */ 1209 reg_val |= radio_cfg_type << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; 1210 reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; 1211 reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; 1212 1213 IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, reg_val); 1214 1215 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1216 "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, 1217 radio_cfg_step, radio_cfg_dash); 1218 1219 /* 1220 * W/A : NIC is stuck in a reset state after Early PCIe power off 1221 * (PCIe power is lost before PERST# is asserted), causing ME FW 1222 * to lose ownership and not being able to obtain it back. 1223 */ 1224 iwm_set_bits_mask_prph(sc, IWM_APMG_PS_CTRL_REG, 1225 IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, 1226 ~IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); 1227 } 1228 1229 static int 1230 iwm_nic_rx_init(struct iwm_softc *sc) 1231 { 1232 if (!iwm_nic_lock(sc)) 1233 return EBUSY; 1234 1235 /* 1236 * Initialize RX ring. This is from the iwn driver. 1237 */ 1238 memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat)); 1239 1240 /* stop DMA */ 1241 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 1242 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_RBDCB_WPTR, 0); 1243 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_FLUSH_RB_REQ, 0); 1244 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RDPTR, 0); 1245 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); 1246 1247 /* Set physical address of RX ring (256-byte aligned). */ 1248 IWM_WRITE(sc, 1249 IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG, sc->rxq.desc_dma.paddr >> 8); 1250 1251 /* Set physical address of RX status (16-byte aligned). */ 1252 IWM_WRITE(sc, 1253 IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG, sc->rxq.stat_dma.paddr >> 4); 1254 1255 /* Enable RX. */ 1256 /* 1257 * Note: Linux driver also sets this: 1258 * (IWM_RX_RB_TIMEOUT << IWM_FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) | 1259 * 1260 * It causes weird behavior. YMMV. 1261 */ 1262 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 1263 IWM_FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | 1264 IWM_FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY | /* HW bug */ 1265 IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | 1266 IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K | 1267 IWM_RX_QUEUE_SIZE_LOG << IWM_FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS); 1268 1269 IWM_WRITE_1(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_TIMEOUT_DEF); 1270 1271 /* W/A for interrupt coalescing bug in 7260 and 3160 */ 1272 if (sc->host_interrupt_operation_mode) 1273 IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE); 1274 1275 /* 1276 * Thus sayeth el jefe (iwlwifi) via a comment: 1277 * 1278 * This value should initially be 0 (before preparing any 1279 * RBs), should be 8 after preparing the first 8 RBs (for example) 1280 */ 1281 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, 8); 1282 1283 iwm_nic_unlock(sc); 1284 1285 return 0; 1286 } 1287 1288 static int 1289 iwm_nic_tx_init(struct iwm_softc *sc) 1290 { 1291 int qid; 1292 1293 if (!iwm_nic_lock(sc)) 1294 return EBUSY; 1295 1296 /* Deactivate TX scheduler. */ 1297 iwm_write_prph(sc, IWM_SCD_TXFACT, 0); 1298 1299 /* Set physical address of "keep warm" page (16-byte aligned). */ 1300 IWM_WRITE(sc, IWM_FH_KW_MEM_ADDR_REG, sc->kw_dma.paddr >> 4); 1301 1302 /* Initialize TX rings. */ 1303 for (qid = 0; qid < nitems(sc->txq); qid++) { 1304 struct iwm_tx_ring *txq = &sc->txq[qid]; 1305 1306 /* Set physical address of TX ring (256-byte aligned). */ 1307 IWM_WRITE(sc, IWM_FH_MEM_CBBC_QUEUE(qid), 1308 txq->desc_dma.paddr >> 8); 1309 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 1310 "%s: loading ring %d descriptors (%p) at %lx\n", 1311 __func__, 1312 qid, txq->desc, 1313 (unsigned long) (txq->desc_dma.paddr >> 8)); 1314 } 1315 iwm_nic_unlock(sc); 1316 1317 return 0; 1318 } 1319 1320 static int 1321 iwm_nic_init(struct iwm_softc *sc) 1322 { 1323 int error; 1324 1325 iwm_apm_init(sc); 1326 iwm_set_pwr(sc); 1327 1328 iwm_mvm_nic_config(sc); 1329 1330 if ((error = iwm_nic_rx_init(sc)) != 0) 1331 return error; 1332 1333 /* 1334 * Ditto for TX, from iwn 1335 */ 1336 if ((error = iwm_nic_tx_init(sc)) != 0) 1337 return error; 1338 1339 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1340 "%s: shadow registers enabled\n", __func__); 1341 IWM_SETBITS(sc, IWM_CSR_MAC_SHADOW_REG_CTRL, 0x800fffff); 1342 1343 return 0; 1344 } 1345 1346 enum iwm_mvm_tx_fifo { 1347 IWM_MVM_TX_FIFO_BK = 0, 1348 IWM_MVM_TX_FIFO_BE, 1349 IWM_MVM_TX_FIFO_VI, 1350 IWM_MVM_TX_FIFO_VO, 1351 IWM_MVM_TX_FIFO_MCAST = 5, 1352 }; 1353 1354 const uint8_t iwm_mvm_ac_to_tx_fifo[] = { 1355 IWM_MVM_TX_FIFO_VO, 1356 IWM_MVM_TX_FIFO_VI, 1357 IWM_MVM_TX_FIFO_BE, 1358 IWM_MVM_TX_FIFO_BK, 1359 }; 1360 1361 static void 1362 iwm_enable_txq(struct iwm_softc *sc, int qid, int fifo) 1363 { 1364 if (!iwm_nic_lock(sc)) { 1365 device_printf(sc->sc_dev, 1366 "%s: cannot enable txq %d\n", 1367 __func__, 1368 qid); 1369 return; /* XXX return EBUSY */ 1370 } 1371 1372 /* unactivate before configuration */ 1373 iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid), 1374 (0 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) 1375 | (1 << IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); 1376 1377 if (qid != IWM_MVM_CMD_QUEUE) { 1378 iwm_set_bits_prph(sc, IWM_SCD_QUEUECHAIN_SEL, (1 << qid)); 1379 } 1380 1381 iwm_clear_bits_prph(sc, IWM_SCD_AGGR_SEL, (1 << qid)); 1382 1383 IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, qid << 8 | 0); 1384 iwm_write_prph(sc, IWM_SCD_QUEUE_RDPTR(qid), 0); 1385 1386 iwm_write_mem32(sc, sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0); 1387 /* Set scheduler window size and frame limit. */ 1388 iwm_write_mem32(sc, 1389 sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) + 1390 sizeof(uint32_t), 1391 ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) & 1392 IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) | 1393 ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & 1394 IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK)); 1395 1396 iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid), 1397 (1 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) | 1398 (fifo << IWM_SCD_QUEUE_STTS_REG_POS_TXF) | 1399 (1 << IWM_SCD_QUEUE_STTS_REG_POS_WSL) | 1400 IWM_SCD_QUEUE_STTS_REG_MSK); 1401 1402 iwm_nic_unlock(sc); 1403 1404 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 1405 "%s: enabled txq %d FIFO %d\n", 1406 __func__, qid, fifo); 1407 } 1408 1409 static int 1410 iwm_post_alive(struct iwm_softc *sc) 1411 { 1412 int nwords; 1413 int error, chnl; 1414 1415 if (!iwm_nic_lock(sc)) 1416 return EBUSY; 1417 1418 if (sc->sched_base != iwm_read_prph(sc, IWM_SCD_SRAM_BASE_ADDR)) { 1419 device_printf(sc->sc_dev, 1420 "%s: sched addr mismatch", 1421 __func__); 1422 error = EINVAL; 1423 goto out; 1424 } 1425 1426 iwm_ict_reset(sc); 1427 1428 /* Clear TX scheduler state in SRAM. */ 1429 nwords = (IWM_SCD_TRANS_TBL_MEM_UPPER_BOUND - 1430 IWM_SCD_CONTEXT_MEM_LOWER_BOUND) 1431 / sizeof(uint32_t); 1432 error = iwm_write_mem(sc, 1433 sc->sched_base + IWM_SCD_CONTEXT_MEM_LOWER_BOUND, 1434 NULL, nwords); 1435 if (error) 1436 goto out; 1437 1438 /* Set physical address of TX scheduler rings (1KB aligned). */ 1439 iwm_write_prph(sc, IWM_SCD_DRAM_BASE_ADDR, sc->sched_dma.paddr >> 10); 1440 1441 iwm_write_prph(sc, IWM_SCD_CHAINEXT_EN, 0); 1442 1443 /* enable command channel */ 1444 iwm_enable_txq(sc, IWM_MVM_CMD_QUEUE, 7); 1445 1446 iwm_write_prph(sc, IWM_SCD_TXFACT, 0xff); 1447 1448 /* Enable DMA channels. */ 1449 for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) { 1450 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 1451 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 1452 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE); 1453 } 1454 1455 IWM_SETBITS(sc, IWM_FH_TX_CHICKEN_BITS_REG, 1456 IWM_FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); 1457 1458 /* Enable L1-Active */ 1459 iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG, 1460 IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 1461 1462 out: 1463 iwm_nic_unlock(sc); 1464 return error; 1465 } 1466 1467 /* 1468 * NVM read access and content parsing. We do not support 1469 * external NVM or writing NVM. 1470 * iwlwifi/mvm/nvm.c 1471 */ 1472 1473 /* list of NVM sections we are allowed/need to read */ 1474 const int nvm_to_read[] = { 1475 IWM_NVM_SECTION_TYPE_HW, 1476 IWM_NVM_SECTION_TYPE_SW, 1477 IWM_NVM_SECTION_TYPE_CALIBRATION, 1478 IWM_NVM_SECTION_TYPE_PRODUCTION, 1479 }; 1480 1481 /* Default NVM size to read */ 1482 #define IWM_NVM_DEFAULT_CHUNK_SIZE (2*1024) 1483 #define IWM_MAX_NVM_SECTION_SIZE 7000 1484 1485 #define IWM_NVM_WRITE_OPCODE 1 1486 #define IWM_NVM_READ_OPCODE 0 1487 1488 static int 1489 iwm_nvm_read_chunk(struct iwm_softc *sc, uint16_t section, 1490 uint16_t offset, uint16_t length, uint8_t *data, uint16_t *len) 1491 { 1492 offset = 0; 1493 struct iwm_nvm_access_cmd nvm_access_cmd = { 1494 .offset = htole16(offset), 1495 .length = htole16(length), 1496 .type = htole16(section), 1497 .op_code = IWM_NVM_READ_OPCODE, 1498 }; 1499 struct iwm_nvm_access_resp *nvm_resp; 1500 struct iwm_rx_packet *pkt; 1501 struct iwm_host_cmd cmd = { 1502 .id = IWM_NVM_ACCESS_CMD, 1503 .flags = IWM_CMD_SYNC | IWM_CMD_WANT_SKB | 1504 IWM_CMD_SEND_IN_RFKILL, 1505 .data = { &nvm_access_cmd, }, 1506 }; 1507 int ret, bytes_read, offset_read; 1508 uint8_t *resp_data; 1509 1510 cmd.len[0] = sizeof(struct iwm_nvm_access_cmd); 1511 1512 ret = iwm_send_cmd(sc, &cmd); 1513 if (ret) 1514 return ret; 1515 1516 pkt = cmd.resp_pkt; 1517 if (pkt->hdr.flags & IWM_CMD_FAILED_MSK) { 1518 device_printf(sc->sc_dev, 1519 "%s: Bad return from IWM_NVM_ACCES_COMMAND (0x%08X)\n", 1520 __func__, pkt->hdr.flags); 1521 ret = EIO; 1522 goto exit; 1523 } 1524 1525 /* Extract NVM response */ 1526 nvm_resp = (void *)pkt->data; 1527 1528 ret = le16toh(nvm_resp->status); 1529 bytes_read = le16toh(nvm_resp->length); 1530 offset_read = le16toh(nvm_resp->offset); 1531 resp_data = nvm_resp->data; 1532 if (ret) { 1533 device_printf(sc->sc_dev, 1534 "%s: NVM access command failed with status %d\n", 1535 __func__, ret); 1536 ret = EINVAL; 1537 goto exit; 1538 } 1539 1540 if (offset_read != offset) { 1541 device_printf(sc->sc_dev, 1542 "%s: NVM ACCESS response with invalid offset %d\n", 1543 __func__, offset_read); 1544 ret = EINVAL; 1545 goto exit; 1546 } 1547 1548 memcpy(data + offset, resp_data, bytes_read); 1549 *len = bytes_read; 1550 1551 exit: 1552 iwm_free_resp(sc, &cmd); 1553 return ret; 1554 } 1555 1556 /* 1557 * Reads an NVM section completely. 1558 * NICs prior to 7000 family doesn't have a real NVM, but just read 1559 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited 1560 * by uCode, we need to manually check in this case that we don't 1561 * overflow and try to read more than the EEPROM size. 1562 * For 7000 family NICs, we supply the maximal size we can read, and 1563 * the uCode fills the response with as much data as we can, 1564 * without overflowing, so no check is needed. 1565 */ 1566 static int 1567 iwm_nvm_read_section(struct iwm_softc *sc, 1568 uint16_t section, uint8_t *data, uint16_t *len) 1569 { 1570 uint16_t length, seglen; 1571 int error; 1572 1573 /* Set nvm section read length */ 1574 length = seglen = IWM_NVM_DEFAULT_CHUNK_SIZE; 1575 *len = 0; 1576 1577 /* Read the NVM until exhausted (reading less than requested) */ 1578 while (seglen == length) { 1579 error = iwm_nvm_read_chunk(sc, 1580 section, *len, length, data, &seglen); 1581 if (error) { 1582 device_printf(sc->sc_dev, 1583 "Cannot read NVM from section " 1584 "%d offset %d, length %d\n", 1585 section, *len, length); 1586 return error; 1587 } 1588 *len += seglen; 1589 } 1590 1591 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1592 "NVM section %d read completed\n", section); 1593 return 0; 1594 } 1595 1596 /* 1597 * BEGIN IWM_NVM_PARSE 1598 */ 1599 1600 /* iwlwifi/iwl-nvm-parse.c */ 1601 1602 /* NVM offsets (in words) definitions */ 1603 enum wkp_nvm_offsets { 1604 /* NVM HW-Section offset (in words) definitions */ 1605 IWM_HW_ADDR = 0x15, 1606 1607 /* NVM SW-Section offset (in words) definitions */ 1608 IWM_NVM_SW_SECTION = 0x1C0, 1609 IWM_NVM_VERSION = 0, 1610 IWM_RADIO_CFG = 1, 1611 IWM_SKU = 2, 1612 IWM_N_HW_ADDRS = 3, 1613 IWM_NVM_CHANNELS = 0x1E0 - IWM_NVM_SW_SECTION, 1614 1615 /* NVM calibration section offset (in words) definitions */ 1616 IWM_NVM_CALIB_SECTION = 0x2B8, 1617 IWM_XTAL_CALIB = 0x316 - IWM_NVM_CALIB_SECTION 1618 }; 1619 1620 /* SKU Capabilities (actual values from NVM definition) */ 1621 enum nvm_sku_bits { 1622 IWM_NVM_SKU_CAP_BAND_24GHZ = (1 << 0), 1623 IWM_NVM_SKU_CAP_BAND_52GHZ = (1 << 1), 1624 IWM_NVM_SKU_CAP_11N_ENABLE = (1 << 2), 1625 IWM_NVM_SKU_CAP_11AC_ENABLE = (1 << 3), 1626 }; 1627 1628 /* radio config bits (actual values from NVM definition) */ 1629 #define IWM_NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */ 1630 #define IWM_NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ 1631 #define IWM_NVM_RF_CFG_TYPE_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ 1632 #define IWM_NVM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ 1633 #define IWM_NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ 1634 #define IWM_NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ 1635 1636 #define DEFAULT_MAX_TX_POWER 16 1637 1638 /** 1639 * enum iwm_nvm_channel_flags - channel flags in NVM 1640 * @IWM_NVM_CHANNEL_VALID: channel is usable for this SKU/geo 1641 * @IWM_NVM_CHANNEL_IBSS: usable as an IBSS channel 1642 * @IWM_NVM_CHANNEL_ACTIVE: active scanning allowed 1643 * @IWM_NVM_CHANNEL_RADAR: radar detection required 1644 * XXX cannot find this (DFS) flag in iwl-nvm-parse.c 1645 * @IWM_NVM_CHANNEL_DFS: dynamic freq selection candidate 1646 * @IWM_NVM_CHANNEL_WIDE: 20 MHz channel okay (?) 1647 * @IWM_NVM_CHANNEL_40MHZ: 40 MHz channel okay (?) 1648 * @IWM_NVM_CHANNEL_80MHZ: 80 MHz channel okay (?) 1649 * @IWM_NVM_CHANNEL_160MHZ: 160 MHz channel okay (?) 1650 */ 1651 enum iwm_nvm_channel_flags { 1652 IWM_NVM_CHANNEL_VALID = (1 << 0), 1653 IWM_NVM_CHANNEL_IBSS = (1 << 1), 1654 IWM_NVM_CHANNEL_ACTIVE = (1 << 3), 1655 IWM_NVM_CHANNEL_RADAR = (1 << 4), 1656 IWM_NVM_CHANNEL_DFS = (1 << 7), 1657 IWM_NVM_CHANNEL_WIDE = (1 << 8), 1658 IWM_NVM_CHANNEL_40MHZ = (1 << 9), 1659 IWM_NVM_CHANNEL_80MHZ = (1 << 10), 1660 IWM_NVM_CHANNEL_160MHZ = (1 << 11), 1661 }; 1662 1663 /* 1664 * Translate EEPROM flags to net80211. 1665 */ 1666 static uint32_t 1667 iwm_eeprom_channel_flags(uint16_t ch_flags) 1668 { 1669 uint32_t nflags; 1670 1671 nflags = 0; 1672 if ((ch_flags & IWM_NVM_CHANNEL_ACTIVE) == 0) 1673 nflags |= IEEE80211_CHAN_PASSIVE; 1674 if ((ch_flags & IWM_NVM_CHANNEL_IBSS) == 0) 1675 nflags |= IEEE80211_CHAN_NOADHOC; 1676 if (ch_flags & IWM_NVM_CHANNEL_RADAR) { 1677 nflags |= IEEE80211_CHAN_DFS; 1678 /* Just in case. */ 1679 nflags |= IEEE80211_CHAN_NOADHOC; 1680 } 1681 1682 return (nflags); 1683 } 1684 1685 static void 1686 iwm_add_channel_band(struct iwm_softc *sc, struct ieee80211_channel chans[], 1687 int maxchans, int *nchans, int ch_idx, int ch_num, const uint8_t bands[]) 1688 { 1689 const uint16_t * const nvm_ch_flags = sc->sc_nvm.nvm_ch_flags; 1690 uint32_t nflags; 1691 uint16_t ch_flags; 1692 uint8_t ieee; 1693 int error; 1694 1695 for (; ch_idx < ch_num; ch_idx++) { 1696 ch_flags = le16_to_cpup(nvm_ch_flags + ch_idx); 1697 ieee = iwm_nvm_channels[ch_idx]; 1698 1699 if (!(ch_flags & IWM_NVM_CHANNEL_VALID)) { 1700 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1701 "Ch. %d Flags %x [%sGHz] - No traffic\n", 1702 ieee, ch_flags, 1703 (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ? 1704 "5.2" : "2.4"); 1705 continue; 1706 } 1707 1708 nflags = iwm_eeprom_channel_flags(ch_flags); 1709 error = ieee80211_add_channel(chans, maxchans, nchans, 1710 ieee, 0, 0, nflags, bands); 1711 if (error != 0) 1712 break; 1713 1714 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1715 "Ch. %d Flags %x [%sGHz] - Added\n", 1716 ieee, ch_flags, 1717 (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ? 1718 "5.2" : "2.4"); 1719 } 1720 } 1721 1722 static void 1723 iwm_init_channel_map(struct ieee80211com *ic, int maxchans, int *nchans, 1724 struct ieee80211_channel chans[]) 1725 { 1726 struct iwm_softc *sc = ic->ic_softc; 1727 struct iwm_nvm_data *data = &sc->sc_nvm; 1728 uint8_t bands[IEEE80211_MODE_BYTES]; 1729 1730 memset(bands, 0, sizeof(bands)); 1731 /* 1-13: 11b/g channels. */ 1732 setbit(bands, IEEE80211_MODE_11B); 1733 setbit(bands, IEEE80211_MODE_11G); 1734 iwm_add_channel_band(sc, chans, maxchans, nchans, 0, 1735 IWM_NUM_2GHZ_CHANNELS - 1, bands); 1736 1737 /* 14: 11b channel only. */ 1738 clrbit(bands, IEEE80211_MODE_11G); 1739 iwm_add_channel_band(sc, chans, maxchans, nchans, 1740 IWM_NUM_2GHZ_CHANNELS - 1, IWM_NUM_2GHZ_CHANNELS, bands); 1741 1742 if (data->sku_cap_band_52GHz_enable) { 1743 memset(bands, 0, sizeof(bands)); 1744 setbit(bands, IEEE80211_MODE_11A); 1745 iwm_add_channel_band(sc, chans, maxchans, nchans, 1746 IWM_NUM_2GHZ_CHANNELS, nitems(iwm_nvm_channels), bands); 1747 } 1748 } 1749 1750 static int 1751 iwm_parse_nvm_data(struct iwm_softc *sc, 1752 const uint16_t *nvm_hw, const uint16_t *nvm_sw, 1753 const uint16_t *nvm_calib, uint8_t tx_chains, uint8_t rx_chains) 1754 { 1755 struct iwm_nvm_data *data = &sc->sc_nvm; 1756 uint8_t hw_addr[IEEE80211_ADDR_LEN]; 1757 uint16_t radio_cfg, sku; 1758 1759 data->nvm_version = le16_to_cpup(nvm_sw + IWM_NVM_VERSION); 1760 1761 radio_cfg = le16_to_cpup(nvm_sw + IWM_RADIO_CFG); 1762 data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg); 1763 data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg); 1764 data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg); 1765 data->radio_cfg_pnum = IWM_NVM_RF_CFG_PNUM_MSK(radio_cfg); 1766 data->valid_tx_ant = IWM_NVM_RF_CFG_TX_ANT_MSK(radio_cfg); 1767 data->valid_rx_ant = IWM_NVM_RF_CFG_RX_ANT_MSK(radio_cfg); 1768 1769 sku = le16_to_cpup(nvm_sw + IWM_SKU); 1770 data->sku_cap_band_24GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_24GHZ; 1771 data->sku_cap_band_52GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_52GHZ; 1772 data->sku_cap_11n_enable = 0; 1773 1774 if (!data->valid_tx_ant || !data->valid_rx_ant) { 1775 device_printf(sc->sc_dev, 1776 "%s: invalid antennas (0x%x, 0x%x)\n", 1777 __func__, data->valid_tx_ant, 1778 data->valid_rx_ant); 1779 return EINVAL; 1780 } 1781 1782 data->n_hw_addrs = le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS); 1783 1784 data->xtal_calib[0] = *(nvm_calib + IWM_XTAL_CALIB); 1785 data->xtal_calib[1] = *(nvm_calib + IWM_XTAL_CALIB + 1); 1786 1787 /* The byte order is little endian 16 bit, meaning 214365 */ 1788 IEEE80211_ADDR_COPY(hw_addr, nvm_hw + IWM_HW_ADDR); 1789 data->hw_addr[0] = hw_addr[1]; 1790 data->hw_addr[1] = hw_addr[0]; 1791 data->hw_addr[2] = hw_addr[3]; 1792 data->hw_addr[3] = hw_addr[2]; 1793 data->hw_addr[4] = hw_addr[5]; 1794 data->hw_addr[5] = hw_addr[4]; 1795 1796 memcpy(data->nvm_ch_flags, &nvm_sw[IWM_NVM_CHANNELS], 1797 sizeof(data->nvm_ch_flags)); 1798 data->calib_version = 255; /* TODO: 1799 this value will prevent some checks from 1800 failing, we need to check if this 1801 field is still needed, and if it does, 1802 where is it in the NVM */ 1803 1804 return 0; 1805 } 1806 1807 /* 1808 * END NVM PARSE 1809 */ 1810 1811 struct iwm_nvm_section { 1812 uint16_t length; 1813 const uint8_t *data; 1814 }; 1815 1816 static int 1817 iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections) 1818 { 1819 const uint16_t *hw, *sw, *calib; 1820 1821 /* Checking for required sections */ 1822 if (!sections[IWM_NVM_SECTION_TYPE_SW].data || 1823 !sections[IWM_NVM_SECTION_TYPE_HW].data) { 1824 device_printf(sc->sc_dev, 1825 "%s: Can't parse empty NVM sections\n", 1826 __func__); 1827 return ENOENT; 1828 } 1829 1830 hw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_HW].data; 1831 sw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_SW].data; 1832 calib = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_CALIBRATION].data; 1833 return iwm_parse_nvm_data(sc, hw, sw, calib, 1834 IWM_FW_VALID_TX_ANT(sc), IWM_FW_VALID_RX_ANT(sc)); 1835 } 1836 1837 static int 1838 iwm_nvm_init(struct iwm_softc *sc) 1839 { 1840 struct iwm_nvm_section nvm_sections[IWM_NVM_NUM_OF_SECTIONS]; 1841 int i, section, error; 1842 uint16_t len; 1843 uint8_t *nvm_buffer, *temp; 1844 1845 /* Read From FW NVM */ 1846 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1847 "%s: Read NVM\n", 1848 __func__); 1849 1850 /* TODO: find correct NVM max size for a section */ 1851 nvm_buffer = malloc(IWM_OTP_LOW_IMAGE_SIZE, M_DEVBUF, M_NOWAIT); 1852 if (nvm_buffer == NULL) 1853 return (ENOMEM); 1854 for (i = 0; i < nitems(nvm_to_read); i++) { 1855 section = nvm_to_read[i]; 1856 KASSERT(section <= nitems(nvm_sections), 1857 ("too many sections")); 1858 1859 error = iwm_nvm_read_section(sc, section, nvm_buffer, &len); 1860 if (error) 1861 break; 1862 1863 temp = malloc(len, M_DEVBUF, M_NOWAIT); 1864 if (temp == NULL) { 1865 error = ENOMEM; 1866 break; 1867 } 1868 memcpy(temp, nvm_buffer, len); 1869 nvm_sections[section].data = temp; 1870 nvm_sections[section].length = len; 1871 } 1872 free(nvm_buffer, M_DEVBUF); 1873 if (error) 1874 return error; 1875 1876 return iwm_parse_nvm_sections(sc, nvm_sections); 1877 } 1878 1879 /* 1880 * Firmware loading gunk. This is kind of a weird hybrid between the 1881 * iwn driver and the Linux iwlwifi driver. 1882 */ 1883 1884 static int 1885 iwm_firmware_load_chunk(struct iwm_softc *sc, uint32_t dst_addr, 1886 const uint8_t *section, uint32_t byte_cnt) 1887 { 1888 struct iwm_dma_info *dma = &sc->fw_dma; 1889 int error; 1890 1891 /* Copy firmware section into pre-allocated DMA-safe memory. */ 1892 memcpy(dma->vaddr, section, byte_cnt); 1893 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 1894 1895 if (!iwm_nic_lock(sc)) 1896 return EBUSY; 1897 1898 sc->sc_fw_chunk_done = 0; 1899 1900 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL), 1901 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE); 1902 IWM_WRITE(sc, IWM_FH_SRVC_CHNL_SRAM_ADDR_REG(IWM_FH_SRVC_CHNL), 1903 dst_addr); 1904 IWM_WRITE(sc, IWM_FH_TFDIB_CTRL0_REG(IWM_FH_SRVC_CHNL), 1905 dma->paddr & IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK); 1906 IWM_WRITE(sc, IWM_FH_TFDIB_CTRL1_REG(IWM_FH_SRVC_CHNL), 1907 (iwm_get_dma_hi_addr(dma->paddr) 1908 << IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt); 1909 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_BUF_STS_REG(IWM_FH_SRVC_CHNL), 1910 1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM | 1911 1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX | 1912 IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID); 1913 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL), 1914 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 1915 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE | 1916 IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD); 1917 1918 iwm_nic_unlock(sc); 1919 1920 /* wait 1s for this segment to load */ 1921 while (!sc->sc_fw_chunk_done) 1922 if ((error = msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfw", hz)) != 0) 1923 break; 1924 1925 return error; 1926 } 1927 1928 static int 1929 iwm_load_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 1930 { 1931 struct iwm_fw_sects *fws; 1932 int error, i, w; 1933 const void *data; 1934 uint32_t dlen; 1935 uint32_t offset; 1936 1937 sc->sc_uc.uc_intr = 0; 1938 1939 fws = &sc->sc_fw.fw_sects[ucode_type]; 1940 for (i = 0; i < fws->fw_count; i++) { 1941 data = fws->fw_sect[i].fws_data; 1942 dlen = fws->fw_sect[i].fws_len; 1943 offset = fws->fw_sect[i].fws_devoff; 1944 IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV, 1945 "LOAD FIRMWARE type %d offset %u len %d\n", 1946 ucode_type, offset, dlen); 1947 error = iwm_firmware_load_chunk(sc, offset, data, dlen); 1948 if (error) { 1949 device_printf(sc->sc_dev, 1950 "%s: chunk %u of %u returned error %02d\n", 1951 __func__, i, fws->fw_count, error); 1952 return error; 1953 } 1954 } 1955 1956 /* wait for the firmware to load */ 1957 IWM_WRITE(sc, IWM_CSR_RESET, 0); 1958 1959 for (w = 0; !sc->sc_uc.uc_intr && w < 10; w++) { 1960 error = msleep(&sc->sc_uc, &sc->sc_mtx, 0, "iwmuc", hz/10); 1961 } 1962 1963 return error; 1964 } 1965 1966 /* iwlwifi: pcie/trans.c */ 1967 static int 1968 iwm_start_fw(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 1969 { 1970 int error; 1971 1972 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1973 1974 if ((error = iwm_nic_init(sc)) != 0) { 1975 device_printf(sc->sc_dev, "unable to init nic\n"); 1976 return error; 1977 } 1978 1979 /* make sure rfkill handshake bits are cleared */ 1980 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 1981 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, 1982 IWM_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 1983 1984 /* clear (again), then enable host interrupts */ 1985 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1986 iwm_enable_interrupts(sc); 1987 1988 /* really make sure rfkill handshake bits are cleared */ 1989 /* maybe we should write a few times more? just to make sure */ 1990 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 1991 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 1992 1993 /* Load the given image to the HW */ 1994 return iwm_load_firmware(sc, ucode_type); 1995 } 1996 1997 static int 1998 iwm_fw_alive(struct iwm_softc *sc, uint32_t sched_base) 1999 { 2000 return iwm_post_alive(sc); 2001 } 2002 2003 static int 2004 iwm_send_tx_ant_cfg(struct iwm_softc *sc, uint8_t valid_tx_ant) 2005 { 2006 struct iwm_tx_ant_cfg_cmd tx_ant_cmd = { 2007 .valid = htole32(valid_tx_ant), 2008 }; 2009 2010 return iwm_mvm_send_cmd_pdu(sc, IWM_TX_ANT_CONFIGURATION_CMD, 2011 IWM_CMD_SYNC, sizeof(tx_ant_cmd), &tx_ant_cmd); 2012 } 2013 2014 /* iwlwifi: mvm/fw.c */ 2015 static int 2016 iwm_send_phy_cfg_cmd(struct iwm_softc *sc) 2017 { 2018 struct iwm_phy_cfg_cmd phy_cfg_cmd; 2019 enum iwm_ucode_type ucode_type = sc->sc_uc_current; 2020 2021 /* Set parameters */ 2022 phy_cfg_cmd.phy_cfg = htole32(sc->sc_fw_phy_config); 2023 phy_cfg_cmd.calib_control.event_trigger = 2024 sc->sc_default_calib[ucode_type].event_trigger; 2025 phy_cfg_cmd.calib_control.flow_trigger = 2026 sc->sc_default_calib[ucode_type].flow_trigger; 2027 2028 IWM_DPRINTF(sc, IWM_DEBUG_CMD | IWM_DEBUG_RESET, 2029 "Sending Phy CFG command: 0x%x\n", phy_cfg_cmd.phy_cfg); 2030 return iwm_mvm_send_cmd_pdu(sc, IWM_PHY_CONFIGURATION_CMD, IWM_CMD_SYNC, 2031 sizeof(phy_cfg_cmd), &phy_cfg_cmd); 2032 } 2033 2034 static int 2035 iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc, 2036 enum iwm_ucode_type ucode_type) 2037 { 2038 enum iwm_ucode_type old_type = sc->sc_uc_current; 2039 int error; 2040 2041 if ((error = iwm_read_firmware(sc, ucode_type)) != 0) 2042 return error; 2043 2044 sc->sc_uc_current = ucode_type; 2045 error = iwm_start_fw(sc, ucode_type); 2046 if (error) { 2047 sc->sc_uc_current = old_type; 2048 return error; 2049 } 2050 2051 return iwm_fw_alive(sc, sc->sched_base); 2052 } 2053 2054 /* 2055 * mvm misc bits 2056 */ 2057 2058 /* 2059 * follows iwlwifi/fw.c 2060 */ 2061 static int 2062 iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm) 2063 { 2064 int error; 2065 2066 /* do not operate with rfkill switch turned on */ 2067 if ((sc->sc_flags & IWM_FLAG_RFKILL) && !justnvm) { 2068 device_printf(sc->sc_dev, 2069 "radio is disabled by hardware switch\n"); 2070 return EPERM; 2071 } 2072 2073 sc->sc_init_complete = 0; 2074 if ((error = iwm_mvm_load_ucode_wait_alive(sc, 2075 IWM_UCODE_TYPE_INIT)) != 0) 2076 return error; 2077 2078 if (justnvm) { 2079 if ((error = iwm_nvm_init(sc)) != 0) { 2080 device_printf(sc->sc_dev, "failed to read nvm\n"); 2081 return error; 2082 } 2083 IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, sc->sc_nvm.hw_addr); 2084 2085 sc->sc_scan_cmd_len = sizeof(struct iwm_scan_cmd) 2086 + sc->sc_capa_max_probe_len 2087 + IWM_MAX_NUM_SCAN_CHANNELS 2088 * sizeof(struct iwm_scan_channel); 2089 sc->sc_scan_cmd = malloc(sc->sc_scan_cmd_len, M_DEVBUF, 2090 M_NOWAIT); 2091 if (sc->sc_scan_cmd == NULL) 2092 return (ENOMEM); 2093 2094 return 0; 2095 } 2096 2097 /* Send TX valid antennas before triggering calibrations */ 2098 if ((error = iwm_send_tx_ant_cfg(sc, IWM_FW_VALID_TX_ANT(sc))) != 0) 2099 return error; 2100 2101 /* 2102 * Send phy configurations command to init uCode 2103 * to start the 16.0 uCode init image internal calibrations. 2104 */ 2105 if ((error = iwm_send_phy_cfg_cmd(sc)) != 0 ) { 2106 device_printf(sc->sc_dev, 2107 "%s: failed to run internal calibration: %d\n", 2108 __func__, error); 2109 return error; 2110 } 2111 2112 /* 2113 * Nothing to do but wait for the init complete notification 2114 * from the firmware 2115 */ 2116 while (!sc->sc_init_complete) 2117 if ((error = msleep(&sc->sc_init_complete, &sc->sc_mtx, 2118 0, "iwminit", 2*hz)) != 0) 2119 break; 2120 2121 return error; 2122 } 2123 2124 /* 2125 * receive side 2126 */ 2127 2128 /* (re)stock rx ring, called at init-time and at runtime */ 2129 static int 2130 iwm_rx_addbuf(struct iwm_softc *sc, int size, int idx) 2131 { 2132 struct iwm_rx_ring *ring = &sc->rxq; 2133 struct iwm_rx_data *data = &ring->data[idx]; 2134 struct mbuf *m; 2135 int error; 2136 bus_addr_t paddr; 2137 2138 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWM_RBUF_SIZE); 2139 if (m == NULL) 2140 return ENOBUFS; 2141 2142 if (data->m != NULL) 2143 bus_dmamap_unload(ring->data_dmat, data->map); 2144 2145 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 2146 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 2147 if (error != 0) { 2148 device_printf(sc->sc_dev, 2149 "%s: could not create RX buf DMA map, error %d\n", 2150 __func__, error); 2151 goto fail; 2152 } 2153 data->m = m; 2154 error = bus_dmamap_load(ring->data_dmat, data->map, 2155 mtod(data->m, void *), IWM_RBUF_SIZE, iwm_dma_map_addr, 2156 &paddr, BUS_DMA_NOWAIT); 2157 if (error != 0 && error != EFBIG) { 2158 device_printf(sc->sc_dev, 2159 "%s: can't not map mbuf, error %d\n", __func__, 2160 error); 2161 goto fail; 2162 } 2163 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREREAD); 2164 2165 /* Update RX descriptor. */ 2166 ring->desc[idx] = htole32(paddr >> 8); 2167 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 2168 BUS_DMASYNC_PREWRITE); 2169 2170 return 0; 2171 fail: 2172 return error; 2173 } 2174 2175 /* iwlwifi: mvm/rx.c */ 2176 #define IWM_RSSI_OFFSET 50 2177 static int 2178 iwm_mvm_calc_rssi(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info) 2179 { 2180 int rssi_a, rssi_b, rssi_a_dbm, rssi_b_dbm, max_rssi_dbm; 2181 uint32_t agc_a, agc_b; 2182 uint32_t val; 2183 2184 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_AGC_IDX]); 2185 agc_a = (val & IWM_OFDM_AGC_A_MSK) >> IWM_OFDM_AGC_A_POS; 2186 agc_b = (val & IWM_OFDM_AGC_B_MSK) >> IWM_OFDM_AGC_B_POS; 2187 2188 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_RSSI_AB_IDX]); 2189 rssi_a = (val & IWM_OFDM_RSSI_INBAND_A_MSK) >> IWM_OFDM_RSSI_A_POS; 2190 rssi_b = (val & IWM_OFDM_RSSI_INBAND_B_MSK) >> IWM_OFDM_RSSI_B_POS; 2191 2192 /* 2193 * dBm = rssi dB - agc dB - constant. 2194 * Higher AGC (higher radio gain) means lower signal. 2195 */ 2196 rssi_a_dbm = rssi_a - IWM_RSSI_OFFSET - agc_a; 2197 rssi_b_dbm = rssi_b - IWM_RSSI_OFFSET - agc_b; 2198 max_rssi_dbm = MAX(rssi_a_dbm, rssi_b_dbm); 2199 2200 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2201 "Rssi In A %d B %d Max %d AGCA %d AGCB %d\n", 2202 rssi_a_dbm, rssi_b_dbm, max_rssi_dbm, agc_a, agc_b); 2203 2204 return max_rssi_dbm; 2205 } 2206 2207 /* iwlwifi: mvm/rx.c */ 2208 /* 2209 * iwm_mvm_get_signal_strength - use new rx PHY INFO API 2210 * values are reported by the fw as positive values - need to negate 2211 * to obtain their dBM. Account for missing antennas by replacing 0 2212 * values by -256dBm: practically 0 power and a non-feasible 8 bit value. 2213 */ 2214 static int 2215 iwm_mvm_get_signal_strength(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info) 2216 { 2217 int energy_a, energy_b, energy_c, max_energy; 2218 uint32_t val; 2219 2220 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]); 2221 energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >> 2222 IWM_RX_INFO_ENERGY_ANT_A_POS; 2223 energy_a = energy_a ? -energy_a : -256; 2224 energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >> 2225 IWM_RX_INFO_ENERGY_ANT_B_POS; 2226 energy_b = energy_b ? -energy_b : -256; 2227 energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >> 2228 IWM_RX_INFO_ENERGY_ANT_C_POS; 2229 energy_c = energy_c ? -energy_c : -256; 2230 max_energy = MAX(energy_a, energy_b); 2231 max_energy = MAX(max_energy, energy_c); 2232 2233 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2234 "energy In A %d B %d C %d , and max %d\n", 2235 energy_a, energy_b, energy_c, max_energy); 2236 2237 return max_energy; 2238 } 2239 2240 static void 2241 iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *sc, 2242 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2243 { 2244 struct iwm_rx_phy_info *phy_info = (void *)pkt->data; 2245 2246 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "received PHY stats\n"); 2247 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2248 2249 memcpy(&sc->sc_last_phy_info, phy_info, sizeof(sc->sc_last_phy_info)); 2250 } 2251 2252 /* 2253 * Retrieve the average noise (in dBm) among receivers. 2254 */ 2255 static int 2256 iwm_get_noise(const struct iwm_mvm_statistics_rx_non_phy *stats) 2257 { 2258 int i, total, nbant, noise; 2259 2260 total = nbant = noise = 0; 2261 for (i = 0; i < 3; i++) { 2262 noise = le32toh(stats->beacon_silence_rssi[i]) & 0xff; 2263 if (noise) { 2264 total += noise; 2265 nbant++; 2266 } 2267 } 2268 2269 /* There should be at least one antenna but check anyway. */ 2270 return (nbant == 0) ? -127 : (total / nbant) - 107; 2271 } 2272 2273 /* 2274 * iwm_mvm_rx_rx_mpdu - IWM_REPLY_RX_MPDU_CMD handler 2275 * 2276 * Handles the actual data of the Rx packet from the fw 2277 */ 2278 static void 2279 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, 2280 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2281 { 2282 struct ieee80211com *ic = &sc->sc_ic; 2283 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2284 struct ieee80211_frame *wh; 2285 struct ieee80211_node *ni; 2286 struct ieee80211_rx_stats rxs; 2287 struct mbuf *m; 2288 struct iwm_rx_phy_info *phy_info; 2289 struct iwm_rx_mpdu_res_start *rx_res; 2290 uint32_t len; 2291 uint32_t rx_pkt_status; 2292 int rssi; 2293 2294 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2295 2296 phy_info = &sc->sc_last_phy_info; 2297 rx_res = (struct iwm_rx_mpdu_res_start *)pkt->data; 2298 wh = (struct ieee80211_frame *)(pkt->data + sizeof(*rx_res)); 2299 len = le16toh(rx_res->byte_count); 2300 rx_pkt_status = le32toh(*(uint32_t *)(pkt->data + sizeof(*rx_res) + len)); 2301 2302 m = data->m; 2303 m->m_data = pkt->data + sizeof(*rx_res); 2304 m->m_pkthdr.len = m->m_len = len; 2305 2306 if (__predict_false(phy_info->cfg_phy_cnt > 20)) { 2307 device_printf(sc->sc_dev, 2308 "dsp size out of range [0,20]: %d\n", 2309 phy_info->cfg_phy_cnt); 2310 return; 2311 } 2312 2313 if (!(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_CRC_OK) || 2314 !(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_OVERRUN_OK)) { 2315 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2316 "Bad CRC or FIFO: 0x%08X.\n", rx_pkt_status); 2317 return; /* drop */ 2318 } 2319 2320 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_RX_ENERGY_API) { 2321 rssi = iwm_mvm_get_signal_strength(sc, phy_info); 2322 } else { 2323 rssi = iwm_mvm_calc_rssi(sc, phy_info); 2324 } 2325 rssi = (0 - IWM_MIN_DBM) + rssi; /* normalize */ 2326 rssi = MIN(rssi, sc->sc_max_rssi); /* clip to max. 100% */ 2327 2328 /* replenish ring for the buffer we're going to feed to the sharks */ 2329 if (iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0) { 2330 device_printf(sc->sc_dev, "%s: unable to add more buffers\n", 2331 __func__); 2332 return; 2333 } 2334 2335 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2336 2337 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2338 "%s: phy_info: channel=%d, flags=0x%08x\n", 2339 __func__, 2340 le16toh(phy_info->channel), 2341 le16toh(phy_info->phy_flags)); 2342 2343 /* 2344 * Populate an RX state struct with the provided information. 2345 */ 2346 bzero(&rxs, sizeof(rxs)); 2347 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 2348 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 2349 rxs.c_ieee = le16toh(phy_info->channel); 2350 if (le16toh(phy_info->phy_flags & IWM_RX_RES_PHY_FLAGS_BAND_24)) { 2351 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 2352 } else { 2353 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_5GHZ); 2354 } 2355 rxs.rssi = rssi - sc->sc_noise; 2356 rxs.nf = sc->sc_noise; 2357 2358 if (ieee80211_radiotap_active_vap(vap)) { 2359 struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap; 2360 2361 tap->wr_flags = 0; 2362 if (phy_info->phy_flags & htole16(IWM_PHY_INFO_FLAG_SHPREAMBLE)) 2363 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2364 tap->wr_chan_freq = htole16(rxs.c_freq); 2365 /* XXX only if ic->ic_curchan->ic_ieee == rxs.c_ieee */ 2366 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2367 tap->wr_dbm_antsignal = (int8_t)rssi; 2368 tap->wr_dbm_antnoise = (int8_t)sc->sc_noise; 2369 tap->wr_tsft = phy_info->system_timestamp; 2370 switch (phy_info->rate) { 2371 /* CCK rates. */ 2372 case 10: tap->wr_rate = 2; break; 2373 case 20: tap->wr_rate = 4; break; 2374 case 55: tap->wr_rate = 11; break; 2375 case 110: tap->wr_rate = 22; break; 2376 /* OFDM rates. */ 2377 case 0xd: tap->wr_rate = 12; break; 2378 case 0xf: tap->wr_rate = 18; break; 2379 case 0x5: tap->wr_rate = 24; break; 2380 case 0x7: tap->wr_rate = 36; break; 2381 case 0x9: tap->wr_rate = 48; break; 2382 case 0xb: tap->wr_rate = 72; break; 2383 case 0x1: tap->wr_rate = 96; break; 2384 case 0x3: tap->wr_rate = 108; break; 2385 /* Unknown rate: should not happen. */ 2386 default: tap->wr_rate = 0; 2387 } 2388 } 2389 2390 IWM_UNLOCK(sc); 2391 if (ni != NULL) { 2392 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "input m %p\n", m); 2393 ieee80211_input_mimo(ni, m, &rxs); 2394 ieee80211_free_node(ni); 2395 } else { 2396 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "inputall m %p\n", m); 2397 ieee80211_input_mimo_all(ic, m, &rxs); 2398 } 2399 IWM_LOCK(sc); 2400 } 2401 2402 static int 2403 iwm_mvm_rx_tx_cmd_single(struct iwm_softc *sc, struct iwm_rx_packet *pkt, 2404 struct iwm_node *in) 2405 { 2406 struct iwm_mvm_tx_resp *tx_resp = (void *)pkt->data; 2407 struct ieee80211_node *ni = &in->in_ni; 2408 struct ieee80211vap *vap = ni->ni_vap; 2409 int status = le16toh(tx_resp->status.status) & IWM_TX_STATUS_MSK; 2410 int failack = tx_resp->failure_frame; 2411 2412 KASSERT(tx_resp->frame_count == 1, ("too many frames")); 2413 2414 /* Update rate control statistics. */ 2415 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, "%s: status=0x%04x, seq=%d, fc=%d, btc=%d, frts=%d, ff=%d, irate=%08x, wmt=%d\n", 2416 __func__, 2417 (int) le16toh(tx_resp->status.status), 2418 (int) le16toh(tx_resp->status.sequence), 2419 tx_resp->frame_count, 2420 tx_resp->bt_kill_count, 2421 tx_resp->failure_rts, 2422 tx_resp->failure_frame, 2423 le32toh(tx_resp->initial_rate), 2424 (int) le16toh(tx_resp->wireless_media_time)); 2425 2426 if (status != IWM_TX_STATUS_SUCCESS && 2427 status != IWM_TX_STATUS_DIRECT_DONE) { 2428 ieee80211_ratectl_tx_complete(vap, ni, 2429 IEEE80211_RATECTL_TX_FAILURE, &failack, NULL); 2430 return (1); 2431 } else { 2432 ieee80211_ratectl_tx_complete(vap, ni, 2433 IEEE80211_RATECTL_TX_SUCCESS, &failack, NULL); 2434 return (0); 2435 } 2436 } 2437 2438 static void 2439 iwm_mvm_rx_tx_cmd(struct iwm_softc *sc, 2440 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2441 { 2442 struct iwm_cmd_header *cmd_hdr = &pkt->hdr; 2443 int idx = cmd_hdr->idx; 2444 int qid = cmd_hdr->qid; 2445 struct iwm_tx_ring *ring = &sc->txq[qid]; 2446 struct iwm_tx_data *txd = &ring->data[idx]; 2447 struct iwm_node *in = txd->in; 2448 struct mbuf *m = txd->m; 2449 int status; 2450 2451 KASSERT(txd->done == 0, ("txd not done")); 2452 KASSERT(txd->in != NULL, ("txd without node")); 2453 KASSERT(txd->m != NULL, ("txd without mbuf")); 2454 2455 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2456 2457 sc->sc_tx_timer = 0; 2458 2459 status = iwm_mvm_rx_tx_cmd_single(sc, pkt, in); 2460 2461 /* Unmap and free mbuf. */ 2462 bus_dmamap_sync(ring->data_dmat, txd->map, BUS_DMASYNC_POSTWRITE); 2463 bus_dmamap_unload(ring->data_dmat, txd->map); 2464 2465 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2466 "free txd %p, in %p\n", txd, txd->in); 2467 txd->done = 1; 2468 txd->m = NULL; 2469 txd->in = NULL; 2470 2471 ieee80211_tx_complete(&in->in_ni, m, status); 2472 2473 if (--ring->queued < IWM_TX_RING_LOMARK) { 2474 sc->qfullmsk &= ~(1 << ring->qid); 2475 if (sc->qfullmsk == 0) { 2476 /* 2477 * Well, we're in interrupt context, but then again 2478 * I guess net80211 does all sorts of stunts in 2479 * interrupt context, so maybe this is no biggie. 2480 */ 2481 iwm_start(sc); 2482 } 2483 } 2484 } 2485 2486 /* 2487 * transmit side 2488 */ 2489 2490 /* 2491 * Process a "command done" firmware notification. This is where we wakeup 2492 * processes waiting for a synchronous command completion. 2493 * from if_iwn 2494 */ 2495 static void 2496 iwm_cmd_done(struct iwm_softc *sc, struct iwm_rx_packet *pkt) 2497 { 2498 struct iwm_tx_ring *ring = &sc->txq[IWM_MVM_CMD_QUEUE]; 2499 struct iwm_tx_data *data; 2500 2501 if (pkt->hdr.qid != IWM_MVM_CMD_QUEUE) { 2502 return; /* Not a command ack. */ 2503 } 2504 2505 data = &ring->data[pkt->hdr.idx]; 2506 2507 /* If the command was mapped in an mbuf, free it. */ 2508 if (data->m != NULL) { 2509 bus_dmamap_sync(ring->data_dmat, data->map, 2510 BUS_DMASYNC_POSTWRITE); 2511 bus_dmamap_unload(ring->data_dmat, data->map); 2512 m_freem(data->m); 2513 data->m = NULL; 2514 } 2515 wakeup(&ring->desc[pkt->hdr.idx]); 2516 } 2517 2518 #if 0 2519 /* 2520 * necessary only for block ack mode 2521 */ 2522 void 2523 iwm_update_sched(struct iwm_softc *sc, int qid, int idx, uint8_t sta_id, 2524 uint16_t len) 2525 { 2526 struct iwm_agn_scd_bc_tbl *scd_bc_tbl; 2527 uint16_t w_val; 2528 2529 scd_bc_tbl = sc->sched_dma.vaddr; 2530 2531 len += 8; /* magic numbers came naturally from paris */ 2532 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_DW_BC_TABLE) 2533 len = roundup(len, 4) / 4; 2534 2535 w_val = htole16(sta_id << 12 | len); 2536 2537 /* Update TX scheduler. */ 2538 scd_bc_tbl[qid].tfd_offset[idx] = w_val; 2539 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 2540 BUS_DMASYNC_PREWRITE); 2541 2542 /* I really wonder what this is ?!? */ 2543 if (idx < IWM_TFD_QUEUE_SIZE_BC_DUP) { 2544 scd_bc_tbl[qid].tfd_offset[IWM_TFD_QUEUE_SIZE_MAX + idx] = w_val; 2545 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 2546 BUS_DMASYNC_PREWRITE); 2547 } 2548 } 2549 #endif 2550 2551 /* 2552 * Take an 802.11 (non-n) rate, find the relevant rate 2553 * table entry. return the index into in_ridx[]. 2554 * 2555 * The caller then uses that index back into in_ridx 2556 * to figure out the rate index programmed /into/ 2557 * the firmware for this given node. 2558 */ 2559 static int 2560 iwm_tx_rateidx_lookup(struct iwm_softc *sc, struct iwm_node *in, 2561 uint8_t rate) 2562 { 2563 int i; 2564 uint8_t r; 2565 2566 for (i = 0; i < nitems(in->in_ridx); i++) { 2567 r = iwm_rates[in->in_ridx[i]].rate; 2568 if (rate == r) 2569 return (i); 2570 } 2571 /* XXX Return the first */ 2572 /* XXX TODO: have it return the /lowest/ */ 2573 return (0); 2574 } 2575 2576 /* 2577 * Fill in the rate related information for a transmit command. 2578 */ 2579 static const struct iwm_rate * 2580 iwm_tx_fill_cmd(struct iwm_softc *sc, struct iwm_node *in, 2581 struct ieee80211_frame *wh, struct iwm_tx_cmd *tx) 2582 { 2583 struct ieee80211com *ic = &sc->sc_ic; 2584 struct ieee80211_node *ni = &in->in_ni; 2585 const struct iwm_rate *rinfo; 2586 int type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2587 int ridx, rate_flags; 2588 2589 tx->rts_retry_limit = IWM_RTS_DFAULT_RETRY_LIMIT; 2590 tx->data_retry_limit = IWM_DEFAULT_TX_RETRY; 2591 2592 /* 2593 * XXX TODO: everything about the rate selection here is terrible! 2594 */ 2595 2596 if (type == IEEE80211_FC0_TYPE_DATA) { 2597 int i; 2598 /* for data frames, use RS table */ 2599 (void) ieee80211_ratectl_rate(ni, NULL, 0); 2600 i = iwm_tx_rateidx_lookup(sc, in, ni->ni_txrate); 2601 ridx = in->in_ridx[i]; 2602 2603 /* This is the index into the programmed table */ 2604 tx->initial_rate_index = i; 2605 tx->tx_flags |= htole32(IWM_TX_CMD_FLG_STA_RATE); 2606 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE, 2607 "%s: start with i=%d, txrate %d\n", 2608 __func__, i, iwm_rates[ridx].rate); 2609 } else { 2610 /* 2611 * For non-data, use the lowest supported rate for the given 2612 * operational mode. 2613 * 2614 * Note: there may not be any rate control information available. 2615 * This driver currently assumes if we're transmitting data 2616 * frames, use the rate control table. Grr. 2617 * 2618 * XXX TODO: use the configured rate for the traffic type! 2619 * XXX TODO: this should be per-vap, not curmode; as we later 2620 * on we'll want to handle off-channel stuff (eg TDLS). 2621 */ 2622 if (ic->ic_curmode == IEEE80211_MODE_11A) { 2623 /* 2624 * XXX this assumes the mode is either 11a or not 11a; 2625 * definitely won't work for 11n. 2626 */ 2627 ridx = IWM_RIDX_OFDM; 2628 } else { 2629 ridx = IWM_RIDX_CCK; 2630 } 2631 } 2632 2633 rinfo = &iwm_rates[ridx]; 2634 2635 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: ridx=%d; rate=%d, CCK=%d\n", 2636 __func__, ridx, 2637 rinfo->rate, 2638 !! (IWM_RIDX_IS_CCK(ridx)) 2639 ); 2640 2641 /* XXX TODO: hard-coded TX antenna? */ 2642 rate_flags = 1 << IWM_RATE_MCS_ANT_POS; 2643 if (IWM_RIDX_IS_CCK(ridx)) 2644 rate_flags |= IWM_RATE_MCS_CCK_MSK; 2645 tx->rate_n_flags = htole32(rate_flags | rinfo->plcp); 2646 2647 return rinfo; 2648 } 2649 2650 #define TB0_SIZE 16 2651 static int 2652 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) 2653 { 2654 struct ieee80211com *ic = &sc->sc_ic; 2655 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2656 struct iwm_node *in = IWM_NODE(ni); 2657 struct iwm_tx_ring *ring; 2658 struct iwm_tx_data *data; 2659 struct iwm_tfd *desc; 2660 struct iwm_device_cmd *cmd; 2661 struct iwm_tx_cmd *tx; 2662 struct ieee80211_frame *wh; 2663 struct ieee80211_key *k = NULL; 2664 struct mbuf *m1; 2665 const struct iwm_rate *rinfo; 2666 uint32_t flags; 2667 u_int hdrlen; 2668 bus_dma_segment_t *seg, segs[IWM_MAX_SCATTER]; 2669 int nsegs; 2670 uint8_t tid, type; 2671 int i, totlen, error, pad; 2672 2673 wh = mtod(m, struct ieee80211_frame *); 2674 hdrlen = ieee80211_anyhdrsize(wh); 2675 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2676 tid = 0; 2677 ring = &sc->txq[ac]; 2678 desc = &ring->desc[ring->cur]; 2679 memset(desc, 0, sizeof(*desc)); 2680 data = &ring->data[ring->cur]; 2681 2682 /* Fill out iwm_tx_cmd to send to the firmware */ 2683 cmd = &ring->cmd[ring->cur]; 2684 cmd->hdr.code = IWM_TX_CMD; 2685 cmd->hdr.flags = 0; 2686 cmd->hdr.qid = ring->qid; 2687 cmd->hdr.idx = ring->cur; 2688 2689 tx = (void *)cmd->data; 2690 memset(tx, 0, sizeof(*tx)); 2691 2692 rinfo = iwm_tx_fill_cmd(sc, in, wh, tx); 2693 2694 /* Encrypt the frame if need be. */ 2695 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2696 /* Retrieve key for TX && do software encryption. */ 2697 k = ieee80211_crypto_encap(ni, m); 2698 if (k == NULL) { 2699 m_freem(m); 2700 return (ENOBUFS); 2701 } 2702 /* 802.11 header may have moved. */ 2703 wh = mtod(m, struct ieee80211_frame *); 2704 } 2705 2706 if (ieee80211_radiotap_active_vap(vap)) { 2707 struct iwm_tx_radiotap_header *tap = &sc->sc_txtap; 2708 2709 tap->wt_flags = 0; 2710 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 2711 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 2712 tap->wt_rate = rinfo->rate; 2713 if (k != NULL) 2714 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2715 ieee80211_radiotap_tx(vap, m); 2716 } 2717 2718 2719 totlen = m->m_pkthdr.len; 2720 2721 flags = 0; 2722 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2723 flags |= IWM_TX_CMD_FLG_ACK; 2724 } 2725 2726 if (type != IEEE80211_FC0_TYPE_DATA 2727 && (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 2728 && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2729 flags |= IWM_TX_CMD_FLG_PROT_REQUIRE; 2730 } 2731 2732 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2733 type != IEEE80211_FC0_TYPE_DATA) 2734 tx->sta_id = sc->sc_aux_sta.sta_id; 2735 else 2736 tx->sta_id = IWM_STATION_ID; 2737 2738 if (type == IEEE80211_FC0_TYPE_MGT) { 2739 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2740 2741 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ || 2742 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ) 2743 tx->pm_frame_timeout = htole16(3); 2744 else 2745 tx->pm_frame_timeout = htole16(2); 2746 } else { 2747 tx->pm_frame_timeout = htole16(0); 2748 } 2749 2750 if (hdrlen & 3) { 2751 /* First segment length must be a multiple of 4. */ 2752 flags |= IWM_TX_CMD_FLG_MH_PAD; 2753 pad = 4 - (hdrlen & 3); 2754 } else 2755 pad = 0; 2756 2757 tx->driver_txop = 0; 2758 tx->next_frame_len = 0; 2759 2760 tx->len = htole16(totlen); 2761 tx->tid_tspec = tid; 2762 tx->life_time = htole32(IWM_TX_CMD_LIFE_TIME_INFINITE); 2763 2764 /* Set physical address of "scratch area". */ 2765 tx->dram_lsb_ptr = htole32(data->scratch_paddr); 2766 tx->dram_msb_ptr = iwm_get_dma_hi_addr(data->scratch_paddr); 2767 2768 /* Copy 802.11 header in TX command. */ 2769 memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen); 2770 2771 flags |= IWM_TX_CMD_FLG_BT_DIS | IWM_TX_CMD_FLG_SEQ_CTL; 2772 2773 tx->sec_ctl = 0; 2774 tx->tx_flags |= htole32(flags); 2775 2776 /* Trim 802.11 header. */ 2777 m_adj(m, hdrlen); 2778 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, 2779 segs, &nsegs, BUS_DMA_NOWAIT); 2780 if (error != 0) { 2781 if (error != EFBIG) { 2782 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n", 2783 error); 2784 m_freem(m); 2785 return error; 2786 } 2787 /* Too many DMA segments, linearize mbuf. */ 2788 m1 = m_collapse(m, M_NOWAIT, IWM_MAX_SCATTER - 2); 2789 if (m1 == NULL) { 2790 device_printf(sc->sc_dev, 2791 "%s: could not defrag mbuf\n", __func__); 2792 m_freem(m); 2793 return (ENOBUFS); 2794 } 2795 m = m1; 2796 2797 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, 2798 segs, &nsegs, BUS_DMA_NOWAIT); 2799 if (error != 0) { 2800 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n", 2801 error); 2802 m_freem(m); 2803 return error; 2804 } 2805 } 2806 data->m = m; 2807 data->in = in; 2808 data->done = 0; 2809 2810 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2811 "sending txd %p, in %p\n", data, data->in); 2812 KASSERT(data->in != NULL, ("node is NULL")); 2813 2814 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2815 "sending data: qid=%d idx=%d len=%d nsegs=%d txflags=0x%08x rate_n_flags=0x%08x rateidx=%d\n", 2816 ring->qid, ring->cur, totlen, nsegs, 2817 le32toh(tx->tx_flags), 2818 le32toh(tx->rate_n_flags), 2819 (int) tx->initial_rate_index 2820 ); 2821 2822 /* Fill TX descriptor. */ 2823 desc->num_tbs = 2 + nsegs; 2824 2825 desc->tbs[0].lo = htole32(data->cmd_paddr); 2826 desc->tbs[0].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) | 2827 (TB0_SIZE << 4); 2828 desc->tbs[1].lo = htole32(data->cmd_paddr + TB0_SIZE); 2829 desc->tbs[1].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) | 2830 ((sizeof(struct iwm_cmd_header) + sizeof(*tx) 2831 + hdrlen + pad - TB0_SIZE) << 4); 2832 2833 /* Other DMA segments are for data payload. */ 2834 for (i = 0; i < nsegs; i++) { 2835 seg = &segs[i]; 2836 desc->tbs[i+2].lo = htole32(seg->ds_addr); 2837 desc->tbs[i+2].hi_n_len = \ 2838 htole16(iwm_get_dma_hi_addr(seg->ds_addr)) 2839 | ((seg->ds_len) << 4); 2840 } 2841 2842 bus_dmamap_sync(ring->data_dmat, data->map, 2843 BUS_DMASYNC_PREWRITE); 2844 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, 2845 BUS_DMASYNC_PREWRITE); 2846 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 2847 BUS_DMASYNC_PREWRITE); 2848 2849 #if 0 2850 iwm_update_sched(sc, ring->qid, ring->cur, tx->sta_id, le16toh(tx->len)); 2851 #endif 2852 2853 /* Kick TX ring. */ 2854 ring->cur = (ring->cur + 1) % IWM_TX_RING_COUNT; 2855 IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); 2856 2857 /* Mark TX ring as full if we reach a certain threshold. */ 2858 if (++ring->queued > IWM_TX_RING_HIMARK) { 2859 sc->qfullmsk |= 1 << ring->qid; 2860 } 2861 2862 return 0; 2863 } 2864 2865 static int 2866 iwm_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2867 const struct ieee80211_bpf_params *params) 2868 { 2869 struct ieee80211com *ic = ni->ni_ic; 2870 struct iwm_softc *sc = ic->ic_softc; 2871 int error = 0; 2872 2873 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2874 "->%s begin\n", __func__); 2875 2876 if ((sc->sc_flags & IWM_FLAG_HW_INITED) == 0) { 2877 m_freem(m); 2878 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2879 "<-%s not RUNNING\n", __func__); 2880 return (ENETDOWN); 2881 } 2882 2883 IWM_LOCK(sc); 2884 /* XXX fix this */ 2885 if (params == NULL) { 2886 error = iwm_tx(sc, m, ni, 0); 2887 } else { 2888 error = iwm_tx(sc, m, ni, 0); 2889 } 2890 sc->sc_tx_timer = 5; 2891 IWM_UNLOCK(sc); 2892 2893 return (error); 2894 } 2895 2896 /* 2897 * mvm/tx.c 2898 */ 2899 2900 #if 0 2901 /* 2902 * Note that there are transports that buffer frames before they reach 2903 * the firmware. This means that after flush_tx_path is called, the 2904 * queue might not be empty. The race-free way to handle this is to: 2905 * 1) set the station as draining 2906 * 2) flush the Tx path 2907 * 3) wait for the transport queues to be empty 2908 */ 2909 int 2910 iwm_mvm_flush_tx_path(struct iwm_softc *sc, int tfd_msk, int sync) 2911 { 2912 struct iwm_tx_path_flush_cmd flush_cmd = { 2913 .queues_ctl = htole32(tfd_msk), 2914 .flush_ctl = htole16(IWM_DUMP_TX_FIFO_FLUSH), 2915 }; 2916 int ret; 2917 2918 ret = iwm_mvm_send_cmd_pdu(sc, IWM_TXPATH_FLUSH, 2919 sync ? IWM_CMD_SYNC : IWM_CMD_ASYNC, 2920 sizeof(flush_cmd), &flush_cmd); 2921 if (ret) 2922 device_printf(sc->sc_dev, 2923 "Flushing tx queue failed: %d\n", ret); 2924 return ret; 2925 } 2926 #endif 2927 2928 /* 2929 * BEGIN mvm/sta.c 2930 */ 2931 2932 static void 2933 iwm_mvm_add_sta_cmd_v6_to_v5(struct iwm_mvm_add_sta_cmd_v6 *cmd_v6, 2934 struct iwm_mvm_add_sta_cmd_v5 *cmd_v5) 2935 { 2936 memset(cmd_v5, 0, sizeof(*cmd_v5)); 2937 2938 cmd_v5->add_modify = cmd_v6->add_modify; 2939 cmd_v5->tid_disable_tx = cmd_v6->tid_disable_tx; 2940 cmd_v5->mac_id_n_color = cmd_v6->mac_id_n_color; 2941 IEEE80211_ADDR_COPY(cmd_v5->addr, cmd_v6->addr); 2942 cmd_v5->sta_id = cmd_v6->sta_id; 2943 cmd_v5->modify_mask = cmd_v6->modify_mask; 2944 cmd_v5->station_flags = cmd_v6->station_flags; 2945 cmd_v5->station_flags_msk = cmd_v6->station_flags_msk; 2946 cmd_v5->add_immediate_ba_tid = cmd_v6->add_immediate_ba_tid; 2947 cmd_v5->remove_immediate_ba_tid = cmd_v6->remove_immediate_ba_tid; 2948 cmd_v5->add_immediate_ba_ssn = cmd_v6->add_immediate_ba_ssn; 2949 cmd_v5->sleep_tx_count = cmd_v6->sleep_tx_count; 2950 cmd_v5->sleep_state_flags = cmd_v6->sleep_state_flags; 2951 cmd_v5->assoc_id = cmd_v6->assoc_id; 2952 cmd_v5->beamform_flags = cmd_v6->beamform_flags; 2953 cmd_v5->tfd_queue_msk = cmd_v6->tfd_queue_msk; 2954 } 2955 2956 static int 2957 iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *sc, 2958 struct iwm_mvm_add_sta_cmd_v6 *cmd, int *status) 2959 { 2960 struct iwm_mvm_add_sta_cmd_v5 cmd_v5; 2961 2962 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_STA_KEY_CMD) { 2963 return iwm_mvm_send_cmd_pdu_status(sc, IWM_ADD_STA, 2964 sizeof(*cmd), cmd, status); 2965 } 2966 2967 iwm_mvm_add_sta_cmd_v6_to_v5(cmd, &cmd_v5); 2968 2969 return iwm_mvm_send_cmd_pdu_status(sc, IWM_ADD_STA, sizeof(cmd_v5), 2970 &cmd_v5, status); 2971 } 2972 2973 /* send station add/update command to firmware */ 2974 static int 2975 iwm_mvm_sta_send_to_fw(struct iwm_softc *sc, struct iwm_node *in, int update) 2976 { 2977 struct iwm_mvm_add_sta_cmd_v6 add_sta_cmd; 2978 int ret; 2979 uint32_t status; 2980 2981 memset(&add_sta_cmd, 0, sizeof(add_sta_cmd)); 2982 2983 add_sta_cmd.sta_id = IWM_STATION_ID; 2984 add_sta_cmd.mac_id_n_color 2985 = htole32(IWM_FW_CMD_ID_AND_COLOR(IWM_DEFAULT_MACID, 2986 IWM_DEFAULT_COLOR)); 2987 if (!update) { 2988 add_sta_cmd.tfd_queue_msk = htole32(0xf); 2989 IEEE80211_ADDR_COPY(&add_sta_cmd.addr, in->in_ni.ni_bssid); 2990 } 2991 add_sta_cmd.add_modify = update ? 1 : 0; 2992 add_sta_cmd.station_flags_msk 2993 |= htole32(IWM_STA_FLG_FAT_EN_MSK | IWM_STA_FLG_MIMO_EN_MSK); 2994 2995 status = IWM_ADD_STA_SUCCESS; 2996 ret = iwm_mvm_send_add_sta_cmd_status(sc, &add_sta_cmd, &status); 2997 if (ret) 2998 return ret; 2999 3000 switch (status) { 3001 case IWM_ADD_STA_SUCCESS: 3002 break; 3003 default: 3004 ret = EIO; 3005 device_printf(sc->sc_dev, "IWM_ADD_STA failed\n"); 3006 break; 3007 } 3008 3009 return ret; 3010 } 3011 3012 static int 3013 iwm_mvm_add_sta(struct iwm_softc *sc, struct iwm_node *in) 3014 { 3015 int ret; 3016 3017 ret = iwm_mvm_sta_send_to_fw(sc, in, 0); 3018 if (ret) 3019 return ret; 3020 3021 return 0; 3022 } 3023 3024 static int 3025 iwm_mvm_update_sta(struct iwm_softc *sc, struct iwm_node *in) 3026 { 3027 return iwm_mvm_sta_send_to_fw(sc, in, 1); 3028 } 3029 3030 static int 3031 iwm_mvm_add_int_sta_common(struct iwm_softc *sc, struct iwm_int_sta *sta, 3032 const uint8_t *addr, uint16_t mac_id, uint16_t color) 3033 { 3034 struct iwm_mvm_add_sta_cmd_v6 cmd; 3035 int ret; 3036 uint32_t status; 3037 3038 memset(&cmd, 0, sizeof(cmd)); 3039 cmd.sta_id = sta->sta_id; 3040 cmd.mac_id_n_color = htole32(IWM_FW_CMD_ID_AND_COLOR(mac_id, color)); 3041 3042 cmd.tfd_queue_msk = htole32(sta->tfd_queue_msk); 3043 3044 if (addr) 3045 IEEE80211_ADDR_COPY(cmd.addr, addr); 3046 3047 ret = iwm_mvm_send_add_sta_cmd_status(sc, &cmd, &status); 3048 if (ret) 3049 return ret; 3050 3051 switch (status) { 3052 case IWM_ADD_STA_SUCCESS: 3053 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 3054 "%s: Internal station added.\n", __func__); 3055 return 0; 3056 default: 3057 device_printf(sc->sc_dev, 3058 "%s: Add internal station failed, status=0x%x\n", 3059 __func__, status); 3060 ret = EIO; 3061 break; 3062 } 3063 return ret; 3064 } 3065 3066 static int 3067 iwm_mvm_add_aux_sta(struct iwm_softc *sc) 3068 { 3069 int ret; 3070 3071 sc->sc_aux_sta.sta_id = 3; 3072 sc->sc_aux_sta.tfd_queue_msk = 0; 3073 3074 ret = iwm_mvm_add_int_sta_common(sc, 3075 &sc->sc_aux_sta, NULL, IWM_MAC_INDEX_AUX, 0); 3076 3077 if (ret) 3078 memset(&sc->sc_aux_sta, 0, sizeof(sc->sc_aux_sta)); 3079 return ret; 3080 } 3081 3082 /* 3083 * END mvm/sta.c 3084 */ 3085 3086 /* 3087 * BEGIN mvm/quota.c 3088 */ 3089 3090 static int 3091 iwm_mvm_update_quotas(struct iwm_softc *sc, struct iwm_node *in) 3092 { 3093 struct iwm_time_quota_cmd cmd; 3094 int i, idx, ret, num_active_macs, quota, quota_rem; 3095 int colors[IWM_MAX_BINDINGS] = { -1, -1, -1, -1, }; 3096 int n_ifs[IWM_MAX_BINDINGS] = {0, }; 3097 uint16_t id; 3098 3099 memset(&cmd, 0, sizeof(cmd)); 3100 3101 /* currently, PHY ID == binding ID */ 3102 if (in) { 3103 id = in->in_phyctxt->id; 3104 KASSERT(id < IWM_MAX_BINDINGS, ("invalid id")); 3105 colors[id] = in->in_phyctxt->color; 3106 3107 if (1) 3108 n_ifs[id] = 1; 3109 } 3110 3111 /* 3112 * The FW's scheduling session consists of 3113 * IWM_MVM_MAX_QUOTA fragments. Divide these fragments 3114 * equally between all the bindings that require quota 3115 */ 3116 num_active_macs = 0; 3117 for (i = 0; i < IWM_MAX_BINDINGS; i++) { 3118 cmd.quotas[i].id_and_color = htole32(IWM_FW_CTXT_INVALID); 3119 num_active_macs += n_ifs[i]; 3120 } 3121 3122 quota = 0; 3123 quota_rem = 0; 3124 if (num_active_macs) { 3125 quota = IWM_MVM_MAX_QUOTA / num_active_macs; 3126 quota_rem = IWM_MVM_MAX_QUOTA % num_active_macs; 3127 } 3128 3129 for (idx = 0, i = 0; i < IWM_MAX_BINDINGS; i++) { 3130 if (colors[i] < 0) 3131 continue; 3132 3133 cmd.quotas[idx].id_and_color = 3134 htole32(IWM_FW_CMD_ID_AND_COLOR(i, colors[i])); 3135 3136 if (n_ifs[i] <= 0) { 3137 cmd.quotas[idx].quota = htole32(0); 3138 cmd.quotas[idx].max_duration = htole32(0); 3139 } else { 3140 cmd.quotas[idx].quota = htole32(quota * n_ifs[i]); 3141 cmd.quotas[idx].max_duration = htole32(0); 3142 } 3143 idx++; 3144 } 3145 3146 /* Give the remainder of the session to the first binding */ 3147 cmd.quotas[0].quota = htole32(le32toh(cmd.quotas[0].quota) + quota_rem); 3148 3149 ret = iwm_mvm_send_cmd_pdu(sc, IWM_TIME_QUOTA_CMD, IWM_CMD_SYNC, 3150 sizeof(cmd), &cmd); 3151 if (ret) 3152 device_printf(sc->sc_dev, 3153 "%s: Failed to send quota: %d\n", __func__, ret); 3154 return ret; 3155 } 3156 3157 /* 3158 * END mvm/quota.c 3159 */ 3160 3161 /* 3162 * ieee80211 routines 3163 */ 3164 3165 /* 3166 * Change to AUTH state in 80211 state machine. Roughly matches what 3167 * Linux does in bss_info_changed(). 3168 */ 3169 static int 3170 iwm_auth(struct ieee80211vap *vap, struct iwm_softc *sc) 3171 { 3172 struct ieee80211_node *ni; 3173 struct iwm_node *in; 3174 struct iwm_vap *iv = IWM_VAP(vap); 3175 uint32_t duration; 3176 int error; 3177 3178 /* 3179 * XXX i have a feeling that the vap node is being 3180 * freed from underneath us. Grr. 3181 */ 3182 ni = ieee80211_ref_node(vap->iv_bss); 3183 in = IWM_NODE(ni); 3184 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_STATE, 3185 "%s: called; vap=%p, bss ni=%p\n", 3186 __func__, 3187 vap, 3188 ni); 3189 3190 in->in_assoc = 0; 3191 3192 error = iwm_allow_mcast(vap, sc); 3193 if (error) { 3194 device_printf(sc->sc_dev, 3195 "%s: failed to set multicast\n", __func__); 3196 goto out; 3197 } 3198 3199 /* 3200 * This is where it deviates from what Linux does. 3201 * 3202 * Linux iwlwifi doesn't reset the nic each time, nor does it 3203 * call ctxt_add() here. Instead, it adds it during vap creation, 3204 * and always does does a mac_ctx_changed(). 3205 * 3206 * The openbsd port doesn't attempt to do that - it reset things 3207 * at odd states and does the add here. 3208 * 3209 * So, until the state handling is fixed (ie, we never reset 3210 * the NIC except for a firmware failure, which should drag 3211 * the NIC back to IDLE, re-setup and re-add all the mac/phy 3212 * contexts that are required), let's do a dirty hack here. 3213 */ 3214 if (iv->is_uploaded) { 3215 if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) { 3216 device_printf(sc->sc_dev, 3217 "%s: failed to update MAC\n", __func__); 3218 goto out; 3219 } 3220 if ((error = iwm_mvm_phy_ctxt_changed(sc, &sc->sc_phyctxt[0], 3221 in->in_ni.ni_chan, 1, 1)) != 0) { 3222 device_printf(sc->sc_dev, 3223 "%s: failed update phy ctxt\n", __func__); 3224 goto out; 3225 } 3226 in->in_phyctxt = &sc->sc_phyctxt[0]; 3227 3228 if ((error = iwm_mvm_binding_update(sc, in)) != 0) { 3229 device_printf(sc->sc_dev, 3230 "%s: binding update cmd\n", __func__); 3231 goto out; 3232 } 3233 if ((error = iwm_mvm_update_sta(sc, in)) != 0) { 3234 device_printf(sc->sc_dev, 3235 "%s: failed to update sta\n", __func__); 3236 goto out; 3237 } 3238 } else { 3239 if ((error = iwm_mvm_mac_ctxt_add(sc, vap)) != 0) { 3240 device_printf(sc->sc_dev, 3241 "%s: failed to add MAC\n", __func__); 3242 goto out; 3243 } 3244 if ((error = iwm_mvm_phy_ctxt_changed(sc, &sc->sc_phyctxt[0], 3245 in->in_ni.ni_chan, 1, 1)) != 0) { 3246 device_printf(sc->sc_dev, 3247 "%s: failed add phy ctxt!\n", __func__); 3248 error = ETIMEDOUT; 3249 goto out; 3250 } 3251 in->in_phyctxt = &sc->sc_phyctxt[0]; 3252 3253 if ((error = iwm_mvm_binding_add_vif(sc, in)) != 0) { 3254 device_printf(sc->sc_dev, 3255 "%s: binding add cmd\n", __func__); 3256 goto out; 3257 } 3258 if ((error = iwm_mvm_add_sta(sc, in)) != 0) { 3259 device_printf(sc->sc_dev, 3260 "%s: failed to add sta\n", __func__); 3261 goto out; 3262 } 3263 } 3264 3265 /* 3266 * Prevent the FW from wandering off channel during association 3267 * by "protecting" the session with a time event. 3268 */ 3269 /* XXX duration is in units of TU, not MS */ 3270 duration = IWM_MVM_TE_SESSION_PROTECTION_MAX_TIME_MS; 3271 iwm_mvm_protect_session(sc, in, duration, 500 /* XXX magic number */); 3272 DELAY(100); 3273 3274 error = 0; 3275 out: 3276 ieee80211_free_node(ni); 3277 return (error); 3278 } 3279 3280 static int 3281 iwm_assoc(struct ieee80211vap *vap, struct iwm_softc *sc) 3282 { 3283 struct iwm_node *in = IWM_NODE(vap->iv_bss); 3284 int error; 3285 3286 if ((error = iwm_mvm_update_sta(sc, in)) != 0) { 3287 device_printf(sc->sc_dev, 3288 "%s: failed to update STA\n", __func__); 3289 return error; 3290 } 3291 3292 in->in_assoc = 1; 3293 if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) { 3294 device_printf(sc->sc_dev, 3295 "%s: failed to update MAC\n", __func__); 3296 return error; 3297 } 3298 3299 return 0; 3300 } 3301 3302 static int 3303 iwm_release(struct iwm_softc *sc, struct iwm_node *in) 3304 { 3305 /* 3306 * Ok, so *technically* the proper set of calls for going 3307 * from RUN back to SCAN is: 3308 * 3309 * iwm_mvm_power_mac_disable(sc, in); 3310 * iwm_mvm_mac_ctxt_changed(sc, in); 3311 * iwm_mvm_rm_sta(sc, in); 3312 * iwm_mvm_update_quotas(sc, NULL); 3313 * iwm_mvm_mac_ctxt_changed(sc, in); 3314 * iwm_mvm_binding_remove_vif(sc, in); 3315 * iwm_mvm_mac_ctxt_remove(sc, in); 3316 * 3317 * However, that freezes the device not matter which permutations 3318 * and modifications are attempted. Obviously, this driver is missing 3319 * something since it works in the Linux driver, but figuring out what 3320 * is missing is a little more complicated. Now, since we're going 3321 * back to nothing anyway, we'll just do a complete device reset. 3322 * Up your's, device! 3323 */ 3324 //iwm_mvm_flush_tx_path(sc, 0xf, 1); 3325 iwm_stop_device(sc); 3326 iwm_init_hw(sc); 3327 if (in) 3328 in->in_assoc = 0; 3329 return 0; 3330 3331 #if 0 3332 int error; 3333 3334 iwm_mvm_power_mac_disable(sc, in); 3335 3336 if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) { 3337 device_printf(sc->sc_dev, "mac ctxt change fail 1 %d\n", error); 3338 return error; 3339 } 3340 3341 if ((error = iwm_mvm_rm_sta(sc, in)) != 0) { 3342 device_printf(sc->sc_dev, "sta remove fail %d\n", error); 3343 return error; 3344 } 3345 error = iwm_mvm_rm_sta(sc, in); 3346 in->in_assoc = 0; 3347 iwm_mvm_update_quotas(sc, NULL); 3348 if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) { 3349 device_printf(sc->sc_dev, "mac ctxt change fail 2 %d\n", error); 3350 return error; 3351 } 3352 iwm_mvm_binding_remove_vif(sc, in); 3353 3354 iwm_mvm_mac_ctxt_remove(sc, in); 3355 3356 return error; 3357 #endif 3358 } 3359 3360 static struct ieee80211_node * 3361 iwm_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 3362 { 3363 return malloc(sizeof (struct iwm_node), M_80211_NODE, 3364 M_NOWAIT | M_ZERO); 3365 } 3366 3367 static void 3368 iwm_setrates(struct iwm_softc *sc, struct iwm_node *in) 3369 { 3370 struct ieee80211_node *ni = &in->in_ni; 3371 struct iwm_lq_cmd *lq = &in->in_lq; 3372 int nrates = ni->ni_rates.rs_nrates; 3373 int i, ridx, tab = 0; 3374 int txant = 0; 3375 3376 if (nrates > nitems(lq->rs_table)) { 3377 device_printf(sc->sc_dev, 3378 "%s: node supports %d rates, driver handles " 3379 "only %zu\n", __func__, nrates, nitems(lq->rs_table)); 3380 return; 3381 } 3382 if (nrates == 0) { 3383 device_printf(sc->sc_dev, 3384 "%s: node supports 0 rates, odd!\n", __func__); 3385 return; 3386 } 3387 3388 /* 3389 * XXX .. and most of iwm_node is not initialised explicitly; 3390 * it's all just 0x0 passed to the firmware. 3391 */ 3392 3393 /* first figure out which rates we should support */ 3394 /* XXX TODO: this isn't 11n aware /at all/ */ 3395 memset(&in->in_ridx, -1, sizeof(in->in_ridx)); 3396 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3397 "%s: nrates=%d\n", __func__, nrates); 3398 3399 /* 3400 * Loop over nrates and populate in_ridx from the highest 3401 * rate to the lowest rate. Remember, in_ridx[] has 3402 * IEEE80211_RATE_MAXSIZE entries! 3403 */ 3404 for (i = 0; i < min(nrates, IEEE80211_RATE_MAXSIZE); i++) { 3405 int rate = ni->ni_rates.rs_rates[(nrates - 1) - i] & IEEE80211_RATE_VAL; 3406 3407 /* Map 802.11 rate to HW rate index. */ 3408 for (ridx = 0; ridx <= IWM_RIDX_MAX; ridx++) 3409 if (iwm_rates[ridx].rate == rate) 3410 break; 3411 if (ridx > IWM_RIDX_MAX) { 3412 device_printf(sc->sc_dev, 3413 "%s: WARNING: device rate for %d not found!\n", 3414 __func__, rate); 3415 } else { 3416 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3417 "%s: rate: i: %d, rate=%d, ridx=%d\n", 3418 __func__, 3419 i, 3420 rate, 3421 ridx); 3422 in->in_ridx[i] = ridx; 3423 } 3424 } 3425 3426 /* then construct a lq_cmd based on those */ 3427 memset(lq, 0, sizeof(*lq)); 3428 lq->sta_id = IWM_STATION_ID; 3429 3430 /* 3431 * are these used? (we don't do SISO or MIMO) 3432 * need to set them to non-zero, though, or we get an error. 3433 */ 3434 lq->single_stream_ant_msk = 1; 3435 lq->dual_stream_ant_msk = 1; 3436 3437 /* 3438 * Build the actual rate selection table. 3439 * The lowest bits are the rates. Additionally, 3440 * CCK needs bit 9 to be set. The rest of the bits 3441 * we add to the table select the tx antenna 3442 * Note that we add the rates in the highest rate first 3443 * (opposite of ni_rates). 3444 */ 3445 /* 3446 * XXX TODO: this should be looping over the min of nrates 3447 * and LQ_MAX_RETRY_NUM. Sigh. 3448 */ 3449 for (i = 0; i < nrates; i++) { 3450 int nextant; 3451 3452 if (txant == 0) 3453 txant = IWM_FW_VALID_TX_ANT(sc); 3454 nextant = 1<<(ffs(txant)-1); 3455 txant &= ~nextant; 3456 3457 /* 3458 * Map the rate id into a rate index into 3459 * our hardware table containing the 3460 * configuration to use for this rate. 3461 */ 3462 ridx = in->in_ridx[i]; 3463 tab = iwm_rates[ridx].plcp; 3464 tab |= nextant << IWM_RATE_MCS_ANT_POS; 3465 if (IWM_RIDX_IS_CCK(ridx)) 3466 tab |= IWM_RATE_MCS_CCK_MSK; 3467 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3468 "station rate i=%d, rate=%d, hw=%x\n", 3469 i, iwm_rates[ridx].rate, tab); 3470 lq->rs_table[i] = htole32(tab); 3471 } 3472 /* then fill the rest with the lowest possible rate */ 3473 for (i = nrates; i < nitems(lq->rs_table); i++) { 3474 KASSERT(tab != 0, ("invalid tab")); 3475 lq->rs_table[i] = htole32(tab); 3476 } 3477 } 3478 3479 static int 3480 iwm_media_change(struct ifnet *ifp) 3481 { 3482 struct ieee80211vap *vap = ifp->if_softc; 3483 struct ieee80211com *ic = vap->iv_ic; 3484 struct iwm_softc *sc = ic->ic_softc; 3485 int error; 3486 3487 error = ieee80211_media_change(ifp); 3488 if (error != ENETRESET) 3489 return error; 3490 3491 IWM_LOCK(sc); 3492 if (ic->ic_nrunning > 0) { 3493 iwm_stop(sc); 3494 iwm_init(sc); 3495 } 3496 IWM_UNLOCK(sc); 3497 return error; 3498 } 3499 3500 3501 static int 3502 iwm_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 3503 { 3504 struct iwm_vap *ivp = IWM_VAP(vap); 3505 struct ieee80211com *ic = vap->iv_ic; 3506 struct iwm_softc *sc = ic->ic_softc; 3507 struct iwm_node *in; 3508 int error; 3509 3510 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3511 "switching state %s -> %s\n", 3512 ieee80211_state_name[vap->iv_state], 3513 ieee80211_state_name[nstate]); 3514 IEEE80211_UNLOCK(ic); 3515 IWM_LOCK(sc); 3516 /* disable beacon filtering if we're hopping out of RUN */ 3517 if (vap->iv_state == IEEE80211_S_RUN && nstate != vap->iv_state) { 3518 iwm_mvm_disable_beacon_filter(sc); 3519 3520 if (((in = IWM_NODE(vap->iv_bss)) != NULL)) 3521 in->in_assoc = 0; 3522 3523 iwm_release(sc, NULL); 3524 3525 /* 3526 * It's impossible to directly go RUN->SCAN. If we iwm_release() 3527 * above then the card will be completely reinitialized, 3528 * so the driver must do everything necessary to bring the card 3529 * from INIT to SCAN. 3530 * 3531 * Additionally, upon receiving deauth frame from AP, 3532 * OpenBSD 802.11 stack puts the driver in IEEE80211_S_AUTH 3533 * state. This will also fail with this driver, so bring the FSM 3534 * from IEEE80211_S_RUN to IEEE80211_S_SCAN in this case as well. 3535 * 3536 * XXX TODO: fix this for FreeBSD! 3537 */ 3538 if (nstate == IEEE80211_S_SCAN || 3539 nstate == IEEE80211_S_AUTH || 3540 nstate == IEEE80211_S_ASSOC) { 3541 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3542 "Force transition to INIT; MGT=%d\n", arg); 3543 IWM_UNLOCK(sc); 3544 IEEE80211_LOCK(ic); 3545 vap->iv_newstate(vap, IEEE80211_S_INIT, arg); 3546 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3547 "Going INIT->SCAN\n"); 3548 nstate = IEEE80211_S_SCAN; 3549 IEEE80211_UNLOCK(ic); 3550 IWM_LOCK(sc); 3551 } 3552 } 3553 3554 switch (nstate) { 3555 case IEEE80211_S_INIT: 3556 sc->sc_scanband = 0; 3557 break; 3558 3559 case IEEE80211_S_AUTH: 3560 if ((error = iwm_auth(vap, sc)) != 0) { 3561 device_printf(sc->sc_dev, 3562 "%s: could not move to auth state: %d\n", 3563 __func__, error); 3564 break; 3565 } 3566 break; 3567 3568 case IEEE80211_S_ASSOC: 3569 if ((error = iwm_assoc(vap, sc)) != 0) { 3570 device_printf(sc->sc_dev, 3571 "%s: failed to associate: %d\n", __func__, 3572 error); 3573 break; 3574 } 3575 break; 3576 3577 case IEEE80211_S_RUN: 3578 { 3579 struct iwm_host_cmd cmd = { 3580 .id = IWM_LQ_CMD, 3581 .len = { sizeof(in->in_lq), }, 3582 .flags = IWM_CMD_SYNC, 3583 }; 3584 3585 /* Update the association state, now we have it all */ 3586 /* (eg associd comes in at this point */ 3587 error = iwm_assoc(vap, sc); 3588 if (error != 0) { 3589 device_printf(sc->sc_dev, 3590 "%s: failed to update association state: %d\n", 3591 __func__, 3592 error); 3593 break; 3594 } 3595 3596 in = IWM_NODE(vap->iv_bss); 3597 iwm_mvm_power_mac_update_mode(sc, in); 3598 iwm_mvm_enable_beacon_filter(sc, in); 3599 iwm_mvm_update_quotas(sc, in); 3600 iwm_setrates(sc, in); 3601 3602 cmd.data[0] = &in->in_lq; 3603 if ((error = iwm_send_cmd(sc, &cmd)) != 0) { 3604 device_printf(sc->sc_dev, 3605 "%s: IWM_LQ_CMD failed\n", __func__); 3606 } 3607 3608 break; 3609 } 3610 3611 default: 3612 break; 3613 } 3614 IWM_UNLOCK(sc); 3615 IEEE80211_LOCK(ic); 3616 3617 return (ivp->iv_newstate(vap, nstate, arg)); 3618 } 3619 3620 void 3621 iwm_endscan_cb(void *arg, int pending) 3622 { 3623 struct iwm_softc *sc = arg; 3624 struct ieee80211com *ic = &sc->sc_ic; 3625 int done; 3626 int error; 3627 3628 IWM_DPRINTF(sc, IWM_DEBUG_SCAN | IWM_DEBUG_TRACE, 3629 "%s: scan ended\n", 3630 __func__); 3631 3632 IWM_LOCK(sc); 3633 if (sc->sc_scanband == IEEE80211_CHAN_2GHZ && 3634 sc->sc_nvm.sku_cap_band_52GHz_enable) { 3635 done = 0; 3636 if ((error = iwm_mvm_scan_request(sc, 3637 IEEE80211_CHAN_5GHZ, 0, NULL, 0)) != 0) { 3638 device_printf(sc->sc_dev, "could not initiate scan\n"); 3639 done = 1; 3640 } 3641 } else { 3642 done = 1; 3643 } 3644 3645 if (done) { 3646 IWM_UNLOCK(sc); 3647 ieee80211_scan_done(TAILQ_FIRST(&ic->ic_vaps)); 3648 IWM_LOCK(sc); 3649 sc->sc_scanband = 0; 3650 } 3651 IWM_UNLOCK(sc); 3652 } 3653 3654 static int 3655 iwm_init_hw(struct iwm_softc *sc) 3656 { 3657 struct ieee80211com *ic = &sc->sc_ic; 3658 int error, i, qid; 3659 3660 if ((error = iwm_start_hw(sc)) != 0) 3661 return error; 3662 3663 if ((error = iwm_run_init_mvm_ucode(sc, 0)) != 0) { 3664 return error; 3665 } 3666 3667 /* 3668 * should stop and start HW since that INIT 3669 * image just loaded 3670 */ 3671 iwm_stop_device(sc); 3672 if ((error = iwm_start_hw(sc)) != 0) { 3673 device_printf(sc->sc_dev, "could not initialize hardware\n"); 3674 return error; 3675 } 3676 3677 /* omstart, this time with the regular firmware */ 3678 error = iwm_mvm_load_ucode_wait_alive(sc, IWM_UCODE_TYPE_REGULAR); 3679 if (error) { 3680 device_printf(sc->sc_dev, "could not load firmware\n"); 3681 goto error; 3682 } 3683 3684 if ((error = iwm_send_tx_ant_cfg(sc, IWM_FW_VALID_TX_ANT(sc))) != 0) 3685 goto error; 3686 3687 /* Send phy db control command and then phy db calibration*/ 3688 if ((error = iwm_send_phy_db_data(sc)) != 0) 3689 goto error; 3690 3691 if ((error = iwm_send_phy_cfg_cmd(sc)) != 0) 3692 goto error; 3693 3694 /* Add auxiliary station for scanning */ 3695 if ((error = iwm_mvm_add_aux_sta(sc)) != 0) 3696 goto error; 3697 3698 for (i = 0; i < IWM_NUM_PHY_CTX; i++) { 3699 /* 3700 * The channel used here isn't relevant as it's 3701 * going to be overwritten in the other flows. 3702 * For now use the first channel we have. 3703 */ 3704 if ((error = iwm_mvm_phy_ctxt_add(sc, 3705 &sc->sc_phyctxt[i], &ic->ic_channels[1], 1, 1)) != 0) 3706 goto error; 3707 } 3708 3709 error = iwm_mvm_power_update_device(sc); 3710 if (error) 3711 goto error; 3712 3713 /* Mark TX rings as active. */ 3714 for (qid = 0; qid < 4; qid++) { 3715 iwm_enable_txq(sc, qid, qid); 3716 } 3717 3718 return 0; 3719 3720 error: 3721 iwm_stop_device(sc); 3722 return error; 3723 } 3724 3725 /* Allow multicast from our BSSID. */ 3726 static int 3727 iwm_allow_mcast(struct ieee80211vap *vap, struct iwm_softc *sc) 3728 { 3729 struct ieee80211_node *ni = vap->iv_bss; 3730 struct iwm_mcast_filter_cmd *cmd; 3731 size_t size; 3732 int error; 3733 3734 size = roundup(sizeof(*cmd), 4); 3735 cmd = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 3736 if (cmd == NULL) 3737 return ENOMEM; 3738 cmd->filter_own = 1; 3739 cmd->port_id = 0; 3740 cmd->count = 0; 3741 cmd->pass_all = 1; 3742 IEEE80211_ADDR_COPY(cmd->bssid, ni->ni_bssid); 3743 3744 error = iwm_mvm_send_cmd_pdu(sc, IWM_MCAST_FILTER_CMD, 3745 IWM_CMD_SYNC, size, cmd); 3746 free(cmd, M_DEVBUF); 3747 3748 return (error); 3749 } 3750 3751 static void 3752 iwm_init(struct iwm_softc *sc) 3753 { 3754 int error; 3755 3756 if (sc->sc_flags & IWM_FLAG_HW_INITED) { 3757 return; 3758 } 3759 sc->sc_generation++; 3760 sc->sc_flags &= ~IWM_FLAG_STOPPED; 3761 3762 if ((error = iwm_init_hw(sc)) != 0) { 3763 iwm_stop(sc); 3764 return; 3765 } 3766 3767 /* 3768 * Ok, firmware loaded and we are jogging 3769 */ 3770 sc->sc_flags |= IWM_FLAG_HW_INITED; 3771 callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc); 3772 } 3773 3774 static int 3775 iwm_transmit(struct ieee80211com *ic, struct mbuf *m) 3776 { 3777 struct iwm_softc *sc; 3778 int error; 3779 3780 sc = ic->ic_softc; 3781 3782 IWM_LOCK(sc); 3783 if ((sc->sc_flags & IWM_FLAG_HW_INITED) == 0) { 3784 IWM_UNLOCK(sc); 3785 return (ENXIO); 3786 } 3787 error = mbufq_enqueue(&sc->sc_snd, m); 3788 if (error) { 3789 IWM_UNLOCK(sc); 3790 return (error); 3791 } 3792 iwm_start(sc); 3793 IWM_UNLOCK(sc); 3794 return (0); 3795 } 3796 3797 /* 3798 * Dequeue packets from sendq and call send. 3799 */ 3800 static void 3801 iwm_start(struct iwm_softc *sc) 3802 { 3803 struct ieee80211_node *ni; 3804 struct mbuf *m; 3805 int ac = 0; 3806 3807 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "->%s\n", __func__); 3808 while (sc->qfullmsk == 0 && 3809 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3810 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3811 if (iwm_tx(sc, m, ni, ac) != 0) { 3812 if_inc_counter(ni->ni_vap->iv_ifp, 3813 IFCOUNTER_OERRORS, 1); 3814 ieee80211_free_node(ni); 3815 continue; 3816 } 3817 sc->sc_tx_timer = 15; 3818 } 3819 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "<-%s\n", __func__); 3820 } 3821 3822 static void 3823 iwm_stop(struct iwm_softc *sc) 3824 { 3825 3826 sc->sc_flags &= ~IWM_FLAG_HW_INITED; 3827 sc->sc_flags |= IWM_FLAG_STOPPED; 3828 sc->sc_generation++; 3829 sc->sc_scanband = 0; 3830 sc->sc_auth_prot = 0; 3831 sc->sc_tx_timer = 0; 3832 iwm_stop_device(sc); 3833 } 3834 3835 static void 3836 iwm_watchdog(void *arg) 3837 { 3838 struct iwm_softc *sc = arg; 3839 3840 if (sc->sc_tx_timer > 0) { 3841 if (--sc->sc_tx_timer == 0) { 3842 device_printf(sc->sc_dev, "device timeout\n"); 3843 #ifdef IWM_DEBUG 3844 iwm_nic_error(sc); 3845 #endif 3846 iwm_stop(sc); 3847 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 3848 return; 3849 } 3850 } 3851 callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc); 3852 } 3853 3854 static void 3855 iwm_parent(struct ieee80211com *ic) 3856 { 3857 struct iwm_softc *sc = ic->ic_softc; 3858 int startall = 0; 3859 3860 IWM_LOCK(sc); 3861 if (ic->ic_nrunning > 0) { 3862 if (!(sc->sc_flags & IWM_FLAG_HW_INITED)) { 3863 iwm_init(sc); 3864 startall = 1; 3865 } 3866 } else if (sc->sc_flags & IWM_FLAG_HW_INITED) 3867 iwm_stop(sc); 3868 IWM_UNLOCK(sc); 3869 if (startall) 3870 ieee80211_start_all(ic); 3871 } 3872 3873 /* 3874 * The interrupt side of things 3875 */ 3876 3877 /* 3878 * error dumping routines are from iwlwifi/mvm/utils.c 3879 */ 3880 3881 /* 3882 * Note: This structure is read from the device with IO accesses, 3883 * and the reading already does the endian conversion. As it is 3884 * read with uint32_t-sized accesses, any members with a different size 3885 * need to be ordered correctly though! 3886 */ 3887 struct iwm_error_event_table { 3888 uint32_t valid; /* (nonzero) valid, (0) log is empty */ 3889 uint32_t error_id; /* type of error */ 3890 uint32_t pc; /* program counter */ 3891 uint32_t blink1; /* branch link */ 3892 uint32_t blink2; /* branch link */ 3893 uint32_t ilink1; /* interrupt link */ 3894 uint32_t ilink2; /* interrupt link */ 3895 uint32_t data1; /* error-specific data */ 3896 uint32_t data2; /* error-specific data */ 3897 uint32_t data3; /* error-specific data */ 3898 uint32_t bcon_time; /* beacon timer */ 3899 uint32_t tsf_low; /* network timestamp function timer */ 3900 uint32_t tsf_hi; /* network timestamp function timer */ 3901 uint32_t gp1; /* GP1 timer register */ 3902 uint32_t gp2; /* GP2 timer register */ 3903 uint32_t gp3; /* GP3 timer register */ 3904 uint32_t ucode_ver; /* uCode version */ 3905 uint32_t hw_ver; /* HW Silicon version */ 3906 uint32_t brd_ver; /* HW board version */ 3907 uint32_t log_pc; /* log program counter */ 3908 uint32_t frame_ptr; /* frame pointer */ 3909 uint32_t stack_ptr; /* stack pointer */ 3910 uint32_t hcmd; /* last host command header */ 3911 uint32_t isr0; /* isr status register LMPM_NIC_ISR0: 3912 * rxtx_flag */ 3913 uint32_t isr1; /* isr status register LMPM_NIC_ISR1: 3914 * host_flag */ 3915 uint32_t isr2; /* isr status register LMPM_NIC_ISR2: 3916 * enc_flag */ 3917 uint32_t isr3; /* isr status register LMPM_NIC_ISR3: 3918 * time_flag */ 3919 uint32_t isr4; /* isr status register LMPM_NIC_ISR4: 3920 * wico interrupt */ 3921 uint32_t isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 3922 uint32_t wait_event; /* wait event() caller address */ 3923 uint32_t l2p_control; /* L2pControlField */ 3924 uint32_t l2p_duration; /* L2pDurationField */ 3925 uint32_t l2p_mhvalid; /* L2pMhValidBits */ 3926 uint32_t l2p_addr_match; /* L2pAddrMatchStat */ 3927 uint32_t lmpm_pmg_sel; /* indicate which clocks are turned on 3928 * (LMPM_PMG_SEL) */ 3929 uint32_t u_timestamp; /* indicate when the date and time of the 3930 * compilation */ 3931 uint32_t flow_handler; /* FH read/write pointers, RX credit */ 3932 } __packed; 3933 3934 #define ERROR_START_OFFSET (1 * sizeof(uint32_t)) 3935 #define ERROR_ELEM_SIZE (7 * sizeof(uint32_t)) 3936 3937 #ifdef IWM_DEBUG 3938 struct { 3939 const char *name; 3940 uint8_t num; 3941 } advanced_lookup[] = { 3942 { "NMI_INTERRUPT_WDG", 0x34 }, 3943 { "SYSASSERT", 0x35 }, 3944 { "UCODE_VERSION_MISMATCH", 0x37 }, 3945 { "BAD_COMMAND", 0x38 }, 3946 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, 3947 { "FATAL_ERROR", 0x3D }, 3948 { "NMI_TRM_HW_ERR", 0x46 }, 3949 { "NMI_INTERRUPT_TRM", 0x4C }, 3950 { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, 3951 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, 3952 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, 3953 { "NMI_INTERRUPT_HOST", 0x66 }, 3954 { "NMI_INTERRUPT_ACTION_PT", 0x7C }, 3955 { "NMI_INTERRUPT_UNKNOWN", 0x84 }, 3956 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, 3957 { "ADVANCED_SYSASSERT", 0 }, 3958 }; 3959 3960 static const char * 3961 iwm_desc_lookup(uint32_t num) 3962 { 3963 int i; 3964 3965 for (i = 0; i < nitems(advanced_lookup) - 1; i++) 3966 if (advanced_lookup[i].num == num) 3967 return advanced_lookup[i].name; 3968 3969 /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */ 3970 return advanced_lookup[i].name; 3971 } 3972 3973 /* 3974 * Support for dumping the error log seemed like a good idea ... 3975 * but it's mostly hex junk and the only sensible thing is the 3976 * hw/ucode revision (which we know anyway). Since it's here, 3977 * I'll just leave it in, just in case e.g. the Intel guys want to 3978 * help us decipher some "ADVANCED_SYSASSERT" later. 3979 */ 3980 static void 3981 iwm_nic_error(struct iwm_softc *sc) 3982 { 3983 struct iwm_error_event_table table; 3984 uint32_t base; 3985 3986 device_printf(sc->sc_dev, "dumping device error log\n"); 3987 base = sc->sc_uc.uc_error_event_table; 3988 if (base < 0x800000 || base >= 0x80C000) { 3989 device_printf(sc->sc_dev, 3990 "Not valid error log pointer 0x%08x\n", base); 3991 return; 3992 } 3993 3994 if (iwm_read_mem(sc, base, &table, sizeof(table)/sizeof(uint32_t)) != 0) { 3995 device_printf(sc->sc_dev, "reading errlog failed\n"); 3996 return; 3997 } 3998 3999 if (!table.valid) { 4000 device_printf(sc->sc_dev, "errlog not found, skipping\n"); 4001 return; 4002 } 4003 4004 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { 4005 device_printf(sc->sc_dev, "Start IWL Error Log Dump:\n"); 4006 device_printf(sc->sc_dev, "Status: 0x%x, count: %d\n", 4007 sc->sc_flags, table.valid); 4008 } 4009 4010 device_printf(sc->sc_dev, "0x%08X | %-28s\n", table.error_id, 4011 iwm_desc_lookup(table.error_id)); 4012 device_printf(sc->sc_dev, "%08X | uPc\n", table.pc); 4013 device_printf(sc->sc_dev, "%08X | branchlink1\n", table.blink1); 4014 device_printf(sc->sc_dev, "%08X | branchlink2\n", table.blink2); 4015 device_printf(sc->sc_dev, "%08X | interruptlink1\n", table.ilink1); 4016 device_printf(sc->sc_dev, "%08X | interruptlink2\n", table.ilink2); 4017 device_printf(sc->sc_dev, "%08X | data1\n", table.data1); 4018 device_printf(sc->sc_dev, "%08X | data2\n", table.data2); 4019 device_printf(sc->sc_dev, "%08X | data3\n", table.data3); 4020 device_printf(sc->sc_dev, "%08X | beacon time\n", table.bcon_time); 4021 device_printf(sc->sc_dev, "%08X | tsf low\n", table.tsf_low); 4022 device_printf(sc->sc_dev, "%08X | tsf hi\n", table.tsf_hi); 4023 device_printf(sc->sc_dev, "%08X | time gp1\n", table.gp1); 4024 device_printf(sc->sc_dev, "%08X | time gp2\n", table.gp2); 4025 device_printf(sc->sc_dev, "%08X | time gp3\n", table.gp3); 4026 device_printf(sc->sc_dev, "%08X | uCode version\n", table.ucode_ver); 4027 device_printf(sc->sc_dev, "%08X | hw version\n", table.hw_ver); 4028 device_printf(sc->sc_dev, "%08X | board version\n", table.brd_ver); 4029 device_printf(sc->sc_dev, "%08X | hcmd\n", table.hcmd); 4030 device_printf(sc->sc_dev, "%08X | isr0\n", table.isr0); 4031 device_printf(sc->sc_dev, "%08X | isr1\n", table.isr1); 4032 device_printf(sc->sc_dev, "%08X | isr2\n", table.isr2); 4033 device_printf(sc->sc_dev, "%08X | isr3\n", table.isr3); 4034 device_printf(sc->sc_dev, "%08X | isr4\n", table.isr4); 4035 device_printf(sc->sc_dev, "%08X | isr_pref\n", table.isr_pref); 4036 device_printf(sc->sc_dev, "%08X | wait_event\n", table.wait_event); 4037 device_printf(sc->sc_dev, "%08X | l2p_control\n", table.l2p_control); 4038 device_printf(sc->sc_dev, "%08X | l2p_duration\n", table.l2p_duration); 4039 device_printf(sc->sc_dev, "%08X | l2p_mhvalid\n", table.l2p_mhvalid); 4040 device_printf(sc->sc_dev, "%08X | l2p_addr_match\n", table.l2p_addr_match); 4041 device_printf(sc->sc_dev, "%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel); 4042 device_printf(sc->sc_dev, "%08X | timestamp\n", table.u_timestamp); 4043 device_printf(sc->sc_dev, "%08X | flow_handler\n", table.flow_handler); 4044 } 4045 #endif 4046 4047 #define SYNC_RESP_STRUCT(_var_, _pkt_) \ 4048 do { \ 4049 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);\ 4050 _var_ = (void *)((_pkt_)+1); \ 4051 } while (/*CONSTCOND*/0) 4052 4053 #define SYNC_RESP_PTR(_ptr_, _len_, _pkt_) \ 4054 do { \ 4055 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);\ 4056 _ptr_ = (void *)((_pkt_)+1); \ 4057 } while (/*CONSTCOND*/0) 4058 4059 #define ADVANCE_RXQ(sc) (sc->rxq.cur = (sc->rxq.cur + 1) % IWM_RX_RING_COUNT); 4060 4061 /* 4062 * Process an IWM_CSR_INT_BIT_FH_RX or IWM_CSR_INT_BIT_SW_RX interrupt. 4063 * Basic structure from if_iwn 4064 */ 4065 static void 4066 iwm_notif_intr(struct iwm_softc *sc) 4067 { 4068 uint16_t hw; 4069 4070 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map, 4071 BUS_DMASYNC_POSTREAD); 4072 4073 hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff; 4074 while (sc->rxq.cur != hw) { 4075 struct iwm_rx_ring *ring = &sc->rxq; 4076 struct iwm_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 4077 struct iwm_rx_packet *pkt; 4078 struct iwm_cmd_response *cresp; 4079 int qid, idx; 4080 4081 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 4082 BUS_DMASYNC_POSTREAD); 4083 pkt = mtod(data->m, struct iwm_rx_packet *); 4084 4085 qid = pkt->hdr.qid & ~0x80; 4086 idx = pkt->hdr.idx; 4087 4088 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4089 "rx packet qid=%d idx=%d flags=%x type=%x %d %d\n", 4090 pkt->hdr.qid & ~0x80, pkt->hdr.idx, pkt->hdr.flags, 4091 pkt->hdr.code, sc->rxq.cur, hw); 4092 4093 /* 4094 * randomly get these from the firmware, no idea why. 4095 * they at least seem harmless, so just ignore them for now 4096 */ 4097 if (__predict_false((pkt->hdr.code == 0 && qid == 0 && idx == 0) 4098 || pkt->len_n_flags == htole32(0x55550000))) { 4099 ADVANCE_RXQ(sc); 4100 continue; 4101 } 4102 4103 switch (pkt->hdr.code) { 4104 case IWM_REPLY_RX_PHY_CMD: 4105 iwm_mvm_rx_rx_phy_cmd(sc, pkt, data); 4106 break; 4107 4108 case IWM_REPLY_RX_MPDU_CMD: 4109 iwm_mvm_rx_rx_mpdu(sc, pkt, data); 4110 break; 4111 4112 case IWM_TX_CMD: 4113 iwm_mvm_rx_tx_cmd(sc, pkt, data); 4114 break; 4115 4116 case IWM_MISSED_BEACONS_NOTIFICATION: { 4117 struct iwm_missed_beacons_notif *resp; 4118 int missed; 4119 4120 /* XXX look at mac_id to determine interface ID */ 4121 struct ieee80211com *ic = &sc->sc_ic; 4122 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4123 4124 SYNC_RESP_STRUCT(resp, pkt); 4125 missed = le32toh(resp->consec_missed_beacons); 4126 4127 IWM_DPRINTF(sc, IWM_DEBUG_BEACON | IWM_DEBUG_STATE, 4128 "%s: MISSED_BEACON: mac_id=%d, " 4129 "consec_since_last_rx=%d, consec=%d, num_expect=%d " 4130 "num_rx=%d\n", 4131 __func__, 4132 le32toh(resp->mac_id), 4133 le32toh(resp->consec_missed_beacons_since_last_rx), 4134 le32toh(resp->consec_missed_beacons), 4135 le32toh(resp->num_expected_beacons), 4136 le32toh(resp->num_recvd_beacons)); 4137 4138 /* Be paranoid */ 4139 if (vap == NULL) 4140 break; 4141 4142 /* XXX no net80211 locking? */ 4143 if (vap->iv_state == IEEE80211_S_RUN && 4144 (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 4145 if (missed > vap->iv_bmissthreshold) { 4146 /* XXX bad locking; turn into task */ 4147 IWM_UNLOCK(sc); 4148 ieee80211_beacon_miss(ic); 4149 IWM_LOCK(sc); 4150 } 4151 } 4152 4153 break; } 4154 4155 case IWM_MVM_ALIVE: { 4156 struct iwm_mvm_alive_resp *resp; 4157 SYNC_RESP_STRUCT(resp, pkt); 4158 4159 sc->sc_uc.uc_error_event_table 4160 = le32toh(resp->error_event_table_ptr); 4161 sc->sc_uc.uc_log_event_table 4162 = le32toh(resp->log_event_table_ptr); 4163 sc->sched_base = le32toh(resp->scd_base_ptr); 4164 sc->sc_uc.uc_ok = resp->status == IWM_ALIVE_STATUS_OK; 4165 4166 sc->sc_uc.uc_intr = 1; 4167 wakeup(&sc->sc_uc); 4168 break; } 4169 4170 case IWM_CALIB_RES_NOTIF_PHY_DB: { 4171 struct iwm_calib_res_notif_phy_db *phy_db_notif; 4172 SYNC_RESP_STRUCT(phy_db_notif, pkt); 4173 4174 iwm_phy_db_set_section(sc, phy_db_notif); 4175 4176 break; } 4177 4178 case IWM_STATISTICS_NOTIFICATION: { 4179 struct iwm_notif_statistics *stats; 4180 SYNC_RESP_STRUCT(stats, pkt); 4181 memcpy(&sc->sc_stats, stats, sizeof(sc->sc_stats)); 4182 sc->sc_noise = iwm_get_noise(&stats->rx.general); 4183 break; } 4184 4185 case IWM_NVM_ACCESS_CMD: 4186 if (sc->sc_wantresp == ((qid << 16) | idx)) { 4187 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 4188 BUS_DMASYNC_POSTREAD); 4189 memcpy(sc->sc_cmd_resp, 4190 pkt, sizeof(sc->sc_cmd_resp)); 4191 } 4192 break; 4193 4194 case IWM_PHY_CONFIGURATION_CMD: 4195 case IWM_TX_ANT_CONFIGURATION_CMD: 4196 case IWM_ADD_STA: 4197 case IWM_MAC_CONTEXT_CMD: 4198 case IWM_REPLY_SF_CFG_CMD: 4199 case IWM_POWER_TABLE_CMD: 4200 case IWM_PHY_CONTEXT_CMD: 4201 case IWM_BINDING_CONTEXT_CMD: 4202 case IWM_TIME_EVENT_CMD: 4203 case IWM_SCAN_REQUEST_CMD: 4204 case IWM_REPLY_BEACON_FILTERING_CMD: 4205 case IWM_MAC_PM_POWER_TABLE: 4206 case IWM_TIME_QUOTA_CMD: 4207 case IWM_REMOVE_STA: 4208 case IWM_TXPATH_FLUSH: 4209 case IWM_LQ_CMD: 4210 SYNC_RESP_STRUCT(cresp, pkt); 4211 if (sc->sc_wantresp == ((qid << 16) | idx)) { 4212 memcpy(sc->sc_cmd_resp, 4213 pkt, sizeof(*pkt)+sizeof(*cresp)); 4214 } 4215 break; 4216 4217 /* ignore */ 4218 case 0x6c: /* IWM_PHY_DB_CMD, no idea why it's not in fw-api.h */ 4219 break; 4220 4221 case IWM_INIT_COMPLETE_NOTIF: 4222 sc->sc_init_complete = 1; 4223 wakeup(&sc->sc_init_complete); 4224 break; 4225 4226 case IWM_SCAN_COMPLETE_NOTIFICATION: { 4227 struct iwm_scan_complete_notif *notif; 4228 SYNC_RESP_STRUCT(notif, pkt); 4229 taskqueue_enqueue(sc->sc_tq, &sc->sc_es_task); 4230 break; } 4231 4232 case IWM_REPLY_ERROR: { 4233 struct iwm_error_resp *resp; 4234 SYNC_RESP_STRUCT(resp, pkt); 4235 4236 device_printf(sc->sc_dev, 4237 "firmware error 0x%x, cmd 0x%x\n", 4238 le32toh(resp->error_type), 4239 resp->cmd_id); 4240 break; } 4241 4242 case IWM_TIME_EVENT_NOTIFICATION: { 4243 struct iwm_time_event_notif *notif; 4244 SYNC_RESP_STRUCT(notif, pkt); 4245 4246 if (notif->status) { 4247 if (le32toh(notif->action) & 4248 IWM_TE_V2_NOTIF_HOST_EVENT_START) 4249 sc->sc_auth_prot = 2; 4250 else 4251 sc->sc_auth_prot = 0; 4252 } else { 4253 sc->sc_auth_prot = -1; 4254 } 4255 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4256 "%s: time event notification auth_prot=%d\n", 4257 __func__, sc->sc_auth_prot); 4258 4259 wakeup(&sc->sc_auth_prot); 4260 break; } 4261 4262 case IWM_MCAST_FILTER_CMD: 4263 break; 4264 4265 default: 4266 device_printf(sc->sc_dev, 4267 "frame %d/%d %x UNHANDLED (this should " 4268 "not happen)\n", qid, idx, 4269 pkt->len_n_flags); 4270 break; 4271 } 4272 4273 /* 4274 * Why test bit 0x80? The Linux driver: 4275 * 4276 * There is one exception: uCode sets bit 15 when it 4277 * originates the response/notification, i.e. when the 4278 * response/notification is not a direct response to a 4279 * command sent by the driver. For example, uCode issues 4280 * IWM_REPLY_RX when it sends a received frame to the driver; 4281 * it is not a direct response to any driver command. 4282 * 4283 * Ok, so since when is 7 == 15? Well, the Linux driver 4284 * uses a slightly different format for pkt->hdr, and "qid" 4285 * is actually the upper byte of a two-byte field. 4286 */ 4287 if (!(pkt->hdr.qid & (1 << 7))) { 4288 iwm_cmd_done(sc, pkt); 4289 } 4290 4291 ADVANCE_RXQ(sc); 4292 } 4293 4294 IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL, 4295 IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 4296 4297 /* 4298 * Tell the firmware what we have processed. 4299 * Seems like the hardware gets upset unless we align 4300 * the write by 8?? 4301 */ 4302 hw = (hw == 0) ? IWM_RX_RING_COUNT - 1 : hw - 1; 4303 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, hw & ~7); 4304 } 4305 4306 static void 4307 iwm_intr(void *arg) 4308 { 4309 struct iwm_softc *sc = arg; 4310 int handled = 0; 4311 int r1, r2, rv = 0; 4312 int isperiodic = 0; 4313 4314 IWM_LOCK(sc); 4315 IWM_WRITE(sc, IWM_CSR_INT_MASK, 0); 4316 4317 if (sc->sc_flags & IWM_FLAG_USE_ICT) { 4318 uint32_t *ict = sc->ict_dma.vaddr; 4319 int tmp; 4320 4321 tmp = htole32(ict[sc->ict_cur]); 4322 if (!tmp) 4323 goto out_ena; 4324 4325 /* 4326 * ok, there was something. keep plowing until we have all. 4327 */ 4328 r1 = r2 = 0; 4329 while (tmp) { 4330 r1 |= tmp; 4331 ict[sc->ict_cur] = 0; 4332 sc->ict_cur = (sc->ict_cur+1) % IWM_ICT_COUNT; 4333 tmp = htole32(ict[sc->ict_cur]); 4334 } 4335 4336 /* this is where the fun begins. don't ask */ 4337 if (r1 == 0xffffffff) 4338 r1 = 0; 4339 4340 /* i am not expected to understand this */ 4341 if (r1 & 0xc0000) 4342 r1 |= 0x8000; 4343 r1 = (0xff & r1) | ((0xff00 & r1) << 16); 4344 } else { 4345 r1 = IWM_READ(sc, IWM_CSR_INT); 4346 /* "hardware gone" (where, fishing?) */ 4347 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) 4348 goto out; 4349 r2 = IWM_READ(sc, IWM_CSR_FH_INT_STATUS); 4350 } 4351 if (r1 == 0 && r2 == 0) { 4352 goto out_ena; 4353 } 4354 4355 IWM_WRITE(sc, IWM_CSR_INT, r1 | ~sc->sc_intmask); 4356 4357 /* ignored */ 4358 handled |= (r1 & (IWM_CSR_INT_BIT_ALIVE /*| IWM_CSR_INT_BIT_SCD*/)); 4359 4360 if (r1 & IWM_CSR_INT_BIT_SW_ERR) { 4361 int i; 4362 struct ieee80211com *ic = &sc->sc_ic; 4363 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4364 4365 #ifdef IWM_DEBUG 4366 iwm_nic_error(sc); 4367 #endif 4368 /* Dump driver status (TX and RX rings) while we're here. */ 4369 device_printf(sc->sc_dev, "driver status:\n"); 4370 for (i = 0; i < IWM_MVM_MAX_QUEUES; i++) { 4371 struct iwm_tx_ring *ring = &sc->txq[i]; 4372 device_printf(sc->sc_dev, 4373 " tx ring %2d: qid=%-2d cur=%-3d " 4374 "queued=%-3d\n", 4375 i, ring->qid, ring->cur, ring->queued); 4376 } 4377 device_printf(sc->sc_dev, 4378 " rx ring: cur=%d\n", sc->rxq.cur); 4379 device_printf(sc->sc_dev, 4380 " 802.11 state %d\n", (vap == NULL) ? -1 : vap->iv_state); 4381 4382 /* Don't stop the device; just do a VAP restart */ 4383 IWM_UNLOCK(sc); 4384 4385 if (vap == NULL) { 4386 printf("%s: null vap\n", __func__); 4387 return; 4388 } 4389 4390 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; " 4391 "restarting\n", __func__, vap->iv_state); 4392 4393 /* XXX TODO: turn this into a callout/taskqueue */ 4394 ieee80211_restart_all(ic); 4395 return; 4396 } 4397 4398 if (r1 & IWM_CSR_INT_BIT_HW_ERR) { 4399 handled |= IWM_CSR_INT_BIT_HW_ERR; 4400 device_printf(sc->sc_dev, "hardware error, stopping device\n"); 4401 iwm_stop(sc); 4402 rv = 1; 4403 goto out; 4404 } 4405 4406 /* firmware chunk loaded */ 4407 if (r1 & IWM_CSR_INT_BIT_FH_TX) { 4408 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_TX_MASK); 4409 handled |= IWM_CSR_INT_BIT_FH_TX; 4410 sc->sc_fw_chunk_done = 1; 4411 wakeup(&sc->sc_fw); 4412 } 4413 4414 if (r1 & IWM_CSR_INT_BIT_RF_KILL) { 4415 handled |= IWM_CSR_INT_BIT_RF_KILL; 4416 if (iwm_check_rfkill(sc)) { 4417 device_printf(sc->sc_dev, 4418 "%s: rfkill switch, disabling interface\n", 4419 __func__); 4420 iwm_stop(sc); 4421 } 4422 } 4423 4424 /* 4425 * The Linux driver uses periodic interrupts to avoid races. 4426 * We cargo-cult like it's going out of fashion. 4427 */ 4428 if (r1 & IWM_CSR_INT_BIT_RX_PERIODIC) { 4429 handled |= IWM_CSR_INT_BIT_RX_PERIODIC; 4430 IWM_WRITE(sc, IWM_CSR_INT, IWM_CSR_INT_BIT_RX_PERIODIC); 4431 if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) == 0) 4432 IWM_WRITE_1(sc, 4433 IWM_CSR_INT_PERIODIC_REG, IWM_CSR_INT_PERIODIC_DIS); 4434 isperiodic = 1; 4435 } 4436 4437 if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) || isperiodic) { 4438 handled |= (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX); 4439 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_RX_MASK); 4440 4441 iwm_notif_intr(sc); 4442 4443 /* enable periodic interrupt, see above */ 4444 if (r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX) && !isperiodic) 4445 IWM_WRITE_1(sc, IWM_CSR_INT_PERIODIC_REG, 4446 IWM_CSR_INT_PERIODIC_ENA); 4447 } 4448 4449 if (__predict_false(r1 & ~handled)) 4450 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4451 "%s: unhandled interrupts: %x\n", __func__, r1); 4452 rv = 1; 4453 4454 out_ena: 4455 iwm_restore_interrupts(sc); 4456 out: 4457 IWM_UNLOCK(sc); 4458 return; 4459 } 4460 4461 /* 4462 * Autoconf glue-sniffing 4463 */ 4464 #define PCI_VENDOR_INTEL 0x8086 4465 #define PCI_PRODUCT_INTEL_WL_3160_1 0x08b3 4466 #define PCI_PRODUCT_INTEL_WL_3160_2 0x08b4 4467 #define PCI_PRODUCT_INTEL_WL_7260_1 0x08b1 4468 #define PCI_PRODUCT_INTEL_WL_7260_2 0x08b2 4469 #define PCI_PRODUCT_INTEL_WL_7265_1 0x095a 4470 #define PCI_PRODUCT_INTEL_WL_7265_2 0x095b 4471 4472 static const struct iwm_devices { 4473 uint16_t device; 4474 const char *name; 4475 } iwm_devices[] = { 4476 { PCI_PRODUCT_INTEL_WL_3160_1, "Intel Dual Band Wireless AC 3160" }, 4477 { PCI_PRODUCT_INTEL_WL_3160_2, "Intel Dual Band Wireless AC 3160" }, 4478 { PCI_PRODUCT_INTEL_WL_7260_1, "Intel Dual Band Wireless AC 7260" }, 4479 { PCI_PRODUCT_INTEL_WL_7260_2, "Intel Dual Band Wireless AC 7260" }, 4480 { PCI_PRODUCT_INTEL_WL_7265_1, "Intel Dual Band Wireless AC 7265" }, 4481 { PCI_PRODUCT_INTEL_WL_7265_2, "Intel Dual Band Wireless AC 7265" }, 4482 }; 4483 4484 static int 4485 iwm_probe(device_t dev) 4486 { 4487 int i; 4488 4489 for (i = 0; i < nitems(iwm_devices); i++) 4490 if (pci_get_vendor(dev) == PCI_VENDOR_INTEL && 4491 pci_get_device(dev) == iwm_devices[i].device) { 4492 device_set_desc(dev, iwm_devices[i].name); 4493 return (BUS_PROBE_DEFAULT); 4494 } 4495 4496 return (ENXIO); 4497 } 4498 4499 static int 4500 iwm_dev_check(device_t dev) 4501 { 4502 struct iwm_softc *sc; 4503 4504 sc = device_get_softc(dev); 4505 4506 switch (pci_get_device(dev)) { 4507 case PCI_PRODUCT_INTEL_WL_3160_1: 4508 case PCI_PRODUCT_INTEL_WL_3160_2: 4509 sc->sc_fwname = "iwm3160fw"; 4510 sc->host_interrupt_operation_mode = 1; 4511 return (0); 4512 case PCI_PRODUCT_INTEL_WL_7260_1: 4513 case PCI_PRODUCT_INTEL_WL_7260_2: 4514 sc->sc_fwname = "iwm7260fw"; 4515 sc->host_interrupt_operation_mode = 1; 4516 return (0); 4517 case PCI_PRODUCT_INTEL_WL_7265_1: 4518 case PCI_PRODUCT_INTEL_WL_7265_2: 4519 sc->sc_fwname = "iwm7265fw"; 4520 sc->host_interrupt_operation_mode = 0; 4521 return (0); 4522 default: 4523 device_printf(dev, "unknown adapter type\n"); 4524 return ENXIO; 4525 } 4526 } 4527 4528 static int 4529 iwm_pci_attach(device_t dev) 4530 { 4531 struct iwm_softc *sc; 4532 int count, error, rid; 4533 uint16_t reg; 4534 4535 sc = device_get_softc(dev); 4536 4537 /* Clear device-specific "PCI retry timeout" register (41h). */ 4538 reg = pci_read_config(dev, 0x40, sizeof(reg)); 4539 pci_write_config(dev, 0x40, reg & ~0xff00, sizeof(reg)); 4540 4541 /* Enable bus-mastering and hardware bug workaround. */ 4542 pci_enable_busmaster(dev); 4543 reg = pci_read_config(dev, PCIR_STATUS, sizeof(reg)); 4544 /* if !MSI */ 4545 if (reg & PCIM_STATUS_INTxSTATE) { 4546 reg &= ~PCIM_STATUS_INTxSTATE; 4547 } 4548 pci_write_config(dev, PCIR_STATUS, reg, sizeof(reg)); 4549 4550 rid = PCIR_BAR(0); 4551 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 4552 RF_ACTIVE); 4553 if (sc->sc_mem == NULL) { 4554 device_printf(sc->sc_dev, "can't map mem space\n"); 4555 return (ENXIO); 4556 } 4557 sc->sc_st = rman_get_bustag(sc->sc_mem); 4558 sc->sc_sh = rman_get_bushandle(sc->sc_mem); 4559 4560 /* Install interrupt handler. */ 4561 count = 1; 4562 rid = 0; 4563 if (pci_alloc_msi(dev, &count) == 0) 4564 rid = 1; 4565 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | 4566 (rid != 0 ? 0 : RF_SHAREABLE)); 4567 if (sc->sc_irq == NULL) { 4568 device_printf(dev, "can't map interrupt\n"); 4569 return (ENXIO); 4570 } 4571 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, 4572 NULL, iwm_intr, sc, &sc->sc_ih); 4573 if (sc->sc_ih == NULL) { 4574 device_printf(dev, "can't establish interrupt"); 4575 return (ENXIO); 4576 } 4577 sc->sc_dmat = bus_get_dma_tag(sc->sc_dev); 4578 4579 return (0); 4580 } 4581 4582 static void 4583 iwm_pci_detach(device_t dev) 4584 { 4585 struct iwm_softc *sc = device_get_softc(dev); 4586 4587 if (sc->sc_irq != NULL) { 4588 bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih); 4589 bus_release_resource(dev, SYS_RES_IRQ, 4590 rman_get_rid(sc->sc_irq), sc->sc_irq); 4591 pci_release_msi(dev); 4592 } 4593 if (sc->sc_mem != NULL) 4594 bus_release_resource(dev, SYS_RES_MEMORY, 4595 rman_get_rid(sc->sc_mem), sc->sc_mem); 4596 } 4597 4598 4599 4600 static int 4601 iwm_attach(device_t dev) 4602 { 4603 struct iwm_softc *sc = device_get_softc(dev); 4604 struct ieee80211com *ic = &sc->sc_ic; 4605 int error; 4606 int txq_i, i; 4607 4608 sc->sc_dev = dev; 4609 IWM_LOCK_INIT(sc); 4610 mbufq_init(&sc->sc_snd, ifqmaxlen); 4611 callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0); 4612 TASK_INIT(&sc->sc_es_task, 0, iwm_endscan_cb, sc); 4613 sc->sc_tq = taskqueue_create("iwm_taskq", M_WAITOK, 4614 taskqueue_thread_enqueue, &sc->sc_tq); 4615 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwm_taskq"); 4616 if (error != 0) { 4617 device_printf(dev, "can't start threads, error %d\n", 4618 error); 4619 goto fail; 4620 } 4621 4622 /* PCI attach */ 4623 error = iwm_pci_attach(dev); 4624 if (error != 0) 4625 goto fail; 4626 4627 sc->sc_wantresp = -1; 4628 4629 /* Check device type */ 4630 error = iwm_dev_check(dev); 4631 if (error != 0) 4632 goto fail; 4633 4634 sc->sc_fwdmasegsz = IWM_FWDMASEGSZ; 4635 4636 /* 4637 * We now start fiddling with the hardware 4638 */ 4639 sc->sc_hw_rev = IWM_READ(sc, IWM_CSR_HW_REV); 4640 if (iwm_prepare_card_hw(sc) != 0) { 4641 device_printf(dev, "could not initialize hardware\n"); 4642 goto fail; 4643 } 4644 4645 /* Allocate DMA memory for firmware transfers. */ 4646 if ((error = iwm_alloc_fwmem(sc)) != 0) { 4647 device_printf(dev, "could not allocate memory for firmware\n"); 4648 goto fail; 4649 } 4650 4651 /* Allocate "Keep Warm" page. */ 4652 if ((error = iwm_alloc_kw(sc)) != 0) { 4653 device_printf(dev, "could not allocate keep warm page\n"); 4654 goto fail; 4655 } 4656 4657 /* We use ICT interrupts */ 4658 if ((error = iwm_alloc_ict(sc)) != 0) { 4659 device_printf(dev, "could not allocate ICT table\n"); 4660 goto fail; 4661 } 4662 4663 /* Allocate TX scheduler "rings". */ 4664 if ((error = iwm_alloc_sched(sc)) != 0) { 4665 device_printf(dev, "could not allocate TX scheduler rings\n"); 4666 goto fail; 4667 } 4668 4669 /* Allocate TX rings */ 4670 for (txq_i = 0; txq_i < nitems(sc->txq); txq_i++) { 4671 if ((error = iwm_alloc_tx_ring(sc, 4672 &sc->txq[txq_i], txq_i)) != 0) { 4673 device_printf(dev, 4674 "could not allocate TX ring %d\n", 4675 txq_i); 4676 goto fail; 4677 } 4678 } 4679 4680 /* Allocate RX ring. */ 4681 if ((error = iwm_alloc_rx_ring(sc, &sc->rxq)) != 0) { 4682 device_printf(dev, "could not allocate RX ring\n"); 4683 goto fail; 4684 } 4685 4686 /* Clear pending interrupts. */ 4687 IWM_WRITE(sc, IWM_CSR_INT, 0xffffffff); 4688 4689 ic->ic_softc = sc; 4690 ic->ic_name = device_get_nameunit(sc->sc_dev); 4691 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 4692 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 4693 4694 /* Set device capabilities. */ 4695 ic->ic_caps = 4696 IEEE80211_C_STA | 4697 IEEE80211_C_WPA | /* WPA/RSN */ 4698 IEEE80211_C_WME | 4699 IEEE80211_C_SHSLOT | /* short slot time supported */ 4700 IEEE80211_C_SHPREAMBLE /* short preamble supported */ 4701 // IEEE80211_C_BGSCAN /* capable of bg scanning */ 4702 ; 4703 for (i = 0; i < nitems(sc->sc_phyctxt); i++) { 4704 sc->sc_phyctxt[i].id = i; 4705 sc->sc_phyctxt[i].color = 0; 4706 sc->sc_phyctxt[i].ref = 0; 4707 sc->sc_phyctxt[i].channel = NULL; 4708 } 4709 4710 /* Max RSSI */ 4711 sc->sc_max_rssi = IWM_MAX_DBM - IWM_MIN_DBM; 4712 sc->sc_preinit_hook.ich_func = iwm_preinit; 4713 sc->sc_preinit_hook.ich_arg = sc; 4714 if (config_intrhook_establish(&sc->sc_preinit_hook) != 0) { 4715 device_printf(dev, "config_intrhook_establish failed\n"); 4716 goto fail; 4717 } 4718 4719 #ifdef IWM_DEBUG 4720 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 4721 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "debug", 4722 CTLFLAG_RW, &sc->sc_debug, 0, "control debugging"); 4723 #endif 4724 4725 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4726 "<-%s\n", __func__); 4727 4728 return 0; 4729 4730 /* Free allocated memory if something failed during attachment. */ 4731 fail: 4732 iwm_detach_local(sc, 0); 4733 4734 return ENXIO; 4735 } 4736 4737 static int 4738 iwm_update_edca(struct ieee80211com *ic) 4739 { 4740 struct iwm_softc *sc = ic->ic_softc; 4741 4742 device_printf(sc->sc_dev, "%s: called\n", __func__); 4743 return (0); 4744 } 4745 4746 static void 4747 iwm_preinit(void *arg) 4748 { 4749 struct iwm_softc *sc = arg; 4750 device_t dev = sc->sc_dev; 4751 struct ieee80211com *ic = &sc->sc_ic; 4752 int error; 4753 4754 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4755 "->%s\n", __func__); 4756 4757 IWM_LOCK(sc); 4758 if ((error = iwm_start_hw(sc)) != 0) { 4759 device_printf(dev, "could not initialize hardware\n"); 4760 IWM_UNLOCK(sc); 4761 goto fail; 4762 } 4763 4764 error = iwm_run_init_mvm_ucode(sc, 1); 4765 iwm_stop_device(sc); 4766 if (error) { 4767 IWM_UNLOCK(sc); 4768 goto fail; 4769 } 4770 device_printf(dev, 4771 "revision: 0x%x, firmware %d.%d (API ver. %d)\n", 4772 sc->sc_hw_rev & IWM_CSR_HW_REV_TYPE_MSK, 4773 IWM_UCODE_MAJOR(sc->sc_fwver), 4774 IWM_UCODE_MINOR(sc->sc_fwver), 4775 IWM_UCODE_API(sc->sc_fwver)); 4776 4777 /* not all hardware can do 5GHz band */ 4778 if (!sc->sc_nvm.sku_cap_band_52GHz_enable) 4779 memset(&ic->ic_sup_rates[IEEE80211_MODE_11A], 0, 4780 sizeof(ic->ic_sup_rates[IEEE80211_MODE_11A])); 4781 IWM_UNLOCK(sc); 4782 4783 iwm_init_channel_map(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 4784 ic->ic_channels); 4785 4786 /* 4787 * At this point we've committed - if we fail to do setup, 4788 * we now also have to tear down the net80211 state. 4789 */ 4790 ieee80211_ifattach(ic); 4791 ic->ic_vap_create = iwm_vap_create; 4792 ic->ic_vap_delete = iwm_vap_delete; 4793 ic->ic_raw_xmit = iwm_raw_xmit; 4794 ic->ic_node_alloc = iwm_node_alloc; 4795 ic->ic_scan_start = iwm_scan_start; 4796 ic->ic_scan_end = iwm_scan_end; 4797 ic->ic_update_mcast = iwm_update_mcast; 4798 ic->ic_getradiocaps = iwm_init_channel_map; 4799 ic->ic_set_channel = iwm_set_channel; 4800 ic->ic_scan_curchan = iwm_scan_curchan; 4801 ic->ic_scan_mindwell = iwm_scan_mindwell; 4802 ic->ic_wme.wme_update = iwm_update_edca; 4803 ic->ic_parent = iwm_parent; 4804 ic->ic_transmit = iwm_transmit; 4805 iwm_radiotap_attach(sc); 4806 if (bootverbose) 4807 ieee80211_announce(ic); 4808 4809 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4810 "<-%s\n", __func__); 4811 config_intrhook_disestablish(&sc->sc_preinit_hook); 4812 4813 return; 4814 fail: 4815 config_intrhook_disestablish(&sc->sc_preinit_hook); 4816 iwm_detach_local(sc, 0); 4817 } 4818 4819 /* 4820 * Attach the interface to 802.11 radiotap. 4821 */ 4822 static void 4823 iwm_radiotap_attach(struct iwm_softc *sc) 4824 { 4825 struct ieee80211com *ic = &sc->sc_ic; 4826 4827 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4828 "->%s begin\n", __func__); 4829 ieee80211_radiotap_attach(ic, 4830 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 4831 IWM_TX_RADIOTAP_PRESENT, 4832 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 4833 IWM_RX_RADIOTAP_PRESENT); 4834 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 4835 "->%s end\n", __func__); 4836 } 4837 4838 static struct ieee80211vap * 4839 iwm_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 4840 enum ieee80211_opmode opmode, int flags, 4841 const uint8_t bssid[IEEE80211_ADDR_LEN], 4842 const uint8_t mac[IEEE80211_ADDR_LEN]) 4843 { 4844 struct iwm_vap *ivp; 4845 struct ieee80211vap *vap; 4846 4847 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 4848 return NULL; 4849 ivp = malloc(sizeof(struct iwm_vap), M_80211_VAP, M_WAITOK | M_ZERO); 4850 vap = &ivp->iv_vap; 4851 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 4852 vap->iv_bmissthreshold = 10; /* override default */ 4853 /* Override with driver methods. */ 4854 ivp->iv_newstate = vap->iv_newstate; 4855 vap->iv_newstate = iwm_newstate; 4856 4857 ieee80211_ratectl_init(vap); 4858 /* Complete setup. */ 4859 ieee80211_vap_attach(vap, iwm_media_change, ieee80211_media_status, 4860 mac); 4861 ic->ic_opmode = opmode; 4862 4863 return vap; 4864 } 4865 4866 static void 4867 iwm_vap_delete(struct ieee80211vap *vap) 4868 { 4869 struct iwm_vap *ivp = IWM_VAP(vap); 4870 4871 ieee80211_ratectl_deinit(vap); 4872 ieee80211_vap_detach(vap); 4873 free(ivp, M_80211_VAP); 4874 } 4875 4876 static void 4877 iwm_scan_start(struct ieee80211com *ic) 4878 { 4879 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4880 struct iwm_softc *sc = ic->ic_softc; 4881 int error; 4882 4883 if (sc->sc_scanband) 4884 return; 4885 IWM_LOCK(sc); 4886 error = iwm_mvm_scan_request(sc, IEEE80211_CHAN_2GHZ, 0, NULL, 0); 4887 if (error) { 4888 device_printf(sc->sc_dev, "could not initiate scan\n"); 4889 IWM_UNLOCK(sc); 4890 ieee80211_cancel_scan(vap); 4891 } else 4892 IWM_UNLOCK(sc); 4893 } 4894 4895 static void 4896 iwm_scan_end(struct ieee80211com *ic) 4897 { 4898 } 4899 4900 static void 4901 iwm_update_mcast(struct ieee80211com *ic) 4902 { 4903 } 4904 4905 static void 4906 iwm_set_channel(struct ieee80211com *ic) 4907 { 4908 } 4909 4910 static void 4911 iwm_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell) 4912 { 4913 } 4914 4915 static void 4916 iwm_scan_mindwell(struct ieee80211_scan_state *ss) 4917 { 4918 return; 4919 } 4920 4921 void 4922 iwm_init_task(void *arg1) 4923 { 4924 struct iwm_softc *sc = arg1; 4925 4926 IWM_LOCK(sc); 4927 while (sc->sc_flags & IWM_FLAG_BUSY) 4928 msleep(&sc->sc_flags, &sc->sc_mtx, 0, "iwmpwr", 0); 4929 sc->sc_flags |= IWM_FLAG_BUSY; 4930 iwm_stop(sc); 4931 if (sc->sc_ic.ic_nrunning > 0) 4932 iwm_init(sc); 4933 sc->sc_flags &= ~IWM_FLAG_BUSY; 4934 wakeup(&sc->sc_flags); 4935 IWM_UNLOCK(sc); 4936 } 4937 4938 static int 4939 iwm_resume(device_t dev) 4940 { 4941 struct iwm_softc *sc = device_get_softc(dev); 4942 int do_reinit = 0; 4943 uint16_t reg; 4944 4945 /* Clear device-specific "PCI retry timeout" register (41h). */ 4946 reg = pci_read_config(dev, 0x40, sizeof(reg)); 4947 pci_write_config(dev, 0x40, reg & ~0xff00, sizeof(reg)); 4948 iwm_init_task(device_get_softc(dev)); 4949 4950 IWM_LOCK(sc); 4951 if (sc->sc_flags & IWM_FLAG_DORESUME) { 4952 sc->sc_flags &= ~IWM_FLAG_DORESUME; 4953 do_reinit = 1; 4954 } 4955 IWM_UNLOCK(sc); 4956 4957 if (do_reinit) 4958 ieee80211_resume_all(&sc->sc_ic); 4959 4960 return 0; 4961 } 4962 4963 static int 4964 iwm_suspend(device_t dev) 4965 { 4966 int do_stop = 0; 4967 struct iwm_softc *sc = device_get_softc(dev); 4968 4969 do_stop = !! (sc->sc_ic.ic_nrunning > 0); 4970 4971 ieee80211_suspend_all(&sc->sc_ic); 4972 4973 if (do_stop) { 4974 IWM_LOCK(sc); 4975 iwm_stop(sc); 4976 sc->sc_flags |= IWM_FLAG_DORESUME; 4977 IWM_UNLOCK(sc); 4978 } 4979 4980 return (0); 4981 } 4982 4983 static int 4984 iwm_detach_local(struct iwm_softc *sc, int do_net80211) 4985 { 4986 struct iwm_fw_info *fw = &sc->sc_fw; 4987 device_t dev = sc->sc_dev; 4988 int i; 4989 4990 if (sc->sc_tq) { 4991 taskqueue_drain_all(sc->sc_tq); 4992 taskqueue_free(sc->sc_tq); 4993 } 4994 callout_drain(&sc->sc_watchdog_to); 4995 iwm_stop_device(sc); 4996 if (do_net80211) 4997 ieee80211_ifdetach(&sc->sc_ic); 4998 4999 /* Free descriptor rings */ 5000 for (i = 0; i < nitems(sc->txq); i++) 5001 iwm_free_tx_ring(sc, &sc->txq[i]); 5002 5003 /* Free firmware */ 5004 if (fw->fw_fp != NULL) 5005 iwm_fw_info_free(fw); 5006 5007 /* Free scheduler */ 5008 iwm_free_sched(sc); 5009 if (sc->ict_dma.vaddr != NULL) 5010 iwm_free_ict(sc); 5011 if (sc->kw_dma.vaddr != NULL) 5012 iwm_free_kw(sc); 5013 if (sc->fw_dma.vaddr != NULL) 5014 iwm_free_fwmem(sc); 5015 5016 /* Finished with the hardware - detach things */ 5017 iwm_pci_detach(dev); 5018 5019 mbufq_drain(&sc->sc_snd); 5020 IWM_LOCK_DESTROY(sc); 5021 5022 return (0); 5023 } 5024 5025 static int 5026 iwm_detach(device_t dev) 5027 { 5028 struct iwm_softc *sc = device_get_softc(dev); 5029 5030 return (iwm_detach_local(sc, 1)); 5031 } 5032 5033 static device_method_t iwm_pci_methods[] = { 5034 /* Device interface */ 5035 DEVMETHOD(device_probe, iwm_probe), 5036 DEVMETHOD(device_attach, iwm_attach), 5037 DEVMETHOD(device_detach, iwm_detach), 5038 DEVMETHOD(device_suspend, iwm_suspend), 5039 DEVMETHOD(device_resume, iwm_resume), 5040 5041 DEVMETHOD_END 5042 }; 5043 5044 static driver_t iwm_pci_driver = { 5045 "iwm", 5046 iwm_pci_methods, 5047 sizeof (struct iwm_softc) 5048 }; 5049 5050 static devclass_t iwm_devclass; 5051 5052 DRIVER_MODULE(iwm, pci, iwm_pci_driver, iwm_devclass, NULL, NULL); 5053 MODULE_DEPEND(iwm, firmware, 1, 1, 1); 5054 MODULE_DEPEND(iwm, pci, 1, 1, 1); 5055 MODULE_DEPEND(iwm, wlan, 1, 1, 1); 5056