1 /* $FreeBSD$ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #define IWI_CMD_RING_COUNT 16 31 #define IWI_TX_RING_COUNT 64 32 #define IWI_RX_RING_COUNT 32 33 34 #define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc)) 35 #define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc)) 36 37 #define IWI_CSR_INTR 0x0008 38 #define IWI_CSR_INTR_MASK 0x000c 39 #define IWI_CSR_INDIRECT_ADDR 0x0010 40 #define IWI_CSR_INDIRECT_DATA 0x0014 41 #define IWI_CSR_AUTOINC_ADDR 0x0018 42 #define IWI_CSR_AUTOINC_DATA 0x001c 43 #define IWI_CSR_RST 0x0020 44 #define IWI_CSR_CTL 0x0024 45 #define IWI_CSR_IO 0x0030 46 #define IWI_CSR_CMD_BASE 0x0200 47 #define IWI_CSR_CMD_SIZE 0x0204 48 #define IWI_CSR_TX1_BASE 0x0208 49 #define IWI_CSR_TX1_SIZE 0x020c 50 #define IWI_CSR_TX2_BASE 0x0210 51 #define IWI_CSR_TX2_SIZE 0x0214 52 #define IWI_CSR_TX3_BASE 0x0218 53 #define IWI_CSR_TX3_SIZE 0x021c 54 #define IWI_CSR_TX4_BASE 0x0220 55 #define IWI_CSR_TX4_SIZE 0x0224 56 #define IWI_CSR_CMD_RIDX 0x0280 57 #define IWI_CSR_TX1_RIDX 0x0284 58 #define IWI_CSR_TX2_RIDX 0x0288 59 #define IWI_CSR_TX3_RIDX 0x028c 60 #define IWI_CSR_TX4_RIDX 0x0290 61 #define IWI_CSR_RX_RIDX 0x02a0 62 #define IWI_CSR_RX_BASE 0x0500 63 #define IWI_CSR_TABLE0_SIZE 0x0700 64 #define IWI_CSR_TABLE0_BASE 0x0704 65 #define IWI_CSR_NODE_BASE 0x0c0c 66 #define IWI_CSR_CMD_WIDX 0x0f80 67 #define IWI_CSR_TX1_WIDX 0x0f84 68 #define IWI_CSR_TX2_WIDX 0x0f88 69 #define IWI_CSR_TX3_WIDX 0x0f8c 70 #define IWI_CSR_TX4_WIDX 0x0f90 71 #define IWI_CSR_RX_WIDX 0x0fa0 72 #define IWI_CSR_READ_INT 0x0ff4 73 74 /* aliases */ 75 #define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE 76 77 /* flags for IWI_CSR_INTR */ 78 #define IWI_INTR_RX_DONE 0x00000002 79 #define IWI_INTR_CMD_DONE 0x00000800 80 #define IWI_INTR_TX1_DONE 0x00001000 81 #define IWI_INTR_TX2_DONE 0x00002000 82 #define IWI_INTR_TX3_DONE 0x00004000 83 #define IWI_INTR_TX4_DONE 0x00008000 84 #define IWI_INTR_FW_INITED 0x01000000 85 #define IWI_INTR_RADIO_OFF 0x04000000 86 #define IWI_INTR_FATAL_ERROR 0x40000000 87 #define IWI_INTR_PARITY_ERROR 0x80000000 88 89 #define IWI_INTR_MASK \ 90 (IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | IWI_INTR_TX1_DONE | \ 91 IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \ 92 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \ 93 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR) 94 95 /* flags for IWI_CSR_RST */ 96 #define IWI_RST_PRINCETON_RESET 0x00000001 97 #define IWI_RST_STANDBY 0x00000004 98 #define IWI_RST_LED_ACTIVITY 0x00000010 /* tx/rx traffic led */ 99 #define IWI_RST_LED_ASSOCIATED 0x00000020 /* station associated led */ 100 #define IWI_RST_LED_OFDM 0x00000040 /* ofdm/cck led */ 101 #define IWI_RST_SOFT_RESET 0x00000080 102 #define IWI_RST_MASTER_DISABLED 0x00000100 103 #define IWI_RST_STOP_MASTER 0x00000200 104 #define IWI_RST_GATE_ODMA 0x02000000 105 #define IWI_RST_GATE_IDMA 0x04000000 106 #define IWI_RST_GATE_ADMA 0x20000000 107 108 /* flags for IWI_CSR_CTL */ 109 #define IWI_CTL_CLOCK_READY 0x00000001 110 #define IWI_CTL_ALLOW_STANDBY 0x00000002 111 #define IWI_CTL_INIT 0x00000004 112 113 /* flags for IWI_CSR_IO */ 114 #define IWI_IO_RADIO_ENABLED 0x00010000 115 116 /* flags for IWI_CSR_READ_INT */ 117 #define IWI_READ_INT_INIT_HOST 0x20000000 118 119 /* constants for command blocks */ 120 #define IWI_CB_DEFAULT_CTL 0x8cea0000 121 #define IWI_CB_MAXDATALEN 8191 122 123 /* supported rates */ 124 #define IWI_RATE_DS1 10 125 #define IWI_RATE_DS2 20 126 #define IWI_RATE_DS5 55 127 #define IWI_RATE_DS11 110 128 #define IWI_RATE_OFDM6 13 129 #define IWI_RATE_OFDM9 15 130 #define IWI_RATE_OFDM12 5 131 #define IWI_RATE_OFDM18 7 132 #define IWI_RATE_OFDM24 9 133 #define IWI_RATE_OFDM36 11 134 #define IWI_RATE_OFDM48 1 135 #define IWI_RATE_OFDM54 3 136 137 /* firmware binary image header, fields in little endian */ 138 struct iwi_firmware_ohdr { 139 uint32_t version; 140 uint32_t mode; 141 }; 142 #define IWI_FW_REQ_MAJOR 2 143 #define IWI_FW_REQ_MINOR 4 144 #define IWI_FW_GET_MAJOR(ver) ((ver) & 0xff) 145 #define IWI_FW_GET_MINOR(ver) (((ver) & 0xff00) >> 8) 146 147 #define IWI_FW_MODE_UCODE 0 148 #define IWI_FW_MODE_BOOT 0 149 #define IWI_FW_MODE_BSS 0 150 #define IWI_FW_MODE_IBSS 1 151 #define IWI_FW_MODE_MONITOR 2 152 153 struct iwi_firmware_hdr { 154 uint32_t version; /* version stamp */ 155 uint32_t bsize; /* size of boot image */ 156 uint32_t usize; /* size of ucode image */ 157 uint32_t fsize; /* size of firmware image */ 158 }; 159 160 struct iwi_hdr { 161 uint8_t type; 162 #define IWI_HDR_TYPE_DATA 0 163 #define IWI_HDR_TYPE_COMMAND 1 164 #define IWI_HDR_TYPE_NOTIF 3 165 #define IWI_HDR_TYPE_FRAME 9 166 167 uint8_t seq; 168 uint8_t flags; 169 #define IWI_HDR_FLAG_IRQ 0x04 170 171 uint8_t reserved; 172 } __packed; 173 174 struct iwi_notif { 175 uint32_t reserved[2]; 176 uint8_t type; 177 #define IWI_NOTIF_TYPE_SUCCESS 0 178 #define IWI_NOTIF_TYPE_UNSPECIFIED 1 /* unspecified failure */ 179 #define IWI_NOTIF_TYPE_ASSOCIATION 10 180 #define IWI_NOTIF_TYPE_AUTHENTICATION 11 181 #define IWI_NOTIF_TYPE_SCAN_CHANNEL 12 182 #define IWI_NOTIF_TYPE_SCAN_COMPLETE 13 183 #define IWI_NOTIF_TYPE_FRAG_LENGTH 14 184 #define IWI_NOTIF_TYPE_LINK_QUALITY 15 /* "link deterioration" */ 185 #define IWI_NOTIF_TYPE_BEACON 17 /* beacon state, e.g. miss */ 186 #define IWI_NOTIF_TYPE_TGI_TX_KEY 18 /* WPA transmit key */ 187 #define IWI_NOTIF_TYPE_CALIBRATION 20 188 #define IWI_NOTIF_TYPE_NOISE 25 189 190 uint8_t flags; 191 uint16_t len; 192 } __packed; 193 194 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */ 195 struct iwi_notif_authentication { 196 uint8_t state; 197 #define IWI_AUTH_FAIL 0 198 #define IWI_AUTH_SENT_1 1 /* tx first frame */ 199 #define IWI_AUTH_RECV_2 2 /* rx second frame */ 200 #define IWI_AUTH_SEQ1_PASS 3 /* 1st exchange passed */ 201 #define IWI_AUTH_SEQ1_FAIL 4 /* 1st exchange failed */ 202 #define IWI_AUTH_SUCCESS 9 203 } __packed; 204 205 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */ 206 struct iwi_notif_association { 207 uint8_t state; 208 #define IWI_ASSOC_FAIL 0 209 #define IWI_ASSOC_SUCCESS 12 210 uint8_t pad[11]; 211 } __packed; 212 213 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */ 214 struct iwi_notif_scan_channel { 215 uint8_t nchan; 216 uint8_t reserved[47]; 217 } __packed; 218 219 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */ 220 struct iwi_notif_scan_complete { 221 uint8_t type; 222 uint8_t nchan; 223 uint8_t status; 224 uint8_t reserved; 225 } __packed; 226 227 /* structure for notification IWI_NOTIF_TYPE_BEACON */ 228 struct iwi_notif_beacon_state { 229 uint32_t state; 230 #define IWI_BEACON_MISS 1 231 uint32_t number; 232 } __packed; 233 234 /* received frame header */ 235 struct iwi_frame { 236 uint32_t reserved1[2]; 237 uint8_t chan; 238 uint8_t status; 239 uint8_t rate; 240 uint8_t rssi; 241 uint8_t agc; 242 uint8_t rssi_dbm; 243 uint16_t signal; 244 uint16_t noise; 245 uint8_t antenna; 246 uint8_t control; 247 uint8_t reserved2[2]; 248 uint16_t len; 249 } __packed; 250 251 /* header for transmission */ 252 struct iwi_tx_desc { 253 struct iwi_hdr hdr; 254 uint32_t reserved1; 255 uint8_t station; /* adhoc sta #, 0 for bss */ 256 uint8_t reserved2[3]; 257 uint8_t cmd; 258 #define IWI_DATA_CMD_TX 0x0b 259 260 uint8_t seq; 261 uint16_t len; 262 uint8_t priority; 263 uint8_t flags; 264 #define IWI_DATA_FLAG_SHPREAMBLE 0x04 265 #define IWI_DATA_FLAG_NO_WEP 0x20 266 #define IWI_DATA_FLAG_NEED_ACK 0x80 267 268 uint8_t xflags; 269 #define IWI_DATA_XFLAG_QOS 0x10 270 271 uint8_t wep_txkey; 272 uint8_t wepkey[IEEE80211_KEYBUF_SIZE]; 273 uint8_t rate; 274 uint8_t antenna; 275 uint8_t reserved3[10]; 276 struct ieee80211_qosframe_addr4 wh; 277 uint32_t iv; 278 uint32_t eiv; 279 280 uint32_t nseg; 281 #define IWI_MAX_NSEG 6 282 uint32_t seg_addr[IWI_MAX_NSEG]; 283 uint16_t seg_len[IWI_MAX_NSEG]; 284 } __packed; 285 286 /* command */ 287 struct iwi_cmd_desc { 288 struct iwi_hdr hdr; 289 uint8_t type; 290 #define IWI_CMD_ENABLE 2 291 #define IWI_CMD_SET_CONFIG 6 292 #define IWI_CMD_SET_ESSID 8 293 #define IWI_CMD_SET_MAC_ADDRESS 11 294 #define IWI_CMD_SET_RTS_THRESHOLD 15 295 #define IWI_CMD_SET_FRAG_THRESHOLD 16 296 #define IWI_CMD_SET_POWER_MODE 17 297 #define IWI_CMD_SET_WEP_KEY 18 298 #define IWI_CMD_SCAN 20 299 #define IWI_CMD_ASSOCIATE 21 300 #define IWI_CMD_SET_RATES 22 301 #define IWI_CMD_ABORT_SCAN 23 302 #define IWI_CMD_SET_WME_PARAMS 25 303 #define IWI_CMD_SCAN_EXT 26 304 #define IWI_CMD_SET_OPTIE 31 305 #define IWI_CMD_DISABLE 33 306 #define IWI_CMD_SET_IV 34 307 #define IWI_CMD_SET_TX_POWER 35 308 #define IWI_CMD_SET_SENSITIVITY 42 309 #define IWI_CMD_SET_WMEIE 84 310 311 uint8_t len; 312 uint16_t reserved; 313 uint8_t data[120]; 314 } __packed; 315 316 /* node information (IBSS) */ 317 struct iwi_ibssnode { 318 uint8_t bssid[IEEE80211_ADDR_LEN]; 319 uint8_t reserved[2]; 320 } __packed; 321 322 /* constants for 'mode' fields */ 323 #define IWI_MODE_11A 0 324 #define IWI_MODE_11B 1 325 #define IWI_MODE_11G 2 326 327 /* possible values for command IWI_CMD_SET_POWER_MODE */ 328 #define IWI_POWER_MODE_CAM 0 /* no power save */ 329 #define IWI_POWER_MODE_PSP 3 330 #define IWI_POWER_MODE_MAX 5 /* max power save operation */ 331 332 /* structure for command IWI_CMD_SET_RATES */ 333 struct iwi_rateset { 334 uint8_t mode; 335 uint8_t nrates; 336 uint8_t type; 337 #define IWI_RATESET_TYPE_NEGOTIATED 0 338 #define IWI_RATESET_TYPE_SUPPORTED 1 339 340 uint8_t reserved; 341 uint8_t rates[12]; 342 } __packed; 343 344 /* structure for command IWI_CMD_SET_TX_POWER */ 345 struct iwi_txpower { 346 uint8_t nchan; 347 uint8_t mode; 348 struct { 349 uint8_t chan; 350 uint8_t power; 351 #define IWI_TXPOWER_MAX 20 352 #define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX) 353 } __packed chan[37]; 354 } __packed; 355 356 /* structure for command IWI_CMD_ASSOCIATE */ 357 struct iwi_associate { 358 uint8_t chan; /* channel # */ 359 uint8_t auth; /* type and key */ 360 #define IWI_AUTH_OPEN 0 361 #define IWI_AUTH_SHARED 1 362 #define IWI_AUTH_NONE 3 363 364 uint8_t type; /* request */ 365 #define IWI_HC_ASSOC 0 366 #define IWI_HC_REASSOC 1 367 #define IWI_HC_DISASSOC 2 368 #define IWI_HC_IBSS_START 3 369 #define IWI_HC_IBSS_RECONF 4 370 #define IWI_HC_DISASSOC_QUIET 5 371 uint8_t reserved; 372 uint16_t policy; 373 #define IWI_POLICY_WME 1 374 #define IWI_POLICY_WPA 2 375 376 uint8_t plen; /* preamble length */ 377 uint8_t mode; /* 11a, 11b, or 11g */ 378 uint8_t bssid[IEEE80211_ADDR_LEN]; 379 uint8_t tstamp[8]; /* tsf for beacon sync */ 380 uint16_t capinfo; 381 uint16_t lintval; /* listen interval */ 382 uint16_t intval; /* beacon interval */ 383 uint8_t dst[IEEE80211_ADDR_LEN]; 384 uint16_t atim_window; 385 uint8_t smr; 386 uint8_t reserved1; 387 uint16_t reserved2; 388 } __packed; 389 390 #define IWI_SCAN_CHANNELS 54 391 392 /* structure for command IWI_CMD_SCAN */ 393 struct iwi_scan { 394 uint8_t type; 395 uint16_t dwelltime; /* channel dwell time (ms) */ 396 uint8_t channels[IWI_SCAN_CHANNELS]; 397 #define IWI_CHAN_5GHZ (0 << 6) 398 #define IWI_CHAN_2GHZ (1 << 6) 399 400 uint8_t reserved[3]; 401 } __packed; 402 403 /* scan type codes */ 404 #define IWI_SCAN_TYPE_PASSIVE_STOP 0 /* passive, stop on first beacon */ 405 #define IWI_SCAN_TYPE_PASSIVE 1 /* passive, full dwell on channel */ 406 #define IWI_SCAN_TYPE_DIRECTED 2 /* active, directed probe req */ 407 #define IWI_SCAN_TYPE_BROADCAST 3 /* active, bcast probe req */ 408 #define IWI_SCAN_TYPE_BDIRECTED 4 /* active, directed+bcast probe */ 409 #define IWI_SCAN_TYPES 5 410 411 /* structure for command IWI_CMD_SCAN_EXT */ 412 struct iwi_scan_ext { 413 uint32_t full_scan_index; 414 uint8_t channels[IWI_SCAN_CHANNELS]; 415 uint8_t scan_type[IWI_SCAN_CHANNELS / 2]; 416 uint8_t reserved; 417 uint16_t dwell_time[IWI_SCAN_TYPES]; 418 } __packed; 419 420 /* structure for command IWI_CMD_SET_CONFIG */ 421 struct iwi_configuration { 422 uint8_t bluetooth_coexistence; 423 uint8_t reserved1; 424 uint8_t answer_pbreq; /* answer bcast ssid probe req frames */ 425 uint8_t allow_invalid_frames; /* accept data frames w/ errors */ 426 uint8_t multicast_enabled; /* accept frames w/ any bssid */ 427 uint8_t drop_unicast_unencrypted; 428 uint8_t disable_unicast_decryption; 429 uint8_t drop_multicast_unencrypted; 430 uint8_t disable_multicast_decryption; 431 uint8_t antenna; /* antenna diversity */ 432 #define IWI_ANTENNA_AUTO 0 /* firmware selects best antenna */ 433 #define IWI_ANTENNA_A 1 /* use antenna A only */ 434 #define IWI_ANTENNA_B 3 /* use antenna B only */ 435 #define IWI_ANTENNA_SLOWDIV 2 /* slow diversity algorithm */ 436 uint8_t include_crc; /* include crc in rx'd frames */ 437 uint8_t use_protection; /* auto-detect 11g operation */ 438 uint8_t protection_ctsonly; /* use CTS-to-self protection */ 439 uint8_t enable_multicast_filtering; 440 uint8_t bluetooth_threshold; /* collision threshold */ 441 uint8_t silence_threshold; /* silence over/under threshold */ 442 uint8_t allow_beacon_and_probe_resp;/* accept frames w/ any bssid */ 443 uint8_t allow_mgt; /* accept frames w/ any bssid */ 444 uint8_t noise_reported; /* report noise stats to host */ 445 uint8_t reserved5; 446 } __packed; 447 448 /* structure for command IWI_CMD_SET_WEP_KEY */ 449 struct iwi_wep_key { 450 uint8_t cmd; 451 #define IWI_WEP_KEY_CMD_SETKEY 0x08 452 453 uint8_t seq; 454 uint8_t idx; 455 uint8_t len; 456 uint8_t key[IEEE80211_KEYBUF_SIZE]; 457 } __packed; 458 459 /* structure for command IWI_CMD_SET_WME_PARAMS */ 460 struct iwi_wme_params { 461 uint16_t cwmin[WME_NUM_AC]; 462 uint16_t cwmax[WME_NUM_AC]; 463 uint8_t aifsn[WME_NUM_AC]; 464 uint8_t acm[WME_NUM_AC]; 465 uint16_t burst[WME_NUM_AC]; 466 } __packed; 467 468 /* structure for command IWI_CMD_SET_SENSITIVTY */ 469 struct iwi_sensitivity { 470 uint16_t rssi; /* beacon rssi in dBm */ 471 #define IWI_RSSI_TO_DBM 112 472 uint16_t reserved; 473 } __packed; 474 475 #define IWI_MEM_EEPROM_EVENT 0x00300004 476 #define IWI_MEM_EEPROM_CTL 0x00300040 477 478 #define IWI_EEPROM_MAC 0x21 479 #define IWI_EEPROM_NIC 0x25 /* nic type (lsb) */ 480 #define IWI_EEPROM_SKU 0x25 /* nic type (msb) */ 481 482 #define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */ 483 484 #define IWI_EEPROM_C (1 << 0) /* Serial Clock */ 485 #define IWI_EEPROM_S (1 << 1) /* Chip Select */ 486 #define IWI_EEPROM_D (1 << 2) /* Serial data input */ 487 #define IWI_EEPROM_Q (1 << 4) /* Serial data output */ 488 489 #define IWI_EEPROM_SHIFT_D 2 490 #define IWI_EEPROM_SHIFT_Q 4 491 492 /* 493 * control and status registers access macros 494 */ 495 #define CSR_READ_1(sc, reg) \ 496 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 497 498 #define CSR_READ_2(sc, reg) \ 499 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 500 501 #define CSR_READ_4(sc, reg) \ 502 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 503 504 #define CSR_READ_REGION_4(sc, offset, datap, count) \ 505 bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 506 (datap), (count)) 507 508 #define CSR_WRITE_1(sc, reg, val) \ 509 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 510 511 #define CSR_WRITE_2(sc, reg, val) \ 512 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 513 514 #define CSR_WRITE_4(sc, reg, val) \ 515 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 516 517 #define CSR_WRITE_REGION_1(sc, offset, datap, count) \ 518 bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \ 519 (datap), (count)) 520 521 /* 522 * indirect memory space access macros 523 */ 524 #define MEM_WRITE_1(sc, addr, val) do { \ 525 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 526 CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 527 } while (/* CONSTCOND */0) 528 529 #define MEM_WRITE_2(sc, addr, val) do { \ 530 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 531 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 532 } while (/* CONSTCOND */0) 533 534 #define MEM_WRITE_4(sc, addr, val) do { \ 535 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 536 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 537 } while (/* CONSTCOND */0) 538 539 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \ 540 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 541 CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \ 542 } while (/* CONSTCOND */0) 543 544 /* 545 * EEPROM access macro 546 */ 547 #define IWI_EEPROM_CTL(sc, val) do { \ 548 MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \ 549 DELAY(IWI_EEPROM_DELAY); \ 550 } while (/* CONSTCOND */0) 551