xref: /freebsd/sys/dev/iwi/if_iwireg.h (revision a64729f5077d77e13b9497cb33ecb3c82e606ee8)
1 
2 /*-
3  * SPDX-License-Identifier: BSD-2-Clause
4  *
5  * Copyright (c) 2004, 2005
6  *      Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice unmodified, this list of conditions, and the following
13  *    disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 #define IWI_CMD_RING_COUNT	16
32 #define IWI_TX_RING_COUNT	64
33 #define IWI_RX_RING_COUNT	32
34 
35 #define IWI_TX_DESC_SIZE	(sizeof (struct iwi_tx_desc))
36 #define IWI_CMD_DESC_SIZE	(sizeof (struct iwi_cmd_desc))
37 
38 #define IWI_CSR_INTR		0x0008
39 #define IWI_CSR_INTR_MASK	0x000c
40 #define IWI_CSR_INDIRECT_ADDR	0x0010
41 #define IWI_CSR_INDIRECT_DATA	0x0014
42 #define IWI_CSR_AUTOINC_ADDR	0x0018
43 #define IWI_CSR_AUTOINC_DATA	0x001c
44 #define IWI_CSR_RST		0x0020
45 #define IWI_CSR_CTL		0x0024
46 #define IWI_CSR_IO		0x0030
47 #define IWI_CSR_CMD_BASE	0x0200
48 #define IWI_CSR_CMD_SIZE	0x0204
49 #define IWI_CSR_TX1_BASE	0x0208
50 #define IWI_CSR_TX1_SIZE	0x020c
51 #define IWI_CSR_TX2_BASE	0x0210
52 #define IWI_CSR_TX2_SIZE	0x0214
53 #define IWI_CSR_TX3_BASE	0x0218
54 #define IWI_CSR_TX3_SIZE	0x021c
55 #define IWI_CSR_TX4_BASE	0x0220
56 #define IWI_CSR_TX4_SIZE	0x0224
57 #define IWI_CSR_CMD_RIDX	0x0280
58 #define IWI_CSR_TX1_RIDX	0x0284
59 #define IWI_CSR_TX2_RIDX	0x0288
60 #define IWI_CSR_TX3_RIDX	0x028c
61 #define IWI_CSR_TX4_RIDX	0x0290
62 #define IWI_CSR_RX_RIDX		0x02a0
63 #define IWI_CSR_RX_BASE		0x0500
64 #define IWI_CSR_TABLE0_SIZE	0x0700
65 #define IWI_CSR_TABLE0_BASE	0x0704
66 #define IWI_CSR_NODE_BASE	0x0c0c
67 #define IWI_CSR_CMD_WIDX	0x0f80
68 #define IWI_CSR_TX1_WIDX	0x0f84
69 #define IWI_CSR_TX2_WIDX	0x0f88
70 #define IWI_CSR_TX3_WIDX	0x0f8c
71 #define IWI_CSR_TX4_WIDX	0x0f90
72 #define IWI_CSR_RX_WIDX		0x0fa0
73 #define IWI_CSR_READ_INT	0x0ff4
74 
75 /* aliases */
76 #define IWI_CSR_CURRENT_TX_RATE	IWI_CSR_TABLE0_BASE
77 
78 /* flags for IWI_CSR_INTR */
79 #define IWI_INTR_RX_DONE	0x00000002
80 #define IWI_INTR_CMD_DONE	0x00000800
81 #define IWI_INTR_TX1_DONE	0x00001000
82 #define IWI_INTR_TX2_DONE	0x00002000
83 #define IWI_INTR_TX3_DONE	0x00004000
84 #define IWI_INTR_TX4_DONE	0x00008000
85 #define IWI_INTR_FW_INITED	0x01000000
86 #define IWI_INTR_RADIO_OFF	0x04000000
87 #define IWI_INTR_FATAL_ERROR	0x40000000
88 #define IWI_INTR_PARITY_ERROR	0x80000000
89 
90 #define IWI_INTR_MASK							\
91 	(IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE |	IWI_INTR_TX1_DONE | 	\
92 	 IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE |	\
93 	 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF |			\
94 	 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)
95 
96 /* flags for IWI_CSR_RST */
97 #define IWI_RST_PRINCETON_RESET	0x00000001
98 #define	IWI_RST_STANDBY		0x00000004
99 #define	IWI_RST_LED_ACTIVITY	0x00000010	/* tx/rx traffic led */
100 #define	IWI_RST_LED_ASSOCIATED	0x00000020	/* station associated led */
101 #define	IWI_RST_LED_OFDM	0x00000040	/* ofdm/cck led */
102 #define IWI_RST_SOFT_RESET	0x00000080
103 #define IWI_RST_MASTER_DISABLED	0x00000100
104 #define IWI_RST_STOP_MASTER	0x00000200
105 #define IWI_RST_GATE_ODMA	0x02000000
106 #define IWI_RST_GATE_IDMA	0x04000000
107 #define IWI_RST_GATE_ADMA	0x20000000
108 
109 /* flags for IWI_CSR_CTL */
110 #define IWI_CTL_CLOCK_READY	0x00000001
111 #define IWI_CTL_ALLOW_STANDBY	0x00000002
112 #define IWI_CTL_INIT		0x00000004
113 
114 /* flags for IWI_CSR_IO */
115 #define IWI_IO_RADIO_ENABLED	0x00010000
116 
117 /* flags for IWI_CSR_READ_INT */
118 #define IWI_READ_INT_INIT_HOST	0x20000000
119 
120 /* constants for command blocks */
121 #define IWI_CB_DEFAULT_CTL	0x8cea0000
122 #define IWI_CB_MAXDATALEN	8191
123 
124 /* supported rates */
125 #define IWI_RATE_DS1	10
126 #define IWI_RATE_DS2	20
127 #define IWI_RATE_DS5	55
128 #define IWI_RATE_DS11	110
129 #define IWI_RATE_OFDM6	13
130 #define IWI_RATE_OFDM9	15
131 #define IWI_RATE_OFDM12	5
132 #define IWI_RATE_OFDM18	7
133 #define IWI_RATE_OFDM24	9
134 #define IWI_RATE_OFDM36	11
135 #define IWI_RATE_OFDM48	1
136 #define IWI_RATE_OFDM54	3
137 
138 /*
139  * Old version firmware images start with this header,
140  * fields are in little endian (le32) format.
141  */
142 struct iwi_firmware_ohdr {
143 	uint32_t	version;
144 	uint32_t	mode;
145 };
146 #define	IWI_FW_REQ_MAJOR	2
147 #define	IWI_FW_REQ_MINOR	4
148 #define	IWI_FW_GET_MAJOR(ver)	((ver) & 0xff)
149 #define	IWI_FW_GET_MINOR(ver)	(((ver) & 0xff00) >> 8)
150 
151 #define	IWI_FW_MODE_UCODE	0
152 #define	IWI_FW_MODE_BOOT	0
153 #define	IWI_FW_MODE_BSS		0
154 #define	IWI_FW_MODE_IBSS	1
155 #define	IWI_FW_MODE_MONITOR	2
156 
157 /*
158  * New version firmware images contain boot, ucode and firmware
159  * all in one chunk. The header at the beginning gives the version
160  * and the size of each (sub)image, in le32 format.
161  */
162 struct iwi_firmware_hdr {
163 	uint32_t	version;	/* version stamp */
164 	uint32_t	bsize;		/* size of boot image */
165 	uint32_t	usize;		/* size of ucode image */
166 	uint32_t	fsize;		/* size of firmware image */
167 };
168 
169 struct iwi_hdr {
170 	uint8_t	type;
171 #define IWI_HDR_TYPE_DATA	0
172 #define IWI_HDR_TYPE_COMMAND	1
173 #define IWI_HDR_TYPE_NOTIF	3
174 #define IWI_HDR_TYPE_FRAME	9
175 
176 	uint8_t	seq;
177 	uint8_t	flags;
178 #define IWI_HDR_FLAG_IRQ	0x04
179 
180 	uint8_t	reserved;
181 } __packed;
182 
183 struct iwi_notif {
184 	uint32_t	reserved[2];
185 	uint8_t		type;
186 #define IWI_NOTIF_TYPE_SUCCESS		0
187 #define IWI_NOTIF_TYPE_UNSPECIFIED	1	/* unspecified failure */
188 #define IWI_NOTIF_TYPE_ASSOCIATION	10
189 #define IWI_NOTIF_TYPE_AUTHENTICATION	11
190 #define IWI_NOTIF_TYPE_SCAN_CHANNEL	12
191 #define IWI_NOTIF_TYPE_SCAN_COMPLETE	13
192 #define IWI_NOTIF_TYPE_FRAG_LENGTH	14
193 #define IWI_NOTIF_TYPE_LINK_QUALITY	15	/* "link deterioration" */
194 #define IWI_NOTIF_TYPE_BEACON		17	/* beacon state, e.g. miss */
195 #define	IWI_NOTIF_TYPE_TGI_TX_KEY	18	/* WPA transmit key */
196 #define IWI_NOTIF_TYPE_CALIBRATION	20
197 #define IWI_NOTIF_TYPE_NOISE		25
198 
199 	uint8_t		flags;
200 	uint16_t	len;
201 } __packed;
202 
203 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */
204 struct iwi_notif_authentication {
205 	uint8_t	state;
206 #define IWI_AUTH_FAIL		0
207 #define	IWI_AUTH_SENT_1		1		/* tx first frame */
208 #define	IWI_AUTH_RECV_2		2		/* rx second frame */
209 #define	IWI_AUTH_SEQ1_PASS	3		/* 1st exchange passed */
210 #define	IWI_AUTH_SEQ1_FAIL	4		/* 1st exchange failed */
211 #define IWI_AUTH_SUCCESS	9
212 } __packed;
213 
214 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */
215 struct iwi_notif_association {
216 	uint8_t			state;
217 #define IWI_ASSOC_INIT		0
218 #define IWI_ASSOC_SUCCESS	12
219 	uint8_t			pad[11];
220 } __packed;
221 
222 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */
223 struct iwi_notif_scan_channel {
224 	uint8_t	nchan;
225 	/* XXX this is iwi_cmd_stats, and a u8 reserved field */
226 	uint8_t	reserved[47];
227 } __packed;
228 
229 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */
230 struct iwi_notif_scan_complete {
231 	uint8_t	type;
232 	uint8_t	nchan;
233 	uint8_t	status;
234 	uint8_t	reserved;
235 } __packed;
236 
237 /* structure for notification IWI_NOTIF_TYPE_BEACON */
238 struct iwi_notif_beacon_state {
239 	uint32_t state;
240 #define IWI_BEACON_MISS		1
241 	uint32_t number;
242 } __packed;
243 
244 /* structure(s) for notification IWI_NOTIF_TYPE_LINK_QUALITY */
245 
246 #define RX_FREE_BUFFERS 32
247 #define RX_LOW_WATERMARK 8
248 
249 #define SUP_RATE_11A_MAX_NUM_CHANNELS  8
250 #define SUP_RATE_11B_MAX_NUM_CHANNELS  4
251 #define SUP_RATE_11G_MAX_NUM_CHANNELS  12
252 
253 // Used for passing to driver number of successes and failures per rate
254 struct iwi_rate_histogram {
255         union {
256                 uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
257                 uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
258                 uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
259         } success;
260         union {
261                 uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
262                 uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
263                 uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
264         } failed;
265 } __packed;
266 
267 /* statistics command response */
268 struct iwi_cmd_stats {
269 	uint8_t cmd_id;
270 	uint8_t seq_num;
271 	uint16_t good_sfd;
272 	uint16_t bad_plcp;
273 	uint16_t wrong_bssid;
274 	uint16_t valid_mpdu;
275 	uint16_t bad_mac_header;
276 	uint16_t reserved_frame_types;
277 	uint16_t rx_ina;
278 	uint16_t bad_crc32;
279 	uint16_t invalid_cts;
280 	uint16_t invalid_acks;
281 	uint16_t long_distance_ina_fina;
282 	uint16_t dsp_silence_unreachable;
283 	uint16_t accumulated_rssi;
284 	uint16_t rx_ovfl_frame_tossed;
285 	uint16_t rssi_silence_threshold;
286 	uint16_t rx_ovfl_frame_supplied;
287 	uint16_t last_rx_frame_signal;
288 	uint16_t last_rx_frame_noise;
289 	uint16_t rx_autodetec_no_ofdm;
290 	uint16_t rx_autodetec_no_barker;
291 	uint16_t reserved;
292 } __packed;
293 
294 #define	SILENCE_OVER_THRESH		(1)
295 #define	SILENCE_UNDER_THRESH		(2)
296 
297 struct iwi_notif_link_quality {
298 	struct iwi_cmd_stats stats;
299 	uint8_t rate;
300 	uint8_t modulation;
301 	struct iwi_rate_histogram histogram;
302 	uint8_t silence_notification_type;   /* SILENCE_OVER/UNDER_THRESH */
303 	uint16_t silence_count;
304 } __packed;
305 
306 /* received frame header */
307 struct iwi_frame {
308 	uint32_t	reserved1[2];
309 	uint8_t		chan;
310 	uint8_t		status;
311 	uint8_t		rate;
312 	uint8_t		rssi;
313 	uint8_t		agc;
314 	uint8_t		rssi_dbm;
315 	uint16_t	signal;
316 	uint16_t	noise;
317 	uint8_t		antenna;
318 	uint8_t		control;
319 	uint8_t		reserved2[2];
320 	uint16_t	len;
321 } __packed;
322 
323 /* header for transmission */
324 struct iwi_tx_desc {
325 	struct iwi_hdr	hdr;
326 	uint32_t	reserved1;
327 	uint8_t		station;	/* adhoc sta #, 0 for bss */
328 	uint8_t		reserved2[3];
329 	uint8_t		cmd;
330 #define IWI_DATA_CMD_TX	0x0b
331 
332 	uint8_t		seq;
333 	uint16_t	len;
334 	uint8_t		priority;
335 	uint8_t		flags;
336 #define IWI_DATA_FLAG_SHPREAMBLE	0x04
337 #define IWI_DATA_FLAG_NO_WEP		0x20
338 #define IWI_DATA_FLAG_NEED_ACK		0x80
339 
340 	uint8_t		xflags;
341 #define IWI_DATA_XFLAG_QOS	0x10
342 
343 	uint8_t		wep_txkey;
344 	uint8_t		wepkey[IEEE80211_KEYBUF_SIZE];
345 	uint8_t		rate;
346 	uint8_t		antenna;
347 	uint8_t		reserved3[10];
348 	struct ieee80211_qosframe_addr4	wh;
349 	uint32_t	iv;
350 	uint32_t	eiv;
351 
352 	uint32_t	nseg;
353 #define IWI_MAX_NSEG	6
354 	uint32_t	seg_addr[IWI_MAX_NSEG];
355 	uint16_t	seg_len[IWI_MAX_NSEG];
356 } __packed;
357 
358 /* command */
359 struct iwi_cmd_desc {
360 	struct iwi_hdr	hdr;
361 	uint8_t		type;
362 #define IWI_CMD_ENABLE				2
363 #define IWI_CMD_SET_CONFIG			6
364 #define IWI_CMD_SET_ESSID			8
365 #define IWI_CMD_SET_MAC_ADDRESS			11
366 #define IWI_CMD_SET_RTS_THRESHOLD		15
367 #define IWI_CMD_SET_FRAG_THRESHOLD		16
368 #define IWI_CMD_SET_POWER_MODE			17
369 #define IWI_CMD_SET_WEP_KEY			18
370 #define IWI_CMD_SCAN				20
371 #define IWI_CMD_ASSOCIATE			21
372 #define IWI_CMD_SET_RATES			22
373 #define IWI_CMD_ABORT_SCAN			23
374 #define IWI_CMD_SET_WME_PARAMS			25
375 #define IWI_CMD_SCAN_EXT			26
376 #define IWI_CMD_SET_OPTIE			31
377 #define IWI_CMD_DISABLE				33
378 #define IWI_CMD_SET_IV				34
379 #define IWI_CMD_SET_TX_POWER			35
380 #define IWI_CMD_SET_SENSITIVITY			42
381 #define IWI_CMD_SET_WMEIE			84
382 
383 	uint8_t		len;
384 	uint16_t	reserved;
385 	uint8_t		data[120];
386 } __packed;
387 
388 /* node information (IBSS) */
389 struct iwi_ibssnode {
390 	uint8_t	bssid[IEEE80211_ADDR_LEN];
391 	uint8_t	reserved[2];
392 } __packed;
393 
394 /* constants for 'mode' fields */
395 #define IWI_MODE_11A	0
396 #define IWI_MODE_11B	1
397 #define IWI_MODE_11G	2
398 
399 /* possible values for command IWI_CMD_SET_POWER_MODE */
400 #define IWI_POWER_MODE_CAM	0	/* no power save */
401 #define IWI_POWER_MODE_PSP	3
402 #define IWI_POWER_MODE_MAX	5	/* max power save operation */
403 
404 /* structure for command IWI_CMD_SET_RATES */
405 struct iwi_rateset {
406 	uint8_t	mode;
407 	uint8_t	nrates;
408 	uint8_t	type;
409 #define IWI_RATESET_TYPE_NEGOTIATED	0
410 #define IWI_RATESET_TYPE_SUPPORTED	1
411 
412 	uint8_t	reserved;
413 #define	IWI_RATESET_SIZE	12
414 	uint8_t	rates[IWI_RATESET_SIZE];
415 } __packed;
416 
417 /* structure for command IWI_CMD_SET_TX_POWER */
418 struct iwi_txpower {
419 	uint8_t	nchan;
420 	uint8_t	mode;
421 	struct {
422 		uint8_t	chan;
423 		uint8_t	power;
424 #define IWI_TXPOWER_MAX		20
425 #define IWI_TXPOWER_RATIO	(IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX)
426 	} __packed chan[37];
427 } __packed;
428 
429 /* structure for command IWI_CMD_ASSOCIATE */
430 struct iwi_associate {
431 	uint8_t		chan;		/* channel # */
432 	uint8_t		auth;		/* type and key */
433 #define IWI_AUTH_OPEN	0
434 #define IWI_AUTH_SHARED	1
435 #define IWI_AUTH_NONE	3
436 
437 	uint8_t		type;		/* request */
438 #define	IWI_HC_ASSOC		0
439 #define	IWI_HC_REASSOC		1
440 #define	IWI_HC_DISASSOC		2
441 #define	IWI_HC_IBSS_START	3
442 #define	IWI_HC_IBSS_RECONF	4
443 #define	IWI_HC_DISASSOC_QUIET	5
444 	uint8_t		reserved;
445 	uint16_t	policy;
446 #define IWI_POLICY_WME	1
447 #define IWI_POLICY_WPA	2
448 
449 	uint8_t		plen;		/* preamble length */
450 	uint8_t		mode;		/* 11a, 11b, or 11g */
451 	uint8_t		bssid[IEEE80211_ADDR_LEN];
452 	uint8_t		tstamp[8];	/* tsf for beacon sync */
453 	uint16_t	capinfo;
454 	uint16_t	lintval;	/* listen interval */
455 	uint16_t	intval;		/* beacon interval */
456 	uint8_t		dst[IEEE80211_ADDR_LEN];
457 	uint16_t	atim_window;
458 	uint8_t		smr;
459 	uint8_t		reserved1;
460 	uint16_t	reserved2;
461 } __packed;
462 
463 #define	IWI_SCAN_CHANNELS	54
464 
465 /* structure for command IWI_CMD_SCAN */
466 struct iwi_scan {
467 	uint8_t		type;
468 	uint16_t	dwelltime;	/* channel dwell time (ms) */
469 	uint8_t		channels[IWI_SCAN_CHANNELS];
470 #define IWI_CHAN_5GHZ	(0 << 6)
471 #define IWI_CHAN_2GHZ	(1 << 6)
472 
473 	uint8_t		reserved[3];
474 } __packed;
475 
476 /* scan type codes */
477 #define IWI_SCAN_TYPE_PASSIVE_STOP	0 /* passive, stop on first beacon */
478 #define IWI_SCAN_TYPE_PASSIVE		1 /* passive, full dwell on channel */
479 #define IWI_SCAN_TYPE_DIRECTED		2 /* active, directed probe req */
480 #define IWI_SCAN_TYPE_BROADCAST		3 /* active, bcast probe req */
481 #define IWI_SCAN_TYPE_BDIRECTED		4 /* active, directed+bcast probe */
482 #define IWI_SCAN_TYPES			5
483 
484 /* scan result codes */
485 #define	IWI_SCAN_COMPLETED		1 /* scan compeleted successfully */
486 #define IWI_SCAN_ABORTED		2 /* scan was aborted by the driver */
487 
488 /* structure for command IWI_CMD_SCAN_EXT */
489 struct iwi_scan_ext {
490 	uint32_t	full_scan_index;
491 	uint8_t		channels[IWI_SCAN_CHANNELS];
492 	uint8_t		scan_type[IWI_SCAN_CHANNELS / 2];
493 	uint8_t		reserved;
494 	uint16_t	dwell_time[IWI_SCAN_TYPES];
495 } __packed;
496 
497 /* structure for command IWI_CMD_SET_CONFIG */
498 struct iwi_configuration {
499 	uint8_t	bluetooth_coexistence;
500 	uint8_t	reserved1;
501 	uint8_t	answer_pbreq;		/* answer bcast ssid probe req frames */
502 	uint8_t	allow_invalid_frames;	/* accept data frames w/ errors */
503 	uint8_t	multicast_enabled;	/* accept frames w/ any bssid */
504 	uint8_t	drop_unicast_unencrypted;
505 	uint8_t	disable_unicast_decryption;
506 	uint8_t	drop_multicast_unencrypted;
507 	uint8_t	disable_multicast_decryption;
508 	uint8_t	antenna;		/* antenna diversity */
509 #define	IWI_ANTENNA_AUTO	0	/* firmware selects best antenna */
510 #define	IWI_ANTENNA_A		1	/* use antenna A only */
511 #define	IWI_ANTENNA_B		3	/* use antenna B only */
512 #define	IWI_ANTENNA_SLOWDIV	2	/* slow diversity algorithm */
513 	uint8_t	include_crc;		/* include crc in rx'd frames */
514 	uint8_t	use_protection;		/* auto-detect 11g operation */
515 	uint8_t	protection_ctsonly;	/* use CTS-to-self protection */
516 	uint8_t	enable_multicast_filtering;
517 	uint8_t	bluetooth_threshold;	/* collision threshold */
518 	uint8_t	silence_threshold;	/* silence over/under threshold */
519 	uint8_t	allow_beacon_and_probe_resp;/* accept frames w/ any bssid */
520 	uint8_t	allow_mgt;		/* accept frames w/ any bssid */
521 	uint8_t	noise_reported;		/* report noise stats to host */
522 	uint8_t	reserved5;
523 } __packed;
524 
525 /* structure for command IWI_CMD_SET_WEP_KEY */
526 struct iwi_wep_key {
527 	uint8_t	cmd;
528 #define IWI_WEP_KEY_CMD_SETKEY	0x08
529 
530 	uint8_t	seq;
531 	uint8_t	idx;
532 	uint8_t	len;
533 	uint8_t	key[IEEE80211_KEYBUF_SIZE];
534 } __packed;
535 
536 /* structure for command IWI_CMD_SET_WME_PARAMS */
537 struct iwi_wme_params {
538 	uint16_t	cwmin[WME_NUM_AC];
539 	uint16_t	cwmax[WME_NUM_AC];
540 	uint8_t		aifsn[WME_NUM_AC];
541 	uint8_t		acm[WME_NUM_AC];
542 	uint16_t	burst[WME_NUM_AC];
543 } __packed;
544 
545 /* structure for command IWI_CMD_SET_SENSITIVTY */
546 struct iwi_sensitivity {
547 	uint16_t rssi;			/* beacon rssi in dBm */
548 #define	IWI_RSSI_TO_DBM		112
549 	uint16_t reserved;
550 } __packed;
551 
552 #define IWI_MEM_EEPROM_EVENT	0x00300004
553 #define IWI_MEM_EEPROM_CTL	0x00300040
554 
555 #define IWI_EEPROM_MAC	0x21
556 #define IWI_EEPROM_NIC	0x25		/* nic type (lsb) */
557 #define IWI_EEPROM_SKU	0x25		/* nic type (msb) */
558 
559 #define IWI_EEPROM_DELAY	1	/* minimum hold time (microsecond) */
560 
561 #define IWI_EEPROM_C	(1 << 0)	/* Serial Clock */
562 #define IWI_EEPROM_S	(1 << 1)	/* Chip Select */
563 #define IWI_EEPROM_D	(1 << 2)	/* Serial data input */
564 #define IWI_EEPROM_Q	(1 << 4)	/* Serial data output */
565 
566 #define IWI_EEPROM_SHIFT_D    2
567 #define IWI_EEPROM_SHIFT_Q    4
568 
569 /*
570  * control and status registers access macros
571  */
572 #define CSR_READ_1(sc, reg)						\
573 	bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
574 
575 #define CSR_READ_2(sc, reg)						\
576 	bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
577 
578 #define CSR_READ_4(sc, reg)						\
579 	bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
580 
581 #define CSR_READ_REGION_4(sc, offset, datap, count)			\
582 	bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset),	\
583 	    (datap), (count))
584 
585 #define CSR_WRITE_1(sc, reg, val)					\
586 	bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
587 
588 #define CSR_WRITE_2(sc, reg, val)					\
589 	bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
590 
591 #define CSR_WRITE_4(sc, reg, val)					\
592 	bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
593 
594 #define CSR_WRITE_REGION_1(sc, offset, datap, count)			\
595 	bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset),	\
596 	    (datap), (count))
597 
598 /*
599  * indirect memory space access macros
600  */
601 #define MEM_WRITE_1(sc, addr, val) do {					\
602 	CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr));		\
603 	CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val));		\
604 } while (/* CONSTCOND */0)
605 
606 #define MEM_WRITE_2(sc, addr, val) do {					\
607 	CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr));		\
608 	CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val));		\
609 } while (/* CONSTCOND */0)
610 
611 #define MEM_WRITE_4(sc, addr, val) do {					\
612 	CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr));		\
613 	CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val));		\
614 } while (/* CONSTCOND */0)
615 
616 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do {			\
617 	CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr));		\
618 	CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len));	\
619 } while (/* CONSTCOND */0)
620 
621 /*
622  * EEPROM access macro
623  */
624 #define IWI_EEPROM_CTL(sc, val) do {					\
625 	MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val));			\
626 	DELAY(IWI_EEPROM_DELAY);					\
627 } while (/* CONSTCOND */0)
628