1 /* $FreeBSD$ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #define IWI_CMD_RING_COUNT 16 31 #define IWI_TX_RING_COUNT 64 32 #define IWI_RX_RING_COUNT 32 33 34 #define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc)) 35 #define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc)) 36 37 #define IWI_CSR_INTR 0x0008 38 #define IWI_CSR_INTR_MASK 0x000c 39 #define IWI_CSR_INDIRECT_ADDR 0x0010 40 #define IWI_CSR_INDIRECT_DATA 0x0014 41 #define IWI_CSR_AUTOINC_ADDR 0x0018 42 #define IWI_CSR_AUTOINC_DATA 0x001c 43 #define IWI_CSR_RST 0x0020 44 #define IWI_CSR_CTL 0x0024 45 #define IWI_CSR_IO 0x0030 46 #define IWI_CSR_CMD_BASE 0x0200 47 #define IWI_CSR_CMD_SIZE 0x0204 48 #define IWI_CSR_TX1_BASE 0x0208 49 #define IWI_CSR_TX1_SIZE 0x020c 50 #define IWI_CSR_TX2_BASE 0x0210 51 #define IWI_CSR_TX2_SIZE 0x0214 52 #define IWI_CSR_TX3_BASE 0x0218 53 #define IWI_CSR_TX3_SIZE 0x021c 54 #define IWI_CSR_TX4_BASE 0x0220 55 #define IWI_CSR_TX4_SIZE 0x0224 56 #define IWI_CSR_CMD_RIDX 0x0280 57 #define IWI_CSR_TX1_RIDX 0x0284 58 #define IWI_CSR_TX2_RIDX 0x0288 59 #define IWI_CSR_TX3_RIDX 0x028c 60 #define IWI_CSR_TX4_RIDX 0x0290 61 #define IWI_CSR_RX_RIDX 0x02a0 62 #define IWI_CSR_RX_BASE 0x0500 63 #define IWI_CSR_TABLE0_SIZE 0x0700 64 #define IWI_CSR_TABLE0_BASE 0x0704 65 #define IWI_CSR_NODE_BASE 0x0c0c 66 #define IWI_CSR_CMD_WIDX 0x0f80 67 #define IWI_CSR_TX1_WIDX 0x0f84 68 #define IWI_CSR_TX2_WIDX 0x0f88 69 #define IWI_CSR_TX3_WIDX 0x0f8c 70 #define IWI_CSR_TX4_WIDX 0x0f90 71 #define IWI_CSR_RX_WIDX 0x0fa0 72 #define IWI_CSR_READ_INT 0x0ff4 73 74 /* aliases */ 75 #define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE 76 77 /* flags for IWI_CSR_INTR */ 78 #define IWI_INTR_RX_DONE 0x00000002 79 #define IWI_INTR_CMD_DONE 0x00000800 80 #define IWI_INTR_TX1_DONE 0x00001000 81 #define IWI_INTR_TX2_DONE 0x00002000 82 #define IWI_INTR_TX3_DONE 0x00004000 83 #define IWI_INTR_TX4_DONE 0x00008000 84 #define IWI_INTR_FW_INITED 0x01000000 85 #define IWI_INTR_RADIO_OFF 0x04000000 86 #define IWI_INTR_FATAL_ERROR 0x40000000 87 #define IWI_INTR_PARITY_ERROR 0x80000000 88 89 #define IWI_INTR_MASK \ 90 (IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | IWI_INTR_TX1_DONE | \ 91 IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \ 92 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \ 93 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR) 94 95 /* flags for IWI_CSR_RST */ 96 #define IWI_RST_PRINCETON_RESET 0x00000001 97 #define IWI_RST_SOFT_RESET 0x00000080 98 #define IWI_RST_MASTER_DISABLED 0x00000100 99 #define IWI_RST_STOP_MASTER 0x00000200 100 101 /* flags for IWI_CSR_CTL */ 102 #define IWI_CTL_CLOCK_READY 0x00000001 103 #define IWI_CTL_ALLOW_STANDBY 0x00000002 104 #define IWI_CTL_INIT 0x00000004 105 106 /* flags for IWI_CSR_IO */ 107 #define IWI_IO_RADIO_ENABLED 0x00010000 108 109 /* flags for IWI_CSR_READ_INT */ 110 #define IWI_READ_INT_INIT_HOST 0x20000000 111 112 /* constants for command blocks */ 113 #define IWI_CB_DEFAULT_CTL 0x8cea0000 114 #define IWI_CB_MAXDATALEN 8191 115 116 /* supported rates */ 117 #define IWI_RATE_DS1 10 118 #define IWI_RATE_DS2 20 119 #define IWI_RATE_DS5 55 120 #define IWI_RATE_DS11 110 121 #define IWI_RATE_OFDM6 13 122 #define IWI_RATE_OFDM9 15 123 #define IWI_RATE_OFDM12 5 124 #define IWI_RATE_OFDM18 7 125 #define IWI_RATE_OFDM24 9 126 #define IWI_RATE_OFDM36 11 127 #define IWI_RATE_OFDM48 1 128 #define IWI_RATE_OFDM54 3 129 130 /* firmware binary image header */ 131 struct iwi_firmware_hdr { 132 uint32_t version; 133 uint32_t mode; 134 } __packed; 135 136 struct iwi_hdr { 137 uint8_t type; 138 #define IWI_HDR_TYPE_DATA 0 139 #define IWI_HDR_TYPE_COMMAND 1 140 #define IWI_HDR_TYPE_NOTIF 3 141 #define IWI_HDR_TYPE_FRAME 9 142 143 uint8_t seq; 144 uint8_t flags; 145 #define IWI_HDR_FLAG_IRQ 0x04 146 147 uint8_t reserved; 148 } __packed; 149 150 struct iwi_notif { 151 uint32_t reserved[2]; 152 uint8_t type; 153 #define IWI_NOTIF_TYPE_ASSOCIATION 10 154 #define IWI_NOTIF_TYPE_AUTHENTICATION 11 155 #define IWI_NOTIF_TYPE_SCAN_CHANNEL 12 156 #define IWI_NOTIF_TYPE_SCAN_COMPLETE 13 157 #define IWI_NOTIF_TYPE_BEACON 17 158 #define IWI_NOTIF_TYPE_CALIBRATION 20 159 #define IWI_NOTIF_TYPE_NOISE 25 160 161 uint8_t flags; 162 uint16_t len; 163 } __packed; 164 165 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */ 166 struct iwi_notif_authentication { 167 uint8_t state; 168 #define IWI_DEAUTHENTICATED 0 169 #define IWI_AUTHENTICATED 9 170 } __packed; 171 172 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */ 173 struct iwi_notif_association { 174 uint8_t state; 175 #define IWI_DEASSOCIATED 0 176 #define IWI_ASSOCIATED 12 177 178 struct ieee80211_frame frame; 179 uint16_t capinfo; 180 uint16_t status; 181 uint16_t associd; 182 } __packed; 183 184 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */ 185 struct iwi_notif_scan_channel { 186 uint8_t nchan; 187 uint8_t reserved[47]; 188 } __packed; 189 190 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */ 191 struct iwi_notif_scan_complete { 192 uint8_t type; 193 uint8_t nchan; 194 uint8_t status; 195 uint8_t reserved; 196 } __packed; 197 198 /* received frame header */ 199 struct iwi_frame { 200 uint32_t reserved1[2]; 201 uint8_t chan; 202 uint8_t status; 203 uint8_t rate; 204 uint8_t rssi; 205 uint8_t agc; 206 uint8_t rssi_dbm; 207 uint16_t signal; 208 uint16_t noise; 209 uint8_t antenna; 210 uint8_t control; 211 uint8_t reserved2[2]; 212 uint16_t len; 213 } __packed; 214 215 /* header for transmission */ 216 struct iwi_tx_desc { 217 struct iwi_hdr hdr; 218 uint32_t reserved1; 219 uint8_t station; 220 uint8_t reserved2[3]; 221 uint8_t cmd; 222 #define IWI_DATA_CMD_TX 0x0b 223 224 uint8_t seq; 225 uint16_t len; 226 uint8_t priority; 227 uint8_t flags; 228 #define IWI_DATA_FLAG_SHPREAMBLE 0x04 229 #define IWI_DATA_FLAG_NO_WEP 0x20 230 #define IWI_DATA_FLAG_NEED_ACK 0x80 231 232 uint8_t xflags; 233 #define IWI_DATA_XFLAG_QOS 0x10 234 235 uint8_t wep_txkey; 236 uint8_t wepkey[IEEE80211_KEYBUF_SIZE]; 237 uint8_t rate; 238 uint8_t antenna; 239 uint8_t reserved3[10]; 240 struct ieee80211_qosframe_addr4 wh; 241 uint32_t iv; 242 uint32_t eiv; 243 uint32_t nseg; 244 #define IWI_MAX_NSEG 6 245 246 uint32_t seg_addr[IWI_MAX_NSEG]; 247 uint16_t seg_len[IWI_MAX_NSEG]; 248 } __packed; 249 250 /* command */ 251 struct iwi_cmd_desc { 252 struct iwi_hdr hdr; 253 uint8_t type; 254 #define IWI_CMD_ENABLE 2 255 #define IWI_CMD_SET_CONFIG 6 256 #define IWI_CMD_SET_ESSID 8 257 #define IWI_CMD_SET_MAC_ADDRESS 11 258 #define IWI_CMD_SET_RTS_THRESHOLD 15 259 #define IWI_CMD_SET_FRAG_THRESHOLD 16 260 #define IWI_CMD_SET_POWER_MODE 17 261 #define IWI_CMD_SET_WEP_KEY 18 262 #define IWI_CMD_ASSOCIATE 21 263 #define IWI_CMD_SET_RATES 22 264 #define IWI_CMD_ABORT_SCAN 23 265 #define IWI_CMD_SET_WME_PARAMS 25 266 #define IWI_CMD_SCAN 26 267 #define IWI_CMD_SET_OPTIE 31 268 #define IWI_CMD_DISABLE 33 269 #define IWI_CMD_SET_IV 34 270 #define IWI_CMD_SET_TX_POWER 35 271 #define IWI_CMD_SET_SENSITIVITY 42 272 #define IWI_CMD_SET_WMEIE 84 273 274 uint8_t len; 275 uint16_t reserved; 276 uint8_t data[120]; 277 } __packed; 278 279 /* node information (IBSS) */ 280 struct iwi_ibssnode { 281 uint8_t bssid[IEEE80211_ADDR_LEN]; 282 uint8_t reserved[2]; 283 } __packed; 284 285 /* constants for 'mode' fields */ 286 #define IWI_MODE_11A 0 287 #define IWI_MODE_11B 1 288 #define IWI_MODE_11G 2 289 290 /* possible values for command IWI_CMD_SET_POWER_MODE */ 291 #define IWI_POWER_MODE_CAM 0 292 293 /* structure for command IWI_CMD_SET_RATES */ 294 struct iwi_rateset { 295 uint8_t mode; 296 uint8_t nrates; 297 uint8_t type; 298 #define IWI_RATESET_TYPE_NEGOTIATED 0 299 #define IWI_RATESET_TYPE_SUPPORTED 1 300 301 uint8_t reserved; 302 uint8_t rates[12]; 303 } __packed; 304 305 /* structure for command IWI_CMD_SET_TX_POWER */ 306 struct iwi_txpower { 307 uint8_t nchan; 308 uint8_t mode; 309 struct { 310 uint8_t chan; 311 uint8_t power; 312 #define IWI_TXPOWER_MAX 20 313 #define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX) 314 } __packed chan[37]; 315 } __packed; 316 317 /* structure for command IWI_CMD_ASSOCIATE */ 318 struct iwi_associate { 319 uint8_t chan; 320 uint8_t auth; 321 #define IWI_AUTH_OPEN 0 322 #define IWI_AUTH_SHARED 1 323 #define IWI_AUTH_NONE 3 324 325 uint8_t type; 326 uint8_t reserved1; 327 uint16_t policy; 328 #define IWI_POLICY_WME 1 329 #define IWI_POLICY_WPA 2 330 331 uint8_t plen; 332 uint8_t mode; 333 uint8_t bssid[IEEE80211_ADDR_LEN]; 334 uint8_t tstamp[8]; 335 uint16_t capinfo; 336 uint16_t lintval; 337 uint16_t intval; 338 uint8_t dst[IEEE80211_ADDR_LEN]; 339 uint32_t reserved3; 340 uint16_t reserved4; 341 } __packed; 342 343 /* structure for command IWI_CMD_SCAN */ 344 struct iwi_scan { 345 uint32_t index; 346 uint8_t channels[54]; 347 #define IWI_CHAN_5GHZ (0 << 6) 348 #define IWI_CHAN_2GHZ (1 << 6) 349 350 uint8_t type[26]; 351 #define IWI_SCAN_TYPE_PASSIVE 0x11 352 #define IWI_SCAN_TYPE_DIRECTED 0x22 353 #define IWI_SCAN_TYPE_BROADCAST 0x33 354 #define IWI_SCAN_TYPE_BDIRECTED 0x44 355 356 uint8_t reserved1[2]; 357 uint16_t reserved2; 358 uint16_t passive; /* dwell time */ 359 uint16_t directed; /* dwell time */ 360 uint16_t broadcast; /* dwell time */ 361 uint16_t bdirected; /* dwell time */ 362 } __packed; 363 364 /* structure for command IWI_CMD_SET_CONFIG */ 365 struct iwi_configuration { 366 uint8_t bluetooth_coexistence; 367 uint8_t reserved1; 368 uint8_t answer_pbreq; 369 uint8_t allow_invalid_frames; 370 uint8_t multicast_enabled; 371 uint8_t drop_unicast_unencrypted; 372 uint8_t disable_unicast_decryption; 373 uint8_t drop_multicast_unencrypted; 374 uint8_t disable_multicast_decryption; 375 uint8_t antenna; 376 uint8_t reserved2; 377 uint8_t use_protection; 378 uint8_t protection_ctsonly; 379 uint8_t enable_multicast_filtering; 380 uint8_t bluetooth_threshold; 381 uint8_t reserved4; 382 uint8_t allow_beacon_and_probe_resp; 383 uint8_t allow_mgt; 384 uint8_t noise_reported; 385 uint8_t reserved5; 386 } __packed; 387 388 /* structure for command IWI_CMD_SET_WEP_KEY */ 389 struct iwi_wep_key { 390 uint8_t cmd; 391 #define IWI_WEP_KEY_CMD_SETKEY 0x08 392 393 uint8_t seq; 394 uint8_t idx; 395 uint8_t len; 396 uint8_t key[IEEE80211_KEYBUF_SIZE]; 397 } __packed; 398 399 /* structure for command IWI_CMD_SET_WME_PARAMS */ 400 struct iwi_wme_params { 401 uint16_t cwmin[WME_NUM_AC]; 402 uint16_t cwmax[WME_NUM_AC]; 403 uint8_t aifsn[WME_NUM_AC]; 404 uint8_t acm[WME_NUM_AC]; 405 uint16_t burst[WME_NUM_AC]; 406 } __packed; 407 408 #define IWI_MEM_EEPROM_CTL 0x00300040 409 410 #define IWI_EEPROM_MAC 0x21 411 412 #define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */ 413 414 #define IWI_EEPROM_C (1 << 0) /* Serial Clock */ 415 #define IWI_EEPROM_S (1 << 1) /* Chip Select */ 416 #define IWI_EEPROM_D (1 << 2) /* Serial data input */ 417 #define IWI_EEPROM_Q (1 << 4) /* Serial data output */ 418 419 #define IWI_EEPROM_SHIFT_D 2 420 #define IWI_EEPROM_SHIFT_Q 4 421 422 /* 423 * control and status registers access macros 424 */ 425 #define CSR_READ_1(sc, reg) \ 426 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 427 428 #define CSR_READ_2(sc, reg) \ 429 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 430 431 #define CSR_READ_4(sc, reg) \ 432 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 433 434 #define CSR_READ_REGION_4(sc, offset, datap, count) \ 435 bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 436 (datap), (count)) 437 438 #define CSR_WRITE_1(sc, reg, val) \ 439 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 440 441 #define CSR_WRITE_2(sc, reg, val) \ 442 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 443 444 #define CSR_WRITE_4(sc, reg, val) \ 445 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 446 447 #define CSR_WRITE_REGION_1(sc, offset, datap, count) \ 448 bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \ 449 (datap), (count)) 450 451 /* 452 * indirect memory space access macros 453 */ 454 #define MEM_WRITE_1(sc, addr, val) do { \ 455 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 456 CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 457 } while (/* CONSTCOND */0) 458 459 #define MEM_WRITE_2(sc, addr, val) do { \ 460 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 461 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 462 } while (/* CONSTCOND */0) 463 464 #define MEM_WRITE_4(sc, addr, val) do { \ 465 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 466 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 467 } while (/* CONSTCOND */0) 468 469 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \ 470 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 471 CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \ 472 } while (/* CONSTCOND */0) 473 474 /* 475 * EEPROM access macro 476 */ 477 #define IWI_EEPROM_CTL(sc, val) do { \ 478 MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \ 479 DELAY(IWI_EEPROM_DELAY); \ 480 } while (/* CONSTCOND */0) 481