1 /* $FreeBSD$ */ 2 /* 3 * Soft Definitions for for Qlogic ISP SCSI adapters. 4 * 5 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob 6 * NASA/Ames Research Center 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 */ 34 35 #ifndef _ISPVAR_H 36 #define _ISPVAR_H 37 38 #if defined(__NetBSD__) || defined(__OpenBSD__) 39 #include <dev/ic/ispmbox.h> 40 #ifdef ISP_TARGET_MODE 41 #include <dev/ic/isp_target.h> 42 #include <dev/ic/isp_tpublic.h> 43 #endif 44 #endif 45 #ifdef __FreeBSD__ 46 #include <dev/isp/ispmbox.h> 47 #ifdef ISP_TARGET_MODE 48 #include <dev/isp/isp_target.h> 49 #include <dev/isp/isp_tpublic.h> 50 #endif 51 #endif 52 #ifdef __linux__ 53 #include "ispmbox.h" 54 #ifdef ISP_TARGET_MODE 55 #include "isp_target.h" 56 #include "isp_tpublic.h" 57 #endif 58 #endif 59 60 #define ISP_CORE_VERSION_MAJOR 1 61 #define ISP_CORE_VERSION_MINOR 15 62 63 /* 64 * Vector for bus specific code to provide specific services. 65 */ 66 struct ispsoftc; 67 struct ispmdvec { 68 u_int16_t (*dv_rd_reg) __P((struct ispsoftc *, int)); 69 void (*dv_wr_reg) __P((struct ispsoftc *, int, u_int16_t)); 70 int (*dv_mbxdma) __P((struct ispsoftc *)); 71 int (*dv_dmaset) __P((struct ispsoftc *, 72 ISP_SCSI_XFER_T *, ispreq_t *, u_int16_t *, u_int16_t)); 73 void (*dv_dmaclr) 74 __P((struct ispsoftc *, ISP_SCSI_XFER_T *, u_int32_t)); 75 void (*dv_reset0) __P((struct ispsoftc *)); 76 void (*dv_reset1) __P((struct ispsoftc *)); 77 void (*dv_dregs) __P((struct ispsoftc *)); 78 const u_int16_t *dv_ispfw; /* ptr to f/w */ 79 u_int16_t dv_fwlen; /* length of f/w */ 80 u_int16_t dv_codeorg; /* code ORG for f/w */ 81 u_int32_t dv_fwrev; /* f/w revision */ 82 /* 83 * Initial values for conf1 register 84 */ 85 u_int16_t dv_conf1; 86 u_int16_t dv_clock; /* clock frequency */ 87 }; 88 89 #define MAX_TARGETS 16 90 #ifdef ISP2100_FABRIC 91 #define MAX_FC_TARG 256 92 #else 93 #define MAX_FC_TARG 126 94 #endif 95 96 #define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS) 97 #define ISP_MAX_LUNS(isp) (isp)->isp_maxluns 98 99 100 /* 101 * Macros to read, write ISP registers through bus specific code. 102 */ 103 104 #define ISP_READ(isp, reg) \ 105 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg)) 106 107 #define ISP_WRITE(isp, reg, val) \ 108 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val)) 109 110 #define ISP_MBOXDMASETUP(isp) \ 111 (*(isp)->isp_mdvec->dv_mbxdma)((isp)) 112 113 #define ISP_DMASETUP(isp, xs, req, iptrp, optr) \ 114 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr)) 115 116 #define ISP_DMAFREE(isp, xs, hndl) \ 117 if ((isp)->isp_mdvec->dv_dmaclr) \ 118 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl)) 119 120 #define ISP_RESET0(isp) \ 121 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp)) 122 #define ISP_RESET1(isp) \ 123 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp)) 124 #define ISP_DUMPREGS(isp) \ 125 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp)) 126 127 #define ISP_SETBITS(isp, reg, val) \ 128 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val)) 129 130 #define ISP_CLRBITS(isp, reg, val) \ 131 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val)) 132 133 /* this is the size of a queue entry (request and response) */ 134 #define QENTRY_LEN 64 135 /* both request and result queue length must be a power of two */ 136 #define RQUEST_QUEUE_LEN MAXISPREQUEST 137 /* I've seen wierdnesses with the result queue < 64 */ 138 #if MAXISPREQUEST > 64 139 #define RESULT_QUEUE_LEN (MAXISPREQUEST/2) 140 #else 141 #define RESULT_QUEUE_LEN MAXISPREQUEST 142 #endif 143 #define ISP_QUEUE_ENTRY(q, idx) ((q) + ((idx) * QENTRY_LEN)) 144 #define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN) 145 #define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1)) 146 #define ISP_QAVAIL(in, out, qlen) \ 147 ((in == out)? (qlen - 1) : ((in > out)? \ 148 ((qlen - 1) - (in - out)) : (out - in - 1))) 149 150 #define ISP_ADD_REQUEST(isp, iptr) \ 151 ISP_WRITE(isp, INMAILBOX4, iptr), isp->isp_reqidx = iptr 152 153 /* 154 * SCSI Specific Host Adapter Parameters- per bus, per target 155 */ 156 157 typedef struct { 158 u_int isp_gotdparms : 1, 159 isp_req_ack_active_neg : 1, 160 isp_data_line_active_neg: 1, 161 isp_cmd_dma_burst_enable: 1, 162 isp_data_dma_burst_enabl: 1, 163 isp_fifo_threshold : 3, 164 isp_ultramode : 1, 165 isp_diffmode : 1, 166 isp_lvdmode : 1, 167 : 1, 168 isp_initiator_id : 4, 169 isp_async_data_setup : 4; 170 u_int16_t isp_selection_timeout; 171 u_int16_t isp_max_queue_depth; 172 u_int8_t isp_tag_aging; 173 u_int8_t isp_bus_reset_delay; 174 u_int8_t isp_retry_count; 175 u_int8_t isp_retry_delay; 176 struct { 177 u_int dev_enable : 1, /* ignored */ 178 : 1, 179 dev_update : 1, 180 dev_refresh : 1, 181 exc_throttle : 8, 182 cur_offset : 4, 183 sync_offset : 4; 184 u_int8_t cur_period; /* current sync period */ 185 u_int8_t sync_period; /* goal sync period */ 186 u_int16_t dev_flags; /* goal device flags */ 187 u_int16_t cur_dflags; /* current device flags */ 188 } isp_devparam[MAX_TARGETS]; 189 } sdparam; 190 191 /* 192 * Device Flags 193 */ 194 #define DPARM_DISC 0x8000 195 #define DPARM_PARITY 0x4000 196 #define DPARM_WIDE 0x2000 197 #define DPARM_SYNC 0x1000 198 #define DPARM_TQING 0x0800 199 #define DPARM_ARQ 0x0400 200 #define DPARM_QFRZ 0x0200 201 #define DPARM_RENEG 0x0100 202 #define DPARM_NARROW 0x0080 /* Possibly only available with >= 7.55 fw */ 203 #define DPARM_ASYNC 0x0040 /* Possibly only available with >= 7.55 fw */ 204 #define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ) 205 #define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING)) 206 207 208 /* technically, not really correct, as they need to be rated based upon clock */ 209 #define ISP_40M_SYNCPARMS 0x080a 210 #define ISP_20M_SYNCPARMS 0x080c 211 #define ISP_10M_SYNCPARMS 0x0c19 212 #define ISP_08M_SYNCPARMS 0x0c25 213 #define ISP_05M_SYNCPARMS 0x0c32 214 #define ISP_04M_SYNCPARMS 0x0c41 215 216 /* 217 * Fibre Channel Specifics 218 */ 219 #define FL_PORT_ID 0x7e /* FL_Port Special ID */ 220 #define FC_PORT_ID 0x7f /* Fabric Controller Special ID */ 221 #define FC_SNS_ID 0x80 /* SNS Server Special ID */ 222 223 typedef struct { 224 u_int32_t isp_fwoptions : 16, 225 : 4, 226 loop_seen_once : 1, 227 isp_loopstate : 3, /* Current Loop State */ 228 isp_fwstate : 3, /* ISP F/W state */ 229 isp_gotdparms : 1, 230 isp_topo : 3, 231 isp_onfabric : 1; 232 u_int8_t isp_loopid; /* hard loop id */ 233 u_int8_t isp_alpa; /* ALPA */ 234 volatile u_int16_t isp_lipseq; /* LIP sequence # */ 235 u_int32_t isp_portid; 236 u_int8_t isp_execthrottle; 237 u_int8_t isp_retry_delay; 238 u_int8_t isp_retry_count; 239 u_int8_t isp_reserved; 240 u_int16_t isp_maxalloc; 241 u_int16_t isp_maxfrmlen; 242 u_int64_t isp_nodewwn; 243 u_int64_t isp_portwwn; 244 /* 245 * Port Data Base. This is indexed by 'target', which is invariate. 246 * However, elements within can move around due to loop changes, 247 * so the actual loop ID passed to the F/W is in this structure. 248 * The first time the loop is seen up, loopid will match the index 249 * (except for fabric nodes which are above mapped above FC_SNS_ID 250 * and are completely virtual), but subsequent LIPs can cause things 251 * to move around. 252 */ 253 struct lportdb { 254 u_int 255 loopid : 8, 256 : 4, 257 loggedin : 1, 258 roles : 2, 259 valid : 1; 260 u_int32_t portid; 261 u_int64_t node_wwn; 262 u_int64_t port_wwn; 263 } portdb[MAX_FC_TARG], tport[FL_PORT_ID]; 264 265 /* 266 * Scratch DMA mapped in area to fetch Port Database stuff, etc. 267 */ 268 caddr_t isp_scratch; 269 u_int32_t isp_scdma; 270 } fcparam; 271 272 #define FW_CONFIG_WAIT 0 273 #define FW_WAIT_AL_PA 1 274 #define FW_WAIT_LOGIN 2 275 #define FW_READY 3 276 #define FW_LOSS_OF_SYNC 4 277 #define FW_ERROR 5 278 #define FW_REINIT 6 279 #define FW_NON_PART 7 280 281 #define LOOP_NIL 0 282 #define LOOP_LIP_RCVD 1 283 #define LOOP_PDB_RCVD 2 284 #define LOOP_READY 7 285 286 #define TOPO_NL_PORT 0 287 #define TOPO_FL_PORT 1 288 #define TOPO_N_PORT 2 289 #define TOPO_F_PORT 3 290 #define TOPO_PTP_STUB 4 291 292 /* 293 * Soft Structure per host adapter 294 */ 295 struct ispsoftc { 296 /* 297 * Platform (OS) specific data 298 */ 299 struct isposinfo isp_osinfo; 300 301 /* 302 * Pointer to bus specific functions and data 303 */ 304 struct ispmdvec * isp_mdvec; 305 306 /* 307 * (Mostly) nonvolatile state. Board specific parameters 308 * may contain some volatile state (e.g., current loop state). 309 */ 310 311 void * isp_param; /* type specific */ 312 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */ 313 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */ 314 u_int16_t isp_maxcmds; /* max possible I/O cmds */ 315 u_int8_t isp_type; /* HBA Chip Type */ 316 u_int8_t isp_revision; /* HBA Chip H/W Revision */ 317 u_int32_t isp_maxluns; /* maximum luns supported */ 318 319 u_int32_t : 4, 320 isp_touched : 1, /* board ever seen? */ 321 isp_fast_mttr : 1, /* fast sram */ 322 isp_bustype : 1, /* SBus or PCI */ 323 isp_dogactive : 1, /* watchdog running */ 324 isp_dblev : 8, /* debug level */ 325 isp_clock : 8, /* input clock */ 326 isp_confopts : 8; /* config options */ 327 328 /* 329 * Volatile state 330 */ 331 332 volatile u_int32_t : 9, 333 isp_state : 3, 334 isp_sendmarker : 2, /* send a marker entry */ 335 isp_update : 2, /* update parameters */ 336 isp_nactive : 16; /* how many commands active */ 337 338 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */ 339 volatile u_int16_t isp_reqidx; /* index of next request */ 340 volatile u_int16_t isp_residx; /* index of next result */ 341 volatile u_int16_t isp_lasthdls; /* last handle seed */ 342 343 /* 344 * Active commands are stored here, indexed by handle functions. 345 */ 346 ISP_SCSI_XFER_T **isp_xflist; 347 348 /* 349 * request/result queue pointers and dma handles for them. 350 */ 351 caddr_t isp_rquest; 352 caddr_t isp_result; 353 u_int32_t isp_rquest_dma; 354 u_int32_t isp_result_dma; 355 }; 356 357 #define SDPARAM(isp) ((sdparam *) (isp)->isp_param) 358 #define FCPARAM(isp) ((fcparam *) (isp)->isp_param) 359 360 /* 361 * ISP States 362 */ 363 #define ISP_NILSTATE 0 364 #define ISP_RESETSTATE 1 365 #define ISP_INITSTATE 2 366 #define ISP_RUNSTATE 3 367 368 /* 369 * ISP Configuration Options 370 */ 371 #define ISP_CFG_NORELOAD 0x80 /* don't download f/w */ 372 #define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */ 373 #define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */ 374 #define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */ 375 #define ISP_CFG_NPORT 0x04 /* try to force N- instead of L-Port */ 376 377 #define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic) 378 #define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2]) 379 380 /* 381 * Bus (implementation) types 382 */ 383 #define ISP_BT_PCI 0 /* PCI Implementations */ 384 #define ISP_BT_SBUS 1 /* SBus Implementations */ 385 386 /* 387 * Chip Types 388 */ 389 #define ISP_HA_SCSI 0xf 390 #define ISP_HA_SCSI_UNKNOWN 0x1 391 #define ISP_HA_SCSI_1020 0x2 392 #define ISP_HA_SCSI_1020A 0x3 393 #define ISP_HA_SCSI_1040 0x4 394 #define ISP_HA_SCSI_1040A 0x5 395 #define ISP_HA_SCSI_1040B 0x6 396 #define ISP_HA_SCSI_1040C 0x7 397 #define ISP_HA_SCSI_1240 0x8 398 #define ISP_HA_SCSI_1080 0x9 399 #define ISP_HA_SCSI_1280 0xa 400 #define ISP_HA_SCSI_12160 0xb 401 #define ISP_HA_FC 0xf0 402 #define ISP_HA_FC_2100 0x10 403 #define ISP_HA_FC_2200 0x20 404 405 #define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI) 406 #define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240) 407 #define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080) 408 #define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280) 409 #define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160) 410 411 #define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp)) 412 #define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp)) 413 #define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_12160(isp)) 414 #define IS_ULTRA3(isp) (IS_12160(isp)) 415 416 #define IS_FC(isp) (isp->isp_type & ISP_HA_FC) 417 #define IS_2100(isp) (isp->isp_type == ISP_HA_FC_2100) 418 #define IS_2200(isp) (isp->isp_type == ISP_HA_FC_2200) 419 420 421 /* 422 * Function Prototypes 423 */ 424 425 /* 426 * Reset Hardware. Totally. Assumes that you'll follow this with 427 * a call to isp_init. 428 */ 429 void isp_reset __P((struct ispsoftc *)); 430 431 /* 432 * Initialize Hardware to known state 433 */ 434 void isp_init __P((struct ispsoftc *)); 435 436 /* 437 * Reset the ISP and call completion for any orphaned commands. 438 */ 439 void isp_restart __P((struct ispsoftc *)); 440 441 /* 442 * Interrupt Service Routine 443 */ 444 int isp_intr __P((void *)); 445 446 /* 447 * Command Entry Point 448 */ 449 int32_t ispscsicmd __P((ISP_SCSI_XFER_T *)); 450 451 /* 452 * Platform Dependent to External to Internal Control Function 453 * 454 * Assumes all locks are held and that no reentrancy issues need be dealt with. 455 * 456 */ 457 typedef enum { 458 ISPCTL_RESET_BUS, /* Reset Bus */ 459 ISPCTL_RESET_DEV, /* Reset Device */ 460 ISPCTL_ABORT_CMD, /* Abort Command */ 461 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters */ 462 ISPCTL_FCLINK_TEST, /* Test FC Link Status */ 463 ISPCTL_PDB_SYNC, /* Synchronize Port Database */ 464 ISPCTL_TOGGLE_TMODE /* toggle target mode */ 465 } ispctl_t; 466 int isp_control __P((struct ispsoftc *, ispctl_t, void *)); 467 468 469 /* 470 * Platform Dependent to Internal to External Control Function 471 * (each platform must provide such a function) 472 * 473 * Assumes all locks are held and that no reentrancy issues need be dealt with. 474 * 475 */ 476 477 typedef enum { 478 ISPASYNC_NEW_TGT_PARAMS, 479 ISPASYNC_BUS_RESET, /* Bus Was Reset */ 480 ISPASYNC_LOOP_DOWN, /* FC Loop Down */ 481 ISPASYNC_LOOP_UP, /* FC Loop Up */ 482 ISPASYNC_PDB_CHANGED, /* FC Port Data Base Changed */ 483 ISPASYNC_CHANGE_NOTIFY, /* FC SNS Change Notification */ 484 ISPASYNC_FABRIC_DEV, /* FC New Fabric Device */ 485 ISPASYNC_TARGET_MESSAGE, /* target message */ 486 ISPASYNC_TARGET_EVENT, /* target asynchronous event */ 487 ISPASYNC_TARGET_ACTION /* other target command action */ 488 } ispasync_t; 489 int isp_async __P((struct ispsoftc *, ispasync_t, void *)); 490 491 /* 492 * lost command routine (XXXX IN TRANSITION XXXX) 493 */ 494 void isp_lostcmd __P((struct ispsoftc *, ISP_SCSI_XFER_T *)); 495 496 #endif /* _ISPVAR_H */ 497