1 /* $FreeBSD$ */ 2 /*- 3 * Soft Definitions for for Qlogic ISP SCSI adapters. 4 * 5 * Copyright (c) 1997-2006 by Matthew Jacob 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #ifndef _ISPVAR_H 31 #define _ISPVAR_H 32 33 #if defined(__NetBSD__) || defined(__OpenBSD__) 34 #include <dev/ic/ispmbox.h> 35 #endif 36 #ifdef __FreeBSD__ 37 #include <dev/isp/ispmbox.h> 38 #endif 39 #ifdef __linux__ 40 #include "ispmbox.h" 41 #endif 42 #ifdef __svr4__ 43 #include "ispmbox.h" 44 #endif 45 46 #define ISP_CORE_VERSION_MAJOR 2 47 #define ISP_CORE_VERSION_MINOR 11 48 49 /* 50 * Vector for bus specific code to provide specific services. 51 */ 52 typedef struct ispsoftc ispsoftc_t; 53 struct ispmdvec { 54 int (*dv_rd_isr) 55 (ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); 56 uint16_t (*dv_rd_reg) (ispsoftc_t *, int); 57 void (*dv_wr_reg) (ispsoftc_t *, int, uint16_t); 58 int (*dv_mbxdma) (ispsoftc_t *); 59 int (*dv_dmaset) 60 (ispsoftc_t *, XS_T *, ispreq_t *, uint16_t *, uint16_t); 61 void (*dv_dmaclr) (ispsoftc_t *, XS_T *, uint16_t); 62 void (*dv_reset0) (ispsoftc_t *); 63 void (*dv_reset1) (ispsoftc_t *); 64 void (*dv_dregs) (ispsoftc_t *, const char *); 65 uint16_t *dv_ispfw; /* ptr to f/w */ 66 uint16_t dv_conf1; 67 uint16_t dv_clock; /* clock frequency */ 68 }; 69 70 /* 71 * Overall parameters 72 */ 73 #define MAX_TARGETS 16 74 #define MAX_FC_TARG 256 75 #define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS) 76 #define ISP_MAX_LUNS(isp) (isp)->isp_maxluns 77 78 /* 79 * Macros to access ISP registers through bus specific layers- 80 * mostly wrappers to vector through the mdvec structure. 81 */ 82 #define ISP_READ_ISR(isp, isrp, semap, mbox0p) \ 83 (*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, mbox0p) 84 85 #define ISP_READ(isp, reg) \ 86 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg)) 87 88 #define ISP_WRITE(isp, reg, val) \ 89 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val)) 90 91 #define ISP_MBOXDMASETUP(isp) \ 92 (*(isp)->isp_mdvec->dv_mbxdma)((isp)) 93 94 #define ISP_DMASETUP(isp, xs, req, iptrp, optr) \ 95 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr)) 96 97 #define ISP_DMAFREE(isp, xs, hndl) \ 98 if ((isp)->isp_mdvec->dv_dmaclr) \ 99 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl)) 100 101 #define ISP_RESET0(isp) \ 102 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp)) 103 #define ISP_RESET1(isp) \ 104 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp)) 105 #define ISP_DUMPREGS(isp, m) \ 106 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m)) 107 108 #define ISP_SETBITS(isp, reg, val) \ 109 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val)) 110 111 #define ISP_CLRBITS(isp, reg, val) \ 112 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val)) 113 114 /* 115 * The MEMORYBARRIER macro is defined per platform (to provide synchronization 116 * on Request and Response Queues, Scratch DMA areas, and Registers) 117 * 118 * Defined Memory Barrier Synchronization Types 119 */ 120 #define SYNC_REQUEST 0 /* request queue synchronization */ 121 #define SYNC_RESULT 1 /* result queue synchronization */ 122 #define SYNC_SFORDEV 2 /* scratch, sync for ISP */ 123 #define SYNC_SFORCPU 3 /* scratch, sync for CPU */ 124 #define SYNC_REG 4 /* for registers */ 125 126 /* 127 * Request/Response Queue defines and macros. 128 * The maximum is defined per platform (and can be based on board type). 129 */ 130 /* This is the size of a queue entry (request and response) */ 131 #define QENTRY_LEN 64 132 /* Both request and result queue length must be a power of two */ 133 #define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x) 134 #ifdef ISP_TARGET_MODE 135 #define RESULT_QUEUE_LEN(x) MAXISPREQUEST(x) 136 #else 137 #define RESULT_QUEUE_LEN(x) \ 138 (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2) 139 #endif 140 #define ISP_QUEUE_ENTRY(q, idx) (((uint8_t *)q) + ((idx) * QENTRY_LEN)) 141 #define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN) 142 #define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1)) 143 #define ISP_QFREE(in, out, qlen) \ 144 ((in == out)? (qlen - 1) : ((in > out)? \ 145 ((qlen - 1) - (in - out)) : (out - in - 1))) 146 #define ISP_QAVAIL(isp) \ 147 ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp)) 148 149 #define ISP_ADD_REQUEST(isp, nxti) \ 150 MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN); \ 151 WRITE_REQUEST_QUEUE_IN_POINTER(isp, nxti); \ 152 isp->isp_reqidx = nxti 153 154 /* 155 * SCSI Specific Host Adapter Parameters- per bus, per target 156 */ 157 typedef struct { 158 uint32_t isp_gotdparms : 1, 159 isp_req_ack_active_neg : 1, 160 isp_data_line_active_neg: 1, 161 isp_cmd_dma_burst_enable: 1, 162 isp_data_dma_burst_enabl: 1, 163 isp_fifo_threshold : 3, 164 isp_ultramode : 1, 165 isp_diffmode : 1, 166 isp_lvdmode : 1, 167 isp_fast_mttr : 1, /* fast sram */ 168 isp_initiator_id : 4, 169 isp_async_data_setup : 4; 170 uint16_t isp_selection_timeout; 171 uint16_t isp_max_queue_depth; 172 uint8_t isp_tag_aging; 173 uint8_t isp_bus_reset_delay; 174 uint8_t isp_retry_count; 175 uint8_t isp_retry_delay; 176 struct { 177 uint32_t 178 exc_throttle : 8, 179 : 1, 180 dev_enable : 1, /* ignored */ 181 dev_update : 1, 182 dev_refresh : 1, 183 actv_offset : 4, 184 goal_offset : 4, 185 nvrm_offset : 4; 186 uint8_t actv_period; /* current sync period */ 187 uint8_t goal_period; /* goal sync period */ 188 uint8_t nvrm_period; /* nvram sync period */ 189 uint16_t actv_flags; /* current device flags */ 190 uint16_t goal_flags; /* goal device flags */ 191 uint16_t nvrm_flags; /* nvram device flags */ 192 } isp_devparam[MAX_TARGETS]; 193 } sdparam; 194 195 /* 196 * Device Flags 197 */ 198 #define DPARM_DISC 0x8000 199 #define DPARM_PARITY 0x4000 200 #define DPARM_WIDE 0x2000 201 #define DPARM_SYNC 0x1000 202 #define DPARM_TQING 0x0800 203 #define DPARM_ARQ 0x0400 204 #define DPARM_QFRZ 0x0200 205 #define DPARM_RENEG 0x0100 206 #define DPARM_NARROW 0x0080 207 #define DPARM_ASYNC 0x0040 208 #define DPARM_PPR 0x0020 209 #define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ) 210 #define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING)) 211 212 /* technically, not really correct, as they need to be rated based upon clock */ 213 #define ISP_80M_SYNCPARMS 0x0c09 214 #define ISP_40M_SYNCPARMS 0x0c0a 215 #define ISP_20M_SYNCPARMS 0x0c0c 216 #define ISP_20M_SYNCPARMS_1040 0x080c 217 #define ISP_10M_SYNCPARMS 0x0c19 218 #define ISP_08M_SYNCPARMS 0x0c25 219 #define ISP_05M_SYNCPARMS 0x0c32 220 #define ISP_04M_SYNCPARMS 0x0c41 221 222 /* 223 * Fibre Channel Specifics 224 */ 225 #define FL_PORT_ID 0x7e /* FL_Port Special ID */ 226 #define FC_PORT_ID 0x7f /* Fabric Controller Special ID */ 227 #define FC_SNS_ID 0x80 /* SNS Server Special ID */ 228 229 /* #define ISP_USE_GA_NXT 1 */ /* Use GA_NXT with switches */ 230 #ifndef GA_NXT_MAX 231 #define GA_NXT_MAX 256 232 #endif 233 234 typedef struct { 235 uint32_t : 13, 236 isp_gbspeed : 3, 237 : 1, 238 isp_iid_set : 1, 239 loop_seen_once : 1, 240 isp_loopstate : 4, /* Current Loop State */ 241 isp_fwstate : 4, /* ISP F/W state */ 242 isp_gotdparms : 1, 243 isp_topo : 3, 244 isp_onfabric : 1; 245 uint32_t : 8, 246 isp_portid : 24; /* S_ID */ 247 uint16_t isp_fwoptions; 248 uint16_t isp_xfwoptions; 249 uint16_t isp_zfwoptions; 250 uint16_t isp_iid; /* 'initiator' id */ 251 uint16_t isp_loopid; /* hard loop id */ 252 uint16_t isp_fwattr; /* firmware attributes */ 253 uint16_t isp_execthrottle; 254 uint8_t isp_retry_delay; 255 uint8_t isp_retry_count; 256 uint8_t isp_reserved; 257 uint16_t isp_maxalloc; 258 uint16_t isp_maxfrmlen; 259 uint64_t isp_nodewwn; 260 uint64_t isp_portwwn; 261 /* 262 * Port Data Base. This is indexed by 'target', which is invariate. 263 * However, elements within can move around due to loop changes, 264 * so the actual loop ID passed to the F/W is in this structure. 265 * The first time the loop is seen up, loopid will match the index 266 * (except for fabric nodes which are above mapped above FC_SNS_ID 267 * and are completely virtual), but subsequent LIPs can cause things 268 * to move around. 269 */ 270 struct lportdb { 271 uint32_t loopid : 16, 272 : 2, 273 fc4_type : 4, 274 last_fabric_dev : 1, 275 relogin : 1, 276 force_logout : 1, 277 was_fabric_dev : 1, 278 fabric_dev : 1, 279 loggedin : 1, 280 roles : 2, 281 tvalid : 1, 282 valid : 1; 283 uint32_t port_type : 8, 284 portid : 24; 285 uint64_t node_wwn; 286 uint64_t port_wwn; 287 } portdb[MAX_FC_TARG], tport[FC_PORT_ID]; 288 289 /* 290 * Scratch DMA mapped in area to fetch Port Database stuff, etc. 291 */ 292 void * isp_scratch; 293 XS_DMA_ADDR_T isp_scdma; 294 #ifdef ISP_FW_CRASH_DUMP 295 uint16_t * isp_dump_data; 296 #endif 297 } fcparam; 298 299 #define FW_CONFIG_WAIT 0 300 #define FW_WAIT_AL_PA 1 301 #define FW_WAIT_LOGIN 2 302 #define FW_READY 3 303 #define FW_LOSS_OF_SYNC 4 304 #define FW_ERROR 5 305 #define FW_REINIT 6 306 #define FW_NON_PART 7 307 308 #define LOOP_NIL 0 309 #define LOOP_LIP_RCVD 1 310 #define LOOP_PDB_RCVD 2 311 #define LOOP_SCANNING_FABRIC 3 312 #define LOOP_FSCAN_DONE 4 313 #define LOOP_SCANNING_LOOP 5 314 #define LOOP_LSCAN_DONE 6 315 #define LOOP_SYNCING_PDB 7 316 #define LOOP_READY 8 317 318 #define TOPO_NL_PORT 0 319 #define TOPO_FL_PORT 1 320 #define TOPO_N_PORT 2 321 #define TOPO_F_PORT 3 322 #define TOPO_PTP_STUB 4 323 324 /* 325 * Soft Structure per host adapter 326 */ 327 struct ispsoftc { 328 /* 329 * Platform (OS) specific data 330 */ 331 struct isposinfo isp_osinfo; 332 333 /* 334 * Pointer to bus specific functions and data 335 */ 336 struct ispmdvec * isp_mdvec; 337 338 /* 339 * (Mostly) nonvolatile state. Board specific parameters 340 * may contain some volatile state (e.g., current loop state). 341 */ 342 343 void * isp_param; /* type specific */ 344 uint16_t isp_fwrev[3]; /* Loaded F/W revision */ 345 uint16_t isp_romfw_rev[3]; /* PROM F/W revision */ 346 uint16_t isp_maxcmds; /* max possible I/O cmds */ 347 uint8_t isp_type; /* HBA Chip Type */ 348 uint8_t isp_revision; /* HBA Chip H/W Revision */ 349 uint32_t isp_maxluns; /* maximum luns supported */ 350 351 uint32_t isp_clock : 8, /* input clock */ 352 : 4, 353 isp_port : 1, /* 23XX only */ 354 isp_failed : 1, /* board failed */ 355 isp_open : 1, /* opened (ioctl) */ 356 isp_touched : 1, /* board ever seen? */ 357 isp_bustype : 1, /* SBus or PCI */ 358 isp_loaded_fw : 1, /* loaded firmware */ 359 isp_role : 2, /* roles supported */ 360 isp_dblev : 12; /* debug log mask */ 361 362 uint32_t isp_confopts; /* config options */ 363 364 uint16_t isp_rqstinrp; /* register for REQINP */ 365 uint16_t isp_rqstoutrp; /* register for REQOUTP */ 366 uint16_t isp_respinrp; /* register for RESINP */ 367 uint16_t isp_respoutrp; /* register for RESOUTP */ 368 369 /* 370 * Instrumentation 371 */ 372 uint64_t isp_intcnt; /* total int count */ 373 uint64_t isp_intbogus; /* spurious int count */ 374 uint64_t isp_intmboxc; /* mbox completions */ 375 uint64_t isp_intoasync; /* other async */ 376 uint64_t isp_rsltccmplt; /* CMDs on result q */ 377 uint64_t isp_fphccmplt; /* CMDs via fastpost */ 378 uint16_t isp_rscchiwater; 379 uint16_t isp_fpcchiwater; 380 381 /* 382 * Volatile state 383 */ 384 385 volatile uint32_t : 8, 386 isp_mboxbsy : 1, /* mailbox command active */ 387 isp_state : 3, 388 isp_sendmarker : 2, /* send a marker entry */ 389 isp_update : 2, /* update parameters */ 390 isp_nactive : 16; /* how many commands active */ 391 volatile uint16_t isp_reqodx; /* index of last ISP pickup */ 392 volatile uint16_t isp_reqidx; /* index of next request */ 393 volatile uint16_t isp_residx; /* index of next result */ 394 volatile uint16_t isp_resodx; /* index of next result */ 395 volatile uint16_t isp_rspbsy; 396 volatile uint16_t isp_lasthdls; /* last handle seed */ 397 volatile uint16_t isp_obits; /* mailbox command output */ 398 volatile uint16_t isp_mboxtmp[MAILBOX_STORAGE]; 399 volatile uint16_t isp_lastmbxcmd; /* last mbox command sent */ 400 volatile uint16_t isp_mbxwrk0; 401 volatile uint16_t isp_mbxwrk1; 402 volatile uint16_t isp_mbxwrk2; 403 volatile uint16_t isp_mbxwrk8; 404 void * isp_mbxworkp; 405 406 /* 407 * Active commands are stored here, indexed by handle functions. 408 */ 409 XS_T **isp_xflist; 410 411 #ifdef ISP_TARGET_MODE 412 /* 413 * Active target commands are stored here, indexed by handle function. 414 */ 415 void **isp_tgtlist; 416 #endif 417 418 /* 419 * request/result queue pointers and DMA handles for them. 420 */ 421 void * isp_rquest; 422 void * isp_result; 423 XS_DMA_ADDR_T isp_rquest_dma; 424 XS_DMA_ADDR_T isp_result_dma; 425 }; 426 427 #define SDPARAM(isp) ((sdparam *) (isp)->isp_param) 428 #define FCPARAM(isp) ((fcparam *) (isp)->isp_param) 429 430 /* 431 * ISP Driver Run States 432 */ 433 #define ISP_NILSTATE 0 434 #define ISP_CRASHED 1 435 #define ISP_RESETSTATE 2 436 #define ISP_INITSTATE 3 437 #define ISP_RUNSTATE 4 438 439 /* 440 * ISP Configuration Options 441 */ 442 #define ISP_CFG_NORELOAD 0x80 /* don't download f/w */ 443 #define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */ 444 #define ISP_CFG_TWOGB 0x20 /* force 2GB connection (23XX only) */ 445 #define ISP_CFG_ONEGB 0x10 /* force 1GB connection (23XX only) */ 446 #define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */ 447 #define ISP_CFG_PORT_PREF 0x0C /* Mask for Port Prefs (2200 only) */ 448 #define ISP_CFG_LPORT 0x00 /* prefer {N/F}L-Port connection */ 449 #define ISP_CFG_NPORT 0x04 /* prefer {N/F}-Port connection */ 450 #define ISP_CFG_NPORT_ONLY 0x08 /* insist on {N/F}-Port connection */ 451 #define ISP_CFG_LPORT_ONLY 0x0C /* insist on {N/F}L-Port connection */ 452 #define ISP_CFG_OWNWWPN 0x100 /* override NVRAM wwpn */ 453 #define ISP_CFG_OWNWWNN 0x200 /* override NVRAM wwnn */ 454 #define ISP_CFG_OWNFSZ 0x400 /* override NVRAM frame size */ 455 #define ISP_CFG_OWNLOOPID 0x800 /* override NVRAM loopid */ 456 #define ISP_CFG_OWNEXCTHROTTLE 0x1000 /* override NVRAM execution throttle */ 457 458 /* 459 * Prior to calling isp_reset for the first time, the outer layer 460 * should set isp_role to one of NONE, INITIATOR, TARGET, BOTH. 461 * 462 * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded, 463 * NVRAM read, and defaults set, but any further initialization (e.g. 464 * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done. 465 * 466 * If INITIATOR MODE isn't set, attempts to run commands will be stopped 467 * at isp_start and completed with the moral equivalent of SELECTION TIMEOUT. 468 * 469 * If TARGET MODE is set, it doesn't mean that the rest of target mode support 470 * needs to be enabled, or will even work. What happens with the 2X00 cards 471 * here is that if you have enabled it with TARGET MODE as part of the ICB 472 * options, but you haven't given the f/w any ram resources for ATIOs or 473 * Immediate Notifies, the f/w just handles what it can and you never see 474 * anything. Basically, it sends a single byte of data (the first byte, 475 * which you can set as part of the INITIALIZE CONTROL BLOCK command) for 476 * INQUIRY, and sends back QUEUE FULL status for any other command. 477 * 478 */ 479 #define ISP_ROLE_NONE 0x0 480 #define ISP_ROLE_TARGET 0x1 481 #define ISP_ROLE_INITIATOR 0x2 482 #define ISP_ROLE_BOTH (ISP_ROLE_TARGET|ISP_ROLE_INITIATOR) 483 #define ISP_ROLE_EITHER ISP_ROLE_BOTH 484 #ifndef ISP_DEFAULT_ROLES 485 #define ISP_DEFAULT_ROLES ISP_ROLE_INITIATOR 486 #endif 487 488 489 /* 490 * Firmware related defines 491 */ 492 #define ISP_CODE_ORG 0x1000 /* default f/w code start */ 493 #define ISP_CODE_ORG_2300 0x0800 /* ..except for 2300s */ 494 #define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic) 495 #define ISP_FW_MAJOR(code) ((code >> 24) & 0xff) 496 #define ISP_FW_MINOR(code) ((code >> 16) & 0xff) 497 #define ISP_FW_MICRO(code) ((code >> 8) & 0xff) 498 #define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2]) 499 #define ISP_FW_MAJORX(xp) (xp[0]) 500 #define ISP_FW_MINORX(xp) (xp[1]) 501 #define ISP_FW_MICROX(xp) (xp[2]) 502 #define ISP_FW_NEWER_THAN(i, major, minor, micro) \ 503 (ISP_FW_REVX((i)->isp_fwrev) > ISP_FW_REV(major, minor, micro)) 504 505 /* 506 * Bus (implementation) types 507 */ 508 #define ISP_BT_PCI 0 /* PCI Implementations */ 509 #define ISP_BT_SBUS 1 /* SBus Implementations */ 510 511 /* 512 * If we have not otherwise defined SBus support away make sure 513 * it is defined here such that the code is included as default 514 */ 515 #ifndef ISP_SBUS_SUPPORTED 516 #define ISP_SBUS_SUPPORTED 1 517 #endif 518 519 /* 520 * Chip Types 521 */ 522 #define ISP_HA_SCSI 0xf 523 #define ISP_HA_SCSI_UNKNOWN 0x1 524 #define ISP_HA_SCSI_1020 0x2 525 #define ISP_HA_SCSI_1020A 0x3 526 #define ISP_HA_SCSI_1040 0x4 527 #define ISP_HA_SCSI_1040A 0x5 528 #define ISP_HA_SCSI_1040B 0x6 529 #define ISP_HA_SCSI_1040C 0x7 530 #define ISP_HA_SCSI_1240 0x8 531 #define ISP_HA_SCSI_1080 0x9 532 #define ISP_HA_SCSI_1280 0xa 533 #define ISP_HA_SCSI_10160 0xb 534 #define ISP_HA_SCSI_12160 0xc 535 #define ISP_HA_FC 0xf0 536 #define ISP_HA_FC_2100 0x10 537 #define ISP_HA_FC_2200 0x20 538 #define ISP_HA_FC_2300 0x30 539 #define ISP_HA_FC_2312 0x40 540 #define ISP_HA_FC_2322 0x50 541 #define ISP_HA_FC_2400 0x60 542 #define ISP_HA_FC_2422 0x61 543 544 #define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI) 545 #define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240) 546 #define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080) 547 #define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280) 548 #define IS_10160(isp) (isp->isp_type == ISP_HA_SCSI_10160) 549 #define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160) 550 551 #define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp)) 552 #define IS_1X160(isp) (IS_10160(isp) || IS_12160(isp)) 553 #define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp)) 554 #define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_1X160(isp)) 555 #define IS_ULTRA3(isp) (IS_1X160(isp)) 556 557 #define IS_FC(isp) ((isp)->isp_type & ISP_HA_FC) 558 #define IS_2100(isp) ((isp)->isp_type == ISP_HA_FC_2100) 559 #define IS_2200(isp) ((isp)->isp_type == ISP_HA_FC_2200) 560 #define IS_23XX(isp) \ 561 ((isp)->isp_type >= ISP_HA_FC_2300 && (isp)->isp_type < ISP_HA_FC_2400) 562 #define IS_2300(isp) ((isp)->isp_type == ISP_HA_FC_2300) 563 #define IS_2312(isp) ((isp)->isp_type == ISP_HA_FC_2312) 564 #define IS_2322(isp) ((isp)->isp_type == ISP_HA_FC_2322) 565 #define IS_24XX(isp) ((isp)->isp_type >= ISP_HA_FC_2400) 566 567 /* 568 * DMA related macros 569 */ 570 #define DMA_WD3(x) ((((uint64_t)x) >> 48) & 0xffff) 571 #define DMA_WD2(x) ((((uint64_t)x) >> 32) & 0xffff) 572 #define DMA_WD1(x) (((x) >> 16) & 0xffff) 573 #define DMA_WD0(x) (((x) & 0xffff)) 574 575 #define DMA_LO32(x) ((uint32_t) (x)) 576 #define DMA_HI32(x) ((uint32_t)(((uint64_t)x) >> 32)) 577 578 /* 579 * Core System Function Prototypes 580 */ 581 582 /* 583 * Reset Hardware. Totally. Assumes that you'll follow this with 584 * a call to isp_init. 585 */ 586 void isp_reset(ispsoftc_t *); 587 588 /* 589 * Initialize Hardware to known state 590 */ 591 void isp_init(ispsoftc_t *); 592 593 /* 594 * Reset the ISP and call completion for any orphaned commands. 595 */ 596 void isp_reinit(ispsoftc_t *); 597 598 #ifdef ISP_FW_CRASH_DUMP 599 /* 600 * Dump firmware entry point. 601 */ 602 void isp_fw_dump(ispsoftc_t *isp); 603 #endif 604 605 /* 606 * Internal Interrupt Service Routine 607 * 608 * The outer layers do the spade work to get the appropriate status register, 609 * semaphore register and first mailbox register (if appropriate). This also 610 * means that most spurious/bogus interrupts not for us can be filtered first. 611 */ 612 void isp_intr(ispsoftc_t *, uint16_t, uint16_t, uint16_t); 613 614 615 /* 616 * Command Entry Point- Platform Dependent layers call into this 617 */ 618 int isp_start(XS_T *); 619 620 /* these values are what isp_start returns */ 621 #define CMD_COMPLETE 101 /* command completed */ 622 #define CMD_EAGAIN 102 /* busy- maybe retry later */ 623 #define CMD_QUEUED 103 /* command has been queued for execution */ 624 #define CMD_RQLATER 104 /* requeue this command later */ 625 626 /* 627 * Command Completion Point- Core layers call out from this with completed cmds 628 */ 629 void isp_done(XS_T *); 630 631 /* 632 * Platform Dependent to External to Internal Control Function 633 * 634 * Assumes locks are held on entry. You should note that with many of 635 * these commands and locks may be released while this is occurring. 636 * 637 * A few notes about some of these functions: 638 * 639 * ISPCTL_FCLINK_TEST tests to make sure we have good fibre channel link. 640 * The argument is a pointer to an integer which is the time, in microseconds, 641 * we should wait to see whether we have good link. This test, if successful, 642 * lets us know our connection topology and our Loop ID/AL_PA and so on. 643 * You can't get anywhere without this. 644 * 645 * ISPCTL_SCAN_FABRIC queries the name server (if we're on a fabric) for 646 * all entities using the FC Generic Services subcommand GET ALL NEXT. 647 * For each found entity, an ISPASYNC_FABRICDEV event is generated (see 648 * below). 649 * 650 * ISPCTL_SCAN_LOOP does a local loop scan. This is only done if the connection 651 * topology is NL or FL port (private or public loop). Since the Qlogic f/w 652 * 'automatically' manages local loop connections, this function essentially 653 * notes the arrival, departure, and possible shuffling around of local loop 654 * entities. Thus for each arrival and departure this generates an isp_async 655 * event of ISPASYNC_PROMENADE (see below). 656 * 657 * ISPCTL_PDB_SYNC is somewhat misnamed. It actually is the final step, in 658 * order, of ISPCTL_FCLINK_TEST, ISPCTL_SCAN_FABRIC, and ISPCTL_SCAN_LOOP. 659 * The main purpose of ISPCTL_PDB_SYNC is to complete management of logging 660 * and logging out of fabric devices (if one is on a fabric) and then marking 661 * the 'loop state' as being ready to now be used for sending commands to 662 * devices. Originally fabric name server and local loop scanning were 663 * part of this function. It's now been separated to allow for finer control. 664 */ 665 typedef enum { 666 ISPCTL_RESET_BUS, /* Reset Bus */ 667 ISPCTL_RESET_DEV, /* Reset Device */ 668 ISPCTL_ABORT_CMD, /* Abort Command */ 669 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters (SCSI) */ 670 ISPCTL_FCLINK_TEST, /* Test FC Link Status */ 671 ISPCTL_SCAN_FABRIC, /* (Re)scan Fabric Name Server */ 672 ISPCTL_SCAN_LOOP, /* (Re)scan Local Loop */ 673 ISPCTL_PDB_SYNC, /* Synchronize Port Database */ 674 ISPCTL_SEND_LIP, /* Send a LIP */ 675 ISPCTL_GET_POSMAP, /* Get FC-AL position map */ 676 ISPCTL_RUN_MBOXCMD, /* run a mailbox command */ 677 ISPCTL_TOGGLE_TMODE, /* toggle target mode */ 678 ISPCTL_GET_PDB /* get a single port database entry */ 679 } ispctl_t; 680 int isp_control(ispsoftc_t *, ispctl_t, void *); 681 682 683 /* 684 * Platform Dependent to Internal to External Control Function 685 * (each platform must provide such a function) 686 * 687 * Assumes locks are held. 688 * 689 * A few notes about some of these functions: 690 * 691 * ISPASYNC_CHANGE_NOTIFY notifies the outer layer that a change has 692 * occurred that invalidates the list of fabric devices known and/or 693 * the list of known loop devices. The argument passed is a pointer 694 * whose values are defined below (local loop change, name server 695 * change, other). 'Other' may simply be a LIP, or a change in 696 * connection topology. 697 * 698 * ISPASYNC_FABRIC_DEV announces the next element in a list of 699 * fabric device names we're getting out of the name server. The 700 * argument points to a GET ALL NEXT response structure. The list 701 * is known to terminate with an entry that refers to ourselves. 702 * One of the main purposes of this function is to allow outer 703 * layers, which are OS dependent, to set policy as to which fabric 704 * devices might actually be logged into (and made visible) later 705 * at ISPCTL_PDB_SYNC time. Since there's a finite number of fabric 706 * devices that we can log into (256 less 3 'reserved' for F-port 707 * topologies), and fabrics can grow up to 8 million or so entries 708 * (24 bits of Port Address, less a wad of reserved spaces), clearly 709 * we had better let the OS determine login policy. 710 * 711 * ISPASYNC_PROMENADE has an argument that is a pointer to an integer which 712 * is an index into the portdb in the softc ('target'). Whether that entry's 713 * valid tag is set or not says whether something has arrived or departed. 714 * The name refers to a favorite pastime of many city dwellers- watching 715 * people come and go, talking of Michaelangelo, and so on.. 716 * 717 * ISPASYNC_UNHANDLED_RESPONSE gives outer layers a chance to parse a 718 * response queue entry not otherwise handled. The outer layer should 719 * return non-zero if it handled it. The 'arg' points to an unmassaged 720 * response queue entry. 721 */ 722 723 typedef enum { 724 ISPASYNC_NEW_TGT_PARAMS, /* New Target Parameters Negotiated */ 725 ISPASYNC_BUS_RESET, /* Bus Was Reset */ 726 ISPASYNC_LOOP_DOWN, /* FC Loop Down */ 727 ISPASYNC_LOOP_UP, /* FC Loop Up */ 728 ISPASYNC_LIP, /* LIP Received */ 729 ISPASYNC_LOOP_RESET, /* Loop Reset Received */ 730 ISPASYNC_CHANGE_NOTIFY, /* FC Change Notification */ 731 ISPASYNC_FABRIC_DEV, /* FC Fabric Device Arrival */ 732 ISPASYNC_PROMENADE, /* FC Objects coming && going */ 733 ISPASYNC_TARGET_NOTIFY, /* target asynchronous notification event */ 734 ISPASYNC_TARGET_ACTION, /* target action requested */ 735 ISPASYNC_CONF_CHANGE, /* Platform Configuration Change */ 736 ISPASYNC_UNHANDLED_RESPONSE, /* Unhandled Response Entry */ 737 ISPASYNC_FW_CRASH, /* Firmware has crashed */ 738 ISPASYNC_FW_DUMPED, /* Firmware crashdump taken */ 739 ISPASYNC_FW_RESTARTED /* Firmware has been restarted */ 740 } ispasync_t; 741 int isp_async(ispsoftc_t *, ispasync_t, void *); 742 743 #define ISPASYNC_CHANGE_PDB ((void *) 0) 744 #define ISPASYNC_CHANGE_SNS ((void *) 1) 745 #define ISPASYNC_CHANGE_OTHER ((void *) 2) 746 747 /* 748 * Platform Dependent Error and Debug Printout 749 * 750 * Generally this is: 751 * 752 * void isp_prt(ispsoftc_t *, int level, const char *, ...) 753 * 754 * but due to compiler differences on different platforms this won't be 755 * formally done here. Instead, it goes in each platform definition file. 756 */ 757 758 #define ISP_LOGALL 0x0 /* log always */ 759 #define ISP_LOGCONFIG 0x1 /* log configuration messages */ 760 #define ISP_LOGINFO 0x2 /* log informational messages */ 761 #define ISP_LOGWARN 0x4 /* log warning messages */ 762 #define ISP_LOGERR 0x8 /* log error messages */ 763 #define ISP_LOGDEBUG0 0x10 /* log simple debug messages */ 764 #define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */ 765 #define ISP_LOGDEBUG2 0x40 /* log most debug messages */ 766 #define ISP_LOGDEBUG3 0x80 /* log high frequency debug messages */ 767 #define ISP_LOGDEBUG4 0x100 /* log high frequency debug messages */ 768 #define ISP_LOGTDEBUG0 0x200 /* log simple debug messages (target mode) */ 769 #define ISP_LOGTDEBUG1 0x400 /* log intermediate debug messages (target) */ 770 #define ISP_LOGTDEBUG2 0x800 /* log all debug messages (target) */ 771 772 /* 773 * Each Platform provides it's own isposinfo substructure of the ispsoftc 774 * defined above. 775 * 776 * Each platform must also provide the following macros/defines: 777 * 778 * 779 * ISP2100_SCRLEN - length for the Fibre Channel scratch DMA area 780 * 781 * MEMZERO(dst, src) platform zeroing function 782 * MEMCPY(dst, src, count) platform copying function 783 * SNPRINTF(buf, bufsize, fmt, ...) snprintf 784 * USEC_DELAY(usecs) microsecond spindelay function 785 * USEC_SLEEP(isp, usecs) microsecond sleep function 786 * 787 * NANOTIME_T nanosecond time type 788 * 789 * GET_NANOTIME(NANOTIME_T *) get current nanotime. 790 * 791 * GET_NANOSEC(NANOTIME_T *) get uint64_t from NANOTIME_T 792 * 793 * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *) 794 * subtract two NANOTIME_T values 795 * 796 * 797 * MAXISPREQUEST(ispsoftc_t *) maximum request queue size 798 * for this particular board type 799 * 800 * MEMORYBARRIER(ispsoftc_t *, barrier_type, offset, size) 801 * 802 * Function/Macro the provides memory synchronization on 803 * various objects so that the ISP's and the system's view 804 * of the same object is consistent. 805 * 806 * MBOX_ACQUIRE(ispsoftc_t *) acquire lock on mailbox regs 807 * MBOX_WAIT_COMPLETE(ispsoftc_t *) wait for mailbox cmd to be done 808 * MBOX_NOTIFY_COMPLETE(ispsoftc_t *) notification of mbox cmd donee 809 * MBOX_RELEASE(ispsoftc_t *) release lock on mailbox regs 810 * 811 * FC_SCRATCH_ACQUIRE(ispsoftc_t *) acquire lock on FC scratch area 812 * FC_SCRATCH_RELEASE(ispsoftc_t *) acquire lock on FC scratch area 813 * 814 * SCSI_GOOD SCSI 'Good' Status 815 * SCSI_CHECK SCSI 'Check Condition' Status 816 * SCSI_BUSY SCSI 'Busy' Status 817 * SCSI_QFULL SCSI 'Queue Full' Status 818 * 819 * XS_T Platform SCSI transaction type (i.e., command for HBA) 820 * XS_DMA_ADDR_T Platform PCI DMA Address Type 821 * XS_ISP(xs) gets an instance out of an XS_T 822 * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) "" 823 * XS_TGT(xs) gets the target "" 824 * XS_LUN(xs) gets the lun "" 825 * XS_CDBP(xs) gets a pointer to the scsi CDB "" 826 * XS_CDBLEN(xs) gets the CDB's length "" 827 * XS_XFRLEN(xs) gets the associated data transfer length "" 828 * XS_TIME(xs) gets the time (in milliseconds) for this command 829 * XS_RESID(xs) gets the current residual count 830 * XS_STSP(xs) gets a pointer to the SCSI status byte "" 831 * XS_SNSP(xs) gets a pointer to the associate sense data 832 * XS_SNSLEN(xs) gets the length of sense data storage 833 * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key 834 * XS_TAG_P(xs) predicate of whether this command should be tagged 835 * XS_TAG_TYPE(xs) which type of tag to use 836 * XS_SETERR(xs) set error state 837 * 838 * HBA_NOERROR command has no erros 839 * HBA_BOTCH hba botched something 840 * HBA_CMDTIMEOUT command timed out 841 * HBA_SELTIMEOUT selection timed out (also port logouts for FC) 842 * HBA_TGTBSY target returned a BUSY status 843 * HBA_BUSRESET bus reset destroyed command 844 * HBA_ABORTED command was aborted (by request) 845 * HBA_DATAOVR a data overrun was detected 846 * HBA_ARQFAIL Automatic Request Sense failed 847 * 848 * XS_ERR(xs) return current error state 849 * XS_NOERR(xs) there is no error currently set 850 * XS_INITERR(xs) initialize error state 851 * 852 * XS_SAVE_SENSE(xs, sp) save sense data 853 * 854 * XS_SET_STATE_STAT(isp, sp, xs) platform dependent interpreter of 855 * response queue entry status bits 856 * 857 * 858 * DEFAULT_IID(ispsoftc_t *) Default SCSI initiator ID 859 * DEFAULT_LOOPID(ispsoftc_t *) Default FC Loop ID 860 * DEFAULT_NODEWWN(ispsoftc_t *) Default Node WWN 861 * DEFAULT_PORTWWN(ispsoftc_t *) Default Port WWN 862 * DEFAULT_FRAMESIZE(ispsoftc_t *) Default Frame Size 863 * DEFAULT_EXEC_THROTTLE(ispsoftc_t *) Default Execution Throttle 864 * These establish reasonable defaults for each platform. 865 * These must be available independent of card NVRAM and are 866 * to be used should NVRAM not be readable. 867 * 868 * ISP_NODEWWN(ispsoftc_t *) FC Node WWN to use 869 * ISP_PORTWWN(ispsoftc_t *) FC Port WWN to use 870 * 871 * These are to be used after NVRAM is read. The tags 872 * in fcparam.isp_{node,port}wwn reflect the values 873 * read from NVRAM (possibly corrected for card botches). 874 * Each platform can take that information and override 875 * it or ignore and return the Node and Port WWNs to be 876 * used when sending the Qlogic f/w the Initialization Control 877 * Block. 878 * 879 * (XXX these do endian specific transformations- in transition XXX) 880 * 881 * ISP_IOXPUT_8(ispsoftc_t *, uint8_t srcval, uint8_t *dstptr) 882 * ISP_IOXPUT_16(ispsoftc_t *, uint16_t srcval, uint16_t *dstptr) 883 * ISP_IOXPUT_32(ispsoftc_t *, uint32_t srcval, uint32_t *dstptr) 884 * 885 * ISP_IOXGET_8(ispsoftc_t *, uint8_t *srcptr, uint8_t dstrval) 886 * ISP_IOXGET_16(ispsoftc_t *, uint16_t *srcptr, uint16_t dstrval) 887 * ISP_IOXGET_32(ispsoftc_t *, uint32_t *srcptr, uint32_t dstrval) 888 * 889 * ISP_SWIZZLE_NVRAM_WORD(ispsoftc_t *, uint16_t *) 890 */ 891 892 #endif /* _ISPVAR_H */ 893