1 /* $FreeBSD$ */ 2 /* 3 * Soft Definitions for for Qlogic ISP SCSI adapters. 4 * 5 * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30 31 #ifndef _ISPVAR_H 32 #define _ISPVAR_H 33 34 #if defined(__NetBSD__) || defined(__OpenBSD__) 35 #include <dev/ic/ispmbox.h> 36 #ifdef ISP_TARGET_MODE 37 #include <dev/ic/isp_target.h> 38 #include <dev/ic/isp_tpublic.h> 39 #endif 40 #endif 41 #ifdef __FreeBSD__ 42 #include <dev/isp/ispmbox.h> 43 #ifdef ISP_TARGET_MODE 44 #include <dev/isp/isp_target.h> 45 #include <dev/isp/isp_tpublic.h> 46 #endif 47 #endif 48 #ifdef __linux__ 49 #include "ispmbox.h" 50 #ifdef ISP_TARGET_MODE 51 #include "isp_target.h" 52 #include "isp_tpublic.h" 53 #endif 54 #endif 55 56 #define ISP_CORE_VERSION_MAJOR 2 57 #define ISP_CORE_VERSION_MINOR 0 58 59 /* 60 * Vector for bus specific code to provide specific services. 61 */ 62 struct ispsoftc; 63 struct ispmdvec { 64 u_int16_t (*dv_rd_reg) __P((struct ispsoftc *, int)); 65 void (*dv_wr_reg) __P((struct ispsoftc *, int, u_int16_t)); 66 int (*dv_mbxdma) __P((struct ispsoftc *)); 67 int (*dv_dmaset) __P((struct ispsoftc *, 68 XS_T *, ispreq_t *, u_int16_t *, u_int16_t)); 69 void (*dv_dmaclr) 70 __P((struct ispsoftc *, XS_T *, u_int32_t)); 71 void (*dv_reset0) __P((struct ispsoftc *)); 72 void (*dv_reset1) __P((struct ispsoftc *)); 73 void (*dv_dregs) __P((struct ispsoftc *, const char *)); 74 const u_int16_t *dv_ispfw; /* ptr to f/w */ 75 u_int16_t dv_conf1; 76 u_int16_t dv_clock; /* clock frequency */ 77 }; 78 79 /* 80 * Overall parameters 81 */ 82 #define MAX_TARGETS 16 83 #ifdef ISP2100_FABRIC 84 #define MAX_FC_TARG 256 85 #else 86 #define MAX_FC_TARG 126 87 #endif 88 89 #define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS) 90 #define ISP_MAX_LUNS(isp) (isp)->isp_maxluns 91 92 93 /* 94 * Macros to access ISP registers through bus specific layers- 95 * mostly wrappers to vector through the mdvec structure. 96 */ 97 98 #define ISP_READ(isp, reg) \ 99 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg)) 100 101 #define ISP_WRITE(isp, reg, val) \ 102 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val)) 103 104 #define ISP_MBOXDMASETUP(isp) \ 105 (*(isp)->isp_mdvec->dv_mbxdma)((isp)) 106 107 #define ISP_DMASETUP(isp, xs, req, iptrp, optr) \ 108 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr)) 109 110 #define ISP_DMAFREE(isp, xs, hndl) \ 111 if ((isp)->isp_mdvec->dv_dmaclr) \ 112 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl)) 113 114 #define ISP_RESET0(isp) \ 115 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp)) 116 #define ISP_RESET1(isp) \ 117 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp)) 118 #define ISP_DUMPREGS(isp, m) \ 119 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m)) 120 121 #define ISP_SETBITS(isp, reg, val) \ 122 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val)) 123 124 #define ISP_CLRBITS(isp, reg, val) \ 125 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val)) 126 127 /* 128 * The MEMORYBARRIER macro is defined per platform (to provide synchronization 129 * on Request and Response Queues, Scratch DMA areas, and Registers) 130 * 131 * Defined Memory Barrier Synchronization Types 132 */ 133 #define SYNC_REQUEST 0 /* request queue synchronization */ 134 #define SYNC_RESULT 1 /* result queue synchronization */ 135 #define SYNC_SFORDEV 2 /* scratch, sync for ISP */ 136 #define SYNC_SFORCPU 3 /* scratch, sync for CPU */ 137 #define SYNC_REG 4 /* for registers */ 138 139 /* 140 * Request/Response Queue defines and macros. 141 * The maximum is defined per platform (and can be based on board type). 142 */ 143 /* This is the size of a queue entry (request and response) */ 144 #define QENTRY_LEN 64 145 /* Both request and result queue length must be a power of two */ 146 #define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x) 147 #define RESULT_QUEUE_LEN(x) \ 148 (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2) 149 #define ISP_QUEUE_ENTRY(q, idx) ((q) + ((idx) * QENTRY_LEN)) 150 #define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN) 151 #define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1)) 152 #define ISP_QFREE(in, out, qlen) \ 153 ((in == out)? (qlen - 1) : ((in > out)? \ 154 ((qlen - 1) - (in - out)) : (out - in - 1))) 155 #define ISP_QAVAIL(isp) \ 156 ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp)) 157 158 #define ISP_ADD_REQUEST(isp, iptr) \ 159 MEMORYBARRIER(isp, SYNC_REQUEST, iptr, QENTRY_LEN); \ 160 ISP_WRITE(isp, INMAILBOX4, iptr); \ 161 isp->isp_reqidx = iptr 162 163 /* 164 * SCSI Specific Host Adapter Parameters- per bus, per target 165 */ 166 167 typedef struct { 168 u_int isp_gotdparms : 1, 169 isp_req_ack_active_neg : 1, 170 isp_data_line_active_neg: 1, 171 isp_cmd_dma_burst_enable: 1, 172 isp_data_dma_burst_enabl: 1, 173 isp_fifo_threshold : 3, 174 isp_ultramode : 1, 175 isp_diffmode : 1, 176 isp_lvdmode : 1, 177 isp_fast_mttr : 1, /* fast sram */ 178 isp_initiator_id : 4, 179 isp_async_data_setup : 4; 180 u_int16_t isp_selection_timeout; 181 u_int16_t isp_max_queue_depth; 182 u_int8_t isp_tag_aging; 183 u_int8_t isp_bus_reset_delay; 184 u_int8_t isp_retry_count; 185 u_int8_t isp_retry_delay; 186 struct { 187 u_int dev_enable : 1, /* ignored */ 188 : 1, 189 dev_update : 1, 190 dev_refresh : 1, 191 exc_throttle : 8, 192 cur_offset : 4, 193 sync_offset : 4; 194 u_int8_t cur_period; /* current sync period */ 195 u_int8_t sync_period; /* goal sync period */ 196 u_int16_t dev_flags; /* goal device flags */ 197 u_int16_t cur_dflags; /* current device flags */ 198 } isp_devparam[MAX_TARGETS]; 199 } sdparam; 200 201 /* 202 * Device Flags 203 */ 204 #define DPARM_DISC 0x8000 205 #define DPARM_PARITY 0x4000 206 #define DPARM_WIDE 0x2000 207 #define DPARM_SYNC 0x1000 208 #define DPARM_TQING 0x0800 209 #define DPARM_ARQ 0x0400 210 #define DPARM_QFRZ 0x0200 211 #define DPARM_RENEG 0x0100 212 #define DPARM_NARROW 0x0080 213 #define DPARM_ASYNC 0x0040 214 #define DPARM_PPR 0x0020 215 #define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ) 216 #define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING)) 217 218 219 /* technically, not really correct, as they need to be rated based upon clock */ 220 #define ISP_80M_SYNCPARMS 0x0c09 221 #define ISP_40M_SYNCPARMS 0x0c0a 222 #define ISP_20M_SYNCPARMS 0x0c0c 223 #define ISP_20M_SYNCPARMS_1040 0x080c 224 #define ISP_10M_SYNCPARMS 0x0c19 225 #define ISP_08M_SYNCPARMS 0x0c25 226 #define ISP_05M_SYNCPARMS 0x0c32 227 #define ISP_04M_SYNCPARMS 0x0c41 228 229 /* 230 * Fibre Channel Specifics 231 */ 232 #define FL_PORT_ID 0x7e /* FL_Port Special ID */ 233 #define FC_PORT_ID 0x7f /* Fabric Controller Special ID */ 234 #define FC_SNS_ID 0x80 /* SNS Server Special ID */ 235 236 typedef struct { 237 u_int32_t isp_fwoptions : 16, 238 : 4, 239 loop_seen_once : 1, 240 isp_loopstate : 3, /* Current Loop State */ 241 isp_fwstate : 3, /* ISP F/W state */ 242 isp_gotdparms : 1, 243 isp_topo : 3, 244 isp_onfabric : 1; 245 u_int8_t isp_loopid; /* hard loop id */ 246 u_int8_t isp_alpa; /* ALPA */ 247 volatile u_int16_t isp_lipseq; /* LIP sequence # */ 248 u_int32_t isp_portid; 249 u_int8_t isp_execthrottle; 250 u_int8_t isp_retry_delay; 251 u_int8_t isp_retry_count; 252 u_int8_t isp_reserved; 253 u_int16_t isp_maxalloc; 254 u_int16_t isp_maxfrmlen; 255 u_int64_t isp_nodewwn; 256 u_int64_t isp_portwwn; 257 /* 258 * Port Data Base. This is indexed by 'target', which is invariate. 259 * However, elements within can move around due to loop changes, 260 * so the actual loop ID passed to the F/W is in this structure. 261 * The first time the loop is seen up, loopid will match the index 262 * (except for fabric nodes which are above mapped above FC_SNS_ID 263 * and are completely virtual), but subsequent LIPs can cause things 264 * to move around. 265 */ 266 struct lportdb { 267 u_int 268 loopid : 8, 269 : 4, 270 loggedin : 1, 271 roles : 2, 272 valid : 1; 273 u_int32_t portid; 274 u_int64_t node_wwn; 275 u_int64_t port_wwn; 276 } portdb[MAX_FC_TARG], tport[FL_PORT_ID]; 277 278 /* 279 * Scratch DMA mapped in area to fetch Port Database stuff, etc. 280 */ 281 caddr_t isp_scratch; 282 u_int32_t isp_scdma; 283 } fcparam; 284 285 #define FW_CONFIG_WAIT 0 286 #define FW_WAIT_AL_PA 1 287 #define FW_WAIT_LOGIN 2 288 #define FW_READY 3 289 #define FW_LOSS_OF_SYNC 4 290 #define FW_ERROR 5 291 #define FW_REINIT 6 292 #define FW_NON_PART 7 293 294 #define LOOP_NIL 0 295 #define LOOP_LIP_RCVD 1 296 #define LOOP_PDB_RCVD 2 297 #define LOOP_READY 7 298 299 #define TOPO_NL_PORT 0 300 #define TOPO_FL_PORT 1 301 #define TOPO_N_PORT 2 302 #define TOPO_F_PORT 3 303 #define TOPO_PTP_STUB 4 304 305 /* 306 * Soft Structure per host adapter 307 */ 308 typedef struct ispsoftc { 309 /* 310 * Platform (OS) specific data 311 */ 312 struct isposinfo isp_osinfo; 313 314 /* 315 * Pointer to bus specific functions and data 316 */ 317 struct ispmdvec * isp_mdvec; 318 319 /* 320 * (Mostly) nonvolatile state. Board specific parameters 321 * may contain some volatile state (e.g., current loop state). 322 */ 323 324 void * isp_param; /* type specific */ 325 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */ 326 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */ 327 u_int16_t isp_maxcmds; /* max possible I/O cmds */ 328 u_int8_t isp_type; /* HBA Chip Type */ 329 u_int8_t isp_revision; /* HBA Chip H/W Revision */ 330 u_int32_t isp_maxluns; /* maximum luns supported */ 331 332 u_int32_t 333 isp_touched : 1, /* board ever seen? */ 334 : 1, 335 isp_bustype : 1, /* SBus or PCI */ 336 isp_loaded_fw : 1, /* loaded firmware */ 337 isp_dblev : 12, /* debug log mask */ 338 isp_clock : 8, /* input clock */ 339 isp_confopts : 8; /* config options */ 340 341 /* 342 * Volatile state 343 */ 344 345 volatile u_int32_t 346 isp_mboxbsy : 8, /* mailbox command active */ 347 : 1, 348 isp_state : 3, 349 isp_sendmarker : 2, /* send a marker entry */ 350 isp_update : 2, /* update parameters */ 351 isp_nactive : 16; /* how many commands active */ 352 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */ 353 volatile u_int16_t isp_reqidx; /* index of next request */ 354 volatile u_int16_t isp_residx; /* index of next result */ 355 volatile u_int16_t isp_lasthdls; /* last handle seed */ 356 volatile u_int16_t isp_mboxtmp[MAX_MAILBOX]; 357 358 /* 359 * Active commands are stored here, indexed by handle functions. 360 */ 361 XS_T **isp_xflist; 362 363 /* 364 * request/result queue pointers and dma handles for them. 365 */ 366 caddr_t isp_rquest; 367 caddr_t isp_result; 368 u_int32_t isp_rquest_dma; 369 u_int32_t isp_result_dma; 370 } ispsoftc_t; 371 372 #define SDPARAM(isp) ((sdparam *) (isp)->isp_param) 373 #define FCPARAM(isp) ((fcparam *) (isp)->isp_param) 374 375 /* 376 * ISP Driver Run States 377 */ 378 #define ISP_NILSTATE 0 379 #define ISP_RESETSTATE 1 380 #define ISP_INITSTATE 2 381 #define ISP_RUNSTATE 3 382 383 /* 384 * ISP Configuration Options 385 */ 386 #define ISP_CFG_NORELOAD 0x80 /* don't download f/w */ 387 #define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */ 388 #define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */ 389 #define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */ 390 #define ISP_CFG_NPORT 0x04 /* try to force N- instead of L-Port */ 391 392 /* 393 * Firmware related defines 394 */ 395 #define ISP_CODE_ORG 0x1000 /* default f/w code start */ 396 #define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic) 397 #define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2]) 398 399 /* 400 * Bus (implementation) types 401 */ 402 #define ISP_BT_PCI 0 /* PCI Implementations */ 403 #define ISP_BT_SBUS 1 /* SBus Implementations */ 404 405 /* 406 * Chip Types 407 */ 408 #define ISP_HA_SCSI 0xf 409 #define ISP_HA_SCSI_UNKNOWN 0x1 410 #define ISP_HA_SCSI_1020 0x2 411 #define ISP_HA_SCSI_1020A 0x3 412 #define ISP_HA_SCSI_1040 0x4 413 #define ISP_HA_SCSI_1040A 0x5 414 #define ISP_HA_SCSI_1040B 0x6 415 #define ISP_HA_SCSI_1040C 0x7 416 #define ISP_HA_SCSI_1240 0x8 417 #define ISP_HA_SCSI_1080 0x9 418 #define ISP_HA_SCSI_1280 0xa 419 #define ISP_HA_SCSI_12160 0xb 420 #define ISP_HA_FC 0xf0 421 #define ISP_HA_FC_2100 0x10 422 #define ISP_HA_FC_2200 0x20 423 424 #define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI) 425 #define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240) 426 #define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080) 427 #define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280) 428 #define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160) 429 430 #define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp)) 431 #define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp)) 432 #define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_12160(isp)) 433 #define IS_ULTRA3(isp) (IS_12160(isp)) 434 435 #define IS_FC(isp) (isp->isp_type & ISP_HA_FC) 436 #define IS_2100(isp) (isp->isp_type == ISP_HA_FC_2100) 437 #define IS_2200(isp) (isp->isp_type == ISP_HA_FC_2200) 438 439 /* 440 * DMA cookie macros 441 */ 442 #define DMA_MSW(x) (((x) >> 16) & 0xffff) 443 #define DMA_LSW(x) (((x) & 0xffff)) 444 445 /* 446 * Core System Function Prototypes 447 */ 448 449 /* 450 * Reset Hardware. Totally. Assumes that you'll follow this with 451 * a call to isp_init. 452 */ 453 void isp_reset __P((struct ispsoftc *)); 454 455 /* 456 * Initialize Hardware to known state 457 */ 458 void isp_init __P((struct ispsoftc *)); 459 460 /* 461 * Reset the ISP and call completion for any orphaned commands. 462 */ 463 void isp_reinit __P((struct ispsoftc *)); 464 465 /* 466 * Interrupt Service Routine 467 */ 468 int isp_intr __P((void *)); 469 470 /* 471 * Command Entry Point- Platform Dependent layers call into this 472 */ 473 int isp_start __P((XS_T *)); 474 /* these values are what isp_start returns */ 475 #define CMD_COMPLETE 101 /* command completed */ 476 #define CMD_EAGAIN 102 /* busy- maybe retry later */ 477 #define CMD_QUEUED 103 /* command has been queued for execution */ 478 #define CMD_RQLATER 104 /* requeue this command later */ 479 480 /* 481 * Command Completion Point- Core layers call out from this with completed cmds 482 */ 483 void isp_done __P((XS_T *)); 484 485 /* 486 * Platform Dependent to External to Internal Control Function 487 * 488 * Assumes all locks are held and that no reentrancy issues need be dealt with. 489 * 490 */ 491 typedef enum { 492 ISPCTL_RESET_BUS, /* Reset Bus */ 493 ISPCTL_RESET_DEV, /* Reset Device */ 494 ISPCTL_ABORT_CMD, /* Abort Command */ 495 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters */ 496 ISPCTL_FCLINK_TEST, /* Test FC Link Status */ 497 ISPCTL_PDB_SYNC, /* Synchronize Port Database */ 498 ISPCTL_TOGGLE_TMODE /* toggle target mode */ 499 } ispctl_t; 500 int isp_control __P((struct ispsoftc *, ispctl_t, void *)); 501 502 503 /* 504 * Platform Dependent to Internal to External Control Function 505 * (each platform must provide such a function) 506 * 507 * Assumes all locks are held and that no reentrancy issues need be dealt with. 508 * 509 */ 510 511 typedef enum { 512 ISPASYNC_NEW_TGT_PARAMS, 513 ISPASYNC_BUS_RESET, /* Bus Was Reset */ 514 ISPASYNC_LOOP_DOWN, /* FC Loop Down */ 515 ISPASYNC_LOOP_UP, /* FC Loop Up */ 516 ISPASYNC_PDB_CHANGED, /* FC Port Data Base Changed */ 517 ISPASYNC_CHANGE_NOTIFY, /* FC SNS Change Notification */ 518 ISPASYNC_FABRIC_DEV, /* FC New Fabric Device */ 519 ISPASYNC_TARGET_MESSAGE, /* target message */ 520 ISPASYNC_TARGET_EVENT, /* target asynchronous event */ 521 ISPASYNC_TARGET_ACTION /* other target command action */ 522 } ispasync_t; 523 int isp_async __P((struct ispsoftc *, ispasync_t, void *)); 524 525 /* 526 * Platform Dependent Error and Debug Printout 527 */ 528 void isp_prt __P((struct ispsoftc *, int level, const char *, ...)); 529 #define ISP_LOGALL 0x0 /* log always */ 530 #define ISP_LOGCONFIG 0x1 /* log configuration messages */ 531 #define ISP_LOGINFO 0x2 /* log informational messages */ 532 #define ISP_LOGWARN 0x4 /* log warning messages */ 533 #define ISP_LOGERR 0x8 /* log error messages */ 534 #define ISP_LOGDEBUG0 0x10 /* log simple debug messages */ 535 #define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */ 536 #define ISP_LOGDEBUG2 0x40 /* log most debug messages */ 537 #define ISP_LOGDEBUG3 0x100 /* log high frequency debug messages */ 538 #define ISP_LOGTDEBUG0 0x200 /* log simple debug messages (target mode) */ 539 #define ISP_LOGTDEBUG1 0x400 /* log intermediate debug messages (target) */ 540 #define ISP_LOGTDEBUG2 0x800 /* log all debug messages (target) */ 541 542 /* 543 * Each Platform provides it's own isposinfo substructure of the ispsoftc 544 * defined above. 545 * 546 * Each platform must also provide the following macros/defines: 547 * 548 * 549 * INLINE - platform specific define for 'inline' functions 550 * 551 * ISP2100_FABRIC - defines whether FABRIC support is enabled 552 * ISP2100_SCRLEN - length for the Fibre Channel scratch DMA area 553 * 554 * MEMZERO(dst, src) platform zeroing function 555 * MEMCPY(dst, src, count) platform copying function 556 * SNPRINTF(buf, bufsize, fmt, ...) snprintf 557 * STRNCAT(dstbuf, size, srcbuf) strncat 558 * USEC_DELAY(usecs) microsecond spindelay function 559 * 560 * NANOTIME_T nanosecond time type 561 * 562 * GET_NANOTIME(NANOTIME_T *) get current nanotime. 563 * 564 * GET_NANOSEC(NANOTIME_T *) get u_int64_t from NANOTIME_T 565 * 566 * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *) 567 * subtract two NANOTIME_T values 568 * 569 * 570 * MAXISPREQUEST(struct ispsoftc *) maximum request queue size 571 * for this particular board type 572 * 573 * MEMORYBARRIER(struct ispsoftc *, barrier_type, offset, size) 574 * 575 * Function/Macro the provides memory synchronization on 576 * various objects so that the ISP's and the system's view 577 * of the same object is consistent. 578 * 579 * MBOX_ACQUIRE(struct ispsoftc *) acquire lock on mailbox regs 580 * MBOX_WAIT_COMPLETE(struct ispsoftc *) wait for mailbox cmd to be done 581 * MBOX_NOTIFY_COMPLETE(struct ispsoftc *) notification of mbox cmd donee 582 * MBOX_RELEASE(struct ispsoftc *) release lock on mailbox regs 583 * 584 * 585 * SCSI_GOOD SCSI 'Good' Status 586 * SCSI_CHECK SCSI 'Check Condition' Status 587 * SCSI_BUSY SCSI 'Busy' Status 588 * SCSI_QFULL SCSI 'Queue Full' Status 589 * 590 * XS_T Platform SCSI transaction type (i.e., command for HBA) 591 * XS_ISP(xs) gets an instance out of an XS_T 592 * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) "" 593 * XS_TGT(xs) gets the target "" 594 * XS_LUN(xs) gets the lun "" 595 * XS_CDBP(xs) gets a pointer to the scsi CDB "" 596 * XS_CDBLEN(xs) gets the CDB's length "" 597 * XS_XFRLEN(xs) gets the associated data transfer length "" 598 * XS_TIME(xs) gets the time (in milliseconds) for this command 599 * XS_RESID(xs) gets the current residual count 600 * XS_STSP(xs) gets a pointer to the SCSI status byte "" 601 * XS_SNSP(xs) gets a pointer to the associate sense data 602 * XS_SNSLEN(xs) gets the length of sense data storage 603 * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key 604 * XS_TAG_P(xs) predicate of whether this command should be tagged 605 * XS_TAG_TYPE(xs) which type of tag to use 606 * XS_SETERR(xs) set error state 607 * 608 * HBA_NOERROR command has no erros 609 * HBA_BOTCH hba botched something 610 * HBA_CMDTIMEOUT command timed out 611 * HBA_SELTIMEOUT selection timed out (also port logouts for FC) 612 * HBA_TGTBSY target returned a BUSY status 613 * HBA_BUSRESET bus reset destroyed command 614 * HBA_ABORTED command was aborted (by request) 615 * HBA_DATAOVR a data overrun was detected 616 * HBA_ARQFAIL Automatic Request Sense failed 617 * 618 * XS_ERR(xs) return current error state 619 * XS_NOERR(xs) there is no error currently set 620 * XS_INITERR(xs) initialize error state 621 * 622 * XS_SAVE_SENSE(xs, sp) save sense data 623 * 624 * XS_SET_STATE_STAT(isp, sp, xs) platform dependent interpreter of 625 * response queue entry status bits 626 * 627 * 628 * DEFAULT_IID(struct ispsoftc *) Default SCSI initiator ID 629 * DEFAULT_LOOPID(struct ispsoftc *) Default FC Loop ID 630 * DEFAULT_NODEWWN(struct ispsoftc *) Default Node WWN 631 * DEFAULT_PORTWWN(struct ispsoftc *) Default Port WWN 632 * These establish reasonable defaults for each platform. 633 * These must be available independent of card NVRAM and are 634 * to be used should NVRAM not be readable. 635 * 636 * ISP_NODEWWN(struct ispsoftc *) FC Node WWN to use 637 * ISP_PORTWWN(struct ispsoftc *) FC Port WWN to use 638 * 639 * These are to be used after NVRAM is read. The tags 640 * in fcparam.isp_{node,port}wwn reflect the values 641 * read from NVRAM (possibly corrected for card botches). 642 * Each platform can take that information and override 643 * it or ignore and return the Node and Port WWNs to be 644 * used when sending the Qlogic f/w the Initialization Control 645 * Block. 646 * 647 * (XXX these do endian specific transformations- in transition XXX) 648 * ISP_SWIZZLE_ICB 649 * ISP_UNSWIZZLE_AND_COPY_PDBP 650 * ISP_SWIZZLE_CONTINUATION 651 * ISP_SWIZZLE_REQUEST 652 * ISP_UNSWIZZLE_RESPONSE 653 * ISP_SWIZZLE_SNS_REQ 654 * ISP_UNSWIZZLE_SNS_RSP 655 * ISP_SWIZZLE_NVRAM_WORD 656 * 657 * 658 */ 659 #endif /* _ISPVAR_H */ 660