1 /* $FreeBSD$ */ 2 /*- 3 * Soft Definitions for for Qlogic ISP SCSI adapters. 4 * 5 * Copyright (c) 1997-2006 by Matthew Jacob 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #ifndef _ISPVAR_H 31 #define _ISPVAR_H 32 33 #if defined(__NetBSD__) || defined(__OpenBSD__) 34 #include <dev/ic/isp_stds.h> 35 #include <dev/ic/ispmbox.h> 36 #endif 37 #ifdef __FreeBSD__ 38 #include <dev/isp/isp_stds.h> 39 #include <dev/isp/ispmbox.h> 40 #endif 41 #ifdef __linux__ 42 #include "isp_stds.h" 43 #include "ispmbox.h" 44 #endif 45 #ifdef __svr4__ 46 #include "isp_stds.h" 47 #include "ispmbox.h" 48 #endif 49 50 #define ISP_CORE_VERSION_MAJOR 3 51 #define ISP_CORE_VERSION_MINOR 0 52 53 /* 54 * Vector for bus specific code to provide specific services. 55 */ 56 typedef struct ispsoftc ispsoftc_t; 57 struct ispmdvec { 58 int (*dv_rd_isr) 59 (ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *); 60 uint32_t (*dv_rd_reg) (ispsoftc_t *, int); 61 void (*dv_wr_reg) (ispsoftc_t *, int, uint32_t); 62 int (*dv_mbxdma) (ispsoftc_t *); 63 int (*dv_dmaset) 64 (ispsoftc_t *, XS_T *, ispreq_t *, uint32_t *, uint32_t); 65 void (*dv_dmaclr) (ispsoftc_t *, XS_T *, uint32_t); 66 void (*dv_reset0) (ispsoftc_t *); 67 void (*dv_reset1) (ispsoftc_t *); 68 void (*dv_dregs) (ispsoftc_t *, const char *); 69 void * dv_ispfw; /* ptr to f/w */ 70 uint16_t dv_conf1; 71 uint16_t dv_clock; /* clock frequency */ 72 }; 73 74 /* 75 * Overall parameters 76 */ 77 #define MAX_TARGETS 16 78 #define MAX_FC_TARG 512 79 #define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS) 80 #define ISP_MAX_LUNS(isp) (isp)->isp_maxluns 81 82 /* 83 * Macros to access ISP registers through bus specific layers- 84 * mostly wrappers to vector through the mdvec structure. 85 */ 86 #define ISP_READ_ISR(isp, isrp, semap, mbox0p) \ 87 (*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, mbox0p) 88 89 #define ISP_READ(isp, reg) \ 90 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg)) 91 92 #define ISP_WRITE(isp, reg, val) \ 93 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val)) 94 95 #define ISP_MBOXDMASETUP(isp) \ 96 (*(isp)->isp_mdvec->dv_mbxdma)((isp)) 97 98 #define ISP_DMASETUP(isp, xs, req, iptrp, optr) \ 99 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr)) 100 101 #define ISP_DMAFREE(isp, xs, hndl) \ 102 if ((isp)->isp_mdvec->dv_dmaclr) \ 103 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl)) 104 105 #define ISP_RESET0(isp) \ 106 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp)) 107 #define ISP_RESET1(isp) \ 108 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp)) 109 #define ISP_DUMPREGS(isp, m) \ 110 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m)) 111 112 #define ISP_SETBITS(isp, reg, val) \ 113 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val)) 114 115 #define ISP_CLRBITS(isp, reg, val) \ 116 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val)) 117 118 /* 119 * The MEMORYBARRIER macro is defined per platform (to provide synchronization 120 * on Request and Response Queues, Scratch DMA areas, and Registers) 121 * 122 * Defined Memory Barrier Synchronization Types 123 */ 124 #define SYNC_REQUEST 0 /* request queue synchronization */ 125 #define SYNC_RESULT 1 /* result queue synchronization */ 126 #define SYNC_SFORDEV 2 /* scratch, sync for ISP */ 127 #define SYNC_SFORCPU 3 /* scratch, sync for CPU */ 128 #define SYNC_REG 4 /* for registers */ 129 #define SYNC_ATIOQ 5 /* atio result queue (24xx) */ 130 131 /* 132 * Request/Response Queue defines and macros. 133 * The maximum is defined per platform (and can be based on board type). 134 */ 135 /* This is the size of a queue entry (request and response) */ 136 #define QENTRY_LEN 64 137 /* Both request and result queue length must be a power of two */ 138 #define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x) 139 #ifdef ISP_TARGET_MODE 140 #define RESULT_QUEUE_LEN(x) MAXISPREQUEST(x) 141 #else 142 #define RESULT_QUEUE_LEN(x) \ 143 (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2) 144 #endif 145 #define ISP_QUEUE_ENTRY(q, idx) (((uint8_t *)q) + ((idx) * QENTRY_LEN)) 146 #define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN) 147 #define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1)) 148 #define ISP_QFREE(in, out, qlen) \ 149 ((in == out)? (qlen - 1) : ((in > out)? \ 150 ((qlen - 1) - (in - out)) : (out - in - 1))) 151 #define ISP_QAVAIL(isp) \ 152 ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp)) 153 154 #define ISP_ADD_REQUEST(isp, nxti) \ 155 MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN); \ 156 ISP_WRITE(isp, isp->isp_rqstinrp, nxti); \ 157 isp->isp_reqidx = nxti 158 159 /* 160 * SCSI Specific Host Adapter Parameters- per bus, per target 161 */ 162 typedef struct { 163 uint32_t isp_gotdparms : 1, 164 isp_req_ack_active_neg : 1, 165 isp_data_line_active_neg: 1, 166 isp_cmd_dma_burst_enable: 1, 167 isp_data_dma_burst_enabl: 1, 168 isp_fifo_threshold : 3, 169 isp_ptisp : 1, 170 isp_ultramode : 1, 171 isp_diffmode : 1, 172 isp_lvdmode : 1, 173 isp_fast_mttr : 1, /* fast sram */ 174 isp_initiator_id : 4, 175 isp_async_data_setup : 4; 176 uint16_t isp_selection_timeout; 177 uint16_t isp_max_queue_depth; 178 uint8_t isp_tag_aging; 179 uint8_t isp_bus_reset_delay; 180 uint8_t isp_retry_count; 181 uint8_t isp_retry_delay; 182 struct { 183 uint32_t 184 exc_throttle : 8, 185 : 1, 186 dev_enable : 1, /* ignored */ 187 dev_update : 1, 188 dev_refresh : 1, 189 actv_offset : 4, 190 goal_offset : 4, 191 nvrm_offset : 4; 192 uint8_t actv_period; /* current sync period */ 193 uint8_t goal_period; /* goal sync period */ 194 uint8_t nvrm_period; /* nvram sync period */ 195 uint16_t actv_flags; /* current device flags */ 196 uint16_t goal_flags; /* goal device flags */ 197 uint16_t nvrm_flags; /* nvram device flags */ 198 } isp_devparam[MAX_TARGETS]; 199 } sdparam; 200 201 /* 202 * Device Flags 203 */ 204 #define DPARM_DISC 0x8000 205 #define DPARM_PARITY 0x4000 206 #define DPARM_WIDE 0x2000 207 #define DPARM_SYNC 0x1000 208 #define DPARM_TQING 0x0800 209 #define DPARM_ARQ 0x0400 210 #define DPARM_QFRZ 0x0200 211 #define DPARM_RENEG 0x0100 212 #define DPARM_NARROW 0x0080 213 #define DPARM_ASYNC 0x0040 214 #define DPARM_PPR 0x0020 215 #define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ) 216 #define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING)) 217 218 /* technically, not really correct, as they need to be rated based upon clock */ 219 #define ISP_80M_SYNCPARMS 0x0c09 220 #define ISP_40M_SYNCPARMS 0x0c0a 221 #define ISP_20M_SYNCPARMS 0x0c0c 222 #define ISP_20M_SYNCPARMS_1040 0x080c 223 #define ISP_10M_SYNCPARMS 0x0c19 224 #define ISP_08M_SYNCPARMS 0x0c25 225 #define ISP_05M_SYNCPARMS 0x0c32 226 #define ISP_04M_SYNCPARMS 0x0c41 227 228 /* 229 * Fibre Channel Specifics 230 */ 231 /* These are for 2100/2200/2300 cards */ 232 #define FL_ID 0x7e /* FL_Port Special ID */ 233 #define SNS_ID 0x80 /* SNS Server Special ID */ 234 #define NPH_MAX 0xfe 235 236 /* These are for 24XX cards */ 237 #define NPH_RESERVED 0x7F0 /* begin of reserved N-port handles */ 238 #define NPH_MGT_ID 0x7FA /* Management Server Special ID */ 239 #define NPH_SNS_ID 0x7FC /* SNS Server Special ID */ 240 #define NPH_FL_ID 0x7FE /* FL Port Special ID */ 241 #define NPH_MAX_24XX 0x800 242 243 /* 244 * Limit for devices on an arbitrated loop. 245 */ 246 #define LOCAL_LOOP_LIM 126 247 248 /* 249 * Special Port IDs 250 */ 251 #define MANAGEMENT_PORT_ID 0xFFFFFA 252 #define SNS_PORT_ID 0xFFFFFC 253 #define FABRIC_PORT_ID 0xFFFFFE 254 255 256 /* 257 * FC Port Database entry. 258 * 259 * It has a handle that the f/w uses to address commands to a device. 260 * This handle's value may be assigned by the firmware (e.g., for local loop 261 * devices) or by the driver (e.g., for fabric devices). 262 * 263 * It has a state. If the state if VALID, that means that we've logged into 264 * the device. We also *may* have a initiator map index entry. This is a value 265 * from 0..MAX_FC_TARG that is used to index into the isp_ini_map array. If 266 * the value therein is non-zero, then that value minus one is used to index 267 * into the Port Database to find the handle for forming commands. There is 268 * back-index minus one value within to Port Database entry that tells us 269 * which entry in isp_ini_map points to us (to avoid searching). 270 * 271 * Local loop devices the firmware automatically performs PLOGI on for us 272 * (which is why that handle is imposed upon us). Fabric devices we assign 273 * a handle to and perform the PLOGI on. 274 * 275 * When a PORT DATABASE CHANGED asynchronous event occurs, we mark all VALID 276 * entries as PROBATIONAL. This allows us, if policy says to, just keep track 277 * of devices whose handles change but are otherwise the same device (and 278 * thus keep 'target' constant). 279 * 280 * In any case, we search all possible local loop handles. For each one that 281 * has a port database entity returned, we search for any PROBATIONAL entry 282 * that matches it and update as appropriate. Otherwise, as a new entry, we 283 * find room for it in the Port Database. We *try* and use the handle as the 284 * index to put it into the Database, but that's just an optimization. We mark 285 * the entry VALID and make sure that the target index is updated and correct. 286 * 287 * When we get done searching the local loop, we then search similarily for 288 * a list of devices we've gotten from the fabric name controller (if we're 289 * on a fabric). VALID marking is also done similarily. 290 * 291 * When all of this is done, we can march through the database and clean up 292 * any entry that is still PROBATIONAL (these represent devices which have 293 * departed). Then we're done and can resume normal operations. 294 * 295 * Negative invariants that we try and test for are: 296 * 297 * + There can never be two non-NIL entries with the same { Port, Node } WWN 298 * duples. 299 * 300 * + There can never be two non-NIL entries with the same handle. 301 * 302 * + There can never be two non-NIL entries which have the same ini_map_idx 303 * value. 304 */ 305 typedef struct { 306 /* 307 * This is the handle that the firmware needs in order for us to 308 * send commands to the device. For pre-24XX cards, this would be 309 * the 'loopid'. 310 */ 311 uint16_t handle; 312 /* 313 * The ini_map_idx, if nonzero, is the system virtual target ID (+1) 314 * as a cross-reference with the isp_ini_map. 315 * 316 * A device is 'autologin' if the firmware automatically logs into 317 * it (re-logins as needed). Basically, local private loop devices. 318 * 319 * The state is the current state of thsi entry. 320 * 321 * Role is Initiator, Target, Both 322 * 323 * Portid is obvious, as or node && port WWNs. The new_role and 324 * new_portid is for when we are pending a change. 325 */ 326 uint16_t ini_map_idx : 12, 327 autologin : 1, /* F/W does PLOGI/PLOGO */ 328 state : 3; 329 uint32_t reserved : 6, 330 roles : 2, 331 portid : 24; 332 uint32_t new_reserved : 6, 333 new_roles : 2, 334 new_portid : 24; 335 uint64_t node_wwn; 336 uint64_t port_wwn; 337 } fcportdb_t; 338 339 #define FC_PORTDB_STATE_NIL 0 340 #define FC_PORTDB_STATE_PROBATIONAL 1 341 #define FC_PORTDB_STATE_DEAD 2 342 #define FC_PORTDB_STATE_CHANGED 3 343 #define FC_PORTDB_STATE_NEW 4 344 #define FC_PORTDB_STATE_PENDING_VALID 5 345 #define FC_PORTDB_STATE_ZOMBIE 6 346 #define FC_PORTDB_STATE_VALID 7 347 348 /* 349 * FC card specific information 350 */ 351 typedef struct { 352 uint32_t : 10, 353 isp_tmode : 1, 354 isp_2klogin : 1, 355 isp_sccfw : 1, 356 isp_gbspeed : 3, 357 : 1, 358 : 1, 359 : 1, 360 isp_loopstate : 4, /* Current Loop State */ 361 isp_fwstate : 4, /* ISP F/W state */ 362 isp_gotdparms : 1, 363 isp_topo : 3, 364 loop_seen_once : 1; 365 uint32_t : 8, 366 isp_portid : 24; /* S_ID */ 367 uint16_t isp_fwoptions; 368 uint16_t isp_xfwoptions; 369 uint16_t isp_zfwoptions; 370 uint16_t isp_loopid; /* hard loop id */ 371 uint16_t isp_fwattr; /* firmware attributes */ 372 uint16_t isp_execthrottle; 373 uint8_t isp_retry_delay; 374 uint8_t isp_retry_count; 375 uint8_t isp_reserved; 376 uint16_t isp_maxalloc; 377 uint16_t isp_maxfrmlen; 378 uint64_t isp_nodewwn; 379 uint64_t isp_portwwn; 380 381 /* 382 * Our Port Data Base 383 */ 384 fcportdb_t portdb[MAX_FC_TARG]; 385 386 /* 387 * This maps system virtual 'target' id to a portdb entry. 388 * 389 * The mapping function is to take any non-zero entry and 390 * subtract one to get the portdb index. This means that 391 * entries which are zero are unmapped (i.e., don't exist). 392 */ 393 uint16_t isp_ini_map[MAX_FC_TARG]; 394 395 /* 396 * Scratch DMA mapped in area to fetch Port Database stuff, etc. 397 */ 398 void * isp_scratch; 399 XS_DMA_ADDR_T isp_scdma; 400 #ifdef ISP_FW_CRASH_DUMP 401 uint16_t * isp_dump_data; 402 #endif 403 } fcparam; 404 405 #define FW_CONFIG_WAIT 0 406 #define FW_WAIT_AL_PA 1 407 #define FW_WAIT_LOGIN 2 408 #define FW_READY 3 409 #define FW_LOSS_OF_SYNC 4 410 #define FW_ERROR 5 411 #define FW_REINIT 6 412 #define FW_NON_PART 7 413 414 #define LOOP_NIL 0 415 #define LOOP_LIP_RCVD 1 416 #define LOOP_PDB_RCVD 2 417 #define LOOP_SCANNING_LOOP 3 418 #define LOOP_LSCAN_DONE 4 419 #define LOOP_SCANNING_FABRIC 5 420 #define LOOP_FSCAN_DONE 6 421 #define LOOP_SYNCING_PDB 7 422 #define LOOP_READY 8 423 424 #define TOPO_NL_PORT 0 425 #define TOPO_FL_PORT 1 426 #define TOPO_N_PORT 2 427 #define TOPO_F_PORT 3 428 #define TOPO_PTP_STUB 4 429 430 /* 431 * Soft Structure per host adapter 432 */ 433 struct ispsoftc { 434 /* 435 * Platform (OS) specific data 436 */ 437 struct isposinfo isp_osinfo; 438 439 /* 440 * Pointer to bus specific functions and data 441 */ 442 struct ispmdvec * isp_mdvec; 443 444 /* 445 * (Mostly) nonvolatile state. Board specific parameters 446 * may contain some volatile state (e.g., current loop state). 447 */ 448 449 void * isp_param; /* type specific */ 450 uint16_t isp_fwrev[3]; /* Loaded F/W revision */ 451 uint16_t isp_romfw_rev[3]; /* PROM F/W revision */ 452 uint16_t isp_maxcmds; /* max possible I/O cmds */ 453 uint8_t isp_type; /* HBA Chip Type */ 454 uint8_t isp_revision; /* HBA Chip H/W Revision */ 455 uint32_t isp_maxluns; /* maximum luns supported */ 456 457 uint32_t isp_clock : 8, /* input clock */ 458 : 4, 459 isp_port : 1, /* 23XX/24XX only */ 460 isp_failed : 1, /* board failed */ 461 isp_open : 1, /* opened (ioctl) */ 462 isp_touched : 1, /* board ever seen? */ 463 isp_bustype : 1, /* SBus or PCI */ 464 isp_loaded_fw : 1, /* loaded firmware */ 465 isp_role : 2, /* roles supported */ 466 isp_dblev : 12; /* debug log mask */ 467 468 uint32_t isp_confopts; /* config options */ 469 470 uint32_t isp_rqstinrp; /* register for REQINP */ 471 uint32_t isp_rqstoutrp; /* register for REQOUTP */ 472 uint32_t isp_respinrp; /* register for RESINP */ 473 uint32_t isp_respoutrp; /* register for RESOUTP */ 474 uint32_t isp_atioinrp; /* register for ATIOINP */ 475 uint32_t isp_atiooutrp; /* register for ATIOOUTP */ 476 477 /* 478 * Instrumentation 479 */ 480 uint64_t isp_intcnt; /* total int count */ 481 uint64_t isp_intbogus; /* spurious int count */ 482 uint64_t isp_intmboxc; /* mbox completions */ 483 uint64_t isp_intoasync; /* other async */ 484 uint64_t isp_rsltccmplt; /* CMDs on result q */ 485 uint64_t isp_fphccmplt; /* CMDs via fastpost */ 486 uint16_t isp_rscchiwater; 487 uint16_t isp_fpcchiwater; 488 489 /* 490 * Volatile state 491 */ 492 493 volatile uint32_t : 8, 494 isp_mboxbsy : 1, /* mailbox command active */ 495 isp_state : 3, 496 isp_sendmarker : 2, /* send a marker entry */ 497 isp_update : 2, /* update parameters */ 498 isp_nactive : 16; /* how many commands active */ 499 volatile uint32_t isp_reqodx; /* index of last ISP pickup */ 500 volatile uint32_t isp_reqidx; /* index of next request */ 501 volatile uint32_t isp_residx; /* index of next result */ 502 volatile uint32_t isp_resodx; /* index of next result */ 503 volatile uint32_t isp_rspbsy; 504 volatile uint32_t isp_lasthdls; /* last handle seed */ 505 volatile uint32_t isp_obits; /* mailbox command output */ 506 volatile uint16_t isp_mboxtmp[MAILBOX_STORAGE]; 507 volatile uint16_t isp_lastmbxcmd; /* last mbox command sent */ 508 volatile uint16_t isp_mbxwrk0; 509 volatile uint16_t isp_mbxwrk1; 510 volatile uint16_t isp_mbxwrk2; 511 volatile uint16_t isp_mbxwrk8; 512 void * isp_mbxworkp; 513 514 /* 515 * Active commands are stored here, indexed by handle functions. 516 */ 517 XS_T **isp_xflist; 518 519 #ifdef ISP_TARGET_MODE 520 /* 521 * Active target commands are stored here, indexed by handle function. 522 */ 523 void **isp_tgtlist; 524 #endif 525 526 /* 527 * request/result queue pointers and DMA handles for them. 528 */ 529 void * isp_rquest; 530 void * isp_result; 531 XS_DMA_ADDR_T isp_rquest_dma; 532 XS_DMA_ADDR_T isp_result_dma; 533 #ifdef ISP_TARGET_MODE 534 /* for 24XX only */ 535 void * isp_atioq; 536 XS_DMA_ADDR_T isp_atioq_dma; 537 #endif 538 }; 539 540 #define SDPARAM(isp) ((sdparam *) (isp)->isp_param) 541 #define FCPARAM(isp) ((fcparam *) (isp)->isp_param) 542 543 /* 544 * ISP Driver Run States 545 */ 546 #define ISP_NILSTATE 0 547 #define ISP_CRASHED 1 548 #define ISP_RESETSTATE 2 549 #define ISP_INITSTATE 3 550 #define ISP_RUNSTATE 4 551 552 /* 553 * ISP Configuration Options 554 */ 555 #define ISP_CFG_NORELOAD 0x80 /* don't download f/w */ 556 #define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */ 557 #define ISP_CFG_TWOGB 0x20 /* force 2GB connection (23XX only) */ 558 #define ISP_CFG_ONEGB 0x10 /* force 1GB connection (23XX only) */ 559 #define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */ 560 #define ISP_CFG_PORT_PREF 0x0C /* Mask for Port Prefs (2200 only) */ 561 #define ISP_CFG_LPORT 0x00 /* prefer {N/F}L-Port connection */ 562 #define ISP_CFG_NPORT 0x04 /* prefer {N/F}-Port connection */ 563 #define ISP_CFG_NPORT_ONLY 0x08 /* insist on {N/F}-Port connection */ 564 #define ISP_CFG_LPORT_ONLY 0x0C /* insist on {N/F}L-Port connection */ 565 #define ISP_CFG_OWNWWPN 0x100 /* override NVRAM wwpn */ 566 #define ISP_CFG_OWNWWNN 0x200 /* override NVRAM wwnn */ 567 #define ISP_CFG_OWNFSZ 0x400 /* override NVRAM frame size */ 568 #define ISP_CFG_OWNLOOPID 0x800 /* override NVRAM loopid */ 569 #define ISP_CFG_OWNEXCTHROTTLE 0x1000 /* override NVRAM execution throttle */ 570 #define ISP_CFG_FOURGB 0x2000 /* force 4GB connection (24XX only) */ 571 572 /* 573 * Prior to calling isp_reset for the first time, the outer layer 574 * should set isp_role to one of NONE, INITIATOR, TARGET, BOTH. 575 * 576 * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded, 577 * NVRAM read, and defaults set, but any further initialization (e.g. 578 * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done. 579 * 580 * If INITIATOR MODE isn't set, attempts to run commands will be stopped 581 * at isp_start and completed with the moral equivalent of SELECTION TIMEOUT. 582 * 583 * If TARGET MODE is set, it doesn't mean that the rest of target mode support 584 * needs to be enabled, or will even work. What happens with the 2X00 cards 585 * here is that if you have enabled it with TARGET MODE as part of the ICB 586 * options, but you haven't given the f/w any ram resources for ATIOs or 587 * Immediate Notifies, the f/w just handles what it can and you never see 588 * anything. Basically, it sends a single byte of data (the first byte, 589 * which you can set as part of the INITIALIZE CONTROL BLOCK command) for 590 * INQUIRY, and sends back QUEUE FULL status for any other command. 591 * 592 */ 593 #define ISP_ROLE_NONE 0x0 594 #define ISP_ROLE_TARGET 0x1 595 #define ISP_ROLE_INITIATOR 0x2 596 #define ISP_ROLE_BOTH (ISP_ROLE_TARGET|ISP_ROLE_INITIATOR) 597 #define ISP_ROLE_EITHER ISP_ROLE_BOTH 598 #ifndef ISP_DEFAULT_ROLES 599 #define ISP_DEFAULT_ROLES ISP_ROLE_INITIATOR 600 #endif 601 602 603 /* 604 * Firmware related defines 605 */ 606 #define ISP_CODE_ORG 0x1000 /* default f/w code start */ 607 #define ISP_CODE_ORG_2300 0x0800 /* ..except for 2300s */ 608 #define ISP_CODE_ORG_2400 0x100000 /* ..and 2400s */ 609 #define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic) 610 #define ISP_FW_MAJOR(code) ((code >> 24) & 0xff) 611 #define ISP_FW_MINOR(code) ((code >> 16) & 0xff) 612 #define ISP_FW_MICRO(code) ((code >> 8) & 0xff) 613 #define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2]) 614 #define ISP_FW_MAJORX(xp) (xp[0]) 615 #define ISP_FW_MINORX(xp) (xp[1]) 616 #define ISP_FW_MICROX(xp) (xp[2]) 617 #define ISP_FW_NEWER_THAN(i, major, minor, micro) \ 618 (ISP_FW_REVX((i)->isp_fwrev) > ISP_FW_REV(major, minor, micro)) 619 #define ISP_FW_OLDER_THAN(i, major, minor, micro) \ 620 (ISP_FW_REVX((i)->isp_fwrev) < ISP_FW_REV(major, minor, micro)) 621 622 /* 623 * Bus (implementation) types 624 */ 625 #define ISP_BT_PCI 0 /* PCI Implementations */ 626 #define ISP_BT_SBUS 1 /* SBus Implementations */ 627 628 /* 629 * If we have not otherwise defined SBus support away make sure 630 * it is defined here such that the code is included as default 631 */ 632 #ifndef ISP_SBUS_SUPPORTED 633 #define ISP_SBUS_SUPPORTED 1 634 #endif 635 636 /* 637 * Chip Types 638 */ 639 #define ISP_HA_SCSI 0xf 640 #define ISP_HA_SCSI_UNKNOWN 0x1 641 #define ISP_HA_SCSI_1020 0x2 642 #define ISP_HA_SCSI_1020A 0x3 643 #define ISP_HA_SCSI_1040 0x4 644 #define ISP_HA_SCSI_1040A 0x5 645 #define ISP_HA_SCSI_1040B 0x6 646 #define ISP_HA_SCSI_1040C 0x7 647 #define ISP_HA_SCSI_1240 0x8 648 #define ISP_HA_SCSI_1080 0x9 649 #define ISP_HA_SCSI_1280 0xa 650 #define ISP_HA_SCSI_10160 0xb 651 #define ISP_HA_SCSI_12160 0xc 652 #define ISP_HA_FC 0xf0 653 #define ISP_HA_FC_2100 0x10 654 #define ISP_HA_FC_2200 0x20 655 #define ISP_HA_FC_2300 0x30 656 #define ISP_HA_FC_2312 0x40 657 #define ISP_HA_FC_2322 0x50 658 #define ISP_HA_FC_2400 0x60 659 660 #define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI) 661 #define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240) 662 #define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080) 663 #define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280) 664 #define IS_10160(isp) (isp->isp_type == ISP_HA_SCSI_10160) 665 #define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160) 666 667 #define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp)) 668 #define IS_1X160(isp) (IS_10160(isp) || IS_12160(isp)) 669 #define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp)) 670 #define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_1X160(isp)) 671 #define IS_ULTRA3(isp) (IS_1X160(isp)) 672 673 #define IS_FC(isp) ((isp)->isp_type & ISP_HA_FC) 674 #define IS_2100(isp) ((isp)->isp_type == ISP_HA_FC_2100) 675 #define IS_2200(isp) ((isp)->isp_type == ISP_HA_FC_2200) 676 #define IS_23XX(isp) ((isp)->isp_type >= ISP_HA_FC_2300 && \ 677 (isp)->isp_type < ISP_HA_FC_2400) 678 #define IS_2300(isp) ((isp)->isp_type == ISP_HA_FC_2300) 679 #define IS_2312(isp) ((isp)->isp_type == ISP_HA_FC_2312) 680 #define IS_2322(isp) ((isp)->isp_type == ISP_HA_FC_2322) 681 #define IS_24XX(isp) ((isp)->isp_type >= ISP_HA_FC_2400) 682 683 /* 684 * DMA related macros 685 */ 686 #define DMA_WD3(x) (((uint16_t)(((uint64_t)x) >> 48)) & 0xffff) 687 #define DMA_WD2(x) (((uint16_t)(((uint64_t)x) >> 32)) & 0xffff) 688 #define DMA_WD1(x) ((uint16_t)((x) >> 16) & 0xffff) 689 #define DMA_WD0(x) ((uint16_t)((x) & 0xffff)) 690 691 #define DMA_LO32(x) ((uint32_t) (x)) 692 #define DMA_HI32(x) ((uint32_t)(((uint64_t)x) >> 32)) 693 694 /* 695 * Core System Function Prototypes 696 */ 697 698 /* 699 * Reset Hardware. Totally. Assumes that you'll follow this with 700 * a call to isp_init. 701 */ 702 void isp_reset(ispsoftc_t *); 703 704 /* 705 * Initialize Hardware to known state 706 */ 707 void isp_init(ispsoftc_t *); 708 709 /* 710 * Reset the ISP and call completion for any orphaned commands. 711 */ 712 void isp_reinit(ispsoftc_t *); 713 714 #ifdef ISP_FW_CRASH_DUMP 715 /* 716 * Dump firmware entry point. 717 */ 718 void isp_fw_dump(ispsoftc_t *isp); 719 #endif 720 721 /* 722 * Internal Interrupt Service Routine 723 * 724 * The outer layers do the spade work to get the appropriate status register, 725 * semaphore register and first mailbox register (if appropriate). This also 726 * means that most spurious/bogus interrupts not for us can be filtered first. 727 */ 728 void isp_intr(ispsoftc_t *, uint32_t, uint16_t, uint16_t); 729 730 731 /* 732 * Command Entry Point- Platform Dependent layers call into this 733 */ 734 int isp_start(XS_T *); 735 736 /* these values are what isp_start returns */ 737 #define CMD_COMPLETE 101 /* command completed */ 738 #define CMD_EAGAIN 102 /* busy- maybe retry later */ 739 #define CMD_QUEUED 103 /* command has been queued for execution */ 740 #define CMD_RQLATER 104 /* requeue this command later */ 741 742 /* 743 * Command Completion Point- Core layers call out from this with completed cmds 744 */ 745 void isp_done(XS_T *); 746 747 /* 748 * Platform Dependent to External to Internal Control Function 749 * 750 * Assumes locks are held on entry. You should note that with many of 751 * these commands and locks may be released while this is occurring. 752 * 753 * A few notes about some of these functions: 754 * 755 * ISPCTL_FCLINK_TEST tests to make sure we have good fibre channel link. 756 * The argument is a pointer to an integer which is the time, in microseconds, 757 * we should wait to see whether we have good link. This test, if successful, 758 * lets us know our connection topology and our Loop ID/AL_PA and so on. 759 * You can't get anywhere without this. 760 * 761 * ISPCTL_SCAN_FABRIC queries the name server (if we're on a fabric) for 762 * all entities using the FC Generic Services subcommand GET ALL NEXT. 763 * For each found entity, an ISPASYNC_FABRICDEV event is generated (see 764 * below). 765 * 766 * ISPCTL_SCAN_LOOP does a local loop scan. This is only done if the connection 767 * topology is NL or FL port (private or public loop). Since the Qlogic f/w 768 * 'automatically' manages local loop connections, this function essentially 769 * notes the arrival, departure, and possible shuffling around of local loop 770 * entities. Thus for each arrival and departure this generates an isp_async 771 * event of ISPASYNC_PROMENADE (see below). 772 * 773 * ISPCTL_PDB_SYNC is somewhat misnamed. It actually is the final step, in 774 * order, of ISPCTL_FCLINK_TEST, ISPCTL_SCAN_FABRIC, and ISPCTL_SCAN_LOOP. 775 * The main purpose of ISPCTL_PDB_SYNC is to complete management of logging 776 * and logging out of fabric devices (if one is on a fabric) and then marking 777 * the 'loop state' as being ready to now be used for sending commands to 778 * devices. Originally fabric name server and local loop scanning were 779 * part of this function. It's now been separated to allow for finer control. 780 */ 781 typedef enum { 782 ISPCTL_RESET_BUS, /* Reset Bus */ 783 ISPCTL_RESET_DEV, /* Reset Device */ 784 ISPCTL_ABORT_CMD, /* Abort Command */ 785 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters (SCSI) */ 786 ISPCTL_FCLINK_TEST, /* Test FC Link Status */ 787 ISPCTL_SCAN_FABRIC, /* (Re)scan Fabric Name Server */ 788 ISPCTL_SCAN_LOOP, /* (Re)scan Local Loop */ 789 ISPCTL_PDB_SYNC, /* Synchronize Port Database */ 790 ISPCTL_SEND_LIP, /* Send a LIP */ 791 ISPCTL_GET_PORTNAME, /* get portname from an N-port handle */ 792 ISPCTL_RUN_MBOXCMD, /* run a mailbox command */ 793 ISPCTL_TOGGLE_TMODE, /* toggle target mode */ 794 ISPCTL_GET_PDB /* get a single port database entry */ 795 } ispctl_t; 796 int isp_control(ispsoftc_t *, ispctl_t, void *); 797 798 799 /* 800 * Platform Dependent to Internal to External Control Function 801 * (each platform must provide such a function) 802 * 803 * Assumes locks are held. 804 * 805 * A few notes about some of these functions: 806 * 807 * ISPASYNC_CHANGE_NOTIFY notifies the outer layer that a change has 808 * occurred that invalidates the list of fabric devices known and/or 809 * the list of known loop devices. The argument passed is a pointer 810 * whose values are defined below (local loop change, name server 811 * change, other). 'Other' may simply be a LIP, or a change in 812 * connection topology. 813 * 814 * ISPASYNC_FABRIC_DEV announces the next element in a list of 815 * fabric device names we're getting out of the name server. The 816 * argument points to a GET ALL NEXT response structure. The list 817 * is known to terminate with an entry that refers to ourselves. 818 * One of the main purposes of this function is to allow outer 819 * layers, which are OS dependent, to set policy as to which fabric 820 * devices might actually be logged into (and made visible) later 821 * at ISPCTL_PDB_SYNC time. Since there's a finite number of fabric 822 * devices that we can log into (256 less 3 'reserved' for F-port 823 * topologies), and fabrics can grow up to 8 million or so entries 824 * (24 bits of Port Address, less a wad of reserved spaces), clearly 825 * we had better let the OS determine login policy. 826 * 827 * ISPASYNC_PROMENADE has an argument that is a pointer to an integer which 828 * is an index into the portdb in the softc ('target'). Whether that entry's 829 * valid tag is set or not says whether something has arrived or departed. 830 * The name refers to a favorite pastime of many city dwellers- watching 831 * people come and go, talking of Michaelangelo, and so on.. 832 * 833 * ISPASYNC_UNHANDLED_RESPONSE gives outer layers a chance to parse a 834 * response queue entry not otherwise handled. The outer layer should 835 * return non-zero if it handled it. The 'arg' points to an unmassaged 836 * response queue entry. 837 */ 838 839 typedef enum { 840 ISPASYNC_NEW_TGT_PARAMS, /* New Target Parameters Negotiated */ 841 ISPASYNC_BUS_RESET, /* Bus Was Reset */ 842 ISPASYNC_LOOP_DOWN, /* FC Loop Down */ 843 ISPASYNC_LOOP_UP, /* FC Loop Up */ 844 ISPASYNC_LIP, /* LIP Received */ 845 ISPASYNC_LOOP_RESET, /* Loop Reset Received */ 846 ISPASYNC_CHANGE_NOTIFY, /* FC Change Notification */ 847 ISPASYNC_DEV_ARRIVED, /* FC Device Arrival */ 848 ISPASYNC_DEV_CHANGED, /* FC Device Change */ 849 ISPASYNC_DEV_STAYED, /* FC Device Stayed the Same */ 850 ISPASYNC_DEV_GONE, /* FC Device Depart */ 851 ISPASYNC_TARGET_NOTIFY, /* target asynchronous notification event */ 852 ISPASYNC_TARGET_ACTION, /* target action requested */ 853 ISPASYNC_CONF_CHANGE, /* Platform Configuration Change */ 854 ISPASYNC_UNHANDLED_RESPONSE, /* Unhandled Response Entry */ 855 ISPASYNC_FW_CRASH, /* Firmware has crashed */ 856 ISPASYNC_FW_DUMPED, /* Firmware crashdump taken */ 857 ISPASYNC_FW_RESTARTED /* Firmware has been restarted */ 858 } ispasync_t; 859 int isp_async(ispsoftc_t *, ispasync_t, void *); 860 861 #define ISPASYNC_CHANGE_PDB ((void *) 0) 862 #define ISPASYNC_CHANGE_SNS ((void *) 1) 863 #define ISPASYNC_CHANGE_OTHER ((void *) 2) 864 865 /* 866 * Platform Dependent Error and Debug Printout 867 * 868 * Generally this is: 869 * 870 * void isp_prt(ispsoftc_t *, int level, const char *, ...) 871 * 872 * but due to compiler differences on different platforms this won't be 873 * formally done here. Instead, it goes in each platform definition file. 874 */ 875 876 #define ISP_LOGALL 0x0 /* log always */ 877 #define ISP_LOGCONFIG 0x1 /* log configuration messages */ 878 #define ISP_LOGINFO 0x2 /* log informational messages */ 879 #define ISP_LOGWARN 0x4 /* log warning messages */ 880 #define ISP_LOGERR 0x8 /* log error messages */ 881 #define ISP_LOGDEBUG0 0x10 /* log simple debug messages */ 882 #define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */ 883 #define ISP_LOGDEBUG2 0x40 /* log most debug messages */ 884 #define ISP_LOGDEBUG3 0x80 /* log high frequency debug messages */ 885 #define ISP_LOGSANCFG 0x100 /* log SAN configuration */ 886 #define ISP_LOGTDEBUG0 0x200 /* log simple debug messages (target mode) */ 887 #define ISP_LOGTDEBUG1 0x400 /* log intermediate debug messages (target) */ 888 #define ISP_LOGTDEBUG2 0x800 /* log all debug messages (target) */ 889 890 /* 891 * Each Platform provides it's own isposinfo substructure of the ispsoftc 892 * defined above. 893 * 894 * Each platform must also provide the following macros/defines: 895 * 896 * 897 * ISP2100_SCRLEN - length for the Fibre Channel scratch DMA area 898 * 899 * MEMZERO(dst, src) platform zeroing function 900 * MEMCPY(dst, src, count) platform copying function 901 * SNPRINTF(buf, bufsize, fmt, ...) snprintf 902 * USEC_DELAY(usecs) microsecond spindelay function 903 * USEC_SLEEP(isp, usecs) microsecond sleep function 904 * 905 * NANOTIME_T nanosecond time type 906 * 907 * GET_NANOTIME(NANOTIME_T *) get current nanotime. 908 * 909 * GET_NANOSEC(NANOTIME_T *) get uint64_t from NANOTIME_T 910 * 911 * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *) 912 * subtract two NANOTIME_T values 913 * 914 * 915 * MAXISPREQUEST(ispsoftc_t *) maximum request queue size 916 * for this particular board type 917 * 918 * MEMORYBARRIER(ispsoftc_t *, barrier_type, offset, size) 919 * 920 * Function/Macro the provides memory synchronization on 921 * various objects so that the ISP's and the system's view 922 * of the same object is consistent. 923 * 924 * MBOX_ACQUIRE(ispsoftc_t *) acquire lock on mailbox regs 925 * MBOX_WAIT_COMPLETE(ispsoftc_t *, mbreg_t *) wait for cmd to be done 926 * MBOX_NOTIFY_COMPLETE(ispsoftc_t *) notification of mbox cmd donee 927 * MBOX_RELEASE(ispsoftc_t *) release lock on mailbox regs 928 * 929 * FC_SCRATCH_ACQUIRE(ispsoftc_t *) acquire lock on FC scratch area 930 * FC_SCRATCH_RELEASE(ispsoftc_t *) acquire lock on FC scratch area 931 * 932 * SCSI_GOOD SCSI 'Good' Status 933 * SCSI_CHECK SCSI 'Check Condition' Status 934 * SCSI_BUSY SCSI 'Busy' Status 935 * SCSI_QFULL SCSI 'Queue Full' Status 936 * 937 * XS_T Platform SCSI transaction type (i.e., command for HBA) 938 * XS_DMA_ADDR_T Platform PCI DMA Address Type 939 * XS_ISP(xs) gets an instance out of an XS_T 940 * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) "" 941 * XS_TGT(xs) gets the target "" 942 * XS_LUN(xs) gets the lun "" 943 * XS_CDBP(xs) gets a pointer to the scsi CDB "" 944 * XS_CDBLEN(xs) gets the CDB's length "" 945 * XS_XFRLEN(xs) gets the associated data transfer length "" 946 * XS_TIME(xs) gets the time (in milliseconds) for this command 947 * XS_RESID(xs) gets the current residual count 948 * XS_STSP(xs) gets a pointer to the SCSI status byte "" 949 * XS_SNSP(xs) gets a pointer to the associate sense data 950 * XS_SNSLEN(xs) gets the length of sense data storage 951 * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key 952 * XS_TAG_P(xs) predicate of whether this command should be tagged 953 * XS_TAG_TYPE(xs) which type of tag to use 954 * XS_SETERR(xs) set error state 955 * 956 * HBA_NOERROR command has no erros 957 * HBA_BOTCH hba botched something 958 * HBA_CMDTIMEOUT command timed out 959 * HBA_SELTIMEOUT selection timed out (also port logouts for FC) 960 * HBA_TGTBSY target returned a BUSY status 961 * HBA_BUSRESET bus reset destroyed command 962 * HBA_ABORTED command was aborted (by request) 963 * HBA_DATAOVR a data overrun was detected 964 * HBA_ARQFAIL Automatic Request Sense failed 965 * 966 * XS_ERR(xs) return current error state 967 * XS_NOERR(xs) there is no error currently set 968 * XS_INITERR(xs) initialize error state 969 * 970 * XS_SAVE_SENSE(xs, sp, len) save sense data 971 * 972 * XS_SET_STATE_STAT(isp, sp, xs) platform dependent interpreter of 973 * response queue entry status bits 974 * 975 * 976 * DEFAULT_IID(ispsoftc_t *) Default SCSI initiator ID 977 * DEFAULT_LOOPID(ispsoftc_t *) Default FC Loop ID 978 * DEFAULT_NODEWWN(ispsoftc_t *) Default Node WWN 979 * DEFAULT_PORTWWN(ispsoftc_t *) Default Port WWN 980 * DEFAULT_FRAMESIZE(ispsoftc_t *) Default Frame Size 981 * DEFAULT_EXEC_THROTTLE(ispsoftc_t *) Default Execution Throttle 982 * These establish reasonable defaults for each platform. 983 * These must be available independent of card NVRAM and are 984 * to be used should NVRAM not be readable. 985 * 986 * ISP_NODEWWN(ispsoftc_t *) FC Node WWN to use 987 * ISP_PORTWWN(ispsoftc_t *) FC Port WWN to use 988 * 989 * These are to be used after NVRAM is read. The tags 990 * in fcparam.isp_{node,port}wwn reflect the values 991 * read from NVRAM (possibly corrected for card botches). 992 * Each platform can take that information and override 993 * it or ignore and return the Node and Port WWNs to be 994 * used when sending the Qlogic f/w the Initialization Control 995 * Block. 996 * 997 * (XXX these do endian specific transformations- in transition XXX) 998 * 999 * ISP_IOXPUT_8(ispsoftc_t *, uint8_t srcval, uint8_t *dstptr) 1000 * ISP_IOXPUT_16(ispsoftc_t *, uint16_t srcval, uint16_t *dstptr) 1001 * ISP_IOXPUT_32(ispsoftc_t *, uint32_t srcval, uint32_t *dstptr) 1002 * 1003 * ISP_IOXGET_8(ispsoftc_t *, uint8_t *srcptr, uint8_t dstrval) 1004 * ISP_IOXGET_16(ispsoftc_t *, uint16_t *srcptr, uint16_t dstrval) 1005 * ISP_IOXGET_32(ispsoftc_t *, uint32_t *srcptr, uint32_t dstrval) 1006 * 1007 * ISP_SWIZZLE_NVRAM_WORD(ispsoftc_t *, uint16_t *) 1008 */ 1009 1010 #endif /* _ISPVAR_H */ 1011