xref: /freebsd/sys/dev/isp/ispvar.h (revision 3fc36ee018bb836bd1796067cf4ef8683f166ebc)
1 /* $FreeBSD$ */
2 /*-
3  *  Copyright (c) 1997-2009 by Matthew Jacob
4  *  All rights reserved.
5  *
6  *  Redistribution and use in source and binary forms, with or without
7  *  modification, are permitted provided that the following conditions
8  *  are met:
9  *
10  *  1. Redistributions of source code must retain the above copyright
11  *     notice, this list of conditions and the following disclaimer.
12  *  2. Redistributions in binary form must reproduce the above copyright
13  *     notice, this list of conditions and the following disclaimer in the
14  *     documentation and/or other materials provided with the distribution.
15  *
16  *  THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  *  ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20  *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  *  SUCH DAMAGE.
27  *
28  */
29 /*
30  * Soft Definitions for for Qlogic ISP SCSI adapters.
31  */
32 
33 #ifndef	_ISPVAR_H
34 #define	_ISPVAR_H
35 
36 #if defined(__NetBSD__) || defined(__OpenBSD__)
37 #include <dev/ic/isp_stds.h>
38 #include <dev/ic/ispmbox.h>
39 #endif
40 #ifdef	__FreeBSD__
41 #include <dev/isp/isp_stds.h>
42 #include <dev/isp/ispmbox.h>
43 #endif
44 #ifdef	__linux__
45 #include "isp_stds.h"
46 #include "ispmbox.h"
47 #endif
48 #ifdef	__svr4__
49 #include "isp_stds.h"
50 #include "ispmbox.h"
51 #endif
52 
53 #define	ISP_CORE_VERSION_MAJOR	7
54 #define	ISP_CORE_VERSION_MINOR	0
55 
56 /*
57  * Vector for bus specific code to provide specific services.
58  */
59 typedef struct ispsoftc ispsoftc_t;
60 struct ispmdvec {
61 	int		(*dv_rd_isr) (ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *);
62 	uint32_t	(*dv_rd_reg) (ispsoftc_t *, int);
63 	void		(*dv_wr_reg) (ispsoftc_t *, int, uint32_t);
64 	int		(*dv_mbxdma) (ispsoftc_t *);
65 	int		(*dv_dmaset) (ispsoftc_t *, XS_T *, void *);
66 	void		(*dv_dmaclr) (ispsoftc_t *, XS_T *, uint32_t);
67 	void		(*dv_reset0) (ispsoftc_t *);
68 	void		(*dv_reset1) (ispsoftc_t *);
69 	void		(*dv_dregs) (ispsoftc_t *, const char *);
70 	const void *	dv_ispfw;	/* ptr to f/w */
71 	uint16_t	dv_conf1;
72 	uint16_t	dv_clock;	/* clock frequency */
73 };
74 
75 /*
76  * Overall parameters
77  */
78 #define	MAX_TARGETS		16
79 #ifndef	MAX_FC_TARG
80 #define	MAX_FC_TARG		1024
81 #endif
82 #define	ISP_MAX_TARGETS(isp)	(IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
83 #define	ISP_MAX_LUNS(isp)	(isp)->isp_maxluns
84 
85 /*
86  * Macros to access ISP registers through bus specific layers-
87  * mostly wrappers to vector through the mdvec structure.
88  */
89 #define	ISP_READ_ISR(isp, isrp, semap, info)	\
90 	(*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, info)
91 
92 #define	ISP_READ(isp, reg)	\
93 	(*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
94 
95 #define	ISP_WRITE(isp, reg, val)	\
96 	(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
97 
98 #define	ISP_MBOXDMASETUP(isp)	\
99 	(*(isp)->isp_mdvec->dv_mbxdma)((isp))
100 
101 #define	ISP_DMASETUP(isp, xs, req)	\
102 	(*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req))
103 
104 #define	ISP_DMAFREE(isp, xs, hndl)		\
105 	if ((isp)->isp_mdvec->dv_dmaclr)	\
106 	    (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
107 
108 #define	ISP_RESET0(isp)	\
109 	if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
110 #define	ISP_RESET1(isp)	\
111 	if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
112 #define	ISP_DUMPREGS(isp, m)	\
113 	if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m))
114 
115 #define	ISP_SETBITS(isp, reg, val)	\
116  (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
117 
118 #define	ISP_CLRBITS(isp, reg, val)	\
119  (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
120 
121 /*
122  * The MEMORYBARRIER macro is defined per platform (to provide synchronization
123  * on Request and Response Queues, Scratch DMA areas, and Registers)
124  *
125  * Defined Memory Barrier Synchronization Types
126  */
127 #define	SYNC_REQUEST	0	/* request queue synchronization */
128 #define	SYNC_RESULT	1	/* result queue synchronization */
129 #define	SYNC_SFORDEV	2	/* scratch, sync for ISP */
130 #define	SYNC_SFORCPU	3	/* scratch, sync for CPU */
131 #define	SYNC_REG	4	/* for registers */
132 #define	SYNC_ATIOQ	5	/* atio result queue (24xx) */
133 #define	SYNC_IFORDEV	6	/* synchrounous IOCB, sync for ISP */
134 #define	SYNC_IFORCPU	7	/* synchrounous IOCB, sync for CPU */
135 
136 /*
137  * Request/Response Queue defines and macros.
138  * The maximum is defined per platform (and can be based on board type).
139  */
140 /* This is the size of a queue entry (request and response) */
141 #define	QENTRY_LEN			64
142 /* Both request and result queue length must be a power of two */
143 #define	RQUEST_QUEUE_LEN(x)		MAXISPREQUEST(x)
144 #ifdef	ISP_TARGET_MODE
145 #define	RESULT_QUEUE_LEN(x)		MAXISPREQUEST(x)
146 #else
147 #define	RESULT_QUEUE_LEN(x)		\
148 	(((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2)
149 #endif
150 #define	ISP_QUEUE_ENTRY(q, idx)		(((uint8_t *)q) + ((idx) * QENTRY_LEN))
151 #define	ISP_QUEUE_SIZE(n)		((n) * QENTRY_LEN)
152 #define	ISP_NXT_QENTRY(idx, qlen)	(((idx) + 1) & ((qlen)-1))
153 #define	ISP_QFREE(in, out, qlen)	\
154 	((in == out)? (qlen - 1) : ((in > out)? \
155 	((qlen - 1) - (in - out)) : (out - in - 1)))
156 #define	ISP_QAVAIL(isp)	\
157 	ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp))
158 
159 #define	ISP_ADD_REQUEST(isp, nxti)						\
160 	MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1);	\
161 	ISP_WRITE(isp, isp->isp_rqstinrp, nxti);				\
162 	isp->isp_reqidx = nxti
163 
164 #define	ISP_SYNC_REQUEST(isp)								\
165 	MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1);		\
166 	isp->isp_reqidx = ISP_NXT_QENTRY(isp->isp_reqidx, RQUEST_QUEUE_LEN(isp));	\
167 	ISP_WRITE(isp, isp->isp_rqstinrp, isp->isp_reqidx)
168 
169 /*
170  * SCSI Specific Host Adapter Parameters- per bus, per target
171  */
172 typedef struct {
173 	uint32_t 				: 8,
174 			update			: 1,
175 			sendmarker		: 1,
176 			isp_req_ack_active_neg	: 1,
177 			isp_data_line_active_neg: 1,
178 			isp_cmd_dma_burst_enable: 1,
179 			isp_data_dma_burst_enabl: 1,
180 			isp_fifo_threshold	: 3,
181 			isp_ptisp		: 1,
182 			isp_ultramode		: 1,
183 			isp_diffmode		: 1,
184 			isp_lvdmode		: 1,
185 			isp_fast_mttr		: 1,	/* fast sram */
186 			isp_initiator_id	: 4,
187 			isp_async_data_setup	: 4;
188 	uint16_t	isp_selection_timeout;
189 	uint16_t	isp_max_queue_depth;
190 	uint8_t		isp_tag_aging;
191 	uint8_t		isp_bus_reset_delay;
192 	uint8_t		isp_retry_count;
193 	uint8_t		isp_retry_delay;
194 	struct {
195 		uint32_t
196 			exc_throttle	:	8,
197 					:	1,
198 			dev_enable	:	1,	/* ignored */
199 			dev_update	:	1,
200 			dev_refresh	:	1,
201 			actv_offset	:	4,
202 			goal_offset	:	4,
203 			nvrm_offset	:	4;
204 		uint8_t		actv_period;	/* current sync period */
205 		uint8_t		goal_period;	/* goal sync period */
206 		uint8_t		nvrm_period;	/* nvram sync period */
207 		uint16_t	actv_flags;	/* current device flags */
208 		uint16_t	goal_flags;	/* goal device flags */
209 		uint16_t	nvrm_flags;	/* nvram device flags */
210 	} isp_devparam[MAX_TARGETS];
211 } sdparam;
212 
213 /*
214  * Device Flags
215  */
216 #define	DPARM_DISC	0x8000
217 #define	DPARM_PARITY	0x4000
218 #define	DPARM_WIDE	0x2000
219 #define	DPARM_SYNC	0x1000
220 #define	DPARM_TQING	0x0800
221 #define	DPARM_ARQ	0x0400
222 #define	DPARM_QFRZ	0x0200
223 #define	DPARM_RENEG	0x0100
224 #define	DPARM_NARROW	0x0080
225 #define	DPARM_ASYNC	0x0040
226 #define	DPARM_PPR	0x0020
227 #define	DPARM_DEFAULT	(0xFF00 & ~DPARM_QFRZ)
228 #define	DPARM_SAFE_DFLT	(DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
229 
230 /* technically, not really correct, as they need to be rated based upon clock */
231 #define	ISP_80M_SYNCPARMS	0x0c09
232 #define	ISP_40M_SYNCPARMS	0x0c0a
233 #define	ISP_20M_SYNCPARMS	0x0c0c
234 #define	ISP_20M_SYNCPARMS_1040	0x080c
235 #define	ISP_10M_SYNCPARMS	0x0c19
236 #define	ISP_08M_SYNCPARMS	0x0c25
237 #define	ISP_05M_SYNCPARMS	0x0c32
238 #define	ISP_04M_SYNCPARMS	0x0c41
239 
240 /*
241  * Fibre Channel Specifics
242  */
243 /* These are for non-2K Login Firmware cards */
244 #define	FL_ID			0x7e	/* FL_Port Special ID */
245 #define	SNS_ID			0x80	/* SNS Server Special ID */
246 #define	NPH_MAX			0xfe
247 
248 /* These are for 2K Login Firmware cards */
249 #define	NPH_RESERVED		0x7F0	/* begin of reserved N-port handles */
250 #define	NPH_MGT_ID		0x7FA	/* Management Server Special ID */
251 #define	NPH_SNS_ID		0x7FC	/* SNS Server Special ID */
252 #define	NPH_FABRIC_CTLR		0x7FD	/* Fabric Controller (0xFFFFFD) */
253 #define	NPH_FL_ID		0x7FE	/* F Port Special ID (0xFFFFFE) */
254 #define	NPH_IP_BCST		0x7FF	/* IP Broadcast Special ID (0xFFFFFF) */
255 #define	NPH_MAX_2K		0x800
256 
257 /*
258  * "Unassigned" handle to be used internally
259  */
260 #define	NIL_HANDLE		0xffff
261 
262 /*
263  * Limit for devices on an arbitrated loop.
264  */
265 #define	LOCAL_LOOP_LIM		126
266 
267 /*
268  * Limit for (2K login) N-port handle amounts
269  */
270 #define	MAX_NPORT_HANDLE	2048
271 
272 /*
273  * Special Constants
274  */
275 #define	INI_NONE    		((uint64_t) 0)
276 #define	ISP_NOCHAN		0xff
277 
278 /*
279  * Special Port IDs
280  */
281 #define	MANAGEMENT_PORT_ID	0xFFFFFA
282 #define	SNS_PORT_ID		0xFFFFFC
283 #define	FABRIC_PORT_ID		0xFFFFFE
284 #define	PORT_ANY		0xFFFFFF
285 #define	PORT_NONE		0
286 #define	VALID_PORT(port)	(port != PORT_NONE && port != PORT_ANY)
287 #define	DOMAIN_CONTROLLER_BASE	0xFFFC00
288 #define	DOMAIN_CONTROLLER_END	0xFFFCFF
289 
290 /*
291  * Command Handles
292  *
293  * Most QLogic initiator or target have 32 bit handles associated with them.
294  * We want to have a quick way to index back and forth between a local SCSI
295  * command context and what the firmware is passing back to us. We also
296  * want to avoid working on stale information. This structure handles both
297  * at the expense of some local memory.
298  *
299  * The handle is architected thusly:
300  *
301  *	0 means "free handle"
302  *	bits  0..12 index commands
303  *	bits 13..15 bits index usage
304  *	bits 16..31 contain a rolling sequence
305  *
306  *
307  */
308 typedef struct {
309 	void *		cmd;	/* associated command context */
310 	uint32_t	handle;	/* handle associated with this command */
311 } isp_hdl_t;
312 #define	ISP_HANDLE_FREE		0x00000000
313 #define	ISP_HANDLE_CMD_MASK	0x00001fff
314 #define	ISP_HANDLE_USAGE_MASK	0x0000e000
315 #define	ISP_HANDLE_USAGE_SHIFT	13
316 #define	ISP_H2HT(hdl)	((hdl & ISP_HANDLE_USAGE_MASK) >> ISP_HANDLE_USAGE_SHIFT)
317 #	define	ISP_HANDLE_NONE		0
318 #	define	ISP_HANDLE_INITIATOR	1
319 #	define	ISP_HANDLE_TARGET	2
320 #	define	ISP_HANDLE_CTRL		3
321 #define	ISP_HANDLE_SEQ_MASK	0xffff0000
322 #define	ISP_HANDLE_SEQ_SHIFT	16
323 #define	ISP_H2SEQ(hdl)	((hdl & ISP_HANDLE_SEQ_MASK) >> ISP_HANDLE_SEQ_SHIFT)
324 #define	ISP_VALID_HANDLE(c, hdl)	\
325 	((ISP_H2HT(hdl) == ISP_HANDLE_INITIATOR || \
326 	  ISP_H2HT(hdl) == ISP_HANDLE_TARGET || \
327 	  ISP_H2HT(hdl) == ISP_HANDLE_CTRL) && \
328 	 ((hdl) & ISP_HANDLE_CMD_MASK) < (c)->isp_maxcmds && \
329 	 (hdl) == ((c)->isp_xflist[(hdl) & ISP_HANDLE_CMD_MASK].handle))
330 #define	ISP_BAD_HANDLE_INDEX	0xffffffff
331 
332 
333 /*
334  * FC Port Database entry.
335  *
336  * It has a handle that the f/w uses to address commands to a device.
337  * This handle's value may be assigned by the firmware (e.g., for local loop
338  * devices) or by the driver (e.g., for fabric devices).
339  *
340  * It has a state. If the state if VALID, that means that we've logged into
341  * the device.
342  *
343  * Local loop devices the firmware automatically performs PLOGI on for us
344  * (which is why that handle is imposed upon us). Fabric devices we assign
345  * a handle to and perform the PLOGI on.
346  *
347  * When a PORT DATABASE CHANGED asynchronous event occurs, we mark all VALID
348  * entries as PROBATIONAL. This allows us, if policy says to, just keep track
349  * of devices whose handles change but are otherwise the same device (and
350  * thus keep 'target' constant).
351  *
352  * In any case, we search all possible local loop handles. For each one that
353  * has a port database entity returned, we search for any PROBATIONAL entry
354  * that matches it and update as appropriate. Otherwise, as a new entry, we
355  * find room for it in the Port Database. We *try* and use the handle as the
356  * index to put it into the Database, but that's just an optimization. We mark
357  * the entry VALID and make sure that the target index is updated and correct.
358  *
359  * When we get done searching the local loop, we then search similarly for
360  * a list of devices we've gotten from the fabric name controller (if we're
361  * on a fabric). VALID marking is also done similarly.
362  *
363  * When all of this is done, we can march through the database and clean up
364  * any entry that is still PROBATIONAL (these represent devices which have
365  * departed). Then we're done and can resume normal operations.
366  *
367  * Negative invariants that we try and test for are:
368  *
369  *  + There can never be two non-NIL entries with the same { Port, Node } WWN
370  *    duples.
371  *
372  *  + There can never be two non-NIL entries with the same handle.
373  */
374 typedef struct {
375 	/*
376 	 * This is the handle that the firmware needs in order for us to
377 	 * send commands to the device. For pre-24XX cards, this would be
378 	 * the 'loopid'.
379 	 */
380 	uint16_t	handle;
381 
382 	/*
383 	 * PRLI word 3 parameters contains role as well as other things.
384 	 *
385 	 * The state is the current state of this entry.
386 	 *
387 	 * The is_target is the current state of target on this port.
388 	 *
389 	 * The is_initiator is the current state of initiator on this port.
390 	 *
391 	 * Portid is obvious, as are node && port WWNs. The new_role and
392 	 * new_portid is for when we are pending a change.
393 	 */
394 	uint16_t	prli_word3;		/* PRLI parameters */
395 	uint16_t	new_prli_word3;		/* Incoming new PRLI parameters */
396 	uint16_t			: 12,
397 			probational	: 1,
398 			state		: 3;
399 	uint32_t			: 6,
400 			is_target	: 1,
401 			is_initiator	: 1,
402 			portid		: 24;
403 	uint32_t
404 					: 8,
405 			new_portid	: 24;
406 	uint64_t	node_wwn;
407 	uint64_t	port_wwn;
408 	uint32_t	gone_timer;
409 } fcportdb_t;
410 
411 #define	FC_PORTDB_STATE_NIL		0	/* Empty DB slot */
412 #define	FC_PORTDB_STATE_DEAD		1	/* Was valid, but no more. */
413 #define	FC_PORTDB_STATE_CHANGED		2	/* Was valid, but changed. */
414 #define	FC_PORTDB_STATE_NEW		3	/* Logged in, not announced. */
415 #define	FC_PORTDB_STATE_ZOMBIE		4	/* Invalid, but announced. */
416 #define	FC_PORTDB_STATE_VALID		5	/* Valid */
417 
418 #define	FC_PORTDB_TGT(isp, bus, pdb)		(int)(lp - FCPARAM(isp, bus)->portdb)
419 
420 /*
421  * FC card specific information
422  *
423  * This structure is replicated across multiple channels for multi-id
424  * capapble chipsets, with some entities different on a per-channel basis.
425  */
426 
427 typedef struct {
428 	int			isp_gbspeed;		/* Connection speed */
429 	int			isp_linkstate;		/* Link state */
430 	int			isp_fwstate;		/* ISP F/W state */
431 	int			isp_loopstate;		/* Loop State */
432 	int			isp_topo;		/* Connection Type */
433 
434 	uint32_t				: 4,
435 				fctape_enabled	: 1,
436 				sendmarker	: 1,
437 				role		: 2,
438 				isp_portid	: 24;	/* S_ID */
439 
440 	uint16_t		isp_fwoptions;
441 	uint16_t		isp_xfwoptions;
442 	uint16_t		isp_zfwoptions;
443 	uint16_t		isp_loopid;		/* hard loop id */
444 	uint16_t		isp_sns_hdl;		/* N-port handle for SNS */
445 	uint16_t		isp_lasthdl;		/* only valid for channel 0 */
446 	uint16_t		isp_maxalloc;
447 	uint16_t		isp_fabric_params;
448 	uint16_t		isp_login_hdl;		/* Logging in handle */
449 	uint8_t			isp_retry_delay;
450 	uint8_t			isp_retry_count;
451 
452 	/*
453 	 * Current active WWNN/WWPN
454 	 */
455 	uint64_t		isp_wwnn;
456 	uint64_t		isp_wwpn;
457 
458 	/*
459 	 * NVRAM WWNN/WWPN
460 	 */
461 	uint64_t		isp_wwnn_nvram;
462 	uint64_t		isp_wwpn_nvram;
463 
464 	/*
465 	 * Our Port Data Base
466 	 */
467 	fcportdb_t		portdb[MAX_FC_TARG];
468 
469 	/*
470 	 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
471 	 */
472 	void *			isp_scratch;
473 	XS_DMA_ADDR_T		isp_scdma;
474 
475 	uint8_t			isp_scanscratch[ISP_FC_SCRLEN];
476 } fcparam;
477 
478 #define	FW_CONFIG_WAIT		0
479 #define	FW_WAIT_LINK		1
480 #define	FW_WAIT_LOGIN		2
481 #define	FW_READY		3
482 #define	FW_LOSS_OF_SYNC		4
483 #define	FW_ERROR		5
484 #define	FW_REINIT		6
485 #define	FW_NON_PART		7
486 
487 #define	LOOP_NIL		0
488 #define	LOOP_HAVE_LINK		1
489 #define	LOOP_HAVE_ADDR		2
490 #define	LOOP_TESTING_LINK	3
491 #define	LOOP_LTEST_DONE		4
492 #define	LOOP_SCANNING_LOOP	5
493 #define	LOOP_LSCAN_DONE		6
494 #define	LOOP_SCANNING_FABRIC	7
495 #define	LOOP_FSCAN_DONE		8
496 #define	LOOP_SYNCING_PDB	9
497 #define	LOOP_READY		10
498 
499 #define	TOPO_NL_PORT		0
500 #define	TOPO_FL_PORT		1
501 #define	TOPO_N_PORT		2
502 #define	TOPO_F_PORT		3
503 #define	TOPO_PTP_STUB		4
504 
505 #define TOPO_IS_FABRIC(x)	((x) == TOPO_FL_PORT || (x) == TOPO_F_PORT)
506 
507 /*
508  * Soft Structure per host adapter
509  */
510 struct ispsoftc {
511 	/*
512 	 * Platform (OS) specific data
513 	 */
514 	struct isposinfo	isp_osinfo;
515 
516 	/*
517 	 * Pointer to bus specific functions and data
518 	 */
519 	struct ispmdvec *	isp_mdvec;
520 
521 	/*
522 	 * (Mostly) nonvolatile state. Board specific parameters
523 	 * may contain some volatile state (e.g., current loop state).
524 	 */
525 
526 	void * 			isp_param;	/* type specific */
527 	uint64_t		isp_fwattr;	/* firmware attributes */
528 	uint16_t		isp_fwrev[3];	/* Loaded F/W revision */
529 	uint16_t		isp_maxcmds;	/* max possible I/O cmds */
530 	uint8_t			isp_type;	/* HBA Chip Type */
531 	uint8_t			isp_revision;	/* HBA Chip H/W Revision */
532 	uint16_t		isp_nchan;	/* number of channels */
533 	uint32_t		isp_maxluns;	/* maximum luns supported */
534 
535 	uint32_t		isp_clock	: 8,	/* input clock */
536 						: 4,
537 				isp_port	: 1,	/* 23XX/24XX only */
538 				isp_open	: 1,	/* opened (ioctl) */
539 				isp_bustype	: 1,	/* SBus or PCI */
540 				isp_loaded_fw	: 1,	/* loaded firmware */
541 				isp_dblev	: 16;	/* debug log mask */
542 
543 
544 	uint32_t		isp_confopts;	/* config options */
545 
546 	uint32_t		isp_rqstinrp;	/* register for REQINP */
547 	uint32_t		isp_rqstoutrp;	/* register for REQOUTP */
548 	uint32_t		isp_respinrp;	/* register for RESINP */
549 	uint32_t		isp_respoutrp;	/* register for RESOUTP */
550 
551 	/*
552 	 * Instrumentation
553 	 */
554 	uint64_t		isp_intcnt;		/* total int count */
555 	uint64_t		isp_intbogus;		/* spurious int count */
556 	uint64_t		isp_intmboxc;		/* mbox completions */
557 	uint64_t		isp_intoasync;		/* other async */
558 	uint64_t		isp_rsltccmplt;		/* CMDs on result q */
559 	uint64_t		isp_fphccmplt;		/* CMDs via fastpost */
560 	uint16_t		isp_rscchiwater;
561 	uint16_t		isp_fpcchiwater;
562 	NANOTIME_T		isp_init_time;		/* time were last initialized */
563 
564 	/*
565 	 * Volatile state
566 	 */
567 
568 	volatile uint32_t	:	8,
569 				:	2,
570 		isp_dead	:	1,
571 				:	1,
572 		isp_mboxbsy	:	1,	/* mailbox command active */
573 		isp_state	:	3,
574 		isp_nactive	:	16;	/* how many commands active */
575 	volatile mbreg_t	isp_curmbx;	/* currently active mailbox command */
576 	volatile uint32_t	isp_reqodx;	/* index of last ISP pickup */
577 	volatile uint32_t	isp_reqidx;	/* index of next request */
578 	volatile uint32_t	isp_residx;	/* index of last ISP write */
579 	volatile uint32_t	isp_resodx;	/* index of next result */
580 	volatile uint32_t	isp_atioodx;	/* index of next ATIO */
581 	volatile uint32_t	isp_obits;	/* mailbox command output */
582 	volatile uint32_t	isp_serno;	/* rolling serial number */
583 	volatile uint16_t	isp_mboxtmp[MAX_MAILBOX];
584 	volatile uint16_t	isp_lastmbxcmd;	/* last mbox command sent */
585 	volatile uint16_t	isp_mbxwrk0;
586 	volatile uint16_t	isp_mbxwrk1;
587 	volatile uint16_t	isp_mbxwrk2;
588 	volatile uint16_t	isp_mbxwrk8;
589 	volatile uint16_t	isp_seqno;	/* running sequence number */
590 	void *			isp_mbxworkp;
591 
592 	/*
593 	 * Active commands are stored here, indexed by handle functions.
594 	 */
595 	isp_hdl_t		*isp_xflist;
596 	isp_hdl_t		*isp_xffree;
597 
598 	/*
599 	 * DMA mapped in area for synchronous IOCB requests.
600 	 */
601 	void *			isp_iocb;
602 	XS_DMA_ADDR_T		isp_iocb_dma;
603 
604 	/*
605 	 * request/result queue pointers and DMA handles for them.
606 	 */
607 	void *			isp_rquest;
608 	void *			isp_result;
609 	XS_DMA_ADDR_T		isp_rquest_dma;
610 	XS_DMA_ADDR_T		isp_result_dma;
611 #ifdef	ISP_TARGET_MODE
612 	/* for 24XX only */
613 	void *			isp_atioq;
614 	XS_DMA_ADDR_T		isp_atioq_dma;
615 #endif
616 };
617 
618 #define	SDPARAM(isp, chan)	(&((sdparam *)(isp)->isp_param)[(chan)])
619 #define	FCPARAM(isp, chan)	(&((fcparam *)(isp)->isp_param)[(chan)])
620 
621 #define	ISP_SET_SENDMARKER(isp, chan, val)	\
622     if (IS_FC(isp)) {				\
623 	FCPARAM(isp, chan)->sendmarker = val;	\
624     } else {					\
625 	SDPARAM(isp, chan)->sendmarker = val;	\
626     }
627 
628 #define	ISP_TST_SENDMARKER(isp, chan)		\
629     (IS_FC(isp)?				\
630 	FCPARAM(isp, chan)->sendmarker != 0 :	\
631 	SDPARAM(isp, chan)->sendmarker != 0)
632 
633 /*
634  * ISP Driver Run States
635  */
636 #define	ISP_NILSTATE	0
637 #define	ISP_CRASHED	1
638 #define	ISP_RESETSTATE	2
639 #define	ISP_INITSTATE	3
640 #define	ISP_RUNSTATE	4
641 
642 /*
643  * ISP Runtime Configuration Options
644  */
645 #define	ISP_CFG_FULL_DUPLEX	0x01	/* Full Duplex (Fibre Channel only) */
646 #define	ISP_CFG_PORT_PREF	0x0e	/* Mask for Port Prefs (all FC except 2100) */
647 #define	ISP_CFG_PORT_DEF	0x00	/* prefer connection type from NVRAM */
648 #define	ISP_CFG_LPORT_ONLY	0x02	/* insist on {N/F}L-Port connection */
649 #define	ISP_CFG_NPORT_ONLY	0x04	/* insist on {N/F}-Port connection */
650 #define	ISP_CFG_LPORT		0x06	/* prefer {N/F}L-Port connection */
651 #define	ISP_CFG_NPORT		0x08	/* prefer {N/F}-Port connection */
652 #define	ISP_CFG_1GB		0x10	/* force 1GB connection (23XX only) */
653 #define	ISP_CFG_2GB		0x20	/* force 2GB connection (23XX only) */
654 #define	ISP_CFG_NORELOAD	0x80	/* don't download f/w */
655 #define	ISP_CFG_NONVRAM		0x40	/* ignore NVRAM */
656 #define	ISP_CFG_NOFCTAPE	0x100	/* disable FC-Tape */
657 #define	ISP_CFG_FCTAPE		0x200	/* enable FC-Tape */
658 #define	ISP_CFG_OWNFSZ		0x400	/* override NVRAM frame size */
659 #define	ISP_CFG_OWNLOOPID	0x800	/* override NVRAM loopid */
660 #define	ISP_CFG_OWNEXCTHROTTLE	0x1000	/* override NVRAM execution throttle */
661 #define	ISP_CFG_4GB		0x2000	/* force 4GB connection (24XX only) */
662 #define	ISP_CFG_8GB		0x4000	/* force 8GB connection (25XX only) */
663 #define	ISP_CFG_16GB		0x8000	/* force 16GB connection (82XX only) */
664 
665 /*
666  * For each channel, the outer layers should know what role that channel
667  * will take: ISP_ROLE_NONE, ISP_ROLE_INITIATOR, ISP_ROLE_TARGET,
668  * ISP_ROLE_BOTH.
669  *
670  * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded,
671  * NVRAM read, and defaults set, but any further initialization (e.g.
672  * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done.
673  *
674  * If INITIATOR MODE isn't set, attempts to run commands will be stopped
675  * at isp_start and completed with the equivalent of SELECTION TIMEOUT.
676  *
677  * If TARGET MODE is set, it doesn't mean that the rest of target mode support
678  * needs to be enabled, or will even work. What happens with the 2X00 cards
679  * here is that if you have enabled it with TARGET MODE as part of the ICB
680  * options, but you haven't given the f/w any ram resources for ATIOs or
681  * Immediate Notifies, the f/w just handles what it can and you never see
682  * anything. Basically, it sends a single byte of data (the first byte,
683  * which you can set as part of the INITIALIZE CONTROL BLOCK command) for
684  * INQUIRY, and sends back QUEUE FULL status for any other command.
685  *
686  */
687 #define	ISP_ROLE_NONE		0x0
688 #define	ISP_ROLE_TARGET		0x1
689 #define	ISP_ROLE_INITIATOR	0x2
690 #define	ISP_ROLE_BOTH		(ISP_ROLE_TARGET|ISP_ROLE_INITIATOR)
691 #define	ISP_ROLE_EITHER		ISP_ROLE_BOTH
692 #ifndef	ISP_DEFAULT_ROLES
693 /*
694  * Counterintuitively, we prefer to default to role 'none'
695  * if we are enable target mode support. This gives us the
696  * maximum flexibility as to which port will do what.
697  */
698 #ifdef	ISP_TARGET_MODE
699 #define	ISP_DEFAULT_ROLES	ISP_ROLE_NONE
700 #else
701 #define	ISP_DEFAULT_ROLES	ISP_ROLE_INITIATOR
702 #endif
703 #endif
704 
705 
706 /*
707  * Firmware related defines
708  */
709 #define	ISP_CODE_ORG			0x1000	/* default f/w code start */
710 #define	ISP_CODE_ORG_2300		0x0800	/* ..except for 2300s */
711 #define	ISP_CODE_ORG_2400		0x100000 /* ..and 2400s */
712 #define	ISP_FW_REV(maj, min, mic)	((maj << 24) | (min << 16) | mic)
713 #define	ISP_FW_MAJOR(code)		((code >> 24) & 0xff)
714 #define	ISP_FW_MINOR(code)		((code >> 16) & 0xff)
715 #define	ISP_FW_MICRO(code)		((code >>  8) & 0xff)
716 #define	ISP_FW_REVX(xp)			((xp[0]<<24) | (xp[1] << 16) | xp[2])
717 #define	ISP_FW_MAJORX(xp)		(xp[0])
718 #define	ISP_FW_MINORX(xp)		(xp[1])
719 #define	ISP_FW_MICROX(xp)		(xp[2])
720 #define	ISP_FW_NEWER_THAN(i, major, minor, micro)		\
721  (ISP_FW_REVX((i)->isp_fwrev) > ISP_FW_REV(major, minor, micro))
722 #define	ISP_FW_OLDER_THAN(i, major, minor, micro)		\
723  (ISP_FW_REVX((i)->isp_fwrev) < ISP_FW_REV(major, minor, micro))
724 
725 /*
726  * Bus (implementation) types
727  */
728 #define	ISP_BT_PCI		0	/* PCI Implementations */
729 #define	ISP_BT_SBUS		1	/* SBus Implementations */
730 
731 /*
732  * If we have not otherwise defined SBus support away make sure
733  * it is defined here such that the code is included as default
734  */
735 #ifndef	ISP_SBUS_SUPPORTED
736 #define	ISP_SBUS_SUPPORTED	1
737 #endif
738 
739 /*
740  * Chip Types
741  */
742 #define	ISP_HA_SCSI		0xf
743 #define	ISP_HA_SCSI_UNKNOWN	0x1
744 #define	ISP_HA_SCSI_1020	0x2
745 #define	ISP_HA_SCSI_1020A	0x3
746 #define	ISP_HA_SCSI_1040	0x4
747 #define	ISP_HA_SCSI_1040A	0x5
748 #define	ISP_HA_SCSI_1040B	0x6
749 #define	ISP_HA_SCSI_1040C	0x7
750 #define	ISP_HA_SCSI_1240	0x8
751 #define	ISP_HA_SCSI_1080	0x9
752 #define	ISP_HA_SCSI_1280	0xa
753 #define	ISP_HA_SCSI_10160	0xb
754 #define	ISP_HA_SCSI_12160	0xc
755 #define	ISP_HA_FC		0xf0
756 #define	ISP_HA_FC_2100		0x10
757 #define	ISP_HA_FC_2200		0x20
758 #define	ISP_HA_FC_2300		0x30
759 #define	ISP_HA_FC_2312		0x40
760 #define	ISP_HA_FC_2322		0x50
761 #define	ISP_HA_FC_2400		0x60
762 #define	ISP_HA_FC_2500		0x70
763 #define	ISP_HA_FC_2600		0x80
764 
765 #define	IS_SCSI(isp)	(isp->isp_type & ISP_HA_SCSI)
766 #define	IS_1020(isp)	(isp->isp_type < ISP_HA_SCSI_1240)
767 #define	IS_1240(isp)	(isp->isp_type == ISP_HA_SCSI_1240)
768 #define	IS_1080(isp)	(isp->isp_type == ISP_HA_SCSI_1080)
769 #define	IS_1280(isp)	(isp->isp_type == ISP_HA_SCSI_1280)
770 #define	IS_10160(isp)	(isp->isp_type == ISP_HA_SCSI_10160)
771 #define	IS_12160(isp)	(isp->isp_type == ISP_HA_SCSI_12160)
772 
773 #define	IS_12X0(isp)	(IS_1240(isp) || IS_1280(isp))
774 #define	IS_1X160(isp)	(IS_10160(isp) || IS_12160(isp))
775 #define	IS_DUALBUS(isp)	(IS_12X0(isp) || IS_12160(isp))
776 #define	IS_ULTRA2(isp)	(IS_1080(isp) || IS_1280(isp) || IS_1X160(isp))
777 #define	IS_ULTRA3(isp)	(IS_1X160(isp))
778 
779 #define	IS_FC(isp)	((isp)->isp_type & ISP_HA_FC)
780 #define	IS_2100(isp)	((isp)->isp_type == ISP_HA_FC_2100)
781 #define	IS_2200(isp)	((isp)->isp_type == ISP_HA_FC_2200)
782 #define	IS_23XX(isp)	((isp)->isp_type >= ISP_HA_FC_2300 && \
783 				(isp)->isp_type < ISP_HA_FC_2400)
784 #define	IS_2300(isp)	((isp)->isp_type == ISP_HA_FC_2300)
785 #define	IS_2312(isp)	((isp)->isp_type == ISP_HA_FC_2312)
786 #define	IS_2322(isp)	((isp)->isp_type == ISP_HA_FC_2322)
787 #define	IS_24XX(isp)	((isp)->isp_type >= ISP_HA_FC_2400)
788 #define	IS_25XX(isp)	((isp)->isp_type >= ISP_HA_FC_2500)
789 #define	IS_26XX(isp)	((isp)->isp_type >= ISP_HA_FC_2600)
790 
791 /*
792  * DMA related macros
793  */
794 #define	DMA_WD3(x)	(((uint16_t)(((uint64_t)x) >> 48)) & 0xffff)
795 #define	DMA_WD2(x)	(((uint16_t)(((uint64_t)x) >> 32)) & 0xffff)
796 #define	DMA_WD1(x)	((uint16_t)((x) >> 16) & 0xffff)
797 #define	DMA_WD0(x)	((uint16_t)((x) & 0xffff))
798 
799 #define	DMA_LO32(x)	((uint32_t) (x))
800 #define	DMA_HI32(x)	((uint32_t)(((uint64_t)x) >> 32))
801 
802 /*
803  * Core System Function Prototypes
804  */
805 
806 /*
807  * Reset Hardware. Totally. Assumes that you'll follow this with a call to isp_init.
808  */
809 void isp_reset(ispsoftc_t *, int);
810 
811 /*
812  * Initialize Hardware to known state
813  */
814 void isp_init(ispsoftc_t *);
815 
816 /*
817  * Reset the ISP and call completion for any orphaned commands.
818  */
819 int isp_reinit(ispsoftc_t *, int);
820 
821 /*
822  * Internal Interrupt Service Routine
823  *
824  * The outer layers do the spade work to get the appropriate status register,
825  * semaphore register and first mailbox register (if appropriate). This also
826  * means that most spurious/bogus interrupts not for us can be filtered first.
827  */
828 void isp_intr(ispsoftc_t *, uint16_t, uint16_t, uint16_t);
829 
830 
831 /*
832  * Command Entry Point- Platform Dependent layers call into this
833  */
834 int isp_start(XS_T *);
835 
836 /* these values are what isp_start returns */
837 #define	CMD_COMPLETE	101	/* command completed */
838 #define	CMD_EAGAIN	102	/* busy- maybe retry later */
839 #define	CMD_QUEUED	103	/* command has been queued for execution */
840 #define	CMD_RQLATER 	104	/* requeue this command later */
841 
842 /*
843  * Command Completion Point- Core layers call out from this with completed cmds
844  */
845 void isp_done(XS_T *);
846 
847 /*
848  * Platform Dependent to External to Internal Control Function
849  *
850  * Assumes locks are held on entry. You should note that with many of
851  * these commands locks may be released while this function is called.
852  *
853  * ... ISPCTL_RESET_BUS, int channel);
854  *        Reset BUS on this channel
855  * ... ISPCTL_RESET_DEV, int channel, int target);
856  *        Reset Device on this channel at this target.
857  * ... ISPCTL_ABORT_CMD, XS_T *xs);
858  *        Abort active transaction described by xs.
859  * ... IPCTL_UPDATE_PARAMS);
860  *        Update any operating parameters (speed, etc.)
861  * ... ISPCTL_FCLINK_TEST, int channel);
862  *        Test FC link status on this channel
863  * ... ISPCTL_SCAN_LOOP, int channel);
864  *        Scan local loop on this channel
865  * ... ISPCTL_SCAN_FABRIC, int channel);
866  *        Scan fabric on this channel
867  * ... ISPCTL_PDB_SYNC, int channel);
868  *        Synchronize port database on this channel
869  * ... ISPCTL_SEND_LIP, int channel);
870  *        Send a LIP on this channel
871  * ... ISPCTL_GET_NAMES, int channel, int np, uint64_t *wwnn, uint64_t *wwpn)
872  *        Get a WWNN/WWPN for this N-port handle on this channel
873  * ... ISPCTL_RUN_MBOXCMD, mbreg_t *mbp)
874  *        Run this mailbox command
875  * ... ISPCTL_GET_PDB, int channel, int nphandle, isp_pdb_t *pdb)
876  *        Get PDB on this channel for this N-port handle
877  * ... ISPCTL_PLOGX, isp_plcmd_t *)
878  *        Performa a port login/logout
879  * ... ISPCTL_CHANGE_ROLE, int channel, int role);
880  *        Change role of specified channel
881  *
882  * ISPCTL_PDB_SYNC is somewhat misnamed. It actually is the final step, in
883  * order, of ISPCTL_FCLINK_TEST, ISPCTL_SCAN_LOOP, and ISPCTL_SCAN_FABRIC.
884  * The main purpose of ISPCTL_PDB_SYNC is to complete management of logging
885  * and logging out of fabric devices (if one is on a fabric) and then marking
886  * the 'loop state' as being ready to now be used for sending commands to
887  * devices.
888  */
889 typedef enum {
890 	ISPCTL_RESET_BUS,
891 	ISPCTL_RESET_DEV,
892 	ISPCTL_ABORT_CMD,
893 	ISPCTL_UPDATE_PARAMS,
894 	ISPCTL_FCLINK_TEST,
895 	ISPCTL_SCAN_FABRIC,
896 	ISPCTL_SCAN_LOOP,
897 	ISPCTL_PDB_SYNC,
898 	ISPCTL_SEND_LIP,
899 	ISPCTL_GET_NAMES,
900 	ISPCTL_RUN_MBOXCMD,
901 	ISPCTL_GET_PDB,
902 	ISPCTL_PLOGX,
903 	ISPCTL_CHANGE_ROLE
904 } ispctl_t;
905 int isp_control(ispsoftc_t *, ispctl_t, ...);
906 
907 /*
908  * Platform Dependent to Internal to External Control Function
909  */
910 
911 typedef enum {
912 	ISPASYNC_NEW_TGT_PARAMS,	/* SPI New Target Parameters */
913 	ISPASYNC_BUS_RESET,		/* All Bus Was Reset */
914 	ISPASYNC_LOOP_DOWN,		/* FC Loop Down */
915 	ISPASYNC_LOOP_UP,		/* FC Loop Up */
916 	ISPASYNC_LIP,			/* FC LIP Received */
917 	ISPASYNC_LOOP_RESET,		/* FC Loop Reset Received */
918 	ISPASYNC_CHANGE_NOTIFY,		/* FC Change Notification */
919 	ISPASYNC_DEV_ARRIVED,		/* FC Device Arrived */
920 	ISPASYNC_DEV_CHANGED,		/* FC Device Changed */
921 	ISPASYNC_DEV_STAYED,		/* FC Device Stayed */
922 	ISPASYNC_DEV_GONE,		/* FC Device Departure */
923 	ISPASYNC_TARGET_NOTIFY,		/* All target async notification */
924 	ISPASYNC_TARGET_NOTIFY_ACK,	/* All target notify ack required */
925 	ISPASYNC_TARGET_ACTION,		/* All target action requested */
926 	ISPASYNC_FW_CRASH,		/* All Firmware has crashed */
927 	ISPASYNC_FW_RESTARTED		/* All Firmware has been restarted */
928 } ispasync_t;
929 void isp_async(ispsoftc_t *, ispasync_t, ...);
930 
931 #define	ISPASYNC_CHANGE_PDB	0
932 #define	ISPASYNC_CHANGE_SNS	1
933 #define	ISPASYNC_CHANGE_OTHER	2
934 
935 /*
936  * Platform Independent Error Prinout
937  */
938 void isp_prt_endcmd(ispsoftc_t *, XS_T *);
939 
940 /*
941  * Platform Dependent Error and Debug Printout
942  *
943  * Two required functions for each platform must be provided:
944  *
945  *    void isp_prt(ispsoftc_t *, int level, const char *, ...)
946  *    void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...)
947  *
948  * but due to compiler differences on different platforms this won't be
949  * formally defined here. Instead, they go in each platform definition file.
950  */
951 
952 #define	ISP_LOGALL	0x0	/* log always */
953 #define	ISP_LOGCONFIG	0x1	/* log configuration messages */
954 #define	ISP_LOGINFO	0x2	/* log informational messages */
955 #define	ISP_LOGWARN	0x4	/* log warning messages */
956 #define	ISP_LOGERR	0x8	/* log error messages */
957 #define	ISP_LOGDEBUG0	0x10	/* log simple debug messages */
958 #define	ISP_LOGDEBUG1	0x20	/* log intermediate debug messages */
959 #define	ISP_LOGDEBUG2	0x40	/* log most debug messages */
960 #define	ISP_LOGDEBUG3	0x80	/* log high frequency debug messages */
961 #define	ISP_LOG_SANCFG	0x100	/* log SAN configuration */
962 #define	ISP_LOG_CWARN	0x200	/* log SCSI command "warnings" (e.g., check conditions) */
963 #define	ISP_LOG_WARN1	0x400	/* log WARNS we might be interested at some time */
964 #define	ISP_LOGTINFO	0x1000	/* log informational messages (target mode) */
965 #define	ISP_LOGTDEBUG0	0x2000	/* log simple debug messages (target mode) */
966 #define	ISP_LOGTDEBUG1	0x4000	/* log intermediate debug messages (target) */
967 #define	ISP_LOGTDEBUG2	0x8000	/* log all debug messages (target) */
968 
969 /*
970  * Each Platform provides it's own isposinfo substructure of the ispsoftc
971  * defined above.
972  *
973  * Each platform must also provide the following macros/defines:
974  *
975  *
976  *	ISP_FC_SCRLEN				FC scratch area DMA length
977  *
978  *	ISP_MEMZERO(dst, src)			platform zeroing function
979  *	ISP_MEMCPY(dst, src, count)		platform copying function
980  *	ISP_SNPRINTF(buf, bufsize, fmt, ...)	snprintf
981  *	ISP_DELAY(usecs)			microsecond spindelay function
982  *	ISP_SLEEP(isp, usecs)			microsecond sleep function
983  *
984  *	ISP_INLINE				___inline or not- depending on how
985  *						good your debugger is
986  *	ISP_MIN					shorthand for ((a) < (b))? (a) : (b)
987  *
988  *	NANOTIME_T				nanosecond time type
989  *
990  *	GET_NANOTIME(NANOTIME_T *)		get current nanotime.
991  *
992  *	GET_NANOSEC(NANOTIME_T *)		get uint64_t from NANOTIME_T
993  *
994  *	NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *)
995  *						subtract two NANOTIME_T values
996  *
997  *	MAXISPREQUEST(ispsoftc_t *)		maximum request queue size
998  *						for this particular board type
999  *
1000  *	MEMORYBARRIER(ispsoftc_t *, barrier_type, offset, size, chan)
1001  *
1002  *		Function/Macro the provides memory synchronization on
1003  *		various objects so that the ISP's and the system's view
1004  *		of the same object is consistent.
1005  *
1006  *	MBOX_ACQUIRE(ispsoftc_t *)		acquire lock on mailbox regs
1007  *	MBOX_WAIT_COMPLETE(ispsoftc_t *, mbreg_t *) wait for cmd to be done
1008  *	MBOX_NOTIFY_COMPLETE(ispsoftc_t *)	notification of mbox cmd donee
1009  *	MBOX_RELEASE(ispsoftc_t *)		release lock on mailbox regs
1010  *
1011  *	FC_SCRATCH_ACQUIRE(ispsoftc_t *, chan)	acquire lock on FC scratch area
1012  *						return -1 if you cannot
1013  *	FC_SCRATCH_RELEASE(ispsoftc_t *, chan)	acquire lock on FC scratch area
1014  *
1015  *	FCP_NEXT_CRN(ispsoftc_t *, XS_T *, rslt, channel, target, lun)	generate the next command reference number. XS_T * may be null.
1016  *
1017  *	SCSI_GOOD	SCSI 'Good' Status
1018  *	SCSI_CHECK	SCSI 'Check Condition' Status
1019  *	SCSI_BUSY	SCSI 'Busy' Status
1020  *	SCSI_QFULL	SCSI 'Queue Full' Status
1021  *
1022  *	XS_T			Platform SCSI transaction type (i.e., command for HBA)
1023  *	XS_DMA_ADDR_T		Platform PCI DMA Address Type
1024  *	XS_GET_DMA_SEG(..)	Get 32 bit dma segment list value
1025  *	XS_GET_DMA64_SEG(..)	Get 64 bit dma segment list value
1026  *	XS_ISP(xs)		gets an instance out of an XS_T
1027  *	XS_CHANNEL(xs)		gets the channel (bus # for DUALBUS cards) ""
1028  *	XS_TGT(xs)		gets the target ""
1029  *	XS_LUN(xs)		gets the lun ""
1030  *	XS_CDBP(xs)		gets a pointer to the scsi CDB ""
1031  *	XS_CDBLEN(xs)		gets the CDB's length ""
1032  *	XS_XFRLEN(xs)		gets the associated data transfer length ""
1033  *	XS_TIME(xs)		gets the time (in milliseconds) for this command
1034  *	XS_GET_RESID(xs)	gets the current residual count
1035  *	XS_GET_RESID(xs, resid)	sets the current residual count
1036  *	XS_STSP(xs)		gets a pointer to the SCSI status byte ""
1037  *	XS_SNSP(xs)		gets a pointer to the associate sense data
1038  *	XS_TOT_SNSLEN(xs)	gets the total length of sense data storage
1039  *	XS_CUR_SNSLEN(xs)	gets the currently used length of sense data storage
1040  *	XS_SNSKEY(xs)		dereferences XS_SNSP to get the current stored Sense Key
1041  *	XS_SNSASC(xs)		dereferences XS_SNSP to get the current stored Additional Sense Code
1042  *	XS_SNSASCQ(xs)		dereferences XS_SNSP to get the current stored Additional Sense Code Qualifier
1043  *	XS_TAG_P(xs)		predicate of whether this command should be tagged
1044  *	XS_TAG_TYPE(xs)		which type of tag to use
1045  *	XS_SETERR(xs)		set error state
1046  *
1047  *		HBA_NOERROR	command has no erros
1048  *		HBA_BOTCH	hba botched something
1049  *		HBA_CMDTIMEOUT	command timed out
1050  *		HBA_SELTIMEOUT	selection timed out (also port logouts for FC)
1051  *		HBA_TGTBSY	target returned a BUSY status
1052  *		HBA_BUSRESET	bus reset destroyed command
1053  *		HBA_ABORTED	command was aborted (by request)
1054  *		HBA_DATAOVR	a data overrun was detected
1055  *		HBA_ARQFAIL	Automatic Request Sense failed
1056  *
1057  *	XS_ERR(xs)	return current error state
1058  *	XS_NOERR(xs)	there is no error currently set
1059  *	XS_INITERR(xs)	initialize error state
1060  *
1061  *	XS_SAVE_SENSE(xs, sp, total_len, this_len)	save sense data (total and current amount)
1062  *
1063  *	XS_APPEND_SENSE(xs, sp, len)	append more sense data
1064  *
1065  *	XS_SENSE_VALID(xs)		indicates whether sense is valid
1066  *
1067  *	DEFAULT_FRAMESIZE(ispsoftc_t *)		Default Frame Size
1068  *	DEFAULT_EXEC_THROTTLE(ispsoftc_t *)	Default Execution Throttle
1069  *
1070  *	DEFAULT_ROLE(ispsoftc_t *, int)		Get Default Role for a channel
1071  *	DEFAULT_IID(ispsoftc_t *, int)		Default SCSI initiator ID
1072  *	DEFAULT_LOOPID(ispsoftc_t *, int)	Default FC Loop ID
1073  *
1074  *		These establish reasonable defaults for each platform.
1075  * 		These must be available independent of card NVRAM and are
1076  *		to be used should NVRAM not be readable.
1077  *
1078  *	DEFAULT_NODEWWN(ispsoftc_t *, chan)	Default FC Node WWN to use
1079  *	DEFAULT_PORTWWN(ispsoftc_t *, chan)	Default FC Port WWN to use
1080  *
1081  *		These defines are hooks to allow the setting of node and
1082  *		port WWNs when NVRAM cannot be read or is to be overriden.
1083  *
1084  *	ACTIVE_NODEWWN(ispsoftc_t *, chan)	FC Node WWN to use
1085  *	ACTIVE_PORTWWN(ispsoftc_t *, chan)	FC Port WWN to use
1086  *
1087  *		After NVRAM is read, these will be invoked to get the
1088  *		node and port WWNs that will actually be used for this
1089  *		channel.
1090  *
1091  *
1092  *	ISP_IOXPUT_8(ispsoftc_t *, uint8_t srcval, uint8_t *dstptr)
1093  *	ISP_IOXPUT_16(ispsoftc_t *, uint16_t srcval, uint16_t *dstptr)
1094  *	ISP_IOXPUT_32(ispsoftc_t *, uint32_t srcval, uint32_t *dstptr)
1095  *
1096  *	ISP_IOXGET_8(ispsoftc_t *, uint8_t *srcptr, uint8_t dstrval)
1097  *	ISP_IOXGET_16(ispsoftc_t *, uint16_t *srcptr, uint16_t dstrval)
1098  *	ISP_IOXGET_32(ispsoftc_t *, uint32_t *srcptr, uint32_t dstrval)
1099  *
1100  *	ISP_SWIZZLE_NVRAM_WORD(ispsoftc_t *, uint16_t *)
1101  *	ISP_SWIZZLE_NVRAM_LONG(ispsoftc_t *, uint32_t *)
1102  *	ISP_SWAP16(ispsoftc_t *, uint16_t srcval)
1103  *	ISP_SWAP32(ispsoftc_t *, uint32_t srcval)
1104  */
1105 
1106 #ifdef	ISP_TARGET_MODE
1107 /*
1108  * The functions below are for the publicly available
1109  * target mode functions that are internal to the Qlogic driver.
1110  */
1111 
1112 /*
1113  * This function handles new response queue entry appropriate for target mode.
1114  */
1115 int isp_target_notify(ispsoftc_t *, void *, uint32_t *);
1116 
1117 /*
1118  * This function externalizes the ability to acknowledge an Immediate Notify request.
1119  */
1120 int isp_notify_ack(ispsoftc_t *, void *);
1121 
1122 /*
1123  * This function externalized acknowledging (success/fail) an ABTS frame
1124  */
1125 int isp_acknak_abts(ispsoftc_t *, void *, int);
1126 
1127 /*
1128  * General request queue 'put' routine for target mode entries.
1129  */
1130 int isp_target_put_entry(ispsoftc_t *isp, void *);
1131 
1132 /*
1133  * General routine to put back an ATIO entry-
1134  * used for replenishing f/w resource counts.
1135  * The argument is a pointer to a source ATIO
1136  * or ATIO2.
1137  */
1138 int isp_target_put_atio(ispsoftc_t *, void *);
1139 
1140 /*
1141  * General routine to send a final CTIO for a command- used mostly for
1142  * local responses.
1143  */
1144 int isp_endcmd(ispsoftc_t *, ...);
1145 #define	ECMD_SVALID	0x100
1146 #define	ECMD_RVALID	0x200
1147 #define	ECMD_TERMINATE	0x400
1148 
1149 /*
1150  * Handle an asynchronous event
1151  *
1152  * Return nonzero if the interrupt that generated this event has been dismissed.
1153  */
1154 int isp_target_async(ispsoftc_t *, int, int);
1155 #endif
1156 #endif	/* _ISPVAR_H */
1157