1 /* $FreeBSD$ */ 2 /*- 3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 4 * 5 * Copyright (c) 2009-2017 Alexander Motin <mav@FreeBSD.org> 6 * Copyright (c) 1997-2009 by Matthew Jacob 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 */ 32 33 /* 34 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 35 */ 36 #ifndef _ISPMBOX_H 37 #define _ISPMBOX_H 38 39 /* 40 * Mailbox Command Opcodes 41 */ 42 #define MBOX_NO_OP 0x0000 43 #define MBOX_LOAD_RAM 0x0001 44 #define MBOX_EXEC_FIRMWARE 0x0002 45 #define MBOX_DUMP_RAM 0x0003 46 #define MBOX_WRITE_RAM_WORD 0x0004 47 #define MBOX_READ_RAM_WORD 0x0005 48 #define MBOX_MAILBOX_REG_TEST 0x0006 49 #define MBOX_VERIFY_CHECKSUM 0x0007 50 #define MBOX_ABOUT_FIRMWARE 0x0008 51 #define MBOX_LOAD_RISC_RAM_2100 0x0009 52 /* a */ 53 #define MBOX_LOAD_RISC_RAM 0x000b 54 #define MBOX_DUMP_RISC_RAM 0x000c 55 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 56 #define MBOX_CHECK_FIRMWARE 0x000e 57 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 58 #define MBOX_INIT_REQ_QUEUE 0x0010 59 #define MBOX_INIT_RES_QUEUE 0x0011 60 #define MBOX_EXECUTE_IOCB 0x0012 61 #define MBOX_WAKE_UP 0x0013 62 #define MBOX_STOP_FIRMWARE 0x0014 63 #define MBOX_ABORT 0x0015 64 #define MBOX_ABORT_DEVICE 0x0016 65 #define MBOX_ABORT_TARGET 0x0017 66 #define MBOX_BUS_RESET 0x0018 67 #define MBOX_STOP_QUEUE 0x0019 68 #define MBOX_START_QUEUE 0x001a 69 #define MBOX_SINGLE_STEP_QUEUE 0x001b 70 #define MBOX_ABORT_QUEUE 0x001c 71 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 72 /* 1e */ 73 #define MBOX_GET_FIRMWARE_STATUS 0x001f 74 #define MBOX_GET_INIT_SCSI_ID 0x0020 75 #define MBOX_GET_SELECT_TIMEOUT 0x0021 76 #define MBOX_GET_RETRY_COUNT 0x0022 77 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 78 #define MBOX_GET_CLOCK_RATE 0x0024 79 #define MBOX_GET_ACT_NEG_STATE 0x0025 80 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 81 #define MBOX_GET_SBUS_PARAMS 0x0027 82 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 83 #define MBOX_GET_TARGET_PARAMS 0x0028 84 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 85 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 86 /* 2b */ 87 /* 2c */ 88 /* 2d */ 89 /* 2e */ 90 /* 2f */ 91 #define MBOX_SET_INIT_SCSI_ID 0x0030 92 #define MBOX_SET_SELECT_TIMEOUT 0x0031 93 #define MBOX_SET_RETRY_COUNT 0x0032 94 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 95 #define MBOX_SET_CLOCK_RATE 0x0034 96 #define MBOX_SET_ACT_NEG_STATE 0x0035 97 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 98 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 99 #define MBOX_SET_PCI_PARAMETERS 0x0037 100 #define MBOX_SET_TARGET_PARAMS 0x0038 101 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 102 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 103 /* 3b */ 104 /* 3c */ 105 /* 3d */ 106 /* 3e */ 107 /* 3f */ 108 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 109 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 110 #define MBOX_EXEC_BIOS_IOCB 0x0042 111 #define MBOX_SET_FW_FEATURES 0x004a 112 #define MBOX_GET_FW_FEATURES 0x004b 113 #define FW_FEATURE_FAST_POST 0x1 114 #define FW_FEATURE_LVD_NOTIFY 0x2 115 #define FW_FEATURE_RIO_32BIT 0x4 116 #define FW_FEATURE_RIO_16BIT 0x8 117 118 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 119 #define MBOX_INIT_RES_QUEUE_A64 0x0053 120 121 #define MBOX_ENABLE_TARGET_MODE 0x0055 122 #define ENABLE_TARGET_FLAG 0x8000 123 #define ENABLE_TQING_FLAG 0x0004 124 #define ENABLE_MANDATORY_DISC 0x0002 125 #define MBOX_GET_TARGET_STATUS 0x0056 126 127 /* These are for the ISP2X00 FC cards */ 128 #define MBOX_LOAD_FLASH_FIRMWARE 0x0003 129 #define MBOX_WRITE_FC_SERDES_REG 0x0003 /* FC only */ 130 #define MBOX_READ_FC_SERDES_REG 0x0004 /* FC only */ 131 #define MBOX_GET_IO_STATUS 0x0012 132 #define MBOX_SET_TRANSMIT_PARAMS 0x0019 133 #define MBOX_SET_PORT_PARAMS 0x001a 134 #define MBOX_LOAD_OP_FW_PARAMS 0x001b 135 #define MBOX_INIT_MULTIPLE_QUEUE 0x001f 136 #define MBOX_GET_LOOP_ID 0x0020 137 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 138 #define ISP24XX_INORDER 0x0100 139 #define ISP24XX_NPIV_SAN 0x0400 140 #define ISP24XX_VSAN_SAN 0x1000 141 #define ISP24XX_FC_SP_SAN 0x2000 142 #define MBOX_GET_TIMEOUT_PARAMS 0x0022 143 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 144 #define MBOX_GENERATE_SYSTEM_ERROR 0x002a 145 #define MBOX_WRITE_SFP 0x0030 146 #define MBOX_READ_SFP 0x0031 147 #define MBOX_SET_TIMEOUT_PARAMS 0x0032 148 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 149 #define MBOX_GET_SET_FC_LED_CONF 0x003b 150 #define MBOX_RESTART_NIC_FIRMWARE 0x003d /* FCoE only */ 151 #define MBOX_ACCESS_CONTROL 0x003e 152 #define MBOX_LOOP_PORT_BYPASS 0x0040 /* FC only */ 153 #define MBOX_LOOP_PORT_ENABLE 0x0041 /* FC only */ 154 #define MBOX_GET_RESOURCE_COUNT 0x0042 155 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 156 #define MBOX_DIAGNOSTIC_ECHO_TEST 0x0044 157 #define MBOX_DIAGNOSTIC_LOOPBACK 0x0045 158 #define MBOX_ENHANCED_GET_PDB 0x0047 159 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 160 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 161 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 162 #define MBOX_GET_FCF_LIST 0x0050 /* FCoE only */ 163 #define MBOX_GET_DCBX_PARAMETERS 0x0051 /* FCoE only */ 164 #define MBOX_HOST_MEMORY_COPY 0x0053 165 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 166 #define MBOX_SEND_RNID 0x0057 167 #define MBOX_SET_PARAMETERS 0x0059 168 #define MBOX_GET_PARAMETERS 0x005a 169 #define MBOX_DRIVER_HEARTBEAT 0x005B /* FC only */ 170 #define MBOX_FW_HEARTBEAT 0x005C 171 #define MBOX_GET_SET_DATA_RATE 0x005D /* >=23XX only */ 172 #define MBGSD_GET_RATE 0 173 #define MBGSD_SET_RATE 1 174 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 175 #define MBGSD_1GB 0x00 176 #define MBGSD_2GB 0x01 177 #define MBGSD_AUTO 0x02 178 #define MBGSD_4GB 0x03 /* 24XX only */ 179 #define MBGSD_8GB 0x04 /* 25XX only */ 180 #define MBGSD_16GB 0x05 /* 26XX only */ 181 #define MBGSD_10GB 0x13 /* 26XX only */ 182 #define MBOX_SEND_RNFT 0x005e 183 #define MBOX_INIT_FIRMWARE 0x0060 184 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 185 #define MBOX_INIT_LIP 0x0062 186 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 187 #define MBOX_GET_PORT_DB 0x0064 188 #define MBOX_CLEAR_ACA 0x0065 189 #define MBOX_TARGET_RESET 0x0066 190 #define MBOX_CLEAR_TASK_SET 0x0067 191 #define MBOX_ABORT_TASK_SET 0x0068 192 #define MBOX_GET_FW_STATE 0x0069 193 #define MBOX_GET_PORT_NAME 0x006A 194 #define MBOX_GET_LINK_STATUS 0x006B 195 #define MBOX_INIT_LIP_RESET 0x006C 196 #define MBOX_GET_LINK_STAT_PR_DATA_CNT 0x006D 197 #define MBOX_SEND_SNS 0x006E 198 #define MBOX_FABRIC_LOGIN 0x006F 199 #define MBOX_SEND_CHANGE_REQUEST 0x0070 200 #define MBOX_FABRIC_LOGOUT 0x0071 201 #define MBOX_INIT_LIP_LOGIN 0x0072 202 #define MBOX_GET_PORT_NODE_NAME_LIST 0x0075 203 #define MBOX_SET_VENDOR_ID 0x0076 204 #define MBOX_GET_XGMAC_STATS 0x007a 205 #define MBOX_GET_ID_LIST 0x007C 206 #define MBOX_SEND_LFA 0x007d 207 #define MBOX_LUN_RESET 0x007E 208 209 #define ISP2100_SET_PCI_PARAM 0x00ff 210 211 #define MBOX_BUSY 0x04 212 213 /* 214 * Mailbox Command Complete Status Codes 215 */ 216 #define MBOX_COMMAND_COMPLETE 0x4000 217 #define MBOX_INVALID_COMMAND 0x4001 218 #define MBOX_HOST_INTERFACE_ERROR 0x4002 219 #define MBOX_TEST_FAILED 0x4003 220 #define MBOX_COMMAND_ERROR 0x4005 221 #define MBOX_COMMAND_PARAM_ERROR 0x4006 222 #define MBOX_PORT_ID_USED 0x4007 223 #define MBOX_LOOP_ID_USED 0x4008 224 #define MBOX_ALL_IDS_USED 0x4009 225 #define MBOX_NOT_LOGGED_IN 0x400A 226 #define MBOX_LINK_DOWN_ERROR 0x400B 227 #define MBOX_LOOPBACK_ERROR 0x400C 228 #define MBOX_CHECKSUM_ERROR 0x4010 229 #define MBOX_INVALID_PRODUCT_KEY 0x4020 230 /* pseudo mailbox completion codes */ 231 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 232 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 233 234 #define MBLOGALL 0xffffffff 235 #define MBLOGNONE 0x00000000 236 #define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f)) 237 238 /* 239 * Asynchronous event status codes 240 */ 241 #define ASYNC_BUS_RESET 0x8001 242 #define ASYNC_SYSTEM_ERROR 0x8002 243 #define ASYNC_RQS_XFER_ERR 0x8003 244 #define ASYNC_RSP_XFER_ERR 0x8004 245 #define ASYNC_QWAKEUP 0x8005 246 #define ASYNC_TIMEOUT_RESET 0x8006 247 #define ASYNC_DEVICE_RESET 0x8007 248 #define ASYNC_EXTMSG_UNDERRUN 0x800A 249 #define ASYNC_SCAM_INT 0x800B 250 #define ASYNC_HUNG_SCSI 0x800C 251 #define ASYNC_KILLED_BUS 0x800D 252 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 253 #define ASYNC_LIP_OCCURRED 0x8010 /* FC only */ 254 #define ASYNC_LOOP_UP 0x8011 255 #define ASYNC_LOOP_DOWN 0x8012 256 #define ASYNC_LOOP_RESET 0x8013 /* FC only */ 257 #define ASYNC_PDB_CHANGED 0x8014 258 #define ASYNC_CHANGE_NOTIFY 0x8015 259 #define ASYNC_LIP_NOS_OLS_RECV 0x8016 /* FC only */ 260 #define ASYNC_LIP_ERROR 0x8017 /* FC only */ 261 #define ASYNC_AUTO_PLOGI_RJT 0x8018 262 #define ASYNC_SECURITY_UPDATE 0x801B 263 #define ASYNC_CMD_CMPLT 0x8020 264 #define ASYNC_CTIO_DONE 0x8021 265 #define ASYNC_RIO32_1 0x8021 266 #define ASYNC_RIO32_2 0x8022 267 #define ASYNC_IP_XMIT_DONE 0x8022 268 #define ASYNC_IP_RECV_DONE 0x8023 269 #define ASYNC_IP_BROADCAST 0x8024 270 #define ASYNC_IP_RCVQ_LOW 0x8025 271 #define ASYNC_IP_RCVQ_EMPTY 0x8026 272 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 273 #define ASYNC_ERR_LOGGING_DISABLED 0x8029 274 #define ASYNC_PTPMODE 0x8030 /* FC only */ 275 #define ASYNC_RIO16_1 0x8031 276 #define ASYNC_RIO16_2 0x8032 277 #define ASYNC_RIO16_3 0x8033 278 #define ASYNC_RIO16_4 0x8034 279 #define ASYNC_RIO16_5 0x8035 280 #define ASYNC_CONNMODE 0x8036 281 #define ISP_CONN_LOOP 1 282 #define ISP_CONN_PTP 2 283 #define ISP_CONN_BADLIP 3 284 #define ISP_CONN_FATAL 4 285 #define ISP_CONN_LOOPBACK 5 286 #define ASYNC_P2P_INIT_ERR 0x8037 287 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 288 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 289 #define ASYNC_RCV_ERR 0x8048 290 /* 291 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 292 * mailbox command to enable this. 293 */ 294 #define ASYNC_QFULL_SENT 0x8049 295 #define ASYNC_RJT_SENT 0x8049 /* 24XX only */ 296 #define ASYNC_SEL_CLASS2_P_RJT_SENT 0x804f 297 #define ASYNC_FW_RESTART_COMPLETE 0x8060 298 #define ASYNC_TEMPERATURE_ALERT 0x8070 299 #define ASYNC_INTER_DRIVER_COMP 0x8100 /* FCoE only */ 300 #define ASYNC_INTER_DRIVER_NOTIFY 0x8101 /* FCoE only */ 301 #define ASYNC_INTER_DRIVER_TIME_EXT 0x8102 /* FCoE only */ 302 #define ASYNC_NIC_FW_STATE_CHANGE 0x8200 /* FCoE only */ 303 #define ASYNC_AUTOLOAD_FW_COMPLETE 0x8400 304 #define ASYNC_AUTOLOAD_FW_FAILURE 0x8401 305 306 /* 307 * Firmware Options. There are a lot of them. 308 * 309 * IFCOPTN - ISP Fibre Channel Option Word N 310 */ 311 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 312 #define IFCOPT1_EAABSRCVD (1 << 12) 313 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 314 #define IFCOPT1_ENAPURE (1 << 10) 315 #define IFCOPT1_ENA8017 (1 << 7) 316 #define IFCOPT1_DISGPIO67 (1 << 6) 317 #define IFCOPT1_LIPLOSSIMM (1 << 5) 318 #define IFCOPT1_DISF7SWTCH (1 << 4) 319 #define IFCOPT1_CTIO_RETRY (1 << 3) 320 #define IFCOPT1_LIPASYNC (1 << 1) 321 #define IFCOPT1_LIPF8 (1 << 0) 322 323 #define IFCOPT2_LOOPBACK (1 << 1) 324 #define IFCOPT2_ATIO3_ONLY (1 << 0) 325 326 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 327 #define IFCOPT3_RNDASYNC (1 << 1) 328 329 /* 330 * All IOCB Queue entries are this size 331 */ 332 #define QENTRY_LEN 64 333 334 /* 335 * Command Structure Definitions 336 */ 337 338 typedef struct { 339 uint32_t ds_base; 340 uint32_t ds_count; 341 } ispds_t; 342 343 typedef struct { 344 uint32_t ds_base; 345 uint32_t ds_basehi; 346 uint32_t ds_count; 347 } ispds64_t; 348 349 #define DSTYPE_32BIT 0 350 #define DSTYPE_64BIT 1 351 typedef struct { 352 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 353 uint32_t ds_segment; /* unused */ 354 uint32_t ds_base; /* 32 bit address of DSD list */ 355 } ispdslist_t; 356 357 358 typedef struct { 359 uint8_t rqs_entry_type; 360 uint8_t rqs_entry_count; 361 uint8_t rqs_seqno; 362 uint8_t rqs_flags; 363 } isphdr_t; 364 365 /* RQS Flag definitions */ 366 #define RQSFLAG_CONTINUATION 0x01 367 #define RQSFLAG_FULL 0x02 368 #define RQSFLAG_BADHEADER 0x04 369 #define RQSFLAG_BADPACKET 0x08 370 #define RQSFLAG_BADCOUNT 0x10 371 #define RQSFLAG_BADORDER 0x20 372 #define RQSFLAG_MASK 0x3f 373 374 /* RQS entry_type definitions */ 375 #define RQSTYPE_REQUEST 0x01 376 #define RQSTYPE_DATASEG 0x02 377 #define RQSTYPE_RESPONSE 0x03 378 #define RQSTYPE_MARKER 0x04 379 #define RQSTYPE_CMDONLY 0x05 380 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 381 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 382 #define RQSTYPE_SCAM 0x08 383 #define RQSTYPE_A64 0x09 384 #define RQSTYPE_A64_CONT 0x0a 385 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 386 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 387 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 388 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 389 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 390 #define RQSTYPE_STATUS_CONT 0x10 391 #define RQSTYPE_T2RQS 0x11 392 #define RQSTYPE_CTIO7 0x12 393 #define RQSTYPE_IP_XMIT 0x13 394 #define RQSTYPE_TSK_MGMT 0x14 395 #define RQSTYPE_T4RQS 0x15 396 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 397 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 398 #define RQSTYPE_T7RQS 0x18 399 #define RQSTYPE_T3RQS 0x19 400 #define RQSTYPE_IP_XMIT_64 0x1b 401 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 402 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 403 #define RQSTYPE_RIO1 0x21 404 #define RQSTYPE_RIO2 0x22 405 #define RQSTYPE_IP_RECV 0x23 406 #define RQSTYPE_IP_RECV_CONT 0x24 407 #define RQSTYPE_CT_PASSTHRU 0x29 408 #define RQSTYPE_MS_PASSTHRU 0x29 409 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 410 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 411 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 412 #define RQSTYPE_ABORT_IO 0x33 413 #define RQSTYPE_T6RQS 0x48 414 #define RQSTYPE_LOGIN 0x52 415 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 416 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 417 418 419 #define ISP_RQDSEG 4 420 typedef struct { 421 isphdr_t req_header; 422 uint32_t req_handle; 423 uint8_t req_lun_trn; 424 uint8_t req_target; 425 uint16_t req_cdblen; 426 uint16_t req_flags; 427 uint16_t req_reserved; 428 uint16_t req_time; 429 uint16_t req_seg_count; 430 uint8_t req_cdb[12]; 431 ispds_t req_dataseg[ISP_RQDSEG]; 432 } ispreq_t; 433 #define ISP_RQDSEG_A64 2 434 435 typedef struct { 436 isphdr_t mrk_header; 437 uint32_t mrk_handle; 438 uint8_t mrk_reserved0; 439 uint8_t mrk_target; 440 uint16_t mrk_modifier; 441 uint16_t mrk_flags; 442 uint16_t mrk_lun; 443 uint8_t mrk_reserved1[48]; 444 } isp_marker_t; 445 446 typedef struct { 447 isphdr_t mrk_header; 448 uint32_t mrk_handle; 449 uint16_t mrk_nphdl; 450 uint8_t mrk_modifier; 451 uint8_t mrk_reserved0; 452 uint8_t mrk_reserved1; 453 uint8_t mrk_vphdl; 454 uint16_t mrk_reserved2; 455 uint8_t mrk_lun[8]; 456 uint8_t mrk_reserved3[40]; 457 } isp_marker_24xx_t; 458 459 460 #define SYNC_DEVICE 0 461 #define SYNC_TARGET 1 462 #define SYNC_ALL 2 463 #define SYNC_LIP 3 464 465 #define ISP_RQDSEG_T2 3 466 typedef struct { 467 isphdr_t req_header; 468 uint32_t req_handle; 469 uint8_t req_lun_trn; 470 uint8_t req_target; 471 uint16_t req_scclun; 472 uint16_t req_flags; 473 uint8_t req_crn; 474 uint8_t req_reserved; 475 uint16_t req_time; 476 uint16_t req_seg_count; 477 uint8_t req_cdb[16]; 478 uint32_t req_totalcnt; 479 ispds_t req_dataseg[ISP_RQDSEG_T2]; 480 } ispreqt2_t; 481 482 typedef struct { 483 isphdr_t req_header; 484 uint32_t req_handle; 485 uint16_t req_target; 486 uint16_t req_scclun; 487 uint16_t req_flags; 488 uint8_t req_crn; 489 uint8_t req_reserved; 490 uint16_t req_time; 491 uint16_t req_seg_count; 492 uint8_t req_cdb[16]; 493 uint32_t req_totalcnt; 494 ispds_t req_dataseg[ISP_RQDSEG_T2]; 495 } ispreqt2e_t; 496 497 #define ISP_RQDSEG_T3 2 498 typedef struct { 499 isphdr_t req_header; 500 uint32_t req_handle; 501 uint8_t req_lun_trn; 502 uint8_t req_target; 503 uint16_t req_scclun; 504 uint16_t req_flags; 505 uint8_t req_crn; 506 uint8_t req_reserved; 507 uint16_t req_time; 508 uint16_t req_seg_count; 509 uint8_t req_cdb[16]; 510 uint32_t req_totalcnt; 511 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 512 } ispreqt3_t; 513 #define ispreq64_t ispreqt3_t /* same as.... */ 514 515 typedef struct { 516 isphdr_t req_header; 517 uint32_t req_handle; 518 uint16_t req_target; 519 uint16_t req_scclun; 520 uint16_t req_flags; 521 uint8_t req_crn; 522 uint8_t req_reserved; 523 uint16_t req_time; 524 uint16_t req_seg_count; 525 uint8_t req_cdb[16]; 526 uint32_t req_totalcnt; 527 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 528 } ispreqt3e_t; 529 530 /* req_flag values */ 531 #define REQFLAG_NODISCON 0x0001 532 #define REQFLAG_HTAG 0x0002 533 #define REQFLAG_OTAG 0x0004 534 #define REQFLAG_STAG 0x0008 535 #define REQFLAG_TARGET_RTN 0x0010 536 537 #define REQFLAG_NODATA 0x0000 538 #define REQFLAG_DATA_IN 0x0020 539 #define REQFLAG_DATA_OUT 0x0040 540 #define REQFLAG_DATA_UNKNOWN 0x0060 541 542 #define REQFLAG_DISARQ 0x0100 543 #define REQFLAG_FRC_ASYNC 0x0200 544 #define REQFLAG_FRC_SYNC 0x0400 545 #define REQFLAG_FRC_WIDE 0x0800 546 #define REQFLAG_NOPARITY 0x1000 547 #define REQFLAG_STOPQ 0x2000 548 #define REQFLAG_XTRASNS 0x4000 549 #define REQFLAG_PRIORITY 0x8000 550 551 typedef struct { 552 isphdr_t req_header; 553 uint32_t req_handle; 554 uint8_t req_lun_trn; 555 uint8_t req_target; 556 uint16_t req_cdblen; 557 uint16_t req_flags; 558 uint16_t req_reserved; 559 uint16_t req_time; 560 uint16_t req_seg_count; 561 uint8_t req_cdb[44]; 562 } ispextreq_t; 563 564 565 /* 566 * ISP24XX structures 567 */ 568 typedef struct { 569 isphdr_t req_header; 570 uint32_t req_handle; 571 uint16_t req_nphdl; 572 uint16_t req_time; 573 uint16_t req_seg_count; 574 uint16_t req_reserved; 575 uint8_t req_lun[8]; 576 uint8_t req_alen_datadir; 577 uint8_t req_task_management; 578 uint8_t req_task_attribute; 579 uint8_t req_crn; 580 uint8_t req_cdb[16]; 581 uint32_t req_dl; 582 uint16_t req_tidlo; 583 uint8_t req_tidhi; 584 uint8_t req_vpidx; 585 ispds64_t req_dataseg; 586 } ispreqt7_t; 587 588 /* Task Management Request Function */ 589 typedef struct { 590 isphdr_t tmf_header; 591 uint32_t tmf_handle; 592 uint16_t tmf_nphdl; 593 uint8_t tmf_reserved0[2]; 594 uint16_t tmf_delay; 595 uint16_t tmf_timeout; 596 uint8_t tmf_lun[8]; 597 uint32_t tmf_flags; 598 uint8_t tmf_reserved1[20]; 599 uint16_t tmf_tidlo; 600 uint8_t tmf_tidhi; 601 uint8_t tmf_vpidx; 602 uint8_t tmf_reserved2[12]; 603 } isp24xx_tmf_t; 604 605 #define ISP24XX_TMF_NOSEND 0x80000000 606 607 #define ISP24XX_TMF_LUN_RESET 0x00000010 608 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 609 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 610 #define ISP24XX_TMF_TARGET_RESET 0x00000002 611 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 612 613 /* I/O Abort Structure */ 614 typedef struct { 615 isphdr_t abrt_header; 616 uint32_t abrt_handle; 617 uint16_t abrt_nphdl; 618 uint16_t abrt_options; 619 uint32_t abrt_cmd_handle; 620 uint16_t abrt_queue_number; 621 uint8_t abrt_reserved[30]; 622 uint16_t abrt_tidlo; 623 uint8_t abrt_tidhi; 624 uint8_t abrt_vpidx; 625 uint8_t abrt_reserved1[12]; 626 } isp24xx_abrt_t; 627 628 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 629 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 630 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 631 632 #define ISP_CDSEG 7 633 typedef struct { 634 isphdr_t req_header; 635 uint32_t req_reserved; 636 ispds_t req_dataseg[ISP_CDSEG]; 637 } ispcontreq_t; 638 639 #define ISP_CDSEG64 5 640 typedef struct { 641 isphdr_t req_header; 642 ispds64_t req_dataseg[ISP_CDSEG64]; 643 } ispcontreq64_t; 644 645 typedef struct { 646 isphdr_t req_header; 647 uint32_t req_handle; 648 uint16_t req_scsi_status; 649 uint16_t req_completion_status; 650 uint16_t req_state_flags; 651 uint16_t req_status_flags; 652 uint16_t req_time; 653 #define req_response_len req_time /* FC only */ 654 uint16_t req_sense_len; 655 uint32_t req_resid; 656 uint8_t req_response[8]; /* FC only */ 657 uint8_t req_sense_data[32]; 658 } ispstatusreq_t; 659 660 /* 661 * Status Continuation 662 */ 663 typedef struct { 664 isphdr_t req_header; 665 uint8_t req_sense_data[60]; 666 } ispstatus_cont_t; 667 668 /* 669 * 24XX Type 0 status 670 */ 671 typedef struct { 672 isphdr_t req_header; 673 uint32_t req_handle; 674 uint16_t req_completion_status; 675 uint16_t req_oxid; 676 uint32_t req_resid; 677 uint16_t req_reserved0; 678 uint16_t req_state_flags; 679 uint16_t req_retry_delay; /* aka Status Qualifier */ 680 uint16_t req_scsi_status; 681 uint32_t req_fcp_residual; 682 uint32_t req_sense_len; 683 uint32_t req_response_len; 684 uint8_t req_rsp_sense[28]; 685 } isp24xx_statusreq_t; 686 687 /* 688 * For Qlogic 2X00, the high order byte of SCSI status has 689 * additional meaning. 690 */ 691 #define RQCS_CR 0x1000 /* Confirmation Request */ 692 #define RQCS_RU 0x0800 /* Residual Under */ 693 #define RQCS_RO 0x0400 /* Residual Over */ 694 #define RQCS_RESID (RQCS_RU|RQCS_RO) 695 #define RQCS_SV 0x0200 /* Sense Length Valid */ 696 #define RQCS_RV 0x0100 /* FCP Response Length Valid */ 697 698 /* 699 * CT Passthru IOCB 700 */ 701 typedef struct { 702 isphdr_t ctp_header; 703 uint32_t ctp_handle; 704 uint16_t ctp_status; 705 uint16_t ctp_nphdl; /* n-port handle */ 706 uint16_t ctp_cmd_cnt; /* Command DSD count */ 707 uint8_t ctp_vpidx; 708 uint8_t ctp_reserved0; 709 uint16_t ctp_time; 710 uint16_t ctp_reserved1; 711 uint16_t ctp_rsp_cnt; /* Response DSD count */ 712 uint16_t ctp_reserved2[5]; 713 uint32_t ctp_rsp_bcnt; /* Response byte count */ 714 uint32_t ctp_cmd_bcnt; /* Command byte count */ 715 ispds64_t ctp_dataseg[2]; 716 } isp_ct_pt_t; 717 718 /* 719 * MS Passthru IOCB 720 */ 721 typedef struct { 722 isphdr_t ms_header; 723 uint32_t ms_handle; 724 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 725 uint16_t ms_status; 726 uint16_t ms_flags; 727 uint16_t ms_reserved1; /* low 8 bits */ 728 uint16_t ms_time; 729 uint16_t ms_cmd_cnt; /* Command DSD count */ 730 uint16_t ms_tot_cnt; /* Total DSD Count */ 731 uint8_t ms_type; /* MS type */ 732 uint8_t ms_r_ctl; /* R_CTL */ 733 uint16_t ms_rxid; /* RX_ID */ 734 uint16_t ms_reserved2; 735 uint32_t ms_handle2; 736 uint32_t ms_rsp_bcnt; /* Response byte count */ 737 uint32_t ms_cmd_bcnt; /* Command byte count */ 738 ispds64_t ms_dataseg[2]; 739 } isp_ms_t; 740 741 /* 742 * Completion Status Codes. 743 */ 744 #define RQCS_COMPLETE 0x0000 745 #define RQCS_DMA_ERROR 0x0002 746 #define RQCS_RESET_OCCURRED 0x0004 747 #define RQCS_ABORTED 0x0005 748 #define RQCS_TIMEOUT 0x0006 749 #define RQCS_DATA_OVERRUN 0x0007 750 #define RQCS_DATA_UNDERRUN 0x0015 751 #define RQCS_QUEUE_FULL 0x001C 752 753 /* 1X00 Only Completion Codes */ 754 #define RQCS_INCOMPLETE 0x0001 755 #define RQCS_TRANSPORT_ERROR 0x0003 756 #define RQCS_COMMAND_OVERRUN 0x0008 757 #define RQCS_STATUS_OVERRUN 0x0009 758 #define RQCS_BAD_MESSAGE 0x000a 759 #define RQCS_NO_MESSAGE_OUT 0x000b 760 #define RQCS_EXT_ID_FAILED 0x000c 761 #define RQCS_IDE_MSG_FAILED 0x000d 762 #define RQCS_ABORT_MSG_FAILED 0x000e 763 #define RQCS_REJECT_MSG_FAILED 0x000f 764 #define RQCS_NOP_MSG_FAILED 0x0010 765 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 766 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 767 #define RQCS_ID_MSG_FAILED 0x0013 768 #define RQCS_UNEXP_BUS_FREE 0x0014 769 #define RQCS_XACT_ERR1 0x0018 770 #define RQCS_XACT_ERR2 0x0019 771 #define RQCS_XACT_ERR3 0x001A 772 #define RQCS_BAD_ENTRY 0x001B 773 #define RQCS_PHASE_SKIPPED 0x001D 774 #define RQCS_ARQS_FAILED 0x001E 775 #define RQCS_WIDE_FAILED 0x001F 776 #define RQCS_SYNCXFER_FAILED 0x0020 777 #define RQCS_LVD_BUSERR 0x0021 778 779 /* 2X00 Only Completion Codes */ 780 #define RQCS_PORT_UNAVAILABLE 0x0028 781 #define RQCS_PORT_LOGGED_OUT 0x0029 782 #define RQCS_PORT_CHANGED 0x002A 783 #define RQCS_PORT_BUSY 0x002B 784 785 /* 24XX Only Completion Codes */ 786 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 787 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 788 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 789 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 790 791 792 /* 793 * 1X00 specific State Flags 794 */ 795 #define RQSF_GOT_BUS 0x0100 796 #define RQSF_GOT_TARGET 0x0200 797 #define RQSF_SENT_CDB 0x0400 798 #define RQSF_XFRD_DATA 0x0800 799 #define RQSF_GOT_STATUS 0x1000 800 #define RQSF_GOT_SENSE 0x2000 801 #define RQSF_XFER_COMPLETE 0x4000 802 803 /* 804 * 2X00 specific State Flags 805 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 806 */ 807 #define RQSF_DATA_IN 0x0020 808 #define RQSF_DATA_OUT 0x0040 809 #define RQSF_STAG 0x0008 810 #define RQSF_OTAG 0x0004 811 #define RQSF_HTAG 0x0002 812 /* 813 * 1X00 Status Flags 814 */ 815 #define RQSTF_DISCONNECT 0x0001 816 #define RQSTF_SYNCHRONOUS 0x0002 817 #define RQSTF_PARITY_ERROR 0x0004 818 #define RQSTF_BUS_RESET 0x0008 819 #define RQSTF_DEVICE_RESET 0x0010 820 #define RQSTF_ABORTED 0x0020 821 #define RQSTF_TIMEOUT 0x0040 822 #define RQSTF_NEGOTIATION 0x0080 823 824 /* 825 * 2X00 specific state flags 826 */ 827 /* RQSF_SENT_CDB */ 828 /* RQSF_XFRD_DATA */ 829 /* RQSF_GOT_STATUS */ 830 /* RQSF_XFER_COMPLETE */ 831 832 /* 833 * 2X00 specific status flags 834 */ 835 /* RQSTF_ABORTED */ 836 /* RQSTF_TIMEOUT */ 837 #define RQSTF_DMA_ERROR 0x0080 838 #define RQSTF_LOGOUT 0x2000 839 840 /* 841 * Miscellaneous 842 */ 843 #ifndef ISP_EXEC_THROTTLE 844 #define ISP_EXEC_THROTTLE 16 845 #endif 846 847 /* 848 * About Firmware returns an 'attribute' word in mailbox 6. 849 * These attributes are for 2200 and 2300. 850 */ 851 #define ISP_FW_ATTR_TMODE 0x0001 852 #define ISP_FW_ATTR_SCCLUN 0x0002 853 #define ISP_FW_ATTR_FABRIC 0x0004 854 #define ISP_FW_ATTR_CLASS2 0x0008 855 #define ISP_FW_ATTR_FCTAPE 0x0010 856 #define ISP_FW_ATTR_IP 0x0020 857 #define ISP_FW_ATTR_VI 0x0040 858 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 859 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 860 861 /* and these are for the 2400 */ 862 #define ISP2400_FW_ATTR_CLASS2 0x0001 863 #define ISP2400_FW_ATTR_IP 0x0002 864 #define ISP2400_FW_ATTR_MULTIID 0x0004 865 #define ISP2400_FW_ATTR_SB2 0x0008 866 #define ISP2400_FW_ATTR_T10CRC 0x0010 867 #define ISP2400_FW_ATTR_VI 0x0020 868 #define ISP2400_FW_ATTR_MQ 0x0040 869 #define ISP2400_FW_ATTR_MSIX 0x0080 870 #define ISP2400_FW_ATTR_FCOE 0x0800 871 #define ISP2400_FW_ATTR_VP0 0x1000 872 #define ISP2400_FW_ATTR_EXPFW 0x2000 873 #define ISP2400_FW_ATTR_HOTFW 0x4000 874 #define ISP2400_FW_ATTR_EXTNDED 0x8000 875 #define ISP2400_FW_ATTR_EXTVP 0x00010000 876 #define ISP2400_FW_ATTR_VN2VN 0x00040000 877 #define ISP2400_FW_ATTR_EXMOFF 0x00080000 878 #define ISP2400_FW_ATTR_NPMOFF 0x00100000 879 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000 880 #define ISP2400_FW_ATTR_SRIOV 0x02000000 881 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000 882 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 883 884 /* 885 * These are either manifestly true or are dependent on f/w attributes 886 */ 887 #define ISP_CAP_TMODE(isp) \ 888 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 889 #define ISP_CAP_SCCFW(isp) \ 890 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 891 #define ISP_CAP_2KLOGIN(isp) \ 892 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 893 894 /* 895 * This is only true for 24XX cards with this f/w attribute 896 */ 897 #define ISP_CAP_MULTI_ID(isp) \ 898 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 899 #define ISP_GET_VPIDX(isp, tag) \ 900 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 901 #define ISP_CAP_MSIX(isp) \ 902 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MSIX) : 0) 903 #define ISP_CAP_VP0(isp) \ 904 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0) 905 906 /* 907 * This is true manifestly or is dependent on a f/w attribute 908 * but may or may not actually be *enabled*. In any case, it 909 * is enabled on a per-channel basis. 910 */ 911 #define ISP_CAP_FCTAPE(isp) \ 912 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 913 914 #define ISP_FCTAPE_ENABLED(isp, chan) \ 915 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 916 917 /* 918 * Reduced Interrupt Operation Response Queue Entries 919 */ 920 921 typedef struct { 922 isphdr_t req_header; 923 uint32_t req_handles[15]; 924 } isp_rio1_t; 925 926 typedef struct { 927 isphdr_t req_header; 928 uint16_t req_handles[30]; 929 } isp_rio2_t; 930 931 /* 932 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 933 */ 934 935 /* 936 * Initialization Control Block 937 * 938 * Version One (prime) format. 939 */ 940 typedef struct { 941 uint8_t icb_version; 942 uint8_t icb_reserved0; 943 uint16_t icb_fwoptions; 944 uint16_t icb_maxfrmlen; 945 uint16_t icb_maxalloc; 946 uint16_t icb_execthrottle; 947 uint8_t icb_retry_count; 948 uint8_t icb_retry_delay; 949 uint8_t icb_portname[8]; 950 uint16_t icb_hardaddr; 951 uint8_t icb_iqdevtype; 952 uint8_t icb_logintime; 953 uint8_t icb_nodename[8]; 954 uint16_t icb_rqstout; 955 uint16_t icb_rspnsin; 956 uint16_t icb_rqstqlen; 957 uint16_t icb_rsltqlen; 958 uint16_t icb_rqstaddr[4]; 959 uint16_t icb_respaddr[4]; 960 uint16_t icb_lunenables; 961 uint8_t icb_ccnt; 962 uint8_t icb_icnt; 963 uint16_t icb_lunetimeout; 964 uint16_t icb_reserved1; 965 uint16_t icb_xfwoptions; 966 uint8_t icb_racctimer; 967 uint8_t icb_idelaytimer; 968 uint16_t icb_zfwoptions; 969 uint16_t icb_reserved2[13]; 970 } isp_icb_t; 971 972 #define ICB_VERSION1 1 973 974 #define ICBOPT_EXTENDED 0x8000 975 #define ICBOPT_BOTH_WWNS 0x4000 976 #define ICBOPT_FULL_LOGIN 0x2000 977 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 978 #define ICBOPT_PREV_ADDRESS 0x0800 979 #define ICBOPT_SRCHDOWN 0x0400 980 #define ICBOPT_NOLIP 0x0200 981 #define ICBOPT_PDBCHANGE_AE 0x0100 982 #define ICBOPT_TGT_TYPE 0x0080 983 #define ICBOPT_INI_ADISC 0x0040 984 #define ICBOPT_INI_DISABLE 0x0020 985 #define ICBOPT_TGT_ENABLE 0x0010 986 #define ICBOPT_FAST_POST 0x0008 987 #define ICBOPT_FULL_DUPLEX 0x0004 988 #define ICBOPT_FAIRNESS 0x0002 989 #define ICBOPT_HARD_ADDRESS 0x0001 990 991 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 992 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 993 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 994 #define ICBXOPT_FCTAPE 0x1000 995 #define ICBXOPT_CLASS2_ACK0 0x0200 996 #define ICBXOPT_CLASS2 0x0100 997 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 998 #define ICBXOPT_TOPO_MASK 0x0070 999 #define ICBXOPT_LOOP_ONLY 0x0000 1000 #define ICBXOPT_PTP_ONLY 0x0010 1001 #define ICBXOPT_LOOP_2_PTP 0x0020 1002 #define ICBXOPT_PTP_2_LOOP 0x0030 1003 /* 1004 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 1005 * RIO is not defined for the 23XX cards (just 2200) 1006 */ 1007 #define ICBXOPT_RIO_OFF 0 1008 #define ICBXOPT_RIO_16BIT 1 1009 #define ICBXOPT_RIO_32BIT 2 1010 #define ICBXOPT_RIO_16BIT_IOCB 3 1011 #define ICBXOPT_RIO_32BIT_IOCB 4 1012 #define ICBXOPT_ZIO 5 1013 #define ICBXOPT_TIMER_MASK 0x7 1014 1015 #define ICBZOPT_RATE_MASK 0xC000 1016 #define ICBZOPT_RATE_1GB 0x0000 1017 #define ICBZOPT_RATE_AUTO 0x8000 1018 #define ICBZOPT_RATE_2GB 0x4000 1019 #define ICBZOPT_50_OHM 0x2000 1020 #define ICBZOPT_NO_LOCAL_PLOGI 0x0080 1021 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 1022 #define ICBZOPT_RSPSZ_MASK 0x0030 1023 #define ICBZOPT_RSPSZ_24 0x0000 1024 #define ICBZOPT_RSPSZ_12 0x0010 1025 #define ICBZOPT_RSPSZ_24A 0x0020 1026 #define ICBZOPT_RSPSZ_32 0x0030 1027 #define ICBZOPT_SOFTID 0x0002 1028 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 1029 1030 /* 2400 F/W options */ 1031 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 1032 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 1033 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800 1034 #define ICB2400_OPT1_SRCHDOWN 0x00000400 1035 #define ICB2400_OPT1_NOLIP 0x00000200 1036 #define ICB2400_OPT1_INI_DISABLE 0x00000020 1037 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 1038 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 1039 #define ICB2400_OPT1_FAIRNESS 0x00000002 1040 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 1041 1042 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 1043 #define ICB2400_OPT2_ENA_IHA 0x04000000 1044 #define ICB2400_OPT2_QOS 0x02000000 1045 #define ICB2400_OPT2_IOCBS 0x01000000 1046 #define ICB2400_OPT2_ENA_IHR 0x00400000 1047 #define ICB2400_OPT2_ENA_VMS 0x00200000 1048 #define ICB2400_OPT2_ENA_TA 0x00100000 1049 #define ICB2400_OPT2_TPRLIC 0x00004000 1050 #define ICB2400_OPT2_FCTAPE 0x00001000 1051 #define ICB2400_OPT2_FCSP 0x00000800 1052 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1053 #define ICB2400_OPT2_CLASS2 0x00000100 1054 #define ICB2400_OPT2_NO_PLAY 0x00000080 1055 #define ICB2400_OPT2_TOPO_MASK 0x00000070 1056 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 1057 #define ICB2400_OPT2_PTP_ONLY 0x00000010 1058 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1059 #define ICB2400_OPT2_TIMER_MASK 0x0000000f 1060 #define ICB2400_OPT2_ZIO 0x00000005 1061 #define ICB2400_OPT2_ZIO1 0x00000006 1062 1063 #define ICB2400_OPT3_NO_CTXDIS 0x40000000 1064 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1065 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1066 #define ICB2400_OPT3_ENA_MFCF 0x00020000 1067 #define ICB2400_OPT3_SKIP_4GB 0x00010000 1068 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1069 #define ICB2400_OPT3_RATE_1GB 0x00000000 1070 #define ICB2400_OPT3_RATE_2GB 0x00002000 1071 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1072 #define ICB2400_OPT3_RATE_4GB 0x00006000 1073 #define ICB2400_OPT3_RATE_8GB 0x00008000 1074 #define ICB2400_OPT3_RATE_16GB 0x0000A000 1075 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1076 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1077 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1078 #define ICB2400_OPT3_ENA_OOF 0x00000040 1079 /* note that a response size flag of zero is reserved! */ 1080 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1081 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1082 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1083 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1084 #define ICB2400_OPT3_SOFTID 0x00000002 1085 1086 #define ICB_MIN_FRMLEN 256 1087 #define ICB_MAX_FRMLEN 2112 1088 #define ICB_DFLT_FRMLEN 1024 1089 #define ICB_DFLT_ALLOC 256 1090 #define ICB_DFLT_THROTTLE 16 1091 #define ICB_DFLT_RDELAY 5 1092 #define ICB_DFLT_RCOUNT 3 1093 1094 #define ICB_LOGIN_TOV 10 1095 #define ICB_LUN_ENABLE_TOV 15 1096 1097 1098 /* 1099 * And somebody at QLogic had a great idea that you could just change 1100 * the structure *and* keep the version number the same as the other cards. 1101 */ 1102 typedef struct { 1103 uint16_t icb_version; 1104 uint16_t icb_reserved0; 1105 uint16_t icb_maxfrmlen; 1106 uint16_t icb_execthrottle; 1107 uint16_t icb_xchgcnt; 1108 uint16_t icb_hardaddr; 1109 uint8_t icb_portname[8]; 1110 uint8_t icb_nodename[8]; 1111 uint16_t icb_rspnsin; 1112 uint16_t icb_rqstout; 1113 uint16_t icb_retry_count; 1114 uint16_t icb_priout; 1115 uint16_t icb_rsltqlen; 1116 uint16_t icb_rqstqlen; 1117 uint16_t icb_ldn_nols; 1118 uint16_t icb_prqstqlen; 1119 uint16_t icb_rqstaddr[4]; 1120 uint16_t icb_respaddr[4]; 1121 uint16_t icb_priaddr[4]; 1122 uint16_t icb_msixresp; 1123 uint16_t icb_msixatio; 1124 uint16_t icb_reserved1[2]; 1125 uint16_t icb_atio_in; 1126 uint16_t icb_atioqlen; 1127 uint16_t icb_atioqaddr[4]; 1128 uint16_t icb_idelaytimer; 1129 uint16_t icb_logintime; 1130 uint32_t icb_fwoptions1; 1131 uint32_t icb_fwoptions2; 1132 uint32_t icb_fwoptions3; 1133 uint16_t icb_qos; 1134 uint16_t icb_reserved2[3]; 1135 uint16_t icb_enodemac[3]; 1136 uint16_t icb_disctime; 1137 uint16_t icb_reserved3[4]; 1138 } isp_icb_2400_t; 1139 1140 #define RQRSP_ADDR0015 0 1141 #define RQRSP_ADDR1631 1 1142 #define RQRSP_ADDR3247 2 1143 #define RQRSP_ADDR4863 3 1144 1145 1146 #define ICB_NNM0 7 1147 #define ICB_NNM1 6 1148 #define ICB_NNM2 5 1149 #define ICB_NNM3 4 1150 #define ICB_NNM4 3 1151 #define ICB_NNM5 2 1152 #define ICB_NNM6 1 1153 #define ICB_NNM7 0 1154 1155 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1156 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1157 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1158 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1159 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1160 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1161 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1162 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1163 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1164 1165 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1166 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1167 ((uint64_t) array[ICB_NNM1] << 8) | \ 1168 ((uint64_t) array[ICB_NNM2] << 16) | \ 1169 ((uint64_t) array[ICB_NNM3] << 24) | \ 1170 ((uint64_t) array[ICB_NNM4] << 32) | \ 1171 ((uint64_t) array[ICB_NNM5] << 40) | \ 1172 ((uint64_t) array[ICB_NNM6] << 48) | \ 1173 ((uint64_t) array[ICB_NNM7] << 56) 1174 1175 1176 /* 1177 * For MULTI_ID firmware, this describes a 1178 * virtual port entity for getting status. 1179 */ 1180 typedef struct { 1181 uint16_t vp_port_status; 1182 uint8_t vp_port_options; 1183 uint8_t vp_port_loopid; 1184 uint8_t vp_port_portname[8]; 1185 uint8_t vp_port_nodename[8]; 1186 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1187 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1188 } vp_port_info_t; 1189 1190 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1191 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1192 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1193 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1194 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1195 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1196 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1197 1198 #define ICB2400_VPOPT_WRITE_SIZE 20 1199 1200 /* 1201 * For MULTI_ID firmware, we append this structure 1202 * to the isp_icb_2400_t above, followed by a list 1203 * structures that are *most* of the vp_port_info_t. 1204 */ 1205 typedef struct { 1206 uint16_t vp_count; 1207 uint16_t vp_global_options; 1208 } isp_icb_2400_vpinfo_t; 1209 1210 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1211 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1212 (ICB2400_VPINFO_OFF + \ 1213 sizeof (isp_icb_2400_vpinfo_t) + ((chan) * ICB2400_VPOPT_WRITE_SIZE)) 1214 1215 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1216 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1217 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1218 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1219 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1220 1221 typedef struct { 1222 isphdr_t vp_ctrl_hdr; 1223 uint32_t vp_ctrl_handle; 1224 uint16_t vp_ctrl_index_fail; 1225 uint16_t vp_ctrl_status; 1226 uint16_t vp_ctrl_command; 1227 uint16_t vp_ctrl_vp_count; 1228 uint16_t vp_ctrl_idmap[16]; 1229 uint16_t vp_ctrl_reserved[7]; 1230 uint16_t vp_ctrl_fcf_index; 1231 } vp_ctrl_info_t; 1232 1233 #define VP_CTRL_CMD_ENABLE_VP 0x00 1234 #define VP_CTRL_CMD_DISABLE_VP 0x08 1235 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09 1236 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A 1237 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B 1238 1239 /* 1240 * We can use this structure for modifying either one or two VP ports after initialization 1241 */ 1242 typedef struct { 1243 isphdr_t vp_mod_hdr; 1244 uint32_t vp_mod_hdl; 1245 uint16_t vp_mod_reserved0; 1246 uint16_t vp_mod_status; 1247 uint8_t vp_mod_cmd; 1248 uint8_t vp_mod_cnt; 1249 uint8_t vp_mod_idx0; 1250 uint8_t vp_mod_idx1; 1251 struct { 1252 uint8_t options; 1253 uint8_t loopid; 1254 uint16_t reserved1; 1255 uint8_t wwpn[8]; 1256 uint8_t wwnn[8]; 1257 } vp_mod_ports[2]; 1258 uint8_t vp_mod_reserved2[8]; 1259 } vp_modify_t; 1260 1261 #define VP_STS_OK 0x00 1262 #define VP_STS_ERR 0x01 1263 #define VP_CNT_ERR 0x02 1264 #define VP_GEN_ERR 0x03 1265 #define VP_IDX_ERR 0x04 1266 #define VP_STS_BSY 0x05 1267 1268 #define VP_MODIFY 0x00 1269 #define VP_MODIFY_ENA 0x01 1270 #define VP_MODIFY_OPT 0x02 1271 #define VP_RESUME 0x03 1272 1273 /* 1274 * Port Data Base Element 1275 */ 1276 1277 typedef struct { 1278 uint16_t pdb_options; 1279 uint8_t pdb_mstate; 1280 uint8_t pdb_sstate; 1281 uint8_t pdb_hardaddr_bits[4]; 1282 uint8_t pdb_portid_bits[4]; 1283 uint8_t pdb_nodename[8]; 1284 uint8_t pdb_portname[8]; 1285 uint16_t pdb_execthrottle; 1286 uint16_t pdb_exec_count; 1287 uint8_t pdb_retry_count; 1288 uint8_t pdb_retry_delay; 1289 uint16_t pdb_resalloc; 1290 uint16_t pdb_curalloc; 1291 uint16_t pdb_qhead; 1292 uint16_t pdb_qtail; 1293 uint16_t pdb_tl_next; 1294 uint16_t pdb_tl_last; 1295 uint16_t pdb_features; /* PLOGI, Common Service */ 1296 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1297 uint16_t pdb_roi; /* PLOGI, Common Service */ 1298 uint8_t pdb_target; 1299 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1300 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1301 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1302 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1303 uint16_t pdb_labrtflg; 1304 uint16_t pdb_lstopflg; 1305 uint16_t pdb_sqhead; 1306 uint16_t pdb_sqtail; 1307 uint16_t pdb_ptimer; 1308 uint16_t pdb_nxt_seqid; 1309 uint16_t pdb_fcount; 1310 uint16_t pdb_prli_len; 1311 uint16_t pdb_prli_svc0; 1312 uint16_t pdb_prli_svc3; 1313 uint16_t pdb_loopid; 1314 uint16_t pdb_il_ptr; 1315 uint16_t pdb_sl_ptr; 1316 } isp_pdb_21xx_t; 1317 1318 #define PDB_OPTIONS_XMITTING (1<<11) 1319 #define PDB_OPTIONS_LNKXMIT (1<<10) 1320 #define PDB_OPTIONS_ABORTED (1<<9) 1321 #define PDB_OPTIONS_ADISC (1<<1) 1322 1323 #define PDB_STATE_DISCOVERY 0 1324 #define PDB_STATE_WDISC_ACK 1 1325 #define PDB_STATE_PLOGI 2 1326 #define PDB_STATE_PLOGI_ACK 3 1327 #define PDB_STATE_PRLI 4 1328 #define PDB_STATE_PRLI_ACK 5 1329 #define PDB_STATE_LOGGED_IN 6 1330 #define PDB_STATE_PORT_UNAVAIL 7 1331 #define PDB_STATE_PRLO 8 1332 #define PDB_STATE_PRLO_ACK 9 1333 #define PDB_STATE_PLOGO 10 1334 #define PDB_STATE_PLOG_ACK 11 1335 1336 #define SVC3_ROLE_MASK 0x30 1337 #define SVC3_ROLE_SHIFT 4 1338 1339 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1340 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1341 1342 /* 1343 * Port Data Base Element- 24XX cards 1344 */ 1345 typedef struct { 1346 uint16_t pdb_flags; 1347 uint8_t pdb_curstate; 1348 uint8_t pdb_laststate; 1349 uint8_t pdb_hardaddr_bits[4]; 1350 uint8_t pdb_portid_bits[4]; 1351 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1352 uint16_t pdb_retry_timer; 1353 uint16_t pdb_handle; 1354 uint16_t pdb_rcv_dsize; 1355 uint16_t pdb_reserved0; 1356 uint16_t pdb_prli_svc0; 1357 uint16_t pdb_prli_svc3; 1358 uint8_t pdb_portname[8]; 1359 uint8_t pdb_nodename[8]; 1360 uint8_t pdb_reserved1[24]; 1361 } isp_pdb_24xx_t; 1362 1363 #define PDB2400_TID_SUPPORTED 0x4000 1364 #define PDB2400_FC_TAPE 0x0080 1365 #define PDB2400_CLASS2_ACK0 0x0040 1366 #define PDB2400_FCP_CONF 0x0020 1367 #define PDB2400_CLASS2 0x0010 1368 #define PDB2400_ADDR_VALID 0x0002 1369 1370 #define PDB2400_STATE_PLOGI_PEND 0x03 1371 #define PDB2400_STATE_PLOGI_DONE 0x04 1372 #define PDB2400_STATE_PRLI_PEND 0x05 1373 #define PDB2400_STATE_LOGGED_IN 0x06 1374 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1375 #define PDB2400_STATE_PRLO_PEND 0x09 1376 #define PDB2400_STATE_LOGO_PEND 0x0B 1377 1378 /* 1379 * Common elements from the above two structures that are actually useful to us. 1380 */ 1381 typedef struct { 1382 uint16_t handle; 1383 uint16_t prli_word3; 1384 uint32_t : 8, 1385 portid : 24; 1386 uint8_t portname[8]; 1387 uint8_t nodename[8]; 1388 } isp_pdb_t; 1389 1390 /* 1391 * Port/Node Name List Element 1392 */ 1393 typedef struct { 1394 uint8_t pnnle_name[8]; 1395 uint16_t pnnle_handle; 1396 uint16_t pnnle_reserved; 1397 } isp_pnnle_t; 1398 1399 #define PNNL_OPTIONS_NODE_NAMES (1<<0) 1400 #define PNNL_OPTIONS_PORT_DATA (1<<2) 1401 #define PNNL_OPTIONS_INITIATORS (1<<3) 1402 1403 /* 1404 * Port and N-Port Handle List Element 1405 */ 1406 typedef struct { 1407 uint16_t pnhle_port_id_lo; 1408 uint16_t pnhle_port_id_hi_handle; 1409 } isp_pnhle_21xx_t; 1410 1411 typedef struct { 1412 uint16_t pnhle_port_id_lo; 1413 uint16_t pnhle_port_id_hi; 1414 uint16_t pnhle_handle; 1415 } isp_pnhle_23xx_t; 1416 1417 typedef struct { 1418 uint16_t pnhle_port_id_lo; 1419 uint16_t pnhle_port_id_hi; 1420 uint16_t pnhle_handle; 1421 uint16_t pnhle_reserved; 1422 } isp_pnhle_24xx_t; 1423 1424 /* 1425 * Port Database Changed Async Event information for 24XX cards 1426 */ 1427 /* N-Port Handle */ 1428 #define PDB24XX_AE_GLOBAL 0xFFFF 1429 1430 /* Reason Codes */ 1431 #define PDB24XX_AE_OK 0x00 1432 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1433 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1434 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1435 #define PDB24XX_AE_PLOGI_RCVD 0x04 1436 #define PDB24XX_AE_PLOGI_RJT 0x05 1437 #define PDB24XX_AE_PRLI_RCVD 0x06 1438 #define PDB24XX_AE_PRLI_RJT 0x07 1439 #define PDB24XX_AE_TPRLO 0x08 1440 #define PDB24XX_AE_TPRLO_RJT 0x09 1441 #define PDB24XX_AE_PRLO_RCVD 0x0a 1442 #define PDB24XX_AE_LOGO_RCVD 0x0b 1443 #define PDB24XX_AE_TOPO_CHG 0x0c 1444 #define PDB24XX_AE_NPORT_CHG 0x0d 1445 #define PDB24XX_AE_FLOGI_RJT 0x0e 1446 #define PDB24XX_AE_BAD_FANN 0x0f 1447 #define PDB24XX_AE_FLOGI_TIMO 0x10 1448 #define PDB24XX_AE_ABX_LOGO 0x11 1449 #define PDB24XX_AE_PLOGI_DONE 0x12 1450 #define PDB24XX_AE_PRLI_DONE 0x13 1451 #define PDB24XX_AE_OPN_1 0x14 1452 #define PDB24XX_AE_OPN_2 0x15 1453 #define PDB24XX_AE_TXERR 0x16 1454 #define PDB24XX_AE_FORCED_LOGO 0x17 1455 #define PDB24XX_AE_DISC_TIMO 0x18 1456 1457 /* 1458 * Genericized Port Login/Logout software structure 1459 */ 1460 typedef struct { 1461 uint16_t handle; 1462 uint16_t channel; 1463 uint32_t 1464 flags : 8, 1465 portid : 24; 1466 } isp_plcmd_t; 1467 /* the flags to use are those for PLOGX_FLG_* below */ 1468 1469 /* 1470 * ISP24XX- Login/Logout Port IOCB 1471 */ 1472 typedef struct { 1473 isphdr_t plogx_header; 1474 uint32_t plogx_handle; 1475 uint16_t plogx_status; 1476 uint16_t plogx_nphdl; 1477 uint16_t plogx_flags; 1478 uint16_t plogx_vphdl; /* low 8 bits */ 1479 uint16_t plogx_portlo; /* low 16 bits */ 1480 uint16_t plogx_rspsz_porthi; 1481 struct { 1482 uint16_t lo16; 1483 uint16_t hi16; 1484 } plogx_ioparm[11]; 1485 } isp_plogx_t; 1486 1487 #define PLOGX_STATUS_OK 0x00 1488 #define PLOGX_STATUS_UNAVAIL 0x28 1489 #define PLOGX_STATUS_LOGOUT 0x29 1490 #define PLOGX_STATUS_IOCBERR 0x31 1491 1492 #define PLOGX_IOCBERR_NOLINK 0x01 1493 #define PLOGX_IOCBERR_NOIOCB 0x02 1494 #define PLOGX_IOCBERR_NOXGHG 0x03 1495 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1496 #define PLOGX_IOCBERR_NOFABRIC 0x05 1497 #define PLOGX_IOCBERR_NOTREADY 0x07 1498 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */ 1499 #define PLOGX_IOCBERR_NOPCB 0x0a 1500 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1501 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1502 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1503 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1504 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1505 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1506 1507 #define PLOGX_FLG_CMD_MASK 0xf 1508 #define PLOGX_FLG_CMD_PLOGI 0 1509 #define PLOGX_FLG_CMD_PRLI 1 1510 #define PLOGX_FLG_CMD_PDISC 2 1511 #define PLOGX_FLG_CMD_LOGO 8 1512 #define PLOGX_FLG_CMD_PRLO 9 1513 #define PLOGX_FLG_CMD_TPRLO 10 1514 1515 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1516 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1517 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1518 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1519 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1520 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1521 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1522 1523 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1524 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1525 1526 /* 1527 * Report ID Acquisistion (24XX multi-id firmware) 1528 */ 1529 typedef struct { 1530 isphdr_t ridacq_hdr; 1531 uint32_t ridacq_handle; 1532 uint8_t ridacq_vp_acquired; 1533 uint8_t ridacq_vp_setup; 1534 uint8_t ridacq_vp_index; 1535 uint8_t ridacq_vp_status; 1536 uint16_t ridacq_vp_port_lo; 1537 uint8_t ridacq_vp_port_hi; 1538 uint8_t ridacq_format; /* 0 or 1 */ 1539 uint16_t ridacq_map[8]; 1540 uint8_t ridacq_reserved1[32]; 1541 } isp_ridacq_t; 1542 1543 #define RIDACQ_STS_COMPLETE 0 1544 #define RIDACQ_STS_UNACQUIRED 1 1545 #define RIDACQ_STS_CHANGED 2 1546 #define RIDACQ_STS_SNS_TIMEOUT 3 1547 #define RIDACQ_STS_SNS_REJECTED 4 1548 #define RIDACQ_STS_SCR_TIMEOUT 5 1549 #define RIDACQ_STS_SCR_REJECTED 6 1550 1551 /* 1552 * Simple Name Server Data Structures 1553 */ 1554 #define SNS_GA_NXT 0x100 1555 #define SNS_GPN_ID 0x112 1556 #define SNS_GNN_ID 0x113 1557 #define SNS_GFT_ID 0x117 1558 #define SNS_GFF_ID 0x11F 1559 #define SNS_GID_FT 0x171 1560 #define SNS_GID_PT 0x1A1 1561 #define SNS_RFT_ID 0x217 1562 #define SNS_RSPN_ID 0x218 1563 #define SNS_RFF_ID 0x21F 1564 #define SNS_RSNN_NN 0x239 1565 typedef struct { 1566 uint16_t snscb_rblen; /* response buffer length (words) */ 1567 uint16_t snscb_reserved0; 1568 uint16_t snscb_addr[4]; /* response buffer address */ 1569 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1570 uint16_t snscb_reserved1; 1571 uint16_t snscb_data[]; /* variable data */ 1572 } sns_screq_t; /* Subcommand Request Structure */ 1573 1574 typedef struct { 1575 uint16_t snscb_rblen; /* response buffer length (words) */ 1576 uint16_t snscb_reserved0; 1577 uint16_t snscb_addr[4]; /* response buffer address */ 1578 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1579 uint16_t snscb_reserved1; 1580 uint16_t snscb_cmd; 1581 uint16_t snscb_reserved2; 1582 uint32_t snscb_reserved3; 1583 uint32_t snscb_port; 1584 } sns_ga_nxt_req_t; 1585 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1586 1587 typedef struct { /* Used for GFT_ID, GFF_ID, etc. */ 1588 uint16_t snscb_rblen; /* response buffer length (words) */ 1589 uint16_t snscb_reserved0; 1590 uint16_t snscb_addr[4]; /* response buffer address */ 1591 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1592 uint16_t snscb_reserved1; 1593 uint16_t snscb_cmd; 1594 uint16_t snscb_mword_div_2; 1595 uint32_t snscb_reserved3; 1596 uint32_t snscb_portid; 1597 } sns_gxx_id_req_t; 1598 #define SNS_GXX_ID_REQ_SIZE (sizeof (sns_gxx_id_req_t)) 1599 1600 typedef struct { 1601 uint16_t snscb_rblen; /* response buffer length (words) */ 1602 uint16_t snscb_reserved0; 1603 uint16_t snscb_addr[4]; /* response buffer address */ 1604 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1605 uint16_t snscb_reserved1; 1606 uint16_t snscb_cmd; 1607 uint16_t snscb_mword_div_2; 1608 uint32_t snscb_reserved3; 1609 uint32_t snscb_fc4_type; 1610 } sns_gid_ft_req_t; 1611 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1612 1613 typedef struct { 1614 uint16_t snscb_rblen; /* response buffer length (words) */ 1615 uint16_t snscb_reserved0; 1616 uint16_t snscb_addr[4]; /* response buffer address */ 1617 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1618 uint16_t snscb_reserved1; 1619 uint16_t snscb_cmd; 1620 uint16_t snscb_mword_div_2; 1621 uint32_t snscb_reserved3; 1622 uint8_t snscb_port_type; 1623 uint8_t snscb_domain; 1624 uint8_t snscb_area; 1625 uint8_t snscb_flags; 1626 } sns_gid_pt_req_t; 1627 #define SNS_GID_PT_REQ_SIZE (sizeof (sns_gid_pt_req_t)) 1628 1629 typedef struct { 1630 uint16_t snscb_rblen; /* response buffer length (words) */ 1631 uint16_t snscb_reserved0; 1632 uint16_t snscb_addr[4]; /* response buffer address */ 1633 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1634 uint16_t snscb_reserved1; 1635 uint16_t snscb_cmd; 1636 uint16_t snscb_reserved2; 1637 uint32_t snscb_reserved3; 1638 uint32_t snscb_port; 1639 uint32_t snscb_fc4_types[8]; 1640 } sns_rft_id_req_t; 1641 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1642 1643 typedef struct { 1644 ct_hdr_t snscb_cthdr; 1645 uint8_t snscb_port_type; 1646 uint8_t snscb_port_id[3]; 1647 uint8_t snscb_portname[8]; 1648 uint16_t snscb_data[]; /* variable data */ 1649 } sns_scrsp_t; /* Subcommand Response Structure */ 1650 1651 typedef struct { 1652 ct_hdr_t snscb_cthdr; 1653 uint8_t snscb_port_type; 1654 uint8_t snscb_port_id[3]; 1655 uint8_t snscb_portname[8]; 1656 uint8_t snscb_pnlen; /* symbolic port name length */ 1657 uint8_t snscb_pname[255]; /* symbolic port name */ 1658 uint8_t snscb_nodename[8]; 1659 uint8_t snscb_nnlen; /* symbolic node name length */ 1660 uint8_t snscb_nname[255]; /* symbolic node name */ 1661 uint8_t snscb_ipassoc[8]; 1662 uint8_t snscb_ipaddr[16]; 1663 uint8_t snscb_svc_class[4]; 1664 uint8_t snscb_fc4_types[32]; 1665 uint8_t snscb_fpname[8]; 1666 uint8_t snscb_reserved; 1667 uint8_t snscb_hardaddr[3]; 1668 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1669 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1670 1671 typedef struct { 1672 ct_hdr_t snscb_cthdr; 1673 uint8_t snscb_wwn[8]; 1674 } sns_gxn_id_rsp_t; 1675 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1676 1677 typedef struct { 1678 ct_hdr_t snscb_cthdr; 1679 uint32_t snscb_fc4_types[8]; 1680 } sns_gft_id_rsp_t; 1681 #define SNS_GFT_ID_RESP_SIZE (sizeof (sns_gft_id_rsp_t)) 1682 1683 typedef struct { 1684 ct_hdr_t snscb_cthdr; 1685 uint32_t snscb_fc4_features[32]; 1686 } sns_gff_id_rsp_t; 1687 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1688 1689 typedef struct { /* Used for GID_FT, GID_PT, etc. */ 1690 ct_hdr_t snscb_cthdr; 1691 struct { 1692 uint8_t control; 1693 uint8_t portid[3]; 1694 } snscb_ports[1]; 1695 } sns_gid_xx_rsp_t; 1696 #define SNS_GID_XX_RESP_SIZE(x) ((sizeof (sns_gid_xx_rsp_t)) + ((x - 1) << 2)) 1697 1698 /* 1699 * Other Misc Structures 1700 */ 1701 1702 /* ELS Pass Through */ 1703 typedef struct { 1704 isphdr_t els_hdr; 1705 uint32_t els_handle; 1706 uint16_t els_status; 1707 uint16_t els_nphdl; 1708 uint16_t els_xmit_dsd_count; /* outgoing only */ 1709 uint8_t els_vphdl; 1710 uint8_t els_sof; 1711 uint32_t els_rxid; 1712 uint16_t els_recv_dsd_count; /* outgoing only */ 1713 uint8_t els_opcode; 1714 uint8_t els_reserved1; 1715 uint8_t els_did_lo; 1716 uint8_t els_did_mid; 1717 uint8_t els_did_hi; 1718 uint8_t els_reserved2; 1719 uint16_t els_reserved3; 1720 uint16_t els_ctl_flags; 1721 union { 1722 struct { 1723 uint32_t _els_bytecnt; 1724 uint32_t _els_subcode1; 1725 uint32_t _els_subcode2; 1726 uint8_t _els_reserved4[20]; 1727 } in; 1728 struct { 1729 uint32_t _els_recv_bytecnt; 1730 uint32_t _els_xmit_bytecnt; 1731 uint32_t _els_xmit_dsd_length; 1732 uint16_t _els_xmit_dsd_a1500; 1733 uint16_t _els_xmit_dsd_a3116; 1734 uint16_t _els_xmit_dsd_a4732; 1735 uint16_t _els_xmit_dsd_a6348; 1736 uint32_t _els_recv_dsd_length; 1737 uint16_t _els_recv_dsd_a1500; 1738 uint16_t _els_recv_dsd_a3116; 1739 uint16_t _els_recv_dsd_a4732; 1740 uint16_t _els_recv_dsd_a6348; 1741 } out; 1742 } inout; 1743 #define els_bytecnt inout.in._els_bytecnt 1744 #define els_subcode1 inout.in._els_subcode1 1745 #define els_subcode2 inout.in._els_subcode2 1746 #define els_reserved4 inout.in._els_reserved4 1747 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1748 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1749 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1750 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1751 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1752 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1753 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1754 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1755 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1756 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1757 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1758 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1759 } els_t; 1760 1761 /* 1762 * A handy package structure for running FC-SCSI commands internally 1763 */ 1764 typedef struct { 1765 uint16_t handle; 1766 uint16_t lun; 1767 uint32_t 1768 channel : 8, 1769 portid : 24; 1770 uint32_t timeout; 1771 union { 1772 struct { 1773 uint32_t data_length; 1774 uint32_t 1775 no_wait : 1, 1776 do_read : 1; 1777 uint8_t cdb[16]; 1778 void *data_ptr; 1779 } beg; 1780 struct { 1781 uint32_t data_residual; 1782 uint8_t status; 1783 uint8_t pad; 1784 uint16_t sense_length; 1785 uint8_t sense_data[32]; 1786 } end; 1787 } fcd; 1788 } isp_xcmd_t; 1789 1790 /* 1791 * Target Mode related definitions 1792 */ 1793 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1794 #define QLTM_SVALID 0x80 1795 1796 /* 1797 * Structure for Enable Lun and Modify Lun queue entries 1798 */ 1799 typedef struct { 1800 isphdr_t le_header; 1801 uint32_t le_reserved; 1802 uint8_t le_lun; 1803 uint8_t le_rsvd; 1804 uint8_t le_ops; /* Modify LUN only */ 1805 uint8_t le_tgt; /* Not for FC */ 1806 uint32_t le_flags; /* Not for FC */ 1807 uint8_t le_status; 1808 uint8_t le_reserved2; 1809 uint8_t le_cmd_count; 1810 uint8_t le_in_count; 1811 uint8_t le_cdb6len; /* Not for FC */ 1812 uint8_t le_cdb7len; /* Not for FC */ 1813 uint16_t le_timeout; 1814 uint16_t le_reserved3[20]; 1815 } lun_entry_t; 1816 1817 /* 1818 * le_flags values 1819 */ 1820 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1821 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1822 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1823 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1824 1825 /* 1826 * le_ops values 1827 */ 1828 #define LUN_CCINCR 0x01 /* increment command count */ 1829 #define LUN_CCDECR 0x02 /* decrement command count */ 1830 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1831 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1832 1833 /* 1834 * le_status values 1835 */ 1836 #define LUN_OK 0x01 /* we be rockin' */ 1837 #define LUN_ERR 0x04 /* request completed with error */ 1838 #define LUN_INVAL 0x06 /* invalid request */ 1839 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1840 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1841 1842 /* 1843 * Immediate Notify Entry structure 1844 */ 1845 #define IN_MSGLEN 8 /* 8 bytes */ 1846 #define IN_RSVDLEN 8 /* 8 words */ 1847 typedef struct { 1848 isphdr_t in_header; 1849 uint32_t in_reserved; 1850 uint8_t in_lun; /* lun */ 1851 uint8_t in_iid; /* initiator */ 1852 uint8_t in_reserved2; 1853 uint8_t in_tgt; /* target */ 1854 uint32_t in_flags; 1855 uint8_t in_status; 1856 uint8_t in_rsvd2; 1857 uint8_t in_tag_val; /* tag value */ 1858 uint8_t in_tag_type; /* tag type */ 1859 uint16_t in_seqid; /* sequence id */ 1860 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1861 uint16_t in_reserved3[IN_RSVDLEN]; 1862 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1863 } in_entry_t; 1864 1865 typedef struct { 1866 isphdr_t in_header; 1867 uint32_t in_reserved; 1868 uint8_t in_lun; /* lun */ 1869 uint8_t in_iid; /* initiator */ 1870 uint16_t in_scclun; 1871 uint32_t in_reserved2; 1872 uint16_t in_status; 1873 uint16_t in_task_flags; 1874 uint16_t in_seqid; /* sequence id */ 1875 } in_fcentry_t; 1876 1877 typedef struct { 1878 isphdr_t in_header; 1879 uint32_t in_reserved; 1880 uint16_t in_iid; /* initiator */ 1881 uint16_t in_scclun; 1882 uint32_t in_reserved2; 1883 uint16_t in_status; 1884 uint16_t in_task_flags; 1885 uint16_t in_seqid; /* sequence id */ 1886 } in_fcentry_e_t; 1887 1888 /* 1889 * Values for the in_status field 1890 */ 1891 #define IN_REJECT 0x0D /* Message Reject message received */ 1892 #define IN_RESET 0x0E /* Bus Reset occurred */ 1893 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1894 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1895 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1896 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1897 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1898 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1899 #define IN_PORT_CHANGED 0x2A /* port changed */ 1900 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1901 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1902 #define IN_SRR_RCVD 0x45 /* SRR received */ 1903 1904 /* 1905 * Values for the in_task_flags field- should only get one at a time! 1906 */ 1907 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1908 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1909 #define TASK_FLAGS_TARGET_RESET (1<<13) 1910 #define TASK_FLAGS_LUN_RESET (1<<12) 1911 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1912 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1913 1914 /* 1915 * ISP24XX Immediate Notify 1916 */ 1917 typedef struct { 1918 isphdr_t in_header; 1919 uint32_t in_reserved; 1920 uint16_t in_nphdl; 1921 uint16_t in_reserved1; 1922 uint16_t in_flags; 1923 uint16_t in_srr_rxid; 1924 uint16_t in_status; 1925 uint8_t in_status_subcode; 1926 uint8_t in_fwhandle; 1927 uint32_t in_rxid; 1928 uint16_t in_srr_reloff_lo; 1929 uint16_t in_srr_reloff_hi; 1930 uint16_t in_srr_iu; 1931 uint16_t in_srr_oxid; 1932 /* 1933 * If bit 2 is set in in_flags, the N-Port and 1934 * handle tags are valid. If the received ELS is 1935 * a LOGO, then these tags contain the N Port ID 1936 * from the LOGO payload. If the received ELS 1937 * request is TPRLO, these tags contain the 1938 * Third Party Originator N Port ID. 1939 */ 1940 uint16_t in_nport_id_hi; 1941 #define in_prli_options in_nport_id_hi 1942 uint8_t in_nport_id_lo; 1943 uint8_t in_reserved3; 1944 uint16_t in_np_handle; 1945 uint8_t in_reserved4[12]; 1946 uint8_t in_reserved5; 1947 uint8_t in_vpidx; 1948 uint32_t in_reserved6; 1949 uint16_t in_portid_lo; 1950 uint8_t in_portid_hi; 1951 uint8_t in_reserved7; 1952 uint16_t in_reserved8; 1953 uint16_t in_oxid; 1954 } in_fcentry_24xx_t; 1955 1956 #define IN24XX_FLAG_PUREX_IOCB 0x1 1957 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1958 #define IN24XX_FLAG_NPHDL_VALID 0x4 1959 #define IN24XX_FLAG_N2N_PRLI 0x8 1960 #define IN24XX_FLAG_PN_NN_VALID 0x10 1961 1962 #define IN24XX_LIP_RESET 0x0E 1963 #define IN24XX_LINK_RESET 0x0F 1964 #define IN24XX_PORT_LOGOUT 0x29 1965 #define IN24XX_PORT_CHANGED 0x2A 1966 #define IN24XX_LINK_FAILED 0x2E 1967 #define IN24XX_SRR_RCVD 0x45 1968 #define IN24XX_ELS_RCVD 0x46 /* 1969 * login-affectin ELS received- check 1970 * subcode for specific opcode 1971 */ 1972 1973 /* 1974 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1975 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1976 * Big Endian format. 1977 */ 1978 #define IN24XX_PRLI_WWNN_OFF 0x18 1979 #define IN24XX_PRLI_WWPN_OFF 0x28 1980 #define IN24XX_PLOGI_WWNN_OFF 0x20 1981 #define IN24XX_PLOGI_WWPN_OFF 0x28 1982 1983 /* 1984 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1985 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1986 */ 1987 #define IN24XX_LOGO_WWPN_OFF 0x28 1988 1989 /* 1990 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1991 */ 1992 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1993 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1994 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1995 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1996 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1997 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1998 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1999 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 2000 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 2001 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 2002 2003 /* 2004 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 2005 */ 2006 #define IN24XX_PORT_CHANGED_BADFAN 0x00 2007 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 2008 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 2009 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 2010 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 2011 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 2012 2013 /* 2014 * Notify Acknowledge Entry structure 2015 */ 2016 #define NA_RSVDLEN 22 2017 typedef struct { 2018 isphdr_t na_header; 2019 uint32_t na_reserved; 2020 uint8_t na_lun; /* lun */ 2021 uint8_t na_iid; /* initiator */ 2022 uint8_t na_reserved2; 2023 uint8_t na_tgt; /* target */ 2024 uint32_t na_flags; 2025 uint8_t na_status; 2026 uint8_t na_event; 2027 uint16_t na_seqid; /* sequence id */ 2028 uint16_t na_reserved3[NA_RSVDLEN]; 2029 } na_entry_t; 2030 2031 /* 2032 * Value for the na_event field 2033 */ 2034 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 2035 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 2036 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 2037 2038 #define NA2_RSVDLEN 21 2039 typedef struct { 2040 isphdr_t na_header; 2041 uint32_t na_reserved; 2042 uint8_t na_reserved1; 2043 uint8_t na_iid; /* initiator loop id */ 2044 uint16_t na_response; 2045 uint16_t na_flags; 2046 uint16_t na_reserved2; 2047 uint16_t na_status; 2048 uint16_t na_task_flags; 2049 uint16_t na_seqid; /* sequence id */ 2050 uint16_t na_reserved3[NA2_RSVDLEN]; 2051 } na_fcentry_t; 2052 2053 typedef struct { 2054 isphdr_t na_header; 2055 uint32_t na_reserved; 2056 uint16_t na_iid; /* initiator loop id */ 2057 uint16_t na_response; /* response code */ 2058 uint16_t na_flags; 2059 uint16_t na_reserved2; 2060 uint16_t na_status; 2061 uint16_t na_task_flags; 2062 uint16_t na_seqid; /* sequence id */ 2063 uint16_t na_reserved3[NA2_RSVDLEN]; 2064 } na_fcentry_e_t; 2065 2066 #define NAFC_RCOUNT 0x80 /* increment resource count */ 2067 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 2068 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 2069 2070 /* 2071 * ISP24XX Notify Acknowledge 2072 */ 2073 2074 typedef struct { 2075 isphdr_t na_header; 2076 uint32_t na_handle; 2077 uint16_t na_nphdl; 2078 uint16_t na_reserved1; 2079 uint16_t na_flags; 2080 uint16_t na_srr_rxid; 2081 uint16_t na_status; 2082 uint8_t na_status_subcode; 2083 uint8_t na_fwhandle; 2084 uint32_t na_rxid; 2085 uint16_t na_srr_reloff_lo; 2086 uint16_t na_srr_reloff_hi; 2087 uint16_t na_srr_iu; 2088 uint16_t na_srr_flags; 2089 uint8_t na_reserved3[18]; 2090 uint8_t na_reserved4; 2091 uint8_t na_vpidx; 2092 uint8_t na_srr_reject_vunique; 2093 uint8_t na_srr_reject_explanation; 2094 uint8_t na_srr_reject_code; 2095 uint8_t na_reserved5; 2096 uint8_t na_reserved6[6]; 2097 uint16_t na_oxid; 2098 } na_fcentry_24xx_t; 2099 2100 /* 2101 * Accept Target I/O Entry structure 2102 */ 2103 #define ATIO_CDBLEN 26 2104 2105 typedef struct { 2106 isphdr_t at_header; 2107 uint16_t at_reserved; 2108 uint16_t at_handle; 2109 uint8_t at_lun; /* lun */ 2110 uint8_t at_iid; /* initiator */ 2111 uint8_t at_cdblen; /* cdb length */ 2112 uint8_t at_tgt; /* target */ 2113 uint32_t at_flags; 2114 uint8_t at_status; /* firmware status */ 2115 uint8_t at_scsi_status; /* scsi status */ 2116 uint8_t at_tag_val; /* tag value */ 2117 uint8_t at_tag_type; /* tag type */ 2118 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2119 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2120 } at_entry_t; 2121 2122 /* 2123 * at_flags values 2124 */ 2125 #define AT_NODISC 0x00008000 /* disconnect disabled */ 2126 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2127 2128 /* 2129 * at_status values 2130 */ 2131 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2132 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2133 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2134 #define AT_NOCAP 0x16 /* Requested capability not available */ 2135 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2136 #define AT_CDB 0x3D /* CDB received */ 2137 /* 2138 * Macros to create and fetch and test concatenated handle and tag value macros 2139 * (SPI only) 2140 */ 2141 #define AT_MAKE_TAGID(tid, aep) \ 2142 tid = aep->at_handle; \ 2143 if (aep->at_flags & AT_TQAE) { \ 2144 tid |= (aep->at_tag_val << 16); \ 2145 tid |= (1 << 24); \ 2146 } 2147 2148 #define CT_MAKE_TAGID(tid, ct) \ 2149 tid = ct->ct_fwhandle; \ 2150 if (ct->ct_flags & CT_TQAE) { \ 2151 tid |= (ct->ct_tag_val << 16); \ 2152 tid |= (1 << 24); \ 2153 } 2154 2155 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2156 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2157 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2158 2159 #define IN_MAKE_TAGID(tid, inp) \ 2160 tid = inp->in_seqid; \ 2161 tid |= (inp->in_tag_val << 16); \ 2162 tid |= (1 << 24) 2163 2164 /* 2165 * Accept Target I/O Entry structure, Type 2 2166 */ 2167 #define ATIO2_CDBLEN 16 2168 2169 typedef struct { 2170 isphdr_t at_header; 2171 uint32_t at_reserved; 2172 uint8_t at_lun; /* lun or reserved */ 2173 uint8_t at_iid; /* initiator */ 2174 uint16_t at_rxid; /* response ID */ 2175 uint16_t at_flags; 2176 uint16_t at_status; /* firmware status */ 2177 uint8_t at_crn; /* command reference number */ 2178 uint8_t at_taskcodes; 2179 uint8_t at_taskflags; 2180 uint8_t at_execodes; 2181 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2182 uint32_t at_datalen; /* allocated data len */ 2183 uint16_t at_scclun; /* SCC Lun or reserved */ 2184 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2185 uint16_t at_reserved2[6]; 2186 uint16_t at_oxid; 2187 } at2_entry_t; 2188 2189 typedef struct { 2190 isphdr_t at_header; 2191 uint32_t at_reserved; 2192 uint16_t at_iid; /* initiator */ 2193 uint16_t at_rxid; /* response ID */ 2194 uint16_t at_flags; 2195 uint16_t at_status; /* firmware status */ 2196 uint8_t at_crn; /* command reference number */ 2197 uint8_t at_taskcodes; 2198 uint8_t at_taskflags; 2199 uint8_t at_execodes; 2200 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2201 uint32_t at_datalen; /* allocated data len */ 2202 uint16_t at_scclun; /* SCC Lun or reserved */ 2203 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2204 uint16_t at_reserved2[6]; 2205 uint16_t at_oxid; 2206 } at2e_entry_t; 2207 2208 #define ATIO2_WWPN_OFFSET 0x2A 2209 #define ATIO2_OXID_OFFSET 0x3E 2210 2211 #define ATIO2_TC_ATTR_MASK 0x7 2212 #define ATIO2_TC_ATTR_SIMPLEQ 0 2213 #define ATIO2_TC_ATTR_HEADOFQ 1 2214 #define ATIO2_TC_ATTR_ORDERED 2 2215 #define ATIO2_TC_ATTR_ACAQ 4 2216 #define ATIO2_TC_ATTR_UNTAGGED 5 2217 2218 #define ATIO2_EX_WRITE 0x1 2219 #define ATIO2_EX_READ 0x2 2220 /* 2221 * Macros to create and fetch and test concatenated handle and tag value macros 2222 */ 2223 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2224 tid = aep->at_rxid; \ 2225 tid |= (((uint64_t)inst) << 32); \ 2226 tid |= (((uint64_t)bus) << 48) 2227 2228 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2229 tid = ct->ct_rxid; \ 2230 tid |= (((uint64_t)inst) << 32); \ 2231 tid |= (((uint64_t)(bus & 0xff)) << 48) 2232 2233 #define AT2_HAS_TAG(val) 1 2234 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2235 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2236 #define AT2_GET_HANDLE AT2_GET_TAG 2237 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2238 2239 #define FC_HAS_TAG AT2_HAS_TAG 2240 #define FC_GET_TAG AT2_GET_TAG 2241 #define FC_GET_INST AT2_GET_INST 2242 #define FC_GET_HANDLE AT2_GET_HANDLE 2243 2244 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2245 tid = seqid; \ 2246 tid |= (((uint64_t)inst) << 32); \ 2247 tid |= (((uint64_t)(bus & 0xff)) << 48) 2248 2249 #define FC_TAG_INSERT_INST(tid, inst) \ 2250 tid &= ~0x0000ffff00000000ull; \ 2251 tid |= (((uint64_t)inst) << 32) 2252 2253 /* 2254 * 24XX ATIO Definition 2255 * 2256 * This is *quite* different from other entry types. 2257 * First of all, it has its own queue it comes in on. 2258 * 2259 * Secondly, it doesn't have a normal header. 2260 * 2261 * Thirdly, it's just a passthru of the FCP CMND IU 2262 * which is recorded in big endian mode. 2263 */ 2264 typedef struct { 2265 uint8_t at_type; 2266 uint8_t at_count; 2267 /* 2268 * Task attribute in high four bits, 2269 * the rest is the FCP CMND IU Length. 2270 * NB: the command can extend past the 2271 * length for a single queue entry. 2272 */ 2273 uint16_t at_ta_len; 2274 uint32_t at_rxid; 2275 fc_hdr_t at_hdr; 2276 fcp_cmnd_iu_t at_cmnd; 2277 } at7_entry_t; 2278 #define AT7_NORESRC_RXID 0xffffffff 2279 2280 2281 /* 2282 * Continue Target I/O Entry structure 2283 * Request from driver. The response from the 2284 * ISP firmware is the same except that the last 18 2285 * bytes are overwritten by suggested sense data if 2286 * the 'autosense valid' bit is set in the status byte. 2287 */ 2288 typedef struct { 2289 isphdr_t ct_header; 2290 uint16_t ct_syshandle; 2291 uint16_t ct_fwhandle; /* required by f/w */ 2292 uint8_t ct_lun; /* lun */ 2293 uint8_t ct_iid; /* initiator id */ 2294 uint8_t ct_reserved2; 2295 uint8_t ct_tgt; /* our target id */ 2296 uint32_t ct_flags; 2297 uint8_t ct_status; /* isp status */ 2298 uint8_t ct_scsi_status; /* scsi status */ 2299 uint8_t ct_tag_val; /* tag value */ 2300 uint8_t ct_tag_type; /* tag type */ 2301 uint32_t ct_xfrlen; /* transfer length */ 2302 uint32_t ct_resid; /* residual length */ 2303 uint16_t ct_timeout; 2304 uint16_t ct_seg_count; 2305 ispds_t ct_dataseg[ISP_RQDSEG]; 2306 } ct_entry_t; 2307 2308 /* 2309 * For some of the dual port SCSI adapters, port (bus #) is reported 2310 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2311 * 2312 * Note that this does not apply to FC adapters at all which can and 2313 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2314 * that have logged in across a SCSI fabric. 2315 */ 2316 #define GET_IID_VAL(x) (x & 0x3f) 2317 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2318 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2319 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2320 2321 /* 2322 * ct_flags values 2323 */ 2324 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2325 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2326 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2327 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2328 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2329 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2330 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2331 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2332 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2333 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2334 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2335 2336 /* 2337 * ct_status values 2338 * - set by the firmware when it returns the CTIO 2339 */ 2340 #define CT_OK 0x01 /* completed without error */ 2341 #define CT_ABORTED 0x02 /* aborted by host */ 2342 #define CT_ERR 0x04 /* see sense data for error */ 2343 #define CT_INVAL 0x06 /* request for disabled lun */ 2344 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2345 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2346 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2347 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2348 #define CT_TIMEOUT 0x0B /* timed out */ 2349 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2350 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2351 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2352 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2353 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2354 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2355 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2356 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2357 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2358 #define CT_LOGOUT 0x29 /* port logout */ 2359 #define CT_PORTCHANGED 0x2A /* port changed */ 2360 #define CT_IDE 0x33 /* Initiator Detected Error */ 2361 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2362 #define CT_SRR 0x45 /* SRR Received */ 2363 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2364 2365 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2366 2367 /* 2368 * When the firmware returns a CTIO entry, it may overwrite the last 2369 * part of the structure with sense data. This starts at offset 0x2E 2370 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2371 * than define a new struct for this, I'm just using the sense data 2372 * offset. 2373 */ 2374 #define CTIO_SENSE_OFFSET 0x2E 2375 2376 /* 2377 * Entry length in u_longs. All entries are the same size so 2378 * any one will do as the numerator. 2379 */ 2380 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2381 2382 /* 2383 * QLA2100 CTIO (type 2) entry 2384 */ 2385 #define MAXRESPLEN 26 2386 typedef struct { 2387 isphdr_t ct_header; 2388 uint32_t ct_syshandle; 2389 uint8_t ct_lun; /* lun */ 2390 uint8_t ct_iid; /* initiator id */ 2391 uint16_t ct_rxid; /* response ID */ 2392 uint16_t ct_flags; 2393 uint16_t ct_status; /* isp status */ 2394 uint16_t ct_timeout; 2395 uint16_t ct_seg_count; 2396 uint32_t ct_reloff; /* relative offset */ 2397 uint32_t ct_resid; /* residual length */ 2398 union { 2399 /* 2400 * The three different modes that the target driver 2401 * can set the CTIO{2,3,4} up as. 2402 * 2403 * The first is for sending FCP_DATA_IUs as well as 2404 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2405 * 2406 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2407 * Note that no FCP_DATA_IUs will be sent. 2408 * 2409 * The third is for sending FCP_RSP_IUs as built specifically 2410 * in system memory as located by the isp_dataseg. 2411 */ 2412 struct { 2413 uint32_t _reserved; 2414 uint16_t _reserved2; 2415 uint16_t ct_scsi_status; 2416 uint32_t ct_xfrlen; 2417 union { 2418 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2419 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2420 ispdslist_t ct_dslist; 2421 } u; 2422 } m0; 2423 struct { 2424 uint16_t _reserved; 2425 uint16_t _reserved2; 2426 uint16_t ct_senselen; 2427 uint16_t ct_scsi_status; 2428 uint16_t ct_resplen; 2429 uint8_t ct_resp[MAXRESPLEN]; 2430 } m1; 2431 struct { 2432 uint32_t _reserved; 2433 uint16_t _reserved2; 2434 uint16_t _reserved3; 2435 uint32_t ct_datalen; 2436 union { 2437 ispds_t ct_fcp_rsp_iudata_32; 2438 ispds64_t ct_fcp_rsp_iudata_64; 2439 } u; 2440 } m2; 2441 } rsp; 2442 } ct2_entry_t; 2443 2444 typedef struct { 2445 isphdr_t ct_header; 2446 uint32_t ct_syshandle; 2447 uint16_t ct_iid; /* initiator id */ 2448 uint16_t ct_rxid; /* response ID */ 2449 uint16_t ct_flags; 2450 uint16_t ct_status; /* isp status */ 2451 uint16_t ct_timeout; 2452 uint16_t ct_seg_count; 2453 uint32_t ct_reloff; /* relative offset */ 2454 uint32_t ct_resid; /* residual length */ 2455 union { 2456 struct { 2457 uint32_t _reserved; 2458 uint16_t _reserved2; 2459 uint16_t ct_scsi_status; 2460 uint32_t ct_xfrlen; 2461 union { 2462 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2463 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2464 ispdslist_t ct_dslist; 2465 } u; 2466 } m0; 2467 struct { 2468 uint16_t _reserved; 2469 uint16_t _reserved2; 2470 uint16_t ct_senselen; 2471 uint16_t ct_scsi_status; 2472 uint16_t ct_resplen; 2473 uint8_t ct_resp[MAXRESPLEN]; 2474 } m1; 2475 struct { 2476 uint32_t _reserved; 2477 uint16_t _reserved2; 2478 uint16_t _reserved3; 2479 uint32_t ct_datalen; 2480 union { 2481 ispds_t ct_fcp_rsp_iudata_32; 2482 ispds64_t ct_fcp_rsp_iudata_64; 2483 } u; 2484 } m2; 2485 } rsp; 2486 } ct2e_entry_t; 2487 2488 /* 2489 * ct_flags values for CTIO2 2490 */ 2491 #define CT2_FLAG_MODE0 0x0000 2492 #define CT2_FLAG_MODE1 0x0001 2493 #define CT2_FLAG_MODE2 0x0002 2494 #define CT2_FLAG_MMASK 0x0003 2495 #define CT2_DATA_IN 0x0040 /* *to* initiator */ 2496 #define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2497 #define CT2_NO_DATA 0x00C0 2498 #define CT2_DATAMASK 0x00C0 2499 #define CT2_CCINCR 0x0100 2500 #define CT2_FASTPOST 0x0200 2501 #define CT2_CONFIRM 0x2000 2502 #define CT2_TERMINATE 0x4000 2503 #define CT2_SENDSTATUS 0x8000 2504 2505 /* 2506 * ct_status values are (mostly) the same as that for ct_entry. 2507 */ 2508 2509 /* 2510 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2511 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2512 * fields. 2513 */ 2514 #define CT2_RSPLEN_VALID 0x0100 2515 #define CT2_SNSLEN_VALID 0x0200 2516 #define CT2_DATA_OVER 0x0400 2517 #define CT2_DATA_UNDER 0x0800 2518 2519 /* 2520 * ISP24XX CTIO 2521 */ 2522 #define MAXRESPLEN_24XX 24 2523 typedef struct { 2524 isphdr_t ct_header; 2525 uint32_t ct_syshandle; 2526 uint16_t ct_nphdl; /* status on returned CTIOs */ 2527 uint16_t ct_timeout; 2528 uint16_t ct_seg_count; 2529 uint8_t ct_vpidx; 2530 uint8_t ct_xflags; 2531 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2532 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2533 uint8_t ct_reserved; 2534 uint32_t ct_rxid; 2535 uint16_t ct_senselen; /* mode 1 only */ 2536 uint16_t ct_flags; 2537 uint32_t ct_resid; /* residual length */ 2538 uint16_t ct_oxid; 2539 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2540 union { 2541 struct { 2542 uint32_t reloff; 2543 uint32_t reserved0; 2544 uint32_t ct_xfrlen; 2545 uint32_t reserved1; 2546 ispds64_t ds; 2547 } m0; 2548 struct { 2549 uint16_t ct_resplen; 2550 uint16_t reserved; 2551 uint8_t ct_resp[MAXRESPLEN_24XX]; 2552 } m1; 2553 struct { 2554 uint32_t reserved0; 2555 uint32_t reserved1; 2556 uint32_t ct_datalen; 2557 uint32_t reserved2; 2558 ispds64_t ct_fcp_rsp_iudata; 2559 } m2; 2560 } rsp; 2561 } ct7_entry_t; 2562 2563 /* 2564 * ct_flags values for CTIO7 2565 */ 2566 #define CT7_NO_DATA 0x0000 2567 #define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2568 #define CT7_DATA_IN 0x0002 /* *to* initiator */ 2569 #define CT7_DATAMASK 0x3 2570 #define CT7_DSD_ENABLE 0x0004 2571 #define CT7_CONF_STSFD 0x0010 2572 #define CT7_EXPLCT_CONF 0x0020 2573 #define CT7_FLAG_MODE0 0x0000 2574 #define CT7_FLAG_MODE1 0x0040 2575 #define CT7_FLAG_MODE2 0x0080 2576 #define CT7_FLAG_MMASK 0x00C0 2577 #define CT7_NOACK 0x0100 2578 #define CT7_TASK_ATTR_SHIFT 9 2579 #define CT7_CONFIRM 0x2000 2580 #define CT7_TERMINATE 0x4000 2581 #define CT7_SENDSTATUS 0x8000 2582 2583 /* 2584 * Type 7 CTIO status codes 2585 */ 2586 #define CT7_OK 0x01 /* completed without error */ 2587 #define CT7_ABORTED 0x02 /* aborted by host */ 2588 #define CT7_ERR 0x04 /* see sense data for error */ 2589 #define CT7_INVAL 0x06 /* request for disabled lun */ 2590 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2591 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2592 #define CT7_TIMEOUT 0x0B /* timed out */ 2593 #define CT7_RESET 0x0E /* LIP Rset Received */ 2594 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2595 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2596 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2597 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2598 #define CT7_LOGOUT 0x29 /* port logout */ 2599 #define CT7_PORTCHANGED 0x2A /* port changed */ 2600 #define CT7_SRR 0x45 /* SRR Received */ 2601 2602 /* 2603 * Other 24XX related target IOCBs 2604 */ 2605 2606 /* 2607 * ABTS Received 2608 */ 2609 typedef struct { 2610 isphdr_t abts_header; 2611 uint8_t abts_reserved0[6]; 2612 uint16_t abts_nphdl; 2613 uint16_t abts_reserved1; 2614 uint16_t abts_sof; 2615 uint32_t abts_rxid_abts; 2616 uint16_t abts_did_lo; 2617 uint8_t abts_did_hi; 2618 uint8_t abts_r_ctl; 2619 uint16_t abts_sid_lo; 2620 uint8_t abts_sid_hi; 2621 uint8_t abts_cs_ctl; 2622 uint16_t abts_fs_ctl; 2623 uint8_t abts_f_ctl; 2624 uint8_t abts_type; 2625 uint16_t abts_seq_cnt; 2626 uint8_t abts_df_ctl; 2627 uint8_t abts_seq_id; 2628 uint16_t abts_rx_id; 2629 uint16_t abts_ox_id; 2630 uint32_t abts_param; 2631 uint8_t abts_reserved2[16]; 2632 uint32_t abts_rxid_task; 2633 } abts_t; 2634 2635 typedef struct { 2636 isphdr_t abts_rsp_header; 2637 uint32_t abts_rsp_handle; 2638 uint16_t abts_rsp_status; 2639 uint16_t abts_rsp_nphdl; 2640 uint16_t abts_rsp_ctl_flags; 2641 uint16_t abts_rsp_sof; 2642 uint32_t abts_rsp_rxid_abts; 2643 uint16_t abts_rsp_did_lo; 2644 uint8_t abts_rsp_did_hi; 2645 uint8_t abts_rsp_r_ctl; 2646 uint16_t abts_rsp_sid_lo; 2647 uint8_t abts_rsp_sid_hi; 2648 uint8_t abts_rsp_cs_ctl; 2649 uint16_t abts_rsp_f_ctl_lo; 2650 uint8_t abts_rsp_f_ctl_hi; 2651 uint8_t abts_rsp_type; 2652 uint16_t abts_rsp_seq_cnt; 2653 uint8_t abts_rsp_df_ctl; 2654 uint8_t abts_rsp_seq_id; 2655 uint16_t abts_rsp_rx_id; 2656 uint16_t abts_rsp_ox_id; 2657 uint32_t abts_rsp_param; 2658 union { 2659 struct { 2660 uint16_t reserved; 2661 uint8_t last_seq_id; 2662 uint8_t seq_id_valid; 2663 uint16_t aborted_rx_id; 2664 uint16_t aborted_ox_id; 2665 uint16_t high_seq_cnt; 2666 uint16_t low_seq_cnt; 2667 uint8_t reserved2[4]; 2668 } ba_acc; 2669 struct { 2670 uint8_t vendor_unique; 2671 uint8_t explanation; 2672 uint8_t reason; 2673 uint8_t reserved; 2674 uint8_t reserved2[12]; 2675 } ba_rjt; 2676 struct { 2677 uint8_t reserved[8]; 2678 uint32_t subcode1; 2679 uint32_t subcode2; 2680 } rsp; 2681 uint8_t reserved[16]; 2682 } abts_rsp_payload; 2683 uint32_t abts_rsp_rxid_task; 2684 } abts_rsp_t; 2685 2686 /* terminate this ABTS exchange */ 2687 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2688 2689 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2690 #define ISP24XX_ABTS_RSP_RESET 0x04 2691 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2692 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2693 #define ISP24XX_ABTS_RSP_INVXID 0x08 2694 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2695 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2696 2697 #define ISP24XX_NO_TASK 0xffffffff 2698 2699 /* 2700 * Miscellaneous 2701 * 2702 * These are the limits of the number of dma segments we 2703 * can deal with based not on the size of the segment counter 2704 * (which is 16 bits), but on the size of the number of 2705 * queue entries field (which is 8 bits). We assume no 2706 * segments in the first queue entry, so we can either 2707 * have 7 dma segments per continuation entry or 5 2708 * (for 64 bit dma).. multiplying out by 254.... 2709 */ 2710 #define ISP_NSEG_MAX 1778 2711 #define ISP_NSEG64_MAX 1270 2712 2713 #endif /* _ISPMBOX_H */ 2714