1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 2009-2017 Alexander Motin <mav@FreeBSD.org> 4 * Copyright (c) 1997-2009 by Matthew Jacob 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30 31 /* 32 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 33 */ 34 #ifndef _ISPMBOX_H 35 #define _ISPMBOX_H 36 37 /* 38 * Mailbox Command Opcodes 39 */ 40 #define MBOX_NO_OP 0x0000 41 #define MBOX_LOAD_RAM 0x0001 42 #define MBOX_EXEC_FIRMWARE 0x0002 43 #define MBOX_DUMP_RAM 0x0003 44 #define MBOX_WRITE_RAM_WORD 0x0004 45 #define MBOX_READ_RAM_WORD 0x0005 46 #define MBOX_MAILBOX_REG_TEST 0x0006 47 #define MBOX_VERIFY_CHECKSUM 0x0007 48 #define MBOX_ABOUT_FIRMWARE 0x0008 49 #define MBOX_LOAD_RISC_RAM_2100 0x0009 50 /* a */ 51 #define MBOX_LOAD_RISC_RAM 0x000b 52 #define MBOX_DUMP_RISC_RAM 0x000c 53 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 54 #define MBOX_CHECK_FIRMWARE 0x000e 55 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 56 #define MBOX_INIT_REQ_QUEUE 0x0010 57 #define MBOX_INIT_RES_QUEUE 0x0011 58 #define MBOX_EXECUTE_IOCB 0x0012 59 #define MBOX_WAKE_UP 0x0013 60 #define MBOX_STOP_FIRMWARE 0x0014 61 #define MBOX_ABORT 0x0015 62 #define MBOX_ABORT_DEVICE 0x0016 63 #define MBOX_ABORT_TARGET 0x0017 64 #define MBOX_BUS_RESET 0x0018 65 #define MBOX_STOP_QUEUE 0x0019 66 #define MBOX_START_QUEUE 0x001a 67 #define MBOX_SINGLE_STEP_QUEUE 0x001b 68 #define MBOX_ABORT_QUEUE 0x001c 69 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 70 /* 1e */ 71 #define MBOX_GET_FIRMWARE_STATUS 0x001f 72 #define MBOX_GET_INIT_SCSI_ID 0x0020 73 #define MBOX_GET_SELECT_TIMEOUT 0x0021 74 #define MBOX_GET_RETRY_COUNT 0x0022 75 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 76 #define MBOX_GET_CLOCK_RATE 0x0024 77 #define MBOX_GET_ACT_NEG_STATE 0x0025 78 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 79 #define MBOX_GET_SBUS_PARAMS 0x0027 80 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 81 #define MBOX_GET_TARGET_PARAMS 0x0028 82 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 83 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 84 /* 2b */ 85 /* 2c */ 86 /* 2d */ 87 /* 2e */ 88 /* 2f */ 89 #define MBOX_SET_INIT_SCSI_ID 0x0030 90 #define MBOX_SET_SELECT_TIMEOUT 0x0031 91 #define MBOX_SET_RETRY_COUNT 0x0032 92 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 93 #define MBOX_SET_CLOCK_RATE 0x0034 94 #define MBOX_SET_ACT_NEG_STATE 0x0035 95 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 96 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 97 #define MBOX_SET_PCI_PARAMETERS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 #define MBOX_SET_FW_FEATURES 0x004a 110 #define MBOX_GET_FW_FEATURES 0x004b 111 #define FW_FEATURE_FAST_POST 0x1 112 #define FW_FEATURE_LVD_NOTIFY 0x2 113 #define FW_FEATURE_RIO_32BIT 0x4 114 #define FW_FEATURE_RIO_16BIT 0x8 115 116 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 117 #define MBOX_INIT_RES_QUEUE_A64 0x0053 118 119 #define MBOX_ENABLE_TARGET_MODE 0x0055 120 #define ENABLE_TARGET_FLAG 0x8000 121 #define ENABLE_TQING_FLAG 0x0004 122 #define ENABLE_MANDATORY_DISC 0x0002 123 #define MBOX_GET_TARGET_STATUS 0x0056 124 125 /* These are for the ISP2X00 FC cards */ 126 #define MBOX_LOAD_FLASH_FIRMWARE 0x0003 127 #define MBOX_WRITE_FC_SERDES_REG 0x0003 /* FC only */ 128 #define MBOX_READ_FC_SERDES_REG 0x0004 /* FC only */ 129 #define MBOX_GET_IO_STATUS 0x0012 130 #define MBOX_SET_TRANSMIT_PARAMS 0x0019 131 #define MBOX_SET_PORT_PARAMS 0x001a 132 #define MBOX_LOAD_OP_FW_PARAMS 0x001b 133 #define MBOX_INIT_MULTIPLE_QUEUE 0x001f 134 #define MBOX_GET_LOOP_ID 0x0020 135 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 136 #define ISP24XX_INORDER 0x0100 137 #define ISP24XX_NPIV_SAN 0x0400 138 #define ISP24XX_VSAN_SAN 0x1000 139 #define ISP24XX_FC_SP_SAN 0x2000 140 #define MBOX_GET_TIMEOUT_PARAMS 0x0022 141 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 142 #define MBOX_GENERATE_SYSTEM_ERROR 0x002a 143 #define MBOX_WRITE_SFP 0x0030 144 #define MBOX_READ_SFP 0x0031 145 #define MBOX_SET_TIMEOUT_PARAMS 0x0032 146 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 147 #define MBOX_GET_SET_FC_LED_CONF 0x003b 148 #define MBOX_RESTART_NIC_FIRMWARE 0x003d /* FCoE only */ 149 #define MBOX_ACCESS_CONTROL 0x003e 150 #define MBOX_LOOP_PORT_BYPASS 0x0040 /* FC only */ 151 #define MBOX_LOOP_PORT_ENABLE 0x0041 /* FC only */ 152 #define MBOX_GET_RESOURCE_COUNT 0x0042 153 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 154 #define MBOX_DIAGNOSTIC_ECHO_TEST 0x0044 155 #define MBOX_DIAGNOSTIC_LOOPBACK 0x0045 156 #define MBOX_ENHANCED_GET_PDB 0x0047 157 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 158 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 159 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 160 #define MBOX_GET_FCF_LIST 0x0050 /* FCoE only */ 161 #define MBOX_GET_DCBX_PARAMETERS 0x0051 /* FCoE only */ 162 #define MBOX_HOST_MEMORY_COPY 0x0053 163 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 164 #define MBOX_SEND_RNID 0x0057 165 #define MBOX_SET_PARAMETERS 0x0059 166 #define MBOX_GET_PARAMETERS 0x005a 167 #define MBOX_DRIVER_HEARTBEAT 0x005B /* FC only */ 168 #define MBOX_FW_HEARTBEAT 0x005C 169 #define MBOX_GET_SET_DATA_RATE 0x005D /* >=23XX only */ 170 #define MBGSD_GET_RATE 0 171 #define MBGSD_SET_RATE 1 172 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 173 #define MBGSD_1GB 0x00 174 #define MBGSD_2GB 0x01 175 #define MBGSD_AUTO 0x02 176 #define MBGSD_4GB 0x03 /* 24XX only */ 177 #define MBGSD_8GB 0x04 /* 25XX only */ 178 #define MBGSD_16GB 0x05 /* 26XX only */ 179 #define MBGSD_10GB 0x13 /* 26XX only */ 180 #define MBOX_SEND_RNFT 0x005e 181 #define MBOX_INIT_FIRMWARE 0x0060 182 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 183 #define MBOX_INIT_LIP 0x0062 184 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 185 #define MBOX_GET_PORT_DB 0x0064 186 #define MBOX_CLEAR_ACA 0x0065 187 #define MBOX_TARGET_RESET 0x0066 188 #define MBOX_CLEAR_TASK_SET 0x0067 189 #define MBOX_ABORT_TASK_SET 0x0068 190 #define MBOX_GET_FW_STATE 0x0069 191 #define MBOX_GET_PORT_NAME 0x006A 192 #define MBOX_GET_LINK_STATUS 0x006B 193 #define MBOX_INIT_LIP_RESET 0x006C 194 #define MBOX_GET_LINK_STAT_PR_DATA_CNT 0x006D 195 #define MBOX_SEND_SNS 0x006E 196 #define MBOX_FABRIC_LOGIN 0x006F 197 #define MBOX_SEND_CHANGE_REQUEST 0x0070 198 #define MBOX_FABRIC_LOGOUT 0x0071 199 #define MBOX_INIT_LIP_LOGIN 0x0072 200 #define MBOX_GET_PORT_NODE_NAME_LIST 0x0075 201 #define MBOX_SET_VENDOR_ID 0x0076 202 #define MBOX_GET_XGMAC_STATS 0x007a 203 #define MBOX_GET_ID_LIST 0x007C 204 #define MBOX_SEND_LFA 0x007d 205 #define MBOX_LUN_RESET 0x007E 206 207 #define ISP2100_SET_PCI_PARAM 0x00ff 208 209 #define MBOX_BUSY 0x04 210 211 /* 212 * Mailbox Command Complete Status Codes 213 */ 214 #define MBOX_COMMAND_COMPLETE 0x4000 215 #define MBOX_INVALID_COMMAND 0x4001 216 #define MBOX_HOST_INTERFACE_ERROR 0x4002 217 #define MBOX_TEST_FAILED 0x4003 218 #define MBOX_COMMAND_ERROR 0x4005 219 #define MBOX_COMMAND_PARAM_ERROR 0x4006 220 #define MBOX_PORT_ID_USED 0x4007 221 #define MBOX_LOOP_ID_USED 0x4008 222 #define MBOX_ALL_IDS_USED 0x4009 223 #define MBOX_NOT_LOGGED_IN 0x400A 224 #define MBOX_LINK_DOWN_ERROR 0x400B 225 #define MBOX_LOOPBACK_ERROR 0x400C 226 #define MBOX_CHECKSUM_ERROR 0x4010 227 #define MBOX_INVALID_PRODUCT_KEY 0x4020 228 /* pseudo mailbox completion codes */ 229 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 230 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 231 232 #define MBLOGALL 0xffffffff 233 #define MBLOGNONE 0x00000000 234 #define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f)) 235 236 /* 237 * Asynchronous event status codes 238 */ 239 #define ASYNC_BUS_RESET 0x8001 240 #define ASYNC_SYSTEM_ERROR 0x8002 241 #define ASYNC_RQS_XFER_ERR 0x8003 242 #define ASYNC_RSP_XFER_ERR 0x8004 243 #define ASYNC_QWAKEUP 0x8005 244 #define ASYNC_TIMEOUT_RESET 0x8006 245 #define ASYNC_DEVICE_RESET 0x8007 246 #define ASYNC_EXTMSG_UNDERRUN 0x800A 247 #define ASYNC_SCAM_INT 0x800B 248 #define ASYNC_HUNG_SCSI 0x800C 249 #define ASYNC_KILLED_BUS 0x800D 250 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 251 #define ASYNC_LIP_OCCURRED 0x8010 /* FC only */ 252 #define ASYNC_LOOP_UP 0x8011 253 #define ASYNC_LOOP_DOWN 0x8012 254 #define ASYNC_LOOP_RESET 0x8013 /* FC only */ 255 #define ASYNC_PDB_CHANGED 0x8014 256 #define ASYNC_CHANGE_NOTIFY 0x8015 257 #define ASYNC_LIP_NOS_OLS_RECV 0x8016 /* FC only */ 258 #define ASYNC_LIP_ERROR 0x8017 /* FC only */ 259 #define ASYNC_AUTO_PLOGI_RJT 0x8018 260 #define ASYNC_SECURITY_UPDATE 0x801B 261 #define ASYNC_CMD_CMPLT 0x8020 262 #define ASYNC_CTIO_DONE 0x8021 263 #define ASYNC_RIO32_1 0x8021 264 #define ASYNC_RIO32_2 0x8022 265 #define ASYNC_IP_XMIT_DONE 0x8022 266 #define ASYNC_IP_RECV_DONE 0x8023 267 #define ASYNC_IP_BROADCAST 0x8024 268 #define ASYNC_IP_RCVQ_LOW 0x8025 269 #define ASYNC_IP_RCVQ_EMPTY 0x8026 270 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 271 #define ASYNC_ERR_LOGGING_DISABLED 0x8029 272 #define ASYNC_PTPMODE 0x8030 /* FC only */ 273 #define ASYNC_RIO16_1 0x8031 274 #define ASYNC_RIO16_2 0x8032 275 #define ASYNC_RIO16_3 0x8033 276 #define ASYNC_RIO16_4 0x8034 277 #define ASYNC_RIO16_5 0x8035 278 #define ASYNC_CONNMODE 0x8036 279 #define ISP_CONN_LOOP 1 280 #define ISP_CONN_PTP 2 281 #define ISP_CONN_BADLIP 3 282 #define ISP_CONN_FATAL 4 283 #define ISP_CONN_LOOPBACK 5 284 #define ASYNC_P2P_INIT_ERR 0x8037 285 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 286 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 287 #define ASYNC_RCV_ERR 0x8048 288 /* 289 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 290 * mailbox command to enable this. 291 */ 292 #define ASYNC_QFULL_SENT 0x8049 293 #define ASYNC_RJT_SENT 0x8049 /* 24XX only */ 294 #define ASYNC_SEL_CLASS2_P_RJT_SENT 0x804f 295 #define ASYNC_FW_RESTART_COMPLETE 0x8060 296 #define ASYNC_TEMPERATURE_ALERT 0x8070 297 #define ASYNC_INTER_DRIVER_COMP 0x8100 /* FCoE only */ 298 #define ASYNC_INTER_DRIVER_NOTIFY 0x8101 /* FCoE only */ 299 #define ASYNC_INTER_DRIVER_TIME_EXT 0x8102 /* FCoE only */ 300 #define ASYNC_NIC_FW_STATE_CHANGE 0x8200 /* FCoE only */ 301 #define ASYNC_AUTOLOAD_FW_COMPLETE 0x8400 302 #define ASYNC_AUTOLOAD_FW_FAILURE 0x8401 303 304 /* 305 * Firmware Options. There are a lot of them. 306 * 307 * IFCOPTN - ISP Fibre Channel Option Word N 308 */ 309 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 310 #define IFCOPT1_EAABSRCVD (1 << 12) 311 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 312 #define IFCOPT1_ENAPURE (1 << 10) 313 #define IFCOPT1_ENA8017 (1 << 7) 314 #define IFCOPT1_DISGPIO67 (1 << 6) 315 #define IFCOPT1_LIPLOSSIMM (1 << 5) 316 #define IFCOPT1_DISF7SWTCH (1 << 4) 317 #define IFCOPT1_CTIO_RETRY (1 << 3) 318 #define IFCOPT1_LIPASYNC (1 << 1) 319 #define IFCOPT1_LIPF8 (1 << 0) 320 321 #define IFCOPT2_LOOPBACK (1 << 1) 322 #define IFCOPT2_ATIO3_ONLY (1 << 0) 323 324 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 325 #define IFCOPT3_RNDASYNC (1 << 1) 326 327 /* 328 * All IOCB Queue entries are this size 329 */ 330 #define QENTRY_LEN 64 331 332 /* 333 * Command Structure Definitions 334 */ 335 336 typedef struct { 337 uint32_t ds_base; 338 uint32_t ds_count; 339 } ispds_t; 340 341 typedef struct { 342 uint32_t ds_base; 343 uint32_t ds_basehi; 344 uint32_t ds_count; 345 } ispds64_t; 346 347 #define DSTYPE_32BIT 0 348 #define DSTYPE_64BIT 1 349 typedef struct { 350 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 351 uint32_t ds_segment; /* unused */ 352 uint32_t ds_base; /* 32 bit address of DSD list */ 353 } ispdslist_t; 354 355 356 typedef struct { 357 uint8_t rqs_entry_type; 358 uint8_t rqs_entry_count; 359 uint8_t rqs_seqno; 360 uint8_t rqs_flags; 361 } isphdr_t; 362 363 /* RQS Flag definitions */ 364 #define RQSFLAG_CONTINUATION 0x01 365 #define RQSFLAG_FULL 0x02 366 #define RQSFLAG_BADHEADER 0x04 367 #define RQSFLAG_BADPACKET 0x08 368 #define RQSFLAG_BADCOUNT 0x10 369 #define RQSFLAG_BADORDER 0x20 370 #define RQSFLAG_MASK 0x3f 371 372 /* RQS entry_type definitions */ 373 #define RQSTYPE_REQUEST 0x01 374 #define RQSTYPE_DATASEG 0x02 375 #define RQSTYPE_RESPONSE 0x03 376 #define RQSTYPE_MARKER 0x04 377 #define RQSTYPE_CMDONLY 0x05 378 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 379 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 380 #define RQSTYPE_SCAM 0x08 381 #define RQSTYPE_A64 0x09 382 #define RQSTYPE_A64_CONT 0x0a 383 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 384 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 385 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 386 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 387 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 388 #define RQSTYPE_STATUS_CONT 0x10 389 #define RQSTYPE_T2RQS 0x11 390 #define RQSTYPE_CTIO7 0x12 391 #define RQSTYPE_IP_XMIT 0x13 392 #define RQSTYPE_TSK_MGMT 0x14 393 #define RQSTYPE_T4RQS 0x15 394 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 395 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 396 #define RQSTYPE_T7RQS 0x18 397 #define RQSTYPE_T3RQS 0x19 398 #define RQSTYPE_IP_XMIT_64 0x1b 399 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 400 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 401 #define RQSTYPE_RIO1 0x21 402 #define RQSTYPE_RIO2 0x22 403 #define RQSTYPE_IP_RECV 0x23 404 #define RQSTYPE_IP_RECV_CONT 0x24 405 #define RQSTYPE_CT_PASSTHRU 0x29 406 #define RQSTYPE_MS_PASSTHRU 0x29 407 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 408 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 409 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 410 #define RQSTYPE_ABORT_IO 0x33 411 #define RQSTYPE_T6RQS 0x48 412 #define RQSTYPE_LOGIN 0x52 413 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 414 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 415 416 417 #define ISP_RQDSEG 4 418 typedef struct { 419 isphdr_t req_header; 420 uint32_t req_handle; 421 uint8_t req_lun_trn; 422 uint8_t req_target; 423 uint16_t req_cdblen; 424 uint16_t req_flags; 425 uint16_t req_reserved; 426 uint16_t req_time; 427 uint16_t req_seg_count; 428 uint8_t req_cdb[12]; 429 ispds_t req_dataseg[ISP_RQDSEG]; 430 } ispreq_t; 431 #define ISP_RQDSEG_A64 2 432 433 typedef struct { 434 isphdr_t mrk_header; 435 uint32_t mrk_handle; 436 uint8_t mrk_reserved0; 437 uint8_t mrk_target; 438 uint16_t mrk_modifier; 439 uint16_t mrk_flags; 440 uint16_t mrk_lun; 441 uint8_t mrk_reserved1[48]; 442 } isp_marker_t; 443 444 typedef struct { 445 isphdr_t mrk_header; 446 uint32_t mrk_handle; 447 uint16_t mrk_nphdl; 448 uint8_t mrk_modifier; 449 uint8_t mrk_reserved0; 450 uint8_t mrk_reserved1; 451 uint8_t mrk_vphdl; 452 uint16_t mrk_reserved2; 453 uint8_t mrk_lun[8]; 454 uint8_t mrk_reserved3[40]; 455 } isp_marker_24xx_t; 456 457 458 #define SYNC_DEVICE 0 459 #define SYNC_TARGET 1 460 #define SYNC_ALL 2 461 #define SYNC_LIP 3 462 463 #define ISP_RQDSEG_T2 3 464 typedef struct { 465 isphdr_t req_header; 466 uint32_t req_handle; 467 uint8_t req_lun_trn; 468 uint8_t req_target; 469 uint16_t req_scclun; 470 uint16_t req_flags; 471 uint8_t req_crn; 472 uint8_t req_reserved; 473 uint16_t req_time; 474 uint16_t req_seg_count; 475 uint8_t req_cdb[16]; 476 uint32_t req_totalcnt; 477 ispds_t req_dataseg[ISP_RQDSEG_T2]; 478 } ispreqt2_t; 479 480 typedef struct { 481 isphdr_t req_header; 482 uint32_t req_handle; 483 uint16_t req_target; 484 uint16_t req_scclun; 485 uint16_t req_flags; 486 uint8_t req_crn; 487 uint8_t req_reserved; 488 uint16_t req_time; 489 uint16_t req_seg_count; 490 uint8_t req_cdb[16]; 491 uint32_t req_totalcnt; 492 ispds_t req_dataseg[ISP_RQDSEG_T2]; 493 } ispreqt2e_t; 494 495 #define ISP_RQDSEG_T3 2 496 typedef struct { 497 isphdr_t req_header; 498 uint32_t req_handle; 499 uint8_t req_lun_trn; 500 uint8_t req_target; 501 uint16_t req_scclun; 502 uint16_t req_flags; 503 uint8_t req_crn; 504 uint8_t req_reserved; 505 uint16_t req_time; 506 uint16_t req_seg_count; 507 uint8_t req_cdb[16]; 508 uint32_t req_totalcnt; 509 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 510 } ispreqt3_t; 511 #define ispreq64_t ispreqt3_t /* same as.... */ 512 513 typedef struct { 514 isphdr_t req_header; 515 uint32_t req_handle; 516 uint16_t req_target; 517 uint16_t req_scclun; 518 uint16_t req_flags; 519 uint8_t req_crn; 520 uint8_t req_reserved; 521 uint16_t req_time; 522 uint16_t req_seg_count; 523 uint8_t req_cdb[16]; 524 uint32_t req_totalcnt; 525 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 526 } ispreqt3e_t; 527 528 /* req_flag values */ 529 #define REQFLAG_NODISCON 0x0001 530 #define REQFLAG_HTAG 0x0002 531 #define REQFLAG_OTAG 0x0004 532 #define REQFLAG_STAG 0x0008 533 #define REQFLAG_TARGET_RTN 0x0010 534 535 #define REQFLAG_NODATA 0x0000 536 #define REQFLAG_DATA_IN 0x0020 537 #define REQFLAG_DATA_OUT 0x0040 538 #define REQFLAG_DATA_UNKNOWN 0x0060 539 540 #define REQFLAG_DISARQ 0x0100 541 #define REQFLAG_FRC_ASYNC 0x0200 542 #define REQFLAG_FRC_SYNC 0x0400 543 #define REQFLAG_FRC_WIDE 0x0800 544 #define REQFLAG_NOPARITY 0x1000 545 #define REQFLAG_STOPQ 0x2000 546 #define REQFLAG_XTRASNS 0x4000 547 #define REQFLAG_PRIORITY 0x8000 548 549 typedef struct { 550 isphdr_t req_header; 551 uint32_t req_handle; 552 uint8_t req_lun_trn; 553 uint8_t req_target; 554 uint16_t req_cdblen; 555 uint16_t req_flags; 556 uint16_t req_reserved; 557 uint16_t req_time; 558 uint16_t req_seg_count; 559 uint8_t req_cdb[44]; 560 } ispextreq_t; 561 562 563 /* 564 * ISP24XX structures 565 */ 566 typedef struct { 567 isphdr_t req_header; 568 uint32_t req_handle; 569 uint16_t req_nphdl; 570 uint16_t req_time; 571 uint16_t req_seg_count; 572 uint16_t req_reserved; 573 uint8_t req_lun[8]; 574 uint8_t req_alen_datadir; 575 uint8_t req_task_management; 576 uint8_t req_task_attribute; 577 uint8_t req_crn; 578 uint8_t req_cdb[16]; 579 uint32_t req_dl; 580 uint16_t req_tidlo; 581 uint8_t req_tidhi; 582 uint8_t req_vpidx; 583 ispds64_t req_dataseg; 584 } ispreqt7_t; 585 586 /* Task Management Request Function */ 587 typedef struct { 588 isphdr_t tmf_header; 589 uint32_t tmf_handle; 590 uint16_t tmf_nphdl; 591 uint8_t tmf_reserved0[2]; 592 uint16_t tmf_delay; 593 uint16_t tmf_timeout; 594 uint8_t tmf_lun[8]; 595 uint32_t tmf_flags; 596 uint8_t tmf_reserved1[20]; 597 uint16_t tmf_tidlo; 598 uint8_t tmf_tidhi; 599 uint8_t tmf_vpidx; 600 uint8_t tmf_reserved2[12]; 601 } isp24xx_tmf_t; 602 603 #define ISP24XX_TMF_NOSEND 0x80000000 604 605 #define ISP24XX_TMF_LUN_RESET 0x00000010 606 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 607 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 608 #define ISP24XX_TMF_TARGET_RESET 0x00000002 609 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 610 611 /* I/O Abort Structure */ 612 typedef struct { 613 isphdr_t abrt_header; 614 uint32_t abrt_handle; 615 uint16_t abrt_nphdl; 616 uint16_t abrt_options; 617 uint32_t abrt_cmd_handle; 618 uint16_t abrt_queue_number; 619 uint8_t abrt_reserved[30]; 620 uint16_t abrt_tidlo; 621 uint8_t abrt_tidhi; 622 uint8_t abrt_vpidx; 623 uint8_t abrt_reserved1[12]; 624 } isp24xx_abrt_t; 625 626 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 627 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 628 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 629 630 #define ISP_CDSEG 7 631 typedef struct { 632 isphdr_t req_header; 633 uint32_t req_reserved; 634 ispds_t req_dataseg[ISP_CDSEG]; 635 } ispcontreq_t; 636 637 #define ISP_CDSEG64 5 638 typedef struct { 639 isphdr_t req_header; 640 ispds64_t req_dataseg[ISP_CDSEG64]; 641 } ispcontreq64_t; 642 643 typedef struct { 644 isphdr_t req_header; 645 uint32_t req_handle; 646 uint16_t req_scsi_status; 647 uint16_t req_completion_status; 648 uint16_t req_state_flags; 649 uint16_t req_status_flags; 650 uint16_t req_time; 651 #define req_response_len req_time /* FC only */ 652 uint16_t req_sense_len; 653 uint32_t req_resid; 654 uint8_t req_response[8]; /* FC only */ 655 uint8_t req_sense_data[32]; 656 } ispstatusreq_t; 657 658 /* 659 * Status Continuation 660 */ 661 typedef struct { 662 isphdr_t req_header; 663 uint8_t req_sense_data[60]; 664 } ispstatus_cont_t; 665 666 /* 667 * 24XX Type 0 status 668 */ 669 typedef struct { 670 isphdr_t req_header; 671 uint32_t req_handle; 672 uint16_t req_completion_status; 673 uint16_t req_oxid; 674 uint32_t req_resid; 675 uint16_t req_reserved0; 676 uint16_t req_state_flags; 677 uint16_t req_retry_delay; /* aka Status Qualifier */ 678 uint16_t req_scsi_status; 679 uint32_t req_fcp_residual; 680 uint32_t req_sense_len; 681 uint32_t req_response_len; 682 uint8_t req_rsp_sense[28]; 683 } isp24xx_statusreq_t; 684 685 /* 686 * For Qlogic 2X00, the high order byte of SCSI status has 687 * additional meaning. 688 */ 689 #define RQCS_CR 0x1000 /* Confirmation Request */ 690 #define RQCS_RU 0x0800 /* Residual Under */ 691 #define RQCS_RO 0x0400 /* Residual Over */ 692 #define RQCS_RESID (RQCS_RU|RQCS_RO) 693 #define RQCS_SV 0x0200 /* Sense Length Valid */ 694 #define RQCS_RV 0x0100 /* FCP Response Length Valid */ 695 696 /* 697 * CT Passthru IOCB 698 */ 699 typedef struct { 700 isphdr_t ctp_header; 701 uint32_t ctp_handle; 702 uint16_t ctp_status; 703 uint16_t ctp_nphdl; /* n-port handle */ 704 uint16_t ctp_cmd_cnt; /* Command DSD count */ 705 uint8_t ctp_vpidx; 706 uint8_t ctp_reserved0; 707 uint16_t ctp_time; 708 uint16_t ctp_reserved1; 709 uint16_t ctp_rsp_cnt; /* Response DSD count */ 710 uint16_t ctp_reserved2[5]; 711 uint32_t ctp_rsp_bcnt; /* Response byte count */ 712 uint32_t ctp_cmd_bcnt; /* Command byte count */ 713 ispds64_t ctp_dataseg[2]; 714 } isp_ct_pt_t; 715 716 /* 717 * MS Passthru IOCB 718 */ 719 typedef struct { 720 isphdr_t ms_header; 721 uint32_t ms_handle; 722 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 723 uint16_t ms_status; 724 uint16_t ms_flags; 725 uint16_t ms_reserved1; /* low 8 bits */ 726 uint16_t ms_time; 727 uint16_t ms_cmd_cnt; /* Command DSD count */ 728 uint16_t ms_tot_cnt; /* Total DSD Count */ 729 uint8_t ms_type; /* MS type */ 730 uint8_t ms_r_ctl; /* R_CTL */ 731 uint16_t ms_rxid; /* RX_ID */ 732 uint16_t ms_reserved2; 733 uint32_t ms_handle2; 734 uint32_t ms_rsp_bcnt; /* Response byte count */ 735 uint32_t ms_cmd_bcnt; /* Command byte count */ 736 ispds64_t ms_dataseg[2]; 737 } isp_ms_t; 738 739 /* 740 * Completion Status Codes. 741 */ 742 #define RQCS_COMPLETE 0x0000 743 #define RQCS_DMA_ERROR 0x0002 744 #define RQCS_RESET_OCCURRED 0x0004 745 #define RQCS_ABORTED 0x0005 746 #define RQCS_TIMEOUT 0x0006 747 #define RQCS_DATA_OVERRUN 0x0007 748 #define RQCS_DATA_UNDERRUN 0x0015 749 #define RQCS_QUEUE_FULL 0x001C 750 751 /* 1X00 Only Completion Codes */ 752 #define RQCS_INCOMPLETE 0x0001 753 #define RQCS_TRANSPORT_ERROR 0x0003 754 #define RQCS_COMMAND_OVERRUN 0x0008 755 #define RQCS_STATUS_OVERRUN 0x0009 756 #define RQCS_BAD_MESSAGE 0x000a 757 #define RQCS_NO_MESSAGE_OUT 0x000b 758 #define RQCS_EXT_ID_FAILED 0x000c 759 #define RQCS_IDE_MSG_FAILED 0x000d 760 #define RQCS_ABORT_MSG_FAILED 0x000e 761 #define RQCS_REJECT_MSG_FAILED 0x000f 762 #define RQCS_NOP_MSG_FAILED 0x0010 763 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 764 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 765 #define RQCS_ID_MSG_FAILED 0x0013 766 #define RQCS_UNEXP_BUS_FREE 0x0014 767 #define RQCS_XACT_ERR1 0x0018 768 #define RQCS_XACT_ERR2 0x0019 769 #define RQCS_XACT_ERR3 0x001A 770 #define RQCS_BAD_ENTRY 0x001B 771 #define RQCS_PHASE_SKIPPED 0x001D 772 #define RQCS_ARQS_FAILED 0x001E 773 #define RQCS_WIDE_FAILED 0x001F 774 #define RQCS_SYNCXFER_FAILED 0x0020 775 #define RQCS_LVD_BUSERR 0x0021 776 777 /* 2X00 Only Completion Codes */ 778 #define RQCS_PORT_UNAVAILABLE 0x0028 779 #define RQCS_PORT_LOGGED_OUT 0x0029 780 #define RQCS_PORT_CHANGED 0x002A 781 #define RQCS_PORT_BUSY 0x002B 782 783 /* 24XX Only Completion Codes */ 784 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 785 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 786 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 787 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 788 789 790 /* 791 * 1X00 specific State Flags 792 */ 793 #define RQSF_GOT_BUS 0x0100 794 #define RQSF_GOT_TARGET 0x0200 795 #define RQSF_SENT_CDB 0x0400 796 #define RQSF_XFRD_DATA 0x0800 797 #define RQSF_GOT_STATUS 0x1000 798 #define RQSF_GOT_SENSE 0x2000 799 #define RQSF_XFER_COMPLETE 0x4000 800 801 /* 802 * 2X00 specific State Flags 803 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 804 */ 805 #define RQSF_DATA_IN 0x0020 806 #define RQSF_DATA_OUT 0x0040 807 #define RQSF_STAG 0x0008 808 #define RQSF_OTAG 0x0004 809 #define RQSF_HTAG 0x0002 810 /* 811 * 1X00 Status Flags 812 */ 813 #define RQSTF_DISCONNECT 0x0001 814 #define RQSTF_SYNCHRONOUS 0x0002 815 #define RQSTF_PARITY_ERROR 0x0004 816 #define RQSTF_BUS_RESET 0x0008 817 #define RQSTF_DEVICE_RESET 0x0010 818 #define RQSTF_ABORTED 0x0020 819 #define RQSTF_TIMEOUT 0x0040 820 #define RQSTF_NEGOTIATION 0x0080 821 822 /* 823 * 2X00 specific state flags 824 */ 825 /* RQSF_SENT_CDB */ 826 /* RQSF_XFRD_DATA */ 827 /* RQSF_GOT_STATUS */ 828 /* RQSF_XFER_COMPLETE */ 829 830 /* 831 * 2X00 specific status flags 832 */ 833 /* RQSTF_ABORTED */ 834 /* RQSTF_TIMEOUT */ 835 #define RQSTF_DMA_ERROR 0x0080 836 #define RQSTF_LOGOUT 0x2000 837 838 /* 839 * Miscellaneous 840 */ 841 #ifndef ISP_EXEC_THROTTLE 842 #define ISP_EXEC_THROTTLE 16 843 #endif 844 845 /* 846 * About Firmware returns an 'attribute' word in mailbox 6. 847 * These attributes are for 2200 and 2300. 848 */ 849 #define ISP_FW_ATTR_TMODE 0x0001 850 #define ISP_FW_ATTR_SCCLUN 0x0002 851 #define ISP_FW_ATTR_FABRIC 0x0004 852 #define ISP_FW_ATTR_CLASS2 0x0008 853 #define ISP_FW_ATTR_FCTAPE 0x0010 854 #define ISP_FW_ATTR_IP 0x0020 855 #define ISP_FW_ATTR_VI 0x0040 856 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 857 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 858 859 /* and these are for the 2400 */ 860 #define ISP2400_FW_ATTR_CLASS2 0x0001 861 #define ISP2400_FW_ATTR_IP 0x0002 862 #define ISP2400_FW_ATTR_MULTIID 0x0004 863 #define ISP2400_FW_ATTR_SB2 0x0008 864 #define ISP2400_FW_ATTR_T10CRC 0x0010 865 #define ISP2400_FW_ATTR_VI 0x0020 866 #define ISP2400_FW_ATTR_MQ 0x0040 867 #define ISP2400_FW_ATTR_MSIX 0x0080 868 #define ISP2400_FW_ATTR_FCOE 0x0800 869 #define ISP2400_FW_ATTR_VP0 0x1000 870 #define ISP2400_FW_ATTR_EXPFW 0x2000 871 #define ISP2400_FW_ATTR_HOTFW 0x4000 872 #define ISP2400_FW_ATTR_EXTNDED 0x8000 873 #define ISP2400_FW_ATTR_EXTVP 0x00010000 874 #define ISP2400_FW_ATTR_VN2VN 0x00040000 875 #define ISP2400_FW_ATTR_EXMOFF 0x00080000 876 #define ISP2400_FW_ATTR_NPMOFF 0x00100000 877 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000 878 #define ISP2400_FW_ATTR_SRIOV 0x02000000 879 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000 880 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 881 882 /* 883 * These are either manifestly true or are dependent on f/w attributes 884 */ 885 #define ISP_CAP_TMODE(isp) \ 886 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 887 #define ISP_CAP_SCCFW(isp) \ 888 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 889 #define ISP_CAP_2KLOGIN(isp) \ 890 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 891 892 /* 893 * This is only true for 24XX cards with this f/w attribute 894 */ 895 #define ISP_CAP_MULTI_ID(isp) \ 896 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 897 #define ISP_GET_VPIDX(isp, tag) \ 898 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 899 #define ISP_CAP_MSIX(isp) \ 900 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MSIX) : 0) 901 #define ISP_CAP_VP0(isp) \ 902 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0) 903 904 /* 905 * This is true manifestly or is dependent on a f/w attribute 906 * but may or may not actually be *enabled*. In any case, it 907 * is enabled on a per-channel basis. 908 */ 909 #define ISP_CAP_FCTAPE(isp) \ 910 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 911 912 #define ISP_FCTAPE_ENABLED(isp, chan) \ 913 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 914 915 /* 916 * Reduced Interrupt Operation Response Queue Entries 917 */ 918 919 typedef struct { 920 isphdr_t req_header; 921 uint32_t req_handles[15]; 922 } isp_rio1_t; 923 924 typedef struct { 925 isphdr_t req_header; 926 uint16_t req_handles[30]; 927 } isp_rio2_t; 928 929 /* 930 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 931 */ 932 933 /* 934 * Initialization Control Block 935 * 936 * Version One (prime) format. 937 */ 938 typedef struct { 939 uint8_t icb_version; 940 uint8_t icb_reserved0; 941 uint16_t icb_fwoptions; 942 uint16_t icb_maxfrmlen; 943 uint16_t icb_maxalloc; 944 uint16_t icb_execthrottle; 945 uint8_t icb_retry_count; 946 uint8_t icb_retry_delay; 947 uint8_t icb_portname[8]; 948 uint16_t icb_hardaddr; 949 uint8_t icb_iqdevtype; 950 uint8_t icb_logintime; 951 uint8_t icb_nodename[8]; 952 uint16_t icb_rqstout; 953 uint16_t icb_rspnsin; 954 uint16_t icb_rqstqlen; 955 uint16_t icb_rsltqlen; 956 uint16_t icb_rqstaddr[4]; 957 uint16_t icb_respaddr[4]; 958 uint16_t icb_lunenables; 959 uint8_t icb_ccnt; 960 uint8_t icb_icnt; 961 uint16_t icb_lunetimeout; 962 uint16_t icb_reserved1; 963 uint16_t icb_xfwoptions; 964 uint8_t icb_racctimer; 965 uint8_t icb_idelaytimer; 966 uint16_t icb_zfwoptions; 967 uint16_t icb_reserved2[13]; 968 } isp_icb_t; 969 970 #define ICB_VERSION1 1 971 972 #define ICBOPT_EXTENDED 0x8000 973 #define ICBOPT_BOTH_WWNS 0x4000 974 #define ICBOPT_FULL_LOGIN 0x2000 975 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 976 #define ICBOPT_PREV_ADDRESS 0x0800 977 #define ICBOPT_SRCHDOWN 0x0400 978 #define ICBOPT_NOLIP 0x0200 979 #define ICBOPT_PDBCHANGE_AE 0x0100 980 #define ICBOPT_TGT_TYPE 0x0080 981 #define ICBOPT_INI_ADISC 0x0040 982 #define ICBOPT_INI_DISABLE 0x0020 983 #define ICBOPT_TGT_ENABLE 0x0010 984 #define ICBOPT_FAST_POST 0x0008 985 #define ICBOPT_FULL_DUPLEX 0x0004 986 #define ICBOPT_FAIRNESS 0x0002 987 #define ICBOPT_HARD_ADDRESS 0x0001 988 989 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 990 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 991 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 992 #define ICBXOPT_FCTAPE 0x1000 993 #define ICBXOPT_CLASS2_ACK0 0x0200 994 #define ICBXOPT_CLASS2 0x0100 995 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 996 #define ICBXOPT_TOPO_MASK 0x0070 997 #define ICBXOPT_LOOP_ONLY 0x0000 998 #define ICBXOPT_PTP_ONLY 0x0010 999 #define ICBXOPT_LOOP_2_PTP 0x0020 1000 #define ICBXOPT_PTP_2_LOOP 0x0030 1001 /* 1002 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 1003 * RIO is not defined for the 23XX cards (just 2200) 1004 */ 1005 #define ICBXOPT_RIO_OFF 0 1006 #define ICBXOPT_RIO_16BIT 1 1007 #define ICBXOPT_RIO_32BIT 2 1008 #define ICBXOPT_RIO_16BIT_IOCB 3 1009 #define ICBXOPT_RIO_32BIT_IOCB 4 1010 #define ICBXOPT_ZIO 5 1011 #define ICBXOPT_TIMER_MASK 0x7 1012 1013 #define ICBZOPT_RATE_MASK 0xC000 1014 #define ICBZOPT_RATE_1GB 0x0000 1015 #define ICBZOPT_RATE_AUTO 0x8000 1016 #define ICBZOPT_RATE_2GB 0x4000 1017 #define ICBZOPT_50_OHM 0x2000 1018 #define ICBZOPT_NO_LOCAL_PLOGI 0x0080 1019 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 1020 #define ICBZOPT_RSPSZ_MASK 0x0030 1021 #define ICBZOPT_RSPSZ_24 0x0000 1022 #define ICBZOPT_RSPSZ_12 0x0010 1023 #define ICBZOPT_RSPSZ_24A 0x0020 1024 #define ICBZOPT_RSPSZ_32 0x0030 1025 #define ICBZOPT_SOFTID 0x0002 1026 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 1027 1028 /* 2400 F/W options */ 1029 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 1030 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 1031 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800 1032 #define ICB2400_OPT1_SRCHDOWN 0x00000400 1033 #define ICB2400_OPT1_NOLIP 0x00000200 1034 #define ICB2400_OPT1_INI_DISABLE 0x00000020 1035 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 1036 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 1037 #define ICB2400_OPT1_FAIRNESS 0x00000002 1038 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 1039 1040 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 1041 #define ICB2400_OPT2_ENA_IHA 0x04000000 1042 #define ICB2400_OPT2_QOS 0x02000000 1043 #define ICB2400_OPT2_IOCBS 0x01000000 1044 #define ICB2400_OPT2_ENA_IHR 0x00400000 1045 #define ICB2400_OPT2_ENA_VMS 0x00200000 1046 #define ICB2400_OPT2_ENA_TA 0x00100000 1047 #define ICB2400_OPT2_TPRLIC 0x00004000 1048 #define ICB2400_OPT2_FCTAPE 0x00001000 1049 #define ICB2400_OPT2_FCSP 0x00000800 1050 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1051 #define ICB2400_OPT2_CLASS2 0x00000100 1052 #define ICB2400_OPT2_NO_PLAY 0x00000080 1053 #define ICB2400_OPT2_TOPO_MASK 0x00000070 1054 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 1055 #define ICB2400_OPT2_PTP_ONLY 0x00000010 1056 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1057 #define ICB2400_OPT2_TIMER_MASK 0x0000000f 1058 #define ICB2400_OPT2_ZIO 0x00000005 1059 #define ICB2400_OPT2_ZIO1 0x00000006 1060 1061 #define ICB2400_OPT3_NO_CTXDIS 0x40000000 1062 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1063 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1064 #define ICB2400_OPT3_ENA_MFCF 0x00020000 1065 #define ICB2400_OPT3_SKIP_4GB 0x00010000 1066 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1067 #define ICB2400_OPT3_RATE_1GB 0x00000000 1068 #define ICB2400_OPT3_RATE_2GB 0x00002000 1069 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1070 #define ICB2400_OPT3_RATE_4GB 0x00006000 1071 #define ICB2400_OPT3_RATE_8GB 0x00008000 1072 #define ICB2400_OPT3_RATE_16GB 0x0000A000 1073 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1074 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1075 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1076 #define ICB2400_OPT3_ENA_OOF 0x00000040 1077 /* note that a response size flag of zero is reserved! */ 1078 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1079 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1080 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1081 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1082 #define ICB2400_OPT3_SOFTID 0x00000002 1083 1084 #define ICB_MIN_FRMLEN 256 1085 #define ICB_MAX_FRMLEN 2112 1086 #define ICB_DFLT_FRMLEN 1024 1087 #define ICB_DFLT_ALLOC 256 1088 #define ICB_DFLT_THROTTLE 16 1089 #define ICB_DFLT_RDELAY 5 1090 #define ICB_DFLT_RCOUNT 3 1091 1092 #define ICB_LOGIN_TOV 10 1093 #define ICB_LUN_ENABLE_TOV 15 1094 1095 1096 /* 1097 * And somebody at QLogic had a great idea that you could just change 1098 * the structure *and* keep the version number the same as the other cards. 1099 */ 1100 typedef struct { 1101 uint16_t icb_version; 1102 uint16_t icb_reserved0; 1103 uint16_t icb_maxfrmlen; 1104 uint16_t icb_execthrottle; 1105 uint16_t icb_xchgcnt; 1106 uint16_t icb_hardaddr; 1107 uint8_t icb_portname[8]; 1108 uint8_t icb_nodename[8]; 1109 uint16_t icb_rspnsin; 1110 uint16_t icb_rqstout; 1111 uint16_t icb_retry_count; 1112 uint16_t icb_priout; 1113 uint16_t icb_rsltqlen; 1114 uint16_t icb_rqstqlen; 1115 uint16_t icb_ldn_nols; 1116 uint16_t icb_prqstqlen; 1117 uint16_t icb_rqstaddr[4]; 1118 uint16_t icb_respaddr[4]; 1119 uint16_t icb_priaddr[4]; 1120 uint16_t icb_msixresp; 1121 uint16_t icb_msixatio; 1122 uint16_t icb_reserved1[2]; 1123 uint16_t icb_atio_in; 1124 uint16_t icb_atioqlen; 1125 uint16_t icb_atioqaddr[4]; 1126 uint16_t icb_idelaytimer; 1127 uint16_t icb_logintime; 1128 uint32_t icb_fwoptions1; 1129 uint32_t icb_fwoptions2; 1130 uint32_t icb_fwoptions3; 1131 uint16_t icb_qos; 1132 uint16_t icb_reserved2[3]; 1133 uint16_t icb_enodemac[3]; 1134 uint16_t icb_disctime; 1135 uint16_t icb_reserved3[4]; 1136 } isp_icb_2400_t; 1137 1138 #define RQRSP_ADDR0015 0 1139 #define RQRSP_ADDR1631 1 1140 #define RQRSP_ADDR3247 2 1141 #define RQRSP_ADDR4863 3 1142 1143 1144 #define ICB_NNM0 7 1145 #define ICB_NNM1 6 1146 #define ICB_NNM2 5 1147 #define ICB_NNM3 4 1148 #define ICB_NNM4 3 1149 #define ICB_NNM5 2 1150 #define ICB_NNM6 1 1151 #define ICB_NNM7 0 1152 1153 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1154 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1155 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1156 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1157 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1158 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1159 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1160 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1161 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1162 1163 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1164 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1165 ((uint64_t) array[ICB_NNM1] << 8) | \ 1166 ((uint64_t) array[ICB_NNM2] << 16) | \ 1167 ((uint64_t) array[ICB_NNM3] << 24) | \ 1168 ((uint64_t) array[ICB_NNM4] << 32) | \ 1169 ((uint64_t) array[ICB_NNM5] << 40) | \ 1170 ((uint64_t) array[ICB_NNM6] << 48) | \ 1171 ((uint64_t) array[ICB_NNM7] << 56) 1172 1173 1174 /* 1175 * For MULTI_ID firmware, this describes a 1176 * virtual port entity for getting status. 1177 */ 1178 typedef struct { 1179 uint16_t vp_port_status; 1180 uint8_t vp_port_options; 1181 uint8_t vp_port_loopid; 1182 uint8_t vp_port_portname[8]; 1183 uint8_t vp_port_nodename[8]; 1184 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1185 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1186 } vp_port_info_t; 1187 1188 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1189 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1190 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1191 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1192 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1193 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1194 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1195 1196 #define ICB2400_VPOPT_WRITE_SIZE 20 1197 1198 /* 1199 * For MULTI_ID firmware, we append this structure 1200 * to the isp_icb_2400_t above, followed by a list 1201 * structures that are *most* of the vp_port_info_t. 1202 */ 1203 typedef struct { 1204 uint16_t vp_count; 1205 uint16_t vp_global_options; 1206 } isp_icb_2400_vpinfo_t; 1207 1208 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1209 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1210 (ICB2400_VPINFO_OFF + \ 1211 sizeof (isp_icb_2400_vpinfo_t) + ((chan) * ICB2400_VPOPT_WRITE_SIZE)) 1212 1213 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1214 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1215 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1216 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1217 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1218 1219 typedef struct { 1220 isphdr_t vp_ctrl_hdr; 1221 uint32_t vp_ctrl_handle; 1222 uint16_t vp_ctrl_index_fail; 1223 uint16_t vp_ctrl_status; 1224 uint16_t vp_ctrl_command; 1225 uint16_t vp_ctrl_vp_count; 1226 uint16_t vp_ctrl_idmap[16]; 1227 uint16_t vp_ctrl_reserved[7]; 1228 uint16_t vp_ctrl_fcf_index; 1229 } vp_ctrl_info_t; 1230 1231 #define VP_CTRL_CMD_ENABLE_VP 0x00 1232 #define VP_CTRL_CMD_DISABLE_VP 0x08 1233 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09 1234 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A 1235 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B 1236 1237 /* 1238 * We can use this structure for modifying either one or two VP ports after initialization 1239 */ 1240 typedef struct { 1241 isphdr_t vp_mod_hdr; 1242 uint32_t vp_mod_hdl; 1243 uint16_t vp_mod_reserved0; 1244 uint16_t vp_mod_status; 1245 uint8_t vp_mod_cmd; 1246 uint8_t vp_mod_cnt; 1247 uint8_t vp_mod_idx0; 1248 uint8_t vp_mod_idx1; 1249 struct { 1250 uint8_t options; 1251 uint8_t loopid; 1252 uint16_t reserved1; 1253 uint8_t wwpn[8]; 1254 uint8_t wwnn[8]; 1255 } vp_mod_ports[2]; 1256 uint8_t vp_mod_reserved2[8]; 1257 } vp_modify_t; 1258 1259 #define VP_STS_OK 0x00 1260 #define VP_STS_ERR 0x01 1261 #define VP_CNT_ERR 0x02 1262 #define VP_GEN_ERR 0x03 1263 #define VP_IDX_ERR 0x04 1264 #define VP_STS_BSY 0x05 1265 1266 #define VP_MODIFY 0x00 1267 #define VP_MODIFY_ENA 0x01 1268 #define VP_MODIFY_OPT 0x02 1269 #define VP_RESUME 0x03 1270 1271 /* 1272 * Port Data Base Element 1273 */ 1274 1275 typedef struct { 1276 uint16_t pdb_options; 1277 uint8_t pdb_mstate; 1278 uint8_t pdb_sstate; 1279 uint8_t pdb_hardaddr_bits[4]; 1280 uint8_t pdb_portid_bits[4]; 1281 uint8_t pdb_nodename[8]; 1282 uint8_t pdb_portname[8]; 1283 uint16_t pdb_execthrottle; 1284 uint16_t pdb_exec_count; 1285 uint8_t pdb_retry_count; 1286 uint8_t pdb_retry_delay; 1287 uint16_t pdb_resalloc; 1288 uint16_t pdb_curalloc; 1289 uint16_t pdb_qhead; 1290 uint16_t pdb_qtail; 1291 uint16_t pdb_tl_next; 1292 uint16_t pdb_tl_last; 1293 uint16_t pdb_features; /* PLOGI, Common Service */ 1294 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1295 uint16_t pdb_roi; /* PLOGI, Common Service */ 1296 uint8_t pdb_target; 1297 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1298 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1299 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1300 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1301 uint16_t pdb_labrtflg; 1302 uint16_t pdb_lstopflg; 1303 uint16_t pdb_sqhead; 1304 uint16_t pdb_sqtail; 1305 uint16_t pdb_ptimer; 1306 uint16_t pdb_nxt_seqid; 1307 uint16_t pdb_fcount; 1308 uint16_t pdb_prli_len; 1309 uint16_t pdb_prli_svc0; 1310 uint16_t pdb_prli_svc3; 1311 uint16_t pdb_loopid; 1312 uint16_t pdb_il_ptr; 1313 uint16_t pdb_sl_ptr; 1314 } isp_pdb_21xx_t; 1315 1316 #define PDB_OPTIONS_XMITTING (1<<11) 1317 #define PDB_OPTIONS_LNKXMIT (1<<10) 1318 #define PDB_OPTIONS_ABORTED (1<<9) 1319 #define PDB_OPTIONS_ADISC (1<<1) 1320 1321 #define PDB_STATE_DISCOVERY 0 1322 #define PDB_STATE_WDISC_ACK 1 1323 #define PDB_STATE_PLOGI 2 1324 #define PDB_STATE_PLOGI_ACK 3 1325 #define PDB_STATE_PRLI 4 1326 #define PDB_STATE_PRLI_ACK 5 1327 #define PDB_STATE_LOGGED_IN 6 1328 #define PDB_STATE_PORT_UNAVAIL 7 1329 #define PDB_STATE_PRLO 8 1330 #define PDB_STATE_PRLO_ACK 9 1331 #define PDB_STATE_PLOGO 10 1332 #define PDB_STATE_PLOG_ACK 11 1333 1334 #define SVC3_ROLE_MASK 0x30 1335 #define SVC3_ROLE_SHIFT 4 1336 1337 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1338 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1339 1340 /* 1341 * Port Data Base Element- 24XX cards 1342 */ 1343 typedef struct { 1344 uint16_t pdb_flags; 1345 uint8_t pdb_curstate; 1346 uint8_t pdb_laststate; 1347 uint8_t pdb_hardaddr_bits[4]; 1348 uint8_t pdb_portid_bits[4]; 1349 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1350 uint16_t pdb_retry_timer; 1351 uint16_t pdb_handle; 1352 uint16_t pdb_rcv_dsize; 1353 uint16_t pdb_reserved0; 1354 uint16_t pdb_prli_svc0; 1355 uint16_t pdb_prli_svc3; 1356 uint8_t pdb_portname[8]; 1357 uint8_t pdb_nodename[8]; 1358 uint8_t pdb_reserved1[24]; 1359 } isp_pdb_24xx_t; 1360 1361 #define PDB2400_TID_SUPPORTED 0x4000 1362 #define PDB2400_FC_TAPE 0x0080 1363 #define PDB2400_CLASS2_ACK0 0x0040 1364 #define PDB2400_FCP_CONF 0x0020 1365 #define PDB2400_CLASS2 0x0010 1366 #define PDB2400_ADDR_VALID 0x0002 1367 1368 #define PDB2400_STATE_PLOGI_PEND 0x03 1369 #define PDB2400_STATE_PLOGI_DONE 0x04 1370 #define PDB2400_STATE_PRLI_PEND 0x05 1371 #define PDB2400_STATE_LOGGED_IN 0x06 1372 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1373 #define PDB2400_STATE_PRLO_PEND 0x09 1374 #define PDB2400_STATE_LOGO_PEND 0x0B 1375 1376 /* 1377 * Common elements from the above two structures that are actually useful to us. 1378 */ 1379 typedef struct { 1380 uint16_t handle; 1381 uint16_t prli_word3; 1382 uint32_t : 8, 1383 portid : 24; 1384 uint8_t portname[8]; 1385 uint8_t nodename[8]; 1386 } isp_pdb_t; 1387 1388 /* 1389 * Port/Node Name List Element 1390 */ 1391 typedef struct { 1392 uint8_t pnnle_name[8]; 1393 uint16_t pnnle_handle; 1394 uint16_t pnnle_reserved; 1395 } isp_pnnle_t; 1396 1397 #define PNNL_OPTIONS_NODE_NAMES (1<<0) 1398 #define PNNL_OPTIONS_PORT_DATA (1<<2) 1399 #define PNNL_OPTIONS_INITIATORS (1<<3) 1400 1401 /* 1402 * Port and N-Port Handle List Element 1403 */ 1404 typedef struct { 1405 uint16_t pnhle_port_id_lo; 1406 uint16_t pnhle_port_id_hi_handle; 1407 } isp_pnhle_21xx_t; 1408 1409 typedef struct { 1410 uint16_t pnhle_port_id_lo; 1411 uint16_t pnhle_port_id_hi; 1412 uint16_t pnhle_handle; 1413 } isp_pnhle_23xx_t; 1414 1415 typedef struct { 1416 uint16_t pnhle_port_id_lo; 1417 uint16_t pnhle_port_id_hi; 1418 uint16_t pnhle_handle; 1419 uint16_t pnhle_reserved; 1420 } isp_pnhle_24xx_t; 1421 1422 /* 1423 * Port Database Changed Async Event information for 24XX cards 1424 */ 1425 /* N-Port Handle */ 1426 #define PDB24XX_AE_GLOBAL 0xFFFF 1427 1428 /* Reason Codes */ 1429 #define PDB24XX_AE_OK 0x00 1430 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1431 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1432 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1433 #define PDB24XX_AE_PLOGI_RCVD 0x04 1434 #define PDB24XX_AE_PLOGI_RJT 0x05 1435 #define PDB24XX_AE_PRLI_RCVD 0x06 1436 #define PDB24XX_AE_PRLI_RJT 0x07 1437 #define PDB24XX_AE_TPRLO 0x08 1438 #define PDB24XX_AE_TPRLO_RJT 0x09 1439 #define PDB24XX_AE_PRLO_RCVD 0x0a 1440 #define PDB24XX_AE_LOGO_RCVD 0x0b 1441 #define PDB24XX_AE_TOPO_CHG 0x0c 1442 #define PDB24XX_AE_NPORT_CHG 0x0d 1443 #define PDB24XX_AE_FLOGI_RJT 0x0e 1444 #define PDB24XX_AE_BAD_FANN 0x0f 1445 #define PDB24XX_AE_FLOGI_TIMO 0x10 1446 #define PDB24XX_AE_ABX_LOGO 0x11 1447 #define PDB24XX_AE_PLOGI_DONE 0x12 1448 #define PDB24XX_AE_PRLI_DONE 0x13 1449 #define PDB24XX_AE_OPN_1 0x14 1450 #define PDB24XX_AE_OPN_2 0x15 1451 #define PDB24XX_AE_TXERR 0x16 1452 #define PDB24XX_AE_FORCED_LOGO 0x17 1453 #define PDB24XX_AE_DISC_TIMO 0x18 1454 1455 /* 1456 * Genericized Port Login/Logout software structure 1457 */ 1458 typedef struct { 1459 uint16_t handle; 1460 uint16_t channel; 1461 uint32_t 1462 flags : 8, 1463 portid : 24; 1464 } isp_plcmd_t; 1465 /* the flags to use are those for PLOGX_FLG_* below */ 1466 1467 /* 1468 * ISP24XX- Login/Logout Port IOCB 1469 */ 1470 typedef struct { 1471 isphdr_t plogx_header; 1472 uint32_t plogx_handle; 1473 uint16_t plogx_status; 1474 uint16_t plogx_nphdl; 1475 uint16_t plogx_flags; 1476 uint16_t plogx_vphdl; /* low 8 bits */ 1477 uint16_t plogx_portlo; /* low 16 bits */ 1478 uint16_t plogx_rspsz_porthi; 1479 struct { 1480 uint16_t lo16; 1481 uint16_t hi16; 1482 } plogx_ioparm[11]; 1483 } isp_plogx_t; 1484 1485 #define PLOGX_STATUS_OK 0x00 1486 #define PLOGX_STATUS_UNAVAIL 0x28 1487 #define PLOGX_STATUS_LOGOUT 0x29 1488 #define PLOGX_STATUS_IOCBERR 0x31 1489 1490 #define PLOGX_IOCBERR_NOLINK 0x01 1491 #define PLOGX_IOCBERR_NOIOCB 0x02 1492 #define PLOGX_IOCBERR_NOXGHG 0x03 1493 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1494 #define PLOGX_IOCBERR_NOFABRIC 0x05 1495 #define PLOGX_IOCBERR_NOTREADY 0x07 1496 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */ 1497 #define PLOGX_IOCBERR_NOPCB 0x0a 1498 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1499 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1500 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1501 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1502 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1503 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1504 1505 #define PLOGX_FLG_CMD_MASK 0xf 1506 #define PLOGX_FLG_CMD_PLOGI 0 1507 #define PLOGX_FLG_CMD_PRLI 1 1508 #define PLOGX_FLG_CMD_PDISC 2 1509 #define PLOGX_FLG_CMD_LOGO 8 1510 #define PLOGX_FLG_CMD_PRLO 9 1511 #define PLOGX_FLG_CMD_TPRLO 10 1512 1513 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1514 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1515 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1516 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1517 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1518 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1519 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1520 1521 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1522 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1523 1524 /* 1525 * Report ID Acquisistion (24XX multi-id firmware) 1526 */ 1527 typedef struct { 1528 isphdr_t ridacq_hdr; 1529 uint32_t ridacq_handle; 1530 uint8_t ridacq_vp_acquired; 1531 uint8_t ridacq_vp_setup; 1532 uint8_t ridacq_vp_index; 1533 uint8_t ridacq_vp_status; 1534 uint16_t ridacq_vp_port_lo; 1535 uint8_t ridacq_vp_port_hi; 1536 uint8_t ridacq_format; /* 0 or 1 */ 1537 uint16_t ridacq_map[8]; 1538 uint8_t ridacq_reserved1[32]; 1539 } isp_ridacq_t; 1540 1541 #define RIDACQ_STS_COMPLETE 0 1542 #define RIDACQ_STS_UNACQUIRED 1 1543 #define RIDACQ_STS_CHANGED 2 1544 #define RIDACQ_STS_SNS_TIMEOUT 3 1545 #define RIDACQ_STS_SNS_REJECTED 4 1546 #define RIDACQ_STS_SCR_TIMEOUT 5 1547 #define RIDACQ_STS_SCR_REJECTED 6 1548 1549 /* 1550 * Simple Name Server Data Structures 1551 */ 1552 #define SNS_GA_NXT 0x100 1553 #define SNS_GPN_ID 0x112 1554 #define SNS_GNN_ID 0x113 1555 #define SNS_GFT_ID 0x117 1556 #define SNS_GFF_ID 0x11F 1557 #define SNS_GID_FT 0x171 1558 #define SNS_GID_PT 0x1A1 1559 #define SNS_RFT_ID 0x217 1560 #define SNS_RSPN_ID 0x218 1561 #define SNS_RFF_ID 0x21F 1562 #define SNS_RSNN_NN 0x239 1563 typedef struct { 1564 uint16_t snscb_rblen; /* response buffer length (words) */ 1565 uint16_t snscb_reserved0; 1566 uint16_t snscb_addr[4]; /* response buffer address */ 1567 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1568 uint16_t snscb_reserved1; 1569 uint16_t snscb_data[]; /* variable data */ 1570 } sns_screq_t; /* Subcommand Request Structure */ 1571 1572 typedef struct { 1573 uint16_t snscb_rblen; /* response buffer length (words) */ 1574 uint16_t snscb_reserved0; 1575 uint16_t snscb_addr[4]; /* response buffer address */ 1576 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1577 uint16_t snscb_reserved1; 1578 uint16_t snscb_cmd; 1579 uint16_t snscb_reserved2; 1580 uint32_t snscb_reserved3; 1581 uint32_t snscb_port; 1582 } sns_ga_nxt_req_t; 1583 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1584 1585 typedef struct { /* Used for GFT_ID, GFF_ID, etc. */ 1586 uint16_t snscb_rblen; /* response buffer length (words) */ 1587 uint16_t snscb_reserved0; 1588 uint16_t snscb_addr[4]; /* response buffer address */ 1589 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1590 uint16_t snscb_reserved1; 1591 uint16_t snscb_cmd; 1592 uint16_t snscb_mword_div_2; 1593 uint32_t snscb_reserved3; 1594 uint32_t snscb_portid; 1595 } sns_gxx_id_req_t; 1596 #define SNS_GXX_ID_REQ_SIZE (sizeof (sns_gxx_id_req_t)) 1597 1598 typedef struct { 1599 uint16_t snscb_rblen; /* response buffer length (words) */ 1600 uint16_t snscb_reserved0; 1601 uint16_t snscb_addr[4]; /* response buffer address */ 1602 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1603 uint16_t snscb_reserved1; 1604 uint16_t snscb_cmd; 1605 uint16_t snscb_mword_div_2; 1606 uint32_t snscb_reserved3; 1607 uint32_t snscb_fc4_type; 1608 } sns_gid_ft_req_t; 1609 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1610 1611 typedef struct { 1612 uint16_t snscb_rblen; /* response buffer length (words) */ 1613 uint16_t snscb_reserved0; 1614 uint16_t snscb_addr[4]; /* response buffer address */ 1615 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1616 uint16_t snscb_reserved1; 1617 uint16_t snscb_cmd; 1618 uint16_t snscb_mword_div_2; 1619 uint32_t snscb_reserved3; 1620 uint8_t snscb_port_type; 1621 uint8_t snscb_domain; 1622 uint8_t snscb_area; 1623 uint8_t snscb_flags; 1624 } sns_gid_pt_req_t; 1625 #define SNS_GID_PT_REQ_SIZE (sizeof (sns_gid_pt_req_t)) 1626 1627 typedef struct { 1628 uint16_t snscb_rblen; /* response buffer length (words) */ 1629 uint16_t snscb_reserved0; 1630 uint16_t snscb_addr[4]; /* response buffer address */ 1631 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1632 uint16_t snscb_reserved1; 1633 uint16_t snscb_cmd; 1634 uint16_t snscb_reserved2; 1635 uint32_t snscb_reserved3; 1636 uint32_t snscb_port; 1637 uint32_t snscb_fc4_types[8]; 1638 } sns_rft_id_req_t; 1639 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1640 1641 typedef struct { 1642 ct_hdr_t snscb_cthdr; 1643 uint8_t snscb_port_type; 1644 uint8_t snscb_port_id[3]; 1645 uint8_t snscb_portname[8]; 1646 uint16_t snscb_data[]; /* variable data */ 1647 } sns_scrsp_t; /* Subcommand Response Structure */ 1648 1649 typedef struct { 1650 ct_hdr_t snscb_cthdr; 1651 uint8_t snscb_port_type; 1652 uint8_t snscb_port_id[3]; 1653 uint8_t snscb_portname[8]; 1654 uint8_t snscb_pnlen; /* symbolic port name length */ 1655 uint8_t snscb_pname[255]; /* symbolic port name */ 1656 uint8_t snscb_nodename[8]; 1657 uint8_t snscb_nnlen; /* symbolic node name length */ 1658 uint8_t snscb_nname[255]; /* symbolic node name */ 1659 uint8_t snscb_ipassoc[8]; 1660 uint8_t snscb_ipaddr[16]; 1661 uint8_t snscb_svc_class[4]; 1662 uint8_t snscb_fc4_types[32]; 1663 uint8_t snscb_fpname[8]; 1664 uint8_t snscb_reserved; 1665 uint8_t snscb_hardaddr[3]; 1666 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1667 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1668 1669 typedef struct { 1670 ct_hdr_t snscb_cthdr; 1671 uint8_t snscb_wwn[8]; 1672 } sns_gxn_id_rsp_t; 1673 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1674 1675 typedef struct { 1676 ct_hdr_t snscb_cthdr; 1677 uint32_t snscb_fc4_types[8]; 1678 } sns_gft_id_rsp_t; 1679 #define SNS_GFT_ID_RESP_SIZE (sizeof (sns_gft_id_rsp_t)) 1680 1681 typedef struct { 1682 ct_hdr_t snscb_cthdr; 1683 uint32_t snscb_fc4_features[32]; 1684 } sns_gff_id_rsp_t; 1685 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1686 1687 typedef struct { /* Used for GID_FT, GID_PT, etc. */ 1688 ct_hdr_t snscb_cthdr; 1689 struct { 1690 uint8_t control; 1691 uint8_t portid[3]; 1692 } snscb_ports[1]; 1693 } sns_gid_xx_rsp_t; 1694 #define SNS_GID_XX_RESP_SIZE(x) ((sizeof (sns_gid_xx_rsp_t)) + ((x - 1) << 2)) 1695 1696 /* 1697 * Other Misc Structures 1698 */ 1699 1700 /* ELS Pass Through */ 1701 typedef struct { 1702 isphdr_t els_hdr; 1703 uint32_t els_handle; 1704 uint16_t els_status; 1705 uint16_t els_nphdl; 1706 uint16_t els_xmit_dsd_count; /* outgoing only */ 1707 uint8_t els_vphdl; 1708 uint8_t els_sof; 1709 uint32_t els_rxid; 1710 uint16_t els_recv_dsd_count; /* outgoing only */ 1711 uint8_t els_opcode; 1712 uint8_t els_reserved1; 1713 uint8_t els_did_lo; 1714 uint8_t els_did_mid; 1715 uint8_t els_did_hi; 1716 uint8_t els_reserved2; 1717 uint16_t els_reserved3; 1718 uint16_t els_ctl_flags; 1719 union { 1720 struct { 1721 uint32_t _els_bytecnt; 1722 uint32_t _els_subcode1; 1723 uint32_t _els_subcode2; 1724 uint8_t _els_reserved4[20]; 1725 } in; 1726 struct { 1727 uint32_t _els_recv_bytecnt; 1728 uint32_t _els_xmit_bytecnt; 1729 uint32_t _els_xmit_dsd_length; 1730 uint16_t _els_xmit_dsd_a1500; 1731 uint16_t _els_xmit_dsd_a3116; 1732 uint16_t _els_xmit_dsd_a4732; 1733 uint16_t _els_xmit_dsd_a6348; 1734 uint32_t _els_recv_dsd_length; 1735 uint16_t _els_recv_dsd_a1500; 1736 uint16_t _els_recv_dsd_a3116; 1737 uint16_t _els_recv_dsd_a4732; 1738 uint16_t _els_recv_dsd_a6348; 1739 } out; 1740 } inout; 1741 #define els_bytecnt inout.in._els_bytecnt 1742 #define els_subcode1 inout.in._els_subcode1 1743 #define els_subcode2 inout.in._els_subcode2 1744 #define els_reserved4 inout.in._els_reserved4 1745 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1746 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1747 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1748 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1749 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1750 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1751 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1752 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1753 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1754 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1755 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1756 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1757 } els_t; 1758 1759 /* 1760 * A handy package structure for running FC-SCSI commands internally 1761 */ 1762 typedef struct { 1763 uint16_t handle; 1764 uint16_t lun; 1765 uint32_t 1766 channel : 8, 1767 portid : 24; 1768 uint32_t timeout; 1769 union { 1770 struct { 1771 uint32_t data_length; 1772 uint32_t 1773 no_wait : 1, 1774 do_read : 1; 1775 uint8_t cdb[16]; 1776 void *data_ptr; 1777 } beg; 1778 struct { 1779 uint32_t data_residual; 1780 uint8_t status; 1781 uint8_t pad; 1782 uint16_t sense_length; 1783 uint8_t sense_data[32]; 1784 } end; 1785 } fcd; 1786 } isp_xcmd_t; 1787 1788 /* 1789 * Target Mode related definitions 1790 */ 1791 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1792 #define QLTM_SVALID 0x80 1793 1794 /* 1795 * Structure for Enable Lun and Modify Lun queue entries 1796 */ 1797 typedef struct { 1798 isphdr_t le_header; 1799 uint32_t le_reserved; 1800 uint8_t le_lun; 1801 uint8_t le_rsvd; 1802 uint8_t le_ops; /* Modify LUN only */ 1803 uint8_t le_tgt; /* Not for FC */ 1804 uint32_t le_flags; /* Not for FC */ 1805 uint8_t le_status; 1806 uint8_t le_reserved2; 1807 uint8_t le_cmd_count; 1808 uint8_t le_in_count; 1809 uint8_t le_cdb6len; /* Not for FC */ 1810 uint8_t le_cdb7len; /* Not for FC */ 1811 uint16_t le_timeout; 1812 uint16_t le_reserved3[20]; 1813 } lun_entry_t; 1814 1815 /* 1816 * le_flags values 1817 */ 1818 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1819 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1820 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1821 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1822 1823 /* 1824 * le_ops values 1825 */ 1826 #define LUN_CCINCR 0x01 /* increment command count */ 1827 #define LUN_CCDECR 0x02 /* decrement command count */ 1828 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1829 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1830 1831 /* 1832 * le_status values 1833 */ 1834 #define LUN_OK 0x01 /* we be rockin' */ 1835 #define LUN_ERR 0x04 /* request completed with error */ 1836 #define LUN_INVAL 0x06 /* invalid request */ 1837 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1838 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1839 1840 /* 1841 * Immediate Notify Entry structure 1842 */ 1843 #define IN_MSGLEN 8 /* 8 bytes */ 1844 #define IN_RSVDLEN 8 /* 8 words */ 1845 typedef struct { 1846 isphdr_t in_header; 1847 uint32_t in_reserved; 1848 uint8_t in_lun; /* lun */ 1849 uint8_t in_iid; /* initiator */ 1850 uint8_t in_reserved2; 1851 uint8_t in_tgt; /* target */ 1852 uint32_t in_flags; 1853 uint8_t in_status; 1854 uint8_t in_rsvd2; 1855 uint8_t in_tag_val; /* tag value */ 1856 uint8_t in_tag_type; /* tag type */ 1857 uint16_t in_seqid; /* sequence id */ 1858 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1859 uint16_t in_reserved3[IN_RSVDLEN]; 1860 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1861 } in_entry_t; 1862 1863 typedef struct { 1864 isphdr_t in_header; 1865 uint32_t in_reserved; 1866 uint8_t in_lun; /* lun */ 1867 uint8_t in_iid; /* initiator */ 1868 uint16_t in_scclun; 1869 uint32_t in_reserved2; 1870 uint16_t in_status; 1871 uint16_t in_task_flags; 1872 uint16_t in_seqid; /* sequence id */ 1873 } in_fcentry_t; 1874 1875 typedef struct { 1876 isphdr_t in_header; 1877 uint32_t in_reserved; 1878 uint16_t in_iid; /* initiator */ 1879 uint16_t in_scclun; 1880 uint32_t in_reserved2; 1881 uint16_t in_status; 1882 uint16_t in_task_flags; 1883 uint16_t in_seqid; /* sequence id */ 1884 } in_fcentry_e_t; 1885 1886 /* 1887 * Values for the in_status field 1888 */ 1889 #define IN_REJECT 0x0D /* Message Reject message received */ 1890 #define IN_RESET 0x0E /* Bus Reset occurred */ 1891 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1892 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1893 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1894 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1895 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1896 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1897 #define IN_PORT_CHANGED 0x2A /* port changed */ 1898 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1899 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1900 #define IN_SRR_RCVD 0x45 /* SRR received */ 1901 1902 /* 1903 * Values for the in_task_flags field- should only get one at a time! 1904 */ 1905 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1906 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1907 #define TASK_FLAGS_TARGET_RESET (1<<13) 1908 #define TASK_FLAGS_LUN_RESET (1<<12) 1909 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1910 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1911 1912 /* 1913 * ISP24XX Immediate Notify 1914 */ 1915 typedef struct { 1916 isphdr_t in_header; 1917 uint32_t in_reserved; 1918 uint16_t in_nphdl; 1919 uint16_t in_reserved1; 1920 uint16_t in_flags; 1921 uint16_t in_srr_rxid; 1922 uint16_t in_status; 1923 uint8_t in_status_subcode; 1924 uint8_t in_fwhandle; 1925 uint32_t in_rxid; 1926 uint16_t in_srr_reloff_lo; 1927 uint16_t in_srr_reloff_hi; 1928 uint16_t in_srr_iu; 1929 uint16_t in_srr_oxid; 1930 /* 1931 * If bit 2 is set in in_flags, the N-Port and 1932 * handle tags are valid. If the received ELS is 1933 * a LOGO, then these tags contain the N Port ID 1934 * from the LOGO payload. If the received ELS 1935 * request is TPRLO, these tags contain the 1936 * Third Party Originator N Port ID. 1937 */ 1938 uint16_t in_nport_id_hi; 1939 #define in_prli_options in_nport_id_hi 1940 uint8_t in_nport_id_lo; 1941 uint8_t in_reserved3; 1942 uint16_t in_np_handle; 1943 uint8_t in_reserved4[12]; 1944 uint8_t in_reserved5; 1945 uint8_t in_vpidx; 1946 uint32_t in_reserved6; 1947 uint16_t in_portid_lo; 1948 uint8_t in_portid_hi; 1949 uint8_t in_reserved7; 1950 uint16_t in_reserved8; 1951 uint16_t in_oxid; 1952 } in_fcentry_24xx_t; 1953 1954 #define IN24XX_FLAG_PUREX_IOCB 0x1 1955 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1956 #define IN24XX_FLAG_NPHDL_VALID 0x4 1957 #define IN24XX_FLAG_N2N_PRLI 0x8 1958 #define IN24XX_FLAG_PN_NN_VALID 0x10 1959 1960 #define IN24XX_LIP_RESET 0x0E 1961 #define IN24XX_LINK_RESET 0x0F 1962 #define IN24XX_PORT_LOGOUT 0x29 1963 #define IN24XX_PORT_CHANGED 0x2A 1964 #define IN24XX_LINK_FAILED 0x2E 1965 #define IN24XX_SRR_RCVD 0x45 1966 #define IN24XX_ELS_RCVD 0x46 /* 1967 * login-affectin ELS received- check 1968 * subcode for specific opcode 1969 */ 1970 1971 /* 1972 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1973 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1974 * Big Endian format. 1975 */ 1976 #define IN24XX_PRLI_WWNN_OFF 0x18 1977 #define IN24XX_PRLI_WWPN_OFF 0x28 1978 #define IN24XX_PLOGI_WWNN_OFF 0x20 1979 #define IN24XX_PLOGI_WWPN_OFF 0x28 1980 1981 /* 1982 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1983 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1984 */ 1985 #define IN24XX_LOGO_WWPN_OFF 0x28 1986 1987 /* 1988 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1989 */ 1990 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1991 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1992 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1993 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1994 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1995 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1996 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1997 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1998 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1999 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 2000 2001 /* 2002 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 2003 */ 2004 #define IN24XX_PORT_CHANGED_BADFAN 0x00 2005 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 2006 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 2007 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 2008 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 2009 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 2010 2011 /* 2012 * Notify Acknowledge Entry structure 2013 */ 2014 #define NA_RSVDLEN 22 2015 typedef struct { 2016 isphdr_t na_header; 2017 uint32_t na_reserved; 2018 uint8_t na_lun; /* lun */ 2019 uint8_t na_iid; /* initiator */ 2020 uint8_t na_reserved2; 2021 uint8_t na_tgt; /* target */ 2022 uint32_t na_flags; 2023 uint8_t na_status; 2024 uint8_t na_event; 2025 uint16_t na_seqid; /* sequence id */ 2026 uint16_t na_reserved3[NA_RSVDLEN]; 2027 } na_entry_t; 2028 2029 /* 2030 * Value for the na_event field 2031 */ 2032 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 2033 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 2034 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 2035 2036 #define NA2_RSVDLEN 21 2037 typedef struct { 2038 isphdr_t na_header; 2039 uint32_t na_reserved; 2040 uint8_t na_reserved1; 2041 uint8_t na_iid; /* initiator loop id */ 2042 uint16_t na_response; 2043 uint16_t na_flags; 2044 uint16_t na_reserved2; 2045 uint16_t na_status; 2046 uint16_t na_task_flags; 2047 uint16_t na_seqid; /* sequence id */ 2048 uint16_t na_reserved3[NA2_RSVDLEN]; 2049 } na_fcentry_t; 2050 2051 typedef struct { 2052 isphdr_t na_header; 2053 uint32_t na_reserved; 2054 uint16_t na_iid; /* initiator loop id */ 2055 uint16_t na_response; /* response code */ 2056 uint16_t na_flags; 2057 uint16_t na_reserved2; 2058 uint16_t na_status; 2059 uint16_t na_task_flags; 2060 uint16_t na_seqid; /* sequence id */ 2061 uint16_t na_reserved3[NA2_RSVDLEN]; 2062 } na_fcentry_e_t; 2063 2064 #define NAFC_RCOUNT 0x80 /* increment resource count */ 2065 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 2066 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 2067 2068 /* 2069 * ISP24XX Notify Acknowledge 2070 */ 2071 2072 typedef struct { 2073 isphdr_t na_header; 2074 uint32_t na_handle; 2075 uint16_t na_nphdl; 2076 uint16_t na_reserved1; 2077 uint16_t na_flags; 2078 uint16_t na_srr_rxid; 2079 uint16_t na_status; 2080 uint8_t na_status_subcode; 2081 uint8_t na_fwhandle; 2082 uint32_t na_rxid; 2083 uint16_t na_srr_reloff_lo; 2084 uint16_t na_srr_reloff_hi; 2085 uint16_t na_srr_iu; 2086 uint16_t na_srr_flags; 2087 uint8_t na_reserved3[18]; 2088 uint8_t na_reserved4; 2089 uint8_t na_vpidx; 2090 uint8_t na_srr_reject_vunique; 2091 uint8_t na_srr_reject_explanation; 2092 uint8_t na_srr_reject_code; 2093 uint8_t na_reserved5; 2094 uint8_t na_reserved6[6]; 2095 uint16_t na_oxid; 2096 } na_fcentry_24xx_t; 2097 2098 /* 2099 * Accept Target I/O Entry structure 2100 */ 2101 #define ATIO_CDBLEN 26 2102 2103 typedef struct { 2104 isphdr_t at_header; 2105 uint16_t at_reserved; 2106 uint16_t at_handle; 2107 uint8_t at_lun; /* lun */ 2108 uint8_t at_iid; /* initiator */ 2109 uint8_t at_cdblen; /* cdb length */ 2110 uint8_t at_tgt; /* target */ 2111 uint32_t at_flags; 2112 uint8_t at_status; /* firmware status */ 2113 uint8_t at_scsi_status; /* scsi status */ 2114 uint8_t at_tag_val; /* tag value */ 2115 uint8_t at_tag_type; /* tag type */ 2116 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2117 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2118 } at_entry_t; 2119 2120 /* 2121 * at_flags values 2122 */ 2123 #define AT_NODISC 0x00008000 /* disconnect disabled */ 2124 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2125 2126 /* 2127 * at_status values 2128 */ 2129 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2130 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2131 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2132 #define AT_NOCAP 0x16 /* Requested capability not available */ 2133 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2134 #define AT_CDB 0x3D /* CDB received */ 2135 /* 2136 * Macros to create and fetch and test concatenated handle and tag value macros 2137 * (SPI only) 2138 */ 2139 #define AT_MAKE_TAGID(tid, aep) \ 2140 tid = aep->at_handle; \ 2141 if (aep->at_flags & AT_TQAE) { \ 2142 tid |= (aep->at_tag_val << 16); \ 2143 tid |= (1 << 24); \ 2144 } 2145 2146 #define CT_MAKE_TAGID(tid, ct) \ 2147 tid = ct->ct_fwhandle; \ 2148 if (ct->ct_flags & CT_TQAE) { \ 2149 tid |= (ct->ct_tag_val << 16); \ 2150 tid |= (1 << 24); \ 2151 } 2152 2153 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2154 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2155 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2156 2157 #define IN_MAKE_TAGID(tid, inp) \ 2158 tid = inp->in_seqid; \ 2159 tid |= (inp->in_tag_val << 16); \ 2160 tid |= (1 << 24) 2161 2162 /* 2163 * Accept Target I/O Entry structure, Type 2 2164 */ 2165 #define ATIO2_CDBLEN 16 2166 2167 typedef struct { 2168 isphdr_t at_header; 2169 uint32_t at_reserved; 2170 uint8_t at_lun; /* lun or reserved */ 2171 uint8_t at_iid; /* initiator */ 2172 uint16_t at_rxid; /* response ID */ 2173 uint16_t at_flags; 2174 uint16_t at_status; /* firmware status */ 2175 uint8_t at_crn; /* command reference number */ 2176 uint8_t at_taskcodes; 2177 uint8_t at_taskflags; 2178 uint8_t at_execodes; 2179 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2180 uint32_t at_datalen; /* allocated data len */ 2181 uint16_t at_scclun; /* SCC Lun or reserved */ 2182 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2183 uint16_t at_reserved2[6]; 2184 uint16_t at_oxid; 2185 } at2_entry_t; 2186 2187 typedef struct { 2188 isphdr_t at_header; 2189 uint32_t at_reserved; 2190 uint16_t at_iid; /* initiator */ 2191 uint16_t at_rxid; /* response ID */ 2192 uint16_t at_flags; 2193 uint16_t at_status; /* firmware status */ 2194 uint8_t at_crn; /* command reference number */ 2195 uint8_t at_taskcodes; 2196 uint8_t at_taskflags; 2197 uint8_t at_execodes; 2198 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2199 uint32_t at_datalen; /* allocated data len */ 2200 uint16_t at_scclun; /* SCC Lun or reserved */ 2201 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2202 uint16_t at_reserved2[6]; 2203 uint16_t at_oxid; 2204 } at2e_entry_t; 2205 2206 #define ATIO2_WWPN_OFFSET 0x2A 2207 #define ATIO2_OXID_OFFSET 0x3E 2208 2209 #define ATIO2_TC_ATTR_MASK 0x7 2210 #define ATIO2_TC_ATTR_SIMPLEQ 0 2211 #define ATIO2_TC_ATTR_HEADOFQ 1 2212 #define ATIO2_TC_ATTR_ORDERED 2 2213 #define ATIO2_TC_ATTR_ACAQ 4 2214 #define ATIO2_TC_ATTR_UNTAGGED 5 2215 2216 #define ATIO2_EX_WRITE 0x1 2217 #define ATIO2_EX_READ 0x2 2218 /* 2219 * Macros to create and fetch and test concatenated handle and tag value macros 2220 */ 2221 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2222 tid = aep->at_rxid; \ 2223 tid |= (((uint64_t)inst) << 32); \ 2224 tid |= (((uint64_t)bus) << 48) 2225 2226 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2227 tid = ct->ct_rxid; \ 2228 tid |= (((uint64_t)inst) << 32); \ 2229 tid |= (((uint64_t)(bus & 0xff)) << 48) 2230 2231 #define AT2_HAS_TAG(val) 1 2232 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2233 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2234 #define AT2_GET_HANDLE AT2_GET_TAG 2235 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2236 2237 #define FC_HAS_TAG AT2_HAS_TAG 2238 #define FC_GET_TAG AT2_GET_TAG 2239 #define FC_GET_INST AT2_GET_INST 2240 #define FC_GET_HANDLE AT2_GET_HANDLE 2241 2242 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2243 tid = seqid; \ 2244 tid |= (((uint64_t)inst) << 32); \ 2245 tid |= (((uint64_t)(bus & 0xff)) << 48) 2246 2247 #define FC_TAG_INSERT_INST(tid, inst) \ 2248 tid &= ~0x0000ffff00000000ull; \ 2249 tid |= (((uint64_t)inst) << 32) 2250 2251 /* 2252 * 24XX ATIO Definition 2253 * 2254 * This is *quite* different from other entry types. 2255 * First of all, it has its own queue it comes in on. 2256 * 2257 * Secondly, it doesn't have a normal header. 2258 * 2259 * Thirdly, it's just a passthru of the FCP CMND IU 2260 * which is recorded in big endian mode. 2261 */ 2262 typedef struct { 2263 uint8_t at_type; 2264 uint8_t at_count; 2265 /* 2266 * Task attribute in high four bits, 2267 * the rest is the FCP CMND IU Length. 2268 * NB: the command can extend past the 2269 * length for a single queue entry. 2270 */ 2271 uint16_t at_ta_len; 2272 uint32_t at_rxid; 2273 fc_hdr_t at_hdr; 2274 fcp_cmnd_iu_t at_cmnd; 2275 } at7_entry_t; 2276 #define AT7_NORESRC_RXID 0xffffffff 2277 2278 2279 /* 2280 * Continue Target I/O Entry structure 2281 * Request from driver. The response from the 2282 * ISP firmware is the same except that the last 18 2283 * bytes are overwritten by suggested sense data if 2284 * the 'autosense valid' bit is set in the status byte. 2285 */ 2286 typedef struct { 2287 isphdr_t ct_header; 2288 uint16_t ct_syshandle; 2289 uint16_t ct_fwhandle; /* required by f/w */ 2290 uint8_t ct_lun; /* lun */ 2291 uint8_t ct_iid; /* initiator id */ 2292 uint8_t ct_reserved2; 2293 uint8_t ct_tgt; /* our target id */ 2294 uint32_t ct_flags; 2295 uint8_t ct_status; /* isp status */ 2296 uint8_t ct_scsi_status; /* scsi status */ 2297 uint8_t ct_tag_val; /* tag value */ 2298 uint8_t ct_tag_type; /* tag type */ 2299 uint32_t ct_xfrlen; /* transfer length */ 2300 uint32_t ct_resid; /* residual length */ 2301 uint16_t ct_timeout; 2302 uint16_t ct_seg_count; 2303 ispds_t ct_dataseg[ISP_RQDSEG]; 2304 } ct_entry_t; 2305 2306 /* 2307 * For some of the dual port SCSI adapters, port (bus #) is reported 2308 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2309 * 2310 * Note that this does not apply to FC adapters at all which can and 2311 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2312 * that have logged in across a SCSI fabric. 2313 */ 2314 #define GET_IID_VAL(x) (x & 0x3f) 2315 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2316 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2317 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2318 2319 /* 2320 * ct_flags values 2321 */ 2322 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2323 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2324 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2325 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2326 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2327 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2328 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2329 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2330 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2331 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2332 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2333 2334 /* 2335 * ct_status values 2336 * - set by the firmware when it returns the CTIO 2337 */ 2338 #define CT_OK 0x01 /* completed without error */ 2339 #define CT_ABORTED 0x02 /* aborted by host */ 2340 #define CT_ERR 0x04 /* see sense data for error */ 2341 #define CT_INVAL 0x06 /* request for disabled lun */ 2342 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2343 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2344 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2345 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2346 #define CT_TIMEOUT 0x0B /* timed out */ 2347 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2348 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2349 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2350 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2351 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2352 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2353 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2354 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2355 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2356 #define CT_LOGOUT 0x29 /* port logout */ 2357 #define CT_PORTCHANGED 0x2A /* port changed */ 2358 #define CT_IDE 0x33 /* Initiator Detected Error */ 2359 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2360 #define CT_SRR 0x45 /* SRR Received */ 2361 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2362 2363 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2364 2365 /* 2366 * When the firmware returns a CTIO entry, it may overwrite the last 2367 * part of the structure with sense data. This starts at offset 0x2E 2368 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2369 * than define a new struct for this, I'm just using the sense data 2370 * offset. 2371 */ 2372 #define CTIO_SENSE_OFFSET 0x2E 2373 2374 /* 2375 * Entry length in u_longs. All entries are the same size so 2376 * any one will do as the numerator. 2377 */ 2378 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2379 2380 /* 2381 * QLA2100 CTIO (type 2) entry 2382 */ 2383 #define MAXRESPLEN 26 2384 typedef struct { 2385 isphdr_t ct_header; 2386 uint32_t ct_syshandle; 2387 uint8_t ct_lun; /* lun */ 2388 uint8_t ct_iid; /* initiator id */ 2389 uint16_t ct_rxid; /* response ID */ 2390 uint16_t ct_flags; 2391 uint16_t ct_status; /* isp status */ 2392 uint16_t ct_timeout; 2393 uint16_t ct_seg_count; 2394 uint32_t ct_reloff; /* relative offset */ 2395 uint32_t ct_resid; /* residual length */ 2396 union { 2397 /* 2398 * The three different modes that the target driver 2399 * can set the CTIO{2,3,4} up as. 2400 * 2401 * The first is for sending FCP_DATA_IUs as well as 2402 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2403 * 2404 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2405 * Note that no FCP_DATA_IUs will be sent. 2406 * 2407 * The third is for sending FCP_RSP_IUs as built specifically 2408 * in system memory as located by the isp_dataseg. 2409 */ 2410 struct { 2411 uint32_t _reserved; 2412 uint16_t _reserved2; 2413 uint16_t ct_scsi_status; 2414 uint32_t ct_xfrlen; 2415 union { 2416 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2417 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2418 ispdslist_t ct_dslist; 2419 } u; 2420 } m0; 2421 struct { 2422 uint16_t _reserved; 2423 uint16_t _reserved2; 2424 uint16_t ct_senselen; 2425 uint16_t ct_scsi_status; 2426 uint16_t ct_resplen; 2427 uint8_t ct_resp[MAXRESPLEN]; 2428 } m1; 2429 struct { 2430 uint32_t _reserved; 2431 uint16_t _reserved2; 2432 uint16_t _reserved3; 2433 uint32_t ct_datalen; 2434 union { 2435 ispds_t ct_fcp_rsp_iudata_32; 2436 ispds64_t ct_fcp_rsp_iudata_64; 2437 } u; 2438 } m2; 2439 } rsp; 2440 } ct2_entry_t; 2441 2442 typedef struct { 2443 isphdr_t ct_header; 2444 uint32_t ct_syshandle; 2445 uint16_t ct_iid; /* initiator id */ 2446 uint16_t ct_rxid; /* response ID */ 2447 uint16_t ct_flags; 2448 uint16_t ct_status; /* isp status */ 2449 uint16_t ct_timeout; 2450 uint16_t ct_seg_count; 2451 uint32_t ct_reloff; /* relative offset */ 2452 uint32_t ct_resid; /* residual length */ 2453 union { 2454 struct { 2455 uint32_t _reserved; 2456 uint16_t _reserved2; 2457 uint16_t ct_scsi_status; 2458 uint32_t ct_xfrlen; 2459 union { 2460 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2461 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2462 ispdslist_t ct_dslist; 2463 } u; 2464 } m0; 2465 struct { 2466 uint16_t _reserved; 2467 uint16_t _reserved2; 2468 uint16_t ct_senselen; 2469 uint16_t ct_scsi_status; 2470 uint16_t ct_resplen; 2471 uint8_t ct_resp[MAXRESPLEN]; 2472 } m1; 2473 struct { 2474 uint32_t _reserved; 2475 uint16_t _reserved2; 2476 uint16_t _reserved3; 2477 uint32_t ct_datalen; 2478 union { 2479 ispds_t ct_fcp_rsp_iudata_32; 2480 ispds64_t ct_fcp_rsp_iudata_64; 2481 } u; 2482 } m2; 2483 } rsp; 2484 } ct2e_entry_t; 2485 2486 /* 2487 * ct_flags values for CTIO2 2488 */ 2489 #define CT2_FLAG_MODE0 0x0000 2490 #define CT2_FLAG_MODE1 0x0001 2491 #define CT2_FLAG_MODE2 0x0002 2492 #define CT2_FLAG_MMASK 0x0003 2493 #define CT2_DATA_IN 0x0040 /* *to* initiator */ 2494 #define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2495 #define CT2_NO_DATA 0x00C0 2496 #define CT2_DATAMASK 0x00C0 2497 #define CT2_CCINCR 0x0100 2498 #define CT2_FASTPOST 0x0200 2499 #define CT2_CONFIRM 0x2000 2500 #define CT2_TERMINATE 0x4000 2501 #define CT2_SENDSTATUS 0x8000 2502 2503 /* 2504 * ct_status values are (mostly) the same as that for ct_entry. 2505 */ 2506 2507 /* 2508 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2509 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2510 * fields. 2511 */ 2512 #define CT2_RSPLEN_VALID 0x0100 2513 #define CT2_SNSLEN_VALID 0x0200 2514 #define CT2_DATA_OVER 0x0400 2515 #define CT2_DATA_UNDER 0x0800 2516 2517 /* 2518 * ISP24XX CTIO 2519 */ 2520 #define MAXRESPLEN_24XX 24 2521 typedef struct { 2522 isphdr_t ct_header; 2523 uint32_t ct_syshandle; 2524 uint16_t ct_nphdl; /* status on returned CTIOs */ 2525 uint16_t ct_timeout; 2526 uint16_t ct_seg_count; 2527 uint8_t ct_vpidx; 2528 uint8_t ct_xflags; 2529 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2530 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2531 uint8_t ct_reserved; 2532 uint32_t ct_rxid; 2533 uint16_t ct_senselen; /* mode 1 only */ 2534 uint16_t ct_flags; 2535 uint32_t ct_resid; /* residual length */ 2536 uint16_t ct_oxid; 2537 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2538 union { 2539 struct { 2540 uint32_t reloff; 2541 uint32_t reserved0; 2542 uint32_t ct_xfrlen; 2543 uint32_t reserved1; 2544 ispds64_t ds; 2545 } m0; 2546 struct { 2547 uint16_t ct_resplen; 2548 uint16_t reserved; 2549 uint8_t ct_resp[MAXRESPLEN_24XX]; 2550 } m1; 2551 struct { 2552 uint32_t reserved0; 2553 uint32_t reserved1; 2554 uint32_t ct_datalen; 2555 uint32_t reserved2; 2556 ispds64_t ct_fcp_rsp_iudata; 2557 } m2; 2558 } rsp; 2559 } ct7_entry_t; 2560 2561 /* 2562 * ct_flags values for CTIO7 2563 */ 2564 #define CT7_NO_DATA 0x0000 2565 #define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2566 #define CT7_DATA_IN 0x0002 /* *to* initiator */ 2567 #define CT7_DATAMASK 0x3 2568 #define CT7_DSD_ENABLE 0x0004 2569 #define CT7_CONF_STSFD 0x0010 2570 #define CT7_EXPLCT_CONF 0x0020 2571 #define CT7_FLAG_MODE0 0x0000 2572 #define CT7_FLAG_MODE1 0x0040 2573 #define CT7_FLAG_MODE2 0x0080 2574 #define CT7_FLAG_MMASK 0x00C0 2575 #define CT7_NOACK 0x0100 2576 #define CT7_TASK_ATTR_SHIFT 9 2577 #define CT7_CONFIRM 0x2000 2578 #define CT7_TERMINATE 0x4000 2579 #define CT7_SENDSTATUS 0x8000 2580 2581 /* 2582 * Type 7 CTIO status codes 2583 */ 2584 #define CT7_OK 0x01 /* completed without error */ 2585 #define CT7_ABORTED 0x02 /* aborted by host */ 2586 #define CT7_ERR 0x04 /* see sense data for error */ 2587 #define CT7_INVAL 0x06 /* request for disabled lun */ 2588 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2589 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2590 #define CT7_TIMEOUT 0x0B /* timed out */ 2591 #define CT7_RESET 0x0E /* LIP Rset Received */ 2592 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2593 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2594 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2595 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2596 #define CT7_LOGOUT 0x29 /* port logout */ 2597 #define CT7_PORTCHANGED 0x2A /* port changed */ 2598 #define CT7_SRR 0x45 /* SRR Received */ 2599 2600 /* 2601 * Other 24XX related target IOCBs 2602 */ 2603 2604 /* 2605 * ABTS Received 2606 */ 2607 typedef struct { 2608 isphdr_t abts_header; 2609 uint8_t abts_reserved0[6]; 2610 uint16_t abts_nphdl; 2611 uint16_t abts_reserved1; 2612 uint16_t abts_sof; 2613 uint32_t abts_rxid_abts; 2614 uint16_t abts_did_lo; 2615 uint8_t abts_did_hi; 2616 uint8_t abts_r_ctl; 2617 uint16_t abts_sid_lo; 2618 uint8_t abts_sid_hi; 2619 uint8_t abts_cs_ctl; 2620 uint16_t abts_fs_ctl; 2621 uint8_t abts_f_ctl; 2622 uint8_t abts_type; 2623 uint16_t abts_seq_cnt; 2624 uint8_t abts_df_ctl; 2625 uint8_t abts_seq_id; 2626 uint16_t abts_rx_id; 2627 uint16_t abts_ox_id; 2628 uint32_t abts_param; 2629 uint8_t abts_reserved2[16]; 2630 uint32_t abts_rxid_task; 2631 } abts_t; 2632 2633 typedef struct { 2634 isphdr_t abts_rsp_header; 2635 uint32_t abts_rsp_handle; 2636 uint16_t abts_rsp_status; 2637 uint16_t abts_rsp_nphdl; 2638 uint16_t abts_rsp_ctl_flags; 2639 uint16_t abts_rsp_sof; 2640 uint32_t abts_rsp_rxid_abts; 2641 uint16_t abts_rsp_did_lo; 2642 uint8_t abts_rsp_did_hi; 2643 uint8_t abts_rsp_r_ctl; 2644 uint16_t abts_rsp_sid_lo; 2645 uint8_t abts_rsp_sid_hi; 2646 uint8_t abts_rsp_cs_ctl; 2647 uint16_t abts_rsp_f_ctl_lo; 2648 uint8_t abts_rsp_f_ctl_hi; 2649 uint8_t abts_rsp_type; 2650 uint16_t abts_rsp_seq_cnt; 2651 uint8_t abts_rsp_df_ctl; 2652 uint8_t abts_rsp_seq_id; 2653 uint16_t abts_rsp_rx_id; 2654 uint16_t abts_rsp_ox_id; 2655 uint32_t abts_rsp_param; 2656 union { 2657 struct { 2658 uint16_t reserved; 2659 uint8_t last_seq_id; 2660 uint8_t seq_id_valid; 2661 uint16_t aborted_rx_id; 2662 uint16_t aborted_ox_id; 2663 uint16_t high_seq_cnt; 2664 uint16_t low_seq_cnt; 2665 uint8_t reserved2[4]; 2666 } ba_acc; 2667 struct { 2668 uint8_t vendor_unique; 2669 uint8_t explanation; 2670 uint8_t reason; 2671 uint8_t reserved; 2672 uint8_t reserved2[12]; 2673 } ba_rjt; 2674 struct { 2675 uint8_t reserved[8]; 2676 uint32_t subcode1; 2677 uint32_t subcode2; 2678 } rsp; 2679 uint8_t reserved[16]; 2680 } abts_rsp_payload; 2681 uint32_t abts_rsp_rxid_task; 2682 } abts_rsp_t; 2683 2684 /* terminate this ABTS exchange */ 2685 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2686 2687 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2688 #define ISP24XX_ABTS_RSP_RESET 0x04 2689 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2690 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2691 #define ISP24XX_ABTS_RSP_INVXID 0x08 2692 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2693 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2694 2695 #define ISP24XX_NO_TASK 0xffffffff 2696 2697 /* 2698 * Miscellaneous 2699 * 2700 * These are the limits of the number of dma segments we 2701 * can deal with based not on the size of the segment counter 2702 * (which is 16 bits), but on the size of the number of 2703 * queue entries field (which is 8 bits). We assume no 2704 * segments in the first queue entry, so we can either 2705 * have 7 dma segments per continuation entry or 5 2706 * (for 64 bit dma).. multiplying out by 254.... 2707 */ 2708 #define ISP_NSEG_MAX 1778 2709 #define ISP_NSEG64_MAX 1270 2710 2711 #endif /* _ISPMBOX_H */ 2712