1 /* $FreeBSD$ */ 2 /* 3 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 4 * 5 *--------------------------------------- 6 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob 7 * NASA/Ames Research Center 8 * All rights reserved. 9 *--------------------------------------- 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 #ifndef _ISPMBOX_H 37 #define _ISPMBOX_H 38 39 /* 40 * Mailbox Command Opcodes 41 */ 42 43 #define MBOX_NO_OP 0x0000 44 #define MBOX_LOAD_RAM 0x0001 45 #define MBOX_EXEC_FIRMWARE 0x0002 46 #define MBOX_DUMP_RAM 0x0003 47 #define MBOX_WRITE_RAM_WORD 0x0004 48 #define MBOX_READ_RAM_WORD 0x0005 49 #define MBOX_MAILBOX_REG_TEST 0x0006 50 #define MBOX_VERIFY_CHECKSUM 0x0007 51 #define MBOX_ABOUT_FIRMWARE 0x0008 52 /* 9 */ 53 /* a */ 54 /* b */ 55 /* c */ 56 /* d */ 57 #define MBOX_CHECK_FIRMWARE 0x000e 58 /* f */ 59 #define MBOX_INIT_REQ_QUEUE 0x0010 60 #define MBOX_INIT_RES_QUEUE 0x0011 61 #define MBOX_EXECUTE_IOCB 0x0012 62 #define MBOX_WAKE_UP 0x0013 63 #define MBOX_STOP_FIRMWARE 0x0014 64 #define MBOX_ABORT 0x0015 65 #define MBOX_ABORT_DEVICE 0x0016 66 #define MBOX_ABORT_TARGET 0x0017 67 #define MBOX_BUS_RESET 0x0018 68 #define MBOX_STOP_QUEUE 0x0019 69 #define MBOX_START_QUEUE 0x001a 70 #define MBOX_SINGLE_STEP_QUEUE 0x001b 71 #define MBOX_ABORT_QUEUE 0x001c 72 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 73 /* 1e */ 74 #define MBOX_GET_FIRMWARE_STATUS 0x001f 75 #define MBOX_GET_INIT_SCSI_ID 0x0020 76 #define MBOX_GET_SELECT_TIMEOUT 0x0021 77 #define MBOX_GET_RETRY_COUNT 0x0022 78 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 79 #define MBOX_GET_CLOCK_RATE 0x0024 80 #define MBOX_GET_ACT_NEG_STATE 0x0025 81 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 82 #define MBOX_GET_SBUS_PARAMS 0x0027 83 #define MBOX_GET_TARGET_PARAMS 0x0028 84 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 85 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 86 /* 2b */ 87 /* 2c */ 88 /* 2d */ 89 /* 2e */ 90 /* 2f */ 91 #define MBOX_SET_INIT_SCSI_ID 0x0030 92 #define MBOX_SET_SELECT_TIMEOUT 0x0031 93 #define MBOX_SET_RETRY_COUNT 0x0032 94 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 95 #define MBOX_SET_CLOCK_RATE 0x0034 96 #define MBOX_SET_ACT_NEG_STATE 0x0035 97 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 98 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 99 #define MBOX_SET_PCI_PARAMETERS 0x0037 100 #define MBOX_SET_TARGET_PARAMS 0x0038 101 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 102 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 103 /* 3b */ 104 /* 3c */ 105 /* 3d */ 106 /* 3e */ 107 /* 3f */ 108 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 109 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 110 #define MBOX_EXEC_BIOS_IOCB 0x0042 111 #define MBOX_SET_FW_FEATURES 0x004a 112 #define MBOX_GET_FW_FEATURES 0x004b 113 #define FW_FEATURE_LVD_NOTIFY 0x2 114 #define FW_FEATURE_FAST_POST 0x1 115 116 #define MBOX_ENABLE_TARGET_MODE 0x55 117 #define ENABLE_TARGET_FLAG 0x8000 118 119 /* These are for the ISP2100 FC cards */ 120 #define MBOX_GET_LOOP_ID 0x20 121 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54 122 #define MBOX_INIT_FIRMWARE 0x60 123 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61 124 #define MBOX_INIT_LIP 0x62 125 #define MBOX_GET_FC_AL_POSITION_MAP 0x63 126 #define MBOX_GET_PORT_DB 0x64 127 #define MBOX_CLEAR_ACA 0x65 128 #define MBOX_TARGET_RESET 0x66 129 #define MBOX_CLEAR_TASK_SET 0x67 130 #define MBOX_ABORT_TASK_SET 0x68 131 #define MBOX_GET_FW_STATE 0x69 132 #define MBOX_GET_PORT_NAME 0x6a 133 #define MBOX_GET_LINK_STATUS 0x6b 134 #define MBOX_INIT_LIP_RESET 0x6c 135 #define MBOX_SEND_SNS 0x6e 136 #define MBOX_FABRIC_LOGIN 0x6f 137 #define MBOX_SEND_CHANGE_REQUEST 0x70 138 #define MBOX_FABRIC_LOGOUT 0x71 139 #define MBOX_INIT_LIP_LOGIN 0x72 140 141 #define ISP2100_SET_PCI_PARAM 0x00ff 142 143 #define MBOX_BUSY 0x04 144 145 typedef struct { 146 u_int16_t param[8]; 147 } mbreg_t; 148 149 /* 150 * Mailbox Command Complete Status Codes 151 */ 152 #define MBOX_COMMAND_COMPLETE 0x4000 153 #define MBOX_INVALID_COMMAND 0x4001 154 #define MBOX_HOST_INTERFACE_ERROR 0x4002 155 #define MBOX_TEST_FAILED 0x4003 156 #define MBOX_COMMAND_ERROR 0x4005 157 #define MBOX_COMMAND_PARAM_ERROR 0x4006 158 159 /* 160 * Asynchronous event status codes 161 */ 162 #define ASYNC_BUS_RESET 0x8001 163 #define ASYNC_SYSTEM_ERROR 0x8002 164 #define ASYNC_RQS_XFER_ERR 0x8003 165 #define ASYNC_RSP_XFER_ERR 0x8004 166 #define ASYNC_QWAKEUP 0x8005 167 #define ASYNC_TIMEOUT_RESET 0x8006 168 #define ASYNC_DEVICE_RESET 0x8007 169 #define ASYNC_EXTMSG_UNDERRUN 0x800A 170 #define ASYNC_SCAM_INT 0x800B 171 #define ASYNC_HUNG_SCSI 0x800C 172 #define ASYNC_KILLED_BUS 0x800D 173 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 174 #define ASYNC_CMD_CMPLT 0x8020 175 #define ASYNC_CTIO_DONE 0x8021 176 177 /* for ISP2100 only */ 178 #define ASYNC_LIP_OCCURRED 0x8010 179 #define ASYNC_LOOP_UP 0x8011 180 #define ASYNC_LOOP_DOWN 0x8012 181 #define ASYNC_LOOP_RESET 0x8013 182 #define ASYNC_PDB_CHANGED 0x8014 183 #define ASYNC_CHANGE_NOTIFY 0x8015 184 185 /* 186 * Command Structure Definitions 187 */ 188 189 typedef struct { 190 u_int32_t ds_base; 191 u_int32_t ds_count; 192 } ispds_t; 193 194 #define _ISP_SWAP8(a, b) { \ 195 u_int8_t tmp; \ 196 tmp = a; \ 197 a = b; \ 198 b = tmp; \ 199 } 200 201 /* 202 * These elements get swizzled around for SBus instances. 203 */ 204 typedef struct { 205 u_int8_t rqs_entry_type; 206 u_int8_t rqs_entry_count; 207 u_int8_t rqs_seqno; 208 u_int8_t rqs_flags; 209 } isphdr_t; 210 /* 211 * There are no (for all intents and purposes) non-sparc SBus machines 212 */ 213 #ifdef __sparc__ 214 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 215 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 216 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 217 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 218 } 219 #else 220 #define ISP_SBUSIFY_ISPHDR(a, b) 221 #endif 222 223 /* RQS Flag definitions */ 224 #define RQSFLAG_CONTINUATION 0x01 225 #define RQSFLAG_FULL 0x02 226 #define RQSFLAG_BADHEADER 0x04 227 #define RQSFLAG_BADPACKET 0x08 228 229 /* RQS entry_type definitions */ 230 #define RQSTYPE_REQUEST 0x01 231 #define RQSTYPE_DATASEG 0x02 232 #define RQSTYPE_RESPONSE 0x03 233 #define RQSTYPE_MARKER 0x04 234 #define RQSTYPE_CMDONLY 0x05 235 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 236 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 237 #define RQSTYPE_SCAM 0x08 238 #define RQSTYPE_A64 0x09 239 #define RQSTYPE_A64_CONT 0x0a 240 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 241 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 242 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 243 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 244 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 245 #define RQSTYPE_STATUS_CONT 0x10 246 #define RQSTYPE_T2RQS 0x11 247 248 #define RQSTYPE_T4RQS 0x15 249 #define RQSTYPE_ATIO2 0x16 250 #define RQSTYPE_CTIO2 0x17 251 #define RQSTYPE_CSET0 0x18 252 #define RQSTYPE_T3RQS 0x19 253 254 #define RQSTYPE_CTIO3 0x1f 255 256 257 #define ISP_RQDSEG 4 258 typedef struct { 259 isphdr_t req_header; 260 u_int32_t req_handle; 261 u_int8_t req_lun_trn; 262 u_int8_t req_target; 263 u_int16_t req_cdblen; 264 #define req_modifier req_cdblen /* marker packet */ 265 u_int16_t req_flags; 266 u_int16_t req_reserved; 267 u_int16_t req_time; 268 u_int16_t req_seg_count; 269 u_int8_t req_cdb[12]; 270 ispds_t req_dataseg[ISP_RQDSEG]; 271 } ispreq_t; 272 273 /* 274 * A request packet can also be a marker packet. 275 */ 276 #define SYNC_DEVICE 0 277 #define SYNC_TARGET 1 278 #define SYNC_ALL 2 279 280 /* 281 * There are no (for all intents and purposes) non-sparc SBus machines 282 */ 283 #ifdef __sparc__ 284 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 285 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 286 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 287 } 288 #else 289 #define ISP_SBUSIFY_ISPREQ(a, b) 290 #endif 291 292 #define ISP_RQDSEG_T2 3 293 typedef struct { 294 isphdr_t req_header; 295 u_int32_t req_handle; 296 u_int8_t req_lun_trn; 297 u_int8_t req_target; 298 u_int16_t req_scclun; 299 u_int16_t req_flags; 300 u_int16_t _res2; 301 u_int16_t req_time; 302 u_int16_t req_seg_count; 303 u_int32_t req_cdb[4]; 304 u_int32_t req_totalcnt; 305 ispds_t req_dataseg[ISP_RQDSEG_T2]; 306 } ispreqt2_t; 307 308 /* req_flag values */ 309 #define REQFLAG_NODISCON 0x0001 310 #define REQFLAG_HTAG 0x0002 311 #define REQFLAG_OTAG 0x0004 312 #define REQFLAG_STAG 0x0008 313 #define REQFLAG_TARGET_RTN 0x0010 314 315 #define REQFLAG_NODATA 0x0000 316 #define REQFLAG_DATA_IN 0x0020 317 #define REQFLAG_DATA_OUT 0x0040 318 #define REQFLAG_DATA_UNKNOWN 0x0060 319 320 #define REQFLAG_DISARQ 0x0100 321 #define REQFLAG_FRC_ASYNC 0x0200 322 #define REQFLAG_FRC_SYNC 0x0400 323 #define REQFLAG_FRC_WIDE 0x0800 324 #define REQFLAG_NOPARITY 0x1000 325 #define REQFLAG_STOPQ 0x2000 326 #define REQFLAG_XTRASNS 0x4000 327 #define REQFLAG_PRIORITY 0x8000 328 329 typedef struct { 330 isphdr_t req_header; 331 u_int32_t req_handle; 332 u_int8_t req_lun_trn; 333 u_int8_t req_target; 334 u_int16_t req_cdblen; 335 u_int16_t req_flags; 336 u_int16_t _res1; 337 u_int16_t req_time; 338 u_int16_t req_seg_count; 339 u_int8_t req_cdb[44]; 340 } ispextreq_t; 341 342 #define ISP_CDSEG 7 343 typedef struct { 344 isphdr_t req_header; 345 u_int32_t _res1; 346 ispds_t req_dataseg[ISP_CDSEG]; 347 } ispcontreq_t; 348 349 typedef struct { 350 isphdr_t req_header; 351 u_int32_t req_handle; 352 u_int16_t req_scsi_status; 353 u_int16_t req_completion_status; 354 u_int16_t req_state_flags; 355 u_int16_t req_status_flags; 356 u_int16_t req_time; 357 #define req_response_len req_time /* FC only */ 358 u_int16_t req_sense_len; 359 u_int32_t req_resid; 360 u_int8_t _res1[8]; 361 u_int8_t req_sense_data[32]; 362 } ispstatusreq_t; 363 364 /* 365 * For Qlogic 2100, the high order byte of SCSI status has 366 * additional meaning. 367 */ 368 #define RQCS_RU 0x800 /* Residual Under */ 369 #define RQCS_RO 0x400 /* Residual Over */ 370 #define RQCS_SV 0x200 /* Sense Length Valid */ 371 #define RQCS_RV 0x100 /* Residual Valid */ 372 373 /* 374 * Completion Status Codes. 375 */ 376 #define RQCS_COMPLETE 0x0000 377 #define RQCS_INCOMPLETE 0x0001 378 #define RQCS_DMA_ERROR 0x0002 379 #define RQCS_TRANSPORT_ERROR 0x0003 380 #define RQCS_RESET_OCCURRED 0x0004 381 #define RQCS_ABORTED 0x0005 382 #define RQCS_TIMEOUT 0x0006 383 #define RQCS_DATA_OVERRUN 0x0007 384 #define RQCS_COMMAND_OVERRUN 0x0008 385 #define RQCS_STATUS_OVERRUN 0x0009 386 #define RQCS_BAD_MESSAGE 0x000a 387 #define RQCS_NO_MESSAGE_OUT 0x000b 388 #define RQCS_EXT_ID_FAILED 0x000c 389 #define RQCS_IDE_MSG_FAILED 0x000d 390 #define RQCS_ABORT_MSG_FAILED 0x000e 391 #define RQCS_REJECT_MSG_FAILED 0x000f 392 #define RQCS_NOP_MSG_FAILED 0x0010 393 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 394 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 395 #define RQCS_ID_MSG_FAILED 0x0013 396 #define RQCS_UNEXP_BUS_FREE 0x0014 397 #define RQCS_DATA_UNDERRUN 0x0015 398 #define RQCS_XACT_ERR1 0x0018 399 #define RQCS_XACT_ERR2 0x0019 400 #define RQCS_XACT_ERR3 0x001A 401 #define RQCS_BAD_ENTRY 0x001B 402 #define RQCS_QUEUE_FULL 0x001C 403 #define RQCS_PHASE_SKIPPED 0x001D 404 #define RQCS_ARQS_FAILED 0x001E 405 #define RQCS_WIDE_FAILED 0x001F 406 #define RQCS_SYNCXFER_FAILED 0x0020 407 #define RQCS_LVD_BUSERR 0x0021 408 409 /* 2100 Only Completion Codes */ 410 #define RQCS_PORT_UNAVAILABLE 0x0028 411 #define RQCS_PORT_LOGGED_OUT 0x0029 412 #define RQCS_PORT_CHANGED 0x002A 413 #define RQCS_PORT_BUSY 0x002B 414 415 /* 416 * State Flags (not applicable to 2100) 417 */ 418 #define RQSF_GOT_BUS 0x0100 419 #define RQSF_GOT_TARGET 0x0200 420 #define RQSF_SENT_CDB 0x0400 421 #define RQSF_XFRD_DATA 0x0800 422 #define RQSF_GOT_STATUS 0x1000 423 #define RQSF_GOT_SENSE 0x2000 424 #define RQSF_XFER_COMPLETE 0x4000 425 426 /* 427 * Status Flags (not applicable to 2100) 428 */ 429 #define RQSTF_DISCONNECT 0x0001 430 #define RQSTF_SYNCHRONOUS 0x0002 431 #define RQSTF_PARITY_ERROR 0x0004 432 #define RQSTF_BUS_RESET 0x0008 433 #define RQSTF_DEVICE_RESET 0x0010 434 #define RQSTF_ABORTED 0x0020 435 #define RQSTF_TIMEOUT 0x0040 436 #define RQSTF_NEGOTIATION 0x0080 437 438 /* 439 * FC (ISP2100) specific data structures 440 */ 441 442 /* 443 * Initialization Control Block 444 * 445 * Version One (prime) format. 446 */ 447 typedef struct isp_icb { 448 u_int8_t icb_version; 449 u_int8_t _reserved0; 450 u_int16_t icb_fwoptions; 451 u_int16_t icb_maxfrmlen; 452 u_int16_t icb_maxalloc; 453 u_int16_t icb_execthrottle; 454 u_int8_t icb_retry_count; 455 u_int8_t icb_retry_delay; 456 u_int8_t icb_portname[8]; 457 u_int16_t icb_hardaddr; 458 u_int8_t icb_iqdevtype; 459 u_int8_t icb_logintime; 460 u_int8_t icb_nodename[8]; 461 u_int16_t icb_rqstout; 462 u_int16_t icb_rspnsin; 463 u_int16_t icb_rqstqlen; 464 u_int16_t icb_rsltqlen; 465 u_int16_t icb_rqstaddr[4]; 466 u_int16_t icb_respaddr[4]; 467 u_int16_t icb_lunenables; 468 u_int8_t icb_ccnt; 469 u_int8_t icb_icnt; 470 u_int16_t icb_lunetimeout; 471 u_int16_t _reserved1; 472 u_int16_t icb_xfwoptions; 473 u_int8_t icb_racctimer; 474 u_int8_t icb_idelaytimer; 475 u_int16_t icb_zfwoptions; 476 u_int16_t _reserved2[13]; 477 } isp_icb_t; 478 #define ICB_VERSION1 1 479 480 #define ICBOPT_HARD_ADDRESS 0x0001 481 #define ICBOPT_FAIRNESS 0x0002 482 #define ICBOPT_FULL_DUPLEX 0x0004 483 #define ICBOPT_FAST_POST 0x0008 484 #define ICBOPT_TGT_ENABLE 0x0010 485 #define ICBOPT_INI_DISABLE 0x0020 486 #define ICBOPT_INI_ADISC 0x0040 487 #define ICBOPT_INI_TGTTYPE 0x0080 488 #define ICBOPT_PDBCHANGE_AE 0x0100 489 #define ICBOPT_NOLIP 0x0200 490 #define ICBOPT_SRCHDOWN 0x0400 491 #define ICBOPT_PREVLOOP 0x0800 492 #define ICBOPT_STOP_ON_QFULL 0x1000 493 #define ICBOPT_FULL_LOGIN 0x2000 494 #define ICBOPT_USE_PORTNAME 0x4000 495 #define ICBOPT_EXTENDED 0x8000 496 497 498 #define ICB_MIN_FRMLEN 256 499 #define ICB_MAX_FRMLEN 2112 500 #define ICB_DFLT_FRMLEN 1024 501 #define ICB_DFLT_ALLOC 256 502 #define ICB_DFLT_THROTTLE 16 503 #define ICB_DFLT_RDELAY 5 504 #define ICB_DFLT_RCOUNT 3 505 506 507 #define RQRSP_ADDR0015 0 508 #define RQRSP_ADDR1631 1 509 #define RQRSP_ADDR3247 2 510 #define RQRSP_ADDR4863 3 511 512 513 #define ICB_NNM0 7 514 #define ICB_NNM1 6 515 #define ICB_NNM2 5 516 #define ICB_NNM3 4 517 #define ICB_NNM4 3 518 #define ICB_NNM5 2 519 #define ICB_NNM6 1 520 #define ICB_NNM7 0 521 522 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 523 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 524 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 525 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 526 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 527 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 528 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 529 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 530 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 531 532 /* 533 * Port Data Base Element 534 */ 535 536 typedef struct { 537 u_int16_t pdb_options; 538 u_int8_t pdb_mstate; 539 u_int8_t pdb_sstate; 540 #define BITS2WORD(x) (x)[0] << 16 | (x)[3] << 8 | (x)[2] 541 u_int8_t pdb_hardaddr_bits[4]; 542 u_int8_t pdb_portid_bits[4]; 543 u_int8_t pdb_nodename[8]; 544 u_int8_t pdb_portname[8]; 545 u_int16_t pdb_execthrottle; 546 u_int16_t pdb_exec_count; 547 u_int8_t pdb_retry_count; 548 u_int8_t pdb_retry_delay; 549 u_int16_t pdb_resalloc; 550 u_int16_t pdb_curalloc; 551 u_int16_t pdb_qhead; 552 u_int16_t pdb_qtail; 553 u_int16_t pdb_tl_next; 554 u_int16_t pdb_tl_last; 555 u_int16_t pdb_features; /* PLOGI, Common Service */ 556 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 557 u_int16_t pdb_roi; /* PLOGI, Common Service */ 558 u_int8_t pdb_target; 559 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 560 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 561 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 562 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 563 u_int16_t pdb_labrtflg; 564 u_int16_t pdb_lstopflg; 565 u_int16_t pdb_sqhead; 566 u_int16_t pdb_sqtail; 567 u_int16_t pdb_ptimer; 568 u_int16_t pdb_nxt_seqid; 569 u_int16_t pdb_fcount; 570 u_int16_t pdb_prli_len; 571 u_int16_t pdb_prli_svc0; 572 u_int16_t pdb_prli_svc3; 573 u_int16_t pdb_loopid; 574 u_int16_t pdb_il_ptr; 575 u_int16_t pdb_sl_ptr; 576 } isp_pdb_t; 577 578 #define PDB_OPTIONS_XMITTING (1<<11) 579 #define PDB_OPTIONS_LNKXMIT (1<<10) 580 #define PDB_OPTIONS_ABORTED (1<<9) 581 #define PDB_OPTIONS_ADISC (1<<1) 582 583 #define PDB_STATE_DISCOVERY 0 584 #define PDB_STATE_WDISC_ACK 1 585 #define PDB_STATE_PLOGI 2 586 #define PDB_STATE_PLOGI_ACK 3 587 #define PDB_STATE_PRLI 4 588 #define PDB_STATE_PRLI_ACK 5 589 #define PDB_STATE_LOGGED_IN 6 590 #define PDB_STATE_PORT_UNAVAIL 7 591 #define PDB_STATE_PRLO 8 592 #define PDB_STATE_PRLO_ACK 9 593 #define PDB_STATE_PLOGO 10 594 #define PDB_STATE_PLOG_ACK 11 595 596 #define SVC3_TGT_ROLE 0x10 597 #define SVC3_INI_ROLE 0x20 598 #define SVC3_ROLE_MASK 0x30 599 #define SVC3_ROLE_SHIFT 4 600 601 #define SNS_GAN 0x100 602 #define SNS_GP3 0x171 603 typedef struct { 604 u_int16_t snscb_rblen; /* response buffer length (words) */ 605 u_int16_t snscb_res0; 606 u_int16_t snscb_addr[4]; /* response buffer address */ 607 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 608 u_int16_t snscb_res1; 609 u_int16_t snscb_data[1]; /* variable data */ 610 } sns_screq_t; /* Subcommand Request Structure */ 611 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 612 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 613 614 typedef struct { 615 u_int8_t snscb_cthdr[16]; 616 u_int8_t snscb_port_type; 617 u_int8_t snscb_port_id[3]; 618 u_int8_t snscb_portname[8]; 619 u_int16_t snscb_data[1]; /* variable data */ 620 } sns_scrsp_t; /* Subcommand Response Structure */ 621 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 622 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 623 624 #endif /* _ISPMBOX_H */ 625