1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33 #ifndef _ISPMBOX_H 34 #define _ISPMBOX_H 35 36 /* 37 * Mailbox Command Opcodes 38 */ 39 #define MBOX_NO_OP 0x0000 40 #define MBOX_LOAD_RAM 0x0001 41 #define MBOX_EXEC_FIRMWARE 0x0002 42 #define MBOX_DUMP_RAM 0x0003 43 #define MBOX_WRITE_RAM_WORD 0x0004 44 #define MBOX_READ_RAM_WORD 0x0005 45 #define MBOX_MAILBOX_REG_TEST 0x0006 46 #define MBOX_VERIFY_CHECKSUM 0x0007 47 #define MBOX_ABOUT_FIRMWARE 0x0008 48 #define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50 #define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53 #define MBOX_CHECK_FIRMWARE 0x000e 54 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55 #define MBOX_INIT_REQ_QUEUE 0x0010 56 #define MBOX_INIT_RES_QUEUE 0x0011 57 #define MBOX_EXECUTE_IOCB 0x0012 58 #define MBOX_WAKE_UP 0x0013 59 #define MBOX_STOP_FIRMWARE 0x0014 60 #define MBOX_ABORT 0x0015 61 #define MBOX_ABORT_DEVICE 0x0016 62 #define MBOX_ABORT_TARGET 0x0017 63 #define MBOX_BUS_RESET 0x0018 64 #define MBOX_STOP_QUEUE 0x0019 65 #define MBOX_START_QUEUE 0x001a 66 #define MBOX_SINGLE_STEP_QUEUE 0x001b 67 #define MBOX_ABORT_QUEUE 0x001c 68 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70 #define MBOX_GET_FIRMWARE_STATUS 0x001f 71 #define MBOX_GET_INIT_SCSI_ID 0x0020 72 #define MBOX_GET_SELECT_TIMEOUT 0x0021 73 #define MBOX_GET_RETRY_COUNT 0x0022 74 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 75 #define MBOX_GET_CLOCK_RATE 0x0024 76 #define MBOX_GET_ACT_NEG_STATE 0x0025 77 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78 #define MBOX_GET_SBUS_PARAMS 0x0027 79 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80 #define MBOX_GET_TARGET_PARAMS 0x0028 81 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88 #define MBOX_SET_INIT_SCSI_ID 0x0030 89 #define MBOX_SET_SELECT_TIMEOUT 0x0031 90 #define MBOX_SET_RETRY_COUNT 0x0032 91 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 92 #define MBOX_SET_CLOCK_RATE 0x0034 93 #define MBOX_SET_ACT_NEG_STATE 0x0035 94 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96 #define MBOX_SET_PCI_PARAMETERS 0x0037 97 #define MBOX_SET_TARGET_PARAMS 0x0038 98 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107 #define MBOX_EXEC_BIOS_IOCB 0x0042 108 #define MBOX_SET_FW_FEATURES 0x004a 109 #define MBOX_GET_FW_FEATURES 0x004b 110 #define FW_FEATURE_FAST_POST 0x1 111 #define FW_FEATURE_LVD_NOTIFY 0x2 112 #define FW_FEATURE_RIO_32BIT 0x4 113 #define FW_FEATURE_RIO_16BIT 0x8 114 115 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 116 #define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118 #define MBOX_ENABLE_TARGET_MODE 0x0055 119 #define ENABLE_TARGET_FLAG 0x8000 120 #define ENABLE_TQING_FLAG 0x0004 121 #define ENABLE_MANDATORY_DISC 0x0002 122 #define MBOX_GET_TARGET_STATUS 0x0056 123 124 /* These are for the ISP2X00 FC cards */ 125 #define MBOX_GET_LOOP_ID 0x0020 126 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127 #define ISP24XX_INORDER 0x0100 128 #define ISP24XX_NPIV_SAN 0x0400 129 #define ISP24XX_VSAN_SAN 0x1000 130 #define ISP24XX_FC_SP_SAN 0x2000 131 132 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134 #define MBOX_GET_RESOURCE_COUNT 0x0042 135 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 136 #define MBOX_ENHANCED_GET_PDB 0x0047 137 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141 #define MBOX_INIT_FIRMWARE 0x0060 142 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143 #define MBOX_INIT_LIP 0x0062 144 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145 #define MBOX_GET_PORT_DB 0x0064 146 #define MBOX_CLEAR_ACA 0x0065 147 #define MBOX_TARGET_RESET 0x0066 148 #define MBOX_CLEAR_TASK_SET 0x0067 149 #define MBOX_ABORT_TASK_SET 0x0068 150 #define MBOX_GET_FW_STATE 0x0069 151 #define MBOX_GET_PORT_NAME 0x006A 152 #define MBOX_GET_LINK_STATUS 0x006B 153 #define MBOX_INIT_LIP_RESET 0x006C 154 #define MBOX_SEND_SNS 0x006E 155 #define MBOX_FABRIC_LOGIN 0x006F 156 #define MBOX_SEND_CHANGE_REQUEST 0x0070 157 #define MBOX_FABRIC_LOGOUT 0x0071 158 #define MBOX_INIT_LIP_LOGIN 0x0072 159 #define MBOX_LUN_RESET 0x007E 160 161 #define MBOX_DRIVER_HEARTBEAT 0x005B 162 #define MBOX_FW_HEARTBEAT 0x005C 163 164 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 165 #define MBGSD_GET_RATE 0 166 #define MBGSD_SET_RATE 1 167 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 168 #define MBGSD_ONEGB 0 169 #define MBGSD_TWOGB 1 170 #define MBGSD_AUTO 2 171 #define MBGSD_FOURGB 3 /* 24XX only */ 172 #define MBGSD_EIGHTGB 4 /* 25XX only */ 173 174 175 #define ISP2100_SET_PCI_PARAM 0x00ff 176 177 #define MBOX_BUSY 0x04 178 179 /* 180 * Mailbox Command Complete Status Codes 181 */ 182 #define MBOX_COMMAND_COMPLETE 0x4000 183 #define MBOX_INVALID_COMMAND 0x4001 184 #define MBOX_HOST_INTERFACE_ERROR 0x4002 185 #define MBOX_TEST_FAILED 0x4003 186 #define MBOX_COMMAND_ERROR 0x4005 187 #define MBOX_COMMAND_PARAM_ERROR 0x4006 188 #define MBOX_PORT_ID_USED 0x4007 189 #define MBOX_LOOP_ID_USED 0x4008 190 #define MBOX_ALL_IDS_USED 0x4009 191 #define MBOX_NOT_LOGGED_IN 0x400A 192 /* pseudo mailbox completion codes */ 193 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 194 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 195 196 #define MBLOGALL 0x000f 197 #define MBLOGNONE 0x0000 198 #define MBLOGMASK(x) ((x) & 0xf) 199 200 /* 201 * Asynchronous event status codes 202 */ 203 #define ASYNC_BUS_RESET 0x8001 204 #define ASYNC_SYSTEM_ERROR 0x8002 205 #define ASYNC_RQS_XFER_ERR 0x8003 206 #define ASYNC_RSP_XFER_ERR 0x8004 207 #define ASYNC_QWAKEUP 0x8005 208 #define ASYNC_TIMEOUT_RESET 0x8006 209 #define ASYNC_DEVICE_RESET 0x8007 210 #define ASYNC_EXTMSG_UNDERRUN 0x800A 211 #define ASYNC_SCAM_INT 0x800B 212 #define ASYNC_HUNG_SCSI 0x800C 213 #define ASYNC_KILLED_BUS 0x800D 214 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 215 #define ASYNC_LIP_OCCURRED 0x8010 216 #define ASYNC_LOOP_UP 0x8011 217 #define ASYNC_LOOP_DOWN 0x8012 218 #define ASYNC_LOOP_RESET 0x8013 219 #define ASYNC_PDB_CHANGED 0x8014 220 #define ASYNC_CHANGE_NOTIFY 0x8015 221 #define ASYNC_LIP_F8 0x8016 222 #define ASYNC_LIP_ERROR 0x8017 223 #define ASYNC_SECURITY_UPDATE 0x801B 224 #define ASYNC_CMD_CMPLT 0x8020 225 #define ASYNC_CTIO_DONE 0x8021 226 #define ASYNC_RIO32_1 0x8021 227 #define ASYNC_RIO32_2 0x8022 228 #define ASYNC_IP_XMIT_DONE 0x8022 229 #define ASYNC_IP_RECV_DONE 0x8023 230 #define ASYNC_IP_BROADCAST 0x8024 231 #define ASYNC_IP_RCVQ_LOW 0x8025 232 #define ASYNC_IP_RCVQ_EMPTY 0x8026 233 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 234 #define ASYNC_PTPMODE 0x8030 235 #define ASYNC_RIO16_1 0x8031 236 #define ASYNC_RIO16_2 0x8032 237 #define ASYNC_RIO16_3 0x8033 238 #define ASYNC_RIO16_4 0x8034 239 #define ASYNC_RIO16_5 0x8035 240 #define ASYNC_CONNMODE 0x8036 241 #define ISP_CONN_LOOP 1 242 #define ISP_CONN_PTP 2 243 #define ISP_CONN_BADLIP 3 244 #define ISP_CONN_FATAL 4 245 #define ISP_CONN_LOOPBACK 5 246 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 247 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 248 #define ASYNC_RCV_ERR 0x8048 249 250 /* 251 * Firmware Options. There are a lot of them. 252 * 253 * IFCOPTN - ISP Fibre Channel Option Word N 254 */ 255 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 256 #define IFCOPT1_EAABSRCVD (1 << 12) 257 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 258 #define IFCOPT1_ENAPURE (1 << 10) 259 #define IFCOPT1_ENA8017 (1 << 7) 260 #define IFCOPT1_DISGPIO67 (1 << 6) 261 #define IFCOPT1_LIPLOSSIMM (1 << 5) 262 #define IFCOPT1_DISF7SWTCH (1 << 4) 263 #define IFCOPT1_CTIO_RETRY (1 << 3) 264 #define IFCOPT1_LIPASYNC (1 << 1) 265 #define IFCOPT1_LIPF8 (1 << 0) 266 267 #define IFCOPT2_LOOPBACK (1 << 1) 268 #define IFCOPT2_ATIO3_ONLY (1 << 0) 269 270 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 271 #define IFCOPT3_RNDASYNC (1 << 1) 272 /* 273 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 274 * mailbox command to enable this. 275 */ 276 #define ASYNC_QFULL_SENT 0x8049 277 278 /* 279 * Needs to be enabled 280 */ 281 #define ASYNC_AUTO_PLOGI_RJT 0x8018 282 /* 283 * 24XX only 284 */ 285 #define ASYNC_RJT_SENT 0x8049 286 287 /* 288 * All IOCB Queue entries are this size 289 */ 290 #define QENTRY_LEN 64 291 292 /* 293 * Command Structure Definitions 294 */ 295 296 typedef struct { 297 uint32_t ds_base; 298 uint32_t ds_count; 299 } ispds_t; 300 301 typedef struct { 302 uint32_t ds_base; 303 uint32_t ds_basehi; 304 uint32_t ds_count; 305 } ispds64_t; 306 307 #define DSTYPE_32BIT 0 308 #define DSTYPE_64BIT 1 309 typedef struct { 310 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 311 uint32_t ds_segment; /* unused */ 312 uint32_t ds_base; /* 32 bit address of DSD list */ 313 } ispdslist_t; 314 315 316 typedef struct { 317 uint8_t rqs_entry_type; 318 uint8_t rqs_entry_count; 319 uint8_t rqs_seqno; 320 uint8_t rqs_flags; 321 } isphdr_t; 322 323 /* RQS Flag definitions */ 324 #define RQSFLAG_CONTINUATION 0x01 325 #define RQSFLAG_FULL 0x02 326 #define RQSFLAG_BADHEADER 0x04 327 #define RQSFLAG_BADPACKET 0x08 328 #define RQSFLAG_BADCOUNT 0x10 329 #define RQSFLAG_BADORDER 0x20 330 #define RQSFLAG_MASK 0x3f 331 332 /* RQS entry_type definitions */ 333 #define RQSTYPE_REQUEST 0x01 334 #define RQSTYPE_DATASEG 0x02 335 #define RQSTYPE_RESPONSE 0x03 336 #define RQSTYPE_MARKER 0x04 337 #define RQSTYPE_CMDONLY 0x05 338 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 339 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 340 #define RQSTYPE_SCAM 0x08 341 #define RQSTYPE_A64 0x09 342 #define RQSTYPE_A64_CONT 0x0a 343 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 344 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 345 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 346 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 347 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 348 #define RQSTYPE_STATUS_CONT 0x10 349 #define RQSTYPE_T2RQS 0x11 350 #define RQSTYPE_CTIO7 0x12 351 #define RQSTYPE_IP_XMIT 0x13 352 #define RQSTYPE_TSK_MGMT 0x14 353 #define RQSTYPE_T4RQS 0x15 354 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 355 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 356 #define RQSTYPE_T7RQS 0x18 357 #define RQSTYPE_T3RQS 0x19 358 #define RQSTYPE_IP_XMIT_64 0x1b 359 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 360 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 361 #define RQSTYPE_RIO1 0x21 362 #define RQSTYPE_RIO2 0x22 363 #define RQSTYPE_IP_RECV 0x23 364 #define RQSTYPE_IP_RECV_CONT 0x24 365 #define RQSTYPE_CT_PASSTHRU 0x29 366 #define RQSTYPE_MS_PASSTHRU 0x29 367 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 368 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 369 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 370 #define RQSTYPE_ABORT_IO 0x33 371 #define RQSTYPE_T6RQS 0x48 372 #define RQSTYPE_LOGIN 0x52 373 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 374 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 375 376 377 #define ISP_RQDSEG 4 378 typedef struct { 379 isphdr_t req_header; 380 uint32_t req_handle; 381 uint8_t req_lun_trn; 382 uint8_t req_target; 383 uint16_t req_cdblen; 384 uint16_t req_flags; 385 uint16_t req_reserved; 386 uint16_t req_time; 387 uint16_t req_seg_count; 388 uint8_t req_cdb[12]; 389 ispds_t req_dataseg[ISP_RQDSEG]; 390 } ispreq_t; 391 #define ISP_RQDSEG_A64 2 392 393 typedef struct { 394 isphdr_t mrk_header; 395 uint32_t mrk_handle; 396 uint8_t mrk_reserved0; 397 uint8_t mrk_target; 398 uint16_t mrk_modifier; 399 uint16_t mrk_flags; 400 uint16_t mrk_lun; 401 uint8_t mrk_reserved1[48]; 402 } isp_marker_t; 403 404 typedef struct { 405 isphdr_t mrk_header; 406 uint32_t mrk_handle; 407 uint16_t mrk_nphdl; 408 uint8_t mrk_modifier; 409 uint8_t mrk_reserved0; 410 uint8_t mrk_reserved1; 411 uint8_t mrk_vphdl; 412 uint16_t mrk_reserved2; 413 uint8_t mrk_lun[8]; 414 uint8_t mrk_reserved3[40]; 415 } isp_marker_24xx_t; 416 417 418 #define SYNC_DEVICE 0 419 #define SYNC_TARGET 1 420 #define SYNC_ALL 2 421 #define SYNC_LIP 3 422 423 #define ISP_RQDSEG_T2 3 424 typedef struct { 425 isphdr_t req_header; 426 uint32_t req_handle; 427 uint8_t req_lun_trn; 428 uint8_t req_target; 429 uint16_t req_scclun; 430 uint16_t req_flags; 431 uint8_t req_crn; 432 uint8_t req_reserved; 433 uint16_t req_time; 434 uint16_t req_seg_count; 435 uint8_t req_cdb[16]; 436 uint32_t req_totalcnt; 437 ispds_t req_dataseg[ISP_RQDSEG_T2]; 438 } ispreqt2_t; 439 440 typedef struct { 441 isphdr_t req_header; 442 uint32_t req_handle; 443 uint16_t req_target; 444 uint16_t req_scclun; 445 uint16_t req_flags; 446 uint16_t req_reserved; 447 uint16_t req_time; 448 uint16_t req_seg_count; 449 uint8_t req_cdb[16]; 450 uint32_t req_totalcnt; 451 ispds_t req_dataseg[ISP_RQDSEG_T2]; 452 } ispreqt2e_t; 453 454 #define ISP_RQDSEG_T3 2 455 typedef struct { 456 isphdr_t req_header; 457 uint32_t req_handle; 458 uint8_t req_lun_trn; 459 uint8_t req_target; 460 uint16_t req_scclun; 461 uint16_t req_flags; 462 uint8_t req_crn; 463 uint8_t req_reserved; 464 uint16_t req_time; 465 uint16_t req_seg_count; 466 uint8_t req_cdb[16]; 467 uint32_t req_totalcnt; 468 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 469 } ispreqt3_t; 470 #define ispreq64_t ispreqt3_t /* same as.... */ 471 472 typedef struct { 473 isphdr_t req_header; 474 uint32_t req_handle; 475 uint16_t req_target; 476 uint16_t req_scclun; 477 uint16_t req_flags; 478 uint8_t req_crn; 479 uint8_t req_reserved; 480 uint16_t req_time; 481 uint16_t req_seg_count; 482 uint8_t req_cdb[16]; 483 uint32_t req_totalcnt; 484 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 485 } ispreqt3e_t; 486 487 /* req_flag values */ 488 #define REQFLAG_NODISCON 0x0001 489 #define REQFLAG_HTAG 0x0002 490 #define REQFLAG_OTAG 0x0004 491 #define REQFLAG_STAG 0x0008 492 #define REQFLAG_TARGET_RTN 0x0010 493 494 #define REQFLAG_NODATA 0x0000 495 #define REQFLAG_DATA_IN 0x0020 496 #define REQFLAG_DATA_OUT 0x0040 497 #define REQFLAG_DATA_UNKNOWN 0x0060 498 499 #define REQFLAG_DISARQ 0x0100 500 #define REQFLAG_FRC_ASYNC 0x0200 501 #define REQFLAG_FRC_SYNC 0x0400 502 #define REQFLAG_FRC_WIDE 0x0800 503 #define REQFLAG_NOPARITY 0x1000 504 #define REQFLAG_STOPQ 0x2000 505 #define REQFLAG_XTRASNS 0x4000 506 #define REQFLAG_PRIORITY 0x8000 507 508 typedef struct { 509 isphdr_t req_header; 510 uint32_t req_handle; 511 uint8_t req_lun_trn; 512 uint8_t req_target; 513 uint16_t req_cdblen; 514 uint16_t req_flags; 515 uint16_t req_reserved; 516 uint16_t req_time; 517 uint16_t req_seg_count; 518 uint8_t req_cdb[44]; 519 } ispextreq_t; 520 521 522 /* 523 * ISP24XX structures 524 */ 525 typedef struct { 526 isphdr_t req_header; 527 uint32_t req_handle; 528 uint16_t req_nphdl; 529 uint16_t req_time; 530 uint16_t req_seg_count; 531 uint16_t req_reserved; 532 uint8_t req_lun[8]; 533 uint8_t req_alen_datadir; 534 uint8_t req_task_management; 535 uint8_t req_task_attribute; 536 uint8_t req_crn; 537 uint8_t req_cdb[16]; 538 uint32_t req_dl; 539 uint16_t req_tidlo; 540 uint8_t req_tidhi; 541 uint8_t req_vpidx; 542 ispds64_t req_dataseg; 543 } ispreqt7_t; 544 545 /* Task Management Request Function */ 546 typedef struct { 547 isphdr_t tmf_header; 548 uint32_t tmf_handle; 549 uint16_t tmf_nphdl; 550 uint8_t tmf_reserved0[2]; 551 uint16_t tmf_delay; 552 uint16_t tmf_timeout; 553 uint8_t tmf_lun[8]; 554 uint32_t tmf_flags; 555 uint8_t tmf_reserved1[20]; 556 uint16_t tmf_tidlo; 557 uint8_t tmf_tidhi; 558 uint8_t tmf_vpidx; 559 uint8_t tmf_reserved2[12]; 560 } isp24xx_tmf_t; 561 562 #define ISP24XX_TMF_NOSEND 0x80000000 563 564 #define ISP24XX_TMF_LUN_RESET 0x00000010 565 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 566 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 567 #define ISP24XX_TMF_TARGET_RESET 0x00000002 568 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 569 570 /* I/O Abort Structure */ 571 typedef struct { 572 isphdr_t abrt_header; 573 uint32_t abrt_handle; 574 uint16_t abrt_nphdl; 575 uint16_t abrt_options; 576 uint32_t abrt_cmd_handle; 577 uint8_t abrt_reserved[32]; 578 uint16_t abrt_tidlo; 579 uint8_t abrt_tidhi; 580 uint8_t abrt_vpidx; 581 uint8_t abrt_reserved1[12]; 582 } isp24xx_abrt_t; 583 584 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 585 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 586 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 587 588 #define ISP_CDSEG 7 589 typedef struct { 590 isphdr_t req_header; 591 uint32_t req_reserved; 592 ispds_t req_dataseg[ISP_CDSEG]; 593 } ispcontreq_t; 594 595 #define ISP_CDSEG64 5 596 typedef struct { 597 isphdr_t req_header; 598 ispds64_t req_dataseg[ISP_CDSEG64]; 599 } ispcontreq64_t; 600 601 typedef struct { 602 isphdr_t req_header; 603 uint32_t req_handle; 604 uint16_t req_scsi_status; 605 uint16_t req_completion_status; 606 uint16_t req_state_flags; 607 uint16_t req_status_flags; 608 uint16_t req_time; 609 #define req_response_len req_time /* FC only */ 610 uint16_t req_sense_len; 611 uint32_t req_resid; 612 uint8_t req_response[8]; /* FC only */ 613 uint8_t req_sense_data[32]; 614 } ispstatusreq_t; 615 616 /* 617 * Status Continuation 618 */ 619 typedef struct { 620 isphdr_t req_header; 621 uint8_t req_sense_data[60]; 622 } ispstatus_cont_t; 623 624 /* 625 * 24XX Type 0 status 626 */ 627 typedef struct { 628 isphdr_t req_header; 629 uint32_t req_handle; 630 uint16_t req_completion_status; 631 uint16_t req_oxid; 632 uint32_t req_resid; 633 uint16_t req_reserved0; 634 uint16_t req_state_flags; 635 uint16_t req_retry_delay; /* aka Status Qualifier */ 636 uint16_t req_scsi_status; 637 uint32_t req_fcp_residual; 638 uint32_t req_sense_len; 639 uint32_t req_response_len; 640 uint8_t req_rsp_sense[28]; 641 } isp24xx_statusreq_t; 642 643 /* 644 * For Qlogic 2X00, the high order byte of SCSI status has 645 * additional meaning. 646 */ 647 #define RQCS_CR 0x1000 /* Confirmation Request */ 648 #define RQCS_RU 0x0800 /* Residual Under */ 649 #define RQCS_RO 0x0400 /* Residual Over */ 650 #define RQCS_RESID (RQCS_RU|RQCS_RO) 651 #define RQCS_SV 0x0200 /* Sense Length Valid */ 652 #define RQCS_RV 0x0100 /* FCP Response Length Valid */ 653 654 /* 655 * CT Passthru IOCB 656 */ 657 typedef struct { 658 isphdr_t ctp_header; 659 uint32_t ctp_handle; 660 uint16_t ctp_status; 661 uint16_t ctp_nphdl; /* n-port handle */ 662 uint16_t ctp_cmd_cnt; /* Command DSD count */ 663 uint8_t ctp_vpidx; 664 uint8_t ctp_reserved0; 665 uint16_t ctp_time; 666 uint16_t ctp_reserved1; 667 uint16_t ctp_rsp_cnt; /* Response DSD count */ 668 uint16_t ctp_reserved2[5]; 669 uint32_t ctp_rsp_bcnt; /* Response byte count */ 670 uint32_t ctp_cmd_bcnt; /* Command byte count */ 671 ispds64_t ctp_dataseg[2]; 672 } isp_ct_pt_t; 673 674 /* 675 * MS Passthru IOCB 676 */ 677 typedef struct { 678 isphdr_t ms_header; 679 uint32_t ms_handle; 680 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 681 uint16_t ms_status; 682 uint16_t ms_flags; 683 uint16_t ms_reserved1; /* low 8 bits */ 684 uint16_t ms_time; 685 uint16_t ms_cmd_cnt; /* Command DSD count */ 686 uint16_t ms_tot_cnt; /* Total DSD Count */ 687 uint8_t ms_type; /* MS type */ 688 uint8_t ms_r_ctl; /* R_CTL */ 689 uint16_t ms_rxid; /* RX_ID */ 690 uint16_t ms_reserved2; 691 uint32_t ms_handle2; 692 uint32_t ms_rsp_bcnt; /* Response byte count */ 693 uint32_t ms_cmd_bcnt; /* Command byte count */ 694 ispds64_t ms_dataseg[2]; 695 } isp_ms_t; 696 697 /* 698 * Completion Status Codes. 699 */ 700 #define RQCS_COMPLETE 0x0000 701 #define RQCS_DMA_ERROR 0x0002 702 #define RQCS_RESET_OCCURRED 0x0004 703 #define RQCS_ABORTED 0x0005 704 #define RQCS_TIMEOUT 0x0006 705 #define RQCS_DATA_OVERRUN 0x0007 706 #define RQCS_DATA_UNDERRUN 0x0015 707 #define RQCS_QUEUE_FULL 0x001C 708 709 /* 1X00 Only Completion Codes */ 710 #define RQCS_INCOMPLETE 0x0001 711 #define RQCS_TRANSPORT_ERROR 0x0003 712 #define RQCS_COMMAND_OVERRUN 0x0008 713 #define RQCS_STATUS_OVERRUN 0x0009 714 #define RQCS_BAD_MESSAGE 0x000a 715 #define RQCS_NO_MESSAGE_OUT 0x000b 716 #define RQCS_EXT_ID_FAILED 0x000c 717 #define RQCS_IDE_MSG_FAILED 0x000d 718 #define RQCS_ABORT_MSG_FAILED 0x000e 719 #define RQCS_REJECT_MSG_FAILED 0x000f 720 #define RQCS_NOP_MSG_FAILED 0x0010 721 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 722 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 723 #define RQCS_ID_MSG_FAILED 0x0013 724 #define RQCS_UNEXP_BUS_FREE 0x0014 725 #define RQCS_XACT_ERR1 0x0018 726 #define RQCS_XACT_ERR2 0x0019 727 #define RQCS_XACT_ERR3 0x001A 728 #define RQCS_BAD_ENTRY 0x001B 729 #define RQCS_PHASE_SKIPPED 0x001D 730 #define RQCS_ARQS_FAILED 0x001E 731 #define RQCS_WIDE_FAILED 0x001F 732 #define RQCS_SYNCXFER_FAILED 0x0020 733 #define RQCS_LVD_BUSERR 0x0021 734 735 /* 2X00 Only Completion Codes */ 736 #define RQCS_PORT_UNAVAILABLE 0x0028 737 #define RQCS_PORT_LOGGED_OUT 0x0029 738 #define RQCS_PORT_CHANGED 0x002A 739 #define RQCS_PORT_BUSY 0x002B 740 741 /* 24XX Only Completion Codes */ 742 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 743 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 744 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 745 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 746 747 748 /* 749 * 1X00 specific State Flags 750 */ 751 #define RQSF_GOT_BUS 0x0100 752 #define RQSF_GOT_TARGET 0x0200 753 #define RQSF_SENT_CDB 0x0400 754 #define RQSF_XFRD_DATA 0x0800 755 #define RQSF_GOT_STATUS 0x1000 756 #define RQSF_GOT_SENSE 0x2000 757 #define RQSF_XFER_COMPLETE 0x4000 758 759 /* 760 * 2X00 specific State Flags 761 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 762 */ 763 #define RQSF_DATA_IN 0x0020 764 #define RQSF_DATA_OUT 0x0040 765 #define RQSF_STAG 0x0008 766 #define RQSF_OTAG 0x0004 767 #define RQSF_HTAG 0x0002 768 /* 769 * 1X00 Status Flags 770 */ 771 #define RQSTF_DISCONNECT 0x0001 772 #define RQSTF_SYNCHRONOUS 0x0002 773 #define RQSTF_PARITY_ERROR 0x0004 774 #define RQSTF_BUS_RESET 0x0008 775 #define RQSTF_DEVICE_RESET 0x0010 776 #define RQSTF_ABORTED 0x0020 777 #define RQSTF_TIMEOUT 0x0040 778 #define RQSTF_NEGOTIATION 0x0080 779 780 /* 781 * 2X00 specific state flags 782 */ 783 /* RQSF_SENT_CDB */ 784 /* RQSF_XFRD_DATA */ 785 /* RQSF_GOT_STATUS */ 786 /* RQSF_XFER_COMPLETE */ 787 788 /* 789 * 2X00 specific status flags 790 */ 791 /* RQSTF_ABORTED */ 792 /* RQSTF_TIMEOUT */ 793 #define RQSTF_DMA_ERROR 0x0080 794 #define RQSTF_LOGOUT 0x2000 795 796 /* 797 * Miscellaneous 798 */ 799 #ifndef ISP_EXEC_THROTTLE 800 #define ISP_EXEC_THROTTLE 16 801 #endif 802 803 /* 804 * About Firmware returns an 'attribute' word in mailbox 6. 805 * These attributes are for 2200 and 2300. 806 */ 807 #define ISP_FW_ATTR_TMODE 0x0001 808 #define ISP_FW_ATTR_SCCLUN 0x0002 809 #define ISP_FW_ATTR_FABRIC 0x0004 810 #define ISP_FW_ATTR_CLASS2 0x0008 811 #define ISP_FW_ATTR_FCTAPE 0x0010 812 #define ISP_FW_ATTR_IP 0x0020 813 #define ISP_FW_ATTR_VI 0x0040 814 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 815 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 816 817 /* and these are for the 2400 */ 818 #define ISP2400_FW_ATTR_CLASS2 0x0001 819 #define ISP2400_FW_ATTR_IP 0x0002 820 #define ISP2400_FW_ATTR_MULTIID 0x0004 821 #define ISP2400_FW_ATTR_SB2 0x0008 822 #define ISP2400_FW_ATTR_T10CRC 0x0010 823 #define ISP2400_FW_ATTR_VI 0x0020 824 #define ISP2400_FW_ATTR_MQ 0x0040 825 #define ISP2400_FW_ATTR_MSIX 0x0080 826 #define ISP2400_FW_ATTR_FCOE 0x0800 827 #define ISP2400_FW_ATTR_VP0 0x1000 828 #define ISP2400_FW_ATTR_EXPFW 0x2000 829 #define ISP2400_FW_ATTR_HOTFW 0x4000 830 #define ISP2400_FW_ATTR_EXTNDED 0x8000 831 #define ISP2400_FW_ATTR_EXTVP 0x00010000 832 #define ISP2400_FW_ATTR_VN2VN 0x00040000 833 #define ISP2400_FW_ATTR_EXMOFF 0x00080000 834 #define ISP2400_FW_ATTR_NPMOFF 0x00100000 835 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000 836 #define ISP2400_FW_ATTR_SRIOV 0x02000000 837 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000 838 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 839 840 /* 841 * These are either manifestly true or are dependent on f/w attributes 842 */ 843 #define ISP_CAP_TMODE(isp) \ 844 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 845 #define ISP_CAP_SCCFW(isp) \ 846 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 847 #define ISP_CAP_2KLOGIN(isp) \ 848 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 849 850 /* 851 * This is only true for 24XX cards with this f/w attribute 852 */ 853 #define ISP_CAP_MULTI_ID(isp) \ 854 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 855 #define ISP_GET_VPIDX(isp, tag) \ 856 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 857 858 /* 859 * This is true manifestly or is dependent on a f/w attribute 860 * but may or may not actually be *enabled*. In any case, it 861 * is enabled on a per-channel basis. 862 */ 863 #define ISP_CAP_FCTAPE(isp) \ 864 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 865 866 #define ISP_FCTAPE_ENABLED(isp, chan) \ 867 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 868 869 /* 870 * Reduced Interrupt Operation Response Queue Entries 871 */ 872 873 typedef struct { 874 isphdr_t req_header; 875 uint32_t req_handles[15]; 876 } isp_rio1_t; 877 878 typedef struct { 879 isphdr_t req_header; 880 uint16_t req_handles[30]; 881 } isp_rio2_t; 882 883 /* 884 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 885 */ 886 887 /* 888 * Initialization Control Block 889 * 890 * Version One (prime) format. 891 */ 892 typedef struct { 893 uint8_t icb_version; 894 uint8_t icb_reserved0; 895 uint16_t icb_fwoptions; 896 uint16_t icb_maxfrmlen; 897 uint16_t icb_maxalloc; 898 uint16_t icb_execthrottle; 899 uint8_t icb_retry_count; 900 uint8_t icb_retry_delay; 901 uint8_t icb_portname[8]; 902 uint16_t icb_hardaddr; 903 uint8_t icb_iqdevtype; 904 uint8_t icb_logintime; 905 uint8_t icb_nodename[8]; 906 uint16_t icb_rqstout; 907 uint16_t icb_rspnsin; 908 uint16_t icb_rqstqlen; 909 uint16_t icb_rsltqlen; 910 uint16_t icb_rqstaddr[4]; 911 uint16_t icb_respaddr[4]; 912 uint16_t icb_lunenables; 913 uint8_t icb_ccnt; 914 uint8_t icb_icnt; 915 uint16_t icb_lunetimeout; 916 uint16_t icb_reserved1; 917 uint16_t icb_xfwoptions; 918 uint8_t icb_racctimer; 919 uint8_t icb_idelaytimer; 920 uint16_t icb_zfwoptions; 921 uint16_t icb_reserved2[13]; 922 } isp_icb_t; 923 924 #define ICB_VERSION1 1 925 926 #define ICBOPT_EXTENDED 0x8000 927 #define ICBOPT_BOTH_WWNS 0x4000 928 #define ICBOPT_FULL_LOGIN 0x2000 929 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 930 #define ICBOPT_PREVLOOP 0x0800 931 #define ICBOPT_SRCHDOWN 0x0400 932 #define ICBOPT_NOLIP 0x0200 933 #define ICBOPT_PDBCHANGE_AE 0x0100 934 #define ICBOPT_TGT_TYPE 0x0080 935 #define ICBOPT_INI_ADISC 0x0040 936 #define ICBOPT_INI_DISABLE 0x0020 937 #define ICBOPT_TGT_ENABLE 0x0010 938 #define ICBOPT_FAST_POST 0x0008 939 #define ICBOPT_FULL_DUPLEX 0x0004 940 #define ICBOPT_FAIRNESS 0x0002 941 #define ICBOPT_HARD_ADDRESS 0x0001 942 943 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 944 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 945 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 946 #define ICBXOPT_FCTAPE 0x1000 947 #define ICBXOPT_CLASS2_ACK0 0x0200 948 #define ICBXOPT_CLASS2 0x0100 949 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 950 #define ICBXOPT_TOPO_MASK 0x0070 951 #define ICBXOPT_LOOP_ONLY 0x0000 952 #define ICBXOPT_PTP_ONLY 0x0010 953 #define ICBXOPT_LOOP_2_PTP 0x0020 954 #define ICBXOPT_PTP_2_LOOP 0x0030 955 /* 956 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 957 * RIO is not defined for the 23XX cards (just 2200) 958 */ 959 #define ICBXOPT_RIO_OFF 0 960 #define ICBXOPT_RIO_16BIT 1 961 #define ICBXOPT_RIO_32BIT 2 962 #define ICBXOPT_RIO_16BIT_IOCB 3 963 #define ICBXOPT_RIO_32BIT_IOCB 4 964 #define ICBXOPT_ZIO 5 965 #define ICBXOPT_TIMER_MASK 0x7 966 967 #define ICBZOPT_RATE_MASK 0xC000 968 #define ICBZOPT_RATE_ONEGB 0x0000 969 #define ICBZOPT_RATE_AUTO 0x8000 970 #define ICBZOPT_RATE_TWOGB 0x4000 971 #define ICBZOPT_50_OHM 0x2000 972 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 973 #define ICBZOPT_RSPSZ_MASK 0x0030 974 #define ICBZOPT_RSPSZ_24 0x0000 975 #define ICBZOPT_RSPSZ_12 0x0010 976 #define ICBZOPT_RSPSZ_24A 0x0020 977 #define ICBZOPT_RSPSZ_32 0x0030 978 #define ICBZOPT_SOFTID 0x0002 979 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 980 981 /* 2400 F/W options */ 982 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 983 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 984 #define ICB2400_OPT1_PREVLOOP 0x00000800 985 #define ICB2400_OPT1_SRCHDOWN 0x00000400 986 #define ICB2400_OPT1_NOLIP 0x00000200 987 #define ICB2400_OPT1_INI_DISABLE 0x00000020 988 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 989 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 990 #define ICB2400_OPT1_FAIRNESS 0x00000002 991 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 992 993 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 994 #define ICB2400_OPT2_ENA_IHA 0x04000000 995 #define ICB2400_OPT2_QOS 0x02000000 996 #define ICB2400_OPT2_IOCBS 0x01000000 997 #define ICB2400_OPT2_ENA_IHR 0x00400000 998 #define ICB2400_OPT2_ENA_VMS 0x00200000 999 #define ICB2400_OPT2_ENA_TA 0x00100000 1000 #define ICB2400_OPT2_TPRLIC 0x00004000 1001 #define ICB2400_OPT2_FCTAPE 0x00001000 1002 #define ICB2400_OPT2_FCSP 0x00000800 1003 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1004 #define ICB2400_OPT2_CLASS2 0x00000100 1005 #define ICB2400_OPT2_NO_PLAY 0x00000080 1006 #define ICB2400_OPT2_TOPO_MASK 0x00000070 1007 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 1008 #define ICB2400_OPT2_PTP_ONLY 0x00000010 1009 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1010 #define ICB2400_OPT2_TIMER_MASK 0x0000000f 1011 #define ICB2400_OPT2_ZIO 0x00000005 1012 #define ICB2400_OPT2_ZIO1 0x00000006 1013 1014 #define ICB2400_OPT3_NO_CTXDIS 0x40000000 1015 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1016 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1017 #define ICB2400_OPT3_ENA_MFCF 0x00020000 1018 #define ICB2400_OPT3_SKIP_FOURGB 0x00010000 1019 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1020 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 1021 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 1022 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1023 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 1024 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1025 #define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000 1026 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1027 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1028 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1029 #define ICB2400_OPT3_ENA_OOF 0x00000040 1030 /* note that a response size flag of zero is reserved! */ 1031 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1032 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1033 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1034 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1035 #define ICB2400_OPT3_SOFTID 0x00000002 1036 1037 #define ICB_MIN_FRMLEN 256 1038 #define ICB_MAX_FRMLEN 2112 1039 #define ICB_DFLT_FRMLEN 1024 1040 #define ICB_DFLT_ALLOC 256 1041 #define ICB_DFLT_THROTTLE 16 1042 #define ICB_DFLT_RDELAY 5 1043 #define ICB_DFLT_RCOUNT 3 1044 1045 #define ICB_LOGIN_TOV 30 1046 #define ICB_LUN_ENABLE_TOV 15 1047 1048 1049 /* 1050 * And somebody at QLogic had a great idea that you could just change 1051 * the structure *and* keep the version number the same as the other cards. 1052 */ 1053 typedef struct { 1054 uint16_t icb_version; 1055 uint16_t icb_reserved0; 1056 uint16_t icb_maxfrmlen; 1057 uint16_t icb_execthrottle; 1058 uint16_t icb_xchgcnt; 1059 uint16_t icb_hardaddr; 1060 uint8_t icb_portname[8]; 1061 uint8_t icb_nodename[8]; 1062 uint16_t icb_rspnsin; 1063 uint16_t icb_rqstout; 1064 uint16_t icb_retry_count; 1065 uint16_t icb_priout; 1066 uint16_t icb_rsltqlen; 1067 uint16_t icb_rqstqlen; 1068 uint16_t icb_ldn_nols; 1069 uint16_t icb_prqstqlen; 1070 uint16_t icb_rqstaddr[4]; 1071 uint16_t icb_respaddr[4]; 1072 uint16_t icb_priaddr[4]; 1073 uint16_t icb_msixresp; 1074 uint16_t icb_msixatio; 1075 uint16_t icb_reserved1[2]; 1076 uint16_t icb_atio_in; 1077 uint16_t icb_atioqlen; 1078 uint16_t icb_atioqaddr[4]; 1079 uint16_t icb_idelaytimer; 1080 uint16_t icb_logintime; 1081 uint32_t icb_fwoptions1; 1082 uint32_t icb_fwoptions2; 1083 uint32_t icb_fwoptions3; 1084 uint16_t icb_qos; 1085 uint16_t icb_reserved2[3]; 1086 uint16_t icb_enodemac[3]; 1087 uint16_t icb_disctime; 1088 uint16_t icb_reserved3[4]; 1089 } isp_icb_2400_t; 1090 1091 #define RQRSP_ADDR0015 0 1092 #define RQRSP_ADDR1631 1 1093 #define RQRSP_ADDR3247 2 1094 #define RQRSP_ADDR4863 3 1095 1096 1097 #define ICB_NNM0 7 1098 #define ICB_NNM1 6 1099 #define ICB_NNM2 5 1100 #define ICB_NNM3 4 1101 #define ICB_NNM4 3 1102 #define ICB_NNM5 2 1103 #define ICB_NNM6 1 1104 #define ICB_NNM7 0 1105 1106 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1107 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1108 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1109 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1110 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1111 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1112 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1113 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1114 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1115 1116 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1117 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1118 ((uint64_t) array[ICB_NNM1] << 8) | \ 1119 ((uint64_t) array[ICB_NNM2] << 16) | \ 1120 ((uint64_t) array[ICB_NNM3] << 24) | \ 1121 ((uint64_t) array[ICB_NNM4] << 32) | \ 1122 ((uint64_t) array[ICB_NNM5] << 40) | \ 1123 ((uint64_t) array[ICB_NNM6] << 48) | \ 1124 ((uint64_t) array[ICB_NNM7] << 56) 1125 1126 1127 /* 1128 * For MULTI_ID firmware, this describes a 1129 * virtual port entity for getting status. 1130 */ 1131 typedef struct { 1132 uint16_t vp_port_status; 1133 uint8_t vp_port_options; 1134 uint8_t vp_port_loopid; 1135 uint8_t vp_port_portname[8]; 1136 uint8_t vp_port_nodename[8]; 1137 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1138 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1139 } vp_port_info_t; 1140 1141 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1142 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1143 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1144 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1145 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1146 #define ICB2400_VPOPT_PREVLOOP 0x00000002 /* Previously Assigned ID */ 1147 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1148 1149 #define ICB2400_VPOPT_WRITE_SIZE 20 1150 1151 /* 1152 * For MULTI_ID firmware, we append this structure 1153 * to the isp_icb_2400_t above, followed by a list 1154 * structures that are *most* of the vp_port_info_t. 1155 */ 1156 typedef struct { 1157 uint16_t vp_count; 1158 uint16_t vp_global_options; 1159 } isp_icb_2400_vpinfo_t; 1160 1161 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1162 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1163 (ICB2400_VPINFO_OFF + \ 1164 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE)) 1165 1166 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1167 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1168 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1169 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1170 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1171 1172 typedef struct { 1173 isphdr_t vp_ctrl_hdr; 1174 uint32_t vp_ctrl_handle; 1175 uint16_t vp_ctrl_index_fail; 1176 uint16_t vp_ctrl_status; 1177 uint16_t vp_ctrl_command; 1178 uint16_t vp_ctrl_vp_count; 1179 uint16_t vp_ctrl_idmap[8]; 1180 uint8_t vp_ctrl_reserved[32]; 1181 } vp_ctrl_info_t; 1182 1183 #define VP_CTRL_CMD_ENABLE_VP 0 1184 #define VP_CTRL_CMD_DISABLE_VP 8 1185 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1186 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1187 1188 /* 1189 * We can use this structure for modifying either one or two VP ports after initialization 1190 */ 1191 typedef struct { 1192 isphdr_t vp_mod_hdr; 1193 uint32_t vp_mod_hdl; 1194 uint16_t vp_mod_reserved0; 1195 uint16_t vp_mod_status; 1196 uint8_t vp_mod_cmd; 1197 uint8_t vp_mod_cnt; 1198 uint8_t vp_mod_idx0; 1199 uint8_t vp_mod_idx1; 1200 struct { 1201 uint8_t options; 1202 uint8_t loopid; 1203 uint16_t reserved1; 1204 uint8_t wwpn[8]; 1205 uint8_t wwnn[8]; 1206 } vp_mod_ports[2]; 1207 uint8_t vp_mod_reserved2[8]; 1208 } vp_modify_t; 1209 1210 #define VP_STS_OK 0x00 1211 #define VP_STS_ERR 0x01 1212 #define VP_CNT_ERR 0x02 1213 #define VP_GEN_ERR 0x03 1214 #define VP_IDX_ERR 0x04 1215 #define VP_STS_BSY 0x05 1216 1217 #define VP_MODIFY 0x00 1218 #define VP_MODIFY_ENA 0x01 1219 #define VP_MODIFY_OPT 0x02 1220 #define VP_RESUME 0x03 1221 1222 /* 1223 * Port Data Base Element 1224 */ 1225 1226 typedef struct { 1227 uint16_t pdb_options; 1228 uint8_t pdb_mstate; 1229 uint8_t pdb_sstate; 1230 uint8_t pdb_hardaddr_bits[4]; 1231 uint8_t pdb_portid_bits[4]; 1232 uint8_t pdb_nodename[8]; 1233 uint8_t pdb_portname[8]; 1234 uint16_t pdb_execthrottle; 1235 uint16_t pdb_exec_count; 1236 uint8_t pdb_retry_count; 1237 uint8_t pdb_retry_delay; 1238 uint16_t pdb_resalloc; 1239 uint16_t pdb_curalloc; 1240 uint16_t pdb_qhead; 1241 uint16_t pdb_qtail; 1242 uint16_t pdb_tl_next; 1243 uint16_t pdb_tl_last; 1244 uint16_t pdb_features; /* PLOGI, Common Service */ 1245 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1246 uint16_t pdb_roi; /* PLOGI, Common Service */ 1247 uint8_t pdb_target; 1248 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1249 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1250 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1251 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1252 uint16_t pdb_labrtflg; 1253 uint16_t pdb_lstopflg; 1254 uint16_t pdb_sqhead; 1255 uint16_t pdb_sqtail; 1256 uint16_t pdb_ptimer; 1257 uint16_t pdb_nxt_seqid; 1258 uint16_t pdb_fcount; 1259 uint16_t pdb_prli_len; 1260 uint16_t pdb_prli_svc0; 1261 uint16_t pdb_prli_svc3; 1262 uint16_t pdb_loopid; 1263 uint16_t pdb_il_ptr; 1264 uint16_t pdb_sl_ptr; 1265 } isp_pdb_21xx_t; 1266 1267 #define PDB_OPTIONS_XMITTING (1<<11) 1268 #define PDB_OPTIONS_LNKXMIT (1<<10) 1269 #define PDB_OPTIONS_ABORTED (1<<9) 1270 #define PDB_OPTIONS_ADISC (1<<1) 1271 1272 #define PDB_STATE_DISCOVERY 0 1273 #define PDB_STATE_WDISC_ACK 1 1274 #define PDB_STATE_PLOGI 2 1275 #define PDB_STATE_PLOGI_ACK 3 1276 #define PDB_STATE_PRLI 4 1277 #define PDB_STATE_PRLI_ACK 5 1278 #define PDB_STATE_LOGGED_IN 6 1279 #define PDB_STATE_PORT_UNAVAIL 7 1280 #define PDB_STATE_PRLO 8 1281 #define PDB_STATE_PRLO_ACK 9 1282 #define PDB_STATE_PLOGO 10 1283 #define PDB_STATE_PLOG_ACK 11 1284 1285 #define SVC3_ROLE_MASK 0x30 1286 #define SVC3_ROLE_SHIFT 4 1287 1288 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1289 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1290 1291 /* 1292 * Port Data Base Element- 24XX cards 1293 */ 1294 typedef struct { 1295 uint16_t pdb_flags; 1296 uint8_t pdb_curstate; 1297 uint8_t pdb_laststate; 1298 uint8_t pdb_hardaddr_bits[4]; 1299 uint8_t pdb_portid_bits[4]; 1300 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1301 uint16_t pdb_retry_timer; 1302 uint16_t pdb_handle; 1303 uint16_t pdb_rcv_dsize; 1304 uint16_t pdb_reserved0; 1305 uint16_t pdb_prli_svc0; 1306 uint16_t pdb_prli_svc3; 1307 uint8_t pdb_portname[8]; 1308 uint8_t pdb_nodename[8]; 1309 uint8_t pdb_reserved1[24]; 1310 } isp_pdb_24xx_t; 1311 1312 #define PDB2400_TID_SUPPORTED 0x4000 1313 #define PDB2400_FC_TAPE 0x0080 1314 #define PDB2400_CLASS2_ACK0 0x0040 1315 #define PDB2400_FCP_CONF 0x0020 1316 #define PDB2400_CLASS2 0x0010 1317 #define PDB2400_ADDR_VALID 0x0002 1318 1319 #define PDB2400_STATE_PLOGI_PEND 0x03 1320 #define PDB2400_STATE_PLOGI_DONE 0x04 1321 #define PDB2400_STATE_PRLI_PEND 0x05 1322 #define PDB2400_STATE_LOGGED_IN 0x06 1323 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1324 #define PDB2400_STATE_PRLO_PEND 0x09 1325 #define PDB2400_STATE_LOGO_PEND 0x0B 1326 1327 /* 1328 * Common elements from the above two structures that are actually useful to us. 1329 */ 1330 typedef struct { 1331 uint16_t handle; 1332 uint16_t prli_word3; 1333 uint32_t : 8, 1334 portid : 24; 1335 uint8_t portname[8]; 1336 uint8_t nodename[8]; 1337 } isp_pdb_t; 1338 1339 /* 1340 * Port Database Changed Async Event information for 24XX cards 1341 */ 1342 #define PDB24XX_AE_OK 0x00 1343 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1344 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1345 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1346 #define PDB24XX_AE_PLOGI_RCVD 0x04 1347 #define PDB24XX_AE_PLOGI_RJT 0x05 1348 #define PDB24XX_AE_PRLI_RCVD 0x06 1349 #define PDB24XX_AE_PRLI_RJT 0x07 1350 #define PDB24XX_AE_TPRLO 0x08 1351 #define PDB24XX_AE_TPRLO_RJT 0x09 1352 #define PDB24XX_AE_PRLO_RCVD 0x0a 1353 #define PDB24XX_AE_LOGO_RCVD 0x0b 1354 #define PDB24XX_AE_TOPO_CHG 0x0c 1355 #define PDB24XX_AE_NPORT_CHG 0x0d 1356 #define PDB24XX_AE_FLOGI_RJT 0x0e 1357 #define PDB24XX_AE_BAD_FANN 0x0f 1358 #define PDB24XX_AE_FLOGI_TIMO 0x10 1359 #define PDB24XX_AE_ABX_LOGO 0x11 1360 #define PDB24XX_AE_PLOGI_DONE 0x12 1361 #define PDB24XX_AE_PRLI_DONJE 0x13 1362 #define PDB24XX_AE_OPN_1 0x14 1363 #define PDB24XX_AE_OPN_2 0x15 1364 #define PDB24XX_AE_TXERR 0x16 1365 #define PDB24XX_AE_FORCED_LOGO 0x17 1366 #define PDB24XX_AE_DISC_TIMO 0x18 1367 1368 /* 1369 * Genericized Port Login/Logout software structure 1370 */ 1371 typedef struct { 1372 uint16_t handle; 1373 uint16_t channel; 1374 uint32_t 1375 flags : 8, 1376 portid : 24; 1377 } isp_plcmd_t; 1378 /* the flags to use are those for PLOGX_FLG_* below */ 1379 1380 /* 1381 * ISP24XX- Login/Logout Port IOCB 1382 */ 1383 typedef struct { 1384 isphdr_t plogx_header; 1385 uint32_t plogx_handle; 1386 uint16_t plogx_status; 1387 uint16_t plogx_nphdl; 1388 uint16_t plogx_flags; 1389 uint16_t plogx_vphdl; /* low 8 bits */ 1390 uint16_t plogx_portlo; /* low 16 bits */ 1391 uint16_t plogx_rspsz_porthi; 1392 struct { 1393 uint16_t lo16; 1394 uint16_t hi16; 1395 } plogx_ioparm[11]; 1396 } isp_plogx_t; 1397 1398 #define PLOGX_STATUS_OK 0x00 1399 #define PLOGX_STATUS_UNAVAIL 0x28 1400 #define PLOGX_STATUS_LOGOUT 0x29 1401 #define PLOGX_STATUS_IOCBERR 0x31 1402 1403 #define PLOGX_IOCBERR_NOLINK 0x01 1404 #define PLOGX_IOCBERR_NOIOCB 0x02 1405 #define PLOGX_IOCBERR_NOXGHG 0x03 1406 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1407 #define PLOGX_IOCBERR_NOFABRIC 0x05 1408 #define PLOGX_IOCBERR_NOTREADY 0x07 1409 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1410 #define PLOGX_IOCBERR_NOPCB 0x0a 1411 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1412 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1413 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1414 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1415 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1416 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1417 1418 #define PLOGX_FLG_CMD_MASK 0xf 1419 #define PLOGX_FLG_CMD_PLOGI 0 1420 #define PLOGX_FLG_CMD_PRLI 1 1421 #define PLOGX_FLG_CMD_PDISC 2 1422 #define PLOGX_FLG_CMD_LOGO 8 1423 #define PLOGX_FLG_CMD_PRLO 9 1424 #define PLOGX_FLG_CMD_TPRLO 10 1425 1426 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1427 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1428 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1429 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1430 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1431 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1432 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1433 1434 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1435 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1436 1437 /* 1438 * Report ID Acquisistion (24XX multi-id firmware) 1439 */ 1440 typedef struct { 1441 isphdr_t ridacq_hdr; 1442 uint32_t ridacq_handle; 1443 union { 1444 struct { 1445 uint8_t ridacq_vp_acquired; 1446 uint8_t ridacq_vp_setup; 1447 uint16_t ridacq_reserved0; 1448 } type0; /* type 0 */ 1449 struct { 1450 uint16_t ridacq_vp_count; 1451 uint8_t ridacq_vp_index; 1452 uint8_t ridacq_vp_status; 1453 } type1; /* type 1 */ 1454 } un; 1455 uint16_t ridacq_vp_port_lo; 1456 uint8_t ridacq_vp_port_hi; 1457 uint8_t ridacq_format; /* 0 or 1 */ 1458 uint16_t ridacq_map[8]; 1459 uint8_t ridacq_reserved1[32]; 1460 } isp_ridacq_t; 1461 1462 #define RIDACQ_STS_COMPLETE 0 1463 #define RIDACQ_STS_UNACQUIRED 1 1464 #define RIDACQ_STS_CHANGED 20 1465 1466 1467 /* 1468 * Simple Name Server Data Structures 1469 */ 1470 #define SNS_GA_NXT 0x100 1471 #define SNS_GPN_ID 0x112 1472 #define SNS_GNN_ID 0x113 1473 #define SNS_GFF_ID 0x11F 1474 #define SNS_GID_FT 0x171 1475 #define SNS_RFT_ID 0x217 1476 typedef struct { 1477 uint16_t snscb_rblen; /* response buffer length (words) */ 1478 uint16_t snscb_reserved0; 1479 uint16_t snscb_addr[4]; /* response buffer address */ 1480 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1481 uint16_t snscb_reserved1; 1482 uint16_t snscb_data[]; /* variable data */ 1483 } sns_screq_t; /* Subcommand Request Structure */ 1484 1485 typedef struct { 1486 uint16_t snscb_rblen; /* response buffer length (words) */ 1487 uint16_t snscb_reserved0; 1488 uint16_t snscb_addr[4]; /* response buffer address */ 1489 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1490 uint16_t snscb_reserved1; 1491 uint16_t snscb_cmd; 1492 uint16_t snscb_reserved2; 1493 uint32_t snscb_reserved3; 1494 uint32_t snscb_port; 1495 } sns_ga_nxt_req_t; 1496 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1497 1498 typedef struct { 1499 uint16_t snscb_rblen; /* response buffer length (words) */ 1500 uint16_t snscb_reserved0; 1501 uint16_t snscb_addr[4]; /* response buffer address */ 1502 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1503 uint16_t snscb_reserved1; 1504 uint16_t snscb_cmd; 1505 uint16_t snscb_reserved2; 1506 uint32_t snscb_reserved3; 1507 uint32_t snscb_portid; 1508 } sns_gxn_id_req_t; 1509 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1510 1511 typedef struct { 1512 uint16_t snscb_rblen; /* response buffer length (words) */ 1513 uint16_t snscb_reserved0; 1514 uint16_t snscb_addr[4]; /* response buffer address */ 1515 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1516 uint16_t snscb_reserved1; 1517 uint16_t snscb_cmd; 1518 uint16_t snscb_mword_div_2; 1519 uint32_t snscb_reserved3; 1520 uint32_t snscb_fc4_type; 1521 } sns_gid_ft_req_t; 1522 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1523 1524 typedef struct { 1525 uint16_t snscb_rblen; /* response buffer length (words) */ 1526 uint16_t snscb_reserved0; 1527 uint16_t snscb_addr[4]; /* response buffer address */ 1528 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1529 uint16_t snscb_reserved1; 1530 uint16_t snscb_cmd; 1531 uint16_t snscb_reserved2; 1532 uint32_t snscb_reserved3; 1533 uint32_t snscb_port; 1534 uint32_t snscb_fc4_types[8]; 1535 } sns_rft_id_req_t; 1536 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1537 1538 typedef struct { 1539 ct_hdr_t snscb_cthdr; 1540 uint8_t snscb_port_type; 1541 uint8_t snscb_port_id[3]; 1542 uint8_t snscb_portname[8]; 1543 uint16_t snscb_data[]; /* variable data */ 1544 } sns_scrsp_t; /* Subcommand Response Structure */ 1545 1546 typedef struct { 1547 ct_hdr_t snscb_cthdr; 1548 uint8_t snscb_port_type; 1549 uint8_t snscb_port_id[3]; 1550 uint8_t snscb_portname[8]; 1551 uint8_t snscb_pnlen; /* symbolic port name length */ 1552 uint8_t snscb_pname[255]; /* symbolic port name */ 1553 uint8_t snscb_nodename[8]; 1554 uint8_t snscb_nnlen; /* symbolic node name length */ 1555 uint8_t snscb_nname[255]; /* symbolic node name */ 1556 uint8_t snscb_ipassoc[8]; 1557 uint8_t snscb_ipaddr[16]; 1558 uint8_t snscb_svc_class[4]; 1559 uint8_t snscb_fc4_types[32]; 1560 uint8_t snscb_fpname[8]; 1561 uint8_t snscb_reserved; 1562 uint8_t snscb_hardaddr[3]; 1563 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1564 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1565 1566 typedef struct { 1567 ct_hdr_t snscb_cthdr; 1568 uint8_t snscb_wwn[8]; 1569 } sns_gxn_id_rsp_t; 1570 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1571 1572 typedef struct { 1573 ct_hdr_t snscb_cthdr; 1574 uint32_t snscb_fc4_features[32]; 1575 } sns_gff_id_rsp_t; 1576 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1577 1578 typedef struct { 1579 ct_hdr_t snscb_cthdr; 1580 struct { 1581 uint8_t control; 1582 uint8_t portid[3]; 1583 } snscb_ports[1]; 1584 } sns_gid_ft_rsp_t; 1585 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1586 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1587 1588 /* 1589 * Other Misc Structures 1590 */ 1591 1592 /* ELS Pass Through */ 1593 typedef struct { 1594 isphdr_t els_hdr; 1595 uint32_t els_handle; 1596 uint16_t els_status; 1597 uint16_t els_nphdl; 1598 uint16_t els_xmit_dsd_count; /* outgoing only */ 1599 uint8_t els_vphdl; 1600 uint8_t els_sof; 1601 uint32_t els_rxid; 1602 uint16_t els_recv_dsd_count; /* outgoing only */ 1603 uint8_t els_opcode; 1604 uint8_t els_reserved1; 1605 uint8_t els_did_lo; 1606 uint8_t els_did_mid; 1607 uint8_t els_did_hi; 1608 uint8_t els_reserved2; 1609 uint16_t els_reserved3; 1610 uint16_t els_ctl_flags; 1611 union { 1612 struct { 1613 uint32_t _els_bytecnt; 1614 uint32_t _els_subcode1; 1615 uint32_t _els_subcode2; 1616 uint8_t _els_reserved4[20]; 1617 } in; 1618 struct { 1619 uint32_t _els_recv_bytecnt; 1620 uint32_t _els_xmit_bytecnt; 1621 uint32_t _els_xmit_dsd_length; 1622 uint16_t _els_xmit_dsd_a1500; 1623 uint16_t _els_xmit_dsd_a3116; 1624 uint16_t _els_xmit_dsd_a4732; 1625 uint16_t _els_xmit_dsd_a6348; 1626 uint32_t _els_recv_dsd_length; 1627 uint16_t _els_recv_dsd_a1500; 1628 uint16_t _els_recv_dsd_a3116; 1629 uint16_t _els_recv_dsd_a4732; 1630 uint16_t _els_recv_dsd_a6348; 1631 } out; 1632 } inout; 1633 #define els_bytecnt inout.in._els_bytecnt 1634 #define els_subcode1 inout.in._els_subcode1 1635 #define els_subcode2 inout.in._els_subcode2 1636 #define els_reserved4 inout.in._els_reserved4 1637 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1638 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1639 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1640 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1641 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1642 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1643 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1644 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1645 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1646 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1647 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1648 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1649 } els_t; 1650 1651 /* 1652 * A handy package structure for running FC-SCSI commands internally 1653 */ 1654 typedef struct { 1655 uint16_t handle; 1656 uint16_t lun; 1657 uint32_t 1658 channel : 8, 1659 portid : 24; 1660 uint32_t timeout; 1661 union { 1662 struct { 1663 uint32_t data_length; 1664 uint32_t 1665 no_wait : 1, 1666 do_read : 1; 1667 uint8_t cdb[16]; 1668 void *data_ptr; 1669 } beg; 1670 struct { 1671 uint32_t data_residual; 1672 uint8_t status; 1673 uint8_t pad; 1674 uint16_t sense_length; 1675 uint8_t sense_data[32]; 1676 } end; 1677 } fcd; 1678 } isp_xcmd_t; 1679 1680 /* 1681 * Target Mode related definitions 1682 */ 1683 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1684 #define QLTM_SVALID 0x80 1685 1686 /* 1687 * Structure for Enable Lun and Modify Lun queue entries 1688 */ 1689 typedef struct { 1690 isphdr_t le_header; 1691 uint32_t le_reserved; 1692 uint8_t le_lun; 1693 uint8_t le_rsvd; 1694 uint8_t le_ops; /* Modify LUN only */ 1695 uint8_t le_tgt; /* Not for FC */ 1696 uint32_t le_flags; /* Not for FC */ 1697 uint8_t le_status; 1698 uint8_t le_reserved2; 1699 uint8_t le_cmd_count; 1700 uint8_t le_in_count; 1701 uint8_t le_cdb6len; /* Not for FC */ 1702 uint8_t le_cdb7len; /* Not for FC */ 1703 uint16_t le_timeout; 1704 uint16_t le_reserved3[20]; 1705 } lun_entry_t; 1706 1707 /* 1708 * le_flags values 1709 */ 1710 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1711 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1712 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1713 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1714 1715 /* 1716 * le_ops values 1717 */ 1718 #define LUN_CCINCR 0x01 /* increment command count */ 1719 #define LUN_CCDECR 0x02 /* decrement command count */ 1720 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1721 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1722 1723 /* 1724 * le_status values 1725 */ 1726 #define LUN_OK 0x01 /* we be rockin' */ 1727 #define LUN_ERR 0x04 /* request completed with error */ 1728 #define LUN_INVAL 0x06 /* invalid request */ 1729 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1730 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1731 1732 /* 1733 * Immediate Notify Entry structure 1734 */ 1735 #define IN_MSGLEN 8 /* 8 bytes */ 1736 #define IN_RSVDLEN 8 /* 8 words */ 1737 typedef struct { 1738 isphdr_t in_header; 1739 uint32_t in_reserved; 1740 uint8_t in_lun; /* lun */ 1741 uint8_t in_iid; /* initiator */ 1742 uint8_t in_reserved2; 1743 uint8_t in_tgt; /* target */ 1744 uint32_t in_flags; 1745 uint8_t in_status; 1746 uint8_t in_rsvd2; 1747 uint8_t in_tag_val; /* tag value */ 1748 uint8_t in_tag_type; /* tag type */ 1749 uint16_t in_seqid; /* sequence id */ 1750 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1751 uint16_t in_reserved3[IN_RSVDLEN]; 1752 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1753 } in_entry_t; 1754 1755 typedef struct { 1756 isphdr_t in_header; 1757 uint32_t in_reserved; 1758 uint8_t in_lun; /* lun */ 1759 uint8_t in_iid; /* initiator */ 1760 uint16_t in_scclun; 1761 uint32_t in_reserved2; 1762 uint16_t in_status; 1763 uint16_t in_task_flags; 1764 uint16_t in_seqid; /* sequence id */ 1765 } in_fcentry_t; 1766 1767 typedef struct { 1768 isphdr_t in_header; 1769 uint32_t in_reserved; 1770 uint16_t in_iid; /* initiator */ 1771 uint16_t in_scclun; 1772 uint32_t in_reserved2; 1773 uint16_t in_status; 1774 uint16_t in_task_flags; 1775 uint16_t in_seqid; /* sequence id */ 1776 } in_fcentry_e_t; 1777 1778 /* 1779 * Values for the in_status field 1780 */ 1781 #define IN_REJECT 0x0D /* Message Reject message received */ 1782 #define IN_RESET 0x0E /* Bus Reset occurred */ 1783 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1784 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1785 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1786 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1787 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1788 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1789 #define IN_PORT_CHANGED 0x2A /* port changed */ 1790 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1791 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1792 #define IN_SRR_RCVD 0x45 /* SRR received */ 1793 1794 /* 1795 * Values for the in_task_flags field- should only get one at a time! 1796 */ 1797 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1798 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1799 #define TASK_FLAGS_TARGET_RESET (1<<13) 1800 #define TASK_FLAGS_LUN_RESET (1<<12) 1801 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1802 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1803 1804 /* 1805 * ISP24XX Immediate Notify 1806 */ 1807 typedef struct { 1808 isphdr_t in_header; 1809 uint32_t in_reserved; 1810 uint16_t in_nphdl; 1811 uint16_t in_reserved1; 1812 uint16_t in_flags; 1813 uint16_t in_srr_rxid; 1814 uint16_t in_status; 1815 uint8_t in_status_subcode; 1816 uint8_t in_fwhandle; 1817 uint32_t in_rxid; 1818 uint16_t in_srr_reloff_lo; 1819 uint16_t in_srr_reloff_hi; 1820 uint16_t in_srr_iu; 1821 uint16_t in_srr_oxid; 1822 /* 1823 * If bit 2 is set in in_flags, the N-Port and 1824 * handle tags are valid. If the received ELS is 1825 * a LOGO, then these tags contain the N Port ID 1826 * from the LOGO payload. If the received ELS 1827 * request is TPRLO, these tags contain the 1828 * Third Party Originator N Port ID. 1829 */ 1830 uint16_t in_nport_id_hi; 1831 #define in_prli_options in_nport_id_hi 1832 uint8_t in_nport_id_lo; 1833 uint8_t in_reserved3; 1834 uint16_t in_np_handle; 1835 uint8_t in_reserved4[12]; 1836 uint8_t in_reserved5; 1837 uint8_t in_vpidx; 1838 uint32_t in_reserved6; 1839 uint16_t in_portid_lo; 1840 uint8_t in_portid_hi; 1841 uint8_t in_reserved7; 1842 uint16_t in_reserved8; 1843 uint16_t in_oxid; 1844 } in_fcentry_24xx_t; 1845 1846 #define IN24XX_FLAG_PUREX_IOCB 0x1 1847 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1848 #define IN24XX_FLAG_NPHDL_VALID 0x4 1849 #define IN24XX_FLAG_N2N_PRLI 0x8 1850 #define IN24XX_FLAG_PN_NN_VALID 0x10 1851 1852 #define IN24XX_LIP_RESET 0x0E 1853 #define IN24XX_LINK_RESET 0x0F 1854 #define IN24XX_PORT_LOGOUT 0x29 1855 #define IN24XX_PORT_CHANGED 0x2A 1856 #define IN24XX_LINK_FAILED 0x2E 1857 #define IN24XX_SRR_RCVD 0x45 1858 #define IN24XX_ELS_RCVD 0x46 /* 1859 * login-affectin ELS received- check 1860 * subcode for specific opcode 1861 */ 1862 1863 /* 1864 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1865 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1866 * Big Endian format. 1867 */ 1868 #define IN24XX_PRLI_WWNN_OFF 0x18 1869 #define IN24XX_PRLI_WWPN_OFF 0x28 1870 #define IN24XX_PLOGI_WWNN_OFF 0x20 1871 #define IN24XX_PLOGI_WWPN_OFF 0x28 1872 1873 /* 1874 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1875 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1876 */ 1877 #define IN24XX_LOGO_WWPN_OFF 0x28 1878 1879 /* 1880 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1881 */ 1882 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1883 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1884 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1885 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1886 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1887 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1888 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1889 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1890 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1891 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1892 1893 /* 1894 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1895 */ 1896 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1897 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1898 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1899 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1900 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1901 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1902 1903 /* 1904 * Notify Acknowledge Entry structure 1905 */ 1906 #define NA_RSVDLEN 22 1907 typedef struct { 1908 isphdr_t na_header; 1909 uint32_t na_reserved; 1910 uint8_t na_lun; /* lun */ 1911 uint8_t na_iid; /* initiator */ 1912 uint8_t na_reserved2; 1913 uint8_t na_tgt; /* target */ 1914 uint32_t na_flags; 1915 uint8_t na_status; 1916 uint8_t na_event; 1917 uint16_t na_seqid; /* sequence id */ 1918 uint16_t na_reserved3[NA_RSVDLEN]; 1919 } na_entry_t; 1920 1921 /* 1922 * Value for the na_event field 1923 */ 1924 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1925 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1926 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1927 1928 #define NA2_RSVDLEN 21 1929 typedef struct { 1930 isphdr_t na_header; 1931 uint32_t na_reserved; 1932 uint8_t na_reserved1; 1933 uint8_t na_iid; /* initiator loop id */ 1934 uint16_t na_response; 1935 uint16_t na_flags; 1936 uint16_t na_reserved2; 1937 uint16_t na_status; 1938 uint16_t na_task_flags; 1939 uint16_t na_seqid; /* sequence id */ 1940 uint16_t na_reserved3[NA2_RSVDLEN]; 1941 } na_fcentry_t; 1942 1943 typedef struct { 1944 isphdr_t na_header; 1945 uint32_t na_reserved; 1946 uint16_t na_iid; /* initiator loop id */ 1947 uint16_t na_response; /* response code */ 1948 uint16_t na_flags; 1949 uint16_t na_reserved2; 1950 uint16_t na_status; 1951 uint16_t na_task_flags; 1952 uint16_t na_seqid; /* sequence id */ 1953 uint16_t na_reserved3[NA2_RSVDLEN]; 1954 } na_fcentry_e_t; 1955 1956 #define NAFC_RCOUNT 0x80 /* increment resource count */ 1957 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1958 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1959 1960 /* 1961 * ISP24XX Notify Acknowledge 1962 */ 1963 1964 typedef struct { 1965 isphdr_t na_header; 1966 uint32_t na_handle; 1967 uint16_t na_nphdl; 1968 uint16_t na_reserved1; 1969 uint16_t na_flags; 1970 uint16_t na_srr_rxid; 1971 uint16_t na_status; 1972 uint8_t na_status_subcode; 1973 uint8_t na_fwhandle; 1974 uint32_t na_rxid; 1975 uint16_t na_srr_reloff_lo; 1976 uint16_t na_srr_reloff_hi; 1977 uint16_t na_srr_iu; 1978 uint16_t na_srr_flags; 1979 uint8_t na_reserved3[18]; 1980 uint8_t na_reserved4; 1981 uint8_t na_vpidx; 1982 uint8_t na_srr_reject_vunique; 1983 uint8_t na_srr_reject_explanation; 1984 uint8_t na_srr_reject_code; 1985 uint8_t na_reserved5; 1986 uint8_t na_reserved6[6]; 1987 uint16_t na_oxid; 1988 } na_fcentry_24xx_t; 1989 1990 /* 1991 * Accept Target I/O Entry structure 1992 */ 1993 #define ATIO_CDBLEN 26 1994 1995 typedef struct { 1996 isphdr_t at_header; 1997 uint16_t at_reserved; 1998 uint16_t at_handle; 1999 uint8_t at_lun; /* lun */ 2000 uint8_t at_iid; /* initiator */ 2001 uint8_t at_cdblen; /* cdb length */ 2002 uint8_t at_tgt; /* target */ 2003 uint32_t at_flags; 2004 uint8_t at_status; /* firmware status */ 2005 uint8_t at_scsi_status; /* scsi status */ 2006 uint8_t at_tag_val; /* tag value */ 2007 uint8_t at_tag_type; /* tag type */ 2008 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2009 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2010 } at_entry_t; 2011 2012 /* 2013 * at_flags values 2014 */ 2015 #define AT_NODISC 0x00008000 /* disconnect disabled */ 2016 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2017 2018 /* 2019 * at_status values 2020 */ 2021 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2022 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2023 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2024 #define AT_NOCAP 0x16 /* Requested capability not available */ 2025 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2026 #define AT_CDB 0x3D /* CDB received */ 2027 /* 2028 * Macros to create and fetch and test concatenated handle and tag value macros 2029 * (SPI only) 2030 */ 2031 #define AT_MAKE_TAGID(tid, aep) \ 2032 tid = aep->at_handle; \ 2033 if (aep->at_flags & AT_TQAE) { \ 2034 tid |= (aep->at_tag_val << 16); \ 2035 tid |= (1 << 24); \ 2036 } 2037 2038 #define CT_MAKE_TAGID(tid, ct) \ 2039 tid = ct->ct_fwhandle; \ 2040 if (ct->ct_flags & CT_TQAE) { \ 2041 tid |= (ct->ct_tag_val << 16); \ 2042 tid |= (1 << 24); \ 2043 } 2044 2045 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2046 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2047 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2048 2049 #define IN_MAKE_TAGID(tid, inp) \ 2050 tid = inp->in_seqid; \ 2051 tid |= (inp->in_tag_val << 16); \ 2052 tid |= (1 << 24) 2053 2054 /* 2055 * Accept Target I/O Entry structure, Type 2 2056 */ 2057 #define ATIO2_CDBLEN 16 2058 2059 typedef struct { 2060 isphdr_t at_header; 2061 uint32_t at_reserved; 2062 uint8_t at_lun; /* lun or reserved */ 2063 uint8_t at_iid; /* initiator */ 2064 uint16_t at_rxid; /* response ID */ 2065 uint16_t at_flags; 2066 uint16_t at_status; /* firmware status */ 2067 uint8_t at_crn; /* command reference number */ 2068 uint8_t at_taskcodes; 2069 uint8_t at_taskflags; 2070 uint8_t at_execodes; 2071 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2072 uint32_t at_datalen; /* allocated data len */ 2073 uint16_t at_scclun; /* SCC Lun or reserved */ 2074 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2075 uint16_t at_reserved2[6]; 2076 uint16_t at_oxid; 2077 } at2_entry_t; 2078 2079 typedef struct { 2080 isphdr_t at_header; 2081 uint32_t at_reserved; 2082 uint16_t at_iid; /* initiator */ 2083 uint16_t at_rxid; /* response ID */ 2084 uint16_t at_flags; 2085 uint16_t at_status; /* firmware status */ 2086 uint8_t at_crn; /* command reference number */ 2087 uint8_t at_taskcodes; 2088 uint8_t at_taskflags; 2089 uint8_t at_execodes; 2090 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2091 uint32_t at_datalen; /* allocated data len */ 2092 uint16_t at_scclun; /* SCC Lun or reserved */ 2093 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2094 uint16_t at_reserved2[6]; 2095 uint16_t at_oxid; 2096 } at2e_entry_t; 2097 2098 #define ATIO2_WWPN_OFFSET 0x2A 2099 #define ATIO2_OXID_OFFSET 0x3E 2100 2101 #define ATIO2_TC_ATTR_MASK 0x7 2102 #define ATIO2_TC_ATTR_SIMPLEQ 0 2103 #define ATIO2_TC_ATTR_HEADOFQ 1 2104 #define ATIO2_TC_ATTR_ORDERED 2 2105 #define ATIO2_TC_ATTR_ACAQ 4 2106 #define ATIO2_TC_ATTR_UNTAGGED 5 2107 2108 #define ATIO2_EX_WRITE 0x1 2109 #define ATIO2_EX_READ 0x2 2110 /* 2111 * Macros to create and fetch and test concatenated handle and tag value macros 2112 */ 2113 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2114 tid = aep->at_rxid; \ 2115 tid |= (((uint64_t)inst) << 32); \ 2116 tid |= (((uint64_t)bus) << 48) 2117 2118 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2119 tid = ct->ct_rxid; \ 2120 tid |= (((uint64_t)inst) << 32); \ 2121 tid |= (((uint64_t)(bus & 0xff)) << 48) 2122 2123 #define AT2_HAS_TAG(val) 1 2124 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2125 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2126 #define AT2_GET_HANDLE AT2_GET_TAG 2127 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2128 2129 #define FC_HAS_TAG AT2_HAS_TAG 2130 #define FC_GET_TAG AT2_GET_TAG 2131 #define FC_GET_INST AT2_GET_INST 2132 #define FC_GET_HANDLE AT2_GET_HANDLE 2133 2134 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2135 tid = seqid; \ 2136 tid |= (((uint64_t)inst) << 32); \ 2137 tid |= (((uint64_t)(bus & 0xff)) << 48) 2138 2139 #define FC_TAG_INSERT_INST(tid, inst) \ 2140 tid &= ~0x0000ffff00000000ull; \ 2141 tid |= (((uint64_t)inst) << 32) 2142 2143 /* 2144 * 24XX ATIO Definition 2145 * 2146 * This is *quite* different from other entry types. 2147 * First of all, it has its own queue it comes in on. 2148 * 2149 * Secondly, it doesn't have a normal header. 2150 * 2151 * Thirdly, it's just a passthru of the FCP CMND IU 2152 * which is recorded in big endian mode. 2153 */ 2154 typedef struct { 2155 uint8_t at_type; 2156 uint8_t at_count; 2157 /* 2158 * Task attribute in high four bits, 2159 * the rest is the FCP CMND IU Length. 2160 * NB: the command can extend past the 2161 * length for a single queue entry. 2162 */ 2163 uint16_t at_ta_len; 2164 uint32_t at_rxid; 2165 fc_hdr_t at_hdr; 2166 fcp_cmnd_iu_t at_cmnd; 2167 } at7_entry_t; 2168 #define AT7_NORESRC_RXID 0xffffffff 2169 2170 2171 /* 2172 * Continue Target I/O Entry structure 2173 * Request from driver. The response from the 2174 * ISP firmware is the same except that the last 18 2175 * bytes are overwritten by suggested sense data if 2176 * the 'autosense valid' bit is set in the status byte. 2177 */ 2178 typedef struct { 2179 isphdr_t ct_header; 2180 uint16_t ct_syshandle; 2181 uint16_t ct_fwhandle; /* required by f/w */ 2182 uint8_t ct_lun; /* lun */ 2183 uint8_t ct_iid; /* initiator id */ 2184 uint8_t ct_reserved2; 2185 uint8_t ct_tgt; /* our target id */ 2186 uint32_t ct_flags; 2187 uint8_t ct_status; /* isp status */ 2188 uint8_t ct_scsi_status; /* scsi status */ 2189 uint8_t ct_tag_val; /* tag value */ 2190 uint8_t ct_tag_type; /* tag type */ 2191 uint32_t ct_xfrlen; /* transfer length */ 2192 uint32_t ct_resid; /* residual length */ 2193 uint16_t ct_timeout; 2194 uint16_t ct_seg_count; 2195 ispds_t ct_dataseg[ISP_RQDSEG]; 2196 } ct_entry_t; 2197 2198 /* 2199 * For some of the dual port SCSI adapters, port (bus #) is reported 2200 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2201 * 2202 * Note that this does not apply to FC adapters at all which can and 2203 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2204 * that have logged in across a SCSI fabric. 2205 */ 2206 #define GET_IID_VAL(x) (x & 0x3f) 2207 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2208 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2209 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2210 2211 /* 2212 * ct_flags values 2213 */ 2214 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2215 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2216 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2217 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2218 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2219 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2220 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2221 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2222 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2223 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2224 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2225 2226 /* 2227 * ct_status values 2228 * - set by the firmware when it returns the CTIO 2229 */ 2230 #define CT_OK 0x01 /* completed without error */ 2231 #define CT_ABORTED 0x02 /* aborted by host */ 2232 #define CT_ERR 0x04 /* see sense data for error */ 2233 #define CT_INVAL 0x06 /* request for disabled lun */ 2234 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2235 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2236 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2237 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2238 #define CT_TIMEOUT 0x0B /* timed out */ 2239 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2240 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2241 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2242 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2243 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2244 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2245 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2246 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2247 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2248 #define CT_LOGOUT 0x29 /* port logout */ 2249 #define CT_PORTCHANGED 0x2A /* port changed */ 2250 #define CT_IDE 0x33 /* Initiator Detected Error */ 2251 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2252 #define CT_SRR 0x45 /* SRR Received */ 2253 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2254 2255 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2256 2257 /* 2258 * When the firmware returns a CTIO entry, it may overwrite the last 2259 * part of the structure with sense data. This starts at offset 0x2E 2260 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2261 * than define a new struct for this, I'm just using the sense data 2262 * offset. 2263 */ 2264 #define CTIO_SENSE_OFFSET 0x2E 2265 2266 /* 2267 * Entry length in u_longs. All entries are the same size so 2268 * any one will do as the numerator. 2269 */ 2270 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2271 2272 /* 2273 * QLA2100 CTIO (type 2) entry 2274 */ 2275 #define MAXRESPLEN 26 2276 typedef struct { 2277 isphdr_t ct_header; 2278 uint32_t ct_syshandle; 2279 uint8_t ct_lun; /* lun */ 2280 uint8_t ct_iid; /* initiator id */ 2281 uint16_t ct_rxid; /* response ID */ 2282 uint16_t ct_flags; 2283 uint16_t ct_status; /* isp status */ 2284 uint16_t ct_timeout; 2285 uint16_t ct_seg_count; 2286 uint32_t ct_reloff; /* relative offset */ 2287 uint32_t ct_resid; /* residual length */ 2288 union { 2289 /* 2290 * The three different modes that the target driver 2291 * can set the CTIO{2,3,4} up as. 2292 * 2293 * The first is for sending FCP_DATA_IUs as well as 2294 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2295 * 2296 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2297 * Note that no FCP_DATA_IUs will be sent. 2298 * 2299 * The third is for sending FCP_RSP_IUs as built specifically 2300 * in system memory as located by the isp_dataseg. 2301 */ 2302 struct { 2303 uint32_t _reserved; 2304 uint16_t _reserved2; 2305 uint16_t ct_scsi_status; 2306 uint32_t ct_xfrlen; 2307 union { 2308 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2309 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2310 ispdslist_t ct_dslist; 2311 } u; 2312 } m0; 2313 struct { 2314 uint16_t _reserved; 2315 uint16_t _reserved2; 2316 uint16_t ct_senselen; 2317 uint16_t ct_scsi_status; 2318 uint16_t ct_resplen; 2319 uint8_t ct_resp[MAXRESPLEN]; 2320 } m1; 2321 struct { 2322 uint32_t _reserved; 2323 uint16_t _reserved2; 2324 uint16_t _reserved3; 2325 uint32_t ct_datalen; 2326 union { 2327 ispds_t ct_fcp_rsp_iudata_32; 2328 ispds64_t ct_fcp_rsp_iudata_64; 2329 } u; 2330 } m2; 2331 } rsp; 2332 } ct2_entry_t; 2333 2334 typedef struct { 2335 isphdr_t ct_header; 2336 uint32_t ct_syshandle; 2337 uint16_t ct_iid; /* initiator id */ 2338 uint16_t ct_rxid; /* response ID */ 2339 uint16_t ct_flags; 2340 uint16_t ct_status; /* isp status */ 2341 uint16_t ct_timeout; 2342 uint16_t ct_seg_count; 2343 uint32_t ct_reloff; /* relative offset */ 2344 uint32_t ct_resid; /* residual length */ 2345 union { 2346 struct { 2347 uint32_t _reserved; 2348 uint16_t _reserved2; 2349 uint16_t ct_scsi_status; 2350 uint32_t ct_xfrlen; 2351 union { 2352 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2353 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2354 ispdslist_t ct_dslist; 2355 } u; 2356 } m0; 2357 struct { 2358 uint16_t _reserved; 2359 uint16_t _reserved2; 2360 uint16_t ct_senselen; 2361 uint16_t ct_scsi_status; 2362 uint16_t ct_resplen; 2363 uint8_t ct_resp[MAXRESPLEN]; 2364 } m1; 2365 struct { 2366 uint32_t _reserved; 2367 uint16_t _reserved2; 2368 uint16_t _reserved3; 2369 uint32_t ct_datalen; 2370 union { 2371 ispds_t ct_fcp_rsp_iudata_32; 2372 ispds64_t ct_fcp_rsp_iudata_64; 2373 } u; 2374 } m2; 2375 } rsp; 2376 } ct2e_entry_t; 2377 2378 /* 2379 * ct_flags values for CTIO2 2380 */ 2381 #define CT2_FLAG_MODE0 0x0000 2382 #define CT2_FLAG_MODE1 0x0001 2383 #define CT2_FLAG_MODE2 0x0002 2384 #define CT2_FLAG_MMASK 0x0003 2385 #define CT2_DATA_IN 0x0040 /* *to* initiator */ 2386 #define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2387 #define CT2_NO_DATA 0x00C0 2388 #define CT2_DATAMASK 0x00C0 2389 #define CT2_CCINCR 0x0100 2390 #define CT2_FASTPOST 0x0200 2391 #define CT2_CONFIRM 0x2000 2392 #define CT2_TERMINATE 0x4000 2393 #define CT2_SENDSTATUS 0x8000 2394 2395 /* 2396 * ct_status values are (mostly) the same as that for ct_entry. 2397 */ 2398 2399 /* 2400 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2401 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2402 * fields. 2403 */ 2404 #define CT2_RSPLEN_VALID 0x0100 2405 #define CT2_SNSLEN_VALID 0x0200 2406 #define CT2_DATA_OVER 0x0400 2407 #define CT2_DATA_UNDER 0x0800 2408 2409 /* 2410 * ISP24XX CTIO 2411 */ 2412 #define MAXRESPLEN_24XX 24 2413 typedef struct { 2414 isphdr_t ct_header; 2415 uint32_t ct_syshandle; 2416 uint16_t ct_nphdl; /* status on returned CTIOs */ 2417 uint16_t ct_timeout; 2418 uint16_t ct_seg_count; 2419 uint8_t ct_vpidx; 2420 uint8_t ct_xflags; 2421 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2422 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2423 uint8_t ct_reserved; 2424 uint32_t ct_rxid; 2425 uint16_t ct_senselen; /* mode 1 only */ 2426 uint16_t ct_flags; 2427 uint32_t ct_resid; /* residual length */ 2428 uint16_t ct_oxid; 2429 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2430 union { 2431 struct { 2432 uint32_t reloff; 2433 uint32_t reserved0; 2434 uint32_t ct_xfrlen; 2435 uint32_t reserved1; 2436 ispds64_t ds; 2437 } m0; 2438 struct { 2439 uint16_t ct_resplen; 2440 uint16_t reserved; 2441 uint8_t ct_resp[MAXRESPLEN_24XX]; 2442 } m1; 2443 struct { 2444 uint32_t reserved0; 2445 uint32_t reserved1; 2446 uint32_t ct_datalen; 2447 uint32_t reserved2; 2448 ispds64_t ct_fcp_rsp_iudata; 2449 } m2; 2450 } rsp; 2451 } ct7_entry_t; 2452 2453 /* 2454 * ct_flags values for CTIO7 2455 */ 2456 #define CT7_NO_DATA 0x0000 2457 #define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2458 #define CT7_DATA_IN 0x0002 /* *to* initiator */ 2459 #define CT7_DATAMASK 0x3 2460 #define CT7_DSD_ENABLE 0x0004 2461 #define CT7_CONF_STSFD 0x0010 2462 #define CT7_EXPLCT_CONF 0x0020 2463 #define CT7_FLAG_MODE0 0x0000 2464 #define CT7_FLAG_MODE1 0x0040 2465 #define CT7_FLAG_MODE2 0x0080 2466 #define CT7_FLAG_MMASK 0x00C0 2467 #define CT7_NOACK 0x0100 2468 #define CT7_TASK_ATTR_SHIFT 9 2469 #define CT7_CONFIRM 0x2000 2470 #define CT7_TERMINATE 0x4000 2471 #define CT7_SENDSTATUS 0x8000 2472 2473 /* 2474 * Type 7 CTIO status codes 2475 */ 2476 #define CT7_OK 0x01 /* completed without error */ 2477 #define CT7_ABORTED 0x02 /* aborted by host */ 2478 #define CT7_ERR 0x04 /* see sense data for error */ 2479 #define CT7_INVAL 0x06 /* request for disabled lun */ 2480 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2481 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2482 #define CT7_TIMEOUT 0x0B /* timed out */ 2483 #define CT7_RESET 0x0E /* LIP Rset Received */ 2484 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2485 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2486 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2487 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2488 #define CT7_LOGOUT 0x29 /* port logout */ 2489 #define CT7_PORTCHANGED 0x2A /* port changed */ 2490 #define CT7_SRR 0x45 /* SRR Received */ 2491 2492 /* 2493 * Other 24XX related target IOCBs 2494 */ 2495 2496 /* 2497 * ABTS Received 2498 */ 2499 typedef struct { 2500 isphdr_t abts_header; 2501 uint8_t abts_reserved0[6]; 2502 uint16_t abts_nphdl; 2503 uint16_t abts_reserved1; 2504 uint16_t abts_sof; 2505 uint32_t abts_rxid_abts; 2506 uint16_t abts_did_lo; 2507 uint8_t abts_did_hi; 2508 uint8_t abts_r_ctl; 2509 uint16_t abts_sid_lo; 2510 uint8_t abts_sid_hi; 2511 uint8_t abts_cs_ctl; 2512 uint16_t abts_fs_ctl; 2513 uint8_t abts_f_ctl; 2514 uint8_t abts_type; 2515 uint16_t abts_seq_cnt; 2516 uint8_t abts_df_ctl; 2517 uint8_t abts_seq_id; 2518 uint16_t abts_rx_id; 2519 uint16_t abts_ox_id; 2520 uint32_t abts_param; 2521 uint8_t abts_reserved2[16]; 2522 uint32_t abts_rxid_task; 2523 } abts_t; 2524 2525 typedef struct { 2526 isphdr_t abts_rsp_header; 2527 uint32_t abts_rsp_handle; 2528 uint16_t abts_rsp_status; 2529 uint16_t abts_rsp_nphdl; 2530 uint16_t abts_rsp_ctl_flags; 2531 uint16_t abts_rsp_sof; 2532 uint32_t abts_rsp_rxid_abts; 2533 uint16_t abts_rsp_did_lo; 2534 uint8_t abts_rsp_did_hi; 2535 uint8_t abts_rsp_r_ctl; 2536 uint16_t abts_rsp_sid_lo; 2537 uint8_t abts_rsp_sid_hi; 2538 uint8_t abts_rsp_cs_ctl; 2539 uint16_t abts_rsp_f_ctl_lo; 2540 uint8_t abts_rsp_f_ctl_hi; 2541 uint8_t abts_rsp_type; 2542 uint16_t abts_rsp_seq_cnt; 2543 uint8_t abts_rsp_df_ctl; 2544 uint8_t abts_rsp_seq_id; 2545 uint16_t abts_rsp_rx_id; 2546 uint16_t abts_rsp_ox_id; 2547 uint32_t abts_rsp_param; 2548 union { 2549 struct { 2550 uint16_t reserved; 2551 uint8_t last_seq_id; 2552 uint8_t seq_id_valid; 2553 uint16_t aborted_rx_id; 2554 uint16_t aborted_ox_id; 2555 uint16_t high_seq_cnt; 2556 uint16_t low_seq_cnt; 2557 uint8_t reserved2[4]; 2558 } ba_acc; 2559 struct { 2560 uint8_t vendor_unique; 2561 uint8_t explanation; 2562 uint8_t reason; 2563 uint8_t reserved; 2564 uint8_t reserved2[12]; 2565 } ba_rjt; 2566 struct { 2567 uint8_t reserved[8]; 2568 uint32_t subcode1; 2569 uint32_t subcode2; 2570 } rsp; 2571 uint8_t reserved[16]; 2572 } abts_rsp_payload; 2573 uint32_t abts_rsp_rxid_task; 2574 } abts_rsp_t; 2575 2576 /* terminate this ABTS exchange */ 2577 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2578 2579 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2580 #define ISP24XX_ABTS_RSP_RESET 0x04 2581 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2582 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2583 #define ISP24XX_ABTS_RSP_INVXID 0x08 2584 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2585 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2586 2587 #define ISP24XX_NO_TASK 0xffffffff 2588 2589 /* 2590 * Miscellaneous 2591 * 2592 * These are the limits of the number of dma segments we 2593 * can deal with based not on the size of the segment counter 2594 * (which is 16 bits), but on the size of the number of 2595 * queue entries field (which is 8 bits). We assume no 2596 * segments in the first queue entry, so we can either 2597 * have 7 dma segments per continuation entry or 5 2598 * (for 64 bit dma).. multiplying out by 254.... 2599 */ 2600 #define ISP_NSEG_MAX 1778 2601 #define ISP_NSEG64_MAX 1270 2602 2603 #endif /* _ISPMBOX_H */ 2604