1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33 #ifndef _ISPMBOX_H 34 #define _ISPMBOX_H 35 36 /* 37 * Mailbox Command Opcodes 38 */ 39 #define MBOX_NO_OP 0x0000 40 #define MBOX_LOAD_RAM 0x0001 41 #define MBOX_EXEC_FIRMWARE 0x0002 42 #define MBOX_DUMP_RAM 0x0003 43 #define MBOX_WRITE_RAM_WORD 0x0004 44 #define MBOX_READ_RAM_WORD 0x0005 45 #define MBOX_MAILBOX_REG_TEST 0x0006 46 #define MBOX_VERIFY_CHECKSUM 0x0007 47 #define MBOX_ABOUT_FIRMWARE 0x0008 48 #define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50 #define MBOX_LOAD_RISC_RAM 0x000b 51 #define MBOX_DUMP_RISC_RAM 0x000c 52 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53 #define MBOX_CHECK_FIRMWARE 0x000e 54 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55 #define MBOX_INIT_REQ_QUEUE 0x0010 56 #define MBOX_INIT_RES_QUEUE 0x0011 57 #define MBOX_EXECUTE_IOCB 0x0012 58 #define MBOX_WAKE_UP 0x0013 59 #define MBOX_STOP_FIRMWARE 0x0014 60 #define MBOX_ABORT 0x0015 61 #define MBOX_ABORT_DEVICE 0x0016 62 #define MBOX_ABORT_TARGET 0x0017 63 #define MBOX_BUS_RESET 0x0018 64 #define MBOX_STOP_QUEUE 0x0019 65 #define MBOX_START_QUEUE 0x001a 66 #define MBOX_SINGLE_STEP_QUEUE 0x001b 67 #define MBOX_ABORT_QUEUE 0x001c 68 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70 #define MBOX_GET_FIRMWARE_STATUS 0x001f 71 #define MBOX_GET_INIT_SCSI_ID 0x0020 72 #define MBOX_GET_SELECT_TIMEOUT 0x0021 73 #define MBOX_GET_RETRY_COUNT 0x0022 74 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 75 #define MBOX_GET_CLOCK_RATE 0x0024 76 #define MBOX_GET_ACT_NEG_STATE 0x0025 77 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78 #define MBOX_GET_SBUS_PARAMS 0x0027 79 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80 #define MBOX_GET_TARGET_PARAMS 0x0028 81 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88 #define MBOX_SET_INIT_SCSI_ID 0x0030 89 #define MBOX_SET_SELECT_TIMEOUT 0x0031 90 #define MBOX_SET_RETRY_COUNT 0x0032 91 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 92 #define MBOX_SET_CLOCK_RATE 0x0034 93 #define MBOX_SET_ACT_NEG_STATE 0x0035 94 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96 #define MBOX_SET_PCI_PARAMETERS 0x0037 97 #define MBOX_SET_TARGET_PARAMS 0x0038 98 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107 #define MBOX_EXEC_BIOS_IOCB 0x0042 108 #define MBOX_SET_FW_FEATURES 0x004a 109 #define MBOX_GET_FW_FEATURES 0x004b 110 #define FW_FEATURE_FAST_POST 0x1 111 #define FW_FEATURE_LVD_NOTIFY 0x2 112 #define FW_FEATURE_RIO_32BIT 0x4 113 #define FW_FEATURE_RIO_16BIT 0x8 114 115 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 116 #define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118 #define MBOX_ENABLE_TARGET_MODE 0x0055 119 #define ENABLE_TARGET_FLAG 0x8000 120 #define ENABLE_TQING_FLAG 0x0004 121 #define ENABLE_MANDATORY_DISC 0x0002 122 #define MBOX_GET_TARGET_STATUS 0x0056 123 124 /* These are for the ISP2X00 FC cards */ 125 #define MBOX_WRITE_FC_SERDES_REG 0x0003 /* FC only */ 126 #define MBOX_READ_FC_SERDES_REG 0x0004 /* FC only */ 127 #define MBOX_GET_IO_STATUS 0x0012 128 #define MBOX_SET_TRANSMIT_PARAMS 0x0019 129 #define MBOX_SET_PORT_PARAMS 0x001a 130 #define MBOX_LOAD_OP_FW_PARAMS 0x001b 131 #define MBOX_INIT_MULTIPLE_QUEUE 0x001f 132 #define MBOX_GET_LOOP_ID 0x0020 133 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 134 #define ISP24XX_INORDER 0x0100 135 #define ISP24XX_NPIV_SAN 0x0400 136 #define ISP24XX_VSAN_SAN 0x1000 137 #define ISP24XX_FC_SP_SAN 0x2000 138 #define MBOX_GET_TIMEOUT_PARAMS 0x0022 139 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 140 #define MBOX_GENERATE_SYSTEM_ERROR 0x002a 141 #define MBOX_WRITE_SFP 0x0030 142 #define MBOX_READ_SFP 0x0031 143 #define MBOX_SET_TIMEOUT_PARAMS 0x0032 144 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 145 #define MBOX_GET_SET_FC_LED_CONF 0x003b 146 #define MBOX_RESTART_NIC_FIRMWARE 0x003d /* FCoE only */ 147 #define MBOX_ACCESS_CONTROL 0x003e 148 #define MBOX_LOOP_PORT_BYPASS 0x0040 /* FC only */ 149 #define MBOX_LOOP_PORT_ENABLE 0x0041 /* FC only */ 150 #define MBOX_GET_RESOURCE_COUNT 0x0042 151 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 152 #define MBOX_DIAGNOSTIC_ECHO_TEST 0x0044 153 #define MBOX_DIAGNOSTIC_LOOPBACK 0x0045 154 #define MBOX_ENHANCED_GET_PDB 0x0047 155 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 156 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 157 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 158 #define MBOX_GET_FCF_LIST 0x0050 /* FCoE only */ 159 #define MBOX_GET_DCBX_PARAMETERS 0x0051 /* FCoE only */ 160 #define MBOX_HOST_MEMORY_COPY 0x0053 161 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 162 #define MBOX_SEND_RNID 0x0057 163 #define MBOX_SET_PARAMETERS 0x0059 164 #define MBOX_GET_PARAMETERS 0x005a 165 #define MBOX_DRIVER_HEARTBEAT 0x005B /* FC only */ 166 #define MBOX_FW_HEARTBEAT 0x005C 167 #define MBOX_GET_SET_DATA_RATE 0x005D /* >=23XX only */ 168 #define MBGSD_GET_RATE 0 169 #define MBGSD_SET_RATE 1 170 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 171 #define MBGSD_1GB 0x00 172 #define MBGSD_2GB 0x01 173 #define MBGSD_AUTO 0x02 174 #define MBGSD_4GB 0x03 /* 24XX only */ 175 #define MBGSD_8GB 0x04 /* 25XX only */ 176 #define MBGSD_16GB 0x05 /* 26XX only */ 177 #define MBGSD_10GB 0x13 /* 26XX only */ 178 #define MBOX_SEND_RNFT 0x005e 179 #define MBOX_INIT_FIRMWARE 0x0060 180 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 181 #define MBOX_INIT_LIP 0x0062 182 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 183 #define MBOX_GET_PORT_DB 0x0064 184 #define MBOX_CLEAR_ACA 0x0065 185 #define MBOX_TARGET_RESET 0x0066 186 #define MBOX_CLEAR_TASK_SET 0x0067 187 #define MBOX_ABORT_TASK_SET 0x0068 188 #define MBOX_GET_FW_STATE 0x0069 189 #define MBOX_GET_PORT_NAME 0x006A 190 #define MBOX_GET_LINK_STATUS 0x006B 191 #define MBOX_INIT_LIP_RESET 0x006C 192 #define MBOX_GET_LINK_STAT_PR_DATA_CNT 0x006D 193 #define MBOX_SEND_SNS 0x006E 194 #define MBOX_FABRIC_LOGIN 0x006F 195 #define MBOX_SEND_CHANGE_REQUEST 0x0070 196 #define MBOX_FABRIC_LOGOUT 0x0071 197 #define MBOX_INIT_LIP_LOGIN 0x0072 198 #define MBOX_GET_PORT_NODE_NAME_LIST 0x0075 199 #define MBOX_SET_VENDOR_ID 0x0076 200 #define MBOX_GET_XGMAC_STATS 0x007a 201 #define MBOX_GET_ID_LIST 0x007C 202 #define MBOX_SEND_LFA 0x007d 203 #define MBOX_LUN_RESET 0x007E 204 205 #define ISP2100_SET_PCI_PARAM 0x00ff 206 207 #define MBOX_BUSY 0x04 208 209 /* 210 * Mailbox Command Complete Status Codes 211 */ 212 #define MBOX_COMMAND_COMPLETE 0x4000 213 #define MBOX_INVALID_COMMAND 0x4001 214 #define MBOX_HOST_INTERFACE_ERROR 0x4002 215 #define MBOX_TEST_FAILED 0x4003 216 #define MBOX_COMMAND_ERROR 0x4005 217 #define MBOX_COMMAND_PARAM_ERROR 0x4006 218 #define MBOX_PORT_ID_USED 0x4007 219 #define MBOX_LOOP_ID_USED 0x4008 220 #define MBOX_ALL_IDS_USED 0x4009 221 #define MBOX_NOT_LOGGED_IN 0x400A 222 #define MBOX_LINK_DOWN_ERROR 0x400B 223 #define MBOX_LOOPBACK_ERROR 0x400C 224 #define MBOX_CHECKSUM_ERROR 0x4010 225 #define MBOX_INVALID_PRODUCT_KEY 0x4020 226 /* pseudo mailbox completion codes */ 227 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 228 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 229 230 #define MBLOGALL 0xffffffff 231 #define MBLOGNONE 0x00000000 232 #define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f)) 233 234 /* 235 * Asynchronous event status codes 236 */ 237 #define ASYNC_BUS_RESET 0x8001 238 #define ASYNC_SYSTEM_ERROR 0x8002 239 #define ASYNC_RQS_XFER_ERR 0x8003 240 #define ASYNC_RSP_XFER_ERR 0x8004 241 #define ASYNC_QWAKEUP 0x8005 242 #define ASYNC_TIMEOUT_RESET 0x8006 243 #define ASYNC_DEVICE_RESET 0x8007 244 #define ASYNC_EXTMSG_UNDERRUN 0x800A 245 #define ASYNC_SCAM_INT 0x800B 246 #define ASYNC_HUNG_SCSI 0x800C 247 #define ASYNC_KILLED_BUS 0x800D 248 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 249 #define ASYNC_LIP_OCCURRED 0x8010 /* FC only */ 250 #define ASYNC_LOOP_UP 0x8011 251 #define ASYNC_LOOP_DOWN 0x8012 252 #define ASYNC_LOOP_RESET 0x8013 /* FC only */ 253 #define ASYNC_PDB_CHANGED 0x8014 254 #define ASYNC_CHANGE_NOTIFY 0x8015 255 #define ASYNC_LIP_F8 0x8016 /* FC only */ 256 #define ASYNC_LIP_ERROR 0x8017 /* FC only */ 257 #define ASYNC_AUTO_PLOGI_RJT 0x8018 258 #define ASYNC_SECURITY_UPDATE 0x801B 259 #define ASYNC_CMD_CMPLT 0x8020 260 #define ASYNC_CTIO_DONE 0x8021 261 #define ASYNC_RIO32_1 0x8021 262 #define ASYNC_RIO32_2 0x8022 263 #define ASYNC_IP_XMIT_DONE 0x8022 264 #define ASYNC_IP_RECV_DONE 0x8023 265 #define ASYNC_IP_BROADCAST 0x8024 266 #define ASYNC_IP_RCVQ_LOW 0x8025 267 #define ASYNC_IP_RCVQ_EMPTY 0x8026 268 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 269 #define ASYNC_ERR_LOGGING_DISABLED 0x8029 270 #define ASYNC_PTPMODE 0x8030 /* FC only */ 271 #define ASYNC_RIO16_1 0x8031 272 #define ASYNC_RIO16_2 0x8032 273 #define ASYNC_RIO16_3 0x8033 274 #define ASYNC_RIO16_4 0x8034 275 #define ASYNC_RIO16_5 0x8035 276 #define ASYNC_CONNMODE 0x8036 277 #define ISP_CONN_LOOP 1 278 #define ISP_CONN_PTP 2 279 #define ISP_CONN_BADLIP 3 280 #define ISP_CONN_FATAL 4 281 #define ISP_CONN_LOOPBACK 5 282 #define ASYNC_P2P_INIT_ERR 0x8037 283 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 284 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 285 #define ASYNC_RCV_ERR 0x8048 286 /* 287 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 288 * mailbox command to enable this. 289 */ 290 #define ASYNC_QFULL_SENT 0x8049 291 #define ASYNC_RJT_SENT 0x8049 /* 24XX only */ 292 #define ASYNC_SEL_CLASS2_P_RJT_SENT 0x804f 293 #define ASYNC_FW_RESTART_COMPLETE 0x8060 294 #define ASYNC_TEMPERATURE_ALERT 0x8070 295 #define ASYNC_INTER_DRIVER_COMP 0x8100 /* FCoE only */ 296 #define ASYNC_INTER_DRIVER_NOTIFY 0x8101 /* FCoE only */ 297 #define ASYNC_INTER_DRIVER_TIME_EXT 0x8102 /* FCoE only */ 298 #define ASYNC_NIC_FW_STATE_CHANGE 0x8200 /* FCoE only */ 299 #define ASYNC_AUTOLOAD_FW_COMPLETE 0x8400 300 #define ASYNC_AUTOLOAD_FW_FAILURE 0x8401 301 302 /* 303 * Firmware Options. There are a lot of them. 304 * 305 * IFCOPTN - ISP Fibre Channel Option Word N 306 */ 307 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 308 #define IFCOPT1_EAABSRCVD (1 << 12) 309 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 310 #define IFCOPT1_ENAPURE (1 << 10) 311 #define IFCOPT1_ENA8017 (1 << 7) 312 #define IFCOPT1_DISGPIO67 (1 << 6) 313 #define IFCOPT1_LIPLOSSIMM (1 << 5) 314 #define IFCOPT1_DISF7SWTCH (1 << 4) 315 #define IFCOPT1_CTIO_RETRY (1 << 3) 316 #define IFCOPT1_LIPASYNC (1 << 1) 317 #define IFCOPT1_LIPF8 (1 << 0) 318 319 #define IFCOPT2_LOOPBACK (1 << 1) 320 #define IFCOPT2_ATIO3_ONLY (1 << 0) 321 322 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 323 #define IFCOPT3_RNDASYNC (1 << 1) 324 325 /* 326 * All IOCB Queue entries are this size 327 */ 328 #define QENTRY_LEN 64 329 330 /* 331 * Command Structure Definitions 332 */ 333 334 typedef struct { 335 uint32_t ds_base; 336 uint32_t ds_count; 337 } ispds_t; 338 339 typedef struct { 340 uint32_t ds_base; 341 uint32_t ds_basehi; 342 uint32_t ds_count; 343 } ispds64_t; 344 345 #define DSTYPE_32BIT 0 346 #define DSTYPE_64BIT 1 347 typedef struct { 348 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 349 uint32_t ds_segment; /* unused */ 350 uint32_t ds_base; /* 32 bit address of DSD list */ 351 } ispdslist_t; 352 353 354 typedef struct { 355 uint8_t rqs_entry_type; 356 uint8_t rqs_entry_count; 357 uint8_t rqs_seqno; 358 uint8_t rqs_flags; 359 } isphdr_t; 360 361 /* RQS Flag definitions */ 362 #define RQSFLAG_CONTINUATION 0x01 363 #define RQSFLAG_FULL 0x02 364 #define RQSFLAG_BADHEADER 0x04 365 #define RQSFLAG_BADPACKET 0x08 366 #define RQSFLAG_BADCOUNT 0x10 367 #define RQSFLAG_BADORDER 0x20 368 #define RQSFLAG_MASK 0x3f 369 370 /* RQS entry_type definitions */ 371 #define RQSTYPE_REQUEST 0x01 372 #define RQSTYPE_DATASEG 0x02 373 #define RQSTYPE_RESPONSE 0x03 374 #define RQSTYPE_MARKER 0x04 375 #define RQSTYPE_CMDONLY 0x05 376 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 377 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 378 #define RQSTYPE_SCAM 0x08 379 #define RQSTYPE_A64 0x09 380 #define RQSTYPE_A64_CONT 0x0a 381 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 382 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 383 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 384 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 385 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 386 #define RQSTYPE_STATUS_CONT 0x10 387 #define RQSTYPE_T2RQS 0x11 388 #define RQSTYPE_CTIO7 0x12 389 #define RQSTYPE_IP_XMIT 0x13 390 #define RQSTYPE_TSK_MGMT 0x14 391 #define RQSTYPE_T4RQS 0x15 392 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 393 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 394 #define RQSTYPE_T7RQS 0x18 395 #define RQSTYPE_T3RQS 0x19 396 #define RQSTYPE_IP_XMIT_64 0x1b 397 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 398 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 399 #define RQSTYPE_RIO1 0x21 400 #define RQSTYPE_RIO2 0x22 401 #define RQSTYPE_IP_RECV 0x23 402 #define RQSTYPE_IP_RECV_CONT 0x24 403 #define RQSTYPE_CT_PASSTHRU 0x29 404 #define RQSTYPE_MS_PASSTHRU 0x29 405 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 406 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 407 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 408 #define RQSTYPE_ABORT_IO 0x33 409 #define RQSTYPE_T6RQS 0x48 410 #define RQSTYPE_LOGIN 0x52 411 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 412 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 413 414 415 #define ISP_RQDSEG 4 416 typedef struct { 417 isphdr_t req_header; 418 uint32_t req_handle; 419 uint8_t req_lun_trn; 420 uint8_t req_target; 421 uint16_t req_cdblen; 422 uint16_t req_flags; 423 uint16_t req_reserved; 424 uint16_t req_time; 425 uint16_t req_seg_count; 426 uint8_t req_cdb[12]; 427 ispds_t req_dataseg[ISP_RQDSEG]; 428 } ispreq_t; 429 #define ISP_RQDSEG_A64 2 430 431 typedef struct { 432 isphdr_t mrk_header; 433 uint32_t mrk_handle; 434 uint8_t mrk_reserved0; 435 uint8_t mrk_target; 436 uint16_t mrk_modifier; 437 uint16_t mrk_flags; 438 uint16_t mrk_lun; 439 uint8_t mrk_reserved1[48]; 440 } isp_marker_t; 441 442 typedef struct { 443 isphdr_t mrk_header; 444 uint32_t mrk_handle; 445 uint16_t mrk_nphdl; 446 uint8_t mrk_modifier; 447 uint8_t mrk_reserved0; 448 uint8_t mrk_reserved1; 449 uint8_t mrk_vphdl; 450 uint16_t mrk_reserved2; 451 uint8_t mrk_lun[8]; 452 uint8_t mrk_reserved3[40]; 453 } isp_marker_24xx_t; 454 455 456 #define SYNC_DEVICE 0 457 #define SYNC_TARGET 1 458 #define SYNC_ALL 2 459 #define SYNC_LIP 3 460 461 #define ISP_RQDSEG_T2 3 462 typedef struct { 463 isphdr_t req_header; 464 uint32_t req_handle; 465 uint8_t req_lun_trn; 466 uint8_t req_target; 467 uint16_t req_scclun; 468 uint16_t req_flags; 469 uint8_t req_crn; 470 uint8_t req_reserved; 471 uint16_t req_time; 472 uint16_t req_seg_count; 473 uint8_t req_cdb[16]; 474 uint32_t req_totalcnt; 475 ispds_t req_dataseg[ISP_RQDSEG_T2]; 476 } ispreqt2_t; 477 478 typedef struct { 479 isphdr_t req_header; 480 uint32_t req_handle; 481 uint16_t req_target; 482 uint16_t req_scclun; 483 uint16_t req_flags; 484 uint8_t req_crn; 485 uint8_t req_reserved; 486 uint16_t req_time; 487 uint16_t req_seg_count; 488 uint8_t req_cdb[16]; 489 uint32_t req_totalcnt; 490 ispds_t req_dataseg[ISP_RQDSEG_T2]; 491 } ispreqt2e_t; 492 493 #define ISP_RQDSEG_T3 2 494 typedef struct { 495 isphdr_t req_header; 496 uint32_t req_handle; 497 uint8_t req_lun_trn; 498 uint8_t req_target; 499 uint16_t req_scclun; 500 uint16_t req_flags; 501 uint8_t req_crn; 502 uint8_t req_reserved; 503 uint16_t req_time; 504 uint16_t req_seg_count; 505 uint8_t req_cdb[16]; 506 uint32_t req_totalcnt; 507 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 508 } ispreqt3_t; 509 #define ispreq64_t ispreqt3_t /* same as.... */ 510 511 typedef struct { 512 isphdr_t req_header; 513 uint32_t req_handle; 514 uint16_t req_target; 515 uint16_t req_scclun; 516 uint16_t req_flags; 517 uint8_t req_crn; 518 uint8_t req_reserved; 519 uint16_t req_time; 520 uint16_t req_seg_count; 521 uint8_t req_cdb[16]; 522 uint32_t req_totalcnt; 523 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 524 } ispreqt3e_t; 525 526 /* req_flag values */ 527 #define REQFLAG_NODISCON 0x0001 528 #define REQFLAG_HTAG 0x0002 529 #define REQFLAG_OTAG 0x0004 530 #define REQFLAG_STAG 0x0008 531 #define REQFLAG_TARGET_RTN 0x0010 532 533 #define REQFLAG_NODATA 0x0000 534 #define REQFLAG_DATA_IN 0x0020 535 #define REQFLAG_DATA_OUT 0x0040 536 #define REQFLAG_DATA_UNKNOWN 0x0060 537 538 #define REQFLAG_DISARQ 0x0100 539 #define REQFLAG_FRC_ASYNC 0x0200 540 #define REQFLAG_FRC_SYNC 0x0400 541 #define REQFLAG_FRC_WIDE 0x0800 542 #define REQFLAG_NOPARITY 0x1000 543 #define REQFLAG_STOPQ 0x2000 544 #define REQFLAG_XTRASNS 0x4000 545 #define REQFLAG_PRIORITY 0x8000 546 547 typedef struct { 548 isphdr_t req_header; 549 uint32_t req_handle; 550 uint8_t req_lun_trn; 551 uint8_t req_target; 552 uint16_t req_cdblen; 553 uint16_t req_flags; 554 uint16_t req_reserved; 555 uint16_t req_time; 556 uint16_t req_seg_count; 557 uint8_t req_cdb[44]; 558 } ispextreq_t; 559 560 561 /* 562 * ISP24XX structures 563 */ 564 typedef struct { 565 isphdr_t req_header; 566 uint32_t req_handle; 567 uint16_t req_nphdl; 568 uint16_t req_time; 569 uint16_t req_seg_count; 570 uint16_t req_reserved; 571 uint8_t req_lun[8]; 572 uint8_t req_alen_datadir; 573 uint8_t req_task_management; 574 uint8_t req_task_attribute; 575 uint8_t req_crn; 576 uint8_t req_cdb[16]; 577 uint32_t req_dl; 578 uint16_t req_tidlo; 579 uint8_t req_tidhi; 580 uint8_t req_vpidx; 581 ispds64_t req_dataseg; 582 } ispreqt7_t; 583 584 /* Task Management Request Function */ 585 typedef struct { 586 isphdr_t tmf_header; 587 uint32_t tmf_handle; 588 uint16_t tmf_nphdl; 589 uint8_t tmf_reserved0[2]; 590 uint16_t tmf_delay; 591 uint16_t tmf_timeout; 592 uint8_t tmf_lun[8]; 593 uint32_t tmf_flags; 594 uint8_t tmf_reserved1[20]; 595 uint16_t tmf_tidlo; 596 uint8_t tmf_tidhi; 597 uint8_t tmf_vpidx; 598 uint8_t tmf_reserved2[12]; 599 } isp24xx_tmf_t; 600 601 #define ISP24XX_TMF_NOSEND 0x80000000 602 603 #define ISP24XX_TMF_LUN_RESET 0x00000010 604 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 605 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 606 #define ISP24XX_TMF_TARGET_RESET 0x00000002 607 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 608 609 /* I/O Abort Structure */ 610 typedef struct { 611 isphdr_t abrt_header; 612 uint32_t abrt_handle; 613 uint16_t abrt_nphdl; 614 uint16_t abrt_options; 615 uint32_t abrt_cmd_handle; 616 uint16_t abrt_queue_number; 617 uint8_t abrt_reserved[30]; 618 uint16_t abrt_tidlo; 619 uint8_t abrt_tidhi; 620 uint8_t abrt_vpidx; 621 uint8_t abrt_reserved1[12]; 622 } isp24xx_abrt_t; 623 624 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 625 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 626 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 627 628 #define ISP_CDSEG 7 629 typedef struct { 630 isphdr_t req_header; 631 uint32_t req_reserved; 632 ispds_t req_dataseg[ISP_CDSEG]; 633 } ispcontreq_t; 634 635 #define ISP_CDSEG64 5 636 typedef struct { 637 isphdr_t req_header; 638 ispds64_t req_dataseg[ISP_CDSEG64]; 639 } ispcontreq64_t; 640 641 typedef struct { 642 isphdr_t req_header; 643 uint32_t req_handle; 644 uint16_t req_scsi_status; 645 uint16_t req_completion_status; 646 uint16_t req_state_flags; 647 uint16_t req_status_flags; 648 uint16_t req_time; 649 #define req_response_len req_time /* FC only */ 650 uint16_t req_sense_len; 651 uint32_t req_resid; 652 uint8_t req_response[8]; /* FC only */ 653 uint8_t req_sense_data[32]; 654 } ispstatusreq_t; 655 656 /* 657 * Status Continuation 658 */ 659 typedef struct { 660 isphdr_t req_header; 661 uint8_t req_sense_data[60]; 662 } ispstatus_cont_t; 663 664 /* 665 * 24XX Type 0 status 666 */ 667 typedef struct { 668 isphdr_t req_header; 669 uint32_t req_handle; 670 uint16_t req_completion_status; 671 uint16_t req_oxid; 672 uint32_t req_resid; 673 uint16_t req_reserved0; 674 uint16_t req_state_flags; 675 uint16_t req_retry_delay; /* aka Status Qualifier */ 676 uint16_t req_scsi_status; 677 uint32_t req_fcp_residual; 678 uint32_t req_sense_len; 679 uint32_t req_response_len; 680 uint8_t req_rsp_sense[28]; 681 } isp24xx_statusreq_t; 682 683 /* 684 * For Qlogic 2X00, the high order byte of SCSI status has 685 * additional meaning. 686 */ 687 #define RQCS_CR 0x1000 /* Confirmation Request */ 688 #define RQCS_RU 0x0800 /* Residual Under */ 689 #define RQCS_RO 0x0400 /* Residual Over */ 690 #define RQCS_RESID (RQCS_RU|RQCS_RO) 691 #define RQCS_SV 0x0200 /* Sense Length Valid */ 692 #define RQCS_RV 0x0100 /* FCP Response Length Valid */ 693 694 /* 695 * CT Passthru IOCB 696 */ 697 typedef struct { 698 isphdr_t ctp_header; 699 uint32_t ctp_handle; 700 uint16_t ctp_status; 701 uint16_t ctp_nphdl; /* n-port handle */ 702 uint16_t ctp_cmd_cnt; /* Command DSD count */ 703 uint8_t ctp_vpidx; 704 uint8_t ctp_reserved0; 705 uint16_t ctp_time; 706 uint16_t ctp_reserved1; 707 uint16_t ctp_rsp_cnt; /* Response DSD count */ 708 uint16_t ctp_reserved2[5]; 709 uint32_t ctp_rsp_bcnt; /* Response byte count */ 710 uint32_t ctp_cmd_bcnt; /* Command byte count */ 711 ispds64_t ctp_dataseg[2]; 712 } isp_ct_pt_t; 713 714 /* 715 * MS Passthru IOCB 716 */ 717 typedef struct { 718 isphdr_t ms_header; 719 uint32_t ms_handle; 720 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 721 uint16_t ms_status; 722 uint16_t ms_flags; 723 uint16_t ms_reserved1; /* low 8 bits */ 724 uint16_t ms_time; 725 uint16_t ms_cmd_cnt; /* Command DSD count */ 726 uint16_t ms_tot_cnt; /* Total DSD Count */ 727 uint8_t ms_type; /* MS type */ 728 uint8_t ms_r_ctl; /* R_CTL */ 729 uint16_t ms_rxid; /* RX_ID */ 730 uint16_t ms_reserved2; 731 uint32_t ms_handle2; 732 uint32_t ms_rsp_bcnt; /* Response byte count */ 733 uint32_t ms_cmd_bcnt; /* Command byte count */ 734 ispds64_t ms_dataseg[2]; 735 } isp_ms_t; 736 737 /* 738 * Completion Status Codes. 739 */ 740 #define RQCS_COMPLETE 0x0000 741 #define RQCS_DMA_ERROR 0x0002 742 #define RQCS_RESET_OCCURRED 0x0004 743 #define RQCS_ABORTED 0x0005 744 #define RQCS_TIMEOUT 0x0006 745 #define RQCS_DATA_OVERRUN 0x0007 746 #define RQCS_DATA_UNDERRUN 0x0015 747 #define RQCS_QUEUE_FULL 0x001C 748 749 /* 1X00 Only Completion Codes */ 750 #define RQCS_INCOMPLETE 0x0001 751 #define RQCS_TRANSPORT_ERROR 0x0003 752 #define RQCS_COMMAND_OVERRUN 0x0008 753 #define RQCS_STATUS_OVERRUN 0x0009 754 #define RQCS_BAD_MESSAGE 0x000a 755 #define RQCS_NO_MESSAGE_OUT 0x000b 756 #define RQCS_EXT_ID_FAILED 0x000c 757 #define RQCS_IDE_MSG_FAILED 0x000d 758 #define RQCS_ABORT_MSG_FAILED 0x000e 759 #define RQCS_REJECT_MSG_FAILED 0x000f 760 #define RQCS_NOP_MSG_FAILED 0x0010 761 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 762 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 763 #define RQCS_ID_MSG_FAILED 0x0013 764 #define RQCS_UNEXP_BUS_FREE 0x0014 765 #define RQCS_XACT_ERR1 0x0018 766 #define RQCS_XACT_ERR2 0x0019 767 #define RQCS_XACT_ERR3 0x001A 768 #define RQCS_BAD_ENTRY 0x001B 769 #define RQCS_PHASE_SKIPPED 0x001D 770 #define RQCS_ARQS_FAILED 0x001E 771 #define RQCS_WIDE_FAILED 0x001F 772 #define RQCS_SYNCXFER_FAILED 0x0020 773 #define RQCS_LVD_BUSERR 0x0021 774 775 /* 2X00 Only Completion Codes */ 776 #define RQCS_PORT_UNAVAILABLE 0x0028 777 #define RQCS_PORT_LOGGED_OUT 0x0029 778 #define RQCS_PORT_CHANGED 0x002A 779 #define RQCS_PORT_BUSY 0x002B 780 781 /* 24XX Only Completion Codes */ 782 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 783 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 784 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 785 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 786 787 788 /* 789 * 1X00 specific State Flags 790 */ 791 #define RQSF_GOT_BUS 0x0100 792 #define RQSF_GOT_TARGET 0x0200 793 #define RQSF_SENT_CDB 0x0400 794 #define RQSF_XFRD_DATA 0x0800 795 #define RQSF_GOT_STATUS 0x1000 796 #define RQSF_GOT_SENSE 0x2000 797 #define RQSF_XFER_COMPLETE 0x4000 798 799 /* 800 * 2X00 specific State Flags 801 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 802 */ 803 #define RQSF_DATA_IN 0x0020 804 #define RQSF_DATA_OUT 0x0040 805 #define RQSF_STAG 0x0008 806 #define RQSF_OTAG 0x0004 807 #define RQSF_HTAG 0x0002 808 /* 809 * 1X00 Status Flags 810 */ 811 #define RQSTF_DISCONNECT 0x0001 812 #define RQSTF_SYNCHRONOUS 0x0002 813 #define RQSTF_PARITY_ERROR 0x0004 814 #define RQSTF_BUS_RESET 0x0008 815 #define RQSTF_DEVICE_RESET 0x0010 816 #define RQSTF_ABORTED 0x0020 817 #define RQSTF_TIMEOUT 0x0040 818 #define RQSTF_NEGOTIATION 0x0080 819 820 /* 821 * 2X00 specific state flags 822 */ 823 /* RQSF_SENT_CDB */ 824 /* RQSF_XFRD_DATA */ 825 /* RQSF_GOT_STATUS */ 826 /* RQSF_XFER_COMPLETE */ 827 828 /* 829 * 2X00 specific status flags 830 */ 831 /* RQSTF_ABORTED */ 832 /* RQSTF_TIMEOUT */ 833 #define RQSTF_DMA_ERROR 0x0080 834 #define RQSTF_LOGOUT 0x2000 835 836 /* 837 * Miscellaneous 838 */ 839 #ifndef ISP_EXEC_THROTTLE 840 #define ISP_EXEC_THROTTLE 16 841 #endif 842 843 /* 844 * About Firmware returns an 'attribute' word in mailbox 6. 845 * These attributes are for 2200 and 2300. 846 */ 847 #define ISP_FW_ATTR_TMODE 0x0001 848 #define ISP_FW_ATTR_SCCLUN 0x0002 849 #define ISP_FW_ATTR_FABRIC 0x0004 850 #define ISP_FW_ATTR_CLASS2 0x0008 851 #define ISP_FW_ATTR_FCTAPE 0x0010 852 #define ISP_FW_ATTR_IP 0x0020 853 #define ISP_FW_ATTR_VI 0x0040 854 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 855 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 856 857 /* and these are for the 2400 */ 858 #define ISP2400_FW_ATTR_CLASS2 0x0001 859 #define ISP2400_FW_ATTR_IP 0x0002 860 #define ISP2400_FW_ATTR_MULTIID 0x0004 861 #define ISP2400_FW_ATTR_SB2 0x0008 862 #define ISP2400_FW_ATTR_T10CRC 0x0010 863 #define ISP2400_FW_ATTR_VI 0x0020 864 #define ISP2400_FW_ATTR_MQ 0x0040 865 #define ISP2400_FW_ATTR_MSIX 0x0080 866 #define ISP2400_FW_ATTR_FCOE 0x0800 867 #define ISP2400_FW_ATTR_VP0 0x1000 868 #define ISP2400_FW_ATTR_EXPFW 0x2000 869 #define ISP2400_FW_ATTR_HOTFW 0x4000 870 #define ISP2400_FW_ATTR_EXTNDED 0x8000 871 #define ISP2400_FW_ATTR_EXTVP 0x00010000 872 #define ISP2400_FW_ATTR_VN2VN 0x00040000 873 #define ISP2400_FW_ATTR_EXMOFF 0x00080000 874 #define ISP2400_FW_ATTR_NPMOFF 0x00100000 875 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000 876 #define ISP2400_FW_ATTR_SRIOV 0x02000000 877 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000 878 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 879 880 /* 881 * These are either manifestly true or are dependent on f/w attributes 882 */ 883 #define ISP_CAP_TMODE(isp) \ 884 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 885 #define ISP_CAP_SCCFW(isp) \ 886 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 887 #define ISP_CAP_2KLOGIN(isp) \ 888 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 889 890 /* 891 * This is only true for 24XX cards with this f/w attribute 892 */ 893 #define ISP_CAP_MULTI_ID(isp) \ 894 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 895 #define ISP_GET_VPIDX(isp, tag) \ 896 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 897 #define ISP_CAP_VP0(isp) \ 898 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0) 899 900 /* 901 * This is true manifestly or is dependent on a f/w attribute 902 * but may or may not actually be *enabled*. In any case, it 903 * is enabled on a per-channel basis. 904 */ 905 #define ISP_CAP_FCTAPE(isp) \ 906 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 907 908 #define ISP_FCTAPE_ENABLED(isp, chan) \ 909 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 910 911 /* 912 * Reduced Interrupt Operation Response Queue Entries 913 */ 914 915 typedef struct { 916 isphdr_t req_header; 917 uint32_t req_handles[15]; 918 } isp_rio1_t; 919 920 typedef struct { 921 isphdr_t req_header; 922 uint16_t req_handles[30]; 923 } isp_rio2_t; 924 925 /* 926 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 927 */ 928 929 /* 930 * Initialization Control Block 931 * 932 * Version One (prime) format. 933 */ 934 typedef struct { 935 uint8_t icb_version; 936 uint8_t icb_reserved0; 937 uint16_t icb_fwoptions; 938 uint16_t icb_maxfrmlen; 939 uint16_t icb_maxalloc; 940 uint16_t icb_execthrottle; 941 uint8_t icb_retry_count; 942 uint8_t icb_retry_delay; 943 uint8_t icb_portname[8]; 944 uint16_t icb_hardaddr; 945 uint8_t icb_iqdevtype; 946 uint8_t icb_logintime; 947 uint8_t icb_nodename[8]; 948 uint16_t icb_rqstout; 949 uint16_t icb_rspnsin; 950 uint16_t icb_rqstqlen; 951 uint16_t icb_rsltqlen; 952 uint16_t icb_rqstaddr[4]; 953 uint16_t icb_respaddr[4]; 954 uint16_t icb_lunenables; 955 uint8_t icb_ccnt; 956 uint8_t icb_icnt; 957 uint16_t icb_lunetimeout; 958 uint16_t icb_reserved1; 959 uint16_t icb_xfwoptions; 960 uint8_t icb_racctimer; 961 uint8_t icb_idelaytimer; 962 uint16_t icb_zfwoptions; 963 uint16_t icb_reserved2[13]; 964 } isp_icb_t; 965 966 #define ICB_VERSION1 1 967 968 #define ICBOPT_EXTENDED 0x8000 969 #define ICBOPT_BOTH_WWNS 0x4000 970 #define ICBOPT_FULL_LOGIN 0x2000 971 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 972 #define ICBOPT_PREV_ADDRESS 0x0800 973 #define ICBOPT_SRCHDOWN 0x0400 974 #define ICBOPT_NOLIP 0x0200 975 #define ICBOPT_PDBCHANGE_AE 0x0100 976 #define ICBOPT_TGT_TYPE 0x0080 977 #define ICBOPT_INI_ADISC 0x0040 978 #define ICBOPT_INI_DISABLE 0x0020 979 #define ICBOPT_TGT_ENABLE 0x0010 980 #define ICBOPT_FAST_POST 0x0008 981 #define ICBOPT_FULL_DUPLEX 0x0004 982 #define ICBOPT_FAIRNESS 0x0002 983 #define ICBOPT_HARD_ADDRESS 0x0001 984 985 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 986 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 987 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 988 #define ICBXOPT_FCTAPE 0x1000 989 #define ICBXOPT_CLASS2_ACK0 0x0200 990 #define ICBXOPT_CLASS2 0x0100 991 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 992 #define ICBXOPT_TOPO_MASK 0x0070 993 #define ICBXOPT_LOOP_ONLY 0x0000 994 #define ICBXOPT_PTP_ONLY 0x0010 995 #define ICBXOPT_LOOP_2_PTP 0x0020 996 #define ICBXOPT_PTP_2_LOOP 0x0030 997 /* 998 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 999 * RIO is not defined for the 23XX cards (just 2200) 1000 */ 1001 #define ICBXOPT_RIO_OFF 0 1002 #define ICBXOPT_RIO_16BIT 1 1003 #define ICBXOPT_RIO_32BIT 2 1004 #define ICBXOPT_RIO_16BIT_IOCB 3 1005 #define ICBXOPT_RIO_32BIT_IOCB 4 1006 #define ICBXOPT_ZIO 5 1007 #define ICBXOPT_TIMER_MASK 0x7 1008 1009 #define ICBZOPT_RATE_MASK 0xC000 1010 #define ICBZOPT_RATE_ONEGB 0x0000 1011 #define ICBZOPT_RATE_AUTO 0x8000 1012 #define ICBZOPT_RATE_TWOGB 0x4000 1013 #define ICBZOPT_50_OHM 0x2000 1014 #define ICBZOPT_NO_LOCAL_PLOGI 0x0080 1015 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 1016 #define ICBZOPT_RSPSZ_MASK 0x0030 1017 #define ICBZOPT_RSPSZ_24 0x0000 1018 #define ICBZOPT_RSPSZ_12 0x0010 1019 #define ICBZOPT_RSPSZ_24A 0x0020 1020 #define ICBZOPT_RSPSZ_32 0x0030 1021 #define ICBZOPT_SOFTID 0x0002 1022 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 1023 1024 /* 2400 F/W options */ 1025 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 1026 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 1027 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800 1028 #define ICB2400_OPT1_SRCHDOWN 0x00000400 1029 #define ICB2400_OPT1_NOLIP 0x00000200 1030 #define ICB2400_OPT1_INI_DISABLE 0x00000020 1031 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 1032 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 1033 #define ICB2400_OPT1_FAIRNESS 0x00000002 1034 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 1035 1036 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 1037 #define ICB2400_OPT2_ENA_IHA 0x04000000 1038 #define ICB2400_OPT2_QOS 0x02000000 1039 #define ICB2400_OPT2_IOCBS 0x01000000 1040 #define ICB2400_OPT2_ENA_IHR 0x00400000 1041 #define ICB2400_OPT2_ENA_VMS 0x00200000 1042 #define ICB2400_OPT2_ENA_TA 0x00100000 1043 #define ICB2400_OPT2_TPRLIC 0x00004000 1044 #define ICB2400_OPT2_FCTAPE 0x00001000 1045 #define ICB2400_OPT2_FCSP 0x00000800 1046 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1047 #define ICB2400_OPT2_CLASS2 0x00000100 1048 #define ICB2400_OPT2_NO_PLAY 0x00000080 1049 #define ICB2400_OPT2_TOPO_MASK 0x00000070 1050 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 1051 #define ICB2400_OPT2_PTP_ONLY 0x00000010 1052 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1053 #define ICB2400_OPT2_TIMER_MASK 0x0000000f 1054 #define ICB2400_OPT2_ZIO 0x00000005 1055 #define ICB2400_OPT2_ZIO1 0x00000006 1056 1057 #define ICB2400_OPT3_NO_CTXDIS 0x40000000 1058 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1059 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1060 #define ICB2400_OPT3_ENA_MFCF 0x00020000 1061 #define ICB2400_OPT3_SKIP_FOURGB 0x00010000 1062 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1063 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 1064 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 1065 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1066 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 1067 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1068 #define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000 1069 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1070 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1071 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1072 #define ICB2400_OPT3_ENA_OOF 0x00000040 1073 /* note that a response size flag of zero is reserved! */ 1074 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1075 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1076 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1077 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1078 #define ICB2400_OPT3_SOFTID 0x00000002 1079 1080 #define ICB_MIN_FRMLEN 256 1081 #define ICB_MAX_FRMLEN 2112 1082 #define ICB_DFLT_FRMLEN 1024 1083 #define ICB_DFLT_ALLOC 256 1084 #define ICB_DFLT_THROTTLE 16 1085 #define ICB_DFLT_RDELAY 5 1086 #define ICB_DFLT_RCOUNT 3 1087 1088 #define ICB_LOGIN_TOV 30 1089 #define ICB_LUN_ENABLE_TOV 15 1090 1091 1092 /* 1093 * And somebody at QLogic had a great idea that you could just change 1094 * the structure *and* keep the version number the same as the other cards. 1095 */ 1096 typedef struct { 1097 uint16_t icb_version; 1098 uint16_t icb_reserved0; 1099 uint16_t icb_maxfrmlen; 1100 uint16_t icb_execthrottle; 1101 uint16_t icb_xchgcnt; 1102 uint16_t icb_hardaddr; 1103 uint8_t icb_portname[8]; 1104 uint8_t icb_nodename[8]; 1105 uint16_t icb_rspnsin; 1106 uint16_t icb_rqstout; 1107 uint16_t icb_retry_count; 1108 uint16_t icb_priout; 1109 uint16_t icb_rsltqlen; 1110 uint16_t icb_rqstqlen; 1111 uint16_t icb_ldn_nols; 1112 uint16_t icb_prqstqlen; 1113 uint16_t icb_rqstaddr[4]; 1114 uint16_t icb_respaddr[4]; 1115 uint16_t icb_priaddr[4]; 1116 uint16_t icb_msixresp; 1117 uint16_t icb_msixatio; 1118 uint16_t icb_reserved1[2]; 1119 uint16_t icb_atio_in; 1120 uint16_t icb_atioqlen; 1121 uint16_t icb_atioqaddr[4]; 1122 uint16_t icb_idelaytimer; 1123 uint16_t icb_logintime; 1124 uint32_t icb_fwoptions1; 1125 uint32_t icb_fwoptions2; 1126 uint32_t icb_fwoptions3; 1127 uint16_t icb_qos; 1128 uint16_t icb_reserved2[3]; 1129 uint16_t icb_enodemac[3]; 1130 uint16_t icb_disctime; 1131 uint16_t icb_reserved3[4]; 1132 } isp_icb_2400_t; 1133 1134 #define RQRSP_ADDR0015 0 1135 #define RQRSP_ADDR1631 1 1136 #define RQRSP_ADDR3247 2 1137 #define RQRSP_ADDR4863 3 1138 1139 1140 #define ICB_NNM0 7 1141 #define ICB_NNM1 6 1142 #define ICB_NNM2 5 1143 #define ICB_NNM3 4 1144 #define ICB_NNM4 3 1145 #define ICB_NNM5 2 1146 #define ICB_NNM6 1 1147 #define ICB_NNM7 0 1148 1149 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1150 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1151 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1152 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1153 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1154 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1155 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1156 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1157 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1158 1159 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1160 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1161 ((uint64_t) array[ICB_NNM1] << 8) | \ 1162 ((uint64_t) array[ICB_NNM2] << 16) | \ 1163 ((uint64_t) array[ICB_NNM3] << 24) | \ 1164 ((uint64_t) array[ICB_NNM4] << 32) | \ 1165 ((uint64_t) array[ICB_NNM5] << 40) | \ 1166 ((uint64_t) array[ICB_NNM6] << 48) | \ 1167 ((uint64_t) array[ICB_NNM7] << 56) 1168 1169 1170 /* 1171 * For MULTI_ID firmware, this describes a 1172 * virtual port entity for getting status. 1173 */ 1174 typedef struct { 1175 uint16_t vp_port_status; 1176 uint8_t vp_port_options; 1177 uint8_t vp_port_loopid; 1178 uint8_t vp_port_portname[8]; 1179 uint8_t vp_port_nodename[8]; 1180 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1181 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1182 } vp_port_info_t; 1183 1184 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1185 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1186 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1187 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1188 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1189 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1190 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1191 1192 #define ICB2400_VPOPT_WRITE_SIZE 20 1193 1194 /* 1195 * For MULTI_ID firmware, we append this structure 1196 * to the isp_icb_2400_t above, followed by a list 1197 * structures that are *most* of the vp_port_info_t. 1198 */ 1199 typedef struct { 1200 uint16_t vp_count; 1201 uint16_t vp_global_options; 1202 } isp_icb_2400_vpinfo_t; 1203 1204 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1205 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1206 (ICB2400_VPINFO_OFF + \ 1207 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE)) 1208 1209 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1210 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1211 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1212 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1213 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1214 1215 typedef struct { 1216 isphdr_t vp_ctrl_hdr; 1217 uint32_t vp_ctrl_handle; 1218 uint16_t vp_ctrl_index_fail; 1219 uint16_t vp_ctrl_status; 1220 uint16_t vp_ctrl_command; 1221 uint16_t vp_ctrl_vp_count; 1222 uint16_t vp_ctrl_idmap[16]; 1223 uint16_t vp_ctrl_reserved[7]; 1224 uint16_t vp_ctrl_fcf_index; 1225 } vp_ctrl_info_t; 1226 1227 #define VP_CTRL_CMD_ENABLE_VP 0x00 1228 #define VP_CTRL_CMD_DISABLE_VP 0x08 1229 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09 1230 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A 1231 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B 1232 1233 /* 1234 * We can use this structure for modifying either one or two VP ports after initialization 1235 */ 1236 typedef struct { 1237 isphdr_t vp_mod_hdr; 1238 uint32_t vp_mod_hdl; 1239 uint16_t vp_mod_reserved0; 1240 uint16_t vp_mod_status; 1241 uint8_t vp_mod_cmd; 1242 uint8_t vp_mod_cnt; 1243 uint8_t vp_mod_idx0; 1244 uint8_t vp_mod_idx1; 1245 struct { 1246 uint8_t options; 1247 uint8_t loopid; 1248 uint16_t reserved1; 1249 uint8_t wwpn[8]; 1250 uint8_t wwnn[8]; 1251 } vp_mod_ports[2]; 1252 uint8_t vp_mod_reserved2[8]; 1253 } vp_modify_t; 1254 1255 #define VP_STS_OK 0x00 1256 #define VP_STS_ERR 0x01 1257 #define VP_CNT_ERR 0x02 1258 #define VP_GEN_ERR 0x03 1259 #define VP_IDX_ERR 0x04 1260 #define VP_STS_BSY 0x05 1261 1262 #define VP_MODIFY 0x00 1263 #define VP_MODIFY_ENA 0x01 1264 #define VP_MODIFY_OPT 0x02 1265 #define VP_RESUME 0x03 1266 1267 /* 1268 * Port Data Base Element 1269 */ 1270 1271 typedef struct { 1272 uint16_t pdb_options; 1273 uint8_t pdb_mstate; 1274 uint8_t pdb_sstate; 1275 uint8_t pdb_hardaddr_bits[4]; 1276 uint8_t pdb_portid_bits[4]; 1277 uint8_t pdb_nodename[8]; 1278 uint8_t pdb_portname[8]; 1279 uint16_t pdb_execthrottle; 1280 uint16_t pdb_exec_count; 1281 uint8_t pdb_retry_count; 1282 uint8_t pdb_retry_delay; 1283 uint16_t pdb_resalloc; 1284 uint16_t pdb_curalloc; 1285 uint16_t pdb_qhead; 1286 uint16_t pdb_qtail; 1287 uint16_t pdb_tl_next; 1288 uint16_t pdb_tl_last; 1289 uint16_t pdb_features; /* PLOGI, Common Service */ 1290 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1291 uint16_t pdb_roi; /* PLOGI, Common Service */ 1292 uint8_t pdb_target; 1293 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1294 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1295 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1296 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1297 uint16_t pdb_labrtflg; 1298 uint16_t pdb_lstopflg; 1299 uint16_t pdb_sqhead; 1300 uint16_t pdb_sqtail; 1301 uint16_t pdb_ptimer; 1302 uint16_t pdb_nxt_seqid; 1303 uint16_t pdb_fcount; 1304 uint16_t pdb_prli_len; 1305 uint16_t pdb_prli_svc0; 1306 uint16_t pdb_prli_svc3; 1307 uint16_t pdb_loopid; 1308 uint16_t pdb_il_ptr; 1309 uint16_t pdb_sl_ptr; 1310 } isp_pdb_21xx_t; 1311 1312 #define PDB_OPTIONS_XMITTING (1<<11) 1313 #define PDB_OPTIONS_LNKXMIT (1<<10) 1314 #define PDB_OPTIONS_ABORTED (1<<9) 1315 #define PDB_OPTIONS_ADISC (1<<1) 1316 1317 #define PDB_STATE_DISCOVERY 0 1318 #define PDB_STATE_WDISC_ACK 1 1319 #define PDB_STATE_PLOGI 2 1320 #define PDB_STATE_PLOGI_ACK 3 1321 #define PDB_STATE_PRLI 4 1322 #define PDB_STATE_PRLI_ACK 5 1323 #define PDB_STATE_LOGGED_IN 6 1324 #define PDB_STATE_PORT_UNAVAIL 7 1325 #define PDB_STATE_PRLO 8 1326 #define PDB_STATE_PRLO_ACK 9 1327 #define PDB_STATE_PLOGO 10 1328 #define PDB_STATE_PLOG_ACK 11 1329 1330 #define SVC3_ROLE_MASK 0x30 1331 #define SVC3_ROLE_SHIFT 4 1332 1333 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1334 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1335 1336 /* 1337 * Port Data Base Element- 24XX cards 1338 */ 1339 typedef struct { 1340 uint16_t pdb_flags; 1341 uint8_t pdb_curstate; 1342 uint8_t pdb_laststate; 1343 uint8_t pdb_hardaddr_bits[4]; 1344 uint8_t pdb_portid_bits[4]; 1345 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1346 uint16_t pdb_retry_timer; 1347 uint16_t pdb_handle; 1348 uint16_t pdb_rcv_dsize; 1349 uint16_t pdb_reserved0; 1350 uint16_t pdb_prli_svc0; 1351 uint16_t pdb_prli_svc3; 1352 uint8_t pdb_portname[8]; 1353 uint8_t pdb_nodename[8]; 1354 uint8_t pdb_reserved1[24]; 1355 } isp_pdb_24xx_t; 1356 1357 #define PDB2400_TID_SUPPORTED 0x4000 1358 #define PDB2400_FC_TAPE 0x0080 1359 #define PDB2400_CLASS2_ACK0 0x0040 1360 #define PDB2400_FCP_CONF 0x0020 1361 #define PDB2400_CLASS2 0x0010 1362 #define PDB2400_ADDR_VALID 0x0002 1363 1364 #define PDB2400_STATE_PLOGI_PEND 0x03 1365 #define PDB2400_STATE_PLOGI_DONE 0x04 1366 #define PDB2400_STATE_PRLI_PEND 0x05 1367 #define PDB2400_STATE_LOGGED_IN 0x06 1368 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1369 #define PDB2400_STATE_PRLO_PEND 0x09 1370 #define PDB2400_STATE_LOGO_PEND 0x0B 1371 1372 /* 1373 * Common elements from the above two structures that are actually useful to us. 1374 */ 1375 typedef struct { 1376 uint16_t handle; 1377 uint16_t prli_word3; 1378 uint32_t : 8, 1379 portid : 24; 1380 uint8_t portname[8]; 1381 uint8_t nodename[8]; 1382 } isp_pdb_t; 1383 1384 /* 1385 * Port/Node Name List Element 1386 */ 1387 typedef struct { 1388 uint8_t pnnle_name[8]; 1389 uint16_t pnnle_handle; 1390 uint16_t pnnle_reserved; 1391 } isp_pnnle_t; 1392 1393 #define PNNL_OPTIONS_NODE_NAMES (1<<0) 1394 #define PNNL_OPTIONS_PORT_DATA (1<<2) 1395 #define PNNL_OPTIONS_INITIATORS (1<<3) 1396 1397 /* 1398 * Port and N-Port Handle List Element 1399 */ 1400 typedef struct { 1401 uint16_t pnhle_port_id_lo; 1402 uint16_t pnhle_port_id_hi_handle; 1403 } isp_pnhle_21xx_t; 1404 1405 typedef struct { 1406 uint16_t pnhle_port_id_lo; 1407 uint16_t pnhle_port_id_hi; 1408 uint16_t pnhle_handle; 1409 } isp_pnhle_23xx_t; 1410 1411 typedef struct { 1412 uint16_t pnhle_port_id_lo; 1413 uint16_t pnhle_port_id_hi; 1414 uint16_t pnhle_handle; 1415 uint16_t pnhle_reserved; 1416 } isp_pnhle_24xx_t; 1417 1418 /* 1419 * Port Database Changed Async Event information for 24XX cards 1420 */ 1421 #define PDB24XX_AE_OK 0x00 1422 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1423 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1424 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1425 #define PDB24XX_AE_PLOGI_RCVD 0x04 1426 #define PDB24XX_AE_PLOGI_RJT 0x05 1427 #define PDB24XX_AE_PRLI_RCVD 0x06 1428 #define PDB24XX_AE_PRLI_RJT 0x07 1429 #define PDB24XX_AE_TPRLO 0x08 1430 #define PDB24XX_AE_TPRLO_RJT 0x09 1431 #define PDB24XX_AE_PRLO_RCVD 0x0a 1432 #define PDB24XX_AE_LOGO_RCVD 0x0b 1433 #define PDB24XX_AE_TOPO_CHG 0x0c 1434 #define PDB24XX_AE_NPORT_CHG 0x0d 1435 #define PDB24XX_AE_FLOGI_RJT 0x0e 1436 #define PDB24XX_AE_BAD_FANN 0x0f 1437 #define PDB24XX_AE_FLOGI_TIMO 0x10 1438 #define PDB24XX_AE_ABX_LOGO 0x11 1439 #define PDB24XX_AE_PLOGI_DONE 0x12 1440 #define PDB24XX_AE_PRLI_DONJE 0x13 1441 #define PDB24XX_AE_OPN_1 0x14 1442 #define PDB24XX_AE_OPN_2 0x15 1443 #define PDB24XX_AE_TXERR 0x16 1444 #define PDB24XX_AE_FORCED_LOGO 0x17 1445 #define PDB24XX_AE_DISC_TIMO 0x18 1446 1447 /* 1448 * Genericized Port Login/Logout software structure 1449 */ 1450 typedef struct { 1451 uint16_t handle; 1452 uint16_t channel; 1453 uint32_t 1454 flags : 8, 1455 portid : 24; 1456 } isp_plcmd_t; 1457 /* the flags to use are those for PLOGX_FLG_* below */ 1458 1459 /* 1460 * ISP24XX- Login/Logout Port IOCB 1461 */ 1462 typedef struct { 1463 isphdr_t plogx_header; 1464 uint32_t plogx_handle; 1465 uint16_t plogx_status; 1466 uint16_t plogx_nphdl; 1467 uint16_t plogx_flags; 1468 uint16_t plogx_vphdl; /* low 8 bits */ 1469 uint16_t plogx_portlo; /* low 16 bits */ 1470 uint16_t plogx_rspsz_porthi; 1471 struct { 1472 uint16_t lo16; 1473 uint16_t hi16; 1474 } plogx_ioparm[11]; 1475 } isp_plogx_t; 1476 1477 #define PLOGX_STATUS_OK 0x00 1478 #define PLOGX_STATUS_UNAVAIL 0x28 1479 #define PLOGX_STATUS_LOGOUT 0x29 1480 #define PLOGX_STATUS_IOCBERR 0x31 1481 1482 #define PLOGX_IOCBERR_NOLINK 0x01 1483 #define PLOGX_IOCBERR_NOIOCB 0x02 1484 #define PLOGX_IOCBERR_NOXGHG 0x03 1485 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1486 #define PLOGX_IOCBERR_NOFABRIC 0x05 1487 #define PLOGX_IOCBERR_NOTREADY 0x07 1488 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */ 1489 #define PLOGX_IOCBERR_NOPCB 0x0a 1490 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1491 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1492 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1493 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1494 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1495 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1496 1497 #define PLOGX_FLG_CMD_MASK 0xf 1498 #define PLOGX_FLG_CMD_PLOGI 0 1499 #define PLOGX_FLG_CMD_PRLI 1 1500 #define PLOGX_FLG_CMD_PDISC 2 1501 #define PLOGX_FLG_CMD_LOGO 8 1502 #define PLOGX_FLG_CMD_PRLO 9 1503 #define PLOGX_FLG_CMD_TPRLO 10 1504 1505 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1506 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1507 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1508 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1509 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1510 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1511 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1512 1513 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1514 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1515 1516 /* 1517 * Report ID Acquisistion (24XX multi-id firmware) 1518 */ 1519 typedef struct { 1520 isphdr_t ridacq_hdr; 1521 uint32_t ridacq_handle; 1522 uint8_t ridacq_vp_acquired; 1523 uint8_t ridacq_vp_setup; 1524 uint8_t ridacq_vp_index; 1525 uint8_t ridacq_vp_status; 1526 uint16_t ridacq_vp_port_lo; 1527 uint8_t ridacq_vp_port_hi; 1528 uint8_t ridacq_format; /* 0 or 1 */ 1529 uint16_t ridacq_map[8]; 1530 uint8_t ridacq_reserved1[32]; 1531 } isp_ridacq_t; 1532 1533 #define RIDACQ_STS_COMPLETE 0 1534 #define RIDACQ_STS_UNACQUIRED 1 1535 #define RIDACQ_STS_CHANGED 2 1536 #define RIDACQ_STS_SNS_TIMEOUT 3 1537 #define RIDACQ_STS_SNS_REJECTED 4 1538 #define RIDACQ_STS_SCR_TIMEOUT 5 1539 #define RIDACQ_STS_SCR_REJECTED 6 1540 1541 /* 1542 * Simple Name Server Data Structures 1543 */ 1544 #define SNS_GA_NXT 0x100 1545 #define SNS_GPN_ID 0x112 1546 #define SNS_GNN_ID 0x113 1547 #define SNS_GFF_ID 0x11F 1548 #define SNS_GID_FT 0x171 1549 #define SNS_RFT_ID 0x217 1550 #define SNS_RFF_ID 0x21F 1551 typedef struct { 1552 uint16_t snscb_rblen; /* response buffer length (words) */ 1553 uint16_t snscb_reserved0; 1554 uint16_t snscb_addr[4]; /* response buffer address */ 1555 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1556 uint16_t snscb_reserved1; 1557 uint16_t snscb_data[]; /* variable data */ 1558 } sns_screq_t; /* Subcommand Request Structure */ 1559 1560 typedef struct { 1561 uint16_t snscb_rblen; /* response buffer length (words) */ 1562 uint16_t snscb_reserved0; 1563 uint16_t snscb_addr[4]; /* response buffer address */ 1564 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1565 uint16_t snscb_reserved1; 1566 uint16_t snscb_cmd; 1567 uint16_t snscb_reserved2; 1568 uint32_t snscb_reserved3; 1569 uint32_t snscb_port; 1570 } sns_ga_nxt_req_t; 1571 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1572 1573 typedef struct { 1574 uint16_t snscb_rblen; /* response buffer length (words) */ 1575 uint16_t snscb_reserved0; 1576 uint16_t snscb_addr[4]; /* response buffer address */ 1577 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1578 uint16_t snscb_reserved1; 1579 uint16_t snscb_cmd; 1580 uint16_t snscb_reserved2; 1581 uint32_t snscb_reserved3; 1582 uint32_t snscb_portid; 1583 } sns_gxn_id_req_t; 1584 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1585 1586 typedef struct { 1587 uint16_t snscb_rblen; /* response buffer length (words) */ 1588 uint16_t snscb_reserved0; 1589 uint16_t snscb_addr[4]; /* response buffer address */ 1590 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1591 uint16_t snscb_reserved1; 1592 uint16_t snscb_cmd; 1593 uint16_t snscb_mword_div_2; 1594 uint32_t snscb_reserved3; 1595 uint32_t snscb_fc4_type; 1596 } sns_gid_ft_req_t; 1597 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1598 1599 typedef struct { 1600 uint16_t snscb_rblen; /* response buffer length (words) */ 1601 uint16_t snscb_reserved0; 1602 uint16_t snscb_addr[4]; /* response buffer address */ 1603 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1604 uint16_t snscb_reserved1; 1605 uint16_t snscb_cmd; 1606 uint16_t snscb_reserved2; 1607 uint32_t snscb_reserved3; 1608 uint32_t snscb_port; 1609 uint32_t snscb_fc4_types[8]; 1610 } sns_rft_id_req_t; 1611 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1612 1613 typedef struct { 1614 ct_hdr_t snscb_cthdr; 1615 uint8_t snscb_port_type; 1616 uint8_t snscb_port_id[3]; 1617 uint8_t snscb_portname[8]; 1618 uint16_t snscb_data[]; /* variable data */ 1619 } sns_scrsp_t; /* Subcommand Response Structure */ 1620 1621 typedef struct { 1622 ct_hdr_t snscb_cthdr; 1623 uint8_t snscb_port_type; 1624 uint8_t snscb_port_id[3]; 1625 uint8_t snscb_portname[8]; 1626 uint8_t snscb_pnlen; /* symbolic port name length */ 1627 uint8_t snscb_pname[255]; /* symbolic port name */ 1628 uint8_t snscb_nodename[8]; 1629 uint8_t snscb_nnlen; /* symbolic node name length */ 1630 uint8_t snscb_nname[255]; /* symbolic node name */ 1631 uint8_t snscb_ipassoc[8]; 1632 uint8_t snscb_ipaddr[16]; 1633 uint8_t snscb_svc_class[4]; 1634 uint8_t snscb_fc4_types[32]; 1635 uint8_t snscb_fpname[8]; 1636 uint8_t snscb_reserved; 1637 uint8_t snscb_hardaddr[3]; 1638 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1639 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1640 1641 typedef struct { 1642 ct_hdr_t snscb_cthdr; 1643 uint8_t snscb_wwn[8]; 1644 } sns_gxn_id_rsp_t; 1645 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1646 1647 typedef struct { 1648 ct_hdr_t snscb_cthdr; 1649 uint32_t snscb_fc4_features[32]; 1650 } sns_gff_id_rsp_t; 1651 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1652 1653 typedef struct { 1654 ct_hdr_t snscb_cthdr; 1655 struct { 1656 uint8_t control; 1657 uint8_t portid[3]; 1658 } snscb_ports[1]; 1659 } sns_gid_ft_rsp_t; 1660 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1661 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1662 1663 /* 1664 * Other Misc Structures 1665 */ 1666 1667 /* ELS Pass Through */ 1668 typedef struct { 1669 isphdr_t els_hdr; 1670 uint32_t els_handle; 1671 uint16_t els_status; 1672 uint16_t els_nphdl; 1673 uint16_t els_xmit_dsd_count; /* outgoing only */ 1674 uint8_t els_vphdl; 1675 uint8_t els_sof; 1676 uint32_t els_rxid; 1677 uint16_t els_recv_dsd_count; /* outgoing only */ 1678 uint8_t els_opcode; 1679 uint8_t els_reserved1; 1680 uint8_t els_did_lo; 1681 uint8_t els_did_mid; 1682 uint8_t els_did_hi; 1683 uint8_t els_reserved2; 1684 uint16_t els_reserved3; 1685 uint16_t els_ctl_flags; 1686 union { 1687 struct { 1688 uint32_t _els_bytecnt; 1689 uint32_t _els_subcode1; 1690 uint32_t _els_subcode2; 1691 uint8_t _els_reserved4[20]; 1692 } in; 1693 struct { 1694 uint32_t _els_recv_bytecnt; 1695 uint32_t _els_xmit_bytecnt; 1696 uint32_t _els_xmit_dsd_length; 1697 uint16_t _els_xmit_dsd_a1500; 1698 uint16_t _els_xmit_dsd_a3116; 1699 uint16_t _els_xmit_dsd_a4732; 1700 uint16_t _els_xmit_dsd_a6348; 1701 uint32_t _els_recv_dsd_length; 1702 uint16_t _els_recv_dsd_a1500; 1703 uint16_t _els_recv_dsd_a3116; 1704 uint16_t _els_recv_dsd_a4732; 1705 uint16_t _els_recv_dsd_a6348; 1706 } out; 1707 } inout; 1708 #define els_bytecnt inout.in._els_bytecnt 1709 #define els_subcode1 inout.in._els_subcode1 1710 #define els_subcode2 inout.in._els_subcode2 1711 #define els_reserved4 inout.in._els_reserved4 1712 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1713 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1714 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1715 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1716 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1717 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1718 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1719 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1720 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1721 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1722 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1723 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1724 } els_t; 1725 1726 /* 1727 * A handy package structure for running FC-SCSI commands internally 1728 */ 1729 typedef struct { 1730 uint16_t handle; 1731 uint16_t lun; 1732 uint32_t 1733 channel : 8, 1734 portid : 24; 1735 uint32_t timeout; 1736 union { 1737 struct { 1738 uint32_t data_length; 1739 uint32_t 1740 no_wait : 1, 1741 do_read : 1; 1742 uint8_t cdb[16]; 1743 void *data_ptr; 1744 } beg; 1745 struct { 1746 uint32_t data_residual; 1747 uint8_t status; 1748 uint8_t pad; 1749 uint16_t sense_length; 1750 uint8_t sense_data[32]; 1751 } end; 1752 } fcd; 1753 } isp_xcmd_t; 1754 1755 /* 1756 * Target Mode related definitions 1757 */ 1758 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1759 #define QLTM_SVALID 0x80 1760 1761 /* 1762 * Structure for Enable Lun and Modify Lun queue entries 1763 */ 1764 typedef struct { 1765 isphdr_t le_header; 1766 uint32_t le_reserved; 1767 uint8_t le_lun; 1768 uint8_t le_rsvd; 1769 uint8_t le_ops; /* Modify LUN only */ 1770 uint8_t le_tgt; /* Not for FC */ 1771 uint32_t le_flags; /* Not for FC */ 1772 uint8_t le_status; 1773 uint8_t le_reserved2; 1774 uint8_t le_cmd_count; 1775 uint8_t le_in_count; 1776 uint8_t le_cdb6len; /* Not for FC */ 1777 uint8_t le_cdb7len; /* Not for FC */ 1778 uint16_t le_timeout; 1779 uint16_t le_reserved3[20]; 1780 } lun_entry_t; 1781 1782 /* 1783 * le_flags values 1784 */ 1785 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1786 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1787 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1788 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1789 1790 /* 1791 * le_ops values 1792 */ 1793 #define LUN_CCINCR 0x01 /* increment command count */ 1794 #define LUN_CCDECR 0x02 /* decrement command count */ 1795 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1796 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1797 1798 /* 1799 * le_status values 1800 */ 1801 #define LUN_OK 0x01 /* we be rockin' */ 1802 #define LUN_ERR 0x04 /* request completed with error */ 1803 #define LUN_INVAL 0x06 /* invalid request */ 1804 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1805 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1806 1807 /* 1808 * Immediate Notify Entry structure 1809 */ 1810 #define IN_MSGLEN 8 /* 8 bytes */ 1811 #define IN_RSVDLEN 8 /* 8 words */ 1812 typedef struct { 1813 isphdr_t in_header; 1814 uint32_t in_reserved; 1815 uint8_t in_lun; /* lun */ 1816 uint8_t in_iid; /* initiator */ 1817 uint8_t in_reserved2; 1818 uint8_t in_tgt; /* target */ 1819 uint32_t in_flags; 1820 uint8_t in_status; 1821 uint8_t in_rsvd2; 1822 uint8_t in_tag_val; /* tag value */ 1823 uint8_t in_tag_type; /* tag type */ 1824 uint16_t in_seqid; /* sequence id */ 1825 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1826 uint16_t in_reserved3[IN_RSVDLEN]; 1827 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1828 } in_entry_t; 1829 1830 typedef struct { 1831 isphdr_t in_header; 1832 uint32_t in_reserved; 1833 uint8_t in_lun; /* lun */ 1834 uint8_t in_iid; /* initiator */ 1835 uint16_t in_scclun; 1836 uint32_t in_reserved2; 1837 uint16_t in_status; 1838 uint16_t in_task_flags; 1839 uint16_t in_seqid; /* sequence id */ 1840 } in_fcentry_t; 1841 1842 typedef struct { 1843 isphdr_t in_header; 1844 uint32_t in_reserved; 1845 uint16_t in_iid; /* initiator */ 1846 uint16_t in_scclun; 1847 uint32_t in_reserved2; 1848 uint16_t in_status; 1849 uint16_t in_task_flags; 1850 uint16_t in_seqid; /* sequence id */ 1851 } in_fcentry_e_t; 1852 1853 /* 1854 * Values for the in_status field 1855 */ 1856 #define IN_REJECT 0x0D /* Message Reject message received */ 1857 #define IN_RESET 0x0E /* Bus Reset occurred */ 1858 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1859 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1860 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1861 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1862 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1863 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1864 #define IN_PORT_CHANGED 0x2A /* port changed */ 1865 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1866 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1867 #define IN_SRR_RCVD 0x45 /* SRR received */ 1868 1869 /* 1870 * Values for the in_task_flags field- should only get one at a time! 1871 */ 1872 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1873 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1874 #define TASK_FLAGS_TARGET_RESET (1<<13) 1875 #define TASK_FLAGS_LUN_RESET (1<<12) 1876 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1877 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1878 1879 /* 1880 * ISP24XX Immediate Notify 1881 */ 1882 typedef struct { 1883 isphdr_t in_header; 1884 uint32_t in_reserved; 1885 uint16_t in_nphdl; 1886 uint16_t in_reserved1; 1887 uint16_t in_flags; 1888 uint16_t in_srr_rxid; 1889 uint16_t in_status; 1890 uint8_t in_status_subcode; 1891 uint8_t in_fwhandle; 1892 uint32_t in_rxid; 1893 uint16_t in_srr_reloff_lo; 1894 uint16_t in_srr_reloff_hi; 1895 uint16_t in_srr_iu; 1896 uint16_t in_srr_oxid; 1897 /* 1898 * If bit 2 is set in in_flags, the N-Port and 1899 * handle tags are valid. If the received ELS is 1900 * a LOGO, then these tags contain the N Port ID 1901 * from the LOGO payload. If the received ELS 1902 * request is TPRLO, these tags contain the 1903 * Third Party Originator N Port ID. 1904 */ 1905 uint16_t in_nport_id_hi; 1906 #define in_prli_options in_nport_id_hi 1907 uint8_t in_nport_id_lo; 1908 uint8_t in_reserved3; 1909 uint16_t in_np_handle; 1910 uint8_t in_reserved4[12]; 1911 uint8_t in_reserved5; 1912 uint8_t in_vpidx; 1913 uint32_t in_reserved6; 1914 uint16_t in_portid_lo; 1915 uint8_t in_portid_hi; 1916 uint8_t in_reserved7; 1917 uint16_t in_reserved8; 1918 uint16_t in_oxid; 1919 } in_fcentry_24xx_t; 1920 1921 #define IN24XX_FLAG_PUREX_IOCB 0x1 1922 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1923 #define IN24XX_FLAG_NPHDL_VALID 0x4 1924 #define IN24XX_FLAG_N2N_PRLI 0x8 1925 #define IN24XX_FLAG_PN_NN_VALID 0x10 1926 1927 #define IN24XX_LIP_RESET 0x0E 1928 #define IN24XX_LINK_RESET 0x0F 1929 #define IN24XX_PORT_LOGOUT 0x29 1930 #define IN24XX_PORT_CHANGED 0x2A 1931 #define IN24XX_LINK_FAILED 0x2E 1932 #define IN24XX_SRR_RCVD 0x45 1933 #define IN24XX_ELS_RCVD 0x46 /* 1934 * login-affectin ELS received- check 1935 * subcode for specific opcode 1936 */ 1937 1938 /* 1939 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1940 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1941 * Big Endian format. 1942 */ 1943 #define IN24XX_PRLI_WWNN_OFF 0x18 1944 #define IN24XX_PRLI_WWPN_OFF 0x28 1945 #define IN24XX_PLOGI_WWNN_OFF 0x20 1946 #define IN24XX_PLOGI_WWPN_OFF 0x28 1947 1948 /* 1949 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1950 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1951 */ 1952 #define IN24XX_LOGO_WWPN_OFF 0x28 1953 1954 /* 1955 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1956 */ 1957 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1958 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1959 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1960 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1961 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1962 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1963 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1964 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1965 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1966 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1967 1968 /* 1969 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1970 */ 1971 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1972 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1973 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1974 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1975 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1976 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1977 1978 /* 1979 * Notify Acknowledge Entry structure 1980 */ 1981 #define NA_RSVDLEN 22 1982 typedef struct { 1983 isphdr_t na_header; 1984 uint32_t na_reserved; 1985 uint8_t na_lun; /* lun */ 1986 uint8_t na_iid; /* initiator */ 1987 uint8_t na_reserved2; 1988 uint8_t na_tgt; /* target */ 1989 uint32_t na_flags; 1990 uint8_t na_status; 1991 uint8_t na_event; 1992 uint16_t na_seqid; /* sequence id */ 1993 uint16_t na_reserved3[NA_RSVDLEN]; 1994 } na_entry_t; 1995 1996 /* 1997 * Value for the na_event field 1998 */ 1999 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 2000 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 2001 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 2002 2003 #define NA2_RSVDLEN 21 2004 typedef struct { 2005 isphdr_t na_header; 2006 uint32_t na_reserved; 2007 uint8_t na_reserved1; 2008 uint8_t na_iid; /* initiator loop id */ 2009 uint16_t na_response; 2010 uint16_t na_flags; 2011 uint16_t na_reserved2; 2012 uint16_t na_status; 2013 uint16_t na_task_flags; 2014 uint16_t na_seqid; /* sequence id */ 2015 uint16_t na_reserved3[NA2_RSVDLEN]; 2016 } na_fcentry_t; 2017 2018 typedef struct { 2019 isphdr_t na_header; 2020 uint32_t na_reserved; 2021 uint16_t na_iid; /* initiator loop id */ 2022 uint16_t na_response; /* response code */ 2023 uint16_t na_flags; 2024 uint16_t na_reserved2; 2025 uint16_t na_status; 2026 uint16_t na_task_flags; 2027 uint16_t na_seqid; /* sequence id */ 2028 uint16_t na_reserved3[NA2_RSVDLEN]; 2029 } na_fcentry_e_t; 2030 2031 #define NAFC_RCOUNT 0x80 /* increment resource count */ 2032 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 2033 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 2034 2035 /* 2036 * ISP24XX Notify Acknowledge 2037 */ 2038 2039 typedef struct { 2040 isphdr_t na_header; 2041 uint32_t na_handle; 2042 uint16_t na_nphdl; 2043 uint16_t na_reserved1; 2044 uint16_t na_flags; 2045 uint16_t na_srr_rxid; 2046 uint16_t na_status; 2047 uint8_t na_status_subcode; 2048 uint8_t na_fwhandle; 2049 uint32_t na_rxid; 2050 uint16_t na_srr_reloff_lo; 2051 uint16_t na_srr_reloff_hi; 2052 uint16_t na_srr_iu; 2053 uint16_t na_srr_flags; 2054 uint8_t na_reserved3[18]; 2055 uint8_t na_reserved4; 2056 uint8_t na_vpidx; 2057 uint8_t na_srr_reject_vunique; 2058 uint8_t na_srr_reject_explanation; 2059 uint8_t na_srr_reject_code; 2060 uint8_t na_reserved5; 2061 uint8_t na_reserved6[6]; 2062 uint16_t na_oxid; 2063 } na_fcentry_24xx_t; 2064 2065 /* 2066 * Accept Target I/O Entry structure 2067 */ 2068 #define ATIO_CDBLEN 26 2069 2070 typedef struct { 2071 isphdr_t at_header; 2072 uint16_t at_reserved; 2073 uint16_t at_handle; 2074 uint8_t at_lun; /* lun */ 2075 uint8_t at_iid; /* initiator */ 2076 uint8_t at_cdblen; /* cdb length */ 2077 uint8_t at_tgt; /* target */ 2078 uint32_t at_flags; 2079 uint8_t at_status; /* firmware status */ 2080 uint8_t at_scsi_status; /* scsi status */ 2081 uint8_t at_tag_val; /* tag value */ 2082 uint8_t at_tag_type; /* tag type */ 2083 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2084 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2085 } at_entry_t; 2086 2087 /* 2088 * at_flags values 2089 */ 2090 #define AT_NODISC 0x00008000 /* disconnect disabled */ 2091 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2092 2093 /* 2094 * at_status values 2095 */ 2096 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2097 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2098 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2099 #define AT_NOCAP 0x16 /* Requested capability not available */ 2100 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2101 #define AT_CDB 0x3D /* CDB received */ 2102 /* 2103 * Macros to create and fetch and test concatenated handle and tag value macros 2104 * (SPI only) 2105 */ 2106 #define AT_MAKE_TAGID(tid, aep) \ 2107 tid = aep->at_handle; \ 2108 if (aep->at_flags & AT_TQAE) { \ 2109 tid |= (aep->at_tag_val << 16); \ 2110 tid |= (1 << 24); \ 2111 } 2112 2113 #define CT_MAKE_TAGID(tid, ct) \ 2114 tid = ct->ct_fwhandle; \ 2115 if (ct->ct_flags & CT_TQAE) { \ 2116 tid |= (ct->ct_tag_val << 16); \ 2117 tid |= (1 << 24); \ 2118 } 2119 2120 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2121 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2122 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2123 2124 #define IN_MAKE_TAGID(tid, inp) \ 2125 tid = inp->in_seqid; \ 2126 tid |= (inp->in_tag_val << 16); \ 2127 tid |= (1 << 24) 2128 2129 /* 2130 * Accept Target I/O Entry structure, Type 2 2131 */ 2132 #define ATIO2_CDBLEN 16 2133 2134 typedef struct { 2135 isphdr_t at_header; 2136 uint32_t at_reserved; 2137 uint8_t at_lun; /* lun or reserved */ 2138 uint8_t at_iid; /* initiator */ 2139 uint16_t at_rxid; /* response ID */ 2140 uint16_t at_flags; 2141 uint16_t at_status; /* firmware status */ 2142 uint8_t at_crn; /* command reference number */ 2143 uint8_t at_taskcodes; 2144 uint8_t at_taskflags; 2145 uint8_t at_execodes; 2146 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2147 uint32_t at_datalen; /* allocated data len */ 2148 uint16_t at_scclun; /* SCC Lun or reserved */ 2149 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2150 uint16_t at_reserved2[6]; 2151 uint16_t at_oxid; 2152 } at2_entry_t; 2153 2154 typedef struct { 2155 isphdr_t at_header; 2156 uint32_t at_reserved; 2157 uint16_t at_iid; /* initiator */ 2158 uint16_t at_rxid; /* response ID */ 2159 uint16_t at_flags; 2160 uint16_t at_status; /* firmware status */ 2161 uint8_t at_crn; /* command reference number */ 2162 uint8_t at_taskcodes; 2163 uint8_t at_taskflags; 2164 uint8_t at_execodes; 2165 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2166 uint32_t at_datalen; /* allocated data len */ 2167 uint16_t at_scclun; /* SCC Lun or reserved */ 2168 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2169 uint16_t at_reserved2[6]; 2170 uint16_t at_oxid; 2171 } at2e_entry_t; 2172 2173 #define ATIO2_WWPN_OFFSET 0x2A 2174 #define ATIO2_OXID_OFFSET 0x3E 2175 2176 #define ATIO2_TC_ATTR_MASK 0x7 2177 #define ATIO2_TC_ATTR_SIMPLEQ 0 2178 #define ATIO2_TC_ATTR_HEADOFQ 1 2179 #define ATIO2_TC_ATTR_ORDERED 2 2180 #define ATIO2_TC_ATTR_ACAQ 4 2181 #define ATIO2_TC_ATTR_UNTAGGED 5 2182 2183 #define ATIO2_EX_WRITE 0x1 2184 #define ATIO2_EX_READ 0x2 2185 /* 2186 * Macros to create and fetch and test concatenated handle and tag value macros 2187 */ 2188 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2189 tid = aep->at_rxid; \ 2190 tid |= (((uint64_t)inst) << 32); \ 2191 tid |= (((uint64_t)bus) << 48) 2192 2193 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2194 tid = ct->ct_rxid; \ 2195 tid |= (((uint64_t)inst) << 32); \ 2196 tid |= (((uint64_t)(bus & 0xff)) << 48) 2197 2198 #define AT2_HAS_TAG(val) 1 2199 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2200 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2201 #define AT2_GET_HANDLE AT2_GET_TAG 2202 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2203 2204 #define FC_HAS_TAG AT2_HAS_TAG 2205 #define FC_GET_TAG AT2_GET_TAG 2206 #define FC_GET_INST AT2_GET_INST 2207 #define FC_GET_HANDLE AT2_GET_HANDLE 2208 2209 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2210 tid = seqid; \ 2211 tid |= (((uint64_t)inst) << 32); \ 2212 tid |= (((uint64_t)(bus & 0xff)) << 48) 2213 2214 #define FC_TAG_INSERT_INST(tid, inst) \ 2215 tid &= ~0x0000ffff00000000ull; \ 2216 tid |= (((uint64_t)inst) << 32) 2217 2218 /* 2219 * 24XX ATIO Definition 2220 * 2221 * This is *quite* different from other entry types. 2222 * First of all, it has its own queue it comes in on. 2223 * 2224 * Secondly, it doesn't have a normal header. 2225 * 2226 * Thirdly, it's just a passthru of the FCP CMND IU 2227 * which is recorded in big endian mode. 2228 */ 2229 typedef struct { 2230 uint8_t at_type; 2231 uint8_t at_count; 2232 /* 2233 * Task attribute in high four bits, 2234 * the rest is the FCP CMND IU Length. 2235 * NB: the command can extend past the 2236 * length for a single queue entry. 2237 */ 2238 uint16_t at_ta_len; 2239 uint32_t at_rxid; 2240 fc_hdr_t at_hdr; 2241 fcp_cmnd_iu_t at_cmnd; 2242 } at7_entry_t; 2243 #define AT7_NORESRC_RXID 0xffffffff 2244 2245 2246 /* 2247 * Continue Target I/O Entry structure 2248 * Request from driver. The response from the 2249 * ISP firmware is the same except that the last 18 2250 * bytes are overwritten by suggested sense data if 2251 * the 'autosense valid' bit is set in the status byte. 2252 */ 2253 typedef struct { 2254 isphdr_t ct_header; 2255 uint16_t ct_syshandle; 2256 uint16_t ct_fwhandle; /* required by f/w */ 2257 uint8_t ct_lun; /* lun */ 2258 uint8_t ct_iid; /* initiator id */ 2259 uint8_t ct_reserved2; 2260 uint8_t ct_tgt; /* our target id */ 2261 uint32_t ct_flags; 2262 uint8_t ct_status; /* isp status */ 2263 uint8_t ct_scsi_status; /* scsi status */ 2264 uint8_t ct_tag_val; /* tag value */ 2265 uint8_t ct_tag_type; /* tag type */ 2266 uint32_t ct_xfrlen; /* transfer length */ 2267 uint32_t ct_resid; /* residual length */ 2268 uint16_t ct_timeout; 2269 uint16_t ct_seg_count; 2270 ispds_t ct_dataseg[ISP_RQDSEG]; 2271 } ct_entry_t; 2272 2273 /* 2274 * For some of the dual port SCSI adapters, port (bus #) is reported 2275 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2276 * 2277 * Note that this does not apply to FC adapters at all which can and 2278 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2279 * that have logged in across a SCSI fabric. 2280 */ 2281 #define GET_IID_VAL(x) (x & 0x3f) 2282 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2283 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2284 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2285 2286 /* 2287 * ct_flags values 2288 */ 2289 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2290 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2291 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2292 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2293 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2294 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2295 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2296 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2297 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2298 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2299 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2300 2301 /* 2302 * ct_status values 2303 * - set by the firmware when it returns the CTIO 2304 */ 2305 #define CT_OK 0x01 /* completed without error */ 2306 #define CT_ABORTED 0x02 /* aborted by host */ 2307 #define CT_ERR 0x04 /* see sense data for error */ 2308 #define CT_INVAL 0x06 /* request for disabled lun */ 2309 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2310 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2311 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2312 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2313 #define CT_TIMEOUT 0x0B /* timed out */ 2314 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2315 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2316 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2317 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2318 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2319 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2320 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2321 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2322 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2323 #define CT_LOGOUT 0x29 /* port logout */ 2324 #define CT_PORTCHANGED 0x2A /* port changed */ 2325 #define CT_IDE 0x33 /* Initiator Detected Error */ 2326 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2327 #define CT_SRR 0x45 /* SRR Received */ 2328 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2329 2330 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2331 2332 /* 2333 * When the firmware returns a CTIO entry, it may overwrite the last 2334 * part of the structure with sense data. This starts at offset 0x2E 2335 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2336 * than define a new struct for this, I'm just using the sense data 2337 * offset. 2338 */ 2339 #define CTIO_SENSE_OFFSET 0x2E 2340 2341 /* 2342 * Entry length in u_longs. All entries are the same size so 2343 * any one will do as the numerator. 2344 */ 2345 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2346 2347 /* 2348 * QLA2100 CTIO (type 2) entry 2349 */ 2350 #define MAXRESPLEN 26 2351 typedef struct { 2352 isphdr_t ct_header; 2353 uint32_t ct_syshandle; 2354 uint8_t ct_lun; /* lun */ 2355 uint8_t ct_iid; /* initiator id */ 2356 uint16_t ct_rxid; /* response ID */ 2357 uint16_t ct_flags; 2358 uint16_t ct_status; /* isp status */ 2359 uint16_t ct_timeout; 2360 uint16_t ct_seg_count; 2361 uint32_t ct_reloff; /* relative offset */ 2362 uint32_t ct_resid; /* residual length */ 2363 union { 2364 /* 2365 * The three different modes that the target driver 2366 * can set the CTIO{2,3,4} up as. 2367 * 2368 * The first is for sending FCP_DATA_IUs as well as 2369 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2370 * 2371 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2372 * Note that no FCP_DATA_IUs will be sent. 2373 * 2374 * The third is for sending FCP_RSP_IUs as built specifically 2375 * in system memory as located by the isp_dataseg. 2376 */ 2377 struct { 2378 uint32_t _reserved; 2379 uint16_t _reserved2; 2380 uint16_t ct_scsi_status; 2381 uint32_t ct_xfrlen; 2382 union { 2383 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2384 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2385 ispdslist_t ct_dslist; 2386 } u; 2387 } m0; 2388 struct { 2389 uint16_t _reserved; 2390 uint16_t _reserved2; 2391 uint16_t ct_senselen; 2392 uint16_t ct_scsi_status; 2393 uint16_t ct_resplen; 2394 uint8_t ct_resp[MAXRESPLEN]; 2395 } m1; 2396 struct { 2397 uint32_t _reserved; 2398 uint16_t _reserved2; 2399 uint16_t _reserved3; 2400 uint32_t ct_datalen; 2401 union { 2402 ispds_t ct_fcp_rsp_iudata_32; 2403 ispds64_t ct_fcp_rsp_iudata_64; 2404 } u; 2405 } m2; 2406 } rsp; 2407 } ct2_entry_t; 2408 2409 typedef struct { 2410 isphdr_t ct_header; 2411 uint32_t ct_syshandle; 2412 uint16_t ct_iid; /* initiator id */ 2413 uint16_t ct_rxid; /* response ID */ 2414 uint16_t ct_flags; 2415 uint16_t ct_status; /* isp status */ 2416 uint16_t ct_timeout; 2417 uint16_t ct_seg_count; 2418 uint32_t ct_reloff; /* relative offset */ 2419 uint32_t ct_resid; /* residual length */ 2420 union { 2421 struct { 2422 uint32_t _reserved; 2423 uint16_t _reserved2; 2424 uint16_t ct_scsi_status; 2425 uint32_t ct_xfrlen; 2426 union { 2427 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2428 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2429 ispdslist_t ct_dslist; 2430 } u; 2431 } m0; 2432 struct { 2433 uint16_t _reserved; 2434 uint16_t _reserved2; 2435 uint16_t ct_senselen; 2436 uint16_t ct_scsi_status; 2437 uint16_t ct_resplen; 2438 uint8_t ct_resp[MAXRESPLEN]; 2439 } m1; 2440 struct { 2441 uint32_t _reserved; 2442 uint16_t _reserved2; 2443 uint16_t _reserved3; 2444 uint32_t ct_datalen; 2445 union { 2446 ispds_t ct_fcp_rsp_iudata_32; 2447 ispds64_t ct_fcp_rsp_iudata_64; 2448 } u; 2449 } m2; 2450 } rsp; 2451 } ct2e_entry_t; 2452 2453 /* 2454 * ct_flags values for CTIO2 2455 */ 2456 #define CT2_FLAG_MODE0 0x0000 2457 #define CT2_FLAG_MODE1 0x0001 2458 #define CT2_FLAG_MODE2 0x0002 2459 #define CT2_FLAG_MMASK 0x0003 2460 #define CT2_DATA_IN 0x0040 /* *to* initiator */ 2461 #define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2462 #define CT2_NO_DATA 0x00C0 2463 #define CT2_DATAMASK 0x00C0 2464 #define CT2_CCINCR 0x0100 2465 #define CT2_FASTPOST 0x0200 2466 #define CT2_CONFIRM 0x2000 2467 #define CT2_TERMINATE 0x4000 2468 #define CT2_SENDSTATUS 0x8000 2469 2470 /* 2471 * ct_status values are (mostly) the same as that for ct_entry. 2472 */ 2473 2474 /* 2475 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2476 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2477 * fields. 2478 */ 2479 #define CT2_RSPLEN_VALID 0x0100 2480 #define CT2_SNSLEN_VALID 0x0200 2481 #define CT2_DATA_OVER 0x0400 2482 #define CT2_DATA_UNDER 0x0800 2483 2484 /* 2485 * ISP24XX CTIO 2486 */ 2487 #define MAXRESPLEN_24XX 24 2488 typedef struct { 2489 isphdr_t ct_header; 2490 uint32_t ct_syshandle; 2491 uint16_t ct_nphdl; /* status on returned CTIOs */ 2492 uint16_t ct_timeout; 2493 uint16_t ct_seg_count; 2494 uint8_t ct_vpidx; 2495 uint8_t ct_xflags; 2496 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2497 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2498 uint8_t ct_reserved; 2499 uint32_t ct_rxid; 2500 uint16_t ct_senselen; /* mode 1 only */ 2501 uint16_t ct_flags; 2502 uint32_t ct_resid; /* residual length */ 2503 uint16_t ct_oxid; 2504 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2505 union { 2506 struct { 2507 uint32_t reloff; 2508 uint32_t reserved0; 2509 uint32_t ct_xfrlen; 2510 uint32_t reserved1; 2511 ispds64_t ds; 2512 } m0; 2513 struct { 2514 uint16_t ct_resplen; 2515 uint16_t reserved; 2516 uint8_t ct_resp[MAXRESPLEN_24XX]; 2517 } m1; 2518 struct { 2519 uint32_t reserved0; 2520 uint32_t reserved1; 2521 uint32_t ct_datalen; 2522 uint32_t reserved2; 2523 ispds64_t ct_fcp_rsp_iudata; 2524 } m2; 2525 } rsp; 2526 } ct7_entry_t; 2527 2528 /* 2529 * ct_flags values for CTIO7 2530 */ 2531 #define CT7_NO_DATA 0x0000 2532 #define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2533 #define CT7_DATA_IN 0x0002 /* *to* initiator */ 2534 #define CT7_DATAMASK 0x3 2535 #define CT7_DSD_ENABLE 0x0004 2536 #define CT7_CONF_STSFD 0x0010 2537 #define CT7_EXPLCT_CONF 0x0020 2538 #define CT7_FLAG_MODE0 0x0000 2539 #define CT7_FLAG_MODE1 0x0040 2540 #define CT7_FLAG_MODE2 0x0080 2541 #define CT7_FLAG_MMASK 0x00C0 2542 #define CT7_NOACK 0x0100 2543 #define CT7_TASK_ATTR_SHIFT 9 2544 #define CT7_CONFIRM 0x2000 2545 #define CT7_TERMINATE 0x4000 2546 #define CT7_SENDSTATUS 0x8000 2547 2548 /* 2549 * Type 7 CTIO status codes 2550 */ 2551 #define CT7_OK 0x01 /* completed without error */ 2552 #define CT7_ABORTED 0x02 /* aborted by host */ 2553 #define CT7_ERR 0x04 /* see sense data for error */ 2554 #define CT7_INVAL 0x06 /* request for disabled lun */ 2555 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2556 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2557 #define CT7_TIMEOUT 0x0B /* timed out */ 2558 #define CT7_RESET 0x0E /* LIP Rset Received */ 2559 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2560 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2561 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2562 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2563 #define CT7_LOGOUT 0x29 /* port logout */ 2564 #define CT7_PORTCHANGED 0x2A /* port changed */ 2565 #define CT7_SRR 0x45 /* SRR Received */ 2566 2567 /* 2568 * Other 24XX related target IOCBs 2569 */ 2570 2571 /* 2572 * ABTS Received 2573 */ 2574 typedef struct { 2575 isphdr_t abts_header; 2576 uint8_t abts_reserved0[6]; 2577 uint16_t abts_nphdl; 2578 uint16_t abts_reserved1; 2579 uint16_t abts_sof; 2580 uint32_t abts_rxid_abts; 2581 uint16_t abts_did_lo; 2582 uint8_t abts_did_hi; 2583 uint8_t abts_r_ctl; 2584 uint16_t abts_sid_lo; 2585 uint8_t abts_sid_hi; 2586 uint8_t abts_cs_ctl; 2587 uint16_t abts_fs_ctl; 2588 uint8_t abts_f_ctl; 2589 uint8_t abts_type; 2590 uint16_t abts_seq_cnt; 2591 uint8_t abts_df_ctl; 2592 uint8_t abts_seq_id; 2593 uint16_t abts_rx_id; 2594 uint16_t abts_ox_id; 2595 uint32_t abts_param; 2596 uint8_t abts_reserved2[16]; 2597 uint32_t abts_rxid_task; 2598 } abts_t; 2599 2600 typedef struct { 2601 isphdr_t abts_rsp_header; 2602 uint32_t abts_rsp_handle; 2603 uint16_t abts_rsp_status; 2604 uint16_t abts_rsp_nphdl; 2605 uint16_t abts_rsp_ctl_flags; 2606 uint16_t abts_rsp_sof; 2607 uint32_t abts_rsp_rxid_abts; 2608 uint16_t abts_rsp_did_lo; 2609 uint8_t abts_rsp_did_hi; 2610 uint8_t abts_rsp_r_ctl; 2611 uint16_t abts_rsp_sid_lo; 2612 uint8_t abts_rsp_sid_hi; 2613 uint8_t abts_rsp_cs_ctl; 2614 uint16_t abts_rsp_f_ctl_lo; 2615 uint8_t abts_rsp_f_ctl_hi; 2616 uint8_t abts_rsp_type; 2617 uint16_t abts_rsp_seq_cnt; 2618 uint8_t abts_rsp_df_ctl; 2619 uint8_t abts_rsp_seq_id; 2620 uint16_t abts_rsp_rx_id; 2621 uint16_t abts_rsp_ox_id; 2622 uint32_t abts_rsp_param; 2623 union { 2624 struct { 2625 uint16_t reserved; 2626 uint8_t last_seq_id; 2627 uint8_t seq_id_valid; 2628 uint16_t aborted_rx_id; 2629 uint16_t aborted_ox_id; 2630 uint16_t high_seq_cnt; 2631 uint16_t low_seq_cnt; 2632 uint8_t reserved2[4]; 2633 } ba_acc; 2634 struct { 2635 uint8_t vendor_unique; 2636 uint8_t explanation; 2637 uint8_t reason; 2638 uint8_t reserved; 2639 uint8_t reserved2[12]; 2640 } ba_rjt; 2641 struct { 2642 uint8_t reserved[8]; 2643 uint32_t subcode1; 2644 uint32_t subcode2; 2645 } rsp; 2646 uint8_t reserved[16]; 2647 } abts_rsp_payload; 2648 uint32_t abts_rsp_rxid_task; 2649 } abts_rsp_t; 2650 2651 /* terminate this ABTS exchange */ 2652 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2653 2654 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2655 #define ISP24XX_ABTS_RSP_RESET 0x04 2656 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2657 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2658 #define ISP24XX_ABTS_RSP_INVXID 0x08 2659 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2660 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2661 2662 #define ISP24XX_NO_TASK 0xffffffff 2663 2664 /* 2665 * Miscellaneous 2666 * 2667 * These are the limits of the number of dma segments we 2668 * can deal with based not on the size of the segment counter 2669 * (which is 16 bits), but on the size of the number of 2670 * queue entries field (which is 8 bits). We assume no 2671 * segments in the first queue entry, so we can either 2672 * have 7 dma segments per continuation entry or 5 2673 * (for 64 bit dma).. multiplying out by 254.... 2674 */ 2675 #define ISP_NSEG_MAX 1778 2676 #define ISP_NSEG64_MAX 1270 2677 2678 #endif /* _ISPMBOX_H */ 2679