1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 /* 30 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 31 */ 32 #ifndef _ISPMBOX_H 33 #define _ISPMBOX_H 34 35 /* 36 * Mailbox Command Opcodes 37 */ 38 #define MBOX_NO_OP 0x0000 39 #define MBOX_LOAD_RAM 0x0001 40 #define MBOX_EXEC_FIRMWARE 0x0002 41 #define MBOX_DUMP_RAM 0x0003 42 #define MBOX_WRITE_RAM_WORD 0x0004 43 #define MBOX_READ_RAM_WORD 0x0005 44 #define MBOX_MAILBOX_REG_TEST 0x0006 45 #define MBOX_VERIFY_CHECKSUM 0x0007 46 #define MBOX_ABOUT_FIRMWARE 0x0008 47 #define MBOX_LOAD_RISC_RAM_2100 0x0009 48 /* a */ 49 #define MBOX_LOAD_RISC_RAM 0x000b 50 /* c */ 51 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 52 #define MBOX_CHECK_FIRMWARE 0x000e 53 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 54 #define MBOX_INIT_REQ_QUEUE 0x0010 55 #define MBOX_INIT_RES_QUEUE 0x0011 56 #define MBOX_EXECUTE_IOCB 0x0012 57 #define MBOX_WAKE_UP 0x0013 58 #define MBOX_STOP_FIRMWARE 0x0014 59 #define MBOX_ABORT 0x0015 60 #define MBOX_ABORT_DEVICE 0x0016 61 #define MBOX_ABORT_TARGET 0x0017 62 #define MBOX_BUS_RESET 0x0018 63 #define MBOX_STOP_QUEUE 0x0019 64 #define MBOX_START_QUEUE 0x001a 65 #define MBOX_SINGLE_STEP_QUEUE 0x001b 66 #define MBOX_ABORT_QUEUE 0x001c 67 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 68 /* 1e */ 69 #define MBOX_GET_FIRMWARE_STATUS 0x001f 70 #define MBOX_GET_INIT_SCSI_ID 0x0020 71 #define MBOX_GET_SELECT_TIMEOUT 0x0021 72 #define MBOX_GET_RETRY_COUNT 0x0022 73 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 74 #define MBOX_GET_CLOCK_RATE 0x0024 75 #define MBOX_GET_ACT_NEG_STATE 0x0025 76 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 77 #define MBOX_GET_SBUS_PARAMS 0x0027 78 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 79 #define MBOX_GET_TARGET_PARAMS 0x0028 80 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 81 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 82 /* 2b */ 83 /* 2c */ 84 /* 2d */ 85 /* 2e */ 86 /* 2f */ 87 #define MBOX_SET_INIT_SCSI_ID 0x0030 88 #define MBOX_SET_SELECT_TIMEOUT 0x0031 89 #define MBOX_SET_RETRY_COUNT 0x0032 90 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 91 #define MBOX_SET_CLOCK_RATE 0x0034 92 #define MBOX_SET_ACT_NEG_STATE 0x0035 93 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 94 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 95 #define MBOX_SET_PCI_PARAMETERS 0x0037 96 #define MBOX_SET_TARGET_PARAMS 0x0038 97 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 98 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 99 /* 3b */ 100 /* 3c */ 101 /* 3d */ 102 /* 3e */ 103 /* 3f */ 104 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 105 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 106 #define MBOX_EXEC_BIOS_IOCB 0x0042 107 #define MBOX_SET_FW_FEATURES 0x004a 108 #define MBOX_GET_FW_FEATURES 0x004b 109 #define FW_FEATURE_FAST_POST 0x1 110 #define FW_FEATURE_LVD_NOTIFY 0x2 111 #define FW_FEATURE_RIO_32BIT 0x4 112 #define FW_FEATURE_RIO_16BIT 0x8 113 114 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 115 #define MBOX_INIT_RES_QUEUE_A64 0x0053 116 117 #define MBOX_ENABLE_TARGET_MODE 0x0055 118 #define ENABLE_TARGET_FLAG 0x8000 119 #define ENABLE_TQING_FLAG 0x0004 120 #define ENABLE_MANDATORY_DISC 0x0002 121 #define MBOX_GET_TARGET_STATUS 0x0056 122 123 /* These are for the ISP2X00 FC cards */ 124 #define MBOX_GET_LOOP_ID 0x0020 125 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 126 #define ISP24XX_INORDER 0x0100 127 #define ISP24XX_NPIV_SAN 0x0400 128 #define ISP24XX_VSAN_SAN 0x1000 129 #define ISP24XX_FC_SP_SAN 0x2000 130 131 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 132 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 133 #define MBOX_GET_RESOURCE_COUNT 0x0042 134 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 135 #define MBOX_ENHANCED_GET_PDB 0x0047 136 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 137 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 138 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 139 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 140 #define MBOX_INIT_FIRMWARE 0x0060 141 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 142 #define MBOX_INIT_LIP 0x0062 143 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 144 #define MBOX_GET_PORT_DB 0x0064 145 #define MBOX_CLEAR_ACA 0x0065 146 #define MBOX_TARGET_RESET 0x0066 147 #define MBOX_CLEAR_TASK_SET 0x0067 148 #define MBOX_ABORT_TASK_SET 0x0068 149 #define MBOX_GET_FW_STATE 0x0069 150 #define MBOX_GET_PORT_NAME 0x006A 151 #define MBOX_GET_LINK_STATUS 0x006B 152 #define MBOX_INIT_LIP_RESET 0x006C 153 #define MBOX_SEND_SNS 0x006E 154 #define MBOX_FABRIC_LOGIN 0x006F 155 #define MBOX_SEND_CHANGE_REQUEST 0x0070 156 #define MBOX_FABRIC_LOGOUT 0x0071 157 #define MBOX_INIT_LIP_LOGIN 0x0072 158 #define MBOX_LUN_RESET 0x007E 159 160 #define MBOX_DRIVER_HEARTBEAT 0x005B 161 #define MBOX_FW_HEARTBEAT 0x005C 162 163 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 164 #define MBGSD_GET_RATE 0 165 #define MBGSD_SET_RATE 1 166 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 167 #define MBGSD_ONEGB 0 168 #define MBGSD_TWOGB 1 169 #define MBGSD_AUTO 2 170 #define MBGSD_FOURGB 3 /* 24XX only */ 171 #define MBGSD_EIGHTGB 4 /* 25XX only */ 172 173 174 #define ISP2100_SET_PCI_PARAM 0x00ff 175 176 #define MBOX_BUSY 0x04 177 178 /* 179 * Mailbox Command Complete Status Codes 180 */ 181 #define MBOX_COMMAND_COMPLETE 0x4000 182 #define MBOX_INVALID_COMMAND 0x4001 183 #define MBOX_HOST_INTERFACE_ERROR 0x4002 184 #define MBOX_TEST_FAILED 0x4003 185 #define MBOX_COMMAND_ERROR 0x4005 186 #define MBOX_COMMAND_PARAM_ERROR 0x4006 187 #define MBOX_PORT_ID_USED 0x4007 188 #define MBOX_LOOP_ID_USED 0x4008 189 #define MBOX_ALL_IDS_USED 0x4009 190 #define MBOX_NOT_LOGGED_IN 0x400A 191 /* pseudo mailbox completion codes */ 192 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 193 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 194 195 #define MBLOGALL 0x000f 196 #define MBLOGNONE 0x0000 197 #define MBLOGMASK(x) ((x) & 0xf) 198 199 /* 200 * Asynchronous event status codes 201 */ 202 #define ASYNC_BUS_RESET 0x8001 203 #define ASYNC_SYSTEM_ERROR 0x8002 204 #define ASYNC_RQS_XFER_ERR 0x8003 205 #define ASYNC_RSP_XFER_ERR 0x8004 206 #define ASYNC_QWAKEUP 0x8005 207 #define ASYNC_TIMEOUT_RESET 0x8006 208 #define ASYNC_DEVICE_RESET 0x8007 209 #define ASYNC_EXTMSG_UNDERRUN 0x800A 210 #define ASYNC_SCAM_INT 0x800B 211 #define ASYNC_HUNG_SCSI 0x800C 212 #define ASYNC_KILLED_BUS 0x800D 213 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 214 #define ASYNC_LIP_OCCURRED 0x8010 215 #define ASYNC_LOOP_UP 0x8011 216 #define ASYNC_LOOP_DOWN 0x8012 217 #define ASYNC_LOOP_RESET 0x8013 218 #define ASYNC_PDB_CHANGED 0x8014 219 #define ASYNC_CHANGE_NOTIFY 0x8015 220 #define ASYNC_LIP_F8 0x8016 221 #define ASYNC_LIP_ERROR 0x8017 222 #define ASYNC_SECURITY_UPDATE 0x801B 223 #define ASYNC_CMD_CMPLT 0x8020 224 #define ASYNC_CTIO_DONE 0x8021 225 #define ASYNC_IP_XMIT_DONE 0x8022 226 #define ASYNC_IP_RECV_DONE 0x8023 227 #define ASYNC_IP_BROADCAST 0x8024 228 #define ASYNC_IP_RCVQ_LOW 0x8025 229 #define ASYNC_IP_RCVQ_EMPTY 0x8026 230 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 231 #define ASYNC_PTPMODE 0x8030 232 #define ASYNC_RIO1 0x8031 233 #define ASYNC_RIO2 0x8032 234 #define ASYNC_RIO3 0x8033 235 #define ASYNC_RIO4 0x8034 236 #define ASYNC_RIO5 0x8035 237 #define ASYNC_CONNMODE 0x8036 238 #define ISP_CONN_LOOP 1 239 #define ISP_CONN_PTP 2 240 #define ISP_CONN_BADLIP 3 241 #define ISP_CONN_FATAL 4 242 #define ISP_CONN_LOOPBACK 5 243 #define ASYNC_RIO_RESP 0x8040 244 #define ASYNC_RIO_COMP 0x8042 245 #define ASYNC_RCV_ERR 0x8048 246 247 /* 248 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 249 * mailbox command to enable this. 250 */ 251 #define ASYNC_QFULL_SENT 0x8049 252 253 /* 254 * 24XX only 255 */ 256 #define ASYNC_RJT_SENT 0x8049 257 258 /* 259 * All IOCB Queue entries are this size 260 */ 261 #define QENTRY_LEN 64 262 263 /* 264 * Special Internal Handle for IOCBs 265 */ 266 #define ISP_SPCL_HANDLE 0xa5dead5a 267 268 /* 269 * Command Structure Definitions 270 */ 271 272 typedef struct { 273 uint32_t ds_base; 274 uint32_t ds_count; 275 } ispds_t; 276 277 typedef struct { 278 uint32_t ds_base; 279 uint32_t ds_basehi; 280 uint32_t ds_count; 281 } ispds64_t; 282 283 #define DSTYPE_32BIT 0 284 #define DSTYPE_64BIT 1 285 typedef struct { 286 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 287 uint32_t ds_segment; /* unused */ 288 uint32_t ds_base; /* 32 bit address of DSD list */ 289 } ispdslist_t; 290 291 292 typedef struct { 293 uint8_t rqs_entry_type; 294 uint8_t rqs_entry_count; 295 uint8_t rqs_seqno; 296 uint8_t rqs_flags; 297 } isphdr_t; 298 299 /* RQS Flag definitions */ 300 #define RQSFLAG_CONTINUATION 0x01 301 #define RQSFLAG_FULL 0x02 302 #define RQSFLAG_BADHEADER 0x04 303 #define RQSFLAG_BADPACKET 0x08 304 #define RQSFLAG_BADCOUNT 0x10 305 #define RQSFLAG_BADORDER 0x20 306 #define RQSFLAG_MASK 0x3f 307 308 /* RQS entry_type definitions */ 309 #define RQSTYPE_REQUEST 0x01 310 #define RQSTYPE_DATASEG 0x02 311 #define RQSTYPE_RESPONSE 0x03 312 #define RQSTYPE_MARKER 0x04 313 #define RQSTYPE_CMDONLY 0x05 314 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 315 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 316 #define RQSTYPE_SCAM 0x08 317 #define RQSTYPE_A64 0x09 318 #define RQSTYPE_A64_CONT 0x0a 319 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 320 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 321 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 322 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 323 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 324 #define RQSTYPE_STATUS_CONT 0x10 325 #define RQSTYPE_T2RQS 0x11 326 #define RQSTYPE_CTIO7 0x12 327 #define RQSTYPE_IP_XMIT 0x13 328 #define RQSTYPE_TSK_MGMT 0x14 329 #define RQSTYPE_T4RQS 0x15 330 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 331 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 332 #define RQSTYPE_T7RQS 0x18 333 #define RQSTYPE_T3RQS 0x19 334 #define RQSTYPE_IP_XMIT_64 0x1b 335 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 336 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 337 #define RQSTYPE_RIO1 0x21 338 #define RQSTYPE_RIO2 0x22 339 #define RQSTYPE_IP_RECV 0x23 340 #define RQSTYPE_IP_RECV_CONT 0x24 341 #define RQSTYPE_CT_PASSTHRU 0x29 342 #define RQSTYPE_MS_PASSTHRU 0x29 343 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 344 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 345 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 346 #define RQSTYPE_ABORT_IO 0x33 347 #define RQSTYPE_T6RQS 0x48 348 #define RQSTYPE_LOGIN 0x52 349 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 350 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 351 352 353 #define ISP_RQDSEG 4 354 typedef struct { 355 isphdr_t req_header; 356 uint32_t req_handle; 357 uint8_t req_lun_trn; 358 uint8_t req_target; 359 uint16_t req_cdblen; 360 uint16_t req_flags; 361 uint16_t req_reserved; 362 uint16_t req_time; 363 uint16_t req_seg_count; 364 uint8_t req_cdb[12]; 365 ispds_t req_dataseg[ISP_RQDSEG]; 366 } ispreq_t; 367 #define ISP_RQDSEG_A64 2 368 369 typedef struct { 370 isphdr_t mrk_header; 371 uint32_t mrk_handle; 372 uint8_t mrk_reserved0; 373 uint8_t mrk_target; 374 uint16_t mrk_modifier; 375 uint16_t mrk_flags; 376 uint16_t mrk_lun; 377 uint8_t mrk_reserved1[48]; 378 } isp_marker_t; 379 380 typedef struct { 381 isphdr_t mrk_header; 382 uint32_t mrk_handle; 383 uint16_t mrk_nphdl; 384 uint8_t mrk_modifier; 385 uint8_t mrk_reserved0; 386 uint8_t mrk_reserved1; 387 uint8_t mrk_vphdl; 388 uint16_t mrk_reserved2; 389 uint8_t mrk_lun[8]; 390 uint8_t mrk_reserved3[40]; 391 } isp_marker_24xx_t; 392 393 394 #define SYNC_DEVICE 0 395 #define SYNC_TARGET 1 396 #define SYNC_ALL 2 397 #define SYNC_LIP 3 398 399 #define ISP_RQDSEG_T2 3 400 typedef struct { 401 isphdr_t req_header; 402 uint32_t req_handle; 403 uint8_t req_lun_trn; 404 uint8_t req_target; 405 uint16_t req_scclun; 406 uint16_t req_flags; 407 uint16_t req_reserved; 408 uint16_t req_time; 409 uint16_t req_seg_count; 410 uint8_t req_cdb[16]; 411 uint32_t req_totalcnt; 412 ispds_t req_dataseg[ISP_RQDSEG_T2]; 413 } ispreqt2_t; 414 415 typedef struct { 416 isphdr_t req_header; 417 uint32_t req_handle; 418 uint16_t req_target; 419 uint16_t req_scclun; 420 uint16_t req_flags; 421 uint16_t req_reserved; 422 uint16_t req_time; 423 uint16_t req_seg_count; 424 uint8_t req_cdb[16]; 425 uint32_t req_totalcnt; 426 ispds_t req_dataseg[ISP_RQDSEG_T2]; 427 } ispreqt2e_t; 428 429 #define ISP_RQDSEG_T3 2 430 typedef struct { 431 isphdr_t req_header; 432 uint32_t req_handle; 433 uint8_t req_lun_trn; 434 uint8_t req_target; 435 uint16_t req_scclun; 436 uint16_t req_flags; 437 uint16_t req_reserved; 438 uint16_t req_time; 439 uint16_t req_seg_count; 440 uint8_t req_cdb[16]; 441 uint32_t req_totalcnt; 442 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 443 } ispreqt3_t; 444 #define ispreq64_t ispreqt3_t /* same as.... */ 445 446 typedef struct { 447 isphdr_t req_header; 448 uint32_t req_handle; 449 uint16_t req_target; 450 uint16_t req_scclun; 451 uint16_t req_flags; 452 uint16_t req_reserved; 453 uint16_t req_time; 454 uint16_t req_seg_count; 455 uint8_t req_cdb[16]; 456 uint32_t req_totalcnt; 457 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 458 } ispreqt3e_t; 459 460 /* req_flag values */ 461 #define REQFLAG_NODISCON 0x0001 462 #define REQFLAG_HTAG 0x0002 463 #define REQFLAG_OTAG 0x0004 464 #define REQFLAG_STAG 0x0008 465 #define REQFLAG_TARGET_RTN 0x0010 466 467 #define REQFLAG_NODATA 0x0000 468 #define REQFLAG_DATA_IN 0x0020 469 #define REQFLAG_DATA_OUT 0x0040 470 #define REQFLAG_DATA_UNKNOWN 0x0060 471 472 #define REQFLAG_DISARQ 0x0100 473 #define REQFLAG_FRC_ASYNC 0x0200 474 #define REQFLAG_FRC_SYNC 0x0400 475 #define REQFLAG_FRC_WIDE 0x0800 476 #define REQFLAG_NOPARITY 0x1000 477 #define REQFLAG_STOPQ 0x2000 478 #define REQFLAG_XTRASNS 0x4000 479 #define REQFLAG_PRIORITY 0x8000 480 481 typedef struct { 482 isphdr_t req_header; 483 uint32_t req_handle; 484 uint8_t req_lun_trn; 485 uint8_t req_target; 486 uint16_t req_cdblen; 487 uint16_t req_flags; 488 uint16_t req_reserved; 489 uint16_t req_time; 490 uint16_t req_seg_count; 491 uint8_t req_cdb[44]; 492 } ispextreq_t; 493 494 /* 24XX only */ 495 typedef struct { 496 uint16_t fcd_length; 497 uint16_t fcd_a1500; 498 uint16_t fcd_a3116; 499 uint16_t fcd_a4732; 500 uint16_t fcd_a6348; 501 } fcp_cmnd_ds_t; 502 503 typedef struct { 504 isphdr_t req_header; 505 uint32_t req_handle; 506 uint16_t req_nphdl; 507 uint16_t req_time; 508 uint16_t req_seg_count; 509 uint16_t req_fc_rsp_dsd_length; 510 uint8_t req_lun[8]; 511 uint16_t req_flags; 512 uint16_t req_fc_cmnd_dsd_length; 513 uint16_t req_fc_cmnd_dsd_a1500; 514 uint16_t req_fc_cmnd_dsd_a3116; 515 uint16_t req_fc_cmnd_dsd_a4732; 516 uint16_t req_fc_cmnd_dsd_a6348; 517 uint16_t req_fc_rsp_dsd_a1500; 518 uint16_t req_fc_rsp_dsd_a3116; 519 uint16_t req_fc_rsp_dsd_a4732; 520 uint16_t req_fc_rsp_dsd_a6348; 521 uint32_t req_totalcnt; 522 uint16_t req_tidlo; 523 uint8_t req_tidhi; 524 uint8_t req_vpidx; 525 ispds64_t req_dataseg; 526 } ispreqt6_t; 527 528 typedef struct { 529 isphdr_t req_header; 530 uint32_t req_handle; 531 uint16_t req_nphdl; 532 uint16_t req_time; 533 uint16_t req_seg_count; 534 uint16_t req_reserved; 535 uint8_t req_lun[8]; 536 uint8_t req_alen_datadir; 537 uint8_t req_task_management; 538 uint8_t req_task_attribute; 539 uint8_t req_crn; 540 uint8_t req_cdb[16]; 541 uint32_t req_dl; 542 uint16_t req_tidlo; 543 uint8_t req_tidhi; 544 uint8_t req_vpidx; 545 ispds64_t req_dataseg; 546 } ispreqt7_t; 547 548 /* Task Management Request Function */ 549 typedef struct { 550 isphdr_t tmf_header; 551 uint32_t tmf_handle; 552 uint16_t tmf_nphdl; 553 uint8_t tmf_reserved0[2]; 554 uint16_t tmf_delay; 555 uint16_t tmf_timeout; 556 uint8_t tmf_lun[8]; 557 uint32_t tmf_flags; 558 uint8_t tmf_reserved1[20]; 559 uint16_t tmf_tidlo; 560 uint8_t tmf_tidhi; 561 uint8_t tmf_vpidx; 562 uint8_t tmf_reserved2[12]; 563 } isp24xx_tmf_t; 564 565 #define ISP24XX_TMF_NOSEND 0x80000000 566 567 #define ISP24XX_TMF_LUN_RESET 0x00000010 568 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 569 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 570 #define ISP24XX_TMF_TARGET_RESET 0x00000002 571 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 572 573 /* I/O Abort Structure */ 574 typedef struct { 575 isphdr_t abrt_header; 576 uint32_t abrt_handle; 577 uint16_t abrt_nphdl; 578 uint16_t abrt_options; 579 uint32_t abrt_cmd_handle; 580 uint8_t abrt_reserved[32]; 581 uint16_t abrt_tidlo; 582 uint8_t abrt_tidhi; 583 uint8_t abrt_vpidx; 584 uint8_t abrt_reserved1[12]; 585 } isp24xx_abrt_t; 586 587 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 588 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 589 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 590 591 #define ISP_CDSEG 7 592 typedef struct { 593 isphdr_t req_header; 594 uint32_t req_reserved; 595 ispds_t req_dataseg[ISP_CDSEG]; 596 } ispcontreq_t; 597 598 #define ISP_CDSEG64 5 599 typedef struct { 600 isphdr_t req_header; 601 ispds64_t req_dataseg[ISP_CDSEG64]; 602 } ispcontreq64_t; 603 604 typedef struct { 605 isphdr_t req_header; 606 uint32_t req_handle; 607 uint16_t req_scsi_status; 608 uint16_t req_completion_status; 609 uint16_t req_state_flags; 610 uint16_t req_status_flags; 611 uint16_t req_time; 612 #define req_response_len req_time /* FC only */ 613 uint16_t req_sense_len; 614 uint32_t req_resid; 615 uint8_t req_response[8]; /* FC only */ 616 uint8_t req_sense_data[32]; 617 } ispstatusreq_t; 618 619 /* 620 * Status Continuation 621 */ 622 typedef struct { 623 isphdr_t req_header; 624 uint8_t req_sense_data[60]; 625 } ispstatus_cont_t; 626 627 /* 628 * 24XX Type 0 status 629 */ 630 typedef struct { 631 isphdr_t req_header; 632 uint32_t req_handle; 633 uint16_t req_completion_status; 634 uint16_t req_oxid; 635 uint32_t req_resid; 636 uint16_t req_reserved0; 637 uint16_t req_state_flags; 638 uint16_t req_reserved1; 639 uint16_t req_scsi_status; 640 uint32_t req_fcp_residual; 641 uint32_t req_sense_len; 642 uint32_t req_response_len; 643 uint8_t req_rsp_sense[28]; 644 } isp24xx_statusreq_t; 645 646 /* 647 * For Qlogic 2X00, the high order byte of SCSI status has 648 * additional meaning. 649 */ 650 #define RQCS_RU 0x800 /* Residual Under */ 651 #define RQCS_RO 0x400 /* Residual Over */ 652 #define RQCS_RESID (RQCS_RU|RQCS_RO) 653 #define RQCS_SV 0x200 /* Sense Length Valid */ 654 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 655 656 /* 657 * CT Passthru IOCB 658 */ 659 typedef struct { 660 isphdr_t ctp_header; 661 uint32_t ctp_handle; 662 uint16_t ctp_status; 663 uint16_t ctp_nphdl; /* n-port handle */ 664 uint16_t ctp_cmd_cnt; /* Command DSD count */ 665 uint8_t ctp_vpidx; 666 uint8_t ctp_reserved0; 667 uint16_t ctp_time; 668 uint16_t ctp_reserved1; 669 uint16_t ctp_rsp_cnt; /* Response DSD count */ 670 uint16_t ctp_reserved2[5]; 671 uint32_t ctp_rsp_bcnt; /* Response byte count */ 672 uint32_t ctp_cmd_bcnt; /* Command byte count */ 673 ispds64_t ctp_dataseg[2]; 674 } isp_ct_pt_t; 675 676 /* 677 * MS Passthru IOCB 678 */ 679 typedef struct { 680 isphdr_t ms_header; 681 uint32_t ms_handle; 682 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 683 uint16_t ms_status; 684 uint16_t ms_flags; 685 uint16_t ms_reserved1; /* low 8 bits */ 686 uint16_t ms_time; 687 uint16_t ms_cmd_cnt; /* Command DSD count */ 688 uint16_t ms_tot_cnt; /* Total DSD Count */ 689 uint8_t ms_type; /* MS type */ 690 uint8_t ms_r_ctl; /* R_CTL */ 691 uint16_t ms_rxid; /* RX_ID */ 692 uint16_t ms_reserved2; 693 uint32_t ms_handle2; 694 uint32_t ms_rsp_bcnt; /* Response byte count */ 695 uint32_t ms_cmd_bcnt; /* Command byte count */ 696 ispds64_t ms_dataseg[2]; 697 } isp_ms_t; 698 699 /* 700 * Completion Status Codes. 701 */ 702 #define RQCS_COMPLETE 0x0000 703 #define RQCS_DMA_ERROR 0x0002 704 #define RQCS_RESET_OCCURRED 0x0004 705 #define RQCS_ABORTED 0x0005 706 #define RQCS_TIMEOUT 0x0006 707 #define RQCS_DATA_OVERRUN 0x0007 708 #define RQCS_DATA_UNDERRUN 0x0015 709 #define RQCS_QUEUE_FULL 0x001C 710 711 /* 1X00 Only Completion Codes */ 712 #define RQCS_INCOMPLETE 0x0001 713 #define RQCS_TRANSPORT_ERROR 0x0003 714 #define RQCS_COMMAND_OVERRUN 0x0008 715 #define RQCS_STATUS_OVERRUN 0x0009 716 #define RQCS_BAD_MESSAGE 0x000a 717 #define RQCS_NO_MESSAGE_OUT 0x000b 718 #define RQCS_EXT_ID_FAILED 0x000c 719 #define RQCS_IDE_MSG_FAILED 0x000d 720 #define RQCS_ABORT_MSG_FAILED 0x000e 721 #define RQCS_REJECT_MSG_FAILED 0x000f 722 #define RQCS_NOP_MSG_FAILED 0x0010 723 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 724 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 725 #define RQCS_ID_MSG_FAILED 0x0013 726 #define RQCS_UNEXP_BUS_FREE 0x0014 727 #define RQCS_XACT_ERR1 0x0018 728 #define RQCS_XACT_ERR2 0x0019 729 #define RQCS_XACT_ERR3 0x001A 730 #define RQCS_BAD_ENTRY 0x001B 731 #define RQCS_PHASE_SKIPPED 0x001D 732 #define RQCS_ARQS_FAILED 0x001E 733 #define RQCS_WIDE_FAILED 0x001F 734 #define RQCS_SYNCXFER_FAILED 0x0020 735 #define RQCS_LVD_BUSERR 0x0021 736 737 /* 2X00 Only Completion Codes */ 738 #define RQCS_PORT_UNAVAILABLE 0x0028 739 #define RQCS_PORT_LOGGED_OUT 0x0029 740 #define RQCS_PORT_CHANGED 0x002A 741 #define RQCS_PORT_BUSY 0x002B 742 743 /* 24XX Only Completion Codes */ 744 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 745 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 746 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 747 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 748 749 750 /* 751 * 1X00 specific State Flags 752 */ 753 #define RQSF_GOT_BUS 0x0100 754 #define RQSF_GOT_TARGET 0x0200 755 #define RQSF_SENT_CDB 0x0400 756 #define RQSF_XFRD_DATA 0x0800 757 #define RQSF_GOT_STATUS 0x1000 758 #define RQSF_GOT_SENSE 0x2000 759 #define RQSF_XFER_COMPLETE 0x4000 760 761 /* 762 * 2X00 specific State Flags 763 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 764 */ 765 #define RQSF_DATA_IN 0x0020 766 #define RQSF_DATA_OUT 0x0040 767 #define RQSF_STAG 0x0008 768 #define RQSF_OTAG 0x0004 769 #define RQSF_HTAG 0x0002 770 /* 771 * 1X00 Status Flags 772 */ 773 #define RQSTF_DISCONNECT 0x0001 774 #define RQSTF_SYNCHRONOUS 0x0002 775 #define RQSTF_PARITY_ERROR 0x0004 776 #define RQSTF_BUS_RESET 0x0008 777 #define RQSTF_DEVICE_RESET 0x0010 778 #define RQSTF_ABORTED 0x0020 779 #define RQSTF_TIMEOUT 0x0040 780 #define RQSTF_NEGOTIATION 0x0080 781 782 /* 783 * 2X00 specific state flags 784 */ 785 /* RQSF_SENT_CDB */ 786 /* RQSF_XFRD_DATA */ 787 /* RQSF_GOT_STATUS */ 788 /* RQSF_XFER_COMPLETE */ 789 790 /* 791 * 2X00 specific status flags 792 */ 793 /* RQSTF_ABORTED */ 794 /* RQSTF_TIMEOUT */ 795 #define RQSTF_DMA_ERROR 0x0080 796 #define RQSTF_LOGOUT 0x2000 797 798 /* 799 * Miscellaneous 800 */ 801 #ifndef ISP_EXEC_THROTTLE 802 #define ISP_EXEC_THROTTLE 16 803 #endif 804 805 /* 806 * About Firmware returns an 'attribute' word in mailbox 6. 807 * These attributes are for 2200 and 2300. 808 */ 809 #define ISP_FW_ATTR_TMODE 0x0001 810 #define ISP_FW_ATTR_SCCLUN 0x0002 811 #define ISP_FW_ATTR_FABRIC 0x0004 812 #define ISP_FW_ATTR_CLASS2 0x0008 813 #define ISP_FW_ATTR_FCTAPE 0x0010 814 #define ISP_FW_ATTR_IP 0x0020 815 #define ISP_FW_ATTR_VI 0x0040 816 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 817 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 818 819 /* and these are for the 2400 */ 820 #define ISP2400_FW_ATTR_CLASS2 0x0001 821 #define ISP2400_FW_ATTR_IP 0x0002 822 #define ISP2400_FW_ATTR_MULTIID 0x0004 823 #define ISP2400_FW_ATTR_SB2 0x0008 824 #define ISP2400_FW_ATTR_T10CRC 0x0010 825 #define ISP2400_FW_ATTR_VI 0x0020 826 #define ISP2400_FW_ATTR_EXPFW 0x2000 827 828 #define ISP_CAP_TMODE(isp) \ 829 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 830 #define ISP_CAP_SCCFW(isp) \ 831 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 832 #define ISP_CAP_2KLOGIN(isp) \ 833 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 834 #define ISP_CAP_MULTI_ID(isp) \ 835 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 836 837 #define ISP_GET_VPIDX(isp, tag) \ 838 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 839 840 /* 841 * Reduced Interrupt Operation Response Queue Entreis 842 */ 843 844 typedef struct { 845 isphdr_t req_header; 846 uint32_t req_handles[15]; 847 } isp_rio1_t; 848 849 typedef struct { 850 isphdr_t req_header; 851 uint16_t req_handles[30]; 852 } isp_rio2_t; 853 854 /* 855 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 856 */ 857 858 /* 859 * Initialization Control Block 860 * 861 * Version One (prime) format. 862 */ 863 typedef struct { 864 uint8_t icb_version; 865 uint8_t icb_reserved0; 866 uint16_t icb_fwoptions; 867 uint16_t icb_maxfrmlen; 868 uint16_t icb_maxalloc; 869 uint16_t icb_execthrottle; 870 uint8_t icb_retry_count; 871 uint8_t icb_retry_delay; 872 uint8_t icb_portname[8]; 873 uint16_t icb_hardaddr; 874 uint8_t icb_iqdevtype; 875 uint8_t icb_logintime; 876 uint8_t icb_nodename[8]; 877 uint16_t icb_rqstout; 878 uint16_t icb_rspnsin; 879 uint16_t icb_rqstqlen; 880 uint16_t icb_rsltqlen; 881 uint16_t icb_rqstaddr[4]; 882 uint16_t icb_respaddr[4]; 883 uint16_t icb_lunenables; 884 uint8_t icb_ccnt; 885 uint8_t icb_icnt; 886 uint16_t icb_lunetimeout; 887 uint16_t icb_reserved1; 888 uint16_t icb_xfwoptions; 889 uint8_t icb_racctimer; 890 uint8_t icb_idelaytimer; 891 uint16_t icb_zfwoptions; 892 uint16_t icb_reserved2[13]; 893 } isp_icb_t; 894 895 #define ICB_VERSION1 1 896 897 #define ICBOPT_EXTENDED 0x8000 898 #define ICBOPT_BOTH_WWNS 0x4000 899 #define ICBOPT_FULL_LOGIN 0x2000 900 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 901 #define ICBOPT_PREVLOOP 0x0800 902 #define ICBOPT_SRCHDOWN 0x0400 903 #define ICBOPT_NOLIP 0x0200 904 #define ICBOPT_PDBCHANGE_AE 0x0100 905 #define ICBOPT_INI_TGTTYPE 0x0080 906 #define ICBOPT_INI_ADISC 0x0040 907 #define ICBOPT_INI_DISABLE 0x0020 908 #define ICBOPT_TGT_ENABLE 0x0010 909 #define ICBOPT_FAST_POST 0x0008 910 #define ICBOPT_FULL_DUPLEX 0x0004 911 #define ICBOPT_FAIRNESS 0x0002 912 #define ICBOPT_HARD_ADDRESS 0x0001 913 914 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 915 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 916 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 917 #define ICBXOPT_FCTAPE 0x1000 918 #define ICBXOPT_CLASS2_ACK0 0x0200 919 #define ICBXOPT_CLASS2 0x0100 920 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 921 #define ICBXOPT_TOPO_MASK 0x0070 922 #define ICBXOPT_LOOP_ONLY 0x0000 923 #define ICBXOPT_PTP_ONLY 0x0010 924 #define ICBXOPT_LOOP_2_PTP 0x0020 925 #define ICBXOPT_PTP_2_LOOP 0x0030 926 /* 927 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 928 * RIO is not defined for the 23XX cards (just 2200) 929 */ 930 #define ICBXOPT_RIO_OFF 0 931 #define ICBXOPT_RIO_16BIT 1 932 #define ICBXOPT_RIO_32BIT 2 933 #define ICBXOPT_RIO_16BIT_IOCB 3 934 #define ICBXOPT_RIO_32BIT_IOCB 4 935 #define ICBXOPT_ZIO 5 936 #define ICBXOPT_TIMER_MASK 0x7 937 938 #define ICBZOPT_RATE_MASK 0xC000 939 #define ICBZOPT_RATE_ONEGB 0x0000 940 #define ICBZOPT_RATE_AUTO 0x8000 941 #define ICBZOPT_RATE_TWOGB 0x4000 942 #define ICBZOPT_50_OHM 0x2000 943 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 944 #define ICBZOPT_RSPSZ_MASK 0x0030 945 #define ICBZOPT_RSPSZ_24 0x0000 946 #define ICBZOPT_RSPSZ_12 0x0010 947 #define ICBZOPT_RSPSZ_24A 0x0020 948 #define ICBZOPT_RSPSZ_32 0x0030 949 #define ICBZOPT_SOFTID 0x0002 950 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 951 952 /* 2400 F/W options */ 953 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 954 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 955 #define ICB2400_OPT1_PREVLOOP 0x00000800 956 #define ICB2400_OPT1_SRCHDOWN 0x00000400 957 #define ICB2400_OPT1_NOLIP 0x00000200 958 #define ICB2400_OPT1_INI_DISABLE 0x00000020 959 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 960 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 961 #define ICB2400_OPT1_FAIRNESS 0x00000002 962 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 963 964 #define ICB2400_OPT2_FCTAPE 0x00001000 965 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 966 #define ICB2400_OPT2_CLASS2 0x00000100 967 #define ICB2400_OPT2_NO_PLAY 0x00000080 968 #define ICB2400_OPT2_TOPO_MASK 0x00000070 969 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 970 #define ICB2400_OPT2_PTP_ONLY 0x00000010 971 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 972 #define ICB2400_OPT2_PTP_2_LOOP 0x00000030 973 #define ICB2400_OPT2_TIMER_MASK 0x00000007 974 #define ICB2400_OPT2_ZIO 0x00000005 975 #define ICB2400_OPT2_ZIO1 0x00000006 976 977 #define ICB2400_OPT3_75_OHM 0x00010000 978 #define ICB2400_OPT3_RATE_MASK 0x0000E000 979 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 980 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 981 #define ICB2400_OPT3_RATE_AUTO 0x00004000 982 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 983 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 984 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 985 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 986 #define ICB2400_OPT3_ENA_OOF 0x00000040 987 /* note that a response size flag of zero is reserved! */ 988 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 989 #define ICB2400_OPT3_RSPSZ_12 0x00000010 990 #define ICB2400_OPT3_RSPSZ_24 0x00000020 991 #define ICB2400_OPT3_RSPSZ_32 0x00000030 992 #define ICB2400_OPT3_SOFTID 0x00000002 993 994 #define ICB_MIN_FRMLEN 256 995 #define ICB_MAX_FRMLEN 2112 996 #define ICB_DFLT_FRMLEN 1024 997 #define ICB_DFLT_ALLOC 256 998 #define ICB_DFLT_THROTTLE 16 999 #define ICB_DFLT_RDELAY 5 1000 #define ICB_DFLT_RCOUNT 3 1001 1002 #define ICB_LOGIN_TOV 30 1003 #define ICB_LUN_ENABLE_TOV 180 1004 1005 1006 /* 1007 * And somebody at QLogic had a great idea that you could just change 1008 * the structure *and* keep the version number the same as the other cards. 1009 */ 1010 typedef struct { 1011 uint16_t icb_version; 1012 uint16_t icb_reserved0; 1013 uint16_t icb_maxfrmlen; 1014 uint16_t icb_execthrottle; 1015 uint16_t icb_xchgcnt; 1016 uint16_t icb_hardaddr; 1017 uint8_t icb_portname[8]; 1018 uint8_t icb_nodename[8]; 1019 uint16_t icb_rspnsin; 1020 uint16_t icb_rqstout; 1021 uint16_t icb_retry_count; 1022 uint16_t icb_priout; 1023 uint16_t icb_rsltqlen; 1024 uint16_t icb_rqstqlen; 1025 uint16_t icb_ldn_nols; 1026 uint16_t icb_prqstqlen; 1027 uint16_t icb_rqstaddr[4]; 1028 uint16_t icb_respaddr[4]; 1029 uint16_t icb_priaddr[4]; 1030 uint16_t icb_reserved1[4]; 1031 uint16_t icb_atio_in; 1032 uint16_t icb_atioqlen; 1033 uint16_t icb_atioqaddr[4]; 1034 uint16_t icb_idelaytimer; 1035 uint16_t icb_logintime; 1036 uint32_t icb_fwoptions1; 1037 uint32_t icb_fwoptions2; 1038 uint32_t icb_fwoptions3; 1039 uint16_t icb_reserved2[12]; 1040 } isp_icb_2400_t; 1041 1042 #define RQRSP_ADDR0015 0 1043 #define RQRSP_ADDR1631 1 1044 #define RQRSP_ADDR3247 2 1045 #define RQRSP_ADDR4863 3 1046 1047 1048 #define ICB_NNM0 7 1049 #define ICB_NNM1 6 1050 #define ICB_NNM2 5 1051 #define ICB_NNM3 4 1052 #define ICB_NNM4 3 1053 #define ICB_NNM5 2 1054 #define ICB_NNM6 1 1055 #define ICB_NNM7 0 1056 1057 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1058 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1059 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1060 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1061 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1062 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1063 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1064 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1065 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1066 1067 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1068 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1069 ((uint64_t) array[ICB_NNM1] << 8) | \ 1070 ((uint64_t) array[ICB_NNM2] << 16) | \ 1071 ((uint64_t) array[ICB_NNM3] << 24) | \ 1072 ((uint64_t) array[ICB_NNM4] << 32) | \ 1073 ((uint64_t) array[ICB_NNM5] << 40) | \ 1074 ((uint64_t) array[ICB_NNM6] << 48) | \ 1075 ((uint64_t) array[ICB_NNM7] << 56) 1076 1077 1078 /* 1079 * For MULTI_ID firmware, this describes a 1080 * virtual port entity for getting status. 1081 */ 1082 typedef struct { 1083 uint16_t vp_port_status; 1084 uint8_t vp_port_options; 1085 uint8_t vp_port_loopid; 1086 uint8_t vp_port_portname[8]; 1087 uint8_t vp_port_nodename[8]; 1088 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1089 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1090 } vp_port_info_t; 1091 1092 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1093 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1094 #define ICB2400_VPOPT_ENABLED 0x00000008 1095 #define ICB2400_VPOPT_NOPLAY 0x00000004 1096 #define ICB2400_VPOPT_PREVLOOP 0x00000002 1097 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1098 1099 #define ICB2400_VPOPT_WRITE_SIZE 20 1100 1101 /* 1102 * For MULTI_ID firmware, we append this structure 1103 * to the isp_icb_2400_t above, followed by a list 1104 * structures that are *most* of the vp_port_info_t. 1105 */ 1106 typedef struct { 1107 uint16_t vp_count; 1108 uint16_t vp_global_options; 1109 } isp_icb_2400_vpinfo_t; 1110 1111 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1112 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1113 ICB2400_VPINFO_OFF + \ 1114 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1115 1116 #define ICB2400_VPGOPT_MID_DISABLE 0x02 1117 1118 typedef struct { 1119 isphdr_t vp_ctrl_hdr; 1120 uint32_t vp_ctrl_handle; 1121 uint16_t vp_ctrl_index_fail; 1122 uint16_t vp_ctrl_status; 1123 uint16_t vp_ctrl_command; 1124 uint16_t vp_ctrl_vp_count; 1125 uint16_t vp_ctrl_idmap[8]; 1126 uint8_t vp_ctrl_reserved[32]; 1127 } vp_ctrl_info_t; 1128 1129 #define VP_CTRL_CMD_ENABLE_VP 0 1130 #define VP_CTRL_CMD_DISABLE_VP 8 1131 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1132 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1133 1134 /* 1135 * We can use this structure for modifying either one or two VP ports after initialization 1136 */ 1137 typedef struct { 1138 isphdr_t vp_mod_hdr; 1139 uint32_t vp_mod_hdl; 1140 uint16_t vp_mod_reserved0; 1141 uint16_t vp_mod_status; 1142 uint8_t vp_mod_cmd; 1143 uint8_t vp_mod_cnt; 1144 uint8_t vp_mod_idx0; 1145 uint8_t vp_mod_idx1; 1146 struct { 1147 uint8_t options; 1148 uint8_t loopid; 1149 uint16_t reserved1; 1150 uint8_t wwpn[8]; 1151 uint8_t wwnn[8]; 1152 } vp_mod_ports[2]; 1153 uint8_t vp_mod_reserved2[8]; 1154 } vp_modify_t; 1155 1156 #define VP_STS_OK 0x00 1157 #define VP_STS_ERR 0x01 1158 #define VP_CNT_ERR 0x02 1159 #define VP_GEN_ERR 0x03 1160 #define VP_IDX_ERR 0x04 1161 #define VP_STS_BSY 0x05 1162 1163 #define VP_MODIFY_VP 0x00 1164 #define VP_MODIFY_ENA 0x01 1165 1166 /* 1167 * Port Data Base Element 1168 */ 1169 1170 typedef struct { 1171 uint16_t pdb_options; 1172 uint8_t pdb_mstate; 1173 uint8_t pdb_sstate; 1174 uint8_t pdb_hardaddr_bits[4]; 1175 uint8_t pdb_portid_bits[4]; 1176 uint8_t pdb_nodename[8]; 1177 uint8_t pdb_portname[8]; 1178 uint16_t pdb_execthrottle; 1179 uint16_t pdb_exec_count; 1180 uint8_t pdb_retry_count; 1181 uint8_t pdb_retry_delay; 1182 uint16_t pdb_resalloc; 1183 uint16_t pdb_curalloc; 1184 uint16_t pdb_qhead; 1185 uint16_t pdb_qtail; 1186 uint16_t pdb_tl_next; 1187 uint16_t pdb_tl_last; 1188 uint16_t pdb_features; /* PLOGI, Common Service */ 1189 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1190 uint16_t pdb_roi; /* PLOGI, Common Service */ 1191 uint8_t pdb_target; 1192 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1193 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1194 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1195 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1196 uint16_t pdb_labrtflg; 1197 uint16_t pdb_lstopflg; 1198 uint16_t pdb_sqhead; 1199 uint16_t pdb_sqtail; 1200 uint16_t pdb_ptimer; 1201 uint16_t pdb_nxt_seqid; 1202 uint16_t pdb_fcount; 1203 uint16_t pdb_prli_len; 1204 uint16_t pdb_prli_svc0; 1205 uint16_t pdb_prli_svc3; 1206 uint16_t pdb_loopid; 1207 uint16_t pdb_il_ptr; 1208 uint16_t pdb_sl_ptr; 1209 } isp_pdb_21xx_t; 1210 1211 #define PDB_OPTIONS_XMITTING (1<<11) 1212 #define PDB_OPTIONS_LNKXMIT (1<<10) 1213 #define PDB_OPTIONS_ABORTED (1<<9) 1214 #define PDB_OPTIONS_ADISC (1<<1) 1215 1216 #define PDB_STATE_DISCOVERY 0 1217 #define PDB_STATE_WDISC_ACK 1 1218 #define PDB_STATE_PLOGI 2 1219 #define PDB_STATE_PLOGI_ACK 3 1220 #define PDB_STATE_PRLI 4 1221 #define PDB_STATE_PRLI_ACK 5 1222 #define PDB_STATE_LOGGED_IN 6 1223 #define PDB_STATE_PORT_UNAVAIL 7 1224 #define PDB_STATE_PRLO 8 1225 #define PDB_STATE_PRLO_ACK 9 1226 #define PDB_STATE_PLOGO 10 1227 #define PDB_STATE_PLOG_ACK 11 1228 1229 #define SVC3_TGT_ROLE 0x10 1230 #define SVC3_INI_ROLE 0x20 1231 #define SVC3_ROLE_MASK 0x30 1232 #define SVC3_ROLE_SHIFT 4 1233 1234 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1235 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1236 1237 /* 1238 * Port Data Base Element- 24XX cards 1239 */ 1240 typedef struct { 1241 uint16_t pdb_flags; 1242 uint8_t pdb_curstate; 1243 uint8_t pdb_laststate; 1244 uint8_t pdb_hardaddr_bits[4]; 1245 uint8_t pdb_portid_bits[4]; 1246 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1247 uint16_t pdb_retry_timer; 1248 uint16_t pdb_handle; 1249 uint16_t pdb_rcv_dsize; 1250 uint16_t pdb_reserved0; 1251 uint16_t pdb_prli_svc0; 1252 uint16_t pdb_prli_svc3; 1253 uint8_t pdb_portname[8]; 1254 uint8_t pdb_nodename[8]; 1255 uint8_t pdb_reserved1[24]; 1256 } isp_pdb_24xx_t; 1257 1258 #define PDB2400_TID_SUPPORTED 0x4000 1259 #define PDB2400_FC_TAPE 0x0080 1260 #define PDB2400_CLASS2_ACK0 0x0040 1261 #define PDB2400_FCP_CONF 0x0020 1262 #define PDB2400_CLASS2 0x0010 1263 #define PDB2400_ADDR_VALID 0x0002 1264 1265 #define PDB2400_STATE_PLOGI_PEND 0x03 1266 #define PDB2400_STATE_PLOGI_DONE 0x04 1267 #define PDB2400_STATE_PRLI_PEND 0x05 1268 #define PDB2400_STATE_LOGGED_IN 0x06 1269 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1270 #define PDB2400_STATE_PRLO_PEND 0x09 1271 #define PDB2400_STATE_LOGO_PEND 0x0B 1272 1273 /* 1274 * Common elements from the above two structures that are actually useful to us. 1275 */ 1276 typedef struct { 1277 uint16_t handle; 1278 uint16_t reserved; 1279 uint32_t s3_role : 8, 1280 portid : 24; 1281 uint8_t portname[8]; 1282 uint8_t nodename[8]; 1283 } isp_pdb_t; 1284 1285 /* 1286 * Port Database Changed Async Event information for 24XX cards 1287 */ 1288 #define PDB24XX_AE_OK 0x00 1289 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1290 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1291 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1292 #define PDB24XX_AE_PLOGI_RCVD 0x04 1293 #define PDB24XX_AE_PLOGI_RJT 0x05 1294 #define PDB24XX_AE_PRLI_RCVD 0x06 1295 #define PDB24XX_AE_PRLI_RJT 0x07 1296 #define PDB24XX_AE_TPRLO 0x08 1297 #define PDB24XX_AE_TPRLO_RJT 0x09 1298 #define PDB24XX_AE_PRLO_RCVD 0x0a 1299 #define PDB24XX_AE_LOGO_RCVD 0x0b 1300 #define PDB24XX_AE_TOPO_CHG 0x0c 1301 #define PDB24XX_AE_NPORT_CHG 0x0d 1302 #define PDB24XX_AE_FLOGI_RJT 0x0e 1303 #define PDB24XX_AE_BAD_FANN 0x0f 1304 #define PDB24XX_AE_FLOGI_TIMO 0x10 1305 #define PDB24XX_AE_ABX_LOGO 0x11 1306 #define PDB24XX_AE_PLOGI_DONE 0x12 1307 #define PDB24XX_AE_PRLI_DONJE 0x13 1308 #define PDB24XX_AE_OPN_1 0x14 1309 #define PDB24XX_AE_OPN_2 0x15 1310 #define PDB24XX_AE_TXERR 0x16 1311 #define PDB24XX_AE_FORCED_LOGO 0x17 1312 #define PDB24XX_AE_DISC_TIMO 0x18 1313 1314 /* 1315 * Genericized Port Login/Logout software structure 1316 */ 1317 typedef struct { 1318 uint16_t handle; 1319 uint16_t channel; 1320 uint32_t 1321 flags : 8, 1322 portid : 24; 1323 } isp_plcmd_t; 1324 /* the flags to use are those for PLOGX_FLG_* below */ 1325 1326 /* 1327 * ISP24XX- Login/Logout Port IOCB 1328 */ 1329 typedef struct { 1330 isphdr_t plogx_header; 1331 uint32_t plogx_handle; 1332 uint16_t plogx_status; 1333 uint16_t plogx_nphdl; 1334 uint16_t plogx_flags; 1335 uint16_t plogx_vphdl; /* low 8 bits */ 1336 uint16_t plogx_portlo; /* low 16 bits */ 1337 uint16_t plogx_rspsz_porthi; 1338 struct { 1339 uint16_t lo16; 1340 uint16_t hi16; 1341 } plogx_ioparm[11]; 1342 } isp_plogx_t; 1343 1344 #define PLOGX_STATUS_OK 0x00 1345 #define PLOGX_STATUS_UNAVAIL 0x28 1346 #define PLOGX_STATUS_LOGOUT 0x29 1347 #define PLOGX_STATUS_IOCBERR 0x31 1348 1349 #define PLOGX_IOCBERR_NOLINK 0x01 1350 #define PLOGX_IOCBERR_NOIOCB 0x02 1351 #define PLOGX_IOCBERR_NOXGHG 0x03 1352 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1353 #define PLOGX_IOCBERR_NOFABRIC 0x05 1354 #define PLOGX_IOCBERR_NOTREADY 0x07 1355 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1356 #define PLOGX_IOCBERR_NOPCB 0x0a 1357 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1358 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1359 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1360 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1361 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1362 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1363 1364 #define PLOGX_FLG_CMD_MASK 0xf 1365 #define PLOGX_FLG_CMD_PLOGI 0 1366 #define PLOGX_FLG_CMD_PRLI 1 1367 #define PLOGX_FLG_CMD_PDISC 2 1368 #define PLOGX_FLG_CMD_LOGO 8 1369 #define PLOGX_FLG_CMD_PRLO 9 1370 #define PLOGX_FLG_CMD_TPRLO 10 1371 1372 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1373 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1374 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1375 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1376 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1377 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1378 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1379 1380 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1381 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1382 1383 /* 1384 * Report ID Acquisistion (24XX multi-id firmware) 1385 */ 1386 typedef struct { 1387 isphdr_t ridacq_hdr; 1388 uint32_t ridacq_handle; 1389 union { 1390 struct { 1391 uint8_t ridacq_vp_acquired; 1392 uint8_t ridacq_vp_setup; 1393 uint16_t ridacq_reserved0; 1394 } type0; /* type 0 */ 1395 struct { 1396 uint16_t ridacq_vp_count; 1397 uint8_t ridacq_vp_index; 1398 uint8_t ridacq_vp_status; 1399 } type1; /* type 1 */ 1400 } un; 1401 uint16_t ridacq_vp_port_lo; 1402 uint8_t ridacq_vp_port_hi; 1403 uint8_t ridacq_format; /* 0 or 1 */ 1404 uint16_t ridacq_map[8]; 1405 uint8_t ridacq_reserved1[32]; 1406 } isp_ridacq_t; 1407 1408 #define RIDACQ_STS_COMPLETE 0 1409 #define RIDACQ_STS_UNACQUIRED 1 1410 #define RIDACQ_STS_CHANGED 20 1411 1412 1413 /* 1414 * Simple Name Server Data Structures 1415 */ 1416 #define SNS_GA_NXT 0x100 1417 #define SNS_GPN_ID 0x112 1418 #define SNS_GNN_ID 0x113 1419 #define SNS_GFF_ID 0x11F 1420 #define SNS_GID_FT 0x171 1421 #define SNS_RFT_ID 0x217 1422 typedef struct { 1423 uint16_t snscb_rblen; /* response buffer length (words) */ 1424 uint16_t snscb_reserved0; 1425 uint16_t snscb_addr[4]; /* response buffer address */ 1426 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1427 uint16_t snscb_reserved1; 1428 uint16_t snscb_data[1]; /* variable data */ 1429 } sns_screq_t; /* Subcommand Request Structure */ 1430 1431 typedef struct { 1432 uint16_t snscb_rblen; /* response buffer length (words) */ 1433 uint16_t snscb_reserved0; 1434 uint16_t snscb_addr[4]; /* response buffer address */ 1435 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1436 uint16_t snscb_reserved1; 1437 uint16_t snscb_cmd; 1438 uint16_t snscb_reserved2; 1439 uint32_t snscb_reserved3; 1440 uint32_t snscb_port; 1441 } sns_ga_nxt_req_t; 1442 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1443 1444 typedef struct { 1445 uint16_t snscb_rblen; /* response buffer length (words) */ 1446 uint16_t snscb_reserved0; 1447 uint16_t snscb_addr[4]; /* response buffer address */ 1448 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1449 uint16_t snscb_reserved1; 1450 uint16_t snscb_cmd; 1451 uint16_t snscb_reserved2; 1452 uint32_t snscb_reserved3; 1453 uint32_t snscb_portid; 1454 } sns_gxn_id_req_t; 1455 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1456 1457 typedef struct { 1458 uint16_t snscb_rblen; /* response buffer length (words) */ 1459 uint16_t snscb_reserved0; 1460 uint16_t snscb_addr[4]; /* response buffer address */ 1461 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1462 uint16_t snscb_reserved1; 1463 uint16_t snscb_cmd; 1464 uint16_t snscb_mword_div_2; 1465 uint32_t snscb_reserved3; 1466 uint32_t snscb_fc4_type; 1467 } sns_gid_ft_req_t; 1468 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1469 1470 typedef struct { 1471 uint16_t snscb_rblen; /* response buffer length (words) */ 1472 uint16_t snscb_reserved0; 1473 uint16_t snscb_addr[4]; /* response buffer address */ 1474 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1475 uint16_t snscb_reserved1; 1476 uint16_t snscb_cmd; 1477 uint16_t snscb_reserved2; 1478 uint32_t snscb_reserved3; 1479 uint32_t snscb_port; 1480 uint32_t snscb_fc4_types[8]; 1481 } sns_rft_id_req_t; 1482 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1483 1484 typedef struct { 1485 ct_hdr_t snscb_cthdr; 1486 uint8_t snscb_port_type; 1487 uint8_t snscb_port_id[3]; 1488 uint8_t snscb_portname[8]; 1489 uint16_t snscb_data[1]; /* variable data */ 1490 } sns_scrsp_t; /* Subcommand Response Structure */ 1491 1492 typedef struct { 1493 ct_hdr_t snscb_cthdr; 1494 uint8_t snscb_port_type; 1495 uint8_t snscb_port_id[3]; 1496 uint8_t snscb_portname[8]; 1497 uint8_t snscb_pnlen; /* symbolic port name length */ 1498 uint8_t snscb_pname[255]; /* symbolic port name */ 1499 uint8_t snscb_nodename[8]; 1500 uint8_t snscb_nnlen; /* symbolic node name length */ 1501 uint8_t snscb_nname[255]; /* symbolic node name */ 1502 uint8_t snscb_ipassoc[8]; 1503 uint8_t snscb_ipaddr[16]; 1504 uint8_t snscb_svc_class[4]; 1505 uint8_t snscb_fc4_types[32]; 1506 uint8_t snscb_fpname[8]; 1507 uint8_t snscb_reserved; 1508 uint8_t snscb_hardaddr[3]; 1509 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1510 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1511 1512 typedef struct { 1513 ct_hdr_t snscb_cthdr; 1514 uint8_t snscb_wwn[8]; 1515 } sns_gxn_id_rsp_t; 1516 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1517 1518 typedef struct { 1519 ct_hdr_t snscb_cthdr; 1520 uint32_t snscb_fc4_features[32]; 1521 } sns_gff_id_rsp_t; 1522 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1523 1524 typedef struct { 1525 ct_hdr_t snscb_cthdr; 1526 struct { 1527 uint8_t control; 1528 uint8_t portid[3]; 1529 } snscb_ports[1]; 1530 } sns_gid_ft_rsp_t; 1531 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1532 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1533 1534 /* 1535 * Other Misc Structures 1536 */ 1537 1538 /* ELS Pass Through */ 1539 typedef struct { 1540 isphdr_t els_hdr; 1541 uint32_t els_handle; 1542 uint16_t els_status; 1543 uint16_t els_nphdl; 1544 uint16_t els_xmit_dsd_count; /* outgoing only */ 1545 uint8_t els_vphdl; 1546 uint8_t els_sof; 1547 uint32_t els_rxid; 1548 uint16_t els_recv_dsd_count; /* outgoing only */ 1549 uint8_t els_opcode; 1550 uint8_t els_reserved1; 1551 uint8_t els_did_lo; 1552 uint8_t els_did_mid; 1553 uint8_t els_did_hi; 1554 uint8_t els_reserved2; 1555 uint16_t els_reserved3; 1556 uint16_t els_ctl_flags; 1557 union { 1558 struct { 1559 uint32_t _els_bytecnt; 1560 uint32_t _els_subcode1; 1561 uint32_t _els_subcode2; 1562 uint8_t _els_reserved4[20]; 1563 } in; 1564 struct { 1565 uint32_t _els_recv_bytecnt; 1566 uint32_t _els_xmit_bytecnt; 1567 uint32_t _els_xmit_dsd_length; 1568 uint16_t _els_xmit_dsd_a1500; 1569 uint16_t _els_xmit_dsd_a3116; 1570 uint16_t _els_xmit_dsd_a4732; 1571 uint16_t _els_xmit_dsd_a6348; 1572 uint32_t _els_recv_dsd_length; 1573 uint16_t _els_recv_dsd_a1500; 1574 uint16_t _els_recv_dsd_a3116; 1575 uint16_t _els_recv_dsd_a4732; 1576 uint16_t _els_recv_dsd_a6348; 1577 } out; 1578 } inout; 1579 #define els_bytecnt inout.in._els_bytecnt 1580 #define els_subcode1 inout.in._els_subcode1 1581 #define els_subcode2 inout.in._els_subcode2 1582 #define els_reserved4 inout.in._els_reserved4 1583 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1584 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1585 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1586 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1587 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1588 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1589 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1590 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1591 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1592 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1593 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1594 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1595 } els_t; 1596 1597 /* 1598 * A handy package structure for running FC-SCSI commands internally 1599 */ 1600 typedef struct { 1601 uint16_t handle; 1602 uint16_t lun; 1603 uint32_t 1604 channel : 8, 1605 portid : 24; 1606 uint32_t timeout; 1607 union { 1608 struct { 1609 uint32_t data_length; 1610 uint32_t 1611 no_wait : 1, 1612 do_read : 1; 1613 uint8_t cdb[16]; 1614 void *data_ptr; 1615 } beg; 1616 struct { 1617 uint32_t data_residual; 1618 uint8_t status; 1619 uint8_t pad; 1620 uint16_t sense_length; 1621 uint8_t sense_data[32]; 1622 } end; 1623 } fcd; 1624 } isp_xcmd_t; 1625 1626 /* 1627 * Target Mode related definitions 1628 */ 1629 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1630 #define QLTM_SVALID 0x80 1631 1632 /* 1633 * Structure for Enable Lun and Modify Lun queue entries 1634 */ 1635 typedef struct { 1636 isphdr_t le_header; 1637 uint32_t le_reserved; 1638 uint8_t le_lun; 1639 uint8_t le_rsvd; 1640 uint8_t le_ops; /* Modify LUN only */ 1641 uint8_t le_tgt; /* Not for FC */ 1642 uint32_t le_flags; /* Not for FC */ 1643 uint8_t le_status; 1644 uint8_t le_reserved2; 1645 uint8_t le_cmd_count; 1646 uint8_t le_in_count; 1647 uint8_t le_cdb6len; /* Not for FC */ 1648 uint8_t le_cdb7len; /* Not for FC */ 1649 uint16_t le_timeout; 1650 uint16_t le_reserved3[20]; 1651 } lun_entry_t; 1652 1653 /* 1654 * le_flags values 1655 */ 1656 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1657 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1658 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1659 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1660 1661 /* 1662 * le_ops values 1663 */ 1664 #define LUN_CCINCR 0x01 /* increment command count */ 1665 #define LUN_CCDECR 0x02 /* decrement command count */ 1666 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1667 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1668 1669 /* 1670 * le_status values 1671 */ 1672 #define LUN_OK 0x01 /* we be rockin' */ 1673 #define LUN_ERR 0x04 /* request completed with error */ 1674 #define LUN_INVAL 0x06 /* invalid request */ 1675 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1676 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1677 1678 /* 1679 * Immediate Notify Entry structure 1680 */ 1681 #define IN_MSGLEN 8 /* 8 bytes */ 1682 #define IN_RSVDLEN 8 /* 8 words */ 1683 typedef struct { 1684 isphdr_t in_header; 1685 uint32_t in_reserved; 1686 uint8_t in_lun; /* lun */ 1687 uint8_t in_iid; /* initiator */ 1688 uint8_t in_reserved2; 1689 uint8_t in_tgt; /* target */ 1690 uint32_t in_flags; 1691 uint8_t in_status; 1692 uint8_t in_rsvd2; 1693 uint8_t in_tag_val; /* tag value */ 1694 uint8_t in_tag_type; /* tag type */ 1695 uint16_t in_seqid; /* sequence id */ 1696 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1697 uint16_t in_reserved3[IN_RSVDLEN]; 1698 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1699 } in_entry_t; 1700 1701 typedef struct { 1702 isphdr_t in_header; 1703 uint32_t in_reserved; 1704 uint8_t in_lun; /* lun */ 1705 uint8_t in_iid; /* initiator */ 1706 uint16_t in_scclun; 1707 uint32_t in_reserved2; 1708 uint16_t in_status; 1709 uint16_t in_task_flags; 1710 uint16_t in_seqid; /* sequence id */ 1711 } in_fcentry_t; 1712 1713 typedef struct { 1714 isphdr_t in_header; 1715 uint32_t in_reserved; 1716 uint16_t in_iid; /* initiator */ 1717 uint16_t in_scclun; 1718 uint32_t in_reserved2; 1719 uint16_t in_status; 1720 uint16_t in_task_flags; 1721 uint16_t in_seqid; /* sequence id */ 1722 } in_fcentry_e_t; 1723 1724 /* 1725 * Values for the in_status field 1726 */ 1727 #define IN_REJECT 0x0D /* Message Reject message received */ 1728 #define IN_RESET 0x0E /* Bus Reset occurred */ 1729 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1730 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1731 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1732 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1733 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1734 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1735 #define IN_PORT_CHANGED 0x2A /* port changed */ 1736 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1737 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1738 1739 /* 1740 * Values for the in_task_flags field- should only get one at a time! 1741 */ 1742 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1743 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1744 #define TASK_FLAGS_TARGET_RESET (1<<13) 1745 #define TASK_FLAGS_LUN_RESET (1<<12) 1746 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1747 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1748 1749 /* 1750 * ISP24XX Immediate Notify 1751 */ 1752 typedef struct { 1753 isphdr_t in_header; 1754 uint32_t in_reserved; 1755 uint16_t in_nphdl; 1756 uint16_t in_reserved1; 1757 uint16_t in_flags; 1758 uint16_t in_srr_rxid; 1759 uint16_t in_status; 1760 uint8_t in_status_subcode; 1761 uint8_t in_reserved2; 1762 uint32_t in_rxid; 1763 uint16_t in_srr_reloff_lo; 1764 uint16_t in_srr_reloff_hi; 1765 uint16_t in_srr_iu; 1766 uint16_t in_srr_oxid; 1767 /* 1768 * If bit 2 is set in in_flags, the following 1769 * two tags are valid. If the received ELS is 1770 * a LOGO, then these tags contain the N Port ID 1771 * from the LOGO payload. If the received ELS 1772 * request is TPRLO, these tags contain the 1773 * Third Party Originator N Port ID. 1774 */ 1775 uint16_t in_nport_id_hi; 1776 uint8_t in_nport_id_lo; 1777 uint8_t in_reserved3; 1778 /* 1779 * If bit 2 is set in in_flags, the following 1780 * tag is valid. If the received ELS is a LOGO, 1781 * then this tag contains the n-port handle 1782 * from the LOGO payload. If the received ELS 1783 * request is TPRLO, this tag contain the 1784 * n-port handle for the Third Party Originator. 1785 */ 1786 uint16_t in_np_handle; 1787 uint8_t in_reserved4[12]; 1788 uint8_t in_reserved5; 1789 uint8_t in_vpidx; 1790 uint32_t in_reserved6; 1791 uint16_t in_portid_lo; 1792 uint8_t in_portid_hi; 1793 uint8_t in_reserved7; 1794 uint16_t in_reserved8; 1795 uint16_t in_oxid; 1796 } in_fcentry_24xx_t; 1797 1798 #define IN24XX_FLAG_PUREX_IOCB 0x1 1799 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1800 #define IN24XX_FLAG_NPHDL_VALID 0x4 1801 1802 #define IN24XX_LIP_RESET 0x0E 1803 #define IN24XX_LINK_RESET 0x0F 1804 #define IN24XX_PORT_LOGOUT 0x29 1805 #define IN24XX_PORT_CHANGED 0x2A 1806 #define IN24XX_LINK_FAILED 0x2E 1807 #define IN24XX_SRR_RCVD 0x45 1808 #define IN24XX_ELS_RCVD 0x46 /* 1809 * login-affectin ELS received- check 1810 * subcode for specific opcode 1811 */ 1812 1813 /* 1814 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1815 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1816 * Big Endian format. 1817 */ 1818 #define IN24XX_PLOGI_WWNN_OFF 0x20 1819 #define IN24XX_PLOGI_WWPN_OFF 0x28 1820 1821 /* 1822 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1823 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1824 */ 1825 #define IN24XX_LOGO_WWPN_OFF 0x28 1826 1827 /* 1828 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1829 */ 1830 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1831 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1832 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1833 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1834 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1835 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1836 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1837 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1838 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1839 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1840 1841 /* 1842 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1843 */ 1844 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1845 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1846 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1847 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1848 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1849 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1850 1851 /* 1852 * Notify Acknowledge Entry structure 1853 */ 1854 #define NA_RSVDLEN 22 1855 typedef struct { 1856 isphdr_t na_header; 1857 uint32_t na_reserved; 1858 uint8_t na_lun; /* lun */ 1859 uint8_t na_iid; /* initiator */ 1860 uint8_t na_reserved2; 1861 uint8_t na_tgt; /* target */ 1862 uint32_t na_flags; 1863 uint8_t na_status; 1864 uint8_t na_event; 1865 uint16_t na_seqid; /* sequence id */ 1866 uint16_t na_reserved3[NA_RSVDLEN]; 1867 } na_entry_t; 1868 1869 /* 1870 * Value for the na_event field 1871 */ 1872 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1873 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1874 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1875 1876 #define NA2_RSVDLEN 21 1877 typedef struct { 1878 isphdr_t na_header; 1879 uint32_t na_reserved; 1880 uint8_t na_reserved1; 1881 uint8_t na_iid; /* initiator loop id */ 1882 uint16_t na_response; 1883 uint16_t na_flags; 1884 uint16_t na_reserved2; 1885 uint16_t na_status; 1886 uint16_t na_task_flags; 1887 uint16_t na_seqid; /* sequence id */ 1888 uint16_t na_reserved3[NA2_RSVDLEN]; 1889 } na_fcentry_t; 1890 1891 typedef struct { 1892 isphdr_t na_header; 1893 uint32_t na_reserved; 1894 uint16_t na_iid; /* initiator loop id */ 1895 uint16_t na_response; /* response code */ 1896 uint16_t na_flags; 1897 uint16_t na_reserved2; 1898 uint16_t na_status; 1899 uint16_t na_task_flags; 1900 uint16_t na_seqid; /* sequence id */ 1901 uint16_t na_reserved3[NA2_RSVDLEN]; 1902 } na_fcentry_e_t; 1903 1904 #define NAFC_RCOUNT 0x80 /* increment resource count */ 1905 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1906 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1907 1908 /* 1909 * ISP24XX Notify Acknowledge 1910 */ 1911 1912 typedef struct { 1913 isphdr_t na_header; 1914 uint32_t na_handle; 1915 uint16_t na_nphdl; 1916 uint16_t na_reserved1; 1917 uint16_t na_flags; 1918 uint16_t na_srr_rxid; 1919 uint16_t na_status; 1920 uint8_t na_status_subcode; 1921 uint8_t na_reserved2; 1922 uint32_t na_rxid; 1923 uint16_t na_srr_reloff_lo; 1924 uint16_t na_srr_reloff_hi; 1925 uint16_t na_srr_iu; 1926 uint16_t na_srr_flags; 1927 uint8_t na_reserved3[18]; 1928 uint8_t na_reserved4; 1929 uint8_t na_vpidx; 1930 uint8_t na_srr_reject_vunique; 1931 uint8_t na_srr_reject_explanation; 1932 uint8_t na_srr_reject_code; 1933 uint8_t na_reserved5; 1934 uint8_t na_reserved6[6]; 1935 uint16_t na_oxid; 1936 } na_fcentry_24xx_t; 1937 1938 /* 1939 * Accept Target I/O Entry structure 1940 */ 1941 #define ATIO_CDBLEN 26 1942 1943 typedef struct { 1944 isphdr_t at_header; 1945 uint16_t at_reserved; 1946 uint16_t at_handle; 1947 uint8_t at_lun; /* lun */ 1948 uint8_t at_iid; /* initiator */ 1949 uint8_t at_cdblen; /* cdb length */ 1950 uint8_t at_tgt; /* target */ 1951 uint32_t at_flags; 1952 uint8_t at_status; /* firmware status */ 1953 uint8_t at_scsi_status; /* scsi status */ 1954 uint8_t at_tag_val; /* tag value */ 1955 uint8_t at_tag_type; /* tag type */ 1956 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 1957 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 1958 } at_entry_t; 1959 1960 /* 1961 * at_flags values 1962 */ 1963 #define AT_NODISC 0x00008000 /* disconnect disabled */ 1964 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 1965 1966 /* 1967 * at_status values 1968 */ 1969 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 1970 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 1971 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 1972 #define AT_NOCAP 0x16 /* Requested capability not available */ 1973 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 1974 #define AT_CDB 0x3D /* CDB received */ 1975 /* 1976 * Macros to create and fetch and test concatenated handle and tag value macros 1977 * (SPI only) 1978 */ 1979 #define AT_MAKE_TAGID(tid, aep) \ 1980 tid = aep->at_handle; \ 1981 if (aep->at_flags & AT_TQAE) { \ 1982 tid |= (aep->at_tag_val << 16); \ 1983 tid |= (1 << 24); \ 1984 } 1985 1986 #define CT_MAKE_TAGID(tid, ct) \ 1987 tid = ct->ct_fwhandle; \ 1988 if (ct->ct_flags & CT_TQAE) { \ 1989 tid |= (ct->ct_tag_val << 16); \ 1990 tid |= (1 << 24); \ 1991 } 1992 1993 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 1994 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 1995 #define AT_GET_HANDLE(val) ((val) & 0xffff) 1996 1997 #define IN_MAKE_TAGID(tid, inp) \ 1998 tid = inp->in_seqid; \ 1999 tid |= (inp->in_tag_val << 16); \ 2000 tid |= (1 << 24) 2001 2002 /* 2003 * Accept Target I/O Entry structure, Type 2 2004 */ 2005 #define ATIO2_CDBLEN 16 2006 2007 typedef struct { 2008 isphdr_t at_header; 2009 uint32_t at_reserved; 2010 uint8_t at_lun; /* lun or reserved */ 2011 uint8_t at_iid; /* initiator */ 2012 uint16_t at_rxid; /* response ID */ 2013 uint16_t at_flags; 2014 uint16_t at_status; /* firmware status */ 2015 uint8_t at_crn; /* command reference number */ 2016 uint8_t at_taskcodes; 2017 uint8_t at_taskflags; 2018 uint8_t at_execodes; 2019 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2020 uint32_t at_datalen; /* allocated data len */ 2021 uint16_t at_scclun; /* SCC Lun or reserved */ 2022 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2023 uint16_t at_reserved2[6]; 2024 uint16_t at_oxid; 2025 } at2_entry_t; 2026 2027 typedef struct { 2028 isphdr_t at_header; 2029 uint32_t at_reserved; 2030 uint16_t at_iid; /* initiator */ 2031 uint16_t at_rxid; /* response ID */ 2032 uint16_t at_flags; 2033 uint16_t at_status; /* firmware status */ 2034 uint8_t at_crn; /* command reference number */ 2035 uint8_t at_taskcodes; 2036 uint8_t at_taskflags; 2037 uint8_t at_execodes; 2038 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2039 uint32_t at_datalen; /* allocated data len */ 2040 uint16_t at_scclun; /* SCC Lun or reserved */ 2041 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2042 uint16_t at_reserved2[6]; 2043 uint16_t at_oxid; 2044 } at2e_entry_t; 2045 2046 #define ATIO2_WWPN_OFFSET 0x2A 2047 #define ATIO2_OXID_OFFSET 0x3E 2048 2049 #define ATIO2_TC_ATTR_MASK 0x7 2050 #define ATIO2_TC_ATTR_SIMPLEQ 0 2051 #define ATIO2_TC_ATTR_HEADOFQ 1 2052 #define ATIO2_TC_ATTR_ORDERED 2 2053 #define ATIO2_TC_ATTR_ACAQ 4 2054 #define ATIO2_TC_ATTR_UNTAGGED 5 2055 2056 #define ATIO2_EX_WRITE 0x1 2057 #define ATIO2_EX_READ 0x2 2058 /* 2059 * Macros to create and fetch and test concatenated handle and tag value macros 2060 */ 2061 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2062 tid = aep->at_rxid; \ 2063 tid |= (((uint64_t)inst) << 32); \ 2064 tid |= (((uint64_t)bus) << 48) 2065 2066 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2067 tid = ct->ct_rxid; \ 2068 tid |= (((uint64_t)inst) << 32); \ 2069 tid |= (((uint64_t)(bus & 0xff)) << 48) 2070 2071 #define AT2_HAS_TAG(val) 1 2072 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2073 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2074 #define AT2_GET_HANDLE AT2_GET_TAG 2075 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2076 2077 #define FC_HAS_TAG AT2_HAS_TAG 2078 #define FC_GET_TAG AT2_GET_TAG 2079 #define FC_GET_INST AT2_GET_INST 2080 #define FC_GET_HANDLE AT2_GET_HANDLE 2081 2082 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2083 tid = seqid; \ 2084 tid |= (((uint64_t)inst) << 32); \ 2085 tid |= (((uint64_t)(bus & 0xff)) << 48) 2086 2087 #define FC_TAG_INSERT_INST(tid, inst) \ 2088 tid &= ~0x0000ffff00000000ull; \ 2089 tid |= (((uint64_t)inst) << 32) 2090 2091 /* 2092 * 24XX ATIO Definition 2093 * 2094 * This is *quite* different from other entry types. 2095 * First of all, it has its own queue it comes in on. 2096 * 2097 * Secondly, it doesn't have a normal header. 2098 * 2099 * Thirdly, it's just a passthru of the FCP CMND IU 2100 * which is recorded in big endian mode. 2101 */ 2102 typedef struct { 2103 uint8_t at_type; 2104 uint8_t at_count; 2105 /* 2106 * Task attribute in high four bits, 2107 * the rest is the FCP CMND IU Length. 2108 * NB: the command can extend past the 2109 * length for a single queue entry. 2110 */ 2111 uint16_t at_ta_len; 2112 uint32_t at_rxid; 2113 fc_hdr_t at_hdr; 2114 fcp_cmnd_iu_t at_cmnd; 2115 } at7_entry_t; 2116 #define AT7_NORESRC_RXID 0xffffffff 2117 2118 2119 /* 2120 * Continue Target I/O Entry structure 2121 * Request from driver. The response from the 2122 * ISP firmware is the same except that the last 18 2123 * bytes are overwritten by suggested sense data if 2124 * the 'autosense valid' bit is set in the status byte. 2125 */ 2126 typedef struct { 2127 isphdr_t ct_header; 2128 uint16_t ct_syshandle; 2129 uint16_t ct_fwhandle; /* required by f/w */ 2130 uint8_t ct_lun; /* lun */ 2131 uint8_t ct_iid; /* initiator id */ 2132 uint8_t ct_reserved2; 2133 uint8_t ct_tgt; /* our target id */ 2134 uint32_t ct_flags; 2135 uint8_t ct_status; /* isp status */ 2136 uint8_t ct_scsi_status; /* scsi status */ 2137 uint8_t ct_tag_val; /* tag value */ 2138 uint8_t ct_tag_type; /* tag type */ 2139 uint32_t ct_xfrlen; /* transfer length */ 2140 int32_t ct_resid; /* residual length */ 2141 uint16_t ct_timeout; 2142 uint16_t ct_seg_count; 2143 ispds_t ct_dataseg[ISP_RQDSEG]; 2144 } ct_entry_t; 2145 2146 /* 2147 * For some of the dual port SCSI adapters, port (bus #) is reported 2148 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2149 * 2150 * Note that this does not apply to FC adapters at all which can and 2151 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2152 * that have logged in across a SCSI fabric. 2153 */ 2154 #define GET_IID_VAL(x) (x & 0x3f) 2155 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2156 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2157 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2158 2159 /* 2160 * ct_flags values 2161 */ 2162 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2163 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 2164 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 2165 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2166 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2167 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2168 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2169 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2170 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2171 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2172 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2173 2174 /* 2175 * ct_status values 2176 * - set by the firmware when it returns the CTIO 2177 */ 2178 #define CT_OK 0x01 /* completed without error */ 2179 #define CT_ABORTED 0x02 /* aborted by host */ 2180 #define CT_ERR 0x04 /* see sense data for error */ 2181 #define CT_INVAL 0x06 /* request for disabled lun */ 2182 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2183 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2184 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2185 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2186 #define CT_TIMEOUT 0x0B /* timed out */ 2187 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2188 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2189 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2190 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2191 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2192 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2193 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2194 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2195 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2196 #define CT_LOGOUT 0x29 /* port logout */ 2197 #define CT_PORTCHANGED 0x2A /* port changed */ 2198 #define CT_IDE 0x33 /* Initiator Detected Error */ 2199 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2200 #define CT_SRR 0x45 /* SRR Received */ 2201 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2202 2203 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2204 2205 /* 2206 * When the firmware returns a CTIO entry, it may overwrite the last 2207 * part of the structure with sense data. This starts at offset 0x2E 2208 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2209 * than define a new struct for this, I'm just using the sense data 2210 * offset. 2211 */ 2212 #define CTIO_SENSE_OFFSET 0x2E 2213 2214 /* 2215 * Entry length in u_longs. All entries are the same size so 2216 * any one will do as the numerator. 2217 */ 2218 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2219 2220 /* 2221 * QLA2100 CTIO (type 2) entry 2222 */ 2223 #define MAXRESPLEN 26 2224 typedef struct { 2225 isphdr_t ct_header; 2226 uint32_t ct_syshandle; 2227 uint8_t ct_lun; /* lun */ 2228 uint8_t ct_iid; /* initiator id */ 2229 uint16_t ct_rxid; /* response ID */ 2230 uint16_t ct_flags; 2231 uint16_t ct_status; /* isp status */ 2232 uint16_t ct_timeout; 2233 uint16_t ct_seg_count; 2234 uint32_t ct_reloff; /* relative offset */ 2235 int32_t ct_resid; /* residual length */ 2236 union { 2237 /* 2238 * The three different modes that the target driver 2239 * can set the CTIO{2,3,4} up as. 2240 * 2241 * The first is for sending FCP_DATA_IUs as well as 2242 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2243 * 2244 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2245 * Note that no FCP_DATA_IUs will be sent. 2246 * 2247 * The third is for sending FCP_RSP_IUs as built specifically 2248 * in system memory as located by the isp_dataseg. 2249 */ 2250 struct { 2251 uint32_t _reserved; 2252 uint16_t _reserved2; 2253 uint16_t ct_scsi_status; 2254 uint32_t ct_xfrlen; 2255 union { 2256 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2257 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2258 ispdslist_t ct_dslist; 2259 } u; 2260 } m0; 2261 struct { 2262 uint16_t _reserved; 2263 uint16_t _reserved2; 2264 uint16_t ct_senselen; 2265 uint16_t ct_scsi_status; 2266 uint16_t ct_resplen; 2267 uint8_t ct_resp[MAXRESPLEN]; 2268 } m1; 2269 struct { 2270 uint32_t _reserved; 2271 uint16_t _reserved2; 2272 uint16_t _reserved3; 2273 uint32_t ct_datalen; 2274 ispds_t ct_fcp_rsp_iudata; 2275 } m2; 2276 } rsp; 2277 } ct2_entry_t; 2278 2279 typedef struct { 2280 isphdr_t ct_header; 2281 uint32_t ct_syshandle; 2282 uint16_t ct_iid; /* initiator id */ 2283 uint16_t ct_rxid; /* response ID */ 2284 uint16_t ct_flags; 2285 uint16_t ct_status; /* isp status */ 2286 uint16_t ct_timeout; 2287 uint16_t ct_seg_count; 2288 uint32_t ct_reloff; /* relative offset */ 2289 int32_t ct_resid; /* residual length */ 2290 union { 2291 struct { 2292 uint32_t _reserved; 2293 uint16_t _reserved2; 2294 uint16_t ct_scsi_status; 2295 uint32_t ct_xfrlen; 2296 union { 2297 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2298 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2299 ispdslist_t ct_dslist; 2300 } u; 2301 } m0; 2302 struct { 2303 uint16_t _reserved; 2304 uint16_t _reserved2; 2305 uint16_t ct_senselen; 2306 uint16_t ct_scsi_status; 2307 uint16_t ct_resplen; 2308 uint8_t ct_resp[MAXRESPLEN]; 2309 } m1; 2310 struct { 2311 uint32_t _reserved; 2312 uint16_t _reserved2; 2313 uint16_t _reserved3; 2314 uint32_t ct_datalen; 2315 ispds_t ct_fcp_rsp_iudata; 2316 } m2; 2317 } rsp; 2318 } ct2e_entry_t; 2319 2320 /* 2321 * ct_flags values for CTIO2 2322 */ 2323 #define CT2_FLAG_MODE0 0x0000 2324 #define CT2_FLAG_MODE1 0x0001 2325 #define CT2_FLAG_MODE2 0x0002 2326 #define CT2_FLAG_MMASK 0x0003 2327 #define CT2_DATA_IN 0x0040 2328 #define CT2_DATA_OUT 0x0080 2329 #define CT2_NO_DATA 0x00C0 2330 #define CT2_DATAMASK 0x00C0 2331 #define CT2_CCINCR 0x0100 2332 #define CT2_FASTPOST 0x0200 2333 #define CT2_CONFIRM 0x2000 2334 #define CT2_TERMINATE 0x4000 2335 #define CT2_SENDSTATUS 0x8000 2336 2337 /* 2338 * ct_status values are (mostly) the same as that for ct_entry. 2339 */ 2340 2341 /* 2342 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2343 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2344 * fields. 2345 */ 2346 #define CT2_RSPLEN_VALID 0x0100 2347 #define CT2_SNSLEN_VALID 0x0200 2348 #define CT2_DATA_OVER 0x0400 2349 #define CT2_DATA_UNDER 0x0800 2350 2351 /* 2352 * ISP24XX CTIO 2353 */ 2354 #define MAXRESPLEN_24XX 24 2355 typedef struct { 2356 isphdr_t ct_header; 2357 uint32_t ct_syshandle; 2358 uint16_t ct_nphdl; /* status on returned CTIOs */ 2359 uint16_t ct_timeout; 2360 uint16_t ct_seg_count; 2361 uint8_t ct_vpidx; 2362 uint8_t ct_xflags; 2363 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2364 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2365 uint8_t ct_reserved; 2366 uint32_t ct_rxid; 2367 uint16_t ct_senselen; /* mode 1 only */ 2368 uint16_t ct_flags; 2369 int32_t ct_resid; /* residual length */ 2370 uint16_t ct_oxid; 2371 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2372 union { 2373 struct { 2374 uint32_t reloff; 2375 uint32_t reserved0; 2376 uint32_t ct_xfrlen; 2377 uint32_t reserved1; 2378 ispds64_t ds; 2379 } m0; 2380 struct { 2381 uint16_t ct_resplen; 2382 uint16_t reserved; 2383 uint8_t ct_resp[MAXRESPLEN_24XX]; 2384 } m1; 2385 struct { 2386 uint32_t reserved0; 2387 uint32_t ct_datalen; 2388 uint32_t reserved1; 2389 ispds64_t ct_fcp_rsp_iudata; 2390 } m2; 2391 } rsp; 2392 } ct7_entry_t; 2393 2394 /* 2395 * ct_flags values for CTIO7 2396 */ 2397 #define CT7_DATA_IN 0x0002 2398 #define CT7_DATA_OUT 0x0001 2399 #define CT7_NO_DATA 0x0000 2400 #define CT7_DATAMASK 0x003 2401 #define CT7_DSD_ENABLE 0x0004 2402 #define CT7_CONF_STSFD 0x0010 2403 #define CT7_EXPLCT_CONF 0x0020 2404 #define CT7_FLAG_MODE0 0x0000 2405 #define CT7_FLAG_MODE1 0x0040 2406 #define CT7_FLAG_MODE2 0x0080 2407 #define CT7_FLAG_MMASK 0x00C0 2408 #define CT7_NOACK 0x0100 2409 #define CT7_TASK_ATTR_SHIFT 9 2410 #define CT7_CONFIRM 0x2000 2411 #define CT7_TERMINATE 0x4000 2412 #define CT7_SENDSTATUS 0x8000 2413 2414 /* 2415 * Type 7 CTIO status codes 2416 */ 2417 #define CT7_OK 0x01 /* completed without error */ 2418 #define CT7_ABORTED 0x02 /* aborted by host */ 2419 #define CT7_ERR 0x04 /* see sense data for error */ 2420 #define CT7_INVAL 0x06 /* request for disabled lun */ 2421 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2422 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2423 #define CT7_TIMEOUT 0x0B /* timed out */ 2424 #define CT7_RESET 0x0E /* LIP Rset Received */ 2425 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2426 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2427 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2428 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2429 #define CT7_LOGOUT 0x29 /* port logout */ 2430 #define CT7_PORTCHANGED 0x2A /* port changed */ 2431 #define CT7_SRR 0x45 /* SRR Received */ 2432 2433 /* 2434 * Other 24XX related target IOCBs 2435 */ 2436 2437 /* 2438 * ABTS Received 2439 */ 2440 typedef struct { 2441 isphdr_t abts_header; 2442 uint8_t abts_reserved0[6]; 2443 uint16_t abts_nphdl; 2444 uint16_t abts_reserved1; 2445 uint16_t abts_sof; 2446 uint32_t abts_rxid_abts; 2447 uint16_t abts_did_lo; 2448 uint8_t abts_did_hi; 2449 uint8_t abts_r_ctl; 2450 uint16_t abts_sid_lo; 2451 uint8_t abts_sid_hi; 2452 uint8_t abts_cs_ctl; 2453 uint16_t abts_fs_ctl; 2454 uint8_t abts_f_ctl; 2455 uint8_t abts_type; 2456 uint16_t abts_seq_cnt; 2457 uint8_t abts_df_ctl; 2458 uint8_t abts_seq_id; 2459 uint16_t abts_rx_id; 2460 uint16_t abts_ox_id; 2461 uint32_t abts_param; 2462 uint8_t abts_reserved2[16]; 2463 uint32_t abts_rxid_task; 2464 } abts_t; 2465 2466 typedef struct { 2467 isphdr_t abts_rsp_header; 2468 uint32_t abts_rsp_handle; 2469 uint16_t abts_rsp_status; 2470 uint16_t abts_rsp_nphdl; 2471 uint16_t abts_rsp_ctl_flags; 2472 uint16_t abts_rsp_sof; 2473 uint32_t abts_rsp_rxid_abts; 2474 uint16_t abts_rsp_did_lo; 2475 uint8_t abts_rsp_did_hi; 2476 uint8_t abts_rsp_r_ctl; 2477 uint16_t abts_rsp_sid_lo; 2478 uint8_t abts_rsp_sid_hi; 2479 uint8_t abts_rsp_cs_ctl; 2480 uint16_t abts_rsp_f_ctl_lo; 2481 uint8_t abts_rsp_f_ctl_hi; 2482 uint8_t abts_rsp_type; 2483 uint16_t abts_rsp_seq_cnt; 2484 uint8_t abts_rsp_df_ctl; 2485 uint8_t abts_rsp_seq_id; 2486 uint16_t abts_rsp_rx_id; 2487 uint16_t abts_rsp_ox_id; 2488 uint32_t abts_rsp_param; 2489 union { 2490 struct { 2491 uint16_t reserved; 2492 uint8_t last_seq_id; 2493 uint8_t seq_id_valid; 2494 uint16_t aborted_rx_id; 2495 uint16_t aborted_ox_id; 2496 uint16_t high_seq_cnt; 2497 uint16_t low_seq_cnt; 2498 uint8_t reserved2[4]; 2499 } ba_acc; 2500 struct { 2501 uint8_t vendor_unique; 2502 uint8_t explanation; 2503 uint8_t reason; 2504 uint8_t reserved; 2505 uint8_t reserved2[12]; 2506 } ba_rjt; 2507 struct { 2508 uint8_t reserved[8]; 2509 uint32_t subcode1; 2510 uint32_t subcode2; 2511 } rsp; 2512 uint8_t reserved[16]; 2513 } abts_rsp_payload; 2514 uint32_t abts_rsp_rxid_task; 2515 } abts_rsp_t; 2516 2517 /* terminate this ABTS exchange */ 2518 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2519 2520 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2521 #define ISP24XX_ABTS_RSP_RESET 0x04 2522 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2523 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2524 #define ISP24XX_ABTS_RSP_INVXID 0x08 2525 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2526 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2527 2528 #define ISP24XX_NO_TASK 0xffffffff 2529 2530 /* 2531 * Miscellaneous 2532 * 2533 * These are the limits of the number of dma segments we 2534 * can deal with based not on the size of the segment counter 2535 * (which is 16 bits), but on the size of the number of 2536 * queue entries field (which is 8 bits). We assume no 2537 * segments in the first queue entry, so we can either 2538 * have 7 dma segments per continuation entry or 5 2539 * (for 64 bit dma).. multiplying out by 254.... 2540 */ 2541 #define ISP_NSEG_MAX 1778 2542 #define ISP_NSEG64_MAX 1270 2543 2544 #endif /* _ISPMBOX_H */ 2545