1 /* $Id: ispmbox.h,v 1.11 1999/07/02 22:31:11 mjacob Exp $ */ 2 /* release_6_5_99 */ 3 /* 4 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 5 * 6 *--------------------------------------- 7 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob 8 * NASA/Ames Research Center 9 * All rights reserved. 10 *--------------------------------------- 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice immediately at the beginning of the file, without modification, 17 * this list of conditions, and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 */ 37 #ifndef _ISPMBOX_H 38 #define _ISPMBOX_H 39 40 /* 41 * Mailbox Command Opcodes 42 */ 43 44 #define MBOX_NO_OP 0x0000 45 #define MBOX_LOAD_RAM 0x0001 46 #define MBOX_EXEC_FIRMWARE 0x0002 47 #define MBOX_DUMP_RAM 0x0003 48 #define MBOX_WRITE_RAM_WORD 0x0004 49 #define MBOX_READ_RAM_WORD 0x0005 50 #define MBOX_MAILBOX_REG_TEST 0x0006 51 #define MBOX_VERIFY_CHECKSUM 0x0007 52 #define MBOX_ABOUT_FIRMWARE 0x0008 53 /* 9 */ 54 /* a */ 55 /* b */ 56 /* c */ 57 /* d */ 58 #define MBOX_CHECK_FIRMWARE 0x000e 59 /* f */ 60 #define MBOX_INIT_REQ_QUEUE 0x0010 61 #define MBOX_INIT_RES_QUEUE 0x0011 62 #define MBOX_EXECUTE_IOCB 0x0012 63 #define MBOX_WAKE_UP 0x0013 64 #define MBOX_STOP_FIRMWARE 0x0014 65 #define MBOX_ABORT 0x0015 66 #define MBOX_ABORT_DEVICE 0x0016 67 #define MBOX_ABORT_TARGET 0x0017 68 #define MBOX_BUS_RESET 0x0018 69 #define MBOX_STOP_QUEUE 0x0019 70 #define MBOX_START_QUEUE 0x001a 71 #define MBOX_SINGLE_STEP_QUEUE 0x001b 72 #define MBOX_ABORT_QUEUE 0x001c 73 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 74 /* 1e */ 75 #define MBOX_GET_FIRMWARE_STATUS 0x001f 76 #define MBOX_GET_INIT_SCSI_ID 0x0020 77 #define MBOX_GET_SELECT_TIMEOUT 0x0021 78 #define MBOX_GET_RETRY_COUNT 0x0022 79 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 80 #define MBOX_GET_CLOCK_RATE 0x0024 81 #define MBOX_GET_ACT_NEG_STATE 0x0025 82 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 83 #define MBOX_GET_SBUS_PARAMS 0x0027 84 #define MBOX_GET_TARGET_PARAMS 0x0028 85 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 86 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 87 /* 2b */ 88 /* 2c */ 89 /* 2d */ 90 /* 2e */ 91 /* 2f */ 92 #define MBOX_SET_INIT_SCSI_ID 0x0030 93 #define MBOX_SET_SELECT_TIMEOUT 0x0031 94 #define MBOX_SET_RETRY_COUNT 0x0032 95 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 96 #define MBOX_SET_CLOCK_RATE 0x0034 97 #define MBOX_SET_ACT_NEG_STATE 0x0035 98 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 99 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 100 #define MBOX_SET_PCI_PARAMETERS 0x0037 101 #define MBOX_SET_TARGET_PARAMS 0x0038 102 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 103 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 104 /* 3b */ 105 /* 3c */ 106 /* 3d */ 107 /* 3e */ 108 /* 3f */ 109 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 110 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 111 #define MBOX_EXEC_BIOS_IOCB 0x0042 112 #define MBOX_SET_FW_FEATURES 0x004a 113 #define MBOX_GET_FW_FEATURES 0x004b 114 #define FW_FEATURE_LVD_NOTIFY 0x2 115 #define FW_FEATURE_FAST_POST 0x1 116 117 /* These are for the ISP2100 FC cards */ 118 #define MBOX_GET_LOOP_ID 0x20 119 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54 120 #define MBOX_INIT_FIRMWARE 0x60 121 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61 122 #define MBOX_INIT_LIP 0x62 123 #define MBOX_GET_FC_AL_POSITION_MAP 0x63 124 #define MBOX_GET_PORT_DB 0x64 125 #define MBOX_CLEAR_ACA 0x65 126 #define MBOX_TARGET_RESET 0x66 127 #define MBOX_CLEAR_TASK_SET 0x67 128 #define MBOX_ABORT_TASK_SET 0x68 129 #define MBOX_GET_FW_STATE 0x69 130 #define MBOX_GET_PORT_NAME 0x6a 131 #define MBOX_GET_LINK_STATUS 0x6b 132 #define MBOX_INIT_LIP_RESET 0x6c 133 #define MBOX_SEND_SNS 0x6e 134 #define MBOX_FABRIC_LOGIN 0x6f 135 #define MBOX_SEND_CHANGE_REQUEST 0x70 136 #define MBOX_FABRIC_LOGOUT 0x71 137 #define MBOX_INIT_LIP_LOGIN 0x72 138 139 #define ISP2100_SET_PCI_PARAM 0x00ff 140 141 #define MBOX_BUSY 0x04 142 143 typedef struct { 144 u_int16_t param[8]; 145 } mbreg_t; 146 147 /* 148 * Mailbox Command Complete Status Codes 149 */ 150 #define MBOX_COMMAND_COMPLETE 0x4000 151 #define MBOX_INVALID_COMMAND 0x4001 152 #define MBOX_HOST_INTERFACE_ERROR 0x4002 153 #define MBOX_TEST_FAILED 0x4003 154 #define MBOX_COMMAND_ERROR 0x4005 155 #define MBOX_COMMAND_PARAM_ERROR 0x4006 156 157 /* 158 * Asynchronous event status codes 159 */ 160 #define ASYNC_BUS_RESET 0x8001 161 #define ASYNC_SYSTEM_ERROR 0x8002 162 #define ASYNC_RQS_XFER_ERR 0x8003 163 #define ASYNC_RSP_XFER_ERR 0x8004 164 #define ASYNC_QWAKEUP 0x8005 165 #define ASYNC_TIMEOUT_RESET 0x8006 166 #define ASYNC_DEVICE_RESET 0x8007 167 #define ASYNC_EXTMSG_UNDERRUN 0x800A 168 #define ASYNC_SCAM_INT 0x800B 169 #define ASYNC_HUNG_SCSI 0x800C 170 #define ASYNC_KILLED_BUS 0x800D 171 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 172 #define ASYNC_CMD_CMPLT 0x8020 173 #define ASYNC_CTIO_DONE 0x8021 174 175 /* for ISP2100 only */ 176 #define ASYNC_LIP_OCCURRED 0x8010 177 #define ASYNC_LOOP_UP 0x8011 178 #define ASYNC_LOOP_DOWN 0x8012 179 #define ASYNC_LOOP_RESET 0x8013 180 #define ASYNC_PDB_CHANGED 0x8014 181 #define ASYNC_CHANGE_NOTIFY 0x8015 182 183 /* 184 * Command Structure Definitions 185 */ 186 187 typedef struct { 188 u_int32_t ds_base; 189 u_int32_t ds_count; 190 } ispds_t; 191 192 #define _ISP_SWAP8(a, b) { \ 193 u_int8_t tmp; \ 194 tmp = a; \ 195 a = b; \ 196 b = tmp; \ 197 } 198 199 /* 200 * These elements get swizzled around for SBus instances. 201 */ 202 typedef struct { 203 u_int8_t rqs_entry_type; 204 u_int8_t rqs_entry_count; 205 u_int8_t rqs_seqno; 206 u_int8_t rqs_flags; 207 } isphdr_t; 208 /* 209 * There are no (for all intents and purposes) non-sparc SBus machines 210 */ 211 #ifdef __sparc__ 212 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 213 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 214 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 215 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 216 } 217 #else 218 #define ISP_SBUSIFY_ISPHDR(a, b) 219 #endif 220 221 /* RQS Flag definitions */ 222 #define RQSFLAG_CONTINUATION 0x01 223 #define RQSFLAG_FULL 0x02 224 #define RQSFLAG_BADHEADER 0x04 225 #define RQSFLAG_BADPACKET 0x08 226 227 /* RQS entry_type definitions */ 228 #define RQSTYPE_REQUEST 0x01 229 #define RQSTYPE_DATASEG 0x02 230 #define RQSTYPE_RESPONSE 0x03 231 #define RQSTYPE_MARKER 0x04 232 #define RQSTYPE_CMDONLY 0x05 233 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 234 #define RQSTYPE_CTIO0 0x07 /* Target Mode */ 235 #define RQSTYPE_SCAM 0x08 236 #define RQSTYPE_A64 0x09 237 #define RQSTYPE_A64_CONT 0x0a 238 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 239 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 240 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 241 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 242 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 243 #define RQSTYPE_STATUS_CONT 0x10 244 #define RQSTYPE_T2RQS 0x11 245 246 #define RQSTYPE_T4RQS 0x15 247 #define RQSTYPE_ATIO2 0x16 248 #define RQSTYPE_CTIO2 0x17 249 #define RQSTYPE_CSET0 0x18 250 #define RQSTYPE_T3RQS 0x19 251 252 #define RQSTYPE_CTIO3 0x1f 253 254 255 #define ISP_RQDSEG 4 256 typedef struct { 257 isphdr_t req_header; 258 u_int32_t req_handle; 259 u_int8_t req_lun_trn; 260 u_int8_t req_target; 261 u_int16_t req_cdblen; 262 #define req_modifier req_cdblen /* marker packet */ 263 u_int16_t req_flags; 264 u_int16_t req_reserved; 265 u_int16_t req_time; 266 u_int16_t req_seg_count; 267 u_int8_t req_cdb[12]; 268 ispds_t req_dataseg[ISP_RQDSEG]; 269 } ispreq_t; 270 271 /* 272 * A request packet can also be a marker packet. 273 */ 274 #define SYNC_DEVICE 0 275 #define SYNC_TARGET 1 276 #define SYNC_ALL 2 277 278 /* 279 * There are no (for all intents and purposes) non-sparc SBus machines 280 */ 281 #ifdef __sparc__ 282 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 283 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 284 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 285 } 286 #else 287 #define ISP_SBUSIFY_ISPREQ(a, b) 288 #endif 289 290 #define ISP_RQDSEG_T2 3 291 typedef struct { 292 isphdr_t req_header; 293 u_int32_t req_handle; 294 u_int8_t req_lun_trn; 295 u_int8_t req_target; 296 u_int16_t req_scclun; 297 u_int16_t req_flags; 298 u_int16_t _res2; 299 u_int16_t req_time; 300 u_int16_t req_seg_count; 301 u_int32_t req_cdb[4]; 302 u_int32_t req_totalcnt; 303 ispds_t req_dataseg[ISP_RQDSEG_T2]; 304 } ispreqt2_t; 305 306 /* req_flag values */ 307 #define REQFLAG_NODISCON 0x0001 308 #define REQFLAG_HTAG 0x0002 309 #define REQFLAG_OTAG 0x0004 310 #define REQFLAG_STAG 0x0008 311 #define REQFLAG_TARGET_RTN 0x0010 312 313 #define REQFLAG_NODATA 0x0000 314 #define REQFLAG_DATA_IN 0x0020 315 #define REQFLAG_DATA_OUT 0x0040 316 #define REQFLAG_DATA_UNKNOWN 0x0060 317 318 #define REQFLAG_DISARQ 0x0100 319 #define REQFLAG_FRC_ASYNC 0x0200 320 #define REQFLAG_FRC_SYNC 0x0400 321 #define REQFLAG_FRC_WIDE 0x0800 322 #define REQFLAG_NOPARITY 0x1000 323 #define REQFLAG_STOPQ 0x2000 324 #define REQFLAG_XTRASNS 0x4000 325 #define REQFLAG_PRIORITY 0x8000 326 327 typedef struct { 328 isphdr_t req_header; 329 u_int32_t req_handle; 330 u_int8_t req_lun_trn; 331 u_int8_t req_target; 332 u_int16_t req_cdblen; 333 u_int16_t req_flags; 334 u_int16_t _res1; 335 u_int16_t req_time; 336 u_int16_t req_seg_count; 337 u_int8_t req_cdb[44]; 338 } ispextreq_t; 339 340 #define ISP_CDSEG 7 341 typedef struct { 342 isphdr_t req_header; 343 u_int32_t _res1; 344 ispds_t req_dataseg[ISP_CDSEG]; 345 } ispcontreq_t; 346 347 typedef struct { 348 isphdr_t req_header; 349 u_int32_t req_handle; 350 u_int16_t req_scsi_status; 351 u_int16_t req_completion_status; 352 u_int16_t req_state_flags; 353 u_int16_t req_status_flags; 354 u_int16_t req_time; 355 u_int16_t req_sense_len; 356 u_int32_t req_resid; 357 u_int8_t _res1[8]; 358 u_int8_t req_sense_data[32]; 359 } ispstatusreq_t; 360 361 /* 362 * For Qlogic 2100, the high order byte of SCSI status has 363 * additional meaning. 364 */ 365 #define RQCS_RU 0x800 /* Residual Under */ 366 #define RQCS_RO 0x400 /* Residual Over */ 367 #define RQCS_SV 0x200 /* Sense Length Valid */ 368 #define RQCS_RV 0x100 /* Residual Valid */ 369 370 /* 371 * Completion Status Codes. 372 */ 373 #define RQCS_COMPLETE 0x0000 374 #define RQCS_INCOMPLETE 0x0001 375 #define RQCS_DMA_ERROR 0x0002 376 #define RQCS_TRANSPORT_ERROR 0x0003 377 #define RQCS_RESET_OCCURRED 0x0004 378 #define RQCS_ABORTED 0x0005 379 #define RQCS_TIMEOUT 0x0006 380 #define RQCS_DATA_OVERRUN 0x0007 381 #define RQCS_COMMAND_OVERRUN 0x0008 382 #define RQCS_STATUS_OVERRUN 0x0009 383 #define RQCS_BAD_MESSAGE 0x000a 384 #define RQCS_NO_MESSAGE_OUT 0x000b 385 #define RQCS_EXT_ID_FAILED 0x000c 386 #define RQCS_IDE_MSG_FAILED 0x000d 387 #define RQCS_ABORT_MSG_FAILED 0x000e 388 #define RQCS_REJECT_MSG_FAILED 0x000f 389 #define RQCS_NOP_MSG_FAILED 0x0010 390 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 391 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 392 #define RQCS_ID_MSG_FAILED 0x0013 393 #define RQCS_UNEXP_BUS_FREE 0x0014 394 #define RQCS_DATA_UNDERRUN 0x0015 395 #define RQCS_XACT_ERR1 0x0018 396 #define RQCS_XACT_ERR2 0x0019 397 #define RQCS_XACT_ERR3 0x001A 398 #define RQCS_BAD_ENTRY 0x001B 399 #define RQCS_QUEUE_FULL 0x001C 400 #define RQCS_PHASE_SKIPPED 0x001D 401 #define RQCS_ARQS_FAILED 0x001E 402 #define RQCS_WIDE_FAILED 0x001F 403 #define RQCS_SYNCXFER_FAILED 0x0020 404 #define RQCS_LVD_BUSERR 0x0021 405 406 /* 2100 Only Completion Codes */ 407 #define RQCS_PORT_UNAVAILABLE 0x0028 408 #define RQCS_PORT_LOGGED_OUT 0x0029 409 #define RQCS_PORT_CHANGED 0x002A 410 #define RQCS_PORT_BUSY 0x002B 411 412 /* 413 * State Flags (not applicable to 2100) 414 */ 415 #define RQSF_GOT_BUS 0x0100 416 #define RQSF_GOT_TARGET 0x0200 417 #define RQSF_SENT_CDB 0x0400 418 #define RQSF_XFRD_DATA 0x0800 419 #define RQSF_GOT_STATUS 0x1000 420 #define RQSF_GOT_SENSE 0x2000 421 #define RQSF_XFER_COMPLETE 0x4000 422 423 /* 424 * Status Flags (not applicable to 2100) 425 */ 426 #define RQSTF_DISCONNECT 0x0001 427 #define RQSTF_SYNCHRONOUS 0x0002 428 #define RQSTF_PARITY_ERROR 0x0004 429 #define RQSTF_BUS_RESET 0x0008 430 #define RQSTF_DEVICE_RESET 0x0010 431 #define RQSTF_ABORTED 0x0020 432 #define RQSTF_TIMEOUT 0x0040 433 #define RQSTF_NEGOTIATION 0x0080 434 435 /* 436 * FC (ISP2100) specific data structures 437 */ 438 439 /* 440 * Initialization Control Block 441 * 442 * Version One format. 443 */ 444 typedef struct { 445 u_int8_t icb_version; 446 u_int8_t _reserved0; 447 u_int16_t icb_fwoptions; 448 u_int16_t icb_maxfrmlen; 449 u_int16_t icb_maxalloc; 450 u_int16_t icb_execthrottle; 451 u_int8_t icb_retry_count; 452 u_int8_t icb_retry_delay; 453 u_int8_t icb_nodename[8]; 454 u_int16_t icb_hardaddr; 455 u_int8_t icb_iqdevtype; 456 u_int8_t _reserved1; 457 u_int8_t icb_portname[8]; 458 u_int16_t icb_rqstout; 459 u_int16_t icb_rspnsin; 460 u_int16_t icb_rqstqlen; 461 u_int16_t icb_rsltqlen; 462 u_int16_t icb_rqstaddr[4]; 463 u_int16_t icb_respaddr[4]; 464 } isp_icb_t; 465 #define ICB_VERSION1 1 466 467 #define ICBOPT_HARD_ADDRESS 0x0001 468 #define ICBOPT_FAIRNESS 0x0002 469 #define ICBOPT_FULL_DUPLEX 0x0004 470 #define ICBOPT_FAST_POST 0x0008 471 #define ICBOPT_TGT_ENABLE 0x0010 472 #define ICBOPT_INI_DISABLE 0x0020 473 #define ICBOPT_INI_ADISC 0x0040 474 #define ICBOPT_INI_TGTTYPE 0x0080 475 #define ICBOPT_PDBCHANGE_AE 0x0100 476 #define ICBOPT_NOLIP 0x0200 477 #define ICBOPT_SRCHDOWN 0x0400 478 #define ICBOPT_PREVLOOP 0x0800 479 #define ICBOPT_STOP_ON_QFULL 0x1000 480 #define ICBOPT_FULL_LOGIN 0x2000 481 #define ICBOPT_USE_PORTNAME 0x4000 482 483 484 #define ICB_MIN_FRMLEN 256 485 #define ICB_MAX_FRMLEN 2112 486 #define ICB_DFLT_FRMLEN 1024 487 #define ICB_DFLT_ALLOC 256 488 #define ICB_DFLT_THROTTLE 16 489 #define ICB_DFLT_RDELAY 5 490 #define ICB_DFLT_RCOUNT 3 491 492 493 #define RQRSP_ADDR0015 0 494 #define RQRSP_ADDR1631 1 495 #define RQRSP_ADDR3247 2 496 #define RQRSP_ADDR4863 3 497 498 499 #define ICB_NNM0 7 500 #define ICB_NNM1 6 501 #define ICB_NNM2 5 502 #define ICB_NNM3 4 503 #define ICB_NNM4 3 504 #define ICB_NNM5 2 505 #define ICB_NNM6 1 506 #define ICB_NNM7 0 507 508 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 509 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 510 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 511 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 512 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 513 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 514 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 515 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 516 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 517 518 /* 519 * Port Data Base Element 520 */ 521 522 typedef struct { 523 u_int16_t pdb_options; 524 u_int8_t pdb_mstate; 525 u_int8_t pdb_sstate; 526 #define BITS2WORD(x) (x)[0] << 16 | (x)[3] << 8 | (x)[2] 527 u_int8_t pdb_hardaddr_bits[4]; 528 u_int8_t pdb_portid_bits[4]; 529 u_int8_t pdb_nodename[8]; 530 u_int8_t pdb_portname[8]; 531 u_int16_t pdb_execthrottle; 532 u_int16_t pdb_exec_count; 533 u_int8_t pdb_retry_count; 534 u_int8_t pdb_retry_delay; 535 u_int16_t pdb_resalloc; 536 u_int16_t pdb_curalloc; 537 u_int16_t pdb_qhead; 538 u_int16_t pdb_qtail; 539 u_int16_t pdb_tl_next; 540 u_int16_t pdb_tl_last; 541 u_int16_t pdb_features; /* PLOGI, Common Service */ 542 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 543 u_int16_t pdb_roi; /* PLOGI, Common Service */ 544 u_int8_t pdb_target; 545 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 546 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 547 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 548 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 549 u_int16_t pdb_labrtflg; 550 u_int16_t pdb_lstopflg; 551 u_int16_t pdb_sqhead; 552 u_int16_t pdb_sqtail; 553 u_int16_t pdb_ptimer; 554 u_int16_t pdb_nxt_seqid; 555 u_int16_t pdb_fcount; 556 u_int16_t pdb_prli_len; 557 u_int16_t pdb_prli_svc0; 558 u_int16_t pdb_prli_svc3; 559 u_int16_t pdb_loopid; 560 u_int16_t pdb_il_ptr; 561 u_int16_t pdb_sl_ptr; 562 } isp_pdb_t; 563 564 #define PDB_OPTIONS_XMITTING (1<<11) 565 #define PDB_OPTIONS_LNKXMIT (1<<10) 566 #define PDB_OPTIONS_ABORTED (1<<9) 567 #define PDB_OPTIONS_ADISC (1<<1) 568 569 #define PDB_STATE_DISCOVERY 0 570 #define PDB_STATE_WDISC_ACK 1 571 #define PDB_STATE_PLOGI 2 572 #define PDB_STATE_PLOGI_ACK 3 573 #define PDB_STATE_PRLI 4 574 #define PDB_STATE_PRLI_ACK 5 575 #define PDB_STATE_LOGGED_IN 6 576 #define PDB_STATE_PORT_UNAVAIL 7 577 #define PDB_STATE_PRLO 8 578 #define PDB_STATE_PRLO_ACK 9 579 #define PDB_STATE_PLOGO 10 580 #define PDB_STATE_PLOG_ACK 11 581 582 #define SVC3_TGT_ROLE 0x10 583 #define SVC3_INI_ROLE 0x20 584 #define SVC3_ROLE_MASK 0x30 585 #define SVC3_ROLE_SHIFT 4 586 587 #define SNS_GAN 0x100 588 #define SNS_GP3 0x171 589 typedef struct { 590 u_int16_t snscb_rblen; /* response buffer length (words) */ 591 u_int16_t snscb_res0; 592 u_int16_t snscb_addr[4]; /* response buffer address */ 593 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 594 u_int16_t snscb_res1; 595 u_int16_t snscb_data[1]; /* variable data */ 596 } sns_screq_t; /* Subcommand Request Structure */ 597 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 598 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 599 600 typedef struct { 601 u_int8_t snscb_cthdr[16]; 602 u_int8_t snscb_port_type; 603 u_int8_t snscb_port_id[3]; 604 u_int8_t snscb_portname[8]; 605 u_int16_t snscb_data[1]; /* variable data */ 606 } sns_scrsp_t; /* Subcommand Response Structure */ 607 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 608 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 609 610 /* 611 * Target Mode Structures 612 */ 613 #define TGTSVALID 0x80 /* scsi status & sense data valid */ 614 #define SUGGSENSELEN 18 615 616 /* 617 * Structure for Enable Lun and Modify Lun queue entries 618 */ 619 typedef struct { 620 isphdr_t le_header; 621 u_int32_t le_reserved2; 622 u_int8_t le_lun; 623 u_int8_t le_rsvd; 624 u_int8_t le_ops; /* Modify LUN only */ 625 u_int8_t le_tgt; /* Not for FC */ 626 u_int32_t le_flags; /* Not for FC */ 627 u_int8_t le_status; 628 u_int8_t le_rsvd2; 629 u_int8_t le_cmd_count; 630 u_int8_t le_in_count; 631 u_int8_t le_cdb6len; /* Not for FC */ 632 u_int8_t le_cdb7len; /* Not for FC */ 633 u_int16_t le_timeout; 634 u_int16_t le_reserved[20]; 635 } lun_entry_t; 636 637 /* 638 * le_flags values 639 */ 640 #define LUN_TQAE 0x00000001 /* Tagged Queue Action Enable */ 641 #define LUN_DSSM 0x01000000 /* Disable Sending SDP Message */ 642 #define LUN_DM 0x40000000 /* Disconnects Mandatory */ 643 644 /* 645 * le_ops values 646 */ 647 #define LUN_CCINCR 0x01 /* increment command count */ 648 #define LUN_CCDECR 0x02 /* decrement command count */ 649 #define LUN_ININCR 0x40 /* increment immed. notify count */ 650 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 651 652 /* 653 * le_status values 654 */ 655 #define LUN_ERR 0x04 /* request completed with error */ 656 #define LUN_INVAL 0x06 /* invalid request */ 657 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 658 #define LUN_ENABLED 0x3E /* LUN already enabled */ 659 660 /* 661 * Immediate Notify Entry structure 662 */ 663 #define IN_MSGLEN 8 /* 8 bytes */ 664 #define IN_RSVDLEN 8 /* 8 words */ 665 typedef struct { 666 isphdr_t in_header; 667 u_int32_t in_reserved2; 668 u_int8_t in_lun; /* lun */ 669 u_int8_t in_iid; /* initiator */ 670 u_int8_t in_rsvd; 671 u_int8_t in_tgt; /* target */ 672 u_int32_t in_flags; 673 u_int8_t in_status; 674 u_int8_t in_rsvd2; 675 u_int8_t in_tag_val; /* tag value */ 676 u_int8_t in_tag_type; /* tag type */ 677 u_int16_t in_seqid; /* sequence id */ 678 u_int8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 679 u_int16_t in_reserved[IN_RSVDLEN]; 680 u_int8_t in_sense[SUGGSENSELEN]; /* suggested sense data */ 681 } in_entry_t; 682 683 typedef struct { 684 isphdr_t in_header; 685 u_int32_t in_reserved2; 686 u_int8_t in_lun; /* lun */ 687 u_int8_t in_iid; /* initiator */ 688 u_int16_t in_rsvd; 689 u_int32_t in_rsvd2; 690 u_int16_t in_status; 691 u_int16_t in_task_flags; 692 u_int16_t in_seqid; /* sequence id */ 693 } in_fcentry_t; 694 695 /* 696 * Values for the in_status field 697 */ 698 #define IN_NO_RCAP 0x16 /* requested capability not available */ 699 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 700 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 701 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 702 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 703 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 704 705 /* 706 * Notify Acknowledge Entry structure 707 */ 708 #define NA_RSVDLEN 22 709 typedef struct { 710 isphdr_t na_header; 711 u_int32_t na_reserved2; 712 u_int8_t na_lun; /* lun */ 713 u_int8_t na_iid; /* initiator */ 714 u_int8_t na_rsvd; 715 u_int8_t na_tgt; /* target */ 716 u_int32_t na_flags; 717 u_int8_t na_status; 718 u_int8_t na_event; 719 u_int16_t na_seqid; /* sequence id */ 720 u_int16_t na_reserved[NA_RSVDLEN]; 721 } na_entry_t; 722 723 /* 724 * Value for the na_event field 725 */ 726 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 727 728 #define NA2_RSVDLEN 21 729 typedef struct { 730 isphdr_t na_header; 731 u_int32_t na_reserved2; 732 u_int8_t na_lun; /* lun */ 733 u_int8_t na_iid; /* initiator */ 734 u_int16_t na_rsvd; 735 u_int16_t na_flags; 736 u_int16_t na_rsvd2; 737 u_int16_t na_status; 738 u_int16_t na_task_flags; 739 u_int16_t na_seqid; /* sequence id */ 740 u_int16_t na_reserved[NA2_RSVDLEN]; 741 } na_fcentry_t; 742 #define NAFC_RST_CLRD 0x40 743 744 /* 745 * Value for the na_event field 746 */ 747 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 748 /* 749 * Accept Target I/O Entry structure 750 */ 751 #define ATIO_CDBLEN 26 752 753 typedef struct { 754 isphdr_t at_header; 755 u_int32_t at_reserved2; 756 u_int8_t at_lun; /* lun */ 757 u_int8_t at_iid; /* initiator */ 758 u_int8_t at_cdblen; /* cdb length */ 759 u_int8_t at_tgt; /* target */ 760 u_int32_t at_flags; 761 u_int8_t at_status; /* firmware status */ 762 u_int8_t at_scsi_status; /* scsi status */ 763 u_int8_t at_tag_val; /* tag value */ 764 u_int8_t at_tag_type; /* tag type */ 765 u_int8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 766 u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 767 } at_entry_t; 768 769 /* 770 * at_flags values 771 */ 772 #define AT_NODISC 0x00008000 /* disconnect disabled */ 773 #define AT_TQAE 0x00000001 /* Tagged Queue Action enabled */ 774 775 /* 776 * at_status values 777 */ 778 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 779 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 780 #define AT_NOCAP 0x16 /* Requested capability not available */ 781 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 782 #define AT_CDB 0x3D /* CDB received */ 783 784 /* 785 * Accept Target I/O Entry structure, Type 2 786 */ 787 #define ATIO2_CDBLEN 16 788 789 typedef struct { 790 isphdr_t at_header; 791 u_int32_t at_reserved2; 792 u_int8_t at_lun; /* lun */ 793 u_int8_t at_iid; /* initiator */ 794 u_int16_t at_rxid; /* response ID */ 795 u_int16_t at_flags; 796 u_int16_t at_status; /* firmware status */ 797 u_int8_t at_reserved1; 798 u_int8_t at_taskcodes; 799 u_int8_t at_taskflags; 800 u_int8_t at_execodes; 801 u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 802 u_int32_t at_datalen; /* allocated data len */ 803 u_int16_t at_scclun; 804 u_int16_t at_reserved3; 805 u_int16_t at_scsi_status; 806 u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 807 } at2_entry_t; 808 809 #define ATIO2_TC_ATTR_MASK 0x7 810 #define ATIO2_TC_ATTR_SIMPLEQ 0 811 #define ATIO2_TC_ATTR_HEADOFQ 1 812 #define ATIO2_TC_ATTR_ORDERED 2 813 #define ATIO2_TC_ATTR_ACAQ 4 814 #define ATIO2_TC_ATTR_UNTAGGED 5 815 #define TC2TT(code) \ 816 (((code) == ATIO2_TC_ATTR_SIMPLEQ)? 0x20 : \ 817 (((code) == ATIO2_TC_ATTR_HEADOFQ)? 0x21 : \ 818 (((code) == ATIO2_TC_ATTR_ORDERED)? 0x22 : \ 819 (((code) == ATIO2_TC_ATTR_ACAQ)? 0x24 : 0)))) 820 821 822 /* 823 * Continue Target I/O Entry structure 824 * Request from driver. The response from the 825 * ISP firmware is the same except that the last 18 826 * bytes are overwritten by suggested sense data if 827 * the 'autosense valid' bit is set in the status byte. 828 */ 829 typedef struct { 830 isphdr_t ct_header; 831 u_int32_t ct_reserved; 832 u_int8_t ct_lun; /* lun */ 833 u_int8_t ct_iid; /* initiator id */ 834 u_int8_t ct_rsvd; 835 u_int8_t ct_tgt; /* our target id */ 836 u_int32_t ct_flags; 837 u_int8_t ct_status; /* isp status */ 838 u_int8_t ct_scsi_status; /* scsi status */ 839 u_int8_t ct_tag_val; /* tag value */ 840 u_int8_t ct_tag_type; /* tag type */ 841 u_int32_t ct_xfrlen; /* transfer length */ 842 u_int32_t ct_resid; /* residual length */ 843 u_int16_t ct_timeout; 844 u_int16_t ct_seg_count; 845 ispds_t ct_dataseg[ISP_RQDSEG]; 846 } ct_entry_t; 847 848 /* 849 * ct_flags values 850 */ 851 #define CT_TQAE 0x00000001 /* Tagged Queue Action enable */ 852 #define CT_DATA_IN 0x00000040 /* Data direction */ 853 #define CT_DATA_OUT 0x00000080 /* Data direction */ 854 #define CT_NO_DATA 0x000000C0 /* Data direction */ 855 #define CT_DATAMASK 0x000000C0 /* Data direction */ 856 #define CT_NODISC 0x00008000 /* Disconnects disabled */ 857 #define CT_DSDP 0x01000000 /* Disable Save Data Pointers */ 858 #define CT_SENDRDP 0x04000000 /* Send Restore Pointers msg */ 859 #define CT_SENDSTATUS 0x80000000 /* Send SCSI status byte */ 860 861 /* 862 * ct_status values 863 * - set by the firmware when it returns the CTIO 864 */ 865 #define CT_OK 0x01 /* completed without error */ 866 #define CT_ABORTED 0x02 /* aborted by host */ 867 #define CT_ERR 0x04 /* see sense data for error */ 868 #define CT_INVAL 0x06 /* request for disabled lun */ 869 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 870 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 871 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 872 #define CT_TIMEOUT 0x0B /* timed out */ 873 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 874 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 875 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 876 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 877 #define CT_LOGOUT 0x29 /* port logout not acknowledged yet */ 878 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 879 880 /* 881 * When the firmware returns a CTIO entry, it may overwrite the last 882 * part of the structure with sense data. This starts at offset 0x2E 883 * into the entry, which is in the middle of ct_dataseg[1]. Rather 884 * than define a new struct for this, I'm just using the sense data 885 * offset. 886 */ 887 #define CTIO_SENSE_OFFSET 0x2E 888 889 /* 890 * Entry length in u_longs. All entries are the same size so 891 * any one will do as the numerator. 892 */ 893 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(u_int32_t)) 894 895 /* 896 * QLA2100 CTIO (type 2) entry 897 */ 898 #define MAXRESPLEN 26 899 typedef struct { 900 isphdr_t ct_header; 901 u_int32_t ct_reserved; 902 u_int8_t ct_lun; /* lun */ 903 u_int8_t ct_iid; /* initiator id */ 904 u_int16_t ct_rxid; /* response ID */ 905 u_int16_t ct_flags; 906 u_int16_t ct_status; /* isp status */ 907 u_int16_t ct_timeout; 908 u_int16_t ct_seg_count; 909 u_int32_t ct_reloff; /* relative offset */ 910 u_int32_t ct_resid; /* residual length */ 911 union { 912 /* 913 * The three different modes that the target driver 914 * can set the CTIO2 up as. 915 * 916 * The first is for sending FCP_DATA_IUs as well as 917 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 918 * 919 * The second is for sending SCSI sense data in an FCP_RSP_IU. 920 * Note that no FCP_DATA_IUs will be sent. 921 * 922 * The third is for sending FCP_RSP_IUs as built specifically 923 * in system memory as located by the isp_dataseg. 924 */ 925 struct { 926 u_int32_t _reserved; 927 u_int16_t _reserved2; 928 u_int16_t ct_scsi_status; 929 u_int32_t ct_xfrlen; 930 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 931 } m0; 932 struct { 933 u_int16_t _reserved; 934 u_int16_t _reserved2; 935 u_int16_t ct_senselen; 936 u_int16_t ct_scsi_status; 937 u_int16_t ct_resplen; 938 u_int8_t ct_resp[MAXRESPLEN]; 939 } m1; 940 struct { 941 u_int32_t _reserved; 942 u_int16_t _reserved2; 943 u_int16_t _reserved3; 944 u_int32_t ct_datalen; 945 ispds_t ct_fcp_rsp_iudata; 946 } m2; 947 /* 948 * CTIO2 returned from F/W... 949 */ 950 struct { 951 u_int32_t _reserved[4]; 952 u_int16_t ct_scsi_status; 953 u_int8_t ct_sense[SUGGSENSELEN]; 954 } fw; 955 } rsp; 956 } ct2_entry_t; 957 /* 958 * ct_flags values for CTIO2 959 */ 960 #define CT2_FLAG_MMASK 0x0003 961 #define CT2_FLAG_MODE0 0x0000 962 #define CT2_FLAG_MODE1 0x0001 963 #define CT2_FLAG_MODE2 0x0002 964 #define CT2_DATA_IN CT_DATA_IN 965 #define CT2_DATA_OUT CT_DATA_OUT 966 #define CT2_NO_DATA CT_NO_DATA 967 #define CT2_DATAMASK CT_DATA_MASK 968 #define CT2_CCINCR 0x0100 969 #define CT2_FASTPOST 0x0200 970 #define CT2_SENDSTATUS 0x8000 971 972 /* 973 * ct_status values are (mostly) the same as that for ct_entry. 974 */ 975 976 /* 977 * ct_scsi_status values- the low 8 bits are the normal SCSI status 978 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 979 * fields. 980 */ 981 #define CT2_RSPLEN_VALID 0x0100 982 #define CT2_SNSLEN_VALID 0x0200 983 #define CT2_DATA_OVER 0x0400 984 #define CT2_DATA_UNDER 0x0800 985 986 #endif /* _ISPMBOX_H */ 987