1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33 #ifndef _ISPMBOX_H 34 #define _ISPMBOX_H 35 36 /* 37 * Mailbox Command Opcodes 38 */ 39 #define MBOX_NO_OP 0x0000 40 #define MBOX_LOAD_RAM 0x0001 41 #define MBOX_EXEC_FIRMWARE 0x0002 42 #define MBOX_DUMP_RAM 0x0003 43 #define MBOX_WRITE_RAM_WORD 0x0004 44 #define MBOX_READ_RAM_WORD 0x0005 45 #define MBOX_MAILBOX_REG_TEST 0x0006 46 #define MBOX_VERIFY_CHECKSUM 0x0007 47 #define MBOX_ABOUT_FIRMWARE 0x0008 48 #define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50 #define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53 #define MBOX_CHECK_FIRMWARE 0x000e 54 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55 #define MBOX_INIT_REQ_QUEUE 0x0010 56 #define MBOX_INIT_RES_QUEUE 0x0011 57 #define MBOX_EXECUTE_IOCB 0x0012 58 #define MBOX_WAKE_UP 0x0013 59 #define MBOX_STOP_FIRMWARE 0x0014 60 #define MBOX_ABORT 0x0015 61 #define MBOX_ABORT_DEVICE 0x0016 62 #define MBOX_ABORT_TARGET 0x0017 63 #define MBOX_BUS_RESET 0x0018 64 #define MBOX_STOP_QUEUE 0x0019 65 #define MBOX_START_QUEUE 0x001a 66 #define MBOX_SINGLE_STEP_QUEUE 0x001b 67 #define MBOX_ABORT_QUEUE 0x001c 68 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70 #define MBOX_GET_FIRMWARE_STATUS 0x001f 71 #define MBOX_GET_INIT_SCSI_ID 0x0020 72 #define MBOX_GET_SELECT_TIMEOUT 0x0021 73 #define MBOX_GET_RETRY_COUNT 0x0022 74 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 75 #define MBOX_GET_CLOCK_RATE 0x0024 76 #define MBOX_GET_ACT_NEG_STATE 0x0025 77 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78 #define MBOX_GET_SBUS_PARAMS 0x0027 79 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80 #define MBOX_GET_TARGET_PARAMS 0x0028 81 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88 #define MBOX_SET_INIT_SCSI_ID 0x0030 89 #define MBOX_SET_SELECT_TIMEOUT 0x0031 90 #define MBOX_SET_RETRY_COUNT 0x0032 91 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 92 #define MBOX_SET_CLOCK_RATE 0x0034 93 #define MBOX_SET_ACT_NEG_STATE 0x0035 94 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96 #define MBOX_SET_PCI_PARAMETERS 0x0037 97 #define MBOX_SET_TARGET_PARAMS 0x0038 98 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107 #define MBOX_EXEC_BIOS_IOCB 0x0042 108 #define MBOX_SET_FW_FEATURES 0x004a 109 #define MBOX_GET_FW_FEATURES 0x004b 110 #define FW_FEATURE_FAST_POST 0x1 111 #define FW_FEATURE_LVD_NOTIFY 0x2 112 #define FW_FEATURE_RIO_32BIT 0x4 113 #define FW_FEATURE_RIO_16BIT 0x8 114 115 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 116 #define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118 #define MBOX_ENABLE_TARGET_MODE 0x0055 119 #define ENABLE_TARGET_FLAG 0x8000 120 #define ENABLE_TQING_FLAG 0x0004 121 #define ENABLE_MANDATORY_DISC 0x0002 122 #define MBOX_GET_TARGET_STATUS 0x0056 123 124 /* These are for the ISP2X00 FC cards */ 125 #define MBOX_GET_LOOP_ID 0x0020 126 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127 #define ISP24XX_INORDER 0x0100 128 #define ISP24XX_NPIV_SAN 0x0400 129 #define ISP24XX_VSAN_SAN 0x1000 130 #define ISP24XX_FC_SP_SAN 0x2000 131 132 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134 #define MBOX_GET_RESOURCE_COUNT 0x0042 135 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 136 #define MBOX_ENHANCED_GET_PDB 0x0047 137 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141 #define MBOX_INIT_FIRMWARE 0x0060 142 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143 #define MBOX_INIT_LIP 0x0062 144 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145 #define MBOX_GET_PORT_DB 0x0064 146 #define MBOX_CLEAR_ACA 0x0065 147 #define MBOX_TARGET_RESET 0x0066 148 #define MBOX_CLEAR_TASK_SET 0x0067 149 #define MBOX_ABORT_TASK_SET 0x0068 150 #define MBOX_GET_FW_STATE 0x0069 151 #define MBOX_GET_PORT_NAME 0x006A 152 #define MBOX_GET_LINK_STATUS 0x006B 153 #define MBOX_INIT_LIP_RESET 0x006C 154 #define MBOX_SEND_SNS 0x006E 155 #define MBOX_FABRIC_LOGIN 0x006F 156 #define MBOX_SEND_CHANGE_REQUEST 0x0070 157 #define MBOX_FABRIC_LOGOUT 0x0071 158 #define MBOX_INIT_LIP_LOGIN 0x0072 159 #define MBOX_GET_PORT_NODE_NAME_LIST 0x0075 160 #define MBOX_GET_ID_LIST 0x007C 161 #define MBOX_LUN_RESET 0x007E 162 163 #define MBOX_DRIVER_HEARTBEAT 0x005B 164 #define MBOX_FW_HEARTBEAT 0x005C 165 166 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 167 #define MBGSD_GET_RATE 0 168 #define MBGSD_SET_RATE 1 169 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 170 #define MBGSD_ONEGB 0 171 #define MBGSD_TWOGB 1 172 #define MBGSD_AUTO 2 173 #define MBGSD_FOURGB 3 /* 24XX only */ 174 #define MBGSD_EIGHTGB 4 /* 25XX only */ 175 176 177 #define ISP2100_SET_PCI_PARAM 0x00ff 178 179 #define MBOX_BUSY 0x04 180 181 /* 182 * Mailbox Command Complete Status Codes 183 */ 184 #define MBOX_COMMAND_COMPLETE 0x4000 185 #define MBOX_INVALID_COMMAND 0x4001 186 #define MBOX_HOST_INTERFACE_ERROR 0x4002 187 #define MBOX_TEST_FAILED 0x4003 188 #define MBOX_COMMAND_ERROR 0x4005 189 #define MBOX_COMMAND_PARAM_ERROR 0x4006 190 #define MBOX_PORT_ID_USED 0x4007 191 #define MBOX_LOOP_ID_USED 0x4008 192 #define MBOX_ALL_IDS_USED 0x4009 193 #define MBOX_NOT_LOGGED_IN 0x400A 194 #define MBOX_LINK_DOWN_ERROR 0x400B 195 #define MBOX_LOOPBACK_ERROR 0x400C 196 #define MBOX_CHECKSUM_ERROR 0x4010 197 #define MBOX_INVALID_PRODUCT_KEY 0x4020 198 /* pseudo mailbox completion codes */ 199 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 200 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 201 202 #define MBLOGALL 0xffffffff 203 #define MBLOGNONE 0x00000000 204 #define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f)) 205 206 /* 207 * Asynchronous event status codes 208 */ 209 #define ASYNC_BUS_RESET 0x8001 210 #define ASYNC_SYSTEM_ERROR 0x8002 211 #define ASYNC_RQS_XFER_ERR 0x8003 212 #define ASYNC_RSP_XFER_ERR 0x8004 213 #define ASYNC_QWAKEUP 0x8005 214 #define ASYNC_TIMEOUT_RESET 0x8006 215 #define ASYNC_DEVICE_RESET 0x8007 216 #define ASYNC_EXTMSG_UNDERRUN 0x800A 217 #define ASYNC_SCAM_INT 0x800B 218 #define ASYNC_HUNG_SCSI 0x800C 219 #define ASYNC_KILLED_BUS 0x800D 220 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 221 #define ASYNC_LIP_OCCURRED 0x8010 222 #define ASYNC_LOOP_UP 0x8011 223 #define ASYNC_LOOP_DOWN 0x8012 224 #define ASYNC_LOOP_RESET 0x8013 225 #define ASYNC_PDB_CHANGED 0x8014 226 #define ASYNC_CHANGE_NOTIFY 0x8015 227 #define ASYNC_LIP_F8 0x8016 228 #define ASYNC_LIP_ERROR 0x8017 229 #define ASYNC_SECURITY_UPDATE 0x801B 230 #define ASYNC_CMD_CMPLT 0x8020 231 #define ASYNC_CTIO_DONE 0x8021 232 #define ASYNC_RIO32_1 0x8021 233 #define ASYNC_RIO32_2 0x8022 234 #define ASYNC_IP_XMIT_DONE 0x8022 235 #define ASYNC_IP_RECV_DONE 0x8023 236 #define ASYNC_IP_BROADCAST 0x8024 237 #define ASYNC_IP_RCVQ_LOW 0x8025 238 #define ASYNC_IP_RCVQ_EMPTY 0x8026 239 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 240 #define ASYNC_PTPMODE 0x8030 241 #define ASYNC_RIO16_1 0x8031 242 #define ASYNC_RIO16_2 0x8032 243 #define ASYNC_RIO16_3 0x8033 244 #define ASYNC_RIO16_4 0x8034 245 #define ASYNC_RIO16_5 0x8035 246 #define ASYNC_CONNMODE 0x8036 247 #define ISP_CONN_LOOP 1 248 #define ISP_CONN_PTP 2 249 #define ISP_CONN_BADLIP 3 250 #define ISP_CONN_FATAL 4 251 #define ISP_CONN_LOOPBACK 5 252 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 253 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 254 #define ASYNC_RCV_ERR 0x8048 255 256 /* 257 * Firmware Options. There are a lot of them. 258 * 259 * IFCOPTN - ISP Fibre Channel Option Word N 260 */ 261 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 262 #define IFCOPT1_EAABSRCVD (1 << 12) 263 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 264 #define IFCOPT1_ENAPURE (1 << 10) 265 #define IFCOPT1_ENA8017 (1 << 7) 266 #define IFCOPT1_DISGPIO67 (1 << 6) 267 #define IFCOPT1_LIPLOSSIMM (1 << 5) 268 #define IFCOPT1_DISF7SWTCH (1 << 4) 269 #define IFCOPT1_CTIO_RETRY (1 << 3) 270 #define IFCOPT1_LIPASYNC (1 << 1) 271 #define IFCOPT1_LIPF8 (1 << 0) 272 273 #define IFCOPT2_LOOPBACK (1 << 1) 274 #define IFCOPT2_ATIO3_ONLY (1 << 0) 275 276 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 277 #define IFCOPT3_RNDASYNC (1 << 1) 278 /* 279 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 280 * mailbox command to enable this. 281 */ 282 #define ASYNC_QFULL_SENT 0x8049 283 284 /* 285 * Needs to be enabled 286 */ 287 #define ASYNC_AUTO_PLOGI_RJT 0x8018 288 /* 289 * 24XX only 290 */ 291 #define ASYNC_RJT_SENT 0x8049 292 293 /* 294 * All IOCB Queue entries are this size 295 */ 296 #define QENTRY_LEN 64 297 298 /* 299 * Command Structure Definitions 300 */ 301 302 typedef struct { 303 uint32_t ds_base; 304 uint32_t ds_count; 305 } ispds_t; 306 307 typedef struct { 308 uint32_t ds_base; 309 uint32_t ds_basehi; 310 uint32_t ds_count; 311 } ispds64_t; 312 313 #define DSTYPE_32BIT 0 314 #define DSTYPE_64BIT 1 315 typedef struct { 316 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 317 uint32_t ds_segment; /* unused */ 318 uint32_t ds_base; /* 32 bit address of DSD list */ 319 } ispdslist_t; 320 321 322 typedef struct { 323 uint8_t rqs_entry_type; 324 uint8_t rqs_entry_count; 325 uint8_t rqs_seqno; 326 uint8_t rqs_flags; 327 } isphdr_t; 328 329 /* RQS Flag definitions */ 330 #define RQSFLAG_CONTINUATION 0x01 331 #define RQSFLAG_FULL 0x02 332 #define RQSFLAG_BADHEADER 0x04 333 #define RQSFLAG_BADPACKET 0x08 334 #define RQSFLAG_BADCOUNT 0x10 335 #define RQSFLAG_BADORDER 0x20 336 #define RQSFLAG_MASK 0x3f 337 338 /* RQS entry_type definitions */ 339 #define RQSTYPE_REQUEST 0x01 340 #define RQSTYPE_DATASEG 0x02 341 #define RQSTYPE_RESPONSE 0x03 342 #define RQSTYPE_MARKER 0x04 343 #define RQSTYPE_CMDONLY 0x05 344 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 345 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 346 #define RQSTYPE_SCAM 0x08 347 #define RQSTYPE_A64 0x09 348 #define RQSTYPE_A64_CONT 0x0a 349 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 350 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 351 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 352 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 353 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 354 #define RQSTYPE_STATUS_CONT 0x10 355 #define RQSTYPE_T2RQS 0x11 356 #define RQSTYPE_CTIO7 0x12 357 #define RQSTYPE_IP_XMIT 0x13 358 #define RQSTYPE_TSK_MGMT 0x14 359 #define RQSTYPE_T4RQS 0x15 360 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 361 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 362 #define RQSTYPE_T7RQS 0x18 363 #define RQSTYPE_T3RQS 0x19 364 #define RQSTYPE_IP_XMIT_64 0x1b 365 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 366 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 367 #define RQSTYPE_RIO1 0x21 368 #define RQSTYPE_RIO2 0x22 369 #define RQSTYPE_IP_RECV 0x23 370 #define RQSTYPE_IP_RECV_CONT 0x24 371 #define RQSTYPE_CT_PASSTHRU 0x29 372 #define RQSTYPE_MS_PASSTHRU 0x29 373 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 374 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 375 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 376 #define RQSTYPE_ABORT_IO 0x33 377 #define RQSTYPE_T6RQS 0x48 378 #define RQSTYPE_LOGIN 0x52 379 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 380 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 381 382 383 #define ISP_RQDSEG 4 384 typedef struct { 385 isphdr_t req_header; 386 uint32_t req_handle; 387 uint8_t req_lun_trn; 388 uint8_t req_target; 389 uint16_t req_cdblen; 390 uint16_t req_flags; 391 uint16_t req_reserved; 392 uint16_t req_time; 393 uint16_t req_seg_count; 394 uint8_t req_cdb[12]; 395 ispds_t req_dataseg[ISP_RQDSEG]; 396 } ispreq_t; 397 #define ISP_RQDSEG_A64 2 398 399 typedef struct { 400 isphdr_t mrk_header; 401 uint32_t mrk_handle; 402 uint8_t mrk_reserved0; 403 uint8_t mrk_target; 404 uint16_t mrk_modifier; 405 uint16_t mrk_flags; 406 uint16_t mrk_lun; 407 uint8_t mrk_reserved1[48]; 408 } isp_marker_t; 409 410 typedef struct { 411 isphdr_t mrk_header; 412 uint32_t mrk_handle; 413 uint16_t mrk_nphdl; 414 uint8_t mrk_modifier; 415 uint8_t mrk_reserved0; 416 uint8_t mrk_reserved1; 417 uint8_t mrk_vphdl; 418 uint16_t mrk_reserved2; 419 uint8_t mrk_lun[8]; 420 uint8_t mrk_reserved3[40]; 421 } isp_marker_24xx_t; 422 423 424 #define SYNC_DEVICE 0 425 #define SYNC_TARGET 1 426 #define SYNC_ALL 2 427 #define SYNC_LIP 3 428 429 #define ISP_RQDSEG_T2 3 430 typedef struct { 431 isphdr_t req_header; 432 uint32_t req_handle; 433 uint8_t req_lun_trn; 434 uint8_t req_target; 435 uint16_t req_scclun; 436 uint16_t req_flags; 437 uint8_t req_crn; 438 uint8_t req_reserved; 439 uint16_t req_time; 440 uint16_t req_seg_count; 441 uint8_t req_cdb[16]; 442 uint32_t req_totalcnt; 443 ispds_t req_dataseg[ISP_RQDSEG_T2]; 444 } ispreqt2_t; 445 446 typedef struct { 447 isphdr_t req_header; 448 uint32_t req_handle; 449 uint16_t req_target; 450 uint16_t req_scclun; 451 uint16_t req_flags; 452 uint16_t req_reserved; 453 uint16_t req_time; 454 uint16_t req_seg_count; 455 uint8_t req_cdb[16]; 456 uint32_t req_totalcnt; 457 ispds_t req_dataseg[ISP_RQDSEG_T2]; 458 } ispreqt2e_t; 459 460 #define ISP_RQDSEG_T3 2 461 typedef struct { 462 isphdr_t req_header; 463 uint32_t req_handle; 464 uint8_t req_lun_trn; 465 uint8_t req_target; 466 uint16_t req_scclun; 467 uint16_t req_flags; 468 uint8_t req_crn; 469 uint8_t req_reserved; 470 uint16_t req_time; 471 uint16_t req_seg_count; 472 uint8_t req_cdb[16]; 473 uint32_t req_totalcnt; 474 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 475 } ispreqt3_t; 476 #define ispreq64_t ispreqt3_t /* same as.... */ 477 478 typedef struct { 479 isphdr_t req_header; 480 uint32_t req_handle; 481 uint16_t req_target; 482 uint16_t req_scclun; 483 uint16_t req_flags; 484 uint8_t req_crn; 485 uint8_t req_reserved; 486 uint16_t req_time; 487 uint16_t req_seg_count; 488 uint8_t req_cdb[16]; 489 uint32_t req_totalcnt; 490 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 491 } ispreqt3e_t; 492 493 /* req_flag values */ 494 #define REQFLAG_NODISCON 0x0001 495 #define REQFLAG_HTAG 0x0002 496 #define REQFLAG_OTAG 0x0004 497 #define REQFLAG_STAG 0x0008 498 #define REQFLAG_TARGET_RTN 0x0010 499 500 #define REQFLAG_NODATA 0x0000 501 #define REQFLAG_DATA_IN 0x0020 502 #define REQFLAG_DATA_OUT 0x0040 503 #define REQFLAG_DATA_UNKNOWN 0x0060 504 505 #define REQFLAG_DISARQ 0x0100 506 #define REQFLAG_FRC_ASYNC 0x0200 507 #define REQFLAG_FRC_SYNC 0x0400 508 #define REQFLAG_FRC_WIDE 0x0800 509 #define REQFLAG_NOPARITY 0x1000 510 #define REQFLAG_STOPQ 0x2000 511 #define REQFLAG_XTRASNS 0x4000 512 #define REQFLAG_PRIORITY 0x8000 513 514 typedef struct { 515 isphdr_t req_header; 516 uint32_t req_handle; 517 uint8_t req_lun_trn; 518 uint8_t req_target; 519 uint16_t req_cdblen; 520 uint16_t req_flags; 521 uint16_t req_reserved; 522 uint16_t req_time; 523 uint16_t req_seg_count; 524 uint8_t req_cdb[44]; 525 } ispextreq_t; 526 527 528 /* 529 * ISP24XX structures 530 */ 531 typedef struct { 532 isphdr_t req_header; 533 uint32_t req_handle; 534 uint16_t req_nphdl; 535 uint16_t req_time; 536 uint16_t req_seg_count; 537 uint16_t req_reserved; 538 uint8_t req_lun[8]; 539 uint8_t req_alen_datadir; 540 uint8_t req_task_management; 541 uint8_t req_task_attribute; 542 uint8_t req_crn; 543 uint8_t req_cdb[16]; 544 uint32_t req_dl; 545 uint16_t req_tidlo; 546 uint8_t req_tidhi; 547 uint8_t req_vpidx; 548 ispds64_t req_dataseg; 549 } ispreqt7_t; 550 551 /* Task Management Request Function */ 552 typedef struct { 553 isphdr_t tmf_header; 554 uint32_t tmf_handle; 555 uint16_t tmf_nphdl; 556 uint8_t tmf_reserved0[2]; 557 uint16_t tmf_delay; 558 uint16_t tmf_timeout; 559 uint8_t tmf_lun[8]; 560 uint32_t tmf_flags; 561 uint8_t tmf_reserved1[20]; 562 uint16_t tmf_tidlo; 563 uint8_t tmf_tidhi; 564 uint8_t tmf_vpidx; 565 uint8_t tmf_reserved2[12]; 566 } isp24xx_tmf_t; 567 568 #define ISP24XX_TMF_NOSEND 0x80000000 569 570 #define ISP24XX_TMF_LUN_RESET 0x00000010 571 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 572 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 573 #define ISP24XX_TMF_TARGET_RESET 0x00000002 574 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 575 576 /* I/O Abort Structure */ 577 typedef struct { 578 isphdr_t abrt_header; 579 uint32_t abrt_handle; 580 uint16_t abrt_nphdl; 581 uint16_t abrt_options; 582 uint32_t abrt_cmd_handle; 583 uint16_t abrt_queue_number; 584 uint8_t abrt_reserved[30]; 585 uint16_t abrt_tidlo; 586 uint8_t abrt_tidhi; 587 uint8_t abrt_vpidx; 588 uint8_t abrt_reserved1[12]; 589 } isp24xx_abrt_t; 590 591 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 592 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 593 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 594 595 #define ISP_CDSEG 7 596 typedef struct { 597 isphdr_t req_header; 598 uint32_t req_reserved; 599 ispds_t req_dataseg[ISP_CDSEG]; 600 } ispcontreq_t; 601 602 #define ISP_CDSEG64 5 603 typedef struct { 604 isphdr_t req_header; 605 ispds64_t req_dataseg[ISP_CDSEG64]; 606 } ispcontreq64_t; 607 608 typedef struct { 609 isphdr_t req_header; 610 uint32_t req_handle; 611 uint16_t req_scsi_status; 612 uint16_t req_completion_status; 613 uint16_t req_state_flags; 614 uint16_t req_status_flags; 615 uint16_t req_time; 616 #define req_response_len req_time /* FC only */ 617 uint16_t req_sense_len; 618 uint32_t req_resid; 619 uint8_t req_response[8]; /* FC only */ 620 uint8_t req_sense_data[32]; 621 } ispstatusreq_t; 622 623 /* 624 * Status Continuation 625 */ 626 typedef struct { 627 isphdr_t req_header; 628 uint8_t req_sense_data[60]; 629 } ispstatus_cont_t; 630 631 /* 632 * 24XX Type 0 status 633 */ 634 typedef struct { 635 isphdr_t req_header; 636 uint32_t req_handle; 637 uint16_t req_completion_status; 638 uint16_t req_oxid; 639 uint32_t req_resid; 640 uint16_t req_reserved0; 641 uint16_t req_state_flags; 642 uint16_t req_retry_delay; /* aka Status Qualifier */ 643 uint16_t req_scsi_status; 644 uint32_t req_fcp_residual; 645 uint32_t req_sense_len; 646 uint32_t req_response_len; 647 uint8_t req_rsp_sense[28]; 648 } isp24xx_statusreq_t; 649 650 /* 651 * For Qlogic 2X00, the high order byte of SCSI status has 652 * additional meaning. 653 */ 654 #define RQCS_CR 0x1000 /* Confirmation Request */ 655 #define RQCS_RU 0x0800 /* Residual Under */ 656 #define RQCS_RO 0x0400 /* Residual Over */ 657 #define RQCS_RESID (RQCS_RU|RQCS_RO) 658 #define RQCS_SV 0x0200 /* Sense Length Valid */ 659 #define RQCS_RV 0x0100 /* FCP Response Length Valid */ 660 661 /* 662 * CT Passthru IOCB 663 */ 664 typedef struct { 665 isphdr_t ctp_header; 666 uint32_t ctp_handle; 667 uint16_t ctp_status; 668 uint16_t ctp_nphdl; /* n-port handle */ 669 uint16_t ctp_cmd_cnt; /* Command DSD count */ 670 uint8_t ctp_vpidx; 671 uint8_t ctp_reserved0; 672 uint16_t ctp_time; 673 uint16_t ctp_reserved1; 674 uint16_t ctp_rsp_cnt; /* Response DSD count */ 675 uint16_t ctp_reserved2[5]; 676 uint32_t ctp_rsp_bcnt; /* Response byte count */ 677 uint32_t ctp_cmd_bcnt; /* Command byte count */ 678 ispds64_t ctp_dataseg[2]; 679 } isp_ct_pt_t; 680 681 /* 682 * MS Passthru IOCB 683 */ 684 typedef struct { 685 isphdr_t ms_header; 686 uint32_t ms_handle; 687 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 688 uint16_t ms_status; 689 uint16_t ms_flags; 690 uint16_t ms_reserved1; /* low 8 bits */ 691 uint16_t ms_time; 692 uint16_t ms_cmd_cnt; /* Command DSD count */ 693 uint16_t ms_tot_cnt; /* Total DSD Count */ 694 uint8_t ms_type; /* MS type */ 695 uint8_t ms_r_ctl; /* R_CTL */ 696 uint16_t ms_rxid; /* RX_ID */ 697 uint16_t ms_reserved2; 698 uint32_t ms_handle2; 699 uint32_t ms_rsp_bcnt; /* Response byte count */ 700 uint32_t ms_cmd_bcnt; /* Command byte count */ 701 ispds64_t ms_dataseg[2]; 702 } isp_ms_t; 703 704 /* 705 * Completion Status Codes. 706 */ 707 #define RQCS_COMPLETE 0x0000 708 #define RQCS_DMA_ERROR 0x0002 709 #define RQCS_RESET_OCCURRED 0x0004 710 #define RQCS_ABORTED 0x0005 711 #define RQCS_TIMEOUT 0x0006 712 #define RQCS_DATA_OVERRUN 0x0007 713 #define RQCS_DATA_UNDERRUN 0x0015 714 #define RQCS_QUEUE_FULL 0x001C 715 716 /* 1X00 Only Completion Codes */ 717 #define RQCS_INCOMPLETE 0x0001 718 #define RQCS_TRANSPORT_ERROR 0x0003 719 #define RQCS_COMMAND_OVERRUN 0x0008 720 #define RQCS_STATUS_OVERRUN 0x0009 721 #define RQCS_BAD_MESSAGE 0x000a 722 #define RQCS_NO_MESSAGE_OUT 0x000b 723 #define RQCS_EXT_ID_FAILED 0x000c 724 #define RQCS_IDE_MSG_FAILED 0x000d 725 #define RQCS_ABORT_MSG_FAILED 0x000e 726 #define RQCS_REJECT_MSG_FAILED 0x000f 727 #define RQCS_NOP_MSG_FAILED 0x0010 728 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 729 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 730 #define RQCS_ID_MSG_FAILED 0x0013 731 #define RQCS_UNEXP_BUS_FREE 0x0014 732 #define RQCS_XACT_ERR1 0x0018 733 #define RQCS_XACT_ERR2 0x0019 734 #define RQCS_XACT_ERR3 0x001A 735 #define RQCS_BAD_ENTRY 0x001B 736 #define RQCS_PHASE_SKIPPED 0x001D 737 #define RQCS_ARQS_FAILED 0x001E 738 #define RQCS_WIDE_FAILED 0x001F 739 #define RQCS_SYNCXFER_FAILED 0x0020 740 #define RQCS_LVD_BUSERR 0x0021 741 742 /* 2X00 Only Completion Codes */ 743 #define RQCS_PORT_UNAVAILABLE 0x0028 744 #define RQCS_PORT_LOGGED_OUT 0x0029 745 #define RQCS_PORT_CHANGED 0x002A 746 #define RQCS_PORT_BUSY 0x002B 747 748 /* 24XX Only Completion Codes */ 749 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 750 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 751 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 752 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 753 754 755 /* 756 * 1X00 specific State Flags 757 */ 758 #define RQSF_GOT_BUS 0x0100 759 #define RQSF_GOT_TARGET 0x0200 760 #define RQSF_SENT_CDB 0x0400 761 #define RQSF_XFRD_DATA 0x0800 762 #define RQSF_GOT_STATUS 0x1000 763 #define RQSF_GOT_SENSE 0x2000 764 #define RQSF_XFER_COMPLETE 0x4000 765 766 /* 767 * 2X00 specific State Flags 768 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 769 */ 770 #define RQSF_DATA_IN 0x0020 771 #define RQSF_DATA_OUT 0x0040 772 #define RQSF_STAG 0x0008 773 #define RQSF_OTAG 0x0004 774 #define RQSF_HTAG 0x0002 775 /* 776 * 1X00 Status Flags 777 */ 778 #define RQSTF_DISCONNECT 0x0001 779 #define RQSTF_SYNCHRONOUS 0x0002 780 #define RQSTF_PARITY_ERROR 0x0004 781 #define RQSTF_BUS_RESET 0x0008 782 #define RQSTF_DEVICE_RESET 0x0010 783 #define RQSTF_ABORTED 0x0020 784 #define RQSTF_TIMEOUT 0x0040 785 #define RQSTF_NEGOTIATION 0x0080 786 787 /* 788 * 2X00 specific state flags 789 */ 790 /* RQSF_SENT_CDB */ 791 /* RQSF_XFRD_DATA */ 792 /* RQSF_GOT_STATUS */ 793 /* RQSF_XFER_COMPLETE */ 794 795 /* 796 * 2X00 specific status flags 797 */ 798 /* RQSTF_ABORTED */ 799 /* RQSTF_TIMEOUT */ 800 #define RQSTF_DMA_ERROR 0x0080 801 #define RQSTF_LOGOUT 0x2000 802 803 /* 804 * Miscellaneous 805 */ 806 #ifndef ISP_EXEC_THROTTLE 807 #define ISP_EXEC_THROTTLE 16 808 #endif 809 810 /* 811 * About Firmware returns an 'attribute' word in mailbox 6. 812 * These attributes are for 2200 and 2300. 813 */ 814 #define ISP_FW_ATTR_TMODE 0x0001 815 #define ISP_FW_ATTR_SCCLUN 0x0002 816 #define ISP_FW_ATTR_FABRIC 0x0004 817 #define ISP_FW_ATTR_CLASS2 0x0008 818 #define ISP_FW_ATTR_FCTAPE 0x0010 819 #define ISP_FW_ATTR_IP 0x0020 820 #define ISP_FW_ATTR_VI 0x0040 821 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 822 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 823 824 /* and these are for the 2400 */ 825 #define ISP2400_FW_ATTR_CLASS2 0x0001 826 #define ISP2400_FW_ATTR_IP 0x0002 827 #define ISP2400_FW_ATTR_MULTIID 0x0004 828 #define ISP2400_FW_ATTR_SB2 0x0008 829 #define ISP2400_FW_ATTR_T10CRC 0x0010 830 #define ISP2400_FW_ATTR_VI 0x0020 831 #define ISP2400_FW_ATTR_MQ 0x0040 832 #define ISP2400_FW_ATTR_MSIX 0x0080 833 #define ISP2400_FW_ATTR_FCOE 0x0800 834 #define ISP2400_FW_ATTR_VP0 0x1000 835 #define ISP2400_FW_ATTR_EXPFW 0x2000 836 #define ISP2400_FW_ATTR_HOTFW 0x4000 837 #define ISP2400_FW_ATTR_EXTNDED 0x8000 838 #define ISP2400_FW_ATTR_EXTVP 0x00010000 839 #define ISP2400_FW_ATTR_VN2VN 0x00040000 840 #define ISP2400_FW_ATTR_EXMOFF 0x00080000 841 #define ISP2400_FW_ATTR_NPMOFF 0x00100000 842 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000 843 #define ISP2400_FW_ATTR_SRIOV 0x02000000 844 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000 845 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 846 847 /* 848 * These are either manifestly true or are dependent on f/w attributes 849 */ 850 #define ISP_CAP_TMODE(isp) \ 851 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 852 #define ISP_CAP_SCCFW(isp) \ 853 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 854 #define ISP_CAP_2KLOGIN(isp) \ 855 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 856 857 /* 858 * This is only true for 24XX cards with this f/w attribute 859 */ 860 #define ISP_CAP_MULTI_ID(isp) \ 861 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 862 #define ISP_GET_VPIDX(isp, tag) \ 863 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 864 #define ISP_CAP_VP0(isp) \ 865 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0) 866 867 /* 868 * This is true manifestly or is dependent on a f/w attribute 869 * but may or may not actually be *enabled*. In any case, it 870 * is enabled on a per-channel basis. 871 */ 872 #define ISP_CAP_FCTAPE(isp) \ 873 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 874 875 #define ISP_FCTAPE_ENABLED(isp, chan) \ 876 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 877 878 /* 879 * Reduced Interrupt Operation Response Queue Entries 880 */ 881 882 typedef struct { 883 isphdr_t req_header; 884 uint32_t req_handles[15]; 885 } isp_rio1_t; 886 887 typedef struct { 888 isphdr_t req_header; 889 uint16_t req_handles[30]; 890 } isp_rio2_t; 891 892 /* 893 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 894 */ 895 896 /* 897 * Initialization Control Block 898 * 899 * Version One (prime) format. 900 */ 901 typedef struct { 902 uint8_t icb_version; 903 uint8_t icb_reserved0; 904 uint16_t icb_fwoptions; 905 uint16_t icb_maxfrmlen; 906 uint16_t icb_maxalloc; 907 uint16_t icb_execthrottle; 908 uint8_t icb_retry_count; 909 uint8_t icb_retry_delay; 910 uint8_t icb_portname[8]; 911 uint16_t icb_hardaddr; 912 uint8_t icb_iqdevtype; 913 uint8_t icb_logintime; 914 uint8_t icb_nodename[8]; 915 uint16_t icb_rqstout; 916 uint16_t icb_rspnsin; 917 uint16_t icb_rqstqlen; 918 uint16_t icb_rsltqlen; 919 uint16_t icb_rqstaddr[4]; 920 uint16_t icb_respaddr[4]; 921 uint16_t icb_lunenables; 922 uint8_t icb_ccnt; 923 uint8_t icb_icnt; 924 uint16_t icb_lunetimeout; 925 uint16_t icb_reserved1; 926 uint16_t icb_xfwoptions; 927 uint8_t icb_racctimer; 928 uint8_t icb_idelaytimer; 929 uint16_t icb_zfwoptions; 930 uint16_t icb_reserved2[13]; 931 } isp_icb_t; 932 933 #define ICB_VERSION1 1 934 935 #define ICBOPT_EXTENDED 0x8000 936 #define ICBOPT_BOTH_WWNS 0x4000 937 #define ICBOPT_FULL_LOGIN 0x2000 938 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 939 #define ICBOPT_PREV_ADDRESS 0x0800 940 #define ICBOPT_SRCHDOWN 0x0400 941 #define ICBOPT_NOLIP 0x0200 942 #define ICBOPT_PDBCHANGE_AE 0x0100 943 #define ICBOPT_TGT_TYPE 0x0080 944 #define ICBOPT_INI_ADISC 0x0040 945 #define ICBOPT_INI_DISABLE 0x0020 946 #define ICBOPT_TGT_ENABLE 0x0010 947 #define ICBOPT_FAST_POST 0x0008 948 #define ICBOPT_FULL_DUPLEX 0x0004 949 #define ICBOPT_FAIRNESS 0x0002 950 #define ICBOPT_HARD_ADDRESS 0x0001 951 952 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 953 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 954 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 955 #define ICBXOPT_FCTAPE 0x1000 956 #define ICBXOPT_CLASS2_ACK0 0x0200 957 #define ICBXOPT_CLASS2 0x0100 958 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 959 #define ICBXOPT_TOPO_MASK 0x0070 960 #define ICBXOPT_LOOP_ONLY 0x0000 961 #define ICBXOPT_PTP_ONLY 0x0010 962 #define ICBXOPT_LOOP_2_PTP 0x0020 963 #define ICBXOPT_PTP_2_LOOP 0x0030 964 /* 965 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 966 * RIO is not defined for the 23XX cards (just 2200) 967 */ 968 #define ICBXOPT_RIO_OFF 0 969 #define ICBXOPT_RIO_16BIT 1 970 #define ICBXOPT_RIO_32BIT 2 971 #define ICBXOPT_RIO_16BIT_IOCB 3 972 #define ICBXOPT_RIO_32BIT_IOCB 4 973 #define ICBXOPT_ZIO 5 974 #define ICBXOPT_TIMER_MASK 0x7 975 976 #define ICBZOPT_RATE_MASK 0xC000 977 #define ICBZOPT_RATE_ONEGB 0x0000 978 #define ICBZOPT_RATE_AUTO 0x8000 979 #define ICBZOPT_RATE_TWOGB 0x4000 980 #define ICBZOPT_50_OHM 0x2000 981 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 982 #define ICBZOPT_RSPSZ_MASK 0x0030 983 #define ICBZOPT_RSPSZ_24 0x0000 984 #define ICBZOPT_RSPSZ_12 0x0010 985 #define ICBZOPT_RSPSZ_24A 0x0020 986 #define ICBZOPT_RSPSZ_32 0x0030 987 #define ICBZOPT_SOFTID 0x0002 988 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 989 990 /* 2400 F/W options */ 991 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 992 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 993 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800 994 #define ICB2400_OPT1_SRCHDOWN 0x00000400 995 #define ICB2400_OPT1_NOLIP 0x00000200 996 #define ICB2400_OPT1_INI_DISABLE 0x00000020 997 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 998 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 999 #define ICB2400_OPT1_FAIRNESS 0x00000002 1000 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 1001 1002 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 1003 #define ICB2400_OPT2_ENA_IHA 0x04000000 1004 #define ICB2400_OPT2_QOS 0x02000000 1005 #define ICB2400_OPT2_IOCBS 0x01000000 1006 #define ICB2400_OPT2_ENA_IHR 0x00400000 1007 #define ICB2400_OPT2_ENA_VMS 0x00200000 1008 #define ICB2400_OPT2_ENA_TA 0x00100000 1009 #define ICB2400_OPT2_TPRLIC 0x00004000 1010 #define ICB2400_OPT2_FCTAPE 0x00001000 1011 #define ICB2400_OPT2_FCSP 0x00000800 1012 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1013 #define ICB2400_OPT2_CLASS2 0x00000100 1014 #define ICB2400_OPT2_NO_PLAY 0x00000080 1015 #define ICB2400_OPT2_TOPO_MASK 0x00000070 1016 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 1017 #define ICB2400_OPT2_PTP_ONLY 0x00000010 1018 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1019 #define ICB2400_OPT2_TIMER_MASK 0x0000000f 1020 #define ICB2400_OPT2_ZIO 0x00000005 1021 #define ICB2400_OPT2_ZIO1 0x00000006 1022 1023 #define ICB2400_OPT3_NO_CTXDIS 0x40000000 1024 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1025 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1026 #define ICB2400_OPT3_ENA_MFCF 0x00020000 1027 #define ICB2400_OPT3_SKIP_FOURGB 0x00010000 1028 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1029 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 1030 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 1031 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1032 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 1033 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1034 #define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000 1035 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1036 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1037 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1038 #define ICB2400_OPT3_ENA_OOF 0x00000040 1039 /* note that a response size flag of zero is reserved! */ 1040 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1041 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1042 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1043 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1044 #define ICB2400_OPT3_SOFTID 0x00000002 1045 1046 #define ICB_MIN_FRMLEN 256 1047 #define ICB_MAX_FRMLEN 2112 1048 #define ICB_DFLT_FRMLEN 1024 1049 #define ICB_DFLT_ALLOC 256 1050 #define ICB_DFLT_THROTTLE 16 1051 #define ICB_DFLT_RDELAY 5 1052 #define ICB_DFLT_RCOUNT 3 1053 1054 #define ICB_LOGIN_TOV 30 1055 #define ICB_LUN_ENABLE_TOV 15 1056 1057 1058 /* 1059 * And somebody at QLogic had a great idea that you could just change 1060 * the structure *and* keep the version number the same as the other cards. 1061 */ 1062 typedef struct { 1063 uint16_t icb_version; 1064 uint16_t icb_reserved0; 1065 uint16_t icb_maxfrmlen; 1066 uint16_t icb_execthrottle; 1067 uint16_t icb_xchgcnt; 1068 uint16_t icb_hardaddr; 1069 uint8_t icb_portname[8]; 1070 uint8_t icb_nodename[8]; 1071 uint16_t icb_rspnsin; 1072 uint16_t icb_rqstout; 1073 uint16_t icb_retry_count; 1074 uint16_t icb_priout; 1075 uint16_t icb_rsltqlen; 1076 uint16_t icb_rqstqlen; 1077 uint16_t icb_ldn_nols; 1078 uint16_t icb_prqstqlen; 1079 uint16_t icb_rqstaddr[4]; 1080 uint16_t icb_respaddr[4]; 1081 uint16_t icb_priaddr[4]; 1082 uint16_t icb_msixresp; 1083 uint16_t icb_msixatio; 1084 uint16_t icb_reserved1[2]; 1085 uint16_t icb_atio_in; 1086 uint16_t icb_atioqlen; 1087 uint16_t icb_atioqaddr[4]; 1088 uint16_t icb_idelaytimer; 1089 uint16_t icb_logintime; 1090 uint32_t icb_fwoptions1; 1091 uint32_t icb_fwoptions2; 1092 uint32_t icb_fwoptions3; 1093 uint16_t icb_qos; 1094 uint16_t icb_reserved2[3]; 1095 uint16_t icb_enodemac[3]; 1096 uint16_t icb_disctime; 1097 uint16_t icb_reserved3[4]; 1098 } isp_icb_2400_t; 1099 1100 #define RQRSP_ADDR0015 0 1101 #define RQRSP_ADDR1631 1 1102 #define RQRSP_ADDR3247 2 1103 #define RQRSP_ADDR4863 3 1104 1105 1106 #define ICB_NNM0 7 1107 #define ICB_NNM1 6 1108 #define ICB_NNM2 5 1109 #define ICB_NNM3 4 1110 #define ICB_NNM4 3 1111 #define ICB_NNM5 2 1112 #define ICB_NNM6 1 1113 #define ICB_NNM7 0 1114 1115 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1116 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1117 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1118 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1119 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1120 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1121 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1122 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1123 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1124 1125 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1126 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1127 ((uint64_t) array[ICB_NNM1] << 8) | \ 1128 ((uint64_t) array[ICB_NNM2] << 16) | \ 1129 ((uint64_t) array[ICB_NNM3] << 24) | \ 1130 ((uint64_t) array[ICB_NNM4] << 32) | \ 1131 ((uint64_t) array[ICB_NNM5] << 40) | \ 1132 ((uint64_t) array[ICB_NNM6] << 48) | \ 1133 ((uint64_t) array[ICB_NNM7] << 56) 1134 1135 1136 /* 1137 * For MULTI_ID firmware, this describes a 1138 * virtual port entity for getting status. 1139 */ 1140 typedef struct { 1141 uint16_t vp_port_status; 1142 uint8_t vp_port_options; 1143 uint8_t vp_port_loopid; 1144 uint8_t vp_port_portname[8]; 1145 uint8_t vp_port_nodename[8]; 1146 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1147 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1148 } vp_port_info_t; 1149 1150 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1151 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1152 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1153 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1154 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1155 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1156 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1157 1158 #define ICB2400_VPOPT_WRITE_SIZE 20 1159 1160 /* 1161 * For MULTI_ID firmware, we append this structure 1162 * to the isp_icb_2400_t above, followed by a list 1163 * structures that are *most* of the vp_port_info_t. 1164 */ 1165 typedef struct { 1166 uint16_t vp_count; 1167 uint16_t vp_global_options; 1168 } isp_icb_2400_vpinfo_t; 1169 1170 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1171 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1172 (ICB2400_VPINFO_OFF + \ 1173 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE)) 1174 1175 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1176 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1177 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1178 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1179 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1180 1181 typedef struct { 1182 isphdr_t vp_ctrl_hdr; 1183 uint32_t vp_ctrl_handle; 1184 uint16_t vp_ctrl_index_fail; 1185 uint16_t vp_ctrl_status; 1186 uint16_t vp_ctrl_command; 1187 uint16_t vp_ctrl_vp_count; 1188 uint16_t vp_ctrl_idmap[16]; 1189 uint16_t vp_ctrl_reserved[7]; 1190 uint16_t vp_ctrl_fcf_index; 1191 } vp_ctrl_info_t; 1192 1193 #define VP_CTRL_CMD_ENABLE_VP 0x00 1194 #define VP_CTRL_CMD_DISABLE_VP 0x08 1195 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09 1196 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A 1197 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B 1198 1199 /* 1200 * We can use this structure for modifying either one or two VP ports after initialization 1201 */ 1202 typedef struct { 1203 isphdr_t vp_mod_hdr; 1204 uint32_t vp_mod_hdl; 1205 uint16_t vp_mod_reserved0; 1206 uint16_t vp_mod_status; 1207 uint8_t vp_mod_cmd; 1208 uint8_t vp_mod_cnt; 1209 uint8_t vp_mod_idx0; 1210 uint8_t vp_mod_idx1; 1211 struct { 1212 uint8_t options; 1213 uint8_t loopid; 1214 uint16_t reserved1; 1215 uint8_t wwpn[8]; 1216 uint8_t wwnn[8]; 1217 } vp_mod_ports[2]; 1218 uint8_t vp_mod_reserved2[8]; 1219 } vp_modify_t; 1220 1221 #define VP_STS_OK 0x00 1222 #define VP_STS_ERR 0x01 1223 #define VP_CNT_ERR 0x02 1224 #define VP_GEN_ERR 0x03 1225 #define VP_IDX_ERR 0x04 1226 #define VP_STS_BSY 0x05 1227 1228 #define VP_MODIFY 0x00 1229 #define VP_MODIFY_ENA 0x01 1230 #define VP_MODIFY_OPT 0x02 1231 #define VP_RESUME 0x03 1232 1233 /* 1234 * Port Data Base Element 1235 */ 1236 1237 typedef struct { 1238 uint16_t pdb_options; 1239 uint8_t pdb_mstate; 1240 uint8_t pdb_sstate; 1241 uint8_t pdb_hardaddr_bits[4]; 1242 uint8_t pdb_portid_bits[4]; 1243 uint8_t pdb_nodename[8]; 1244 uint8_t pdb_portname[8]; 1245 uint16_t pdb_execthrottle; 1246 uint16_t pdb_exec_count; 1247 uint8_t pdb_retry_count; 1248 uint8_t pdb_retry_delay; 1249 uint16_t pdb_resalloc; 1250 uint16_t pdb_curalloc; 1251 uint16_t pdb_qhead; 1252 uint16_t pdb_qtail; 1253 uint16_t pdb_tl_next; 1254 uint16_t pdb_tl_last; 1255 uint16_t pdb_features; /* PLOGI, Common Service */ 1256 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1257 uint16_t pdb_roi; /* PLOGI, Common Service */ 1258 uint8_t pdb_target; 1259 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1260 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1261 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1262 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1263 uint16_t pdb_labrtflg; 1264 uint16_t pdb_lstopflg; 1265 uint16_t pdb_sqhead; 1266 uint16_t pdb_sqtail; 1267 uint16_t pdb_ptimer; 1268 uint16_t pdb_nxt_seqid; 1269 uint16_t pdb_fcount; 1270 uint16_t pdb_prli_len; 1271 uint16_t pdb_prli_svc0; 1272 uint16_t pdb_prli_svc3; 1273 uint16_t pdb_loopid; 1274 uint16_t pdb_il_ptr; 1275 uint16_t pdb_sl_ptr; 1276 } isp_pdb_21xx_t; 1277 1278 #define PDB_OPTIONS_XMITTING (1<<11) 1279 #define PDB_OPTIONS_LNKXMIT (1<<10) 1280 #define PDB_OPTIONS_ABORTED (1<<9) 1281 #define PDB_OPTIONS_ADISC (1<<1) 1282 1283 #define PDB_STATE_DISCOVERY 0 1284 #define PDB_STATE_WDISC_ACK 1 1285 #define PDB_STATE_PLOGI 2 1286 #define PDB_STATE_PLOGI_ACK 3 1287 #define PDB_STATE_PRLI 4 1288 #define PDB_STATE_PRLI_ACK 5 1289 #define PDB_STATE_LOGGED_IN 6 1290 #define PDB_STATE_PORT_UNAVAIL 7 1291 #define PDB_STATE_PRLO 8 1292 #define PDB_STATE_PRLO_ACK 9 1293 #define PDB_STATE_PLOGO 10 1294 #define PDB_STATE_PLOG_ACK 11 1295 1296 #define SVC3_ROLE_MASK 0x30 1297 #define SVC3_ROLE_SHIFT 4 1298 1299 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1300 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1301 1302 /* 1303 * Port Data Base Element- 24XX cards 1304 */ 1305 typedef struct { 1306 uint16_t pdb_flags; 1307 uint8_t pdb_curstate; 1308 uint8_t pdb_laststate; 1309 uint8_t pdb_hardaddr_bits[4]; 1310 uint8_t pdb_portid_bits[4]; 1311 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1312 uint16_t pdb_retry_timer; 1313 uint16_t pdb_handle; 1314 uint16_t pdb_rcv_dsize; 1315 uint16_t pdb_reserved0; 1316 uint16_t pdb_prli_svc0; 1317 uint16_t pdb_prli_svc3; 1318 uint8_t pdb_portname[8]; 1319 uint8_t pdb_nodename[8]; 1320 uint8_t pdb_reserved1[24]; 1321 } isp_pdb_24xx_t; 1322 1323 #define PDB2400_TID_SUPPORTED 0x4000 1324 #define PDB2400_FC_TAPE 0x0080 1325 #define PDB2400_CLASS2_ACK0 0x0040 1326 #define PDB2400_FCP_CONF 0x0020 1327 #define PDB2400_CLASS2 0x0010 1328 #define PDB2400_ADDR_VALID 0x0002 1329 1330 #define PDB2400_STATE_PLOGI_PEND 0x03 1331 #define PDB2400_STATE_PLOGI_DONE 0x04 1332 #define PDB2400_STATE_PRLI_PEND 0x05 1333 #define PDB2400_STATE_LOGGED_IN 0x06 1334 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1335 #define PDB2400_STATE_PRLO_PEND 0x09 1336 #define PDB2400_STATE_LOGO_PEND 0x0B 1337 1338 /* 1339 * Common elements from the above two structures that are actually useful to us. 1340 */ 1341 typedef struct { 1342 uint16_t handle; 1343 uint16_t prli_word3; 1344 uint32_t : 8, 1345 portid : 24; 1346 uint8_t portname[8]; 1347 uint8_t nodename[8]; 1348 } isp_pdb_t; 1349 1350 /* 1351 * Port/Node Name List Element 1352 */ 1353 typedef struct { 1354 uint8_t pnnle_name[8]; 1355 uint16_t pnnle_handle; 1356 uint16_t pnnle_reserved; 1357 } isp_pnnle_t; 1358 1359 #define PNNL_OPTIONS_NODE_NAMES (1<<0) 1360 #define PNNL_OPTIONS_PORT_DATA (1<<2) 1361 #define PNNL_OPTIONS_INITIATORS (1<<3) 1362 1363 /* 1364 * Port and N-Port Handle List Element 1365 */ 1366 typedef struct { 1367 uint16_t pnhle_port_id_lo; 1368 uint16_t pnhle_port_id_hi_handle; 1369 } isp_pnhle_21xx_t; 1370 1371 typedef struct { 1372 uint16_t pnhle_port_id_lo; 1373 uint16_t pnhle_port_id_hi; 1374 uint16_t pnhle_handle; 1375 } isp_pnhle_23xx_t; 1376 1377 typedef struct { 1378 uint16_t pnhle_port_id_lo; 1379 uint16_t pnhle_port_id_hi; 1380 uint16_t pnhle_handle; 1381 uint16_t pnhle_reserved; 1382 } isp_pnhle_24xx_t; 1383 1384 /* 1385 * Port Database Changed Async Event information for 24XX cards 1386 */ 1387 #define PDB24XX_AE_OK 0x00 1388 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1389 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1390 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1391 #define PDB24XX_AE_PLOGI_RCVD 0x04 1392 #define PDB24XX_AE_PLOGI_RJT 0x05 1393 #define PDB24XX_AE_PRLI_RCVD 0x06 1394 #define PDB24XX_AE_PRLI_RJT 0x07 1395 #define PDB24XX_AE_TPRLO 0x08 1396 #define PDB24XX_AE_TPRLO_RJT 0x09 1397 #define PDB24XX_AE_PRLO_RCVD 0x0a 1398 #define PDB24XX_AE_LOGO_RCVD 0x0b 1399 #define PDB24XX_AE_TOPO_CHG 0x0c 1400 #define PDB24XX_AE_NPORT_CHG 0x0d 1401 #define PDB24XX_AE_FLOGI_RJT 0x0e 1402 #define PDB24XX_AE_BAD_FANN 0x0f 1403 #define PDB24XX_AE_FLOGI_TIMO 0x10 1404 #define PDB24XX_AE_ABX_LOGO 0x11 1405 #define PDB24XX_AE_PLOGI_DONE 0x12 1406 #define PDB24XX_AE_PRLI_DONJE 0x13 1407 #define PDB24XX_AE_OPN_1 0x14 1408 #define PDB24XX_AE_OPN_2 0x15 1409 #define PDB24XX_AE_TXERR 0x16 1410 #define PDB24XX_AE_FORCED_LOGO 0x17 1411 #define PDB24XX_AE_DISC_TIMO 0x18 1412 1413 /* 1414 * Genericized Port Login/Logout software structure 1415 */ 1416 typedef struct { 1417 uint16_t handle; 1418 uint16_t channel; 1419 uint32_t 1420 flags : 8, 1421 portid : 24; 1422 } isp_plcmd_t; 1423 /* the flags to use are those for PLOGX_FLG_* below */ 1424 1425 /* 1426 * ISP24XX- Login/Logout Port IOCB 1427 */ 1428 typedef struct { 1429 isphdr_t plogx_header; 1430 uint32_t plogx_handle; 1431 uint16_t plogx_status; 1432 uint16_t plogx_nphdl; 1433 uint16_t plogx_flags; 1434 uint16_t plogx_vphdl; /* low 8 bits */ 1435 uint16_t plogx_portlo; /* low 16 bits */ 1436 uint16_t plogx_rspsz_porthi; 1437 struct { 1438 uint16_t lo16; 1439 uint16_t hi16; 1440 } plogx_ioparm[11]; 1441 } isp_plogx_t; 1442 1443 #define PLOGX_STATUS_OK 0x00 1444 #define PLOGX_STATUS_UNAVAIL 0x28 1445 #define PLOGX_STATUS_LOGOUT 0x29 1446 #define PLOGX_STATUS_IOCBERR 0x31 1447 1448 #define PLOGX_IOCBERR_NOLINK 0x01 1449 #define PLOGX_IOCBERR_NOIOCB 0x02 1450 #define PLOGX_IOCBERR_NOXGHG 0x03 1451 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1452 #define PLOGX_IOCBERR_NOFABRIC 0x05 1453 #define PLOGX_IOCBERR_NOTREADY 0x07 1454 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */ 1455 #define PLOGX_IOCBERR_NOPCB 0x0a 1456 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1457 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1458 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1459 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1460 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1461 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1462 1463 #define PLOGX_FLG_CMD_MASK 0xf 1464 #define PLOGX_FLG_CMD_PLOGI 0 1465 #define PLOGX_FLG_CMD_PRLI 1 1466 #define PLOGX_FLG_CMD_PDISC 2 1467 #define PLOGX_FLG_CMD_LOGO 8 1468 #define PLOGX_FLG_CMD_PRLO 9 1469 #define PLOGX_FLG_CMD_TPRLO 10 1470 1471 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1472 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1473 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1474 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1475 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1476 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1477 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1478 1479 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1480 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1481 1482 /* 1483 * Report ID Acquisistion (24XX multi-id firmware) 1484 */ 1485 typedef struct { 1486 isphdr_t ridacq_hdr; 1487 uint32_t ridacq_handle; 1488 union { 1489 struct { 1490 uint8_t ridacq_vp_acquired; 1491 uint8_t ridacq_vp_setup; 1492 uint16_t ridacq_reserved0; 1493 } type0; /* type 0 */ 1494 struct { 1495 uint16_t ridacq_vp_count; 1496 uint8_t ridacq_vp_index; 1497 uint8_t ridacq_vp_status; 1498 } type1; /* type 1 */ 1499 } un; 1500 uint16_t ridacq_vp_port_lo; 1501 uint8_t ridacq_vp_port_hi; 1502 uint8_t ridacq_format; /* 0 or 1 */ 1503 uint16_t ridacq_map[8]; 1504 uint8_t ridacq_reserved1[32]; 1505 } isp_ridacq_t; 1506 1507 #define RIDACQ_STS_COMPLETE 0 1508 #define RIDACQ_STS_UNACQUIRED 1 1509 #define RIDACQ_STS_CHANGED 20 1510 1511 1512 /* 1513 * Simple Name Server Data Structures 1514 */ 1515 #define SNS_GA_NXT 0x100 1516 #define SNS_GPN_ID 0x112 1517 #define SNS_GNN_ID 0x113 1518 #define SNS_GFF_ID 0x11F 1519 #define SNS_GID_FT 0x171 1520 #define SNS_RFT_ID 0x217 1521 typedef struct { 1522 uint16_t snscb_rblen; /* response buffer length (words) */ 1523 uint16_t snscb_reserved0; 1524 uint16_t snscb_addr[4]; /* response buffer address */ 1525 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1526 uint16_t snscb_reserved1; 1527 uint16_t snscb_data[]; /* variable data */ 1528 } sns_screq_t; /* Subcommand Request Structure */ 1529 1530 typedef struct { 1531 uint16_t snscb_rblen; /* response buffer length (words) */ 1532 uint16_t snscb_reserved0; 1533 uint16_t snscb_addr[4]; /* response buffer address */ 1534 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1535 uint16_t snscb_reserved1; 1536 uint16_t snscb_cmd; 1537 uint16_t snscb_reserved2; 1538 uint32_t snscb_reserved3; 1539 uint32_t snscb_port; 1540 } sns_ga_nxt_req_t; 1541 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1542 1543 typedef struct { 1544 uint16_t snscb_rblen; /* response buffer length (words) */ 1545 uint16_t snscb_reserved0; 1546 uint16_t snscb_addr[4]; /* response buffer address */ 1547 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1548 uint16_t snscb_reserved1; 1549 uint16_t snscb_cmd; 1550 uint16_t snscb_reserved2; 1551 uint32_t snscb_reserved3; 1552 uint32_t snscb_portid; 1553 } sns_gxn_id_req_t; 1554 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1555 1556 typedef struct { 1557 uint16_t snscb_rblen; /* response buffer length (words) */ 1558 uint16_t snscb_reserved0; 1559 uint16_t snscb_addr[4]; /* response buffer address */ 1560 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1561 uint16_t snscb_reserved1; 1562 uint16_t snscb_cmd; 1563 uint16_t snscb_mword_div_2; 1564 uint32_t snscb_reserved3; 1565 uint32_t snscb_fc4_type; 1566 } sns_gid_ft_req_t; 1567 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1568 1569 typedef struct { 1570 uint16_t snscb_rblen; /* response buffer length (words) */ 1571 uint16_t snscb_reserved0; 1572 uint16_t snscb_addr[4]; /* response buffer address */ 1573 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1574 uint16_t snscb_reserved1; 1575 uint16_t snscb_cmd; 1576 uint16_t snscb_reserved2; 1577 uint32_t snscb_reserved3; 1578 uint32_t snscb_port; 1579 uint32_t snscb_fc4_types[8]; 1580 } sns_rft_id_req_t; 1581 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1582 1583 typedef struct { 1584 ct_hdr_t snscb_cthdr; 1585 uint8_t snscb_port_type; 1586 uint8_t snscb_port_id[3]; 1587 uint8_t snscb_portname[8]; 1588 uint16_t snscb_data[]; /* variable data */ 1589 } sns_scrsp_t; /* Subcommand Response Structure */ 1590 1591 typedef struct { 1592 ct_hdr_t snscb_cthdr; 1593 uint8_t snscb_port_type; 1594 uint8_t snscb_port_id[3]; 1595 uint8_t snscb_portname[8]; 1596 uint8_t snscb_pnlen; /* symbolic port name length */ 1597 uint8_t snscb_pname[255]; /* symbolic port name */ 1598 uint8_t snscb_nodename[8]; 1599 uint8_t snscb_nnlen; /* symbolic node name length */ 1600 uint8_t snscb_nname[255]; /* symbolic node name */ 1601 uint8_t snscb_ipassoc[8]; 1602 uint8_t snscb_ipaddr[16]; 1603 uint8_t snscb_svc_class[4]; 1604 uint8_t snscb_fc4_types[32]; 1605 uint8_t snscb_fpname[8]; 1606 uint8_t snscb_reserved; 1607 uint8_t snscb_hardaddr[3]; 1608 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1609 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1610 1611 typedef struct { 1612 ct_hdr_t snscb_cthdr; 1613 uint8_t snscb_wwn[8]; 1614 } sns_gxn_id_rsp_t; 1615 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1616 1617 typedef struct { 1618 ct_hdr_t snscb_cthdr; 1619 uint32_t snscb_fc4_features[32]; 1620 } sns_gff_id_rsp_t; 1621 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1622 1623 typedef struct { 1624 ct_hdr_t snscb_cthdr; 1625 struct { 1626 uint8_t control; 1627 uint8_t portid[3]; 1628 } snscb_ports[1]; 1629 } sns_gid_ft_rsp_t; 1630 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1631 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1632 1633 /* 1634 * Other Misc Structures 1635 */ 1636 1637 /* ELS Pass Through */ 1638 typedef struct { 1639 isphdr_t els_hdr; 1640 uint32_t els_handle; 1641 uint16_t els_status; 1642 uint16_t els_nphdl; 1643 uint16_t els_xmit_dsd_count; /* outgoing only */ 1644 uint8_t els_vphdl; 1645 uint8_t els_sof; 1646 uint32_t els_rxid; 1647 uint16_t els_recv_dsd_count; /* outgoing only */ 1648 uint8_t els_opcode; 1649 uint8_t els_reserved1; 1650 uint8_t els_did_lo; 1651 uint8_t els_did_mid; 1652 uint8_t els_did_hi; 1653 uint8_t els_reserved2; 1654 uint16_t els_reserved3; 1655 uint16_t els_ctl_flags; 1656 union { 1657 struct { 1658 uint32_t _els_bytecnt; 1659 uint32_t _els_subcode1; 1660 uint32_t _els_subcode2; 1661 uint8_t _els_reserved4[20]; 1662 } in; 1663 struct { 1664 uint32_t _els_recv_bytecnt; 1665 uint32_t _els_xmit_bytecnt; 1666 uint32_t _els_xmit_dsd_length; 1667 uint16_t _els_xmit_dsd_a1500; 1668 uint16_t _els_xmit_dsd_a3116; 1669 uint16_t _els_xmit_dsd_a4732; 1670 uint16_t _els_xmit_dsd_a6348; 1671 uint32_t _els_recv_dsd_length; 1672 uint16_t _els_recv_dsd_a1500; 1673 uint16_t _els_recv_dsd_a3116; 1674 uint16_t _els_recv_dsd_a4732; 1675 uint16_t _els_recv_dsd_a6348; 1676 } out; 1677 } inout; 1678 #define els_bytecnt inout.in._els_bytecnt 1679 #define els_subcode1 inout.in._els_subcode1 1680 #define els_subcode2 inout.in._els_subcode2 1681 #define els_reserved4 inout.in._els_reserved4 1682 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1683 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1684 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1685 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1686 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1687 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1688 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1689 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1690 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1691 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1692 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1693 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1694 } els_t; 1695 1696 /* 1697 * A handy package structure for running FC-SCSI commands internally 1698 */ 1699 typedef struct { 1700 uint16_t handle; 1701 uint16_t lun; 1702 uint32_t 1703 channel : 8, 1704 portid : 24; 1705 uint32_t timeout; 1706 union { 1707 struct { 1708 uint32_t data_length; 1709 uint32_t 1710 no_wait : 1, 1711 do_read : 1; 1712 uint8_t cdb[16]; 1713 void *data_ptr; 1714 } beg; 1715 struct { 1716 uint32_t data_residual; 1717 uint8_t status; 1718 uint8_t pad; 1719 uint16_t sense_length; 1720 uint8_t sense_data[32]; 1721 } end; 1722 } fcd; 1723 } isp_xcmd_t; 1724 1725 /* 1726 * Target Mode related definitions 1727 */ 1728 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1729 #define QLTM_SVALID 0x80 1730 1731 /* 1732 * Structure for Enable Lun and Modify Lun queue entries 1733 */ 1734 typedef struct { 1735 isphdr_t le_header; 1736 uint32_t le_reserved; 1737 uint8_t le_lun; 1738 uint8_t le_rsvd; 1739 uint8_t le_ops; /* Modify LUN only */ 1740 uint8_t le_tgt; /* Not for FC */ 1741 uint32_t le_flags; /* Not for FC */ 1742 uint8_t le_status; 1743 uint8_t le_reserved2; 1744 uint8_t le_cmd_count; 1745 uint8_t le_in_count; 1746 uint8_t le_cdb6len; /* Not for FC */ 1747 uint8_t le_cdb7len; /* Not for FC */ 1748 uint16_t le_timeout; 1749 uint16_t le_reserved3[20]; 1750 } lun_entry_t; 1751 1752 /* 1753 * le_flags values 1754 */ 1755 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1756 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1757 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1758 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1759 1760 /* 1761 * le_ops values 1762 */ 1763 #define LUN_CCINCR 0x01 /* increment command count */ 1764 #define LUN_CCDECR 0x02 /* decrement command count */ 1765 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1766 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1767 1768 /* 1769 * le_status values 1770 */ 1771 #define LUN_OK 0x01 /* we be rockin' */ 1772 #define LUN_ERR 0x04 /* request completed with error */ 1773 #define LUN_INVAL 0x06 /* invalid request */ 1774 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1775 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1776 1777 /* 1778 * Immediate Notify Entry structure 1779 */ 1780 #define IN_MSGLEN 8 /* 8 bytes */ 1781 #define IN_RSVDLEN 8 /* 8 words */ 1782 typedef struct { 1783 isphdr_t in_header; 1784 uint32_t in_reserved; 1785 uint8_t in_lun; /* lun */ 1786 uint8_t in_iid; /* initiator */ 1787 uint8_t in_reserved2; 1788 uint8_t in_tgt; /* target */ 1789 uint32_t in_flags; 1790 uint8_t in_status; 1791 uint8_t in_rsvd2; 1792 uint8_t in_tag_val; /* tag value */ 1793 uint8_t in_tag_type; /* tag type */ 1794 uint16_t in_seqid; /* sequence id */ 1795 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1796 uint16_t in_reserved3[IN_RSVDLEN]; 1797 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1798 } in_entry_t; 1799 1800 typedef struct { 1801 isphdr_t in_header; 1802 uint32_t in_reserved; 1803 uint8_t in_lun; /* lun */ 1804 uint8_t in_iid; /* initiator */ 1805 uint16_t in_scclun; 1806 uint32_t in_reserved2; 1807 uint16_t in_status; 1808 uint16_t in_task_flags; 1809 uint16_t in_seqid; /* sequence id */ 1810 } in_fcentry_t; 1811 1812 typedef struct { 1813 isphdr_t in_header; 1814 uint32_t in_reserved; 1815 uint16_t in_iid; /* initiator */ 1816 uint16_t in_scclun; 1817 uint32_t in_reserved2; 1818 uint16_t in_status; 1819 uint16_t in_task_flags; 1820 uint16_t in_seqid; /* sequence id */ 1821 } in_fcentry_e_t; 1822 1823 /* 1824 * Values for the in_status field 1825 */ 1826 #define IN_REJECT 0x0D /* Message Reject message received */ 1827 #define IN_RESET 0x0E /* Bus Reset occurred */ 1828 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1829 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1830 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1831 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1832 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1833 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1834 #define IN_PORT_CHANGED 0x2A /* port changed */ 1835 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1836 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1837 #define IN_SRR_RCVD 0x45 /* SRR received */ 1838 1839 /* 1840 * Values for the in_task_flags field- should only get one at a time! 1841 */ 1842 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1843 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1844 #define TASK_FLAGS_TARGET_RESET (1<<13) 1845 #define TASK_FLAGS_LUN_RESET (1<<12) 1846 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1847 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1848 1849 /* 1850 * ISP24XX Immediate Notify 1851 */ 1852 typedef struct { 1853 isphdr_t in_header; 1854 uint32_t in_reserved; 1855 uint16_t in_nphdl; 1856 uint16_t in_reserved1; 1857 uint16_t in_flags; 1858 uint16_t in_srr_rxid; 1859 uint16_t in_status; 1860 uint8_t in_status_subcode; 1861 uint8_t in_fwhandle; 1862 uint32_t in_rxid; 1863 uint16_t in_srr_reloff_lo; 1864 uint16_t in_srr_reloff_hi; 1865 uint16_t in_srr_iu; 1866 uint16_t in_srr_oxid; 1867 /* 1868 * If bit 2 is set in in_flags, the N-Port and 1869 * handle tags are valid. If the received ELS is 1870 * a LOGO, then these tags contain the N Port ID 1871 * from the LOGO payload. If the received ELS 1872 * request is TPRLO, these tags contain the 1873 * Third Party Originator N Port ID. 1874 */ 1875 uint16_t in_nport_id_hi; 1876 #define in_prli_options in_nport_id_hi 1877 uint8_t in_nport_id_lo; 1878 uint8_t in_reserved3; 1879 uint16_t in_np_handle; 1880 uint8_t in_reserved4[12]; 1881 uint8_t in_reserved5; 1882 uint8_t in_vpidx; 1883 uint32_t in_reserved6; 1884 uint16_t in_portid_lo; 1885 uint8_t in_portid_hi; 1886 uint8_t in_reserved7; 1887 uint16_t in_reserved8; 1888 uint16_t in_oxid; 1889 } in_fcentry_24xx_t; 1890 1891 #define IN24XX_FLAG_PUREX_IOCB 0x1 1892 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1893 #define IN24XX_FLAG_NPHDL_VALID 0x4 1894 #define IN24XX_FLAG_N2N_PRLI 0x8 1895 #define IN24XX_FLAG_PN_NN_VALID 0x10 1896 1897 #define IN24XX_LIP_RESET 0x0E 1898 #define IN24XX_LINK_RESET 0x0F 1899 #define IN24XX_PORT_LOGOUT 0x29 1900 #define IN24XX_PORT_CHANGED 0x2A 1901 #define IN24XX_LINK_FAILED 0x2E 1902 #define IN24XX_SRR_RCVD 0x45 1903 #define IN24XX_ELS_RCVD 0x46 /* 1904 * login-affectin ELS received- check 1905 * subcode for specific opcode 1906 */ 1907 1908 /* 1909 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1910 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1911 * Big Endian format. 1912 */ 1913 #define IN24XX_PRLI_WWNN_OFF 0x18 1914 #define IN24XX_PRLI_WWPN_OFF 0x28 1915 #define IN24XX_PLOGI_WWNN_OFF 0x20 1916 #define IN24XX_PLOGI_WWPN_OFF 0x28 1917 1918 /* 1919 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1920 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1921 */ 1922 #define IN24XX_LOGO_WWPN_OFF 0x28 1923 1924 /* 1925 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1926 */ 1927 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1928 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1929 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1930 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1931 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1932 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1933 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1934 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1935 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1936 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1937 1938 /* 1939 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1940 */ 1941 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1942 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1943 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1944 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1945 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1946 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1947 1948 /* 1949 * Notify Acknowledge Entry structure 1950 */ 1951 #define NA_RSVDLEN 22 1952 typedef struct { 1953 isphdr_t na_header; 1954 uint32_t na_reserved; 1955 uint8_t na_lun; /* lun */ 1956 uint8_t na_iid; /* initiator */ 1957 uint8_t na_reserved2; 1958 uint8_t na_tgt; /* target */ 1959 uint32_t na_flags; 1960 uint8_t na_status; 1961 uint8_t na_event; 1962 uint16_t na_seqid; /* sequence id */ 1963 uint16_t na_reserved3[NA_RSVDLEN]; 1964 } na_entry_t; 1965 1966 /* 1967 * Value for the na_event field 1968 */ 1969 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1970 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1971 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1972 1973 #define NA2_RSVDLEN 21 1974 typedef struct { 1975 isphdr_t na_header; 1976 uint32_t na_reserved; 1977 uint8_t na_reserved1; 1978 uint8_t na_iid; /* initiator loop id */ 1979 uint16_t na_response; 1980 uint16_t na_flags; 1981 uint16_t na_reserved2; 1982 uint16_t na_status; 1983 uint16_t na_task_flags; 1984 uint16_t na_seqid; /* sequence id */ 1985 uint16_t na_reserved3[NA2_RSVDLEN]; 1986 } na_fcentry_t; 1987 1988 typedef struct { 1989 isphdr_t na_header; 1990 uint32_t na_reserved; 1991 uint16_t na_iid; /* initiator loop id */ 1992 uint16_t na_response; /* response code */ 1993 uint16_t na_flags; 1994 uint16_t na_reserved2; 1995 uint16_t na_status; 1996 uint16_t na_task_flags; 1997 uint16_t na_seqid; /* sequence id */ 1998 uint16_t na_reserved3[NA2_RSVDLEN]; 1999 } na_fcentry_e_t; 2000 2001 #define NAFC_RCOUNT 0x80 /* increment resource count */ 2002 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 2003 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 2004 2005 /* 2006 * ISP24XX Notify Acknowledge 2007 */ 2008 2009 typedef struct { 2010 isphdr_t na_header; 2011 uint32_t na_handle; 2012 uint16_t na_nphdl; 2013 uint16_t na_reserved1; 2014 uint16_t na_flags; 2015 uint16_t na_srr_rxid; 2016 uint16_t na_status; 2017 uint8_t na_status_subcode; 2018 uint8_t na_fwhandle; 2019 uint32_t na_rxid; 2020 uint16_t na_srr_reloff_lo; 2021 uint16_t na_srr_reloff_hi; 2022 uint16_t na_srr_iu; 2023 uint16_t na_srr_flags; 2024 uint8_t na_reserved3[18]; 2025 uint8_t na_reserved4; 2026 uint8_t na_vpidx; 2027 uint8_t na_srr_reject_vunique; 2028 uint8_t na_srr_reject_explanation; 2029 uint8_t na_srr_reject_code; 2030 uint8_t na_reserved5; 2031 uint8_t na_reserved6[6]; 2032 uint16_t na_oxid; 2033 } na_fcentry_24xx_t; 2034 2035 /* 2036 * Accept Target I/O Entry structure 2037 */ 2038 #define ATIO_CDBLEN 26 2039 2040 typedef struct { 2041 isphdr_t at_header; 2042 uint16_t at_reserved; 2043 uint16_t at_handle; 2044 uint8_t at_lun; /* lun */ 2045 uint8_t at_iid; /* initiator */ 2046 uint8_t at_cdblen; /* cdb length */ 2047 uint8_t at_tgt; /* target */ 2048 uint32_t at_flags; 2049 uint8_t at_status; /* firmware status */ 2050 uint8_t at_scsi_status; /* scsi status */ 2051 uint8_t at_tag_val; /* tag value */ 2052 uint8_t at_tag_type; /* tag type */ 2053 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2054 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2055 } at_entry_t; 2056 2057 /* 2058 * at_flags values 2059 */ 2060 #define AT_NODISC 0x00008000 /* disconnect disabled */ 2061 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2062 2063 /* 2064 * at_status values 2065 */ 2066 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2067 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2068 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2069 #define AT_NOCAP 0x16 /* Requested capability not available */ 2070 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2071 #define AT_CDB 0x3D /* CDB received */ 2072 /* 2073 * Macros to create and fetch and test concatenated handle and tag value macros 2074 * (SPI only) 2075 */ 2076 #define AT_MAKE_TAGID(tid, aep) \ 2077 tid = aep->at_handle; \ 2078 if (aep->at_flags & AT_TQAE) { \ 2079 tid |= (aep->at_tag_val << 16); \ 2080 tid |= (1 << 24); \ 2081 } 2082 2083 #define CT_MAKE_TAGID(tid, ct) \ 2084 tid = ct->ct_fwhandle; \ 2085 if (ct->ct_flags & CT_TQAE) { \ 2086 tid |= (ct->ct_tag_val << 16); \ 2087 tid |= (1 << 24); \ 2088 } 2089 2090 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2091 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2092 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2093 2094 #define IN_MAKE_TAGID(tid, inp) \ 2095 tid = inp->in_seqid; \ 2096 tid |= (inp->in_tag_val << 16); \ 2097 tid |= (1 << 24) 2098 2099 /* 2100 * Accept Target I/O Entry structure, Type 2 2101 */ 2102 #define ATIO2_CDBLEN 16 2103 2104 typedef struct { 2105 isphdr_t at_header; 2106 uint32_t at_reserved; 2107 uint8_t at_lun; /* lun or reserved */ 2108 uint8_t at_iid; /* initiator */ 2109 uint16_t at_rxid; /* response ID */ 2110 uint16_t at_flags; 2111 uint16_t at_status; /* firmware status */ 2112 uint8_t at_crn; /* command reference number */ 2113 uint8_t at_taskcodes; 2114 uint8_t at_taskflags; 2115 uint8_t at_execodes; 2116 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2117 uint32_t at_datalen; /* allocated data len */ 2118 uint16_t at_scclun; /* SCC Lun or reserved */ 2119 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2120 uint16_t at_reserved2[6]; 2121 uint16_t at_oxid; 2122 } at2_entry_t; 2123 2124 typedef struct { 2125 isphdr_t at_header; 2126 uint32_t at_reserved; 2127 uint16_t at_iid; /* initiator */ 2128 uint16_t at_rxid; /* response ID */ 2129 uint16_t at_flags; 2130 uint16_t at_status; /* firmware status */ 2131 uint8_t at_crn; /* command reference number */ 2132 uint8_t at_taskcodes; 2133 uint8_t at_taskflags; 2134 uint8_t at_execodes; 2135 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2136 uint32_t at_datalen; /* allocated data len */ 2137 uint16_t at_scclun; /* SCC Lun or reserved */ 2138 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2139 uint16_t at_reserved2[6]; 2140 uint16_t at_oxid; 2141 } at2e_entry_t; 2142 2143 #define ATIO2_WWPN_OFFSET 0x2A 2144 #define ATIO2_OXID_OFFSET 0x3E 2145 2146 #define ATIO2_TC_ATTR_MASK 0x7 2147 #define ATIO2_TC_ATTR_SIMPLEQ 0 2148 #define ATIO2_TC_ATTR_HEADOFQ 1 2149 #define ATIO2_TC_ATTR_ORDERED 2 2150 #define ATIO2_TC_ATTR_ACAQ 4 2151 #define ATIO2_TC_ATTR_UNTAGGED 5 2152 2153 #define ATIO2_EX_WRITE 0x1 2154 #define ATIO2_EX_READ 0x2 2155 /* 2156 * Macros to create and fetch and test concatenated handle and tag value macros 2157 */ 2158 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2159 tid = aep->at_rxid; \ 2160 tid |= (((uint64_t)inst) << 32); \ 2161 tid |= (((uint64_t)bus) << 48) 2162 2163 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2164 tid = ct->ct_rxid; \ 2165 tid |= (((uint64_t)inst) << 32); \ 2166 tid |= (((uint64_t)(bus & 0xff)) << 48) 2167 2168 #define AT2_HAS_TAG(val) 1 2169 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2170 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2171 #define AT2_GET_HANDLE AT2_GET_TAG 2172 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2173 2174 #define FC_HAS_TAG AT2_HAS_TAG 2175 #define FC_GET_TAG AT2_GET_TAG 2176 #define FC_GET_INST AT2_GET_INST 2177 #define FC_GET_HANDLE AT2_GET_HANDLE 2178 2179 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2180 tid = seqid; \ 2181 tid |= (((uint64_t)inst) << 32); \ 2182 tid |= (((uint64_t)(bus & 0xff)) << 48) 2183 2184 #define FC_TAG_INSERT_INST(tid, inst) \ 2185 tid &= ~0x0000ffff00000000ull; \ 2186 tid |= (((uint64_t)inst) << 32) 2187 2188 /* 2189 * 24XX ATIO Definition 2190 * 2191 * This is *quite* different from other entry types. 2192 * First of all, it has its own queue it comes in on. 2193 * 2194 * Secondly, it doesn't have a normal header. 2195 * 2196 * Thirdly, it's just a passthru of the FCP CMND IU 2197 * which is recorded in big endian mode. 2198 */ 2199 typedef struct { 2200 uint8_t at_type; 2201 uint8_t at_count; 2202 /* 2203 * Task attribute in high four bits, 2204 * the rest is the FCP CMND IU Length. 2205 * NB: the command can extend past the 2206 * length for a single queue entry. 2207 */ 2208 uint16_t at_ta_len; 2209 uint32_t at_rxid; 2210 fc_hdr_t at_hdr; 2211 fcp_cmnd_iu_t at_cmnd; 2212 } at7_entry_t; 2213 #define AT7_NORESRC_RXID 0xffffffff 2214 2215 2216 /* 2217 * Continue Target I/O Entry structure 2218 * Request from driver. The response from the 2219 * ISP firmware is the same except that the last 18 2220 * bytes are overwritten by suggested sense data if 2221 * the 'autosense valid' bit is set in the status byte. 2222 */ 2223 typedef struct { 2224 isphdr_t ct_header; 2225 uint16_t ct_syshandle; 2226 uint16_t ct_fwhandle; /* required by f/w */ 2227 uint8_t ct_lun; /* lun */ 2228 uint8_t ct_iid; /* initiator id */ 2229 uint8_t ct_reserved2; 2230 uint8_t ct_tgt; /* our target id */ 2231 uint32_t ct_flags; 2232 uint8_t ct_status; /* isp status */ 2233 uint8_t ct_scsi_status; /* scsi status */ 2234 uint8_t ct_tag_val; /* tag value */ 2235 uint8_t ct_tag_type; /* tag type */ 2236 uint32_t ct_xfrlen; /* transfer length */ 2237 uint32_t ct_resid; /* residual length */ 2238 uint16_t ct_timeout; 2239 uint16_t ct_seg_count; 2240 ispds_t ct_dataseg[ISP_RQDSEG]; 2241 } ct_entry_t; 2242 2243 /* 2244 * For some of the dual port SCSI adapters, port (bus #) is reported 2245 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2246 * 2247 * Note that this does not apply to FC adapters at all which can and 2248 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2249 * that have logged in across a SCSI fabric. 2250 */ 2251 #define GET_IID_VAL(x) (x & 0x3f) 2252 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2253 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2254 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2255 2256 /* 2257 * ct_flags values 2258 */ 2259 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2260 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2261 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2262 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2263 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2264 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2265 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2266 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2267 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2268 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2269 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2270 2271 /* 2272 * ct_status values 2273 * - set by the firmware when it returns the CTIO 2274 */ 2275 #define CT_OK 0x01 /* completed without error */ 2276 #define CT_ABORTED 0x02 /* aborted by host */ 2277 #define CT_ERR 0x04 /* see sense data for error */ 2278 #define CT_INVAL 0x06 /* request for disabled lun */ 2279 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2280 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2281 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2282 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2283 #define CT_TIMEOUT 0x0B /* timed out */ 2284 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2285 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2286 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2287 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2288 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2289 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2290 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2291 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2292 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2293 #define CT_LOGOUT 0x29 /* port logout */ 2294 #define CT_PORTCHANGED 0x2A /* port changed */ 2295 #define CT_IDE 0x33 /* Initiator Detected Error */ 2296 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2297 #define CT_SRR 0x45 /* SRR Received */ 2298 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2299 2300 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2301 2302 /* 2303 * When the firmware returns a CTIO entry, it may overwrite the last 2304 * part of the structure with sense data. This starts at offset 0x2E 2305 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2306 * than define a new struct for this, I'm just using the sense data 2307 * offset. 2308 */ 2309 #define CTIO_SENSE_OFFSET 0x2E 2310 2311 /* 2312 * Entry length in u_longs. All entries are the same size so 2313 * any one will do as the numerator. 2314 */ 2315 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2316 2317 /* 2318 * QLA2100 CTIO (type 2) entry 2319 */ 2320 #define MAXRESPLEN 26 2321 typedef struct { 2322 isphdr_t ct_header; 2323 uint32_t ct_syshandle; 2324 uint8_t ct_lun; /* lun */ 2325 uint8_t ct_iid; /* initiator id */ 2326 uint16_t ct_rxid; /* response ID */ 2327 uint16_t ct_flags; 2328 uint16_t ct_status; /* isp status */ 2329 uint16_t ct_timeout; 2330 uint16_t ct_seg_count; 2331 uint32_t ct_reloff; /* relative offset */ 2332 uint32_t ct_resid; /* residual length */ 2333 union { 2334 /* 2335 * The three different modes that the target driver 2336 * can set the CTIO{2,3,4} up as. 2337 * 2338 * The first is for sending FCP_DATA_IUs as well as 2339 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2340 * 2341 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2342 * Note that no FCP_DATA_IUs will be sent. 2343 * 2344 * The third is for sending FCP_RSP_IUs as built specifically 2345 * in system memory as located by the isp_dataseg. 2346 */ 2347 struct { 2348 uint32_t _reserved; 2349 uint16_t _reserved2; 2350 uint16_t ct_scsi_status; 2351 uint32_t ct_xfrlen; 2352 union { 2353 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2354 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2355 ispdslist_t ct_dslist; 2356 } u; 2357 } m0; 2358 struct { 2359 uint16_t _reserved; 2360 uint16_t _reserved2; 2361 uint16_t ct_senselen; 2362 uint16_t ct_scsi_status; 2363 uint16_t ct_resplen; 2364 uint8_t ct_resp[MAXRESPLEN]; 2365 } m1; 2366 struct { 2367 uint32_t _reserved; 2368 uint16_t _reserved2; 2369 uint16_t _reserved3; 2370 uint32_t ct_datalen; 2371 union { 2372 ispds_t ct_fcp_rsp_iudata_32; 2373 ispds64_t ct_fcp_rsp_iudata_64; 2374 } u; 2375 } m2; 2376 } rsp; 2377 } ct2_entry_t; 2378 2379 typedef struct { 2380 isphdr_t ct_header; 2381 uint32_t ct_syshandle; 2382 uint16_t ct_iid; /* initiator id */ 2383 uint16_t ct_rxid; /* response ID */ 2384 uint16_t ct_flags; 2385 uint16_t ct_status; /* isp status */ 2386 uint16_t ct_timeout; 2387 uint16_t ct_seg_count; 2388 uint32_t ct_reloff; /* relative offset */ 2389 uint32_t ct_resid; /* residual length */ 2390 union { 2391 struct { 2392 uint32_t _reserved; 2393 uint16_t _reserved2; 2394 uint16_t ct_scsi_status; 2395 uint32_t ct_xfrlen; 2396 union { 2397 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2398 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2399 ispdslist_t ct_dslist; 2400 } u; 2401 } m0; 2402 struct { 2403 uint16_t _reserved; 2404 uint16_t _reserved2; 2405 uint16_t ct_senselen; 2406 uint16_t ct_scsi_status; 2407 uint16_t ct_resplen; 2408 uint8_t ct_resp[MAXRESPLEN]; 2409 } m1; 2410 struct { 2411 uint32_t _reserved; 2412 uint16_t _reserved2; 2413 uint16_t _reserved3; 2414 uint32_t ct_datalen; 2415 union { 2416 ispds_t ct_fcp_rsp_iudata_32; 2417 ispds64_t ct_fcp_rsp_iudata_64; 2418 } u; 2419 } m2; 2420 } rsp; 2421 } ct2e_entry_t; 2422 2423 /* 2424 * ct_flags values for CTIO2 2425 */ 2426 #define CT2_FLAG_MODE0 0x0000 2427 #define CT2_FLAG_MODE1 0x0001 2428 #define CT2_FLAG_MODE2 0x0002 2429 #define CT2_FLAG_MMASK 0x0003 2430 #define CT2_DATA_IN 0x0040 /* *to* initiator */ 2431 #define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2432 #define CT2_NO_DATA 0x00C0 2433 #define CT2_DATAMASK 0x00C0 2434 #define CT2_CCINCR 0x0100 2435 #define CT2_FASTPOST 0x0200 2436 #define CT2_CONFIRM 0x2000 2437 #define CT2_TERMINATE 0x4000 2438 #define CT2_SENDSTATUS 0x8000 2439 2440 /* 2441 * ct_status values are (mostly) the same as that for ct_entry. 2442 */ 2443 2444 /* 2445 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2446 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2447 * fields. 2448 */ 2449 #define CT2_RSPLEN_VALID 0x0100 2450 #define CT2_SNSLEN_VALID 0x0200 2451 #define CT2_DATA_OVER 0x0400 2452 #define CT2_DATA_UNDER 0x0800 2453 2454 /* 2455 * ISP24XX CTIO 2456 */ 2457 #define MAXRESPLEN_24XX 24 2458 typedef struct { 2459 isphdr_t ct_header; 2460 uint32_t ct_syshandle; 2461 uint16_t ct_nphdl; /* status on returned CTIOs */ 2462 uint16_t ct_timeout; 2463 uint16_t ct_seg_count; 2464 uint8_t ct_vpidx; 2465 uint8_t ct_xflags; 2466 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2467 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2468 uint8_t ct_reserved; 2469 uint32_t ct_rxid; 2470 uint16_t ct_senselen; /* mode 1 only */ 2471 uint16_t ct_flags; 2472 uint32_t ct_resid; /* residual length */ 2473 uint16_t ct_oxid; 2474 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2475 union { 2476 struct { 2477 uint32_t reloff; 2478 uint32_t reserved0; 2479 uint32_t ct_xfrlen; 2480 uint32_t reserved1; 2481 ispds64_t ds; 2482 } m0; 2483 struct { 2484 uint16_t ct_resplen; 2485 uint16_t reserved; 2486 uint8_t ct_resp[MAXRESPLEN_24XX]; 2487 } m1; 2488 struct { 2489 uint32_t reserved0; 2490 uint32_t reserved1; 2491 uint32_t ct_datalen; 2492 uint32_t reserved2; 2493 ispds64_t ct_fcp_rsp_iudata; 2494 } m2; 2495 } rsp; 2496 } ct7_entry_t; 2497 2498 /* 2499 * ct_flags values for CTIO7 2500 */ 2501 #define CT7_NO_DATA 0x0000 2502 #define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2503 #define CT7_DATA_IN 0x0002 /* *to* initiator */ 2504 #define CT7_DATAMASK 0x3 2505 #define CT7_DSD_ENABLE 0x0004 2506 #define CT7_CONF_STSFD 0x0010 2507 #define CT7_EXPLCT_CONF 0x0020 2508 #define CT7_FLAG_MODE0 0x0000 2509 #define CT7_FLAG_MODE1 0x0040 2510 #define CT7_FLAG_MODE2 0x0080 2511 #define CT7_FLAG_MMASK 0x00C0 2512 #define CT7_NOACK 0x0100 2513 #define CT7_TASK_ATTR_SHIFT 9 2514 #define CT7_CONFIRM 0x2000 2515 #define CT7_TERMINATE 0x4000 2516 #define CT7_SENDSTATUS 0x8000 2517 2518 /* 2519 * Type 7 CTIO status codes 2520 */ 2521 #define CT7_OK 0x01 /* completed without error */ 2522 #define CT7_ABORTED 0x02 /* aborted by host */ 2523 #define CT7_ERR 0x04 /* see sense data for error */ 2524 #define CT7_INVAL 0x06 /* request for disabled lun */ 2525 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2526 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2527 #define CT7_TIMEOUT 0x0B /* timed out */ 2528 #define CT7_RESET 0x0E /* LIP Rset Received */ 2529 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2530 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2531 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2532 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2533 #define CT7_LOGOUT 0x29 /* port logout */ 2534 #define CT7_PORTCHANGED 0x2A /* port changed */ 2535 #define CT7_SRR 0x45 /* SRR Received */ 2536 2537 /* 2538 * Other 24XX related target IOCBs 2539 */ 2540 2541 /* 2542 * ABTS Received 2543 */ 2544 typedef struct { 2545 isphdr_t abts_header; 2546 uint8_t abts_reserved0[6]; 2547 uint16_t abts_nphdl; 2548 uint16_t abts_reserved1; 2549 uint16_t abts_sof; 2550 uint32_t abts_rxid_abts; 2551 uint16_t abts_did_lo; 2552 uint8_t abts_did_hi; 2553 uint8_t abts_r_ctl; 2554 uint16_t abts_sid_lo; 2555 uint8_t abts_sid_hi; 2556 uint8_t abts_cs_ctl; 2557 uint16_t abts_fs_ctl; 2558 uint8_t abts_f_ctl; 2559 uint8_t abts_type; 2560 uint16_t abts_seq_cnt; 2561 uint8_t abts_df_ctl; 2562 uint8_t abts_seq_id; 2563 uint16_t abts_rx_id; 2564 uint16_t abts_ox_id; 2565 uint32_t abts_param; 2566 uint8_t abts_reserved2[16]; 2567 uint32_t abts_rxid_task; 2568 } abts_t; 2569 2570 typedef struct { 2571 isphdr_t abts_rsp_header; 2572 uint32_t abts_rsp_handle; 2573 uint16_t abts_rsp_status; 2574 uint16_t abts_rsp_nphdl; 2575 uint16_t abts_rsp_ctl_flags; 2576 uint16_t abts_rsp_sof; 2577 uint32_t abts_rsp_rxid_abts; 2578 uint16_t abts_rsp_did_lo; 2579 uint8_t abts_rsp_did_hi; 2580 uint8_t abts_rsp_r_ctl; 2581 uint16_t abts_rsp_sid_lo; 2582 uint8_t abts_rsp_sid_hi; 2583 uint8_t abts_rsp_cs_ctl; 2584 uint16_t abts_rsp_f_ctl_lo; 2585 uint8_t abts_rsp_f_ctl_hi; 2586 uint8_t abts_rsp_type; 2587 uint16_t abts_rsp_seq_cnt; 2588 uint8_t abts_rsp_df_ctl; 2589 uint8_t abts_rsp_seq_id; 2590 uint16_t abts_rsp_rx_id; 2591 uint16_t abts_rsp_ox_id; 2592 uint32_t abts_rsp_param; 2593 union { 2594 struct { 2595 uint16_t reserved; 2596 uint8_t last_seq_id; 2597 uint8_t seq_id_valid; 2598 uint16_t aborted_rx_id; 2599 uint16_t aborted_ox_id; 2600 uint16_t high_seq_cnt; 2601 uint16_t low_seq_cnt; 2602 uint8_t reserved2[4]; 2603 } ba_acc; 2604 struct { 2605 uint8_t vendor_unique; 2606 uint8_t explanation; 2607 uint8_t reason; 2608 uint8_t reserved; 2609 uint8_t reserved2[12]; 2610 } ba_rjt; 2611 struct { 2612 uint8_t reserved[8]; 2613 uint32_t subcode1; 2614 uint32_t subcode2; 2615 } rsp; 2616 uint8_t reserved[16]; 2617 } abts_rsp_payload; 2618 uint32_t abts_rsp_rxid_task; 2619 } abts_rsp_t; 2620 2621 /* terminate this ABTS exchange */ 2622 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2623 2624 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2625 #define ISP24XX_ABTS_RSP_RESET 0x04 2626 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2627 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2628 #define ISP24XX_ABTS_RSP_INVXID 0x08 2629 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2630 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2631 2632 #define ISP24XX_NO_TASK 0xffffffff 2633 2634 /* 2635 * Miscellaneous 2636 * 2637 * These are the limits of the number of dma segments we 2638 * can deal with based not on the size of the segment counter 2639 * (which is 16 bits), but on the size of the number of 2640 * queue entries field (which is 8 bits). We assume no 2641 * segments in the first queue entry, so we can either 2642 * have 7 dma segments per continuation entry or 5 2643 * (for 64 bit dma).. multiplying out by 254.... 2644 */ 2645 #define ISP_NSEG_MAX 1778 2646 #define ISP_NSEG64_MAX 1270 2647 2648 #endif /* _ISPMBOX_H */ 2649