xref: /freebsd/sys/dev/isp/ispmbox.h (revision 23f282aa31e9b6fceacd449020e936e98d6f2298)
1 /* $FreeBSD$ */
2 /*
3  * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
4  *
5  *---------------------------------------
6  * Copyright (c) 1997, 1998, 1999 by Matthew Jacob
7  * NASA/Ames Research Center
8  * All rights reserved.
9  *---------------------------------------
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice immediately at the beginning of the file, without modification,
16  *    this list of conditions, and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
27  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  */
36 #ifndef	_ISPMBOX_H
37 #define	_ISPMBOX_H
38 
39 /*
40  * Mailbox Command Opcodes
41  */
42 
43 #define MBOX_NO_OP			0x0000
44 #define MBOX_LOAD_RAM			0x0001
45 #define MBOX_EXEC_FIRMWARE		0x0002
46 #define MBOX_DUMP_RAM			0x0003
47 #define MBOX_WRITE_RAM_WORD		0x0004
48 #define MBOX_READ_RAM_WORD		0x0005
49 #define MBOX_MAILBOX_REG_TEST		0x0006
50 #define MBOX_VERIFY_CHECKSUM		0x0007
51 #define MBOX_ABOUT_FIRMWARE		0x0008
52 					/*   9 */
53 					/*   a */
54 					/*   b */
55 					/*   c */
56 					/*   d */
57 #define MBOX_CHECK_FIRMWARE		0x000e
58 					/*   f */
59 #define MBOX_INIT_REQ_QUEUE		0x0010
60 #define MBOX_INIT_RES_QUEUE		0x0011
61 #define MBOX_EXECUTE_IOCB		0x0012
62 #define MBOX_WAKE_UP			0x0013
63 #define MBOX_STOP_FIRMWARE		0x0014
64 #define MBOX_ABORT			0x0015
65 #define MBOX_ABORT_DEVICE		0x0016
66 #define MBOX_ABORT_TARGET		0x0017
67 #define MBOX_BUS_RESET			0x0018
68 #define MBOX_STOP_QUEUE			0x0019
69 #define MBOX_START_QUEUE		0x001a
70 #define MBOX_SINGLE_STEP_QUEUE		0x001b
71 #define MBOX_ABORT_QUEUE		0x001c
72 #define MBOX_GET_DEV_QUEUE_STATUS	0x001d
73 					/*  1e */
74 #define MBOX_GET_FIRMWARE_STATUS	0x001f
75 #define MBOX_GET_INIT_SCSI_ID		0x0020
76 #define MBOX_GET_SELECT_TIMEOUT		0x0021
77 #define MBOX_GET_RETRY_COUNT		0x0022
78 #define MBOX_GET_TAG_AGE_LIMIT		0x0023
79 #define MBOX_GET_CLOCK_RATE		0x0024
80 #define MBOX_GET_ACT_NEG_STATE		0x0025
81 #define MBOX_GET_ASYNC_DATA_SETUP_TIME	0x0026
82 #define MBOX_GET_SBUS_PARAMS		0x0027
83 #define MBOX_GET_TARGET_PARAMS		0x0028
84 #define MBOX_GET_DEV_QUEUE_PARAMS	0x0029
85 #define	MBOX_GET_RESET_DELAY_PARAMS	0x002a
86 					/*  2b */
87 					/*  2c */
88 					/*  2d */
89 					/*  2e */
90 					/*  2f */
91 #define MBOX_SET_INIT_SCSI_ID		0x0030
92 #define MBOX_SET_SELECT_TIMEOUT		0x0031
93 #define MBOX_SET_RETRY_COUNT		0x0032
94 #define MBOX_SET_TAG_AGE_LIMIT		0x0033
95 #define MBOX_SET_CLOCK_RATE		0x0034
96 #define MBOX_SET_ACT_NEG_STATE		0x0035
97 #define MBOX_SET_ASYNC_DATA_SETUP_TIME	0x0036
98 #define MBOX_SET_SBUS_CONTROL_PARAMS	0x0037
99 #define		MBOX_SET_PCI_PARAMETERS	0x0037
100 #define MBOX_SET_TARGET_PARAMS		0x0038
101 #define MBOX_SET_DEV_QUEUE_PARAMS	0x0039
102 #define	MBOX_SET_RESET_DELAY_PARAMS	0x003a
103 					/*  3b */
104 					/*  3c */
105 					/*  3d */
106 					/*  3e */
107 					/*  3f */
108 #define	MBOX_RETURN_BIOS_BLOCK_ADDR	0x0040
109 #define	MBOX_WRITE_FOUR_RAM_WORDS	0x0041
110 #define	MBOX_EXEC_BIOS_IOCB		0x0042
111 #define	MBOX_SET_FW_FEATURES		0x004a
112 #define	MBOX_GET_FW_FEATURES		0x004b
113 #define		FW_FEATURE_LVD_NOTIFY	0x2
114 #define		FW_FEATURE_FAST_POST	0x1
115 
116 #define	MBOX_ENABLE_TARGET_MODE		0x55
117 #define		ENABLE_TARGET_FLAG	0x8000
118 
119 /* These are for the ISP2100 FC cards */
120 #define	MBOX_GET_LOOP_ID		0x20
121 #define	MBOX_EXEC_COMMAND_IOCB_A64	0x54
122 #define	MBOX_INIT_FIRMWARE		0x60
123 #define	MBOX_GET_INIT_CONTROL_BLOCK	0x61
124 #define	MBOX_INIT_LIP			0x62
125 #define	MBOX_GET_FC_AL_POSITION_MAP	0x63
126 #define	MBOX_GET_PORT_DB		0x64
127 #define	MBOX_CLEAR_ACA			0x65
128 #define	MBOX_TARGET_RESET		0x66
129 #define	MBOX_CLEAR_TASK_SET		0x67
130 #define	MBOX_ABORT_TASK_SET		0x68
131 #define	MBOX_GET_FW_STATE		0x69
132 #define	MBOX_GET_PORT_NAME		0x6a
133 #define	MBOX_GET_LINK_STATUS		0x6b
134 #define	MBOX_INIT_LIP_RESET		0x6c
135 #define	MBOX_SEND_SNS			0x6e
136 #define	MBOX_FABRIC_LOGIN		0x6f
137 #define	MBOX_SEND_CHANGE_REQUEST	0x70
138 #define	MBOX_FABRIC_LOGOUT		0x71
139 #define	MBOX_INIT_LIP_LOGIN		0x72
140 
141 #define	ISP2100_SET_PCI_PARAM		0x00ff
142 
143 #define	MBOX_BUSY			0x04
144 
145 typedef struct {
146 	u_int16_t param[8];
147 } mbreg_t;
148 
149 /*
150  * Mailbox Command Complete Status Codes
151  */
152 #define	MBOX_COMMAND_COMPLETE		0x4000
153 #define	MBOX_INVALID_COMMAND		0x4001
154 #define	MBOX_HOST_INTERFACE_ERROR	0x4002
155 #define	MBOX_TEST_FAILED		0x4003
156 #define	MBOX_COMMAND_ERROR		0x4005
157 #define	MBOX_COMMAND_PARAM_ERROR	0x4006
158 #define	MBOX_PORT_ID_USED		0x4007
159 #define	MBOX_LOOP_ID_USED		0x4008
160 #define	MBOX_ALL_IDS_USED		0x4009
161 #define	MBOX_NOT_LOGGED_IN		0x400A
162 
163 /*
164  * Asynchronous event status codes
165  */
166 #define	ASYNC_BUS_RESET			0x8001
167 #define	ASYNC_SYSTEM_ERROR		0x8002
168 #define	ASYNC_RQS_XFER_ERR		0x8003
169 #define	ASYNC_RSP_XFER_ERR		0x8004
170 #define	ASYNC_QWAKEUP			0x8005
171 #define	ASYNC_TIMEOUT_RESET		0x8006
172 #define	ASYNC_DEVICE_RESET		0x8007
173 #define	ASYNC_EXTMSG_UNDERRUN		0x800A
174 #define	ASYNC_SCAM_INT			0x800B
175 #define	ASYNC_HUNG_SCSI			0x800C
176 #define	ASYNC_KILLED_BUS		0x800D
177 #define	ASYNC_BUS_TRANSIT		0x800E	/* LVD -> HVD, eg. */
178 #define	ASYNC_CMD_CMPLT			0x8020
179 #define	ASYNC_CTIO_DONE			0x8021
180 
181 /* for ISP2100 only */
182 #define	ASYNC_LIP_OCCURRED		0x8010
183 #define	ASYNC_LOOP_UP			0x8011
184 #define	ASYNC_LOOP_DOWN			0x8012
185 #define	ASYNC_LOOP_RESET		0x8013
186 #define	ASYNC_PDB_CHANGED		0x8014
187 #define	ASYNC_CHANGE_NOTIFY		0x8015
188 
189 /* for ISP2200 only */
190 #define	ASYNC_PTPMODE			0x8030
191 #define	ASYNC_CONNMODE			0x8036
192 #define		ISP_CONN_LOOP		1
193 #define		ISP_CONN_PTP		2
194 #define		ISP_CONN_BADLIP		3
195 #define		ISP_CONN_FATAL		4
196 #define		ISP_CONN_LOOPBACK	5
197 
198 /*
199  * Command Structure Definitions
200  */
201 
202 typedef struct {
203 	u_int32_t	ds_base;
204 	u_int32_t	ds_count;
205 } ispds_t;
206 
207 #define	_ISP_SWAP8(a, b)	{	\
208 	u_int8_t tmp;			\
209 	tmp = a;			\
210 	a = b;				\
211 	b = tmp;			\
212 }
213 
214 /*
215  * These elements get swizzled around for SBus instances.
216  */
217 typedef struct {
218 	u_int8_t	rqs_entry_type;
219 	u_int8_t	rqs_entry_count;
220 	u_int8_t	rqs_seqno;
221 	u_int8_t	rqs_flags;
222 } isphdr_t;
223 /*
224  * There are no (for all intents and purposes) non-sparc SBus machines
225  */
226 #ifdef	__sparc__
227 #define	ISP_SBUSIFY_ISPHDR(isp, hdrp)					\
228     if ((isp)->isp_bustype == ISP_BT_SBUS) {				\
229 	_ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type);	\
230 	_ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno);		\
231     }
232 #else
233 #define	ISP_SBUSIFY_ISPHDR(a, b)
234 #endif
235 
236 /* RQS Flag definitions */
237 #define	RQSFLAG_CONTINUATION	0x01
238 #define	RQSFLAG_FULL		0x02
239 #define	RQSFLAG_BADHEADER	0x04
240 #define	RQSFLAG_BADPACKET	0x08
241 
242 /* RQS entry_type definitions */
243 #define	RQSTYPE_REQUEST		0x01
244 #define	RQSTYPE_DATASEG		0x02
245 #define	RQSTYPE_RESPONSE	0x03
246 #define	RQSTYPE_MARKER		0x04
247 #define	RQSTYPE_CMDONLY		0x05
248 #define	RQSTYPE_ATIO		0x06	/* Target Mode */
249 #define	RQSTYPE_CTIO		0x07	/* Target Mode */
250 #define	RQSTYPE_SCAM		0x08
251 #define	RQSTYPE_A64		0x09
252 #define	RQSTYPE_A64_CONT	0x0a
253 #define	RQSTYPE_ENABLE_LUN	0x0b	/* Target Mode */
254 #define	RQSTYPE_MODIFY_LUN	0x0c	/* Target Mode */
255 #define	RQSTYPE_NOTIFY		0x0d	/* Target Mode */
256 #define	RQSTYPE_NOTIFY_ACK	0x0e	/* Target Mode */
257 #define	RQSTYPE_CTIO1		0x0f	/* Target Mode */
258 #define	RQSTYPE_STATUS_CONT	0x10
259 #define	RQSTYPE_T2RQS		0x11
260 
261 #define	RQSTYPE_T4RQS		0x15
262 #define	RQSTYPE_ATIO2		0x16
263 #define	RQSTYPE_CTIO2		0x17
264 #define	RQSTYPE_CSET0		0x18
265 #define	RQSTYPE_T3RQS		0x19
266 
267 #define	RQSTYPE_CTIO3		0x1f
268 
269 
270 #define	ISP_RQDSEG	4
271 typedef struct {
272 	isphdr_t	req_header;
273 	u_int32_t	req_handle;
274 	u_int8_t	req_lun_trn;
275 	u_int8_t	req_target;
276 	u_int16_t	req_cdblen;
277 #define	req_modifier	req_cdblen	/* marker packet */
278 	u_int16_t	req_flags;
279 	u_int16_t	req_reserved;
280 	u_int16_t	req_time;
281 	u_int16_t	req_seg_count;
282 	u_int8_t	req_cdb[12];
283 	ispds_t		req_dataseg[ISP_RQDSEG];
284 } ispreq_t;
285 
286 /*
287  * A request packet can also be a marker packet.
288  */
289 #define SYNC_DEVICE	0
290 #define SYNC_TARGET	1
291 #define SYNC_ALL	2
292 
293 /*
294  * There are no (for all intents and purposes) non-sparc SBus machines
295  */
296 #ifdef	__sparc__
297 #define	ISP_SBUSIFY_ISPREQ(isp, rqp)					\
298     if ((isp)->isp_bustype == ISP_BT_SBUS) {				\
299 	_ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn);		\
300     }
301 #else
302 #define	ISP_SBUSIFY_ISPREQ(a, b)
303 #endif
304 
305 #define	ISP_RQDSEG_T2	3
306 typedef struct {
307 	isphdr_t	req_header;
308 	u_int32_t	req_handle;
309 	u_int8_t	req_lun_trn;
310 	u_int8_t	req_target;
311 	u_int16_t	req_scclun;
312 	u_int16_t	req_flags;
313 	u_int16_t	_res2;
314 	u_int16_t	req_time;
315 	u_int16_t	req_seg_count;
316 	u_int32_t	req_cdb[4];
317 	u_int32_t	req_totalcnt;
318 	ispds_t		req_dataseg[ISP_RQDSEG_T2];
319 } ispreqt2_t;
320 
321 /* req_flag values */
322 #define	REQFLAG_NODISCON	0x0001
323 #define	REQFLAG_HTAG		0x0002
324 #define	REQFLAG_OTAG		0x0004
325 #define	REQFLAG_STAG		0x0008
326 #define	REQFLAG_TARGET_RTN	0x0010
327 
328 #define	REQFLAG_NODATA		0x0000
329 #define	REQFLAG_DATA_IN		0x0020
330 #define	REQFLAG_DATA_OUT	0x0040
331 #define	REQFLAG_DATA_UNKNOWN	0x0060
332 
333 #define	REQFLAG_DISARQ		0x0100
334 #define	REQFLAG_FRC_ASYNC	0x0200
335 #define	REQFLAG_FRC_SYNC	0x0400
336 #define	REQFLAG_FRC_WIDE	0x0800
337 #define	REQFLAG_NOPARITY	0x1000
338 #define	REQFLAG_STOPQ		0x2000
339 #define	REQFLAG_XTRASNS		0x4000
340 #define	REQFLAG_PRIORITY	0x8000
341 
342 typedef struct {
343 	isphdr_t	req_header;
344 	u_int32_t	req_handle;
345 	u_int8_t	req_lun_trn;
346 	u_int8_t	req_target;
347 	u_int16_t	req_cdblen;
348 	u_int16_t	req_flags;
349 	u_int16_t	_res1;
350 	u_int16_t	req_time;
351 	u_int16_t	req_seg_count;
352 	u_int8_t	req_cdb[44];
353 } ispextreq_t;
354 
355 #define	ISP_CDSEG	7
356 typedef struct {
357 	isphdr_t	req_header;
358 	u_int32_t	_res1;
359 	ispds_t		req_dataseg[ISP_CDSEG];
360 } ispcontreq_t;
361 
362 typedef struct {
363 	isphdr_t	req_header;
364 	u_int32_t	req_handle;
365 	u_int16_t	req_scsi_status;
366 	u_int16_t	req_completion_status;
367 	u_int16_t	req_state_flags;
368 	u_int16_t	req_status_flags;
369 	u_int16_t	req_time;
370 #define	req_response_len	req_time	/* FC only */
371 	u_int16_t	req_sense_len;
372 	u_int32_t	req_resid;
373 	u_int8_t	_res1[8];
374 	u_int8_t	req_sense_data[32];
375 } ispstatusreq_t;
376 
377 /*
378  * For Qlogic 2100, the high order byte of SCSI status has
379  * additional meaning.
380  */
381 #define	RQCS_RU	0x800	/* Residual Under */
382 #define	RQCS_RO	0x400	/* Residual Over */
383 #define	RQCS_SV	0x200	/* Sense Length Valid */
384 #define	RQCS_RV	0x100	/* Residual Valid */
385 
386 /*
387  * Completion Status Codes.
388  */
389 #define RQCS_COMPLETE			0x0000
390 #define RQCS_INCOMPLETE			0x0001
391 #define RQCS_DMA_ERROR			0x0002
392 #define RQCS_TRANSPORT_ERROR		0x0003
393 #define RQCS_RESET_OCCURRED		0x0004
394 #define RQCS_ABORTED			0x0005
395 #define RQCS_TIMEOUT			0x0006
396 #define RQCS_DATA_OVERRUN		0x0007
397 #define RQCS_COMMAND_OVERRUN		0x0008
398 #define RQCS_STATUS_OVERRUN		0x0009
399 #define RQCS_BAD_MESSAGE		0x000a
400 #define RQCS_NO_MESSAGE_OUT		0x000b
401 #define RQCS_EXT_ID_FAILED		0x000c
402 #define RQCS_IDE_MSG_FAILED		0x000d
403 #define RQCS_ABORT_MSG_FAILED		0x000e
404 #define RQCS_REJECT_MSG_FAILED		0x000f
405 #define RQCS_NOP_MSG_FAILED		0x0010
406 #define RQCS_PARITY_ERROR_MSG_FAILED	0x0011
407 #define RQCS_DEVICE_RESET_MSG_FAILED	0x0012
408 #define RQCS_ID_MSG_FAILED		0x0013
409 #define RQCS_UNEXP_BUS_FREE		0x0014
410 #define RQCS_DATA_UNDERRUN		0x0015
411 #define	RQCS_XACT_ERR1			0x0018
412 #define	RQCS_XACT_ERR2			0x0019
413 #define	RQCS_XACT_ERR3			0x001A
414 #define	RQCS_BAD_ENTRY			0x001B
415 #define	RQCS_QUEUE_FULL			0x001C
416 #define	RQCS_PHASE_SKIPPED		0x001D
417 #define	RQCS_ARQS_FAILED		0x001E
418 #define	RQCS_WIDE_FAILED		0x001F
419 #define	RQCS_SYNCXFER_FAILED		0x0020
420 #define	RQCS_LVD_BUSERR			0x0021
421 
422 /* 2100 Only Completion Codes */
423 #define	RQCS_PORT_UNAVAILABLE		0x0028
424 #define	RQCS_PORT_LOGGED_OUT		0x0029
425 #define	RQCS_PORT_CHANGED		0x002A
426 #define	RQCS_PORT_BUSY			0x002B
427 
428 /*
429  * State Flags (not applicable to 2100)
430  */
431 #define RQSF_GOT_BUS			0x0100
432 #define RQSF_GOT_TARGET			0x0200
433 #define RQSF_SENT_CDB			0x0400
434 #define RQSF_XFRD_DATA			0x0800
435 #define RQSF_GOT_STATUS			0x1000
436 #define RQSF_GOT_SENSE			0x2000
437 #define	RQSF_XFER_COMPLETE		0x4000
438 
439 /*
440  * Status Flags (not applicable to 2100)
441  */
442 #define RQSTF_DISCONNECT		0x0001
443 #define RQSTF_SYNCHRONOUS		0x0002
444 #define RQSTF_PARITY_ERROR		0x0004
445 #define RQSTF_BUS_RESET			0x0008
446 #define RQSTF_DEVICE_RESET		0x0010
447 #define RQSTF_ABORTED			0x0020
448 #define RQSTF_TIMEOUT			0x0040
449 #define RQSTF_NEGOTIATION		0x0080
450 
451 /*
452  * FC (ISP2100) specific data structures
453  */
454 
455 /*
456  * Initialization Control Block
457  *
458  * Version One (prime) format.
459  */
460 typedef struct isp_icb {
461 	u_int8_t	icb_version;
462 	u_int8_t	_reserved0;
463 	u_int16_t	icb_fwoptions;
464 	u_int16_t	icb_maxfrmlen;
465 	u_int16_t	icb_maxalloc;
466 	u_int16_t	icb_execthrottle;
467 	u_int8_t	icb_retry_count;
468 	u_int8_t	icb_retry_delay;
469 	u_int8_t	icb_portname[8];
470 	u_int16_t	icb_hardaddr;
471 	u_int8_t	icb_iqdevtype;
472 	u_int8_t	icb_logintime;
473 	u_int8_t	icb_nodename[8];
474 	u_int16_t	icb_rqstout;
475 	u_int16_t	icb_rspnsin;
476 	u_int16_t	icb_rqstqlen;
477 	u_int16_t	icb_rsltqlen;
478 	u_int16_t	icb_rqstaddr[4];
479 	u_int16_t	icb_respaddr[4];
480 	u_int16_t	icb_lunenables;
481 	u_int8_t	icb_ccnt;
482 	u_int8_t	icb_icnt;
483 	u_int16_t	icb_lunetimeout;
484 	u_int16_t	_reserved1;
485 	u_int16_t	icb_xfwoptions;
486 	u_int8_t	icb_racctimer;
487 	u_int8_t	icb_idelaytimer;
488 	u_int16_t	icb_zfwoptions;
489 	u_int16_t	_reserved2[13];
490 } isp_icb_t;
491 #define	ICB_VERSION1	1
492 
493 #define	ICBOPT_HARD_ADDRESS	0x0001
494 #define	ICBOPT_FAIRNESS		0x0002
495 #define	ICBOPT_FULL_DUPLEX	0x0004
496 #define	ICBOPT_FAST_POST	0x0008
497 #define	ICBOPT_TGT_ENABLE	0x0010
498 #define	ICBOPT_INI_DISABLE	0x0020
499 #define	ICBOPT_INI_ADISC	0x0040
500 #define	ICBOPT_INI_TGTTYPE	0x0080
501 #define	ICBOPT_PDBCHANGE_AE	0x0100
502 #define	ICBOPT_NOLIP		0x0200
503 #define	ICBOPT_SRCHDOWN		0x0400
504 #define	ICBOPT_PREVLOOP		0x0800
505 #define	ICBOPT_STOP_ON_QFULL	0x1000
506 #define	ICBOPT_FULL_LOGIN	0x2000
507 #define	ICBOPT_USE_PORTNAME	0x4000
508 #define	ICBOPT_EXTENDED		0x8000
509 
510 #define	ICBXOPT_CLASS2_ACK0	0x0200
511 #define	ICBXOPT_CLASS2		0x0100
512 #define	ICBXOPT_LOOP_ONLY	(0 << 4)
513 #define	ICBXOPT_PTP_ONLY	(1 << 4)
514 #define	ICBXOPT_LOOP_2_PTP	(2 << 4)
515 #define	ICBXOPT_PTP_2_LOOP	(3 << 4)
516 
517 #define	ICBXOPT_RIO_OFF		0
518 #define	ICBXOPT_RIO_16BIT	1
519 #define	ICBXOPT_RIO_32BIT	2
520 #define	ICBXOPT_RIO_16BIT_DELAY	3
521 #define	ICBXOPT_RIO_32BIT_DELAY	4
522 
523 
524 
525 #define	ICB_MIN_FRMLEN		256
526 #define	ICB_MAX_FRMLEN		2112
527 #define	ICB_DFLT_FRMLEN		1024
528 #define	ICB_DFLT_ALLOC		256
529 #define	ICB_DFLT_THROTTLE	16
530 #define	ICB_DFLT_RDELAY		5
531 #define	ICB_DFLT_RCOUNT		3
532 
533 
534 #define	RQRSP_ADDR0015	0
535 #define	RQRSP_ADDR1631	1
536 #define	RQRSP_ADDR3247	2
537 #define	RQRSP_ADDR4863	3
538 
539 
540 #define	ICB_NNM0	7
541 #define	ICB_NNM1	6
542 #define	ICB_NNM2	5
543 #define	ICB_NNM3	4
544 #define	ICB_NNM4	3
545 #define	ICB_NNM5	2
546 #define	ICB_NNM6	1
547 #define	ICB_NNM7	0
548 
549 #define	MAKE_NODE_NAME_FROM_WWN(array, wwn)	\
550 	array[ICB_NNM0] = (u_int8_t) ((wwn >>  0) & 0xff), \
551 	array[ICB_NNM1] = (u_int8_t) ((wwn >>  8) & 0xff), \
552 	array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \
553 	array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \
554 	array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \
555 	array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \
556 	array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \
557 	array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff)
558 
559 /*
560  * Port Data Base Element
561  */
562 
563 typedef struct {
564 	u_int16_t	pdb_options;
565 	u_int8_t	pdb_mstate;
566 	u_int8_t	pdb_sstate;
567 #define	BITS2WORD(x)	(x)[0] << 16 | (x)[3] << 8 | (x)[2]
568 	u_int8_t	pdb_hardaddr_bits[4];
569 	u_int8_t	pdb_portid_bits[4];
570 	u_int8_t	pdb_nodename[8];
571 	u_int8_t	pdb_portname[8];
572 	u_int16_t	pdb_execthrottle;
573 	u_int16_t	pdb_exec_count;
574 	u_int8_t	pdb_retry_count;
575 	u_int8_t	pdb_retry_delay;
576 	u_int16_t	pdb_resalloc;
577 	u_int16_t	pdb_curalloc;
578 	u_int16_t	pdb_qhead;
579 	u_int16_t	pdb_qtail;
580 	u_int16_t	pdb_tl_next;
581 	u_int16_t	pdb_tl_last;
582 	u_int16_t	pdb_features;	/* PLOGI, Common Service */
583 	u_int16_t	pdb_pconcurrnt;	/* PLOGI, Common Service */
584 	u_int16_t	pdb_roi;	/* PLOGI, Common Service */
585 	u_int8_t	pdb_target;
586 	u_int8_t	pdb_initiator;	/* PLOGI, Class 3 Control Flags */
587 	u_int16_t	pdb_rdsiz;	/* PLOGI, Class 3 */
588 	u_int16_t	pdb_ncseq;	/* PLOGI, Class 3 */
589 	u_int16_t	pdb_noseq;	/* PLOGI, Class 3 */
590 	u_int16_t	pdb_labrtflg;
591 	u_int16_t	pdb_lstopflg;
592 	u_int16_t	pdb_sqhead;
593 	u_int16_t	pdb_sqtail;
594 	u_int16_t	pdb_ptimer;
595 	u_int16_t	pdb_nxt_seqid;
596 	u_int16_t	pdb_fcount;
597 	u_int16_t	pdb_prli_len;
598 	u_int16_t	pdb_prli_svc0;
599 	u_int16_t	pdb_prli_svc3;
600 	u_int16_t	pdb_loopid;
601 	u_int16_t	pdb_il_ptr;
602 	u_int16_t	pdb_sl_ptr;
603 } isp_pdb_t;
604 
605 #define	PDB_OPTIONS_XMITTING	(1<<11)
606 #define	PDB_OPTIONS_LNKXMIT	(1<<10)
607 #define	PDB_OPTIONS_ABORTED	(1<<9)
608 #define	PDB_OPTIONS_ADISC	(1<<1)
609 
610 #define	PDB_STATE_DISCOVERY	0
611 #define	PDB_STATE_WDISC_ACK	1
612 #define	PDB_STATE_PLOGI		2
613 #define	PDB_STATE_PLOGI_ACK	3
614 #define	PDB_STATE_PRLI		4
615 #define	PDB_STATE_PRLI_ACK	5
616 #define	PDB_STATE_LOGGED_IN	6
617 #define	PDB_STATE_PORT_UNAVAIL	7
618 #define	PDB_STATE_PRLO		8
619 #define	PDB_STATE_PRLO_ACK	9
620 #define	PDB_STATE_PLOGO		10
621 #define	PDB_STATE_PLOG_ACK	11
622 
623 #define		SVC3_TGT_ROLE		0x10
624 #define 	SVC3_INI_ROLE		0x20
625 #define			SVC3_ROLE_MASK	0x30
626 #define			SVC3_ROLE_SHIFT	4
627 
628 #define	SNS_GAN	0x100
629 #define	SNS_GP3	0x171
630 typedef struct {
631 	u_int16_t	snscb_rblen;	/* response buffer length (words) */
632 	u_int16_t	snscb_res0;
633 	u_int16_t	snscb_addr[4];	/* response buffer address */
634 	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
635 	u_int16_t	snscb_res1;
636 	u_int16_t	snscb_data[1];	/* variable data */
637 } sns_screq_t;	/* Subcommand Request Structure */
638 #define	SNS_GAN_REQ_SIZE	(sizeof (sns_screq_t)+(5*(sizeof (u_int16_t))))
639 #define	SNS_GP3_REQ_SIZE	(sizeof (sns_screq_t)+(5*(sizeof (u_int16_t))))
640 
641 typedef struct {
642 	u_int8_t	snscb_cthdr[16];
643 	u_int8_t	snscb_port_type;
644 	u_int8_t	snscb_port_id[3];
645 	u_int8_t	snscb_portname[8];
646 	u_int16_t	snscb_data[1];	/* variable data */
647 } sns_scrsp_t;	/* Subcommand Response Structure */
648 #define	SNS_GAN_RESP_SIZE	608	/* Maximum response size (bytes) */
649 #define	SNS_GP3_RESP_SIZE	532	/* XXX: For 128 ports */
650 
651 typedef struct {
652 	u_int8_t	snscb_cthdr[16];
653 	u_int8_t	snscb_port_type;
654 	u_int8_t	snscb_port_id[3];
655 	u_int8_t	snscb_portname[8];
656 	u_int8_t	snscb_pnlen;		/* symbolic port name length */
657 	u_int8_t	snscb_pname[255];	/* symbolic port name */
658 	u_int8_t	snscb_nodename[8];
659 	u_int8_t	snscb_nnlen;		/* symbolic node name length */
660 	u_int8_t	snscb_nname[255];	/* symbolic node name */
661 	u_int8_t	snscb_ipassoc[8];
662 	u_int8_t	snscb_ipaddr[16];
663 	u_int8_t	snscb_svc_class[4];
664 	u_int8_t	snscb_fc4_types[32];
665 	u_int8_t	snscb_fpname[8];
666 	u_int8_t	snscb_reserved;
667 	u_int8_t	snscb_hardaddr[3];
668 } sns_ganrsp_t;	/* Subcommand Response Structure */
669 
670 #endif	/* _ISPMBOX_H */
671