1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009-2020 Alexander Motin <mav@FreeBSD.org> 5 * Copyright (c) 1997-2008 by Matthew Jacob 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 /* 30 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters. 31 * FreeBSD Version. 32 */ 33 #include <sys/cdefs.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/linker.h> 39 #include <sys/firmware.h> 40 #include <sys/bus.h> 41 #include <sys/stdint.h> 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 #include <sys/malloc.h> 48 #include <sys/uio.h> 49 #include <dev/isp/isp_freebsd.h> 50 51 static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int); 52 static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t); 53 static uint32_t isp_pci_rd_reg_2600(ispsoftc_t *, int); 54 static void isp_pci_wr_reg_2600(ispsoftc_t *, int, uint32_t); 55 static void isp_pci_run_isr_2400(ispsoftc_t *); 56 static int isp_pci_mbxdma(ispsoftc_t *); 57 static void isp_pci_mbxdmafree(ispsoftc_t *); 58 static int isp_pci_irqsetup(ispsoftc_t *); 59 60 static struct ispmdvec mdvec_2400 = { 61 isp_pci_run_isr_2400, 62 isp_pci_rd_reg_2400, 63 isp_pci_wr_reg_2400, 64 isp_pci_mbxdma, 65 isp_send_cmd, 66 isp_pci_irqsetup, 67 NULL 68 }; 69 70 static struct ispmdvec mdvec_2500 = { 71 isp_pci_run_isr_2400, 72 isp_pci_rd_reg_2400, 73 isp_pci_wr_reg_2400, 74 isp_pci_mbxdma, 75 isp_send_cmd, 76 isp_pci_irqsetup, 77 NULL 78 }; 79 80 static struct ispmdvec mdvec_2600 = { 81 isp_pci_run_isr_2400, 82 isp_pci_rd_reg_2600, 83 isp_pci_wr_reg_2600, 84 isp_pci_mbxdma, 85 isp_send_cmd, 86 isp_pci_irqsetup, 87 NULL 88 }; 89 90 static struct ispmdvec mdvec_2700 = { 91 isp_pci_run_isr_2400, 92 isp_pci_rd_reg_2600, 93 isp_pci_wr_reg_2600, 94 isp_pci_mbxdma, 95 isp_send_cmd, 96 isp_pci_irqsetup, 97 NULL 98 }; 99 100 static struct ispmdvec mdvec_2800 = { 101 isp_pci_run_isr_2400, 102 isp_pci_rd_reg_2600, 103 isp_pci_wr_reg_2600, 104 isp_pci_mbxdma, 105 isp_send_cmd, 106 isp_pci_irqsetup, 107 NULL 108 }; 109 110 #ifndef PCIM_CMD_INVEN 111 #define PCIM_CMD_INVEN 0x10 112 #endif 113 #ifndef PCIM_CMD_BUSMASTEREN 114 #define PCIM_CMD_BUSMASTEREN 0x0004 115 #endif 116 #ifndef PCIM_CMD_PERRESPEN 117 #define PCIM_CMD_PERRESPEN 0x0040 118 #endif 119 #ifndef PCIM_CMD_SEREN 120 #define PCIM_CMD_SEREN 0x0100 121 #endif 122 #ifndef PCIM_CMD_INTX_DISABLE 123 #define PCIM_CMD_INTX_DISABLE 0x0400 124 #endif 125 126 #ifndef PCIR_COMMAND 127 #define PCIR_COMMAND 0x04 128 #endif 129 130 #ifndef PCIR_CACHELNSZ 131 #define PCIR_CACHELNSZ 0x0c 132 #endif 133 134 #ifndef PCIR_LATTIMER 135 #define PCIR_LATTIMER 0x0d 136 #endif 137 138 #ifndef PCIR_ROMADDR 139 #define PCIR_ROMADDR 0x30 140 #endif 141 142 #define PCI_VENDOR_QLOGIC 0x1077 143 144 #define PCI_PRODUCT_QLOGIC_ISP2422 0x2422 145 #define PCI_PRODUCT_QLOGIC_ISP2432 0x2432 146 #define PCI_PRODUCT_QLOGIC_ISP2532 0x2532 147 #define PCI_PRODUCT_QLOGIC_ISP5432 0x5432 148 #define PCI_PRODUCT_QLOGIC_ISP2031 0x2031 149 #define PCI_PRODUCT_QLOGIC_ISP8031 0x8031 150 #define PCI_PRODUCT_QLOGIC_ISP2684 0x2171 151 #define PCI_PRODUCT_QLOGIC_ISP2692 0x2b61 152 #define PCI_PRODUCT_QLOGIC_ISP2714 0x2071 153 #define PCI_PRODUCT_QLOGIC_ISP2722 0x2261 154 #define PCI_PRODUCT_QLOGIC_ISP2812 0x2281 155 #define PCI_PRODUCT_QLOGIC_ISP2814 0x2081 156 157 #define PCI_QLOGIC_ISP2422 \ 158 ((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC) 159 #define PCI_QLOGIC_ISP2432 \ 160 ((PCI_PRODUCT_QLOGIC_ISP2432 << 16) | PCI_VENDOR_QLOGIC) 161 #define PCI_QLOGIC_ISP2532 \ 162 ((PCI_PRODUCT_QLOGIC_ISP2532 << 16) | PCI_VENDOR_QLOGIC) 163 #define PCI_QLOGIC_ISP5432 \ 164 ((PCI_PRODUCT_QLOGIC_ISP5432 << 16) | PCI_VENDOR_QLOGIC) 165 #define PCI_QLOGIC_ISP2031 \ 166 ((PCI_PRODUCT_QLOGIC_ISP2031 << 16) | PCI_VENDOR_QLOGIC) 167 #define PCI_QLOGIC_ISP8031 \ 168 ((PCI_PRODUCT_QLOGIC_ISP8031 << 16) | PCI_VENDOR_QLOGIC) 169 #define PCI_QLOGIC_ISP2684 \ 170 ((PCI_PRODUCT_QLOGIC_ISP2684 << 16) | PCI_VENDOR_QLOGIC) 171 #define PCI_QLOGIC_ISP2692 \ 172 ((PCI_PRODUCT_QLOGIC_ISP2692 << 16) | PCI_VENDOR_QLOGIC) 173 #define PCI_QLOGIC_ISP2714 \ 174 ((PCI_PRODUCT_QLOGIC_ISP2714 << 16) | PCI_VENDOR_QLOGIC) 175 #define PCI_QLOGIC_ISP2722 \ 176 ((PCI_PRODUCT_QLOGIC_ISP2722 << 16) | PCI_VENDOR_QLOGIC) 177 #define PCI_QLOGIC_ISP2812 \ 178 ((PCI_PRODUCT_QLOGIC_ISP2812 << 16) | PCI_VENDOR_QLOGIC) 179 #define PCI_QLOGIC_ISP2814 \ 180 ((PCI_PRODUCT_QLOGIC_ISP2814 << 16) | PCI_VENDOR_QLOGIC) 181 182 #define PCI_DFLT_LTNCY 0x40 183 #define PCI_DFLT_LNSZ 0x10 184 185 static int isp_pci_probe (device_t); 186 static int isp_pci_attach (device_t); 187 static int isp_pci_detach (device_t); 188 189 190 struct isp_pcisoftc { 191 ispsoftc_t pci_isp; 192 struct resource * regs; 193 struct resource * regs1; 194 struct resource * regs2; 195 struct { 196 int iqd; 197 struct resource * irq; 198 void * ih; 199 } irq[ISP_MAX_IRQS]; 200 int rtp; 201 int rgd; 202 int rtp1; 203 int rgd1; 204 int rtp2; 205 int rgd2; 206 bus_dma_tag_t dmat; 207 int msicount; 208 }; 209 210 211 static device_method_t isp_pci_methods[] = { 212 /* Device interface */ 213 DEVMETHOD(device_probe, isp_pci_probe), 214 DEVMETHOD(device_attach, isp_pci_attach), 215 DEVMETHOD(device_detach, isp_pci_detach), 216 { 0, 0 } 217 }; 218 219 static driver_t isp_pci_driver = { 220 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc) 221 }; 222 223 DRIVER_MODULE(isp, pci, isp_pci_driver, 0, 0); 224 MODULE_DEPEND(isp, cam, 1, 1, 1); 225 MODULE_DEPEND(isp, firmware, 1, 1, 1); 226 static int isp_nvports = 0; 227 228 static int 229 isp_pci_probe(device_t dev) 230 { 231 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 232 case PCI_QLOGIC_ISP2422: 233 device_set_desc(dev, "Qlogic ISP 2422 PCI FC-AL Adapter"); 234 break; 235 case PCI_QLOGIC_ISP2432: 236 device_set_desc(dev, "Qlogic ISP 2432 PCI FC-AL Adapter"); 237 break; 238 case PCI_QLOGIC_ISP2532: 239 device_set_desc(dev, "Qlogic ISP 2532 PCI FC-AL Adapter"); 240 break; 241 case PCI_QLOGIC_ISP5432: 242 device_set_desc(dev, "Qlogic ISP 5432 PCI FC-AL Adapter"); 243 break; 244 case PCI_QLOGIC_ISP2031: 245 device_set_desc(dev, "Qlogic ISP 2031 PCI FC-AL Adapter"); 246 break; 247 case PCI_QLOGIC_ISP8031: 248 device_set_desc(dev, "Qlogic ISP 8031 PCI FCoE Adapter"); 249 break; 250 case PCI_QLOGIC_ISP2684: 251 device_set_desc(dev, "Qlogic ISP 2684 PCI FC Adapter"); 252 break; 253 case PCI_QLOGIC_ISP2692: 254 device_set_desc(dev, "Qlogic ISP 2692 PCI FC Adapter"); 255 break; 256 case PCI_QLOGIC_ISP2714: 257 device_set_desc(dev, "Qlogic ISP 2714 PCI FC Adapter"); 258 break; 259 case PCI_QLOGIC_ISP2722: 260 device_set_desc(dev, "Qlogic ISP 2722 PCI FC Adapter"); 261 break; 262 case PCI_QLOGIC_ISP2812: 263 device_set_desc(dev, "Qlogic ISP 2812 PCI FC Adapter"); 264 break; 265 case PCI_QLOGIC_ISP2814: 266 device_set_desc(dev, "Qlogic ISP 2814 PCI FC Adapter"); 267 break; 268 default: 269 return (ENXIO); 270 } 271 if (isp_announced == 0 && bootverbose) { 272 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, " 273 "Core Version %d.%d\n", 274 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR, 275 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR); 276 isp_announced++; 277 } 278 /* 279 * XXXX: Here is where we might load the f/w module 280 * XXXX: (or increase a reference count to it). 281 */ 282 return (BUS_PROBE_DEFAULT); 283 } 284 285 static void 286 isp_get_generic_options(device_t dev, ispsoftc_t *isp) 287 { 288 int tval; 289 290 tval = 0; 291 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fwload_disable", &tval) == 0 && tval != 0) { 292 isp->isp_confopts |= ISP_CFG_NORELOAD; 293 } 294 tval = 0; 295 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "ignore_nvram", &tval) == 0 && tval != 0) { 296 isp->isp_confopts |= ISP_CFG_NONVRAM; 297 } 298 tval = 0; 299 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "debug", &tval); 300 if (tval) { 301 isp->isp_dblev = tval; 302 } else { 303 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR; 304 } 305 if (bootverbose) { 306 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO; 307 } 308 tval = -1; 309 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "vports", &tval); 310 if (tval > 0 && tval <= 254) { 311 isp_nvports = tval; 312 } 313 tval = 7; 314 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "quickboot_time", &tval); 315 isp_quickboot_time = tval; 316 } 317 318 static void 319 isp_get_specific_options(device_t dev, int chan, ispsoftc_t *isp) 320 { 321 const char *sptr; 322 int tval = 0; 323 char prefix[12], name[16]; 324 325 if (chan == 0) 326 prefix[0] = 0; 327 else 328 snprintf(prefix, sizeof(prefix), "chan%d.", chan); 329 snprintf(name, sizeof(name), "%siid", prefix); 330 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 331 name, &tval)) { 332 ISP_FC_PC(isp, chan)->default_id = 109 - chan; 333 } else { 334 ISP_FC_PC(isp, chan)->default_id = tval - chan; 335 isp->isp_confopts |= ISP_CFG_OWNLOOPID; 336 } 337 338 tval = -1; 339 snprintf(name, sizeof(name), "%srole", prefix); 340 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 341 name, &tval) == 0) { 342 switch (tval) { 343 case ISP_ROLE_NONE: 344 case ISP_ROLE_INITIATOR: 345 case ISP_ROLE_TARGET: 346 case ISP_ROLE_BOTH: 347 device_printf(dev, "Chan %d setting role to 0x%x\n", chan, tval); 348 break; 349 default: 350 tval = -1; 351 break; 352 } 353 } 354 if (tval == -1) { 355 tval = ISP_DEFAULT_ROLES; 356 } 357 ISP_FC_PC(isp, chan)->def_role = tval; 358 359 tval = 0; 360 snprintf(name, sizeof(name), "%sfullduplex", prefix); 361 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 362 name, &tval) == 0 && tval != 0) { 363 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX; 364 } 365 sptr = NULL; 366 snprintf(name, sizeof(name), "%stopology", prefix); 367 if (resource_string_value(device_get_name(dev), device_get_unit(dev), 368 name, (const char **) &sptr) == 0 && sptr != NULL) { 369 if (strcmp(sptr, "lport") == 0) { 370 isp->isp_confopts |= ISP_CFG_LPORT; 371 } else if (strcmp(sptr, "nport") == 0) { 372 isp->isp_confopts |= ISP_CFG_NPORT; 373 } else if (strcmp(sptr, "lport-only") == 0) { 374 isp->isp_confopts |= ISP_CFG_LPORT_ONLY; 375 } else if (strcmp(sptr, "nport-only") == 0) { 376 isp->isp_confopts |= ISP_CFG_NPORT_ONLY; 377 } 378 } 379 380 #ifdef ISP_FCTAPE_OFF 381 isp->isp_confopts |= ISP_CFG_NOFCTAPE; 382 #else 383 isp->isp_confopts |= ISP_CFG_FCTAPE; 384 #endif 385 386 tval = 0; 387 snprintf(name, sizeof(name), "%snofctape", prefix); 388 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 389 name, &tval); 390 if (tval) { 391 isp->isp_confopts &= ~ISP_CFG_FCTAPE; 392 isp->isp_confopts |= ISP_CFG_NOFCTAPE; 393 } 394 395 tval = 0; 396 snprintf(name, sizeof(name), "%sfctape", prefix); 397 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 398 name, &tval); 399 if (tval) { 400 isp->isp_confopts &= ~ISP_CFG_NOFCTAPE; 401 isp->isp_confopts |= ISP_CFG_FCTAPE; 402 } 403 404 405 /* 406 * Because the resource_*_value functions can neither return 407 * 64 bit integer values, nor can they be directly coerced 408 * to interpret the right hand side of the assignment as 409 * you want them to interpret it, we have to force WWN 410 * hint replacement to specify WWN strings with a leading 411 * 'w' (e..g w50000000aaaa0001). Sigh. 412 */ 413 sptr = NULL; 414 snprintf(name, sizeof(name), "%sportwwn", prefix); 415 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), 416 name, (const char **) &sptr); 417 if (tval == 0 && sptr != NULL && *sptr++ == 'w') { 418 char *eptr = NULL; 419 ISP_FC_PC(isp, chan)->def_wwpn = strtouq(sptr, &eptr, 16); 420 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwpn == -1) { 421 device_printf(dev, "mangled portwwn hint '%s'\n", sptr); 422 ISP_FC_PC(isp, chan)->def_wwpn = 0; 423 } 424 } 425 426 sptr = NULL; 427 snprintf(name, sizeof(name), "%snodewwn", prefix); 428 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), 429 name, (const char **) &sptr); 430 if (tval == 0 && sptr != NULL && *sptr++ == 'w') { 431 char *eptr = NULL; 432 ISP_FC_PC(isp, chan)->def_wwnn = strtouq(sptr, &eptr, 16); 433 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwnn == 0) { 434 device_printf(dev, "mangled nodewwn hint '%s'\n", sptr); 435 ISP_FC_PC(isp, chan)->def_wwnn = 0; 436 } 437 } 438 439 tval = -1; 440 snprintf(name, sizeof(name), "%sloop_down_limit", prefix); 441 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 442 name, &tval); 443 if (tval >= 0 && tval < 0xffff) { 444 ISP_FC_PC(isp, chan)->loop_down_limit = tval; 445 } else { 446 ISP_FC_PC(isp, chan)->loop_down_limit = isp_loop_down_limit; 447 } 448 449 tval = -1; 450 snprintf(name, sizeof(name), "%sgone_device_time", prefix); 451 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 452 name, &tval); 453 if (tval >= 0 && tval < 0xffff) { 454 ISP_FC_PC(isp, chan)->gone_device_time = tval; 455 } else { 456 ISP_FC_PC(isp, chan)->gone_device_time = isp_gone_device_time; 457 } 458 } 459 460 static int 461 isp_pci_attach(device_t dev) 462 { 463 struct isp_pcisoftc *pcs = device_get_softc(dev); 464 ispsoftc_t *isp = &pcs->pci_isp; 465 int i; 466 uint32_t data, cmd, linesz, did; 467 size_t psize, xsize; 468 char fwname[32]; 469 470 isp->isp_dev = dev; 471 isp->isp_nchan = 1; 472 mtx_init(&isp->isp_lock, "isp", NULL, MTX_DEF); 473 474 /* 475 * Get Generic Options 476 */ 477 isp_nvports = 0; 478 isp_get_generic_options(dev, isp); 479 480 linesz = PCI_DFLT_LNSZ; 481 pcs->regs = pcs->regs2 = NULL; 482 pcs->rgd = pcs->rtp = 0; 483 484 isp->isp_nchan += isp_nvports; 485 switch (pci_get_devid(dev)) { 486 case PCI_QLOGIC_ISP2422: 487 case PCI_QLOGIC_ISP2432: 488 did = 0x2400; 489 isp->isp_mdvec = &mdvec_2400; 490 isp->isp_type = ISP_HA_FC_2400; 491 break; 492 case PCI_QLOGIC_ISP2532: 493 did = 0x2500; 494 isp->isp_mdvec = &mdvec_2500; 495 isp->isp_type = ISP_HA_FC_2500; 496 break; 497 case PCI_QLOGIC_ISP5432: 498 did = 0x2500; 499 isp->isp_mdvec = &mdvec_2500; 500 isp->isp_type = ISP_HA_FC_2500; 501 break; 502 case PCI_QLOGIC_ISP2031: 503 case PCI_QLOGIC_ISP8031: 504 did = 0x2600; 505 isp->isp_mdvec = &mdvec_2600; 506 isp->isp_type = ISP_HA_FC_2600; 507 break; 508 case PCI_QLOGIC_ISP2684: 509 case PCI_QLOGIC_ISP2692: 510 case PCI_QLOGIC_ISP2714: 511 case PCI_QLOGIC_ISP2722: 512 did = 0x2700; 513 isp->isp_mdvec = &mdvec_2700; 514 isp->isp_type = ISP_HA_FC_2700; 515 break; 516 case PCI_QLOGIC_ISP2812: 517 case PCI_QLOGIC_ISP2814: 518 did = 0x2800; 519 isp->isp_mdvec = &mdvec_2800; 520 isp->isp_type = ISP_HA_FC_2800; 521 break; 522 default: 523 device_printf(dev, "unknown device type\n"); 524 goto bad; 525 break; 526 } 527 isp->isp_revision = pci_get_revid(dev); 528 529 if (IS_26XX(isp)) { 530 pcs->rtp = SYS_RES_MEMORY; 531 pcs->rgd = PCIR_BAR(0); 532 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd, 533 RF_ACTIVE); 534 pcs->rtp1 = SYS_RES_MEMORY; 535 pcs->rgd1 = PCIR_BAR(2); 536 pcs->regs1 = bus_alloc_resource_any(dev, pcs->rtp1, &pcs->rgd1, 537 RF_ACTIVE); 538 pcs->rtp2 = SYS_RES_MEMORY; 539 pcs->rgd2 = PCIR_BAR(4); 540 pcs->regs2 = bus_alloc_resource_any(dev, pcs->rtp2, &pcs->rgd2, 541 RF_ACTIVE); 542 } else { 543 pcs->rtp = SYS_RES_MEMORY; 544 pcs->rgd = PCIR_BAR(1); 545 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd, 546 RF_ACTIVE); 547 if (pcs->regs == NULL) { 548 pcs->rtp = SYS_RES_IOPORT; 549 pcs->rgd = PCIR_BAR(0); 550 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, 551 &pcs->rgd, RF_ACTIVE); 552 } 553 } 554 if (pcs->regs == NULL) { 555 device_printf(dev, "Unable to map any ports\n"); 556 goto bad; 557 } 558 if (bootverbose) { 559 device_printf(dev, "Using %s space register mapping\n", 560 (pcs->rtp == SYS_RES_IOPORT)? "I/O" : "Memory"); 561 } 562 isp->isp_regs = pcs->regs; 563 isp->isp_regs2 = pcs->regs2; 564 565 psize = sizeof(fcparam) * isp->isp_nchan; 566 xsize = sizeof(struct isp_fc) * isp->isp_nchan; 567 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT | M_ZERO); 568 if (isp->isp_param == NULL) { 569 device_printf(dev, "cannot allocate parameter data\n"); 570 goto bad; 571 } 572 isp->isp_osinfo.fc = malloc(xsize, M_DEVBUF, M_NOWAIT | M_ZERO); 573 if (isp->isp_osinfo.fc == NULL) { 574 device_printf(dev, "cannot allocate parameter data\n"); 575 goto bad; 576 } 577 578 /* 579 * Now that we know who we are (roughly) get/set specific options 580 */ 581 for (i = 0; i < isp->isp_nchan; i++) { 582 isp_get_specific_options(dev, i, isp); 583 } 584 585 isp->isp_osinfo.fw = NULL; 586 if (isp->isp_osinfo.fw == NULL) { 587 snprintf(fwname, sizeof (fwname), "isp_%04x", did); 588 isp->isp_osinfo.fw = firmware_get(fwname); 589 } 590 if (isp->isp_osinfo.fw != NULL) { 591 isp_prt(isp, ISP_LOGCONFIG, "loaded firmware %s", fwname); 592 isp->isp_mdvec->dv_ispfw = isp->isp_osinfo.fw->data; 593 } 594 595 /* 596 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 597 */ 598 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 599 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN; 600 cmd &= ~PCIM_CMD_INTX_DISABLE; 601 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 602 603 /* 604 * Make sure the Cache Line Size register is set sensibly. 605 */ 606 data = pci_read_config(dev, PCIR_CACHELNSZ, 1); 607 if (data == 0 || (linesz != PCI_DFLT_LNSZ && data != linesz)) { 608 isp_prt(isp, ISP_LOGDEBUG0, "set PCI line size to %d from %d", linesz, data); 609 data = linesz; 610 pci_write_config(dev, PCIR_CACHELNSZ, data, 1); 611 } 612 613 /* 614 * Make sure the Latency Timer is sane. 615 */ 616 data = pci_read_config(dev, PCIR_LATTIMER, 1); 617 if (data < PCI_DFLT_LTNCY) { 618 data = PCI_DFLT_LTNCY; 619 isp_prt(isp, ISP_LOGDEBUG0, "set PCI latency to %d", data); 620 pci_write_config(dev, PCIR_LATTIMER, data, 1); 621 } 622 623 /* 624 * Make sure we've disabled the ROM. 625 */ 626 data = pci_read_config(dev, PCIR_ROMADDR, 4); 627 data &= ~1; 628 pci_write_config(dev, PCIR_ROMADDR, data, 4); 629 630 /* 631 * Last minute checks... 632 */ 633 isp->isp_port = pci_get_function(dev); 634 635 /* 636 * Make sure we're in reset state. 637 */ 638 ISP_LOCK(isp); 639 if (isp_reinit(isp, 1) != 0) { 640 ISP_UNLOCK(isp); 641 goto bad; 642 } 643 ISP_UNLOCK(isp); 644 if (isp_attach(isp)) { 645 ISP_LOCK(isp); 646 isp_shutdown(isp); 647 ISP_UNLOCK(isp); 648 goto bad; 649 } 650 return (0); 651 652 bad: 653 if (isp->isp_osinfo.fw == NULL && !IS_26XX(isp)) { 654 /* 655 * Failure to attach at boot time might have been caused 656 * by a missing ispfw(4). Except for 16Gb adapters, 657 * there's no loadable firmware for them. 658 */ 659 isp_prt(isp, ISP_LOGWARN, "See the ispfw(4) man page on " 660 "how to load known good firmware at boot time"); 661 } 662 for (i = 0; i < isp->isp_nirq; i++) { 663 (void) bus_teardown_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih); 664 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->irq[i].iqd, 665 pcs->irq[0].irq); 666 } 667 if (pcs->msicount) { 668 pci_release_msi(dev); 669 } 670 if (pcs->regs) 671 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs); 672 if (pcs->regs1) 673 (void) bus_release_resource(dev, pcs->rtp1, pcs->rgd1, pcs->regs1); 674 if (pcs->regs2) 675 (void) bus_release_resource(dev, pcs->rtp2, pcs->rgd2, pcs->regs2); 676 if (pcs->pci_isp.isp_param) { 677 free(pcs->pci_isp.isp_param, M_DEVBUF); 678 pcs->pci_isp.isp_param = NULL; 679 } 680 if (pcs->pci_isp.isp_osinfo.fc) { 681 free(pcs->pci_isp.isp_osinfo.fc, M_DEVBUF); 682 pcs->pci_isp.isp_osinfo.fc = NULL; 683 } 684 mtx_destroy(&isp->isp_lock); 685 return (ENXIO); 686 } 687 688 static int 689 isp_pci_detach(device_t dev) 690 { 691 struct isp_pcisoftc *pcs = device_get_softc(dev); 692 ispsoftc_t *isp = &pcs->pci_isp; 693 int i, status; 694 695 status = isp_detach(isp); 696 if (status) 697 return (status); 698 ISP_LOCK(isp); 699 isp_shutdown(isp); 700 ISP_UNLOCK(isp); 701 for (i = 0; i < isp->isp_nirq; i++) { 702 (void) bus_teardown_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih); 703 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->irq[i].iqd, 704 pcs->irq[i].irq); 705 } 706 if (pcs->msicount) 707 pci_release_msi(dev); 708 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs); 709 if (pcs->regs1) 710 (void) bus_release_resource(dev, pcs->rtp1, pcs->rgd1, pcs->regs1); 711 if (pcs->regs2) 712 (void) bus_release_resource(dev, pcs->rtp2, pcs->rgd2, pcs->regs2); 713 isp_pci_mbxdmafree(isp); 714 if (pcs->pci_isp.isp_param) { 715 free(pcs->pci_isp.isp_param, M_DEVBUF); 716 pcs->pci_isp.isp_param = NULL; 717 } 718 if (pcs->pci_isp.isp_osinfo.fc) { 719 free(pcs->pci_isp.isp_osinfo.fc, M_DEVBUF); 720 pcs->pci_isp.isp_osinfo.fc = NULL; 721 } 722 mtx_destroy(&isp->isp_lock); 723 return (0); 724 } 725 726 #define BXR2(isp, off) bus_read_2((isp)->isp_regs, (off)) 727 #define BXW2(isp, off, v) bus_write_2((isp)->isp_regs, (off), (v)) 728 #define BXR4(isp, off) bus_read_4((isp)->isp_regs, (off)) 729 #define BXW4(isp, off, v) bus_write_4((isp)->isp_regs, (off), (v)) 730 #define B2R4(isp, off) bus_read_4((isp)->isp_regs2, (off)) 731 #define B2W4(isp, off, v) bus_write_4((isp)->isp_regs2, (off), (v)) 732 733 static void 734 isp_pci_run_isr_2400(ispsoftc_t *isp) 735 { 736 uint32_t r2hisr; 737 uint16_t isr, info; 738 739 r2hisr = BXR4(isp, BIU2400_R2HSTS); 740 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr); 741 if ((r2hisr & BIU_R2HST_INTR) == 0) 742 return; 743 isr = r2hisr & BIU_R2HST_ISTAT_MASK; 744 info = (r2hisr >> 16); 745 switch (isr) { 746 case ISPR2HST_ROM_MBX_OK: 747 case ISPR2HST_ROM_MBX_FAIL: 748 case ISPR2HST_MBX_OK: 749 case ISPR2HST_MBX_FAIL: 750 isp_intr_mbox(isp, info); 751 break; 752 case ISPR2HST_ASYNC_EVENT: 753 isp_intr_async(isp, info); 754 break; 755 case ISPR2HST_RSPQ_UPDATE: 756 isp_intr_respq(isp); 757 break; 758 case ISPR2HST_RSPQ_UPDATE2: 759 #ifdef ISP_TARGET_MODE 760 case ISPR2HST_ATIO_RSPQ_UPDATE: 761 #endif 762 isp_intr_respq(isp); 763 /* FALLTHROUGH */ 764 #ifdef ISP_TARGET_MODE 765 case ISPR2HST_ATIO_UPDATE: 766 case ISPR2HST_ATIO_UPDATE2: 767 isp_intr_atioq(isp); 768 #endif 769 break; 770 default: 771 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr); 772 } 773 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT); 774 } 775 776 static uint32_t 777 isp_pci_rd_reg_2400(ispsoftc_t *isp, int regoff) 778 { 779 int block = regoff & _BLK_REG_MASK; 780 781 switch (block) { 782 case BIU_BLOCK: 783 return (BXR4(isp, regoff)); 784 case MBOX_BLOCK: 785 return (BXR2(isp, regoff)); 786 } 787 isp_prt(isp, ISP_LOGERR, "unknown block read at 0x%x", regoff); 788 return (0xffffffff); 789 } 790 791 static void 792 isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val) 793 { 794 int block = regoff & _BLK_REG_MASK; 795 796 switch (block) { 797 case BIU_BLOCK: 798 BXW4(isp, regoff, val); 799 #ifdef MEMORYBARRIERW 800 if (regoff == BIU2400_REQINP || 801 regoff == BIU2400_RSPOUTP || 802 regoff == BIU2400_PRI_REQINP || 803 regoff == BIU2400_ATIO_RSPOUTP) 804 MEMORYBARRIERW(isp, SYNC_REG, regoff, 4, -1) 805 else 806 #endif 807 MEMORYBARRIER(isp, SYNC_REG, regoff, 4, -1); 808 return; 809 case MBOX_BLOCK: 810 BXW2(isp, regoff, val); 811 MEMORYBARRIER(isp, SYNC_REG, regoff, 2, -1); 812 return; 813 } 814 isp_prt(isp, ISP_LOGERR, "unknown block write at 0x%x", regoff); 815 } 816 817 static uint32_t 818 isp_pci_rd_reg_2600(ispsoftc_t *isp, int regoff) 819 { 820 uint32_t rv; 821 822 switch (regoff) { 823 case BIU2400_PRI_REQINP: 824 case BIU2400_PRI_REQOUTP: 825 isp_prt(isp, ISP_LOGERR, "unknown register read at 0x%x", 826 regoff); 827 rv = 0xffffffff; 828 break; 829 case BIU2400_REQINP: 830 rv = B2R4(isp, 0x00); 831 break; 832 case BIU2400_REQOUTP: 833 rv = B2R4(isp, 0x04); 834 break; 835 case BIU2400_RSPINP: 836 rv = B2R4(isp, 0x08); 837 break; 838 case BIU2400_RSPOUTP: 839 rv = B2R4(isp, 0x0c); 840 break; 841 case BIU2400_ATIO_RSPINP: 842 rv = B2R4(isp, 0x10); 843 break; 844 case BIU2400_ATIO_RSPOUTP: 845 rv = B2R4(isp, 0x14); 846 break; 847 default: 848 rv = isp_pci_rd_reg_2400(isp, regoff); 849 break; 850 } 851 return (rv); 852 } 853 854 static void 855 isp_pci_wr_reg_2600(ispsoftc_t *isp, int regoff, uint32_t val) 856 { 857 int off; 858 859 switch (regoff) { 860 case BIU2400_PRI_REQINP: 861 case BIU2400_PRI_REQOUTP: 862 isp_prt(isp, ISP_LOGERR, "unknown register write at 0x%x", 863 regoff); 864 return; 865 case BIU2400_REQINP: 866 off = 0x00; 867 break; 868 case BIU2400_REQOUTP: 869 off = 0x04; 870 break; 871 case BIU2400_RSPINP: 872 off = 0x08; 873 break; 874 case BIU2400_RSPOUTP: 875 off = 0x0c; 876 break; 877 case BIU2400_ATIO_RSPINP: 878 off = 0x10; 879 break; 880 case BIU2400_ATIO_RSPOUTP: 881 off = 0x14; 882 break; 883 default: 884 isp_pci_wr_reg_2400(isp, regoff, val); 885 return; 886 } 887 B2W4(isp, off, val); 888 } 889 890 891 struct imush { 892 bus_addr_t maddr; 893 int error; 894 }; 895 896 static void 897 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 898 { 899 struct imush *imushp = (struct imush *) arg; 900 901 if (!(imushp->error = error)) 902 imushp->maddr = segs[0].ds_addr; 903 } 904 905 static int 906 isp_pci_mbxdma(ispsoftc_t *isp) 907 { 908 bus_dma_tag_t ptag; 909 caddr_t base; 910 uint32_t len; 911 int i, error, cmap; 912 bus_size_t slim; /* segment size */ 913 struct imush im; 914 #ifdef ISP_TARGET_MODE 915 isp_ecmd_t *ecmd; 916 #endif 917 918 /* Already been here? If so, leave... */ 919 if (isp->isp_xflist != NULL) 920 return (0); 921 if (isp->isp_rquest != NULL && isp->isp_maxcmds == 0) 922 return (0); 923 ISP_UNLOCK(isp); 924 925 ptag = bus_get_dma_tag(isp->isp_osinfo.dev); 926 if (sizeof (bus_size_t) > 4) 927 slim = (bus_size_t) (1ULL << 32); 928 else 929 slim = (bus_size_t) (1UL << 31); 930 931 if (isp->isp_rquest != NULL) 932 goto gotmaxcmds; 933 934 /* 935 * Allocate and map the request queue. 936 */ 937 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 938 if (bus_dma_tag_create(ptag, QENTRY_LEN, slim, 939 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 940 len, 1, len, 0, NULL, NULL, &isp->isp_osinfo.reqdmat)) { 941 isp_prt(isp, ISP_LOGERR, "cannot create request DMA tag"); 942 goto bad; 943 } 944 if (bus_dmamem_alloc(isp->isp_osinfo.reqdmat, (void **)&base, 945 BUS_DMA_COHERENT, &isp->isp_osinfo.reqmap) != 0) { 946 isp_prt(isp, ISP_LOGERR, "cannot allocate request DMA memory"); 947 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat); 948 goto bad; 949 } 950 isp->isp_rquest = base; 951 im.error = 0; 952 if (bus_dmamap_load(isp->isp_osinfo.reqdmat, isp->isp_osinfo.reqmap, 953 base, len, imc, &im, BUS_DMA_NOWAIT) || im.error) { 954 isp_prt(isp, ISP_LOGERR, "error loading request DMA map %d", im.error); 955 goto bad; 956 } 957 isp_prt(isp, ISP_LOGDEBUG0, "request area @ 0x%jx/0x%jx", 958 (uintmax_t)im.maddr, (uintmax_t)len); 959 isp->isp_rquest_dma = im.maddr; 960 961 #ifdef ISP_TARGET_MODE 962 /* 963 * Allocate region for external DMA addressable command/status structures. 964 */ 965 len = N_XCMDS * XCMD_SIZE; 966 if (bus_dma_tag_create(ptag, XCMD_SIZE, slim, 967 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 968 len, 1, len, 0, NULL, NULL, &isp->isp_osinfo.ecmd_dmat)) { 969 isp_prt(isp, ISP_LOGERR, "cannot create ECMD DMA tag"); 970 goto bad; 971 } 972 if (bus_dmamem_alloc(isp->isp_osinfo.ecmd_dmat, (void **)&base, 973 BUS_DMA_COHERENT, &isp->isp_osinfo.ecmd_map) != 0) { 974 isp_prt(isp, ISP_LOGERR, "cannot allocate ECMD DMA memory"); 975 bus_dma_tag_destroy(isp->isp_osinfo.ecmd_dmat); 976 goto bad; 977 } 978 isp->isp_osinfo.ecmd_base = (isp_ecmd_t *)base; 979 im.error = 0; 980 if (bus_dmamap_load(isp->isp_osinfo.ecmd_dmat, isp->isp_osinfo.ecmd_map, 981 base, len, imc, &im, BUS_DMA_NOWAIT) || im.error) { 982 isp_prt(isp, ISP_LOGERR, "error loading ECMD DMA map %d", im.error); 983 goto bad; 984 } 985 isp_prt(isp, ISP_LOGDEBUG0, "ecmd area @ 0x%jx/0x%jx", 986 (uintmax_t)im.maddr, (uintmax_t)len); 987 988 isp->isp_osinfo.ecmd_dma = im.maddr; 989 isp->isp_osinfo.ecmd_free = (isp_ecmd_t *)base; 990 for (ecmd = isp->isp_osinfo.ecmd_free; 991 ecmd < &isp->isp_osinfo.ecmd_free[N_XCMDS]; ecmd++) { 992 if (ecmd == &isp->isp_osinfo.ecmd_free[N_XCMDS - 1]) 993 ecmd->next = NULL; 994 else 995 ecmd->next = ecmd + 1; 996 } 997 #endif 998 999 /* 1000 * Allocate and map the result queue. 1001 */ 1002 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)); 1003 if (bus_dma_tag_create(ptag, QENTRY_LEN, slim, 1004 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 1005 len, 1, len, 0, NULL, NULL, &isp->isp_osinfo.respdmat)) { 1006 isp_prt(isp, ISP_LOGERR, "cannot create response DMA tag"); 1007 goto bad; 1008 } 1009 if (bus_dmamem_alloc(isp->isp_osinfo.respdmat, (void **)&base, 1010 BUS_DMA_COHERENT, &isp->isp_osinfo.respmap) != 0) { 1011 isp_prt(isp, ISP_LOGERR, "cannot allocate response DMA memory"); 1012 bus_dma_tag_destroy(isp->isp_osinfo.respdmat); 1013 goto bad; 1014 } 1015 isp->isp_result = base; 1016 im.error = 0; 1017 if (bus_dmamap_load(isp->isp_osinfo.respdmat, isp->isp_osinfo.respmap, 1018 base, len, imc, &im, BUS_DMA_NOWAIT) || im.error) { 1019 isp_prt(isp, ISP_LOGERR, "error loading response DMA map %d", im.error); 1020 goto bad; 1021 } 1022 isp_prt(isp, ISP_LOGDEBUG0, "response area @ 0x%jx/0x%jx", 1023 (uintmax_t)im.maddr, (uintmax_t)len); 1024 isp->isp_result_dma = im.maddr; 1025 1026 #ifdef ISP_TARGET_MODE 1027 /* 1028 * Allocate and map ATIO queue. 1029 */ 1030 len = ISP_QUEUE_SIZE(ATIO_QUEUE_LEN(isp)); 1031 if (bus_dma_tag_create(ptag, QENTRY_LEN, slim, 1032 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 1033 len, 1, len, 0, NULL, NULL, &isp->isp_osinfo.atiodmat)) { 1034 isp_prt(isp, ISP_LOGERR, "cannot create ATIO DMA tag"); 1035 goto bad; 1036 } 1037 if (bus_dmamem_alloc(isp->isp_osinfo.atiodmat, (void **)&base, 1038 BUS_DMA_COHERENT, &isp->isp_osinfo.atiomap) != 0) { 1039 isp_prt(isp, ISP_LOGERR, "cannot allocate ATIO DMA memory"); 1040 bus_dma_tag_destroy(isp->isp_osinfo.atiodmat); 1041 goto bad; 1042 } 1043 isp->isp_atioq = base; 1044 im.error = 0; 1045 if (bus_dmamap_load(isp->isp_osinfo.atiodmat, isp->isp_osinfo.atiomap, 1046 base, len, imc, &im, BUS_DMA_NOWAIT) || im.error) { 1047 isp_prt(isp, ISP_LOGERR, "error loading ATIO DMA map %d", im.error); 1048 goto bad; 1049 } 1050 isp_prt(isp, ISP_LOGDEBUG0, "ATIO area @ 0x%jx/0x%jx", 1051 (uintmax_t)im.maddr, (uintmax_t)len); 1052 isp->isp_atioq_dma = im.maddr; 1053 #endif 1054 1055 if (bus_dma_tag_create(ptag, 64, slim, 1056 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 1057 2*QENTRY_LEN, 1, 2*QENTRY_LEN, 0, NULL, NULL, 1058 &isp->isp_osinfo.iocbdmat)) { 1059 goto bad; 1060 } 1061 if (bus_dmamem_alloc(isp->isp_osinfo.iocbdmat, 1062 (void **)&base, BUS_DMA_COHERENT, &isp->isp_osinfo.iocbmap) != 0) 1063 goto bad; 1064 isp->isp_iocb = base; 1065 im.error = 0; 1066 if (bus_dmamap_load(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, 1067 base, 2*QENTRY_LEN, imc, &im, BUS_DMA_NOWAIT) || im.error) 1068 goto bad; 1069 isp->isp_iocb_dma = im.maddr; 1070 1071 if (bus_dma_tag_create(ptag, 64, slim, 1072 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 1073 ISP_FC_SCRLEN, 1, ISP_FC_SCRLEN, 0, NULL, NULL, 1074 &isp->isp_osinfo.scdmat)) 1075 goto bad; 1076 for (cmap = 0; cmap < isp->isp_nchan; cmap++) { 1077 struct isp_fc *fc = ISP_FC_PC(isp, cmap); 1078 if (bus_dmamem_alloc(isp->isp_osinfo.scdmat, 1079 (void **)&base, BUS_DMA_COHERENT, &fc->scmap) != 0) 1080 goto bad; 1081 FCPARAM(isp, cmap)->isp_scratch = base; 1082 im.error = 0; 1083 if (bus_dmamap_load(isp->isp_osinfo.scdmat, fc->scmap, 1084 base, ISP_FC_SCRLEN, imc, &im, BUS_DMA_NOWAIT) || 1085 im.error) { 1086 bus_dmamem_free(isp->isp_osinfo.scdmat, 1087 base, fc->scmap); 1088 FCPARAM(isp, cmap)->isp_scratch = NULL; 1089 goto bad; 1090 } 1091 FCPARAM(isp, cmap)->isp_scdma = im.maddr; 1092 for (i = 0; i < INITIAL_NEXUS_COUNT; i++) { 1093 struct isp_nexus *n = malloc(sizeof (struct isp_nexus), M_DEVBUF, M_NOWAIT | M_ZERO); 1094 if (n == NULL) { 1095 while (fc->nexus_free_list) { 1096 n = fc->nexus_free_list; 1097 fc->nexus_free_list = n->next; 1098 free(n, M_DEVBUF); 1099 } 1100 goto bad; 1101 } 1102 n->next = fc->nexus_free_list; 1103 fc->nexus_free_list = n; 1104 } 1105 } 1106 1107 if (isp->isp_maxcmds == 0) { 1108 ISP_LOCK(isp); 1109 return (0); 1110 } 1111 1112 gotmaxcmds: 1113 if (bus_dma_tag_create(ptag, 1, slim, 1114 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 1115 (ISP_NSEG64_MAX - 1) * PAGE_SIZE, ISP_NSEG64_MAX, 1116 (ISP_NSEG64_MAX - 1) * PAGE_SIZE, 0, 1117 busdma_lock_mutex, &isp->isp_lock, &isp->isp_osinfo.dmat)) 1118 goto bad; 1119 len = isp->isp_maxcmds * sizeof (struct isp_pcmd); 1120 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *) 1121 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 1122 for (i = 0; i < isp->isp_maxcmds; i++) { 1123 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i]; 1124 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap); 1125 if (error) { 1126 isp_prt(isp, ISP_LOGERR, "error %d creating per-cmd DMA maps", error); 1127 while (--i >= 0) { 1128 bus_dmamap_destroy(isp->isp_osinfo.dmat, 1129 isp->isp_osinfo.pcmd_pool[i].dmap); 1130 } 1131 goto bad; 1132 } 1133 callout_init_mtx(&pcmd->wdog, &isp->isp_lock, 0); 1134 if (i == isp->isp_maxcmds-1) 1135 pcmd->next = NULL; 1136 else 1137 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1]; 1138 } 1139 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0]; 1140 1141 len = sizeof(isp_hdl_t) * ISP_HANDLE_NUM(isp); 1142 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 1143 for (len = 0; len < ISP_HANDLE_NUM(isp) - 1; len++) 1144 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1]; 1145 isp->isp_xffree = isp->isp_xflist; 1146 1147 ISP_LOCK(isp); 1148 return (0); 1149 1150 bad: 1151 isp_pci_mbxdmafree(isp); 1152 ISP_LOCK(isp); 1153 return (1); 1154 } 1155 1156 static void 1157 isp_pci_mbxdmafree(ispsoftc_t *isp) 1158 { 1159 int i; 1160 1161 if (isp->isp_xflist != NULL) { 1162 free(isp->isp_xflist, M_DEVBUF); 1163 isp->isp_xflist = NULL; 1164 } 1165 if (isp->isp_osinfo.pcmd_pool != NULL) { 1166 for (i = 0; i < isp->isp_maxcmds; i++) { 1167 bus_dmamap_destroy(isp->isp_osinfo.dmat, 1168 isp->isp_osinfo.pcmd_pool[i].dmap); 1169 } 1170 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF); 1171 isp->isp_osinfo.pcmd_pool = NULL; 1172 } 1173 if (isp->isp_osinfo.dmat) { 1174 bus_dma_tag_destroy(isp->isp_osinfo.dmat); 1175 isp->isp_osinfo.dmat = NULL; 1176 } 1177 for (i = 0; i < isp->isp_nchan; i++) { 1178 struct isp_fc *fc = ISP_FC_PC(isp, i); 1179 if (FCPARAM(isp, i)->isp_scdma != 0) { 1180 bus_dmamap_unload(isp->isp_osinfo.scdmat, 1181 fc->scmap); 1182 FCPARAM(isp, i)->isp_scdma = 0; 1183 } 1184 if (FCPARAM(isp, i)->isp_scratch != NULL) { 1185 bus_dmamem_free(isp->isp_osinfo.scdmat, 1186 FCPARAM(isp, i)->isp_scratch, fc->scmap); 1187 FCPARAM(isp, i)->isp_scratch = NULL; 1188 } 1189 while (fc->nexus_free_list) { 1190 struct isp_nexus *n = fc->nexus_free_list; 1191 fc->nexus_free_list = n->next; 1192 free(n, M_DEVBUF); 1193 } 1194 } 1195 if (isp->isp_osinfo.scdmat) { 1196 bus_dma_tag_destroy(isp->isp_osinfo.scdmat); 1197 isp->isp_osinfo.scdmat = NULL; 1198 } 1199 if (isp->isp_iocb_dma != 0) { 1200 bus_dmamap_unload(isp->isp_osinfo.iocbdmat, 1201 isp->isp_osinfo.iocbmap); 1202 isp->isp_iocb_dma = 0; 1203 } 1204 if (isp->isp_iocb != NULL) { 1205 bus_dmamem_free(isp->isp_osinfo.iocbdmat, 1206 isp->isp_iocb, isp->isp_osinfo.iocbmap); 1207 bus_dma_tag_destroy(isp->isp_osinfo.iocbdmat); 1208 } 1209 #ifdef ISP_TARGET_MODE 1210 if (isp->isp_atioq_dma != 0) { 1211 bus_dmamap_unload(isp->isp_osinfo.atiodmat, 1212 isp->isp_osinfo.atiomap); 1213 isp->isp_atioq_dma = 0; 1214 } 1215 if (isp->isp_atioq != NULL) { 1216 bus_dmamem_free(isp->isp_osinfo.atiodmat, isp->isp_atioq, 1217 isp->isp_osinfo.atiomap); 1218 bus_dma_tag_destroy(isp->isp_osinfo.atiodmat); 1219 isp->isp_atioq = NULL; 1220 } 1221 #endif 1222 if (isp->isp_result_dma != 0) { 1223 bus_dmamap_unload(isp->isp_osinfo.respdmat, 1224 isp->isp_osinfo.respmap); 1225 isp->isp_result_dma = 0; 1226 } 1227 if (isp->isp_result != NULL) { 1228 bus_dmamem_free(isp->isp_osinfo.respdmat, isp->isp_result, 1229 isp->isp_osinfo.respmap); 1230 bus_dma_tag_destroy(isp->isp_osinfo.respdmat); 1231 isp->isp_result = NULL; 1232 } 1233 #ifdef ISP_TARGET_MODE 1234 if (isp->isp_osinfo.ecmd_dma != 0) { 1235 bus_dmamap_unload(isp->isp_osinfo.ecmd_dmat, 1236 isp->isp_osinfo.ecmd_map); 1237 isp->isp_osinfo.ecmd_dma = 0; 1238 } 1239 if (isp->isp_osinfo.ecmd_base != NULL) { 1240 bus_dmamem_free(isp->isp_osinfo.ecmd_dmat, isp->isp_osinfo.ecmd_base, 1241 isp->isp_osinfo.ecmd_map); 1242 bus_dma_tag_destroy(isp->isp_osinfo.ecmd_dmat); 1243 isp->isp_osinfo.ecmd_base = NULL; 1244 } 1245 #endif 1246 if (isp->isp_rquest_dma != 0) { 1247 bus_dmamap_unload(isp->isp_osinfo.reqdmat, 1248 isp->isp_osinfo.reqmap); 1249 isp->isp_rquest_dma = 0; 1250 } 1251 if (isp->isp_rquest != NULL) { 1252 bus_dmamem_free(isp->isp_osinfo.reqdmat, isp->isp_rquest, 1253 isp->isp_osinfo.reqmap); 1254 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat); 1255 isp->isp_rquest = NULL; 1256 } 1257 } 1258 1259 static int 1260 isp_pci_irqsetup(ispsoftc_t *isp) 1261 { 1262 device_t dev = isp->isp_osinfo.dev; 1263 struct isp_pcisoftc *pcs = device_get_softc(dev); 1264 driver_intr_t *f; 1265 int i, max_irq; 1266 1267 /* Allocate IRQs only once. */ 1268 if (isp->isp_nirq > 0) 1269 return (0); 1270 1271 ISP_UNLOCK(isp); 1272 if (ISP_CAP_MSIX(isp)) { 1273 max_irq = IS_26XX(isp) ? 3 : (IS_25XX(isp) ? 2 : 0); 1274 resource_int_value(device_get_name(dev), 1275 device_get_unit(dev), "msix", &max_irq); 1276 max_irq = imin(ISP_MAX_IRQS, max_irq); 1277 pcs->msicount = imin(pci_msix_count(dev), max_irq); 1278 if (pcs->msicount > 0 && 1279 pci_alloc_msix(dev, &pcs->msicount) != 0) 1280 pcs->msicount = 0; 1281 } 1282 if (pcs->msicount == 0) { 1283 max_irq = 1; 1284 resource_int_value(device_get_name(dev), 1285 device_get_unit(dev), "msi", &max_irq); 1286 max_irq = imin(1, max_irq); 1287 pcs->msicount = imin(pci_msi_count(dev), max_irq); 1288 if (pcs->msicount > 0 && 1289 pci_alloc_msi(dev, &pcs->msicount) != 0) 1290 pcs->msicount = 0; 1291 } 1292 for (i = 0; i < MAX(1, pcs->msicount); i++) { 1293 pcs->irq[i].iqd = i + (pcs->msicount > 0); 1294 pcs->irq[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 1295 &pcs->irq[i].iqd, RF_ACTIVE | RF_SHAREABLE); 1296 if (pcs->irq[i].irq == NULL) { 1297 device_printf(dev, "could not allocate interrupt\n"); 1298 break; 1299 } 1300 if (i == 0) 1301 f = isp_platform_intr; 1302 else if (i == 1) 1303 f = isp_platform_intr_resp; 1304 else 1305 f = isp_platform_intr_atio; 1306 if (bus_setup_intr(dev, pcs->irq[i].irq, ISP_IFLAGS, NULL, 1307 f, isp, &pcs->irq[i].ih)) { 1308 device_printf(dev, "could not setup interrupt\n"); 1309 (void) bus_release_resource(dev, SYS_RES_IRQ, 1310 pcs->irq[i].iqd, pcs->irq[i].irq); 1311 break; 1312 } 1313 if (pcs->msicount > 1) { 1314 bus_describe_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih, 1315 "%d", i); 1316 } 1317 isp->isp_nirq = i + 1; 1318 } 1319 ISP_LOCK(isp); 1320 1321 return (isp->isp_nirq == 0); 1322 } 1323