xref: /freebsd/sys/dev/isp/isp_freebsd.h (revision e2eeea75eb8b6dd50c1298067a0655880d186734)
1 /* $FreeBSD$ */
2 /*-
3  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4  *
5  * Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions
6  *
7  * Copyright (c) 2009-2020 Alexander Motin <mav@FreeBSD.org>
8  * Copyright (c) 1997-2008 by Matthew Jacob
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice immediately at the beginning of the file, without modification,
16  *    this list of conditions, and the following disclaimer.
17  * 2. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  */
32 #ifndef	_ISP_FREEBSD_H
33 #define	_ISP_FREEBSD_H
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/endian.h>
38 #include <sys/jail.h>
39 #include <sys/lock.h>
40 #include <sys/kernel.h>
41 #include <sys/queue.h>
42 #include <sys/malloc.h>
43 #include <sys/mutex.h>
44 #include <sys/condvar.h>
45 #include <sys/rman.h>
46 #include <sys/sysctl.h>
47 
48 #include <sys/proc.h>
49 #include <sys/bus.h>
50 #include <sys/taskqueue.h>
51 
52 #include <machine/bus.h>
53 #include <machine/cpu.h>
54 #include <machine/stdarg.h>
55 
56 #include <cam/cam.h>
57 #include <cam/cam_debug.h>
58 #include <cam/cam_ccb.h>
59 #include <cam/cam_sim.h>
60 #include <cam/cam_xpt.h>
61 #include <cam/cam_xpt_sim.h>
62 #include <cam/cam_debug.h>
63 #include <cam/scsi/scsi_all.h>
64 #include <cam/scsi/scsi_message.h>
65 
66 #include "opt_ddb.h"
67 #include "opt_isp.h"
68 
69 #define	ISP_PLATFORM_VERSION_MAJOR	7
70 #define	ISP_PLATFORM_VERSION_MINOR	10
71 
72 #define	ISP_IFLAGS	INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE
73 
74 #ifdef	ISP_TARGET_MODE
75 #define	N_XCMDS		64
76 #define	XCMD_SIZE	512
77 struct ispsoftc;
78 typedef union isp_ecmd {
79 	union isp_ecmd *	next;
80 	uint8_t			data[XCMD_SIZE];
81 } isp_ecmd_t;
82 isp_ecmd_t *	isp_get_ecmd(struct ispsoftc *);
83 void		isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *);
84 
85 #define	ATPDPSIZE	4096
86 #define	ATPDPHASHSIZE	32
87 #define	ATPDPHASH(x)	((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) &  \
88 			    ((ATPDPHASHSIZE) - 1))
89 
90 #include <dev/isp/isp_target.h>
91 typedef struct atio_private_data {
92 	LIST_ENTRY(atio_private_data)	next;
93 	uint32_t	orig_datalen;
94 	uint32_t	bytes_xfered;
95 	uint32_t	bytes_in_transit;
96 	uint32_t	tag;		/* typically f/w RX_ID */
97 	lun_id_t	lun;
98 	uint32_t	nphdl;
99 	uint32_t	sid;
100 	uint32_t	did;
101 	uint16_t	rxid;	/* wire rxid */
102 	uint16_t	oxid;	/* wire oxid */
103 	uint16_t	word3;	/* PRLI word3 params */
104 	uint16_t	ctcnt;	/* number of CTIOs currently active */
105 	uint8_t		seqno;	/* CTIO sequence number */
106 	uint32_t
107 			srr_notify_rcvd	: 1,
108 			cdb0		: 8,
109 			sendst		: 1,
110 			dead		: 1,
111 			tattr		: 3,
112 			state		: 3;
113 	void *		ests;
114 	/*
115 	 * The current SRR notify copy
116 	 */
117 	uint8_t		srr[64];	/*  sb QENTRY_LEN, but order of definitions is wrong */
118 	void *		srr_ccb;
119 	uint32_t	nsrr;
120 } atio_private_data_t;
121 #define	ATPD_STATE_FREE			0
122 #define	ATPD_STATE_ATIO			1
123 #define	ATPD_STATE_CAM			2
124 #define	ATPD_STATE_CTIO			3
125 #define	ATPD_STATE_LAST_CTIO		4
126 #define	ATPD_STATE_PDON			5
127 
128 #define	ATPD_CCB_OUTSTANDING		16
129 
130 #define	ATPD_SEQ_MASK			0x7f
131 #define	ATPD_SEQ_NOTIFY_CAM		0x80
132 #define	ATPD_SET_SEQNO(hdrp, atp)	((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno
133 #define	ATPD_GET_SEQNO(hdrp)		(((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK)
134 #define	ATPD_GET_NCAM(hdrp)		((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0)
135 
136 typedef struct inot_private_data inot_private_data_t;
137 struct inot_private_data {
138 	STAILQ_ENTRY(inot_private_data)	next;
139 	isp_notify_t nt;
140 	uint8_t data[64];	/* sb QENTRY_LEN, but order of definitions is wrong */
141 	uint32_t tag_id, seq_id;
142 };
143 typedef struct isp_timed_notify_ack {
144 	void *isp;
145 	void *not;
146 	uint8_t data[64];	 /* sb QENTRY_LEN, but order of definitions is wrong */
147 	struct callout timer;
148 } isp_tna_t;
149 
150 STAILQ_HEAD(ntpdlist, inot_private_data);
151 typedef struct tstate {
152 	SLIST_ENTRY(tstate)	next;
153 	lun_id_t		ts_lun;
154 	struct ccb_hdr_slist	atios;
155 	struct ccb_hdr_slist	inots;
156 	struct ntpdlist		restart_queue;
157 } tstate_t;
158 
159 #define	LUN_HASH_SIZE		32
160 #define	LUN_HASH_FUNC(lun)	((lun) & (LUN_HASH_SIZE - 1))
161 
162 #endif
163 
164 /*
165  * Per command info.
166  */
167 struct isp_pcmd {
168 	struct isp_pcmd *	next;
169 	bus_dmamap_t 		dmap;		/* dma map for this command */
170 	struct callout		wdog;		/* watchdog timer */
171 	uint32_t		datalen;	/* data length for this command (target mode only) */
172 };
173 #define	ISP_PCMD(ccb)		(ccb)->ccb_h.spriv_ptr1
174 #define	PISP_PCMD(ccb)		((struct isp_pcmd *)ISP_PCMD(ccb))
175 
176 /*
177  * Per nexus info.
178  */
179 struct isp_nexus {
180 	uint64_t lun;			/* LUN for target */
181 	uint32_t tgt;			/* TGT for target */
182 	uint8_t crnseed;		/* next command reference number */
183 	struct isp_nexus *next;
184 };
185 #define	NEXUS_HASH_WIDTH	32
186 #define	INITIAL_NEXUS_COUNT	MAX_FC_TARG
187 #define	NEXUS_HASH(tgt, lun)	((tgt + lun) % NEXUS_HASH_WIDTH)
188 
189 /*
190  * Per channel information
191  */
192 SLIST_HEAD(tslist, tstate);
193 TAILQ_HEAD(isp_ccbq, ccb_hdr);
194 LIST_HEAD(atpdlist, atio_private_data);
195 
196 struct isp_fc {
197 	struct cam_sim *sim;
198 	struct cam_path *path;
199 	struct ispsoftc *isp;
200 	struct proc *kproc;
201 	bus_dmamap_t scmap;
202 	uint64_t def_wwpn;
203 	uint64_t def_wwnn;
204 	time_t loop_down_time;
205 	int loop_down_limit;
206 	int gone_device_time;
207 	/*
208 	 * Per target/lun info- just to keep a per-ITL nexus crn count
209 	 */
210 	struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH];
211 	struct isp_nexus *nexus_free_list;
212 	uint32_t
213 		simqfrozen	: 3,
214 		default_id	: 8,
215 		def_role	: 2,	/* default role */
216 		loop_seen_once	: 1,
217 		fcbsy		: 1,
218 		ready		: 1;
219 	struct callout gdt;	/* gone device timer */
220 	struct task gtask;
221 #ifdef	ISP_TARGET_MODE
222 	struct tslist		lun_hash[LUN_HASH_SIZE];
223 	struct isp_ccbq		waitq;		/* waiting CCBs */
224 	struct ntpdlist		ntfree;
225 	inot_private_data_t	ntpool[ATPDPSIZE];
226 	struct atpdlist		atfree;
227 	struct atpdlist		atused[ATPDPHASHSIZE];
228 	atio_private_data_t	atpool[ATPDPSIZE];
229 #if defined(DEBUG)
230 	unsigned int inject_lost_data_frame;
231 #endif
232 #endif
233 	int			num_threads;
234 };
235 
236 struct isposinfo {
237 	/*
238 	 * Linkage, locking, and identity
239 	 */
240 	struct mtx		lock;
241 	device_t		dev;
242 	struct cdev *		cdev;
243 	struct cam_devq *	devq;
244 
245 	/*
246 	 * Firmware pointer
247 	 */
248 	const struct firmware *	fw;
249 
250 	/*
251 	 * DMA related stuff
252 	 */
253 	struct resource *	regs;
254 	struct resource *	regs2;
255 	bus_dma_tag_t		dmat;
256 	bus_dma_tag_t		reqdmat;
257 	bus_dma_tag_t		respdmat;
258 	bus_dma_tag_t		atiodmat;
259 	bus_dma_tag_t		iocbdmat;
260 	bus_dma_tag_t		scdmat;
261 	bus_dmamap_t		reqmap;
262 	bus_dmamap_t		respmap;
263 	bus_dmamap_t		atiomap;
264 	bus_dmamap_t		iocbmap;
265 
266 	/*
267 	 * Command and transaction related related stuff
268 	 */
269 	struct isp_pcmd *	pcmd_pool;
270 	struct isp_pcmd *	pcmd_free;
271 
272 	int			mbox_sleeping;
273 	int			mbox_sleep_ok;
274 	int			mboxbsy;
275 	int			mboxcmd_done;
276 
277 	struct callout		tmo;	/* general timer */
278 
279 	/*
280 	 * misc- needs to be sorted better XXXXXX
281 	 */
282 	int			framesize;
283 	int			exec_throttle;
284 	int			cont_max;
285 
286 #ifdef	ISP_TARGET_MODE
287 	bus_dma_tag_t		ecmd_dmat;
288 	bus_dmamap_t		ecmd_map;
289 	bus_addr_t		ecmd_dma;
290 	isp_ecmd_t *		ecmd_base;
291 	isp_ecmd_t *		ecmd_free;
292 #endif
293 
294 	/*
295 	 * Per-type private storage...
296 	 */
297 	union {
298 		struct isp_fc *fc;
299 		void *ptr;
300 	} pc;
301 
302 	int			is_exiting;
303 };
304 #define	ISP_FC_PC(isp, chan)	(&(isp)->isp_osinfo.pc.fc[(chan)])
305 #define	ISP_GET_PC(isp, chan, tag, rslt)		\
306 	rslt = ISP_FC_PC(isp, chan)->tag
307 #define	ISP_GET_PC_ADDR(isp, chan, tag, rp)		\
308 	rp = &ISP_FC_PC(isp, chan)->tag
309 #define	ISP_SET_PC(isp, chan, tag, val)			\
310 	ISP_FC_PC(isp, chan)-> tag = val
311 
312 #define	FCP_NEXT_CRN	isp_fcp_next_crn
313 #define	isp_lock	isp_osinfo.lock
314 #define	isp_regs	isp_osinfo.regs
315 #define	isp_regs2	isp_osinfo.regs2
316 
317 /*
318  * Locking macros...
319  */
320 #define	ISP_LOCK(isp)	mtx_lock(&(isp)->isp_lock)
321 #define	ISP_UNLOCK(isp)	mtx_unlock(&(isp)->isp_lock)
322 #define	ISP_ASSERT_LOCKED(isp)	mtx_assert(&(isp)->isp_lock, MA_OWNED)
323 
324 /*
325  * Required Macros/Defines
326  */
327 #define	ISP_FC_SCRLEN		0x1000
328 
329 #define	ISP_MEMZERO(a, b)	memset(a, 0, b)
330 #define	ISP_MEMCPY		memcpy
331 #define	ISP_SNPRINTF		snprintf
332 #define	ISP_DELAY(x)		DELAY(x)
333 #define	ISP_SLEEP(isp, x)	msleep_sbt(&(isp)->isp_osinfo.is_exiting, \
334     &(isp)->isp_lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0)
335 
336 #define	ISP_MIN			imin
337 
338 #ifndef	DIAGNOSTIC
339 #define	ISP_INLINE		__inline
340 #else
341 #define	ISP_INLINE
342 #endif
343 
344 #define	NANOTIME_T		struct timespec
345 #define	GET_NANOTIME		nanotime
346 #define	GET_NANOSEC(x)		((x)->tv_sec * 1000000000 + (x)->tv_nsec)
347 #define	NANOTIME_SUB		isp_nanotime_sub
348 
349 #define	MAXISPREQUEST(isp)	1024
350 
351 #define	MEMORYBARRIER(isp, type, offset, size, chan)		\
352 switch (type) {							\
353 case SYNC_REQUEST:						\
354 	bus_dmamap_sync(isp->isp_osinfo.reqdmat,		\
355 	   isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE);	\
356 	break;							\
357 case SYNC_RESULT:						\
358 	bus_dmamap_sync(isp->isp_osinfo.respdmat, 		\
359 	   isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD);	\
360 	break;							\
361 case SYNC_SFORDEV:						\
362 {								\
363 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
364 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
365 	   BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);		\
366 	break;							\
367 }								\
368 case SYNC_SFORCPU:						\
369 {								\
370 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
371 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
372 	   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);	\
373 	break;							\
374 }								\
375 case SYNC_REG:							\
376 	bus_barrier(isp->isp_osinfo.regs, offset, size,		\
377 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);	\
378 	break;							\
379 case SYNC_ATIOQ:						\
380 	bus_dmamap_sync(isp->isp_osinfo.atiodmat, 		\
381 	   isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD);	\
382 	break;							\
383 case SYNC_IFORDEV:						\
384 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
385 	   BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);		\
386 	break;							\
387 case SYNC_IFORCPU:						\
388 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
389 	   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);	\
390 	break;							\
391 default:							\
392 	break;							\
393 }
394 
395 #define	MEMORYBARRIERW(isp, type, offset, size, chan)		\
396 switch (type) {							\
397 case SYNC_REQUEST:						\
398 	bus_dmamap_sync(isp->isp_osinfo.reqdmat,		\
399 	   isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE);	\
400 	break;							\
401 case SYNC_SFORDEV:						\
402 {								\
403 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
404 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
405 	   BUS_DMASYNC_PREWRITE);				\
406 	break;							\
407 }								\
408 case SYNC_SFORCPU:						\
409 {								\
410 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
411 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
412 	   BUS_DMASYNC_POSTWRITE);				\
413 	break;							\
414 }								\
415 case SYNC_REG:							\
416 	bus_barrier(isp->isp_osinfo.regs, offset, size,		\
417 	    BUS_SPACE_BARRIER_WRITE);				\
418 	break;							\
419 case SYNC_IFORDEV:						\
420 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
421 	   BUS_DMASYNC_PREWRITE);				\
422 	break;							\
423 case SYNC_IFORCPU:						\
424 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
425 	   BUS_DMASYNC_POSTWRITE);				\
426 	break;							\
427 default:							\
428 	break;							\
429 }
430 
431 #define	MBOX_ACQUIRE			isp_mbox_acquire
432 #define	MBOX_WAIT_COMPLETE		isp_mbox_wait_complete
433 #define	MBOX_NOTIFY_COMPLETE		isp_mbox_notify_done
434 #define	MBOX_RELEASE			isp_mbox_release
435 
436 #define	FC_SCRATCH_ACQUIRE		isp_fc_scratch_acquire
437 #define	FC_SCRATCH_RELEASE(isp, chan)	isp->isp_osinfo.pc.fc[chan].fcbsy = 0
438 
439 #ifndef	SCSI_GOOD
440 #define	SCSI_GOOD	SCSI_STATUS_OK
441 #endif
442 #ifndef	SCSI_CHECK
443 #define	SCSI_CHECK	SCSI_STATUS_CHECK_COND
444 #endif
445 #ifndef	SCSI_BUSY
446 #define	SCSI_BUSY	SCSI_STATUS_BUSY
447 #endif
448 #ifndef	SCSI_QFULL
449 #define	SCSI_QFULL	SCSI_STATUS_QUEUE_FULL
450 #endif
451 
452 #define	XS_T			struct ccb_scsiio
453 #define	XS_DMA_ADDR_T		bus_addr_t
454 #define XS_GET_DMA64_SEG(a, b, c)		\
455 {						\
456 	ispds64_t *d = a;			\
457 	bus_dma_segment_t *e = b;		\
458 	uint32_t f = c;				\
459 	e += f;					\
460         d->ds_base = DMA_LO32(e->ds_addr);	\
461         d->ds_basehi = DMA_HI32(e->ds_addr);	\
462         d->ds_count = e->ds_len;		\
463 }
464 #define	XS_ISP(ccb)		cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path))
465 #define	XS_CHANNEL(ccb)		cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path))
466 #define	XS_TGT(ccb)		(ccb)->ccb_h.target_id
467 #define	XS_LUN(ccb)		(ccb)->ccb_h.target_lun
468 
469 #define	XS_CDBP(ccb)	\
470 	(((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \
471 	 (ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes)
472 
473 #define	XS_CDBLEN(ccb)		(ccb)->cdb_len
474 #define	XS_XFRLEN(ccb)		(ccb)->dxfer_len
475 #define	XS_TIME(ccb)	\
476 	(((ccb)->ccb_h.timeout > 0xffff * 1000 - 999) ? 0 : \
477 	  (((ccb)->ccb_h.timeout + 999) / 1000))
478 #define	XS_GET_RESID(ccb)	(ccb)->resid
479 #define	XS_SET_RESID(ccb, r)	(ccb)->resid = r
480 #define	XS_STSP(ccb)		(&(ccb)->scsi_status)
481 #define	XS_SNSP(ccb)		(&(ccb)->sense_data)
482 
483 #define	XS_TOT_SNSLEN(ccb)	ccb->sense_len
484 #define	XS_CUR_SNSLEN(ccb)	(ccb->sense_len - ccb->sense_resid)
485 
486 #define	XS_SNSKEY(ccb)		(scsi_get_sense_key(&(ccb)->sense_data, \
487 				 ccb->sense_len - ccb->sense_resid, 1))
488 
489 #define	XS_SNSASC(ccb)		(scsi_get_asc(&(ccb)->sense_data,	\
490 				 ccb->sense_len - ccb->sense_resid, 1))
491 
492 #define	XS_SNSASCQ(ccb)		(scsi_get_ascq(&(ccb)->sense_data,	\
493 				 ccb->sense_len - ccb->sense_resid, 1))
494 #define	XS_TAG_P(ccb)	\
495 	(((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \
496 	 (ccb)->tag_action != CAM_TAG_ACTION_NONE)
497 
498 #define	XS_TAG_TYPE(ccb)				\
499 	((ccb->tag_action == MSG_HEAD_OF_QUEUE_TASK)? FCP_CMND_TASK_ATTR_HEAD:\
500 	 ((ccb->tag_action == MSG_ORDERED_TASK) ? FCP_CMND_TASK_ATTR_ORDERED :\
501 	 ((ccb->tag_action == MSG_ACA_TASK) ? FCP_CMND_TASK_ATTR_ACA :	\
502 	  FCP_CMND_TASK_ATTR_SIMPLE)))
503 
504 #define	XS_PRIORITY(ccb)	(ccb)->priority
505 
506 #define	XS_SETERR(ccb, v)	(ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \
507 				(ccb)->ccb_h.status |= v
508 
509 #	define	HBA_NOERROR		CAM_REQ_INPROG
510 #	define	HBA_BOTCH		CAM_UNREC_HBA_ERROR
511 #	define	HBA_CMDTIMEOUT		CAM_CMD_TIMEOUT
512 #	define	HBA_SELTIMEOUT		CAM_SEL_TIMEOUT
513 #	define	HBA_TGTBSY		CAM_SCSI_STATUS_ERROR
514 #	define	HBA_REQINVAL		CAM_REQ_INVALID
515 #	define	HBA_BUSRESET		CAM_SCSI_BUS_RESET
516 #	define	HBA_ABORTED		CAM_REQ_ABORTED
517 #	define	HBA_DATAOVR		CAM_DATA_RUN_ERR
518 #	define	HBA_ARQFAIL		CAM_AUTOSENSE_FAIL
519 
520 
521 #define	XS_ERR(ccb)		((ccb)->ccb_h.status & CAM_STATUS_MASK)
522 
523 #define	XS_NOERR(ccb)		(((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
524 
525 #define	XS_INITERR(ccb)		XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len
526 
527 #define	XS_SAVE_SENSE(xs, sp, len)	do {				\
528 		uint32_t amt = min(len, (xs)->sense_len);		\
529 		memcpy(&(xs)->sense_data, sp, amt);			\
530 		(xs)->sense_resid = (xs)->sense_len - amt;		\
531 		(xs)->ccb_h.status |= CAM_AUTOSNS_VALID;		\
532 	} while (0)
533 
534 #define	XS_SENSE_APPEND(xs, sp, len)	do {				\
535 		uint8_t *ptr = (uint8_t *)(&(xs)->sense_data) +		\
536 		    ((xs)->sense_len - (xs)->sense_resid);		\
537 		uint32_t amt = min((len), (xs)->sense_resid);		\
538 		memcpy(ptr, sp, amt);					\
539 		(xs)->sense_resid -= amt;				\
540 	} while (0)
541 
542 #define	XS_SENSE_VALID(xs)	(((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
543 
544 #define	DEFAULT_FRAMESIZE(isp)		isp->isp_osinfo.framesize
545 #define	DEFAULT_EXEC_THROTTLE(isp)	isp->isp_osinfo.exec_throttle
546 
547 #define	DEFAULT_ROLE(isp, chan)		ISP_FC_PC(isp, chan)->def_role
548 
549 #define	DEFAULT_LOOPID(x, chan)		isp->isp_osinfo.pc.fc[chan].default_id
550 
551 #define DEFAULT_NODEWWN(isp, chan)  	isp_default_wwn(isp, chan, 0, 1)
552 #define DEFAULT_PORTWWN(isp, chan)  	isp_default_wwn(isp, chan, 0, 0)
553 #define ACTIVE_NODEWWN(isp, chan)   	isp_default_wwn(isp, chan, 1, 1)
554 #define ACTIVE_PORTWWN(isp, chan)   	isp_default_wwn(isp, chan, 1, 0)
555 
556 
557 #if	BYTE_ORDER == BIG_ENDIAN
558 #define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
559 #define	ISP_IOXPUT_16(isp, s, d)	*(d) = bswap16(s)
560 #define	ISP_IOXPUT_32(isp, s, d)	*(d) = bswap32(s)
561 #define	ISP_IOXGET_8(isp, s, d)		d = (*((uint8_t *)s))
562 #define	ISP_IOXGET_16(isp, s, d)	d = bswap16(*((uint16_t *)s))
563 #define	ISP_IOXGET_32(isp, s, d)	d = bswap32(*((uint32_t *)s))
564 #define	ISP_SWIZZLE_NVRAM_WORD(isp, rp)	*rp = bswap16(*rp)
565 #define	ISP_SWIZZLE_NVRAM_LONG(isp, rp)	*rp = bswap32(*rp)
566 
567 #define	ISP_IOZGET_8(isp, s, d)		d = (*((uint8_t *)s))
568 #define	ISP_IOZGET_16(isp, s, d)	d = (*((uint16_t *)s))
569 #define	ISP_IOZGET_32(isp, s, d)	d = (*((uint32_t *)s))
570 #define	ISP_IOZPUT_8(isp, s, d)		*(d) = s
571 #define	ISP_IOZPUT_16(isp, s, d)	*(d) = s
572 #define	ISP_IOZPUT_32(isp, s, d)	*(d) = s
573 
574 #else
575 #define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
576 #define	ISP_IOXPUT_16(isp, s, d)	*(d) = s
577 #define	ISP_IOXPUT_32(isp, s, d)	*(d) = s
578 #define	ISP_IOXGET_8(isp, s, d)		d = *(s)
579 #define	ISP_IOXGET_16(isp, s, d)	d = *(s)
580 #define	ISP_IOXGET_32(isp, s, d)	d = *(s)
581 #define	ISP_SWIZZLE_NVRAM_WORD(isp, rp)
582 #define	ISP_SWIZZLE_NVRAM_LONG(isp, rp)
583 
584 #define	ISP_IOZPUT_8(isp, s, d)		*(d) = s
585 #define	ISP_IOZPUT_16(isp, s, d)	*(d) = bswap16(s)
586 #define	ISP_IOZPUT_32(isp, s, d)	*(d) = bswap32(s)
587 #define	ISP_IOZGET_8(isp, s, d)		d = (*((uint8_t *)(s)))
588 #define	ISP_IOZGET_16(isp, s, d)	d = bswap16(*((uint16_t *)(s)))
589 #define	ISP_IOZGET_32(isp, s, d)	d = bswap32(*((uint32_t *)(s)))
590 #endif
591 
592 #define	ISP_SWAP16(isp, s)	bswap16(s)
593 #define	ISP_SWAP32(isp, s)	bswap32(s)
594 
595 /*
596  * Includes of common header files
597  */
598 
599 #include <dev/isp/ispreg.h>
600 #include <dev/isp/ispvar.h>
601 #include <dev/isp/ispmbox.h>
602 
603 /*
604  * isp_osinfo definiitions && shorthand
605  */
606 #define	SIMQFRZ_RESOURCE	0x1
607 #define	SIMQFRZ_LOOPDOWN	0x2
608 #define	SIMQFRZ_TIMED		0x4
609 
610 #define	isp_dev		isp_osinfo.dev
611 
612 /*
613  * prototypes for isp_pci && isp_freebsd to share
614  */
615 extern int isp_attach(ispsoftc_t *);
616 extern int isp_detach(ispsoftc_t *);
617 extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int);
618 
619 /*
620  * driver global data
621  */
622 extern int isp_announced;
623 extern int isp_loop_down_limit;
624 extern int isp_gone_device_time;
625 extern int isp_quickboot_time;
626 
627 /*
628  * Platform Library Functions
629  */
630 void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4);
631 void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5);
632 uint64_t isp_nanotime_sub(struct timespec *, struct timespec *);
633 int isp_mbox_acquire(ispsoftc_t *);
634 void isp_mbox_wait_complete(ispsoftc_t *, mbreg_t *);
635 void isp_mbox_notify_done(ispsoftc_t *);
636 void isp_mbox_release(ispsoftc_t *);
637 int isp_fc_scratch_acquire(ispsoftc_t *, int);
638 void isp_platform_intr(void *);
639 void isp_platform_intr_resp(void *);
640 void isp_platform_intr_atio(void *);
641 void isp_common_dmateardown(ispsoftc_t *, struct ccb_scsiio *, uint32_t);
642 void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int);
643 int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *);
644 
645 /*
646  * Platform Version specific defines
647  */
648 #define	ISP_PATH_PRT(i, l, p, ...)					\
649 	if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) {		\
650                 xpt_print(p, __VA_ARGS__);				\
651         }
652 
653 /*
654  * ISP General Library functions
655  */
656 
657 #include <dev/isp/isp_library.h>
658 
659 #endif	/* _ISP_FREEBSD_H */
660