1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions 5 * 6 * Copyright (c) 2009-2020 Alexander Motin <mav@FreeBSD.org> 7 * Copyright (c) 1997-2008 by Matthew Jacob 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 #ifndef _ISP_FREEBSD_H 32 #define _ISP_FREEBSD_H 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/endian.h> 37 #include <sys/jail.h> 38 #include <sys/lock.h> 39 #include <sys/kernel.h> 40 #include <sys/queue.h> 41 #include <sys/malloc.h> 42 #include <sys/mutex.h> 43 #include <sys/condvar.h> 44 #include <sys/rman.h> 45 #include <sys/sysctl.h> 46 47 #include <sys/proc.h> 48 #include <sys/bus.h> 49 #include <sys/taskqueue.h> 50 51 #include <machine/bus.h> 52 #include <machine/cpu.h> 53 #include <machine/stdarg.h> 54 55 #include <cam/cam.h> 56 #include <cam/cam_debug.h> 57 #include <cam/cam_ccb.h> 58 #include <cam/cam_sim.h> 59 #include <cam/cam_xpt.h> 60 #include <cam/cam_xpt_sim.h> 61 #include <cam/cam_debug.h> 62 #include <cam/scsi/scsi_all.h> 63 #include <cam/scsi/scsi_message.h> 64 65 #include "opt_ddb.h" 66 #include "opt_isp.h" 67 68 #define ISP_PLATFORM_VERSION_MAJOR 7 69 #define ISP_PLATFORM_VERSION_MINOR 10 70 71 #define ISP_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE 72 73 #ifdef ISP_TARGET_MODE 74 #define N_XCMDS 64 75 #define XCMD_SIZE 512 76 struct ispsoftc; 77 typedef union isp_ecmd { 78 union isp_ecmd * next; 79 uint8_t data[XCMD_SIZE]; 80 } isp_ecmd_t; 81 isp_ecmd_t * isp_get_ecmd(struct ispsoftc *); 82 void isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *); 83 84 #define ATPDPSIZE 4096 85 #define ATPDPHASHSIZE 32 86 #define ATPDPHASH(x) ((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) & \ 87 ((ATPDPHASHSIZE) - 1)) 88 89 #include <dev/isp/isp_target.h> 90 typedef struct atio_private_data { 91 LIST_ENTRY(atio_private_data) next; 92 uint32_t orig_datalen; 93 uint32_t bytes_xfered; 94 uint32_t bytes_in_transit; 95 uint32_t tag; /* typically f/w RX_ID */ 96 lun_id_t lun; 97 uint32_t nphdl; 98 uint32_t sid; 99 uint32_t did; 100 uint16_t rxid; /* wire rxid */ 101 uint16_t oxid; /* wire oxid */ 102 uint16_t word3; /* PRLI word3 params */ 103 uint16_t ctcnt; /* number of CTIOs currently active */ 104 uint8_t seqno; /* CTIO sequence number */ 105 uint32_t 106 srr_notify_rcvd : 1, 107 cdb0 : 8, 108 sendst : 1, 109 dead : 1, 110 tattr : 3, 111 state : 3; 112 void * ests; 113 /* 114 * The current SRR notify copy 115 */ 116 uint8_t srr[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 117 void * srr_ccb; 118 uint32_t nsrr; 119 } atio_private_data_t; 120 #define ATPD_STATE_FREE 0 121 #define ATPD_STATE_ATIO 1 122 #define ATPD_STATE_CAM 2 123 #define ATPD_STATE_CTIO 3 124 #define ATPD_STATE_LAST_CTIO 4 125 #define ATPD_STATE_PDON 5 126 127 #define ATPD_CCB_OUTSTANDING 16 128 129 #define ATPD_SEQ_MASK 0x7f 130 #define ATPD_SEQ_NOTIFY_CAM 0x80 131 #define ATPD_SET_SEQNO(hdrp, atp) ((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno 132 #define ATPD_GET_SEQNO(hdrp) (((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK) 133 #define ATPD_GET_NCAM(hdrp) ((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0) 134 135 typedef struct inot_private_data inot_private_data_t; 136 struct inot_private_data { 137 STAILQ_ENTRY(inot_private_data) next; 138 isp_notify_t nt; 139 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 140 uint32_t tag_id, seq_id; 141 }; 142 typedef struct isp_timed_notify_ack { 143 void *isp; 144 void *not; 145 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 146 struct callout timer; 147 } isp_tna_t; 148 149 STAILQ_HEAD(ntpdlist, inot_private_data); 150 typedef struct tstate { 151 SLIST_ENTRY(tstate) next; 152 lun_id_t ts_lun; 153 struct ccb_hdr_slist atios; 154 struct ccb_hdr_slist inots; 155 struct ntpdlist restart_queue; 156 } tstate_t; 157 158 #define LUN_HASH_SIZE 32 159 #define LUN_HASH_FUNC(lun) ((lun) & (LUN_HASH_SIZE - 1)) 160 161 #endif 162 163 /* 164 * Per command info. 165 */ 166 struct isp_pcmd { 167 struct isp_pcmd * next; 168 bus_dmamap_t dmap; /* dma map for this command */ 169 struct callout wdog; /* watchdog timer */ 170 uint32_t datalen; /* data length for this command (target mode only) */ 171 }; 172 #define ISP_PCMD(ccb) (ccb)->ccb_h.spriv_ptr1 173 #define PISP_PCMD(ccb) ((struct isp_pcmd *)ISP_PCMD(ccb)) 174 175 /* 176 * Per nexus info. 177 */ 178 struct isp_nexus { 179 uint64_t lun; /* LUN for target */ 180 uint32_t tgt; /* TGT for target */ 181 uint8_t crnseed; /* next command reference number */ 182 struct isp_nexus *next; 183 }; 184 #define NEXUS_HASH_WIDTH 32 185 #define INITIAL_NEXUS_COUNT MAX_FC_TARG 186 #define NEXUS_HASH(tgt, lun) ((tgt + lun) % NEXUS_HASH_WIDTH) 187 188 /* 189 * Per channel information 190 */ 191 SLIST_HEAD(tslist, tstate); 192 TAILQ_HEAD(isp_ccbq, ccb_hdr); 193 LIST_HEAD(atpdlist, atio_private_data); 194 195 struct isp_fc { 196 struct cam_sim *sim; 197 struct cam_path *path; 198 struct ispsoftc *isp; 199 struct proc *kproc; 200 bus_dmamap_t scmap; 201 uint64_t def_wwpn; 202 uint64_t def_wwnn; 203 time_t loop_down_time; 204 int loop_down_limit; 205 int gone_device_time; 206 /* 207 * Per target/lun info- just to keep a per-ITL nexus crn count 208 */ 209 struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH]; 210 struct isp_nexus *nexus_free_list; 211 uint32_t 212 simqfrozen : 3, 213 default_id : 8, 214 def_role : 2, /* default role */ 215 loop_seen_once : 1, 216 fcbsy : 1, 217 ready : 1; 218 struct callout gdt; /* gone device timer */ 219 struct task gtask; 220 #ifdef ISP_TARGET_MODE 221 struct tslist lun_hash[LUN_HASH_SIZE]; 222 struct isp_ccbq waitq; /* waiting CCBs */ 223 struct ntpdlist ntfree; 224 inot_private_data_t ntpool[ATPDPSIZE]; 225 struct atpdlist atfree; 226 struct atpdlist atused[ATPDPHASHSIZE]; 227 atio_private_data_t atpool[ATPDPSIZE]; 228 #if defined(DEBUG) 229 unsigned int inject_lost_data_frame; 230 #endif 231 #endif 232 int num_threads; 233 }; 234 235 struct isposinfo { 236 /* 237 * Linkage, locking, and identity 238 */ 239 struct mtx lock; 240 device_t dev; 241 struct cdev * cdev; 242 struct cam_devq * devq; 243 244 /* 245 * Firmware pointer 246 */ 247 const struct firmware * fw; 248 249 /* 250 * DMA related stuff 251 */ 252 struct resource * regs; 253 struct resource * regs2; 254 bus_dma_tag_t dmat; 255 bus_dma_tag_t reqdmat; 256 bus_dma_tag_t respdmat; 257 bus_dma_tag_t atiodmat; 258 bus_dma_tag_t iocbdmat; 259 bus_dma_tag_t scdmat; 260 bus_dmamap_t reqmap; 261 bus_dmamap_t respmap; 262 bus_dmamap_t atiomap; 263 bus_dmamap_t iocbmap; 264 265 /* 266 * Command and transaction related related stuff 267 */ 268 struct isp_pcmd * pcmd_pool; 269 struct isp_pcmd * pcmd_free; 270 271 struct callout tmo; /* general timer */ 272 273 /* 274 * misc- needs to be sorted better XXXXXX 275 */ 276 int framesize; 277 278 #ifdef ISP_TARGET_MODE 279 bus_dma_tag_t ecmd_dmat; 280 bus_dmamap_t ecmd_map; 281 bus_addr_t ecmd_dma; 282 isp_ecmd_t * ecmd_base; 283 isp_ecmd_t * ecmd_free; 284 #endif 285 286 /* 287 * Per-channel storage. 288 */ 289 struct isp_fc *fc; 290 291 int is_exiting; 292 }; 293 #define ISP_FC_PC(isp, chan) (&(isp)->isp_osinfo.fc[(chan)]) 294 295 #define FCP_NEXT_CRN isp_fcp_next_crn 296 #define isp_lock isp_osinfo.lock 297 #define isp_regs isp_osinfo.regs 298 #define isp_regs2 isp_osinfo.regs2 299 300 /* 301 * Locking macros... 302 */ 303 #define ISP_LOCK(isp) mtx_lock(&(isp)->isp_lock) 304 #define ISP_UNLOCK(isp) mtx_unlock(&(isp)->isp_lock) 305 #define ISP_ASSERT_LOCKED(isp) mtx_assert(&(isp)->isp_lock, MA_OWNED) 306 307 /* 308 * Required Macros/Defines 309 */ 310 #define ISP_FC_SCRLEN 0x1000 311 312 #define ISP_MEMZERO(a, b) memset(a, 0, b) 313 #define ISP_MEMCPY memcpy 314 #define ISP_SNPRINTF snprintf 315 #define ISP_DELAY(x) DELAY(x) 316 #define ISP_SLEEP(isp, x) msleep_sbt(&(isp)->isp_osinfo.is_exiting, \ 317 &(isp)->isp_lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0) 318 319 #define ISP_MIN imin 320 321 #ifndef DIAGNOSTIC 322 #define ISP_INLINE __inline 323 #else 324 #define ISP_INLINE 325 #endif 326 327 #define ISP_DMASETUP(isp, xs, req) isp_dmasetup(isp, xs, req) 328 #define ISP_DMAFREE(isp, xs) isp_dmafree(isp, xs) 329 330 #define NANOTIME_T struct timespec 331 #define GET_NANOTIME nanotime 332 #define GET_NANOSEC(x) ((x)->tv_sec * 1000000000 + (x)->tv_nsec) 333 #define NANOTIME_SUB isp_nanotime_sub 334 335 #define MEMORYBARRIER(isp, type, offset, size, chan) \ 336 switch (type) { \ 337 case SYNC_REQUEST: \ 338 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 339 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 340 break; \ 341 case SYNC_RESULT: \ 342 bus_dmamap_sync(isp->isp_osinfo.respdmat, \ 343 isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD); \ 344 break; \ 345 case SYNC_SFORDEV: \ 346 { \ 347 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 348 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 349 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 350 break; \ 351 } \ 352 case SYNC_SFORCPU: \ 353 { \ 354 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 355 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 356 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 357 break; \ 358 } \ 359 case SYNC_REG: \ 360 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 361 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \ 362 break; \ 363 case SYNC_ATIOQ: \ 364 bus_dmamap_sync(isp->isp_osinfo.atiodmat, \ 365 isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD); \ 366 break; \ 367 case SYNC_IFORDEV: \ 368 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 369 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 370 break; \ 371 case SYNC_IFORCPU: \ 372 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 373 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 374 break; \ 375 default: \ 376 break; \ 377 } 378 379 #define MEMORYBARRIERW(isp, type, offset, size, chan) \ 380 switch (type) { \ 381 case SYNC_REQUEST: \ 382 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 383 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 384 break; \ 385 case SYNC_SFORDEV: \ 386 { \ 387 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 388 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 389 BUS_DMASYNC_PREWRITE); \ 390 break; \ 391 } \ 392 case SYNC_SFORCPU: \ 393 { \ 394 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 395 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 396 BUS_DMASYNC_POSTWRITE); \ 397 break; \ 398 } \ 399 case SYNC_REG: \ 400 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 401 BUS_SPACE_BARRIER_WRITE); \ 402 break; \ 403 case SYNC_IFORDEV: \ 404 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 405 BUS_DMASYNC_PREWRITE); \ 406 break; \ 407 case SYNC_IFORCPU: \ 408 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 409 BUS_DMASYNC_POSTWRITE); \ 410 break; \ 411 default: \ 412 break; \ 413 } 414 415 #define FC_SCRATCH_ACQUIRE isp_fc_scratch_acquire 416 #define FC_SCRATCH_RELEASE(isp, chan) ISP_FC_PC(isp, chan)->fcbsy = 0 417 418 #ifndef SCSI_GOOD 419 #define SCSI_GOOD SCSI_STATUS_OK 420 #endif 421 #ifndef SCSI_CHECK 422 #define SCSI_CHECK SCSI_STATUS_CHECK_COND 423 #endif 424 #ifndef SCSI_BUSY 425 #define SCSI_BUSY SCSI_STATUS_BUSY 426 #endif 427 #ifndef SCSI_QFULL 428 #define SCSI_QFULL SCSI_STATUS_QUEUE_FULL 429 #endif 430 431 #define XS_T struct ccb_scsiio 432 #define XS_DMA_ADDR_T bus_addr_t 433 #define XS_GET_DMA64_SEG(a, b, c) \ 434 { \ 435 ispds64_t *d = a; \ 436 bus_dma_segment_t *e = b; \ 437 uint32_t f = c; \ 438 e += f; \ 439 d->ds_base = DMA_LO32(e->ds_addr); \ 440 d->ds_basehi = DMA_HI32(e->ds_addr); \ 441 d->ds_count = e->ds_len; \ 442 } 443 #define XS_ISP(ccb) cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path)) 444 #define XS_CHANNEL(ccb) cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path)) 445 #define XS_TGT(ccb) (ccb)->ccb_h.target_id 446 #define XS_LUN(ccb) (ccb)->ccb_h.target_lun 447 448 #define XS_CDBP(ccb) \ 449 (((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \ 450 (ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes) 451 452 #define XS_CDBLEN(ccb) (ccb)->cdb_len 453 #define XS_XFRLEN(ccb) (ccb)->dxfer_len 454 #define XS_XFRIN(ccb) (((ccb)->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 455 #define XS_XFROUT(ccb) (((ccb)->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 456 #define XS_TIME(ccb) \ 457 (((ccb)->ccb_h.timeout > 0xffff * 1000 - 999) ? 0 : \ 458 (((ccb)->ccb_h.timeout + 999) / 1000)) 459 #define XS_GET_RESID(ccb) (ccb)->resid 460 #define XS_SET_RESID(ccb, r) (ccb)->resid = r 461 #define XS_STSP(ccb) (&(ccb)->scsi_status) 462 #define XS_SNSP(ccb) (&(ccb)->sense_data) 463 464 #define XS_TOT_SNSLEN(ccb) ccb->sense_len 465 #define XS_CUR_SNSLEN(ccb) (ccb->sense_len - ccb->sense_resid) 466 467 #define XS_SNSKEY(ccb) (scsi_get_sense_key(&(ccb)->sense_data, \ 468 ccb->sense_len - ccb->sense_resid, 1)) 469 470 #define XS_SNSASC(ccb) (scsi_get_asc(&(ccb)->sense_data, \ 471 ccb->sense_len - ccb->sense_resid, 1)) 472 473 #define XS_SNSASCQ(ccb) (scsi_get_ascq(&(ccb)->sense_data, \ 474 ccb->sense_len - ccb->sense_resid, 1)) 475 #define XS_TAG_P(ccb) \ 476 (((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \ 477 (ccb)->tag_action != CAM_TAG_ACTION_NONE) 478 479 #define XS_TAG_TYPE(ccb) \ 480 ((ccb->tag_action == MSG_HEAD_OF_QUEUE_TASK)? FCP_CMND_TASK_ATTR_HEAD:\ 481 ((ccb->tag_action == MSG_ORDERED_TASK) ? FCP_CMND_TASK_ATTR_ORDERED :\ 482 ((ccb->tag_action == MSG_ACA_TASK) ? FCP_CMND_TASK_ATTR_ACA : \ 483 FCP_CMND_TASK_ATTR_SIMPLE))) 484 485 #define XS_PRIORITY(ccb) (ccb)->priority 486 487 #define XS_SETERR(ccb, v) (ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \ 488 (ccb)->ccb_h.status |= v 489 490 # define HBA_NOERROR CAM_REQ_INPROG 491 # define HBA_BOTCH CAM_UNREC_HBA_ERROR 492 # define HBA_CMDTIMEOUT CAM_CMD_TIMEOUT 493 # define HBA_SELTIMEOUT CAM_SEL_TIMEOUT 494 # define HBA_TGTBSY CAM_SCSI_STATUS_ERROR 495 # define HBA_REQINVAL CAM_REQ_INVALID 496 # define HBA_BUSRESET CAM_SCSI_BUS_RESET 497 # define HBA_ABORTED CAM_REQ_ABORTED 498 # define HBA_DATAOVR CAM_DATA_RUN_ERR 499 # define HBA_ARQFAIL CAM_AUTOSENSE_FAIL 500 501 502 #define XS_ERR(ccb) ((ccb)->ccb_h.status & CAM_STATUS_MASK) 503 504 #define XS_NOERR(ccb) (((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) 505 506 #define XS_INITERR(ccb) XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len 507 508 #define XS_SAVE_SENSE(xs, sp, len) do { \ 509 uint32_t amt = min(len, (xs)->sense_len); \ 510 memcpy(&(xs)->sense_data, sp, amt); \ 511 (xs)->sense_resid = (xs)->sense_len - amt; \ 512 (xs)->ccb_h.status |= CAM_AUTOSNS_VALID; \ 513 } while (0) 514 515 #define XS_SENSE_APPEND(xs, sp, len) do { \ 516 uint8_t *ptr = (uint8_t *)(&(xs)->sense_data) + \ 517 ((xs)->sense_len - (xs)->sense_resid); \ 518 uint32_t amt = min((len), (xs)->sense_resid); \ 519 memcpy(ptr, sp, amt); \ 520 (xs)->sense_resid -= amt; \ 521 } while (0) 522 523 #define XS_SENSE_VALID(xs) (((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0) 524 525 #define DEFAULT_FRAMESIZE(isp) isp->isp_osinfo.framesize 526 527 #define DEFAULT_ROLE(isp, chan) ISP_FC_PC(isp, chan)->def_role 528 529 #define DEFAULT_LOOPID(isp, chan) ISP_FC_PC(isp, chan)->default_id 530 531 #define DEFAULT_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 0, 1) 532 #define DEFAULT_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 0, 0) 533 #define ACTIVE_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 1, 1) 534 #define ACTIVE_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 1, 0) 535 536 537 #if BYTE_ORDER == BIG_ENDIAN 538 #define ISP_IOXPUT_8(isp, s, d) *(d) = s 539 #define ISP_IOXPUT_16(isp, s, d) *(d) = bswap16(s) 540 #define ISP_IOXPUT_32(isp, s, d) *(d) = bswap32(s) 541 #define ISP_IOXGET_8(isp, s, d) d = (*((uint8_t *)s)) 542 #define ISP_IOXGET_16(isp, s, d) d = bswap16(*((uint16_t *)s)) 543 #define ISP_IOXGET_32(isp, s, d) d = bswap32(*((uint32_t *)s)) 544 #define ISP_SWIZZLE_NVRAM_WORD(isp, rp) *rp = bswap16(*rp) 545 #define ISP_SWIZZLE_NVRAM_LONG(isp, rp) *rp = bswap32(*rp) 546 547 #define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)s)) 548 #define ISP_IOZGET_16(isp, s, d) d = (*((uint16_t *)s)) 549 #define ISP_IOZGET_32(isp, s, d) d = (*((uint32_t *)s)) 550 #define ISP_IOZPUT_8(isp, s, d) *(d) = s 551 #define ISP_IOZPUT_16(isp, s, d) *(d) = s 552 #define ISP_IOZPUT_32(isp, s, d) *(d) = s 553 554 #else 555 #define ISP_IOXPUT_8(isp, s, d) *(d) = s 556 #define ISP_IOXPUT_16(isp, s, d) *(d) = s 557 #define ISP_IOXPUT_32(isp, s, d) *(d) = s 558 #define ISP_IOXGET_8(isp, s, d) d = *(s) 559 #define ISP_IOXGET_16(isp, s, d) d = *(s) 560 #define ISP_IOXGET_32(isp, s, d) d = *(s) 561 #define ISP_SWIZZLE_NVRAM_WORD(isp, rp) 562 #define ISP_SWIZZLE_NVRAM_LONG(isp, rp) 563 564 #define ISP_IOZPUT_8(isp, s, d) *(d) = s 565 #define ISP_IOZPUT_16(isp, s, d) *(d) = bswap16(s) 566 #define ISP_IOZPUT_32(isp, s, d) *(d) = bswap32(s) 567 #define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)(s))) 568 #define ISP_IOZGET_16(isp, s, d) d = bswap16(*((uint16_t *)(s))) 569 #define ISP_IOZGET_32(isp, s, d) d = bswap32(*((uint32_t *)(s))) 570 #endif 571 572 #define ISP_SWAP16(isp, s) bswap16(s) 573 #define ISP_SWAP32(isp, s) bswap32(s) 574 575 /* 576 * Includes of common header files 577 */ 578 579 #include <dev/isp/ispreg.h> 580 #include <dev/isp/ispvar.h> 581 #include <dev/isp/ispmbox.h> 582 583 /* 584 * isp_osinfo definiitions && shorthand 585 */ 586 #define SIMQFRZ_RESOURCE 0x1 587 #define SIMQFRZ_LOOPDOWN 0x2 588 #define SIMQFRZ_TIMED 0x4 589 590 #define isp_dev isp_osinfo.dev 591 592 /* 593 * prototypes for isp_pci && isp_freebsd to share 594 */ 595 extern int isp_attach(ispsoftc_t *); 596 extern int isp_detach(ispsoftc_t *); 597 extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int); 598 599 /* 600 * driver global data 601 */ 602 extern int isp_announced; 603 extern int isp_loop_down_limit; 604 extern int isp_gone_device_time; 605 extern int isp_quickboot_time; 606 607 /* 608 * Platform Library Functions 609 */ 610 void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4); 611 void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5); 612 uint64_t isp_nanotime_sub(struct timespec *, struct timespec *); 613 int isp_fc_scratch_acquire(ispsoftc_t *, int); 614 void isp_platform_intr(void *); 615 void isp_platform_intr_resp(void *); 616 void isp_platform_intr_atio(void *); 617 int isp_dmasetup(ispsoftc_t *, XS_T *, void *); 618 void isp_dmafree(ispsoftc_t *, struct ccb_scsiio *); 619 void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int); 620 int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *); 621 622 /* 623 * Platform Version specific defines 624 */ 625 #define ISP_PATH_PRT(i, l, p, ...) \ 626 if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) { \ 627 xpt_print(p, __VA_ARGS__); \ 628 } 629 630 /* 631 * ISP General Library functions 632 */ 633 634 #include <dev/isp/isp_library.h> 635 636 #endif /* _ISP_FREEBSD_H */ 637