xref: /freebsd/sys/dev/isp/isp_freebsd.h (revision d8a0fe102c0cfdfcd5b818f850eff09d8536c9bc)
1 /* $FreeBSD$ */
2 /*-
3  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4  *
5  * Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions
6  *
7  * Copyright (c) 1997-2008 by Matthew Jacob
8  * All rights reserved.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice immediately at the beginning of the file, without modification,
15  *    this list of conditions, and the following disclaimer.
16  * 2. The name of the author may not be used to endorse or promote products
17  *    derived from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 #ifndef	_ISP_FREEBSD_H
32 #define	_ISP_FREEBSD_H
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/endian.h>
37 #include <sys/jail.h>
38 #include <sys/lock.h>
39 #include <sys/kernel.h>
40 #include <sys/queue.h>
41 #include <sys/malloc.h>
42 #include <sys/mutex.h>
43 #include <sys/condvar.h>
44 #include <sys/rman.h>
45 #include <sys/sysctl.h>
46 
47 #include <sys/proc.h>
48 #include <sys/bus.h>
49 #include <sys/taskqueue.h>
50 
51 #include <machine/bus.h>
52 #include <machine/cpu.h>
53 #include <machine/stdarg.h>
54 
55 #include <cam/cam.h>
56 #include <cam/cam_debug.h>
57 #include <cam/cam_ccb.h>
58 #include <cam/cam_sim.h>
59 #include <cam/cam_xpt.h>
60 #include <cam/cam_xpt_sim.h>
61 #include <cam/cam_debug.h>
62 #include <cam/scsi/scsi_all.h>
63 #include <cam/scsi/scsi_message.h>
64 
65 #include "opt_ddb.h"
66 #include "opt_isp.h"
67 
68 #define	ISP_PLATFORM_VERSION_MAJOR	7
69 #define	ISP_PLATFORM_VERSION_MINOR	10
70 
71 /*
72  * Efficiency- get rid of SBus code && tests unless we need them.
73  */
74 #ifdef __sparc64__
75 #define	ISP_SBUS_SUPPORTED	1
76 #else
77 #define	ISP_SBUS_SUPPORTED	0
78 #endif
79 
80 #define	ISP_IFLAGS	INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE
81 
82 #define	N_XCMDS		64
83 #define	XCMD_SIZE	512
84 struct ispsoftc;
85 typedef union isp_ecmd {
86 	union isp_ecmd *	next;
87 	uint8_t			data[XCMD_SIZE];
88 } isp_ecmd_t;
89 isp_ecmd_t *	isp_get_ecmd(struct ispsoftc *);
90 void		isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *);
91 
92 #ifdef	ISP_TARGET_MODE
93 #define	ATPDPSIZE	4096
94 #define	ATPDPHASHSIZE	32
95 #define	ATPDPHASH(x)	((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) &  \
96 			    ((ATPDPHASHSIZE) - 1))
97 
98 #include <dev/isp/isp_target.h>
99 typedef struct atio_private_data {
100 	LIST_ENTRY(atio_private_data)	next;
101 	uint32_t	orig_datalen;
102 	uint32_t	bytes_xfered;
103 	uint32_t	bytes_in_transit;
104 	uint32_t	tag;		/* typically f/w RX_ID */
105 	lun_id_t	lun;
106 	uint32_t	nphdl;
107 	uint32_t	sid;
108 	uint32_t	did;
109 	uint16_t	rxid;	/* wire rxid */
110 	uint16_t	oxid;	/* wire oxid */
111 	uint16_t	word3;	/* PRLI word3 params */
112 	uint16_t	ctcnt;	/* number of CTIOs currently active */
113 	uint8_t		seqno;	/* CTIO sequence number */
114 	uint32_t
115 			srr_notify_rcvd	: 1,
116 			cdb0		: 8,
117 			sendst		: 1,
118 			dead		: 1,
119 			tattr		: 3,
120 			state		: 3;
121 	void *		ests;
122 	/*
123 	 * The current SRR notify copy
124 	 */
125 	uint8_t		srr[64];	/*  sb QENTRY_LEN, but order of definitions is wrong */
126 	void *		srr_ccb;
127 	uint32_t	nsrr;
128 } atio_private_data_t;
129 #define	ATPD_STATE_FREE			0
130 #define	ATPD_STATE_ATIO			1
131 #define	ATPD_STATE_CAM			2
132 #define	ATPD_STATE_CTIO			3
133 #define	ATPD_STATE_LAST_CTIO		4
134 #define	ATPD_STATE_PDON			5
135 
136 #define	ATPD_CCB_OUTSTANDING		16
137 
138 #define	ATPD_SEQ_MASK			0x7f
139 #define	ATPD_SEQ_NOTIFY_CAM		0x80
140 #define	ATPD_SET_SEQNO(hdrp, atp)	((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno
141 #define	ATPD_GET_SEQNO(hdrp)		(((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK)
142 #define	ATPD_GET_NCAM(hdrp)		((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0)
143 
144 typedef struct inot_private_data inot_private_data_t;
145 struct inot_private_data {
146 	STAILQ_ENTRY(inot_private_data)	next;
147 	isp_notify_t nt;
148 	uint8_t data[64];	/* sb QENTRY_LEN, but order of definitions is wrong */
149 	uint32_t tag_id, seq_id;
150 };
151 typedef struct isp_timed_notify_ack {
152 	void *isp;
153 	void *not;
154 	uint8_t data[64];	 /* sb QENTRY_LEN, but order of definitions is wrong */
155 	struct callout timer;
156 } isp_tna_t;
157 
158 STAILQ_HEAD(ntpdlist, inot_private_data);
159 typedef struct tstate {
160 	SLIST_ENTRY(tstate)	next;
161 	lun_id_t		ts_lun;
162 	struct ccb_hdr_slist	atios;
163 	struct ccb_hdr_slist	inots;
164 	struct ntpdlist		restart_queue;
165 } tstate_t;
166 
167 #define	LUN_HASH_SIZE		32
168 #define	LUN_HASH_FUNC(lun)	((lun) & (LUN_HASH_SIZE - 1))
169 
170 #endif
171 
172 /*
173  * Per command info.
174  */
175 struct isp_pcmd {
176 	struct isp_pcmd *	next;
177 	bus_dmamap_t 		dmap;		/* dma map for this command */
178 	struct callout		wdog;		/* watchdog timer */
179 	uint32_t		datalen;	/* data length for this command (target mode only) */
180 };
181 #define	ISP_PCMD(ccb)		(ccb)->ccb_h.spriv_ptr1
182 #define	PISP_PCMD(ccb)		((struct isp_pcmd *)ISP_PCMD(ccb))
183 
184 /*
185  * Per nexus info.
186  */
187 struct isp_nexus {
188 	uint64_t lun;			/* LUN for target */
189 	uint32_t tgt;			/* TGT for target */
190 	uint8_t crnseed;		/* next command reference number */
191 	struct isp_nexus *next;
192 };
193 #define	NEXUS_HASH_WIDTH	32
194 #define	INITIAL_NEXUS_COUNT	MAX_FC_TARG
195 #define	NEXUS_HASH(tgt, lun)	((tgt + lun) % NEXUS_HASH_WIDTH)
196 
197 /*
198  * Per channel information
199  */
200 SLIST_HEAD(tslist, tstate);
201 TAILQ_HEAD(isp_ccbq, ccb_hdr);
202 LIST_HEAD(atpdlist, atio_private_data);
203 
204 struct isp_fc {
205 	struct cam_sim *sim;
206 	struct cam_path *path;
207 	struct ispsoftc *isp;
208 	struct proc *kproc;
209 	bus_dmamap_t scmap;
210 	uint64_t def_wwpn;
211 	uint64_t def_wwnn;
212 	time_t loop_down_time;
213 	int loop_down_limit;
214 	int gone_device_time;
215 	/*
216 	 * Per target/lun info- just to keep a per-ITL nexus crn count
217 	 */
218 	struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH];
219 	struct isp_nexus *nexus_free_list;
220 	uint32_t
221 		simqfrozen	: 3,
222 		default_id	: 8,
223 		def_role	: 2,	/* default role */
224 		loop_seen_once	: 1,
225 		fcbsy		: 1,
226 		ready		: 1;
227 	struct callout gdt;	/* gone device timer */
228 	struct task gtask;
229 #ifdef	ISP_TARGET_MODE
230 	struct tslist		lun_hash[LUN_HASH_SIZE];
231 	struct isp_ccbq		waitq;		/* waiting CCBs */
232 	struct ntpdlist		ntfree;
233 	inot_private_data_t	ntpool[ATPDPSIZE];
234 	struct atpdlist		atfree;
235 	struct atpdlist		atused[ATPDPHASHSIZE];
236 	atio_private_data_t	atpool[ATPDPSIZE];
237 #if defined(DEBUG)
238 	unsigned int inject_lost_data_frame;
239 #endif
240 #endif
241 	int			num_threads;
242 };
243 
244 struct isp_spi {
245 	struct cam_sim *sim;
246 	struct cam_path *path;
247 	uint32_t
248 		simqfrozen	: 3,
249 		iid		: 4;
250 #ifdef	ISP_TARGET_MODE
251 	struct tslist		lun_hash[LUN_HASH_SIZE];
252 	struct isp_ccbq		waitq;		/* waiting CCBs */
253 	struct ntpdlist		ntfree;
254 	inot_private_data_t	ntpool[ATPDPSIZE];
255 	struct atpdlist		atfree;
256 	struct atpdlist		atused[ATPDPHASHSIZE];
257 	atio_private_data_t	atpool[ATPDPSIZE];
258 #endif
259 	int			num_threads;
260 };
261 
262 struct isposinfo {
263 	/*
264 	 * Linkage, locking, and identity
265 	 */
266 	struct mtx		lock;
267 	device_t		dev;
268 	struct cdev *		cdev;
269 	struct cam_devq *	devq;
270 
271 	/*
272 	 * Firmware pointer
273 	 */
274 	const struct firmware *	fw;
275 
276 	/*
277 	 * DMA related stuff
278 	 */
279 	struct resource *	regs;
280 	struct resource *	regs2;
281 	bus_dma_tag_t		dmat;
282 	bus_dma_tag_t		reqdmat;
283 	bus_dma_tag_t		respdmat;
284 	bus_dma_tag_t		atiodmat;
285 	bus_dma_tag_t		iocbdmat;
286 	bus_dma_tag_t		scdmat;
287 	bus_dmamap_t		reqmap;
288 	bus_dmamap_t		respmap;
289 	bus_dmamap_t		atiomap;
290 	bus_dmamap_t		iocbmap;
291 
292 	/*
293 	 * Command and transaction related related stuff
294 	 */
295 	struct isp_pcmd *	pcmd_pool;
296 	struct isp_pcmd *	pcmd_free;
297 
298 	int			mbox_sleeping;
299 	int			mbox_sleep_ok;
300 	int			mboxbsy;
301 	int			mboxcmd_done;
302 
303 	struct callout		tmo;	/* general timer */
304 
305 	/*
306 	 * misc- needs to be sorted better XXXXXX
307 	 */
308 	int			framesize;
309 	int			exec_throttle;
310 	int			cont_max;
311 
312 	bus_addr_t		ecmd_dma;
313 	isp_ecmd_t *		ecmd_base;
314 	isp_ecmd_t *		ecmd_free;
315 
316 	/*
317 	 * Per-type private storage...
318 	 */
319 	union {
320 		struct isp_fc *fc;
321 		struct isp_spi *spi;
322 		void *ptr;
323 	} pc;
324 
325 	int			is_exiting;
326 };
327 #define	ISP_FC_PC(isp, chan)	(&(isp)->isp_osinfo.pc.fc[(chan)])
328 #define	ISP_SPI_PC(isp, chan)	(&(isp)->isp_osinfo.pc.spi[(chan)])
329 #define	ISP_GET_PC(isp, chan, tag, rslt)		\
330 	if (IS_SCSI(isp)) {				\
331 		rslt = ISP_SPI_PC(isp, chan)-> tag;	\
332 	} else {					\
333 		rslt = ISP_FC_PC(isp, chan)-> tag;	\
334 	}
335 #define	ISP_GET_PC_ADDR(isp, chan, tag, rp)		\
336 	if (IS_SCSI(isp)) {				\
337 		rp = &ISP_SPI_PC(isp, chan)-> tag;	\
338 	} else {					\
339 		rp = &ISP_FC_PC(isp, chan)-> tag;	\
340 	}
341 #define	ISP_SET_PC(isp, chan, tag, val)			\
342 	if (IS_SCSI(isp)) {				\
343 		ISP_SPI_PC(isp, chan)-> tag = val;	\
344 	} else {					\
345 		ISP_FC_PC(isp, chan)-> tag = val;	\
346 	}
347 
348 #define	FCP_NEXT_CRN	isp_fcp_next_crn
349 #define	isp_lock	isp_osinfo.lock
350 #define	isp_regs	isp_osinfo.regs
351 #define	isp_regs2	isp_osinfo.regs2
352 
353 /*
354  * Locking macros...
355  */
356 #define	ISP_LOCK(isp)	mtx_lock(&(isp)->isp_lock)
357 #define	ISP_UNLOCK(isp)	mtx_unlock(&(isp)->isp_lock)
358 #define	ISP_ASSERT_LOCKED(isp)	mtx_assert(&(isp)->isp_lock, MA_OWNED)
359 
360 /*
361  * Required Macros/Defines
362  */
363 #define	ISP_FC_SCRLEN		0x1000
364 
365 #define	ISP_MEMZERO(a, b)	memset(a, 0, b)
366 #define	ISP_MEMCPY		memcpy
367 #define	ISP_SNPRINTF		snprintf
368 #define	ISP_DELAY(x)		DELAY(x)
369 #define	ISP_SLEEP(isp, x)	msleep_sbt(&(isp)->isp_osinfo.is_exiting, \
370     &(isp)->isp_lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0)
371 
372 #define	ISP_MIN			imin
373 
374 #ifndef	DIAGNOSTIC
375 #define	ISP_INLINE		__inline
376 #else
377 #define	ISP_INLINE
378 #endif
379 
380 #define	NANOTIME_T		struct timespec
381 #define	GET_NANOTIME		nanotime
382 #define	GET_NANOSEC(x)		((x)->tv_sec * 1000000000 + (x)->tv_nsec)
383 #define	NANOTIME_SUB		isp_nanotime_sub
384 
385 #define	MAXISPREQUEST(isp)	((IS_FC(isp) || IS_ULTRA2(isp))? 1024 : 256)
386 
387 #define	MEMORYBARRIER(isp, type, offset, size, chan)		\
388 switch (type) {							\
389 case SYNC_REQUEST:						\
390 	bus_dmamap_sync(isp->isp_osinfo.reqdmat,		\
391 	   isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE);	\
392 	break;							\
393 case SYNC_RESULT:						\
394 	bus_dmamap_sync(isp->isp_osinfo.respdmat, 		\
395 	   isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD);	\
396 	break;							\
397 case SYNC_SFORDEV:						\
398 {								\
399 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
400 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
401 	   BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);		\
402 	break;							\
403 }								\
404 case SYNC_SFORCPU:						\
405 {								\
406 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
407 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
408 	   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);	\
409 	break;							\
410 }								\
411 case SYNC_REG:							\
412 	bus_barrier(isp->isp_osinfo.regs, offset, size,		\
413 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);	\
414 	break;							\
415 case SYNC_ATIOQ:						\
416 	bus_dmamap_sync(isp->isp_osinfo.atiodmat, 		\
417 	   isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD);	\
418 	break;							\
419 case SYNC_IFORDEV:						\
420 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
421 	   BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);		\
422 	break;							\
423 case SYNC_IFORCPU:						\
424 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
425 	   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);	\
426 	break;							\
427 default:							\
428 	break;							\
429 }
430 
431 #define	MEMORYBARRIERW(isp, type, offset, size, chan)		\
432 switch (type) {							\
433 case SYNC_REQUEST:						\
434 	bus_dmamap_sync(isp->isp_osinfo.reqdmat,		\
435 	   isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE);	\
436 	break;							\
437 case SYNC_SFORDEV:						\
438 {								\
439 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
440 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
441 	   BUS_DMASYNC_PREWRITE);				\
442 	break;							\
443 }								\
444 case SYNC_SFORCPU:						\
445 {								\
446 	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
447 	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
448 	   BUS_DMASYNC_POSTWRITE);				\
449 	break;							\
450 }								\
451 case SYNC_REG:							\
452 	bus_barrier(isp->isp_osinfo.regs, offset, size,		\
453 	    BUS_SPACE_BARRIER_WRITE);				\
454 	break;							\
455 case SYNC_IFORDEV:						\
456 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
457 	   BUS_DMASYNC_PREWRITE);				\
458 	break;							\
459 case SYNC_IFORCPU:						\
460 	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
461 	   BUS_DMASYNC_POSTWRITE);				\
462 	break;							\
463 default:							\
464 	break;							\
465 }
466 
467 #define	MBOX_ACQUIRE			isp_mbox_acquire
468 #define	MBOX_WAIT_COMPLETE		isp_mbox_wait_complete
469 #define	MBOX_NOTIFY_COMPLETE		isp_mbox_notify_done
470 #define	MBOX_RELEASE			isp_mbox_release
471 
472 #define	FC_SCRATCH_ACQUIRE		isp_fc_scratch_acquire
473 #define	FC_SCRATCH_RELEASE(isp, chan)	isp->isp_osinfo.pc.fc[chan].fcbsy = 0
474 
475 #ifndef	SCSI_GOOD
476 #define	SCSI_GOOD	SCSI_STATUS_OK
477 #endif
478 #ifndef	SCSI_CHECK
479 #define	SCSI_CHECK	SCSI_STATUS_CHECK_COND
480 #endif
481 #ifndef	SCSI_BUSY
482 #define	SCSI_BUSY	SCSI_STATUS_BUSY
483 #endif
484 #ifndef	SCSI_QFULL
485 #define	SCSI_QFULL	SCSI_STATUS_QUEUE_FULL
486 #endif
487 
488 #define	XS_T			struct ccb_scsiio
489 #define	XS_DMA_ADDR_T		bus_addr_t
490 #define XS_GET_DMA64_SEG(a, b, c)		\
491 {						\
492 	ispds64_t *d = a;			\
493 	bus_dma_segment_t *e = b;		\
494 	uint32_t f = c;				\
495 	e += f;					\
496         d->ds_base = DMA_LO32(e->ds_addr);	\
497         d->ds_basehi = DMA_HI32(e->ds_addr);	\
498         d->ds_count = e->ds_len;		\
499 }
500 #define XS_GET_DMA_SEG(a, b, c)			\
501 {						\
502 	ispds_t *d = a;				\
503 	bus_dma_segment_t *e = b;		\
504 	uint32_t f = c;				\
505 	e += f;					\
506         d->ds_base = DMA_LO32(e->ds_addr);	\
507         d->ds_count = e->ds_len;		\
508 }
509 #if (BUS_SPACE_MAXADDR > UINT32_MAX)
510 #define XS_NEED_DMA64_SEG(s, n)					\
511 	(((bus_dma_segment_t *)s)[n].ds_addr +			\
512 	    ((bus_dma_segment_t *)s)[n].ds_len > UINT32_MAX)
513 #else
514 #define XS_NEED_DMA64_SEG(s, n)	(0)
515 #endif
516 #define	XS_ISP(ccb)		cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path))
517 #define	XS_CHANNEL(ccb)		cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path))
518 #define	XS_TGT(ccb)		(ccb)->ccb_h.target_id
519 #define	XS_LUN(ccb)		(ccb)->ccb_h.target_lun
520 
521 #define	XS_CDBP(ccb)	\
522 	(((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \
523 	 (ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes)
524 
525 #define	XS_CDBLEN(ccb)		(ccb)->cdb_len
526 #define	XS_XFRLEN(ccb)		(ccb)->dxfer_len
527 #define	XS_TIME(ccb)	\
528 	(((ccb)->ccb_h.timeout > 0xffff * 1000 - 999) ? 0 : \
529 	  (((ccb)->ccb_h.timeout + 999) / 1000))
530 #define	XS_GET_RESID(ccb)	(ccb)->resid
531 #define	XS_SET_RESID(ccb, r)	(ccb)->resid = r
532 #define	XS_STSP(ccb)		(&(ccb)->scsi_status)
533 #define	XS_SNSP(ccb)		(&(ccb)->sense_data)
534 
535 #define	XS_TOT_SNSLEN(ccb)	ccb->sense_len
536 #define	XS_CUR_SNSLEN(ccb)	(ccb->sense_len - ccb->sense_resid)
537 
538 #define	XS_SNSKEY(ccb)		(scsi_get_sense_key(&(ccb)->sense_data, \
539 				 ccb->sense_len - ccb->sense_resid, 1))
540 
541 #define	XS_SNSASC(ccb)		(scsi_get_asc(&(ccb)->sense_data,	\
542 				 ccb->sense_len - ccb->sense_resid, 1))
543 
544 #define	XS_SNSASCQ(ccb)		(scsi_get_ascq(&(ccb)->sense_data,	\
545 				 ccb->sense_len - ccb->sense_resid, 1))
546 #define	XS_TAG_P(ccb)	\
547 	(((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \
548 	 (ccb)->tag_action != CAM_TAG_ACTION_NONE)
549 
550 #define	XS_TAG_TYPE(ccb)	\
551 	((ccb->tag_action == MSG_SIMPLE_Q_TAG)? REQFLAG_STAG : \
552 	 ((ccb->tag_action == MSG_HEAD_OF_Q_TAG)? REQFLAG_HTAG : REQFLAG_OTAG))
553 
554 
555 #define	XS_SETERR(ccb, v)	(ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \
556 				(ccb)->ccb_h.status |= v
557 
558 #	define	HBA_NOERROR		CAM_REQ_INPROG
559 #	define	HBA_BOTCH		CAM_UNREC_HBA_ERROR
560 #	define	HBA_CMDTIMEOUT		CAM_CMD_TIMEOUT
561 #	define	HBA_SELTIMEOUT		CAM_SEL_TIMEOUT
562 #	define	HBA_TGTBSY		CAM_SCSI_STATUS_ERROR
563 #	define	HBA_REQINVAL		CAM_REQ_INVALID
564 #	define	HBA_BUSRESET		CAM_SCSI_BUS_RESET
565 #	define	HBA_ABORTED		CAM_REQ_ABORTED
566 #	define	HBA_DATAOVR		CAM_DATA_RUN_ERR
567 #	define	HBA_ARQFAIL		CAM_AUTOSENSE_FAIL
568 
569 
570 #define	XS_ERR(ccb)		((ccb)->ccb_h.status & CAM_STATUS_MASK)
571 
572 #define	XS_NOERR(ccb)		(((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
573 
574 #define	XS_INITERR(ccb)		XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len
575 
576 #define	XS_SAVE_SENSE(xs, sp, len)	do {				\
577 		uint32_t amt = min(len, (xs)->sense_len);		\
578 		memcpy(&(xs)->sense_data, sp, amt);			\
579 		(xs)->sense_resid = (xs)->sense_len - amt;		\
580 		(xs)->ccb_h.status |= CAM_AUTOSNS_VALID;		\
581 	} while (0)
582 
583 #define	XS_SENSE_APPEND(xs, sp, len)	do {				\
584 		uint8_t *ptr = (uint8_t *)(&(xs)->sense_data) +		\
585 		    ((xs)->sense_len - (xs)->sense_resid);		\
586 		uint32_t amt = min((len), (xs)->sense_resid);		\
587 		memcpy(ptr, sp, amt);					\
588 		(xs)->sense_resid -= amt;				\
589 	} while (0)
590 
591 #define	XS_SENSE_VALID(xs)	(((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
592 
593 #define	DEFAULT_FRAMESIZE(isp)		isp->isp_osinfo.framesize
594 #define	DEFAULT_EXEC_THROTTLE(isp)	isp->isp_osinfo.exec_throttle
595 
596 #define	DEFAULT_ROLE(isp, chan)	\
597 	(IS_FC(isp)? ISP_FC_PC(isp, chan)->def_role : ISP_ROLE_INITIATOR)
598 
599 #define	DEFAULT_IID(isp, chan)		isp->isp_osinfo.pc.spi[chan].iid
600 
601 #define	DEFAULT_LOOPID(x, chan)		isp->isp_osinfo.pc.fc[chan].default_id
602 
603 #define DEFAULT_NODEWWN(isp, chan)  	isp_default_wwn(isp, chan, 0, 1)
604 #define DEFAULT_PORTWWN(isp, chan)  	isp_default_wwn(isp, chan, 0, 0)
605 #define ACTIVE_NODEWWN(isp, chan)   	isp_default_wwn(isp, chan, 1, 1)
606 #define ACTIVE_PORTWWN(isp, chan)   	isp_default_wwn(isp, chan, 1, 0)
607 
608 
609 #if	BYTE_ORDER == BIG_ENDIAN
610 #ifdef	ISP_SBUS_SUPPORTED
611 #define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
612 #define	ISP_IOXPUT_16(isp, s, d)				\
613 	*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap16(s)
614 #define	ISP_IOXPUT_32(isp, s, d)				\
615 	*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap32(s)
616 #define	ISP_IOXGET_8(isp, s, d)		d = (*((uint8_t *)s))
617 #define	ISP_IOXGET_16(isp, s, d)				\
618 	d = (isp->isp_bustype == ISP_BT_SBUS)?			\
619 	*((uint16_t *)s) : bswap16(*((uint16_t *)s))
620 #define	ISP_IOXGET_32(isp, s, d)				\
621 	d = (isp->isp_bustype == ISP_BT_SBUS)?			\
622 	*((uint32_t *)s) : bswap32(*((uint32_t *)s))
623 
624 #else	/* ISP_SBUS_SUPPORTED */
625 #define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
626 #define	ISP_IOXPUT_16(isp, s, d)	*(d) = bswap16(s)
627 #define	ISP_IOXPUT_32(isp, s, d)	*(d) = bswap32(s)
628 #define	ISP_IOXGET_8(isp, s, d)		d = (*((uint8_t *)s))
629 #define	ISP_IOXGET_16(isp, s, d)	d = bswap16(*((uint16_t *)s))
630 #define	ISP_IOXGET_32(isp, s, d)	d = bswap32(*((uint32_t *)s))
631 #endif
632 #define	ISP_SWIZZLE_NVRAM_WORD(isp, rp)	*rp = bswap16(*rp)
633 #define	ISP_SWIZZLE_NVRAM_LONG(isp, rp)	*rp = bswap32(*rp)
634 
635 #define	ISP_IOZGET_8(isp, s, d)		d = (*((uint8_t *)s))
636 #define	ISP_IOZGET_16(isp, s, d)	d = (*((uint16_t *)s))
637 #define	ISP_IOZGET_32(isp, s, d)	d = (*((uint32_t *)s))
638 #define	ISP_IOZPUT_8(isp, s, d)		*(d) = s
639 #define	ISP_IOZPUT_16(isp, s, d)	*(d) = s
640 #define	ISP_IOZPUT_32(isp, s, d)	*(d) = s
641 
642 
643 #else
644 #define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
645 #define	ISP_IOXPUT_16(isp, s, d)	*(d) = s
646 #define	ISP_IOXPUT_32(isp, s, d)	*(d) = s
647 #define	ISP_IOXGET_8(isp, s, d)		d = *(s)
648 #define	ISP_IOXGET_16(isp, s, d)	d = *(s)
649 #define	ISP_IOXGET_32(isp, s, d)	d = *(s)
650 #define	ISP_SWIZZLE_NVRAM_WORD(isp, rp)
651 #define	ISP_SWIZZLE_NVRAM_LONG(isp, rp)
652 
653 #define	ISP_IOZPUT_8(isp, s, d)		*(d) = s
654 #define	ISP_IOZPUT_16(isp, s, d)	*(d) = bswap16(s)
655 #define	ISP_IOZPUT_32(isp, s, d)	*(d) = bswap32(s)
656 
657 #define	ISP_IOZGET_8(isp, s, d)		d = (*((uint8_t *)(s)))
658 #define	ISP_IOZGET_16(isp, s, d)	d = bswap16(*((uint16_t *)(s)))
659 #define	ISP_IOZGET_32(isp, s, d)	d = bswap32(*((uint32_t *)(s)))
660 
661 #endif
662 
663 #define	ISP_SWAP16(isp, s)	bswap16(s)
664 #define	ISP_SWAP32(isp, s)	bswap32(s)
665 
666 /*
667  * Includes of common header files
668  */
669 
670 #include <dev/isp/ispreg.h>
671 #include <dev/isp/ispvar.h>
672 #include <dev/isp/ispmbox.h>
673 
674 /*
675  * isp_osinfo definiitions && shorthand
676  */
677 #define	SIMQFRZ_RESOURCE	0x1
678 #define	SIMQFRZ_LOOPDOWN	0x2
679 #define	SIMQFRZ_TIMED		0x4
680 
681 #define	isp_dev		isp_osinfo.dev
682 
683 /*
684  * prototypes for isp_pci && isp_freebsd to share
685  */
686 extern int isp_attach(ispsoftc_t *);
687 extern int isp_detach(ispsoftc_t *);
688 extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int);
689 
690 /*
691  * driver global data
692  */
693 extern int isp_announced;
694 extern int isp_loop_down_limit;
695 extern int isp_gone_device_time;
696 extern int isp_quickboot_time;
697 
698 /*
699  * Platform private flags
700  */
701 
702 /*
703  * Platform Library Functions
704  */
705 void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4);
706 void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5);
707 uint64_t isp_nanotime_sub(struct timespec *, struct timespec *);
708 int isp_mbox_acquire(ispsoftc_t *);
709 void isp_mbox_wait_complete(ispsoftc_t *, mbreg_t *);
710 void isp_mbox_notify_done(ispsoftc_t *);
711 void isp_mbox_release(ispsoftc_t *);
712 int isp_fc_scratch_acquire(ispsoftc_t *, int);
713 void isp_platform_intr(void *);
714 void isp_platform_intr_resp(void *);
715 void isp_platform_intr_atio(void *);
716 void isp_common_dmateardown(ispsoftc_t *, struct ccb_scsiio *, uint32_t);
717 void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int);
718 int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *);
719 
720 /*
721  * Platform Version specific defines
722  */
723 #define	ISP_PATH_PRT(i, l, p, ...)					\
724 	if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) {		\
725                 xpt_print(p, __VA_ARGS__);				\
726         }
727 
728 /*
729  * Platform specific inline functions
730  */
731 
732 /*
733  * ISP General Library functions
734  */
735 
736 #include <dev/isp/isp_library.h>
737 
738 #endif	/* _ISP_FREEBSD_H */
739