1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions 5 * 6 * Copyright (c) 2009-2020 Alexander Motin <mav@FreeBSD.org> 7 * Copyright (c) 1997-2008 by Matthew Jacob 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 #ifndef _ISP_FREEBSD_H 32 #define _ISP_FREEBSD_H 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/endian.h> 37 #include <sys/jail.h> 38 #include <sys/lock.h> 39 #include <sys/kernel.h> 40 #include <sys/queue.h> 41 #include <sys/malloc.h> 42 #include <sys/mutex.h> 43 #include <sys/condvar.h> 44 #include <sys/rman.h> 45 #include <sys/sysctl.h> 46 47 #include <sys/proc.h> 48 #include <sys/bus.h> 49 #include <sys/taskqueue.h> 50 51 #include <machine/bus.h> 52 #include <machine/cpu.h> 53 #include <machine/stdarg.h> 54 55 #include <cam/cam.h> 56 #include <cam/cam_debug.h> 57 #include <cam/cam_ccb.h> 58 #include <cam/cam_sim.h> 59 #include <cam/cam_xpt.h> 60 #include <cam/cam_xpt_sim.h> 61 #include <cam/cam_debug.h> 62 #include <cam/scsi/scsi_all.h> 63 #include <cam/scsi/scsi_message.h> 64 65 #include "opt_ddb.h" 66 #include "opt_isp.h" 67 68 #define ISP_PLATFORM_VERSION_MAJOR 7 69 #define ISP_PLATFORM_VERSION_MINOR 10 70 71 #define ISP_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE 72 73 #ifdef ISP_TARGET_MODE 74 #define N_XCMDS 64 75 #define XCMD_SIZE 512 76 struct ispsoftc; 77 typedef union isp_ecmd { 78 union isp_ecmd * next; 79 uint8_t data[XCMD_SIZE]; 80 } isp_ecmd_t; 81 isp_ecmd_t * isp_get_ecmd(struct ispsoftc *); 82 void isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *); 83 84 #define ATPDPSIZE 4096 85 #define ATPDPHASHSIZE 32 86 #define ATPDPHASH(x) ((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) & \ 87 ((ATPDPHASHSIZE) - 1)) 88 89 #include <dev/isp/isp_target.h> 90 typedef struct atio_private_data { 91 LIST_ENTRY(atio_private_data) next; 92 void * ccb; 93 uint32_t tag; /* typically f/w RX_ID */ 94 uint32_t orig_datalen; 95 uint32_t bytes_xfered; 96 uint32_t bytes_in_transit; 97 lun_id_t lun; 98 uint32_t nphdl; 99 uint32_t sid; 100 uint32_t did; 101 uint16_t rxid; /* wire rxid */ 102 uint16_t oxid; /* wire oxid */ 103 uint16_t word3; /* PRLI word3 params */ 104 uint16_t ctcnt; /* number of CTIOs currently active */ 105 uint8_t seqno; /* CTIO sequence number */ 106 uint8_t cdb0; 107 uint8_t srr_notify_rcvd : 1, 108 sendst : 1, 109 tattr : 3, 110 state : 3; 111 void * ests; 112 /* 113 * The current SRR notify copy 114 */ 115 uint8_t srr[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 116 void * srr_ccb; 117 uint32_t nsrr; 118 } atio_private_data_t; 119 #define ATPD_STATE_FREE 0 120 #define ATPD_STATE_ATIO 1 121 #define ATPD_STATE_CAM 2 122 #define ATPD_STATE_CTIO 3 123 #define ATPD_STATE_LAST_CTIO 4 124 #define ATPD_STATE_PDON 5 125 126 #define ATPD_CCB_OUTSTANDING 16 127 128 #define ATPD_SEQ_MASK 0x7f 129 #define ATPD_SEQ_NOTIFY_CAM 0x80 130 #define ATPD_SET_SEQNO(hdrp, atp) ((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno 131 #define ATPD_GET_SEQNO(hdrp) (((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK) 132 #define ATPD_GET_NCAM(hdrp) ((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0) 133 134 typedef struct inot_private_data inot_private_data_t; 135 struct inot_private_data { 136 STAILQ_ENTRY(inot_private_data) next; 137 isp_notify_t nt; 138 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 139 uint32_t tag_id, seq_id; 140 }; 141 typedef struct isp_timed_notify_ack { 142 void *isp; 143 void *not; 144 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 145 struct callout timer; 146 } isp_tna_t; 147 148 STAILQ_HEAD(ntpdlist, inot_private_data); 149 typedef struct tstate { 150 SLIST_ENTRY(tstate) next; 151 lun_id_t ts_lun; 152 struct ccb_hdr_slist atios; 153 struct ccb_hdr_slist inots; 154 struct ntpdlist restart_queue; 155 } tstate_t; 156 157 #define LUN_HASH_SIZE 32 158 #define LUN_HASH_FUNC(lun) ((lun) & (LUN_HASH_SIZE - 1)) 159 160 #endif 161 162 /* 163 * Per command info. 164 */ 165 struct isp_pcmd { 166 struct isp_pcmd * next; 167 bus_dmamap_t dmap; /* dma map for this command */ 168 struct callout wdog; /* watchdog timer */ 169 uint32_t datalen; /* data length for this command (target mode only) */ 170 }; 171 #define ISP_PCMD(ccb) (ccb)->ccb_h.spriv_ptr1 172 #define PISP_PCMD(ccb) ((struct isp_pcmd *)ISP_PCMD(ccb)) 173 174 /* 175 * Per nexus info. 176 */ 177 struct isp_nexus { 178 uint64_t lun; /* LUN for target */ 179 uint32_t tgt; /* TGT for target */ 180 uint8_t crnseed; /* next command reference number */ 181 struct isp_nexus *next; 182 }; 183 #define NEXUS_HASH_WIDTH 32 184 #define INITIAL_NEXUS_COUNT MAX_FC_TARG 185 #define NEXUS_HASH(tgt, lun) ((tgt + lun) % NEXUS_HASH_WIDTH) 186 187 /* 188 * Per channel information 189 */ 190 SLIST_HEAD(tslist, tstate); 191 TAILQ_HEAD(isp_ccbq, ccb_hdr); 192 LIST_HEAD(atpdlist, atio_private_data); 193 194 struct isp_fc { 195 struct cam_sim *sim; 196 struct cam_path *path; 197 struct ispsoftc *isp; 198 struct proc *kproc; 199 bus_dmamap_t scmap; 200 uint64_t def_wwpn; 201 uint64_t def_wwnn; 202 time_t loop_down_time; 203 int loop_down_limit; 204 int gone_device_time; 205 /* 206 * Per target/lun info- just to keep a per-ITL nexus crn count 207 */ 208 struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH]; 209 struct isp_nexus *nexus_free_list; 210 uint32_t 211 simqfrozen : 3, 212 default_id : 8, 213 def_role : 2, /* default role */ 214 loop_seen_once : 1, 215 fcbsy : 1, 216 ready : 1; 217 struct callout gdt; /* gone device timer */ 218 struct task gtask; 219 #ifdef ISP_TARGET_MODE 220 struct tslist lun_hash[LUN_HASH_SIZE]; 221 struct isp_ccbq waitq; /* waiting CCBs */ 222 struct ntpdlist ntfree; 223 inot_private_data_t ntpool[ATPDPSIZE]; 224 struct atpdlist atfree; 225 struct atpdlist atused[ATPDPHASHSIZE]; 226 atio_private_data_t atpool[ATPDPSIZE]; 227 #if defined(DEBUG) 228 unsigned int inject_lost_data_frame; 229 #endif 230 #endif 231 int num_threads; 232 }; 233 234 struct isposinfo { 235 /* 236 * Linkage, locking, and identity 237 */ 238 struct mtx lock; 239 device_t dev; 240 struct cdev * cdev; 241 struct cam_devq * devq; 242 243 /* 244 * Firmware pointer 245 */ 246 const struct firmware * ispfw; 247 248 /* 249 * DMA related stuff 250 */ 251 struct resource * regs; 252 struct resource * regs2; 253 bus_dma_tag_t dmat; 254 bus_dma_tag_t reqdmat; 255 bus_dma_tag_t respdmat; 256 bus_dma_tag_t atiodmat; 257 bus_dma_tag_t iocbdmat; 258 bus_dma_tag_t scdmat; 259 bus_dmamap_t reqmap; 260 bus_dmamap_t respmap; 261 bus_dmamap_t atiomap; 262 bus_dmamap_t iocbmap; 263 264 /* 265 * Command and transaction related related stuff 266 */ 267 struct isp_pcmd * pcmd_pool; 268 struct isp_pcmd * pcmd_free; 269 270 struct callout tmo; /* general timer */ 271 272 /* 273 * misc- needs to be sorted better XXXXXX 274 */ 275 int framesize; 276 277 #ifdef ISP_TARGET_MODE 278 bus_dma_tag_t ecmd_dmat; 279 bus_dmamap_t ecmd_map; 280 bus_addr_t ecmd_dma; 281 isp_ecmd_t * ecmd_base; 282 isp_ecmd_t * ecmd_free; 283 #endif 284 285 /* 286 * Per-channel storage. 287 */ 288 struct isp_fc *fc; 289 290 int is_exiting; 291 }; 292 #define ISP_FC_PC(isp, chan) (&(isp)->isp_osinfo.fc[(chan)]) 293 294 #define FCP_NEXT_CRN isp_fcp_next_crn 295 #define isp_lock isp_osinfo.lock 296 #define isp_regs isp_osinfo.regs 297 #define isp_regs2 isp_osinfo.regs2 298 299 /* 300 * Locking macros... 301 */ 302 #define ISP_LOCK(isp) mtx_lock(&(isp)->isp_lock) 303 #define ISP_UNLOCK(isp) mtx_unlock(&(isp)->isp_lock) 304 #define ISP_ASSERT_LOCKED(isp) mtx_assert(&(isp)->isp_lock, MA_OWNED) 305 306 /* 307 * Required Macros/Defines 308 */ 309 #define ISP_FC_SCRLEN 0x1000 310 311 #define ISP_MEMZERO(a, b) memset(a, 0, b) 312 #define ISP_MEMCPY memcpy 313 #define ISP_SNPRINTF snprintf 314 #define ISP_DELAY(x) DELAY(x) 315 #define ISP_SLEEP(isp, x) msleep_sbt(&(isp)->isp_osinfo.is_exiting, \ 316 &(isp)->isp_lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0) 317 318 #define ISP_MIN imin 319 320 #ifndef DIAGNOSTIC 321 #define ISP_INLINE __inline 322 #else 323 #define ISP_INLINE 324 #endif 325 326 #define ISP_DMASETUP(isp, xs, req) isp_dmasetup(isp, xs, req) 327 #define ISP_DMAFREE(isp, xs) isp_dmafree(isp, xs) 328 329 #define NANOTIME_T struct timespec 330 #define GET_NANOTIME nanotime 331 #define GET_NANOSEC(x) ((x)->tv_sec * 1000000000 + (x)->tv_nsec) 332 #define NANOTIME_SUB isp_nanotime_sub 333 334 #define MEMORYBARRIER(isp, type, offset, size, chan) \ 335 switch (type) { \ 336 case SYNC_REQUEST: \ 337 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 338 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 339 break; \ 340 case SYNC_RESULT: \ 341 bus_dmamap_sync(isp->isp_osinfo.respdmat, \ 342 isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD); \ 343 break; \ 344 case SYNC_SFORDEV: \ 345 { \ 346 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 347 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 348 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 349 break; \ 350 } \ 351 case SYNC_SFORCPU: \ 352 { \ 353 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 354 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 355 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 356 break; \ 357 } \ 358 case SYNC_REG: \ 359 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 360 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \ 361 break; \ 362 case SYNC_ATIOQ: \ 363 bus_dmamap_sync(isp->isp_osinfo.atiodmat, \ 364 isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD); \ 365 break; \ 366 case SYNC_IFORDEV: \ 367 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 368 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 369 break; \ 370 case SYNC_IFORCPU: \ 371 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 372 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 373 break; \ 374 default: \ 375 break; \ 376 } 377 378 #define MEMORYBARRIERW(isp, type, offset, size, chan) \ 379 switch (type) { \ 380 case SYNC_REQUEST: \ 381 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 382 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 383 break; \ 384 case SYNC_SFORDEV: \ 385 { \ 386 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 387 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 388 BUS_DMASYNC_PREWRITE); \ 389 break; \ 390 } \ 391 case SYNC_SFORCPU: \ 392 { \ 393 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 394 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 395 BUS_DMASYNC_POSTWRITE); \ 396 break; \ 397 } \ 398 case SYNC_REG: \ 399 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 400 BUS_SPACE_BARRIER_WRITE); \ 401 break; \ 402 case SYNC_IFORDEV: \ 403 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 404 BUS_DMASYNC_PREWRITE); \ 405 break; \ 406 case SYNC_IFORCPU: \ 407 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 408 BUS_DMASYNC_POSTWRITE); \ 409 break; \ 410 default: \ 411 break; \ 412 } 413 414 #define FC_SCRATCH_ACQUIRE isp_fc_scratch_acquire 415 #define FC_SCRATCH_RELEASE(isp, chan) ISP_FC_PC(isp, chan)->fcbsy = 0 416 417 #ifndef SCSI_GOOD 418 #define SCSI_GOOD SCSI_STATUS_OK 419 #endif 420 #ifndef SCSI_CHECK 421 #define SCSI_CHECK SCSI_STATUS_CHECK_COND 422 #endif 423 #ifndef SCSI_BUSY 424 #define SCSI_BUSY SCSI_STATUS_BUSY 425 #endif 426 #ifndef SCSI_QFULL 427 #define SCSI_QFULL SCSI_STATUS_QUEUE_FULL 428 #endif 429 430 #define XS_T struct ccb_scsiio 431 #define XS_DMA_ADDR_T bus_addr_t 432 #define XS_GET_DMA64_SEG(a, b, c) \ 433 { \ 434 ispds64_t *d = a; \ 435 bus_dma_segment_t *e = b; \ 436 uint32_t f = c; \ 437 e += f; \ 438 d->ds_base = DMA_LO32(e->ds_addr); \ 439 d->ds_basehi = DMA_HI32(e->ds_addr); \ 440 d->ds_count = e->ds_len; \ 441 } 442 #define XS_ISP(ccb) cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path)) 443 #define XS_CHANNEL(ccb) cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path)) 444 #define XS_TGT(ccb) (ccb)->ccb_h.target_id 445 #define XS_LUN(ccb) (ccb)->ccb_h.target_lun 446 447 #define XS_CDBP(ccb) \ 448 (((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \ 449 (ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes) 450 451 #define XS_CDBLEN(ccb) (ccb)->cdb_len 452 #define XS_XFRLEN(ccb) (ccb)->dxfer_len 453 #define XS_XFRIN(ccb) (((ccb)->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 454 #define XS_XFROUT(ccb) (((ccb)->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 455 #define XS_TIME(ccb) \ 456 (((ccb)->ccb_h.timeout > 0xffff * 1000 - 999) ? 0 : \ 457 (((ccb)->ccb_h.timeout + 999) / 1000)) 458 #define XS_GET_RESID(ccb) (ccb)->resid 459 #define XS_SET_RESID(ccb, r) (ccb)->resid = r 460 #define XS_STSP(ccb) (&(ccb)->scsi_status) 461 #define XS_SNSP(ccb) (&(ccb)->sense_data) 462 463 #define XS_TOT_SNSLEN(ccb) ccb->sense_len 464 #define XS_CUR_SNSLEN(ccb) (ccb->sense_len - ccb->sense_resid) 465 466 #define XS_SNSKEY(ccb) (scsi_get_sense_key(&(ccb)->sense_data, \ 467 ccb->sense_len - ccb->sense_resid, 1)) 468 469 #define XS_SNSASC(ccb) (scsi_get_asc(&(ccb)->sense_data, \ 470 ccb->sense_len - ccb->sense_resid, 1)) 471 472 #define XS_SNSASCQ(ccb) (scsi_get_ascq(&(ccb)->sense_data, \ 473 ccb->sense_len - ccb->sense_resid, 1)) 474 #define XS_TAG_P(ccb) \ 475 (((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \ 476 (ccb)->tag_action != CAM_TAG_ACTION_NONE) 477 478 #define XS_TAG_TYPE(ccb) \ 479 ((ccb->tag_action == MSG_HEAD_OF_QUEUE_TASK)? FCP_CMND_TASK_ATTR_HEAD:\ 480 ((ccb->tag_action == MSG_ORDERED_TASK) ? FCP_CMND_TASK_ATTR_ORDERED :\ 481 ((ccb->tag_action == MSG_ACA_TASK) ? FCP_CMND_TASK_ATTR_ACA : \ 482 FCP_CMND_TASK_ATTR_SIMPLE))) 483 484 #define XS_PRIORITY(ccb) (ccb)->priority 485 486 #define XS_SETERR(ccb, v) (ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \ 487 (ccb)->ccb_h.status |= v 488 489 # define HBA_NOERROR CAM_REQ_INPROG 490 # define HBA_BOTCH CAM_UNREC_HBA_ERROR 491 # define HBA_CMDTIMEOUT CAM_CMD_TIMEOUT 492 # define HBA_SELTIMEOUT CAM_SEL_TIMEOUT 493 # define HBA_TGTBSY CAM_SCSI_STATUS_ERROR 494 # define HBA_REQINVAL CAM_REQ_INVALID 495 # define HBA_BUSRESET CAM_SCSI_BUS_RESET 496 # define HBA_ABORTED CAM_REQ_ABORTED 497 # define HBA_DATAOVR CAM_DATA_RUN_ERR 498 # define HBA_ARQFAIL CAM_AUTOSENSE_FAIL 499 500 501 #define XS_ERR(ccb) ((ccb)->ccb_h.status & CAM_STATUS_MASK) 502 503 #define XS_NOERR(ccb) (((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) 504 505 #define XS_INITERR(ccb) XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len 506 507 #define XS_SAVE_SENSE(xs, sp, len) do { \ 508 uint32_t amt = min(len, (xs)->sense_len); \ 509 memcpy(&(xs)->sense_data, sp, amt); \ 510 (xs)->sense_resid = (xs)->sense_len - amt; \ 511 (xs)->ccb_h.status |= CAM_AUTOSNS_VALID; \ 512 } while (0) 513 514 #define XS_SENSE_APPEND(xs, sp, len) do { \ 515 uint8_t *ptr = (uint8_t *)(&(xs)->sense_data) + \ 516 ((xs)->sense_len - (xs)->sense_resid); \ 517 uint32_t amt = min((len), (xs)->sense_resid); \ 518 memcpy(ptr, sp, amt); \ 519 (xs)->sense_resid -= amt; \ 520 } while (0) 521 522 #define XS_SENSE_VALID(xs) (((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0) 523 524 #define DEFAULT_FRAMESIZE(isp) isp->isp_osinfo.framesize 525 526 #define DEFAULT_ROLE(isp, chan) ISP_FC_PC(isp, chan)->def_role 527 528 #define DEFAULT_LOOPID(isp, chan) ISP_FC_PC(isp, chan)->default_id 529 530 #define DEFAULT_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 0, 1) 531 #define DEFAULT_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 0, 0) 532 #define ACTIVE_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 1, 1) 533 #define ACTIVE_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 1, 0) 534 535 536 #if BYTE_ORDER == BIG_ENDIAN 537 #define ISP_IOXPUT_8(isp, s, d) *(d) = s 538 #define ISP_IOXPUT_16(isp, s, d) *(d) = bswap16(s) 539 #define ISP_IOXPUT_32(isp, s, d) *(d) = bswap32(s) 540 #define ISP_IOXGET_8(isp, s, d) d = (*((uint8_t *)s)) 541 #define ISP_IOXGET_16(isp, s, d) d = bswap16(*((uint16_t *)s)) 542 #define ISP_IOXGET_32(isp, s, d) d = bswap32(*((uint32_t *)s)) 543 #define ISP_SWIZZLE_NVRAM_WORD(isp, rp) *rp = bswap16(*rp) 544 #define ISP_SWIZZLE_NVRAM_LONG(isp, rp) *rp = bswap32(*rp) 545 546 #define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)s)) 547 #define ISP_IOZGET_16(isp, s, d) d = (*((uint16_t *)s)) 548 #define ISP_IOZGET_32(isp, s, d) d = (*((uint32_t *)s)) 549 #define ISP_IOZPUT_8(isp, s, d) *(d) = s 550 #define ISP_IOZPUT_16(isp, s, d) *(d) = s 551 #define ISP_IOZPUT_32(isp, s, d) *(d) = s 552 553 #else 554 #define ISP_IOXPUT_8(isp, s, d) *(d) = s 555 #define ISP_IOXPUT_16(isp, s, d) *(d) = s 556 #define ISP_IOXPUT_32(isp, s, d) *(d) = s 557 #define ISP_IOXGET_8(isp, s, d) d = *(s) 558 #define ISP_IOXGET_16(isp, s, d) d = *(s) 559 #define ISP_IOXGET_32(isp, s, d) d = *(s) 560 #define ISP_SWIZZLE_NVRAM_WORD(isp, rp) 561 #define ISP_SWIZZLE_NVRAM_LONG(isp, rp) 562 563 #define ISP_IOZPUT_8(isp, s, d) *(d) = s 564 #define ISP_IOZPUT_16(isp, s, d) *(d) = bswap16(s) 565 #define ISP_IOZPUT_32(isp, s, d) *(d) = bswap32(s) 566 #define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)(s))) 567 #define ISP_IOZGET_16(isp, s, d) d = bswap16(*((uint16_t *)(s))) 568 #define ISP_IOZGET_32(isp, s, d) d = bswap32(*((uint32_t *)(s))) 569 #endif 570 571 #define ISP_SWAP16(isp, s) bswap16(s) 572 #define ISP_SWAP32(isp, s) bswap32(s) 573 574 /* 575 * Includes of common header files 576 */ 577 578 #include <dev/isp/ispreg.h> 579 #include <dev/isp/ispvar.h> 580 #include <dev/isp/ispmbox.h> 581 582 /* 583 * isp_osinfo definiitions && shorthand 584 */ 585 #define SIMQFRZ_RESOURCE 0x1 586 #define SIMQFRZ_LOOPDOWN 0x2 587 #define SIMQFRZ_TIMED 0x4 588 589 #define isp_dev isp_osinfo.dev 590 591 /* 592 * prototypes for isp_pci && isp_freebsd to share 593 */ 594 extern int isp_attach(ispsoftc_t *); 595 extern int isp_detach(ispsoftc_t *); 596 extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int); 597 598 /* 599 * driver global data 600 */ 601 extern int isp_announced; 602 extern int isp_loop_down_limit; 603 extern int isp_gone_device_time; 604 extern int isp_quickboot_time; 605 606 /* 607 * Platform Library Functions 608 */ 609 void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4); 610 void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5); 611 uint64_t isp_nanotime_sub(struct timespec *, struct timespec *); 612 int isp_fc_scratch_acquire(ispsoftc_t *, int); 613 void isp_platform_intr(void *); 614 void isp_platform_intr_resp(void *); 615 void isp_platform_intr_atio(void *); 616 int isp_dmasetup(ispsoftc_t *, XS_T *, void *); 617 void isp_dmafree(ispsoftc_t *, struct ccb_scsiio *); 618 void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int); 619 int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *); 620 621 /* 622 * Platform Version specific defines 623 */ 624 #define ISP_PATH_PRT(i, l, p, ...) \ 625 if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) { \ 626 xpt_print(p, __VA_ARGS__); \ 627 } 628 629 /* 630 * ISP General Library functions 631 */ 632 633 #include <dev/isp/isp_library.h> 634 635 #endif /* _ISP_FREEBSD_H */ 636