1 /*- 2 * This file is provided under a dual BSD/GPLv2 license. When using or 3 * redistributing this file, you may do so under either license. 4 * 5 * GPL LICENSE SUMMARY 6 * 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21 * The full GNU General Public License is included in this distribution 22 * in the file called LICENSE.GPL. 23 * 24 * BSD LICENSE 25 * 26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27 * All rights reserved. 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 33 * * Redistributions of source code must retain the above copyright 34 * notice, this list of conditions and the following disclaimer. 35 * * Redistributions in binary form must reproduce the above copyright 36 * notice, this list of conditions and the following disclaimer in 37 * the documentation and/or other materials provided with the 38 * distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 * 52 * $FreeBSD$ 53 */ 54 #ifndef _SCU_CONSTANTS_H_ 55 #define _SCU_CONSTANTS_H_ 56 57 /** 58 * @file 59 * 60 * @brief This file contains the SCU hardware constants. 61 */ 62 63 #ifdef __cplusplus 64 extern "C" { 65 #endif // __cplusplus 66 67 #include <dev/isci/scil/sci_controller_constants.h> 68 69 /** 70 * 2 indicates the maximum number of UFs that can occur for a given IO 71 * request. The hardware handles reception of additional unsolicited 72 * frames while all UFs are in use, by holding off the transmitting 73 * device. This number could be theoretically reduced to 1, but 2 74 * provides for more reliable operation. During SATA PIO operation, 75 * it is possible under some conditions for there to be 3 separate 76 * FISes received, back to back to back (PIO Setup, Data, D2H Register). 77 * It is unlikely to have all 3 pending all at once without some of 78 * them already being processed. 79 */ 80 #define SCU_MIN_UNSOLICITED_FRAMES (8) 81 #define SCU_MIN_CRITICAL_NOTIFICATIONS (19) 82 #define SCU_MIN_EVENTS (4) 83 #define SCU_MIN_COMPLETION_QUEUE_SCRATCH (0) 84 #define SCU_MIN_COMPLETION_QUEUE_ENTRIES ( SCU_MIN_CRITICAL_NOTIFICATIONS \ 85 + SCU_MIN_EVENTS \ 86 + SCU_MIN_UNSOLICITED_FRAMES \ 87 + SCI_MIN_IO_REQUESTS \ 88 + SCU_MIN_COMPLETION_QUEUE_SCRATCH ) 89 90 #define SCU_MAX_CRITICAL_NOTIFICATIONS (384) 91 #define SCU_MAX_EVENTS (128) 92 #define SCU_MAX_UNSOLICITED_FRAMES (128) 93 #define SCU_MAX_COMPLETION_QUEUE_SCRATCH (128) 94 #define SCU_MAX_COMPLETION_QUEUE_ENTRIES ( SCU_MAX_CRITICAL_NOTIFICATIONS \ 95 + SCU_MAX_EVENTS \ 96 + SCU_MAX_UNSOLICITED_FRAMES \ 97 + SCI_MAX_IO_REQUESTS \ 98 + SCU_MAX_COMPLETION_QUEUE_SCRATCH ) 99 100 #if !defined(ENABLE_MINIMUM_MEMORY_MODE) 101 #define SCU_UNSOLICITED_FRAME_COUNT SCU_MAX_UNSOLICITED_FRAMES 102 #define SCU_CRITICAL_NOTIFICATION_COUNT SCU_MAX_CRITICAL_NOTIFICATIONS 103 #define SCU_EVENT_COUNT SCU_MAX_EVENTS 104 #define SCU_COMPLETION_QUEUE_SCRATCH SCU_MAX_COMPLETION_QUEUE_SCRATCH 105 #define SCU_IO_REQUEST_COUNT SCI_MAX_IO_REQUESTS 106 #define SCU_IO_REQUEST_SGE_COUNT SCI_MAX_SCATTER_GATHER_ELEMENTS 107 #define SCU_COMPLETION_QUEUE_COUNT SCU_MAX_COMPLETION_QUEUE_ENTRIES 108 #else 109 #define SCU_UNSOLICITED_FRAME_COUNT SCU_MIN_UNSOLICITED_FRAMES 110 #define SCU_CRITICAL_NOTIFICATION_COUNT SCU_MIN_CRITICAL_NOTIFICATIONS 111 #define SCU_EVENT_COUNT SCU_MIN_EVENTS 112 #define SCU_COMPLETION_QUEUE_SCRATCH SCU_MIN_COMPLETION_QUEUE_SCRATCH 113 #define SCU_IO_REQUEST_COUNT SCI_MIN_IO_REQUESTS 114 #define SCU_IO_REQUEST_SGE_COUNT SCI_MIN_SCATTER_GATHER_ELEMENTS 115 #define SCU_COMPLETION_QUEUE_COUNT SCU_MIN_COMPLETION_QUEUE_ENTRIES 116 #endif // !defined(ENABLE_MINIMUM_MEMORY_OPERATION) 117 118 /** 119 * The SCU_COMPLETION_QUEUE_COUNT constant indicates the size 120 * of the completion queue into which the hardware DMAs 32-bit 121 * quantas (completion entries). 122 */ 123 124 /** 125 * This queue must be programmed to a power of 2 size (e.g. 32, 64, 126 * 1024, etc.). 127 */ 128 #if (SCU_COMPLETION_QUEUE_COUNT != 16) && \ 129 (SCU_COMPLETION_QUEUE_COUNT != 32) && \ 130 (SCU_COMPLETION_QUEUE_COUNT != 64) && \ 131 (SCU_COMPLETION_QUEUE_COUNT != 128) && \ 132 (SCU_COMPLETION_QUEUE_COUNT != 256) && \ 133 (SCU_COMPLETION_QUEUE_COUNT != 512) && \ 134 (SCU_COMPLETION_QUEUE_COUNT != 1024) 135 #error "SCU_COMPLETION_QUEUE_COUNT must be set to a power of 2." 136 #endif 137 138 #if SCU_MIN_UNSOLICITED_FRAMES > SCU_MAX_UNSOLICITED_FRAMES 139 #error "Invalid configuration of unsolicited frame constants" 140 #endif // SCU_MIN_UNSOLICITED_FRAMES > SCU_MAX_UNSOLICITED_FRAMES 141 142 #define SCU_MIN_UF_TABLE_ENTRIES (8) 143 #define SCU_ABSOLUTE_MAX_UNSOLICITED_FRAMES (4096) 144 #define SCU_UNSOLICITED_FRAME_BUFFER_SIZE (1024) 145 #define SCU_INVALID_FRAME_INDEX (0xFFFF) 146 147 #define SCU_IO_REQUEST_MAX_SGE_SIZE (0x00FFFFFF) 148 #define SCU_IO_REQUEST_MAX_TRANSFER_LENGTH (0x00FFFFFF) 149 150 #ifdef __cplusplus 151 } 152 #endif // __cplusplus 153 154 #endif // _SCU_CONSTANTS_H_ 155